JP7434622B1 - Substrates and electronic equipment - Google Patents

Abstract

An object of the present invention is to more easily identify other devices. The present invention includes a plurality of electrodes, a first wiring that terminates the plurality of electrodes at one end, and a connector that has a shape that fits with a terminal that terminates one end of the line and is connected to one end of the second wiring; a second wiring, the plurality of electrodes are arranged in parallel at intervals in the insertion direction of the connector in a region facing the insertion opening of the connector, and the plurality of electrodes have at least a reference electrode having a reference potential; It includes a potential electrode having one of two potential levels. [Selection diagram] Figure 2

Description

TECHNICAL FIELD This application relates to a substrate and an electronic device.

Generally, general-purpose electronic devices such as personal computers (PCs) and mobile phones have a variety of functions. On the other hand, a main device such as a computer system (sometimes referred to as a "main device" or "host device" in this application) may be unified to a specific model. Differences in individual functions and performance may be realized by the presence or absence or model of a device (sometimes referred to as a "peripheral device" in this application) that is separate from the main device. Of the various preset functions, only those that correspond to the peripheral device may be enabled.

For example, in Patent Document 1, a 4-pole type audio jack is used, an earphone microphone function is provided at the general 3-pole signal location including the ground, and a voice recognition function in high noise is provided at the location corresponding to the 4th pole. This document describes an input/output function switching method for assigning a function to a microphone input for a computer and activating that function according to the needs of the connected audio device.

Japanese Patent Application Publication No. 2007-124073

There are mainly two types of connection methods between the main device and peripheral devices. In the first method, the main device is placed on a flexible printed circuit (FPC) and configured to be connectable to peripheral devices using connectors provided on the FPC (FPC case). A main device needs to identify a peripheral device before performing input/output with the peripheral device. Therefore, the main device may have a signal line dedicated to peripheral device identification information (sometimes referred to as an "ID dedicated line" in this application), separate from input/output lines. Accordingly, the connector needs to be provided with a dedicated terminal (sometimes referred to as an "ID pin" in this application) for connecting the ID dedicated line. The identification information is expressed by whether the potential of the ID pin is a low potential (L: low) corresponding to a reference potential (GND: ground) or a high potential (H: High) which is a higher potential. Identification information is detected by observing the potential of the ID pin.

In the second method, the main device is connected to the peripheral device using a connector that is separate from the connector provided on the FPC (discrete case). This method requires a return line in addition to the ID dedicated line. The connector must have a return pin for connecting the return wire. The return line functions as a reference potential line (ground return) that serves as a reference potential. That is, a ground loop is formed by the ID dedicated line, peripheral members, and return line. In this case as well, identification information is detected by observing the potential of the ID pin.

As described above, in the first and second methods, it is necessary to modify the input/output interface in order to obtain the identification information of the peripheral device to be connected. This can lead to increased manufacturing and inspection costs.

The present application has been made to solve the above problems, and a substrate according to one aspect of the present application includes a plurality of electrodes, a first wiring that terminates the plurality of electrodes at one end, and a first wiring that terminates one end of the line. The connector has a shape that fits into a terminal and is connected to one end of a second wiring, and the second wiring, and the plurality of electrodes are arranged in a region facing the insertion opening of the connector. The plurality of electrodes are arranged in parallel at intervals in the insertion direction of the connector, and include a reference electrode having a reference potential and a potential electrode having one of at least two levels of potential.

In the above board, the plurality of electrodes and the connector are arranged on a common surface, and when the terminal and the connector are fitted together, some or all of the plurality of electrodes are attached to a conductor layer covering the core wire of the line. It may be arranged so that they are in contact with each other.

In the above board, an electronic component including terminals connected to the first wiring and the second wiring, respectively, may be arranged.

An electronic device according to one aspect of the present application includes the above-described substrate, and the electronic component includes an integrated circuit, and the integrated circuit connects a device to the other end of the line based on the potential of the potential electrode. May be identified.

In the above electronic device, the device is a speaker, and the integrated circuit has acoustic characteristic parameters set for each speaker model, identifies the speaker model based on the potential, and corresponds to the identified model. The acoustic characteristics of the acoustic signal output to the speaker may be corrected using the acoustic characteristic parameters.

The electronic device described above includes a first casing that accommodates the substrate and a second casing that covers a surface of the first casing, the second casing located at a position facing the plurality of electrodes. may be provided with a cushioning material.

According to the above aspect of the present application, devices can be identified more easily.

FIG. 1 is a plan view showing a configuration example of an electronic device according to an embodiment. FIG. 2 is a plan view illustrating the surface of the connector according to the present embodiment. FIG. 2 is a plan view illustrating the surface of the line according to the present embodiment. FIG. 2 is a cross-sectional view illustrating a cross section of the line according to the present embodiment. FIG. 2 is a plan view illustrating surfaces of a connector and a line according to the present embodiment. FIG. 2 is a side view illustrating the side surface of the connector and the line according to the present embodiment. FIG. 3 is a diagram illustrating a contact pattern of a conductor layer with an electrode according to the present embodiment. A table showing an example of device information according to the present embodiment is shown. FIG. 3 is a side view illustrating the side surface of the connector, the line, and the buffer material according to the present embodiment. 1 is a schematic block diagram showing an example of a hardware configuration of an electronic device according to an embodiment. FIG.

First, a configuration example of an electronic device 1 according to an embodiment of the present application will be described with reference to the drawings. In the following description, a case where the electronic device 1 is mainly a desktop PC (Personal Computer) will be exemplified, but the present invention is not limited to this. The electronic device 1 is not limited to a general-purpose information device such as a notebook PC, a tablet terminal device, or a smartphone, but may be realized in any form such as a dedicated electronic device such as a vending machine, a product registration device, etc. .

FIG. 1 is a plan view showing a configuration example of an electronic device 1 according to the present embodiment. Electronic device 1 includes housings 102 and 104, substrate 110, integrated circuit 112, electrode 116, connector 118, peripheral device 122, line 124, and plug 128. One side of the housing 102 is engaged with one side of the housing 104 using hinge mechanisms 132a and 132b. With this configuration, one of the casings 102, 104 can rotate relative to the other about a rotation axis A that passes through a position sandwiched between one side of each of the casings 102, 104. FIG. 1 illustrates a state in which the housing 102 is not covered by the housing 104 and is opened, so that the inside of the housing 102 and the back surface of the housing 104 are exposed.

Various members are installed in the casing 102. Various members may include electronic components. In the example of FIG. 1, the housing 102 houses a board 110 and a peripheral device 122. The board 110 is a printed circuit board (PCB). An integrated circuit 112, a connector 118, and a plurality of electrodes 116 are arranged in this order on the surface of the substrate 110. Peripheral device 122 is electrically connected to integrated circuit 112 using line 124 and wiring (referred to as "second wiring" in the following description, not shown) installed on substrate 110. When peripheral device 122 is connected to integrated circuit 112, various electrical signals can be transmitted via line 124, connector 118, and second wiring.

Connector 118 terminates one end of the second wiring. The other end of the second wiring is electrically connected to a group of connection terminals (not shown) of the integrated circuit 112. Any of pins, lead frames, etc. may be used as the connection terminal group. One end of the line 124 is terminated using a plug 128. The other end of the line 124 is electrically connected to a group of connection terminals (not shown) of the peripheral device 122. Connector 118 has a housing chamber into which plug 128 can be inserted. When the plug 128 is completely inserted into the connector 118, one end of the second wiring is electrically connected to one end of the line 124. A plurality of electrodes 116 are arranged in a region facing the insertion port of connector 118. Each of the plurality of electrodes 116 is electrically connected to the integrated circuit 112 via a first wiring 134 (FIG. 2). The first wiring 134 is installed separately from the second wiring on the substrate 110. The first wiring 134 and the second wiring are formed, for example, by etching a metal layer covering the surface of the substrate 110.

At least one of the plurality of electrodes 116 corresponds to a reference electrode, and the other electrodes correspond to potential electrodes. The reference electrode is an electrode that provides a reference potential GND. The potential electrode is an electrode that provides one level of potential among at least two levels of potential. In this application, of the two potential levels, the higher potential is referred to as a high potential (H: High), and the lower potential is referred to as a low potential (L: Low). A low potential is a potential equal to the reference potential (ie, 0V) or a potential that is not significantly different from the reference potential. A high potential is a potential that is significantly higher than a reference potential (eg, 1-3V).

When the plug 128 is completely inserted into the connector 118, some or all of the plurality of electrodes 116 come into contact with the conductor layer 126 that bundles the core wires 124s of the line 124. Depending on the size or shape of the conductor layer 126, there may or may not be a potential electrode short-circuited with the reference electrode. The potential of the potential electrode short-circuited with the reference electrode becomes a low potential. Therefore, the combination of potentials of the individual potential electrodes is determined by one or both of the size and shape of the conductor layer 126. This combination of potentials allows identification information of peripheral device 122 to be transmitted to integrated circuit 112 without changing the structure of connector 118 or the data structure of the signal transmitted on line 124.

Note that a cushioning material 138 is installed on the back surface of the casing 104. The buffer material 138 is made of an insulator that has elasticity and plasticity at room temperature. As a material for the cushioning material 138, for example, synthetic rubber can be used. The synthetic rubber may be any of butadiene rubber, isoprene rubber, etc. The buffer material 138 is located at a position facing the plurality of electrodes 116 with the casing 104 closing the surface of the casing 102 and covering the casing 102. Furthermore, when the plug 128 is fully inserted into the connector 118, the conductor layer 126 of the line 124 contacts some or all of the electrodes 116. Therefore, when the housing 104 is closed to the housing 102, the conductor layer 126 is crimped onto some or all of the electrodes 116.

Next, the connector 118 and plug 128 according to this embodiment will be explained in more detail. FIG. 2 is a plan view illustrating the surface of the connector 118 according to this embodiment. FIG. 3 is a plan view illustrating the surface of the line 124 according to this embodiment. FIG. 4 is a cross-sectional view illustrating a cross section of the line 124 according to this embodiment. FIG. 5 is a plan view illustrating the surfaces of the connector 118 and the line 124 according to this embodiment. FIG. 6 is a side view illustrating the side surface of the connector 118 and the line 124 according to this embodiment. 5 and 6 each show the plug 128 fully inserted and mated into the connector 118. In this state, the line 124 is electrically connected to the integrated circuit 112 via the connector 118 and the second wiring.

The connector 118 corresponds to a receptacle (also called a receptacle, a jack, etc.) for the plug 128. Connector 118 includes a receiving chamber into which a distal end of line 124 terminated by plug 128 can be inserted. Further, the connector 118 is formed with an insertion port for inserting the plug 128 into the storage chamber. The inner wall of the storage chamber has a shape that fits into the inserted state of the plug 128, and includes a fitting (not shown) that allows the plug 128 to be stably accommodated. Further, the inner wall of the storage chamber is provided with a contact point (not shown). The contact terminates one end of the second wire. When the plug 128 is inserted into the storage chamber and fitted with the connector 118, one end of the second wiring and one end of the line 124 are electrically connected.

A plurality of electrodes 116 are arranged in opposing areas within a predetermined range from the insertion port of the connector 118. In the examples of FIGS. 2, 5, and 6, the individual electrodes 116 are comprised of conductors having an elongated shape with a length greater than a width. The individual electrodes 116 are arranged in parallel, with their longitudinal directions oriented in a direction perpendicular to the insertion direction of the plug 128, at regular intervals in the insertion direction, and so as not to touch each other.

In the illustrated example, the number of electrodes 116 is three. The three electrodes 116-0, 116-g, and 116-1 are juxtaposed in the insertion direction of the plug 128. Electrode 116-g corresponds to a reference electrode. Electrodes 116-0 and 116-1 each correspond to potential electrodes. Electrodes 116-0, 116-g, 116-1 are electrically connected to terminals (not shown) of integrated circuit 112 using separate conductive wires 134-0, 134-g, 134-1, respectively. These conducting wires 134-0, 134-g, and 134-1 constitute the first wiring 134. The integrated circuit 112 measures the potentials of the terminals connected to the conductive wires 134-0 and 134-1, respectively. The conducting wire 134-g is connected to a reference potential point. The reference potential point may be provided on the integrated circuit 112 or on the substrate 110.

On the other hand, the line 124 has one or more core wires 124s. In the examples shown in FIGS. 2 to 5, the number of core wires 124s in the line 124 is three. Each core wire 124s has a conducting wire 124l and a covering layer 124c. The covering layer 124c is made of an insulator and covers the conducting wire 124l. Various electrical signals input and output between the integrated circuit 112 and the peripheral device 122 are transmitted through the individual conductive wires 124l. The three core wires 124s are bundled, and the periphery thereof is further covered with a conductor layer 126. The conductor layer 126 is made of a metal foil made of copper, aluminum, or the like, for example. The metal foil covers the three core wires 124s all at once. The conductor layer 126 is further covered with a covering layer 126c. The covering layer 126c is made of an insulator and covers the conductor layer 126. For the covering layers 124c and 126c, a material with high insulation and voltage resistance, such as polyvinyl chloride, is used.

In the examples shown in FIGS. 3, 5, and 6, the covering layer 126c is peeled off at the end near one end of the line 124, and the conductor layer 126 is exposed. Moreover, a part of the conductor layer 126 has peeled off, and the core wire 124s is exposed. The exposed portion of the conductor layer 126 contacts part or all of the electrode 116. In the example of FIGS. 5 and 6, the conductor layer 126 contacts the potential electrode 116-0 and the reference electrode 116-g, but does not contact the potential electrode 116-1. Therefore, the potential of the potential electrode 116-0 becomes a low potential (L), and the potential of the potential electrode 116-1 becomes a high potential (H).

The other ends of the conducting wires 124l of the line 124 are electrically connected to corresponding terminals of the peripheral devices 122, respectively. When the plug 128 is connected to the connector 118, one end of the conducting wire 124l is electrically connected to one end of a corresponding conducting wire (not shown) of the second wiring via a contact. The other ends of the conductive wires of the second wiring are electrically connected to corresponding terminals of the integrated circuit 112, respectively.

Next, an example of a contact pattern between the conductor layer 126 and the electrode 116 will be described. FIG. 7 is a diagram illustrating a contact pattern of the conductor layer 126 with the electrode 116 according to this embodiment. The contact pattern of conductor layer 126 with electrode 116 depends on the size and/or shape of the exposed portion thereof. In the example of FIG. 7A, the exposed conductor layer 126 is long, so it contacts all of the potential electrode 116-0, the reference electrode 116-g, and the potential electrode 116-1. Therefore, the potentials of the potential electrodes 116-0 and 116-1 are both low potential (L). In the example of FIG. 7B, the exposed conductor layer 126 is short and apart from one end, so it contacts the potential electrode 116-0 and the reference electrode 116-g, but does not contact the potential electrode 116-1. Therefore, the potential of the potential electrode 116-0 becomes a low potential (L), and the potential of the potential electrode 116-1 becomes a high potential (H).

In the example of FIG. 7C, the exposed conductor layer 126 is short and biased to one end, so it does not contact the potential electrode 116-0, but contacts the reference electrode 116-g and the potential electrode 116-1. Therefore, the potential of the potential electrode 116-0 becomes a high potential (H), and the potential of the potential electrode 116-1 becomes a low potential (L). In the example of FIG. 7D, since the conductor layer 126 is not exposed, neither of the potential electrodes 116-0 and 116-1 is short-circuited with the reference electrode 116-g. Therefore, the potentials of the potential electrodes 116-0 and 116-1 are both high potential (H). Similarly, even when the conductor layer 126 is exposed but an insulator is sandwiched between it and the electrode 116, the potentials of the potential electrodes 116-0 and 116-1 are both high potential (H).

Therefore, device information is set in the integrated circuit 112 in advance. The device information is information that indicates the attributes or individuality of the peripheral device 122 for each set of potentials of individual potential electrodes. The end portion of the line 124 is processed so that a conductor layer 126 is exposed in a size or shape corresponding to the attributes or individuality of the peripheral device 122. Device information is expressed by a set of potentials of potential electrodes 116-0 and 116-1 realized by a contact pattern between conductor layer 126 and individual electrodes 116. Therefore, the integrated circuit 112 can refer to the set device information, detect the potential of each potential electrode, and determine the attribute or individual of the peripheral device 122 corresponding to the set of detected potentials.

FIG. 8 shows a table showing an example of device information according to this embodiment. The device information illustrated in FIG. 8 indicates the presence or absence of a conductor layer 126 (metal foil) for each type of cable or speaker as an example of the peripheral device 122, as well as the size and potential set for each potential electrode. In cable 0 (speaker A), low potential (L) and low potential (L) are associated with long metal foil and potential electrodes 116-0 and 116-1, respectively. In the cable 1 (speaker B), a low potential (L) and a high potential (H) are associated with a short metal foil separated from one end and potential electrodes 116-0 and 116-1, respectively. In the cable 2 (speaker C), a high potential (H) and a low potential (L) are associated with a short metal foil biased toward one end and potential electrodes 116-0 and 116-1, respectively. For non-contact, high potential (H) and high potential (H) are associated with potential electrodes 116-0 and 116-1, respectively, regardless of the presence or absence of metal foil and its size. Non-contact includes cases where a foreign object made of an insulator is inserted between the metal foil and the electrode 116, and cases where a normal covered line in which the conductor layer 126 is not exposed is used.

Note that different acoustic characteristic parameters may be set in advance in the integrated circuit 112 for each type of speaker. The acoustic characteristic parameters may be aimed at, for example, volume or emphasizing or reducing specific frequency components. The integrated circuit 112 may specify an acoustic characteristic parameter corresponding to the determined type of speaker, and correct the acoustic characteristic of the acoustic signal to be output using the specified acoustic characteristic parameter. The integrated circuit 112 outputs the acoustic signal having the corrected acoustic characteristics to the speaker to emit sound. Therefore, the acoustic characteristics are corrected depending on the type of speaker. The acoustic characteristic parameter only needs to have a format that corresponds to the correction processing method. The acoustic characteristic parameter may be, for example, a gain for each frequency band, a moving average coefficient in a moving average model, or the like.

Further, terminals connected to individual potential electrodes provided in the integrated circuit 112 may be electrically connected to a voltage source via a resistance element. In that case, a power supply voltage is applied to the terminals connected to each potential electrode via a resistance element. The resistance element functions as a pull-up resistor. Therefore, the potential of the potential electrode that is not short-circuited to the reference electrode via the conductor layer 126 does not float, and is stabilized to a positive potential that is significantly higher than the reference potential.

As described above, the cushioning material 138 is installed on the back surface of the housing 104 (FIG. 1). The buffer material 138 is located at a position facing the electrode 116 when the housing 104 is closed so as to cover the housing 102 . When the casing 104 is closed against the surface of the casing 102, the buffer material 138 presses down the conductor layer 126 of the line 124, as illustrated in FIG. It can be partially or completely crimped. Since the conductor layer 126 stably contacts part or all of the electrode 116, the potential of the potential electrode short-circuited to the reference electrode can be stabilized to a low potential (L).

Next, an example of the hardware configuration of the electronic device 1 according to the present embodiment will be described. FIG. 10 is a schematic block diagram showing an example of the hardware configuration of the electronic device 1 according to the present embodiment.
The electronic device 1 includes a processor 11, a system memory 12, a video subsystem 13, a display 14, a chipset 21, a ROM (Read only memory) 22, an auxiliary storage device 23, an input/output connector 24, an audio system 25, a communication module 26, It is configured to include an EC (Embedded Controller) 31, an input device 32, a power button 33, a power circuit 34, and a battery unit 35.

The integrated circuit 112 described above is configured to include, for example, a processor 11, a system memory 12, a video subsystem 13, a chipset 21, a ROM 22, and an audio system 25. Other devices, such as the ROM 22, the auxiliary storage device 23, the communication module 26, the speaker 28, the microphone 29, the EC 31, the power supply circuit 34, and the battery unit 35, can be housed in either the housing 102 or 104, respectively. Input device 32, power button 33, and display 14 may be installed so as to be exposed on the surface of either housing 102 or 104, respectively. In the example of FIGS. 8 and 10, the connector 118 described above is provided between the audio system 25 and the speaker 28. Depending on the implementation of the electronic device 1, the input/output connector 24 may correspond to the above-mentioned connector 118, or may be provided separately.

Although FIG. 8 shows an example in which the peripheral device 122 is the speaker 28, the present invention is not limited to this. For devices other than the speaker 28, for example, the microphone 29, the peripheral devices 122 include a line 124, an electrode 116, a connector 118, a first A wiring and a second wiring may be provided. The integrated circuit 112 can determine the attributes or individuality of individual devices based on the combination of potentials for each potential electrode. The integrated circuit 112 may identify a parameter corresponding to the determined attribute or individual, and use the identified parameter to perform processing on the output or input to the device. Peripheral device 122 may not be built into either housing 102 or 104, but may be exposed on the surface thereof.

In addition, although the example of illustration illustrated the case where the number of potential electrodes is two, it is not restricted to this. The number of potential electrodes may be one or three or more. The number of core wires 124s in the line forming the second wiring and the line 124 is not limited to three, respectively. The number of lines and core wires 124s that make up the second wiring may be two or less or four or more, respectively.
Further, the casing 102 and the casing 104 do not necessarily need to be engaged using the hinge mechanisms 132a and 132b. The casing 104 may not be detachable from the casing 102, but may be fixed using a fixture such as a slider so that the casing 102 can be closed or opened.

As described above, the substrate 110 according to the present embodiment includes a plurality of electrodes 116, a first wiring that terminates the plurality of electrodes 116 at one end, and a terminal (for example, the plug 128) that terminates one end of the line 124. The connector 118 has a shape that fits into the connector 118 and is connected to one end of the second wiring, and the second wiring, and the plurality of electrodes 116 are connected to the connector 118 in a region facing the insertion opening of the connector 118. The plurality of electrodes 116 are arranged in parallel at intervals in the insertion direction, and include a reference electrode 116-g having a reference potential, and potential electrodes 116-0 and 116-1 having one of at least two levels of potential.
The electronic component also includes a substrate 110, and includes an integrated circuit 112, which is connected to a device (for example, a peripheral device) connected to the other end of the line 124 based on the potential of the potential electrodes 116-0 and 116-1. 122).

With this configuration, when the terminal terminating the line 124 is connected, the potential is determined for each potential electrode depending on whether or not there is a connection between the reference electrode 116-g and each potential electrode via the conductor layer 126. By setting in advance the size or shape of the conductor layer 126 corresponding to the device connected to the line 124, the device can be identified based on the combination of potentials detected for each potential electrode.
Furthermore, devices connected to the line 124 can be identified economically with a simple configuration without modifying or adding terminals that terminate the line 124 or modifying the signaling.

Further, the plurality of electrodes 116 and the connector 118 are arranged on a common surface, so that when the terminal and the connector 118 are fitted together, some or all of the plurality of electrodes 116 are in contact with the conductor layer 126 covering the core wire 124s of the line 124. You may also do so.
With this configuration, in a state where the line 124 is connected to a terminal terminating the line 124, a part or all of the conductor layer 126 and the plurality of electrodes 116 formed on a part (for example, the end part) of the line 124 that is terminated at the terminal can be brought into contact with. Therefore, the potential of each potential electrode 116-0 and 116-1 is detected while the device connected to the line 124 is connected.

Further, an electronic component (eg, integrated circuit 112) including terminals connected to the first wiring and the second wiring 123, respectively, may be arranged on the substrate 110.
The electronic device 1 includes a first casing (for example, casing 102) that accommodates a board 110, and a second casing (for example, casing 104) that covers the surface of the first casing. The body may include a cushioning material 138 at a position opposite the plurality of electrodes 116.
With this configuration, the buffer material 138 is disposed at a position facing the surface of the electrode 116, and the conductor layer 126 can be crimped onto part or all of the electrode 116 provided on the substrate 110. Since the reference electrode and the potential electrode can be brought into stable contact via the conductor layer 126, the potential of each potential electrode can be stabilized.

The above device is the speaker 28, and the integrated circuit 112 has acoustic characteristic parameters set for each model of the speaker 28, identifies the model of the speaker 28 based on the detected potential, and has acoustic characteristics corresponding to the identified model. The acoustic characteristics of the acoustic signal output to the speaker 28 may be corrected using the parameters.
With this configuration, acoustic characteristic parameters corresponding to the identified model of the speaker 28 are used. The acoustic characteristics of the acoustic signal output to the speaker can be corrected.

Although the embodiments of the present invention have been described above in detail with reference to the drawings, the specific configuration is not limited to the above-described embodiments, and includes designs within the scope of the gist of the present invention. The configurations described in the above embodiments can be combined arbitrarily.

DESCRIPTION OF SYMBOLS 1...Electronic device, 11...Processor, 12...System memory, 13...Video subsystem, 14...Display, 21...Chip set, 22...ROM, 23...Auxiliary storage device, 24...I/O connector, 25...Audio system, 26... Communication module, 28... Speaker, 29... Microphone, 31... EC, 32... Input device, 33... Power button, 34... Power supply circuit, 35... Battery unit, 102, 104... Housing, 116... Electrode, 116- 0, 116-1...Potential electrode, 116-g...Reference electrode, 118...Connector, 122...Peripheral device, 124...Line, 124c, 126c...Coating layer, 124l, 134 (134-0, 134-1, 134- g)...conductor wire, 124s...core wire, 126...conductor layer

Claims (6)

multiple electrodes;
a first wiring that terminates the plurality of electrodes at one end;
a connector having a shape that fits with a terminal terminating one end of the line and connected to one end of the second wiring;
and the second wiring,
The plurality of electrodes are arranged in parallel at intervals in the insertion direction of the connector in a region facing the insertion opening of the connector,
The plurality of electrodes include a reference electrode having a reference potential and a potential electrode having one of at least two levels of potential. the plurality of electrodes and the connector are arranged on a common surface;
The board according to claim 1, wherein when the terminal and the connector are fitted together, some or all of the plurality of electrodes are in contact with a conductor layer that covers the core wire of the line. The board according to claim 2, further comprising an electronic component having terminals connected to the first wiring and the second wiring, respectively. comprising the substrate according to claim 3;
The electronic component includes an integrated circuit,
The integrated circuit includes:
An electronic device that identifies a device connected to the other end of the line based on the potential of the potential electrode. the device is a speaker;
Acoustic characteristic parameters are set in the integrated circuit for each speaker model, and the speaker model is identified based on the potential,
The electronic device according to claim 4, wherein the acoustic characteristic of the acoustic signal output to the speaker is corrected using an acoustic characteristic parameter corresponding to the identified model. a first casing that accommodates the board;
a second housing that covers the surface of the first housing,
The electronic device according to claim 4, wherein the second housing includes a buffer material at a position facing the plurality of electrodes.

Images