JP7415558B2 - Silicon carbide epitaxial substrate and method for manufacturing silicon carbide semiconductor device - Google Patents

Description

The present disclosure relates to a method of manufacturing a silicon carbide epitaxial substrate and a silicon carbide semiconductor device. This application claims priority based on Japanese Patent Application No. 2017-168252, which is a Japanese patent application filed on September 1, 2017. All contents described in the Japanese patent application are incorporated herein by reference.

Japanese Unexamined Patent Publication No. 2014-170891 (Patent Document 1) discloses a method of epitaxially growing a silicon carbide layer on a silicon carbide single crystal substrate.

Japanese Patent Application Publication No. 2014-170891

A silicon carbide epitaxial substrate according to the present disclosure includes a silicon carbide substrate and a silicon carbide epitaxial film. A silicon carbide epitaxial film is on a silicon carbide substrate. The polytype of the silicon carbide substrate and silicon carbide epitaxial film is 4H. The silicon carbide epitaxial film includes a first layer that is in contact with the silicon carbide substrate, and a second layer that is on the first layer and constitutes the main surface of the silicon carbide epitaxial film. The silicon carbide substrate, the first layer, and the second layer contain n-type impurities. The concentration of n-type impurities contained in the first layer is lower than the concentration of n-type impurities contained in the silicon carbide substrate, and higher than the concentration of n-type impurities contained in the second layer. The main surface of the silicon carbide substrate has basal plane dislocations having a first surface density. The main surface of the silicon carbide epitaxial film has basal plane dislocations having a second surface density lower than the first surface density. The value obtained by dividing the second areal density by the first areal density is 1/1000 or less. The main surface of the silicon carbide epitaxial film is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane.

A silicon carbide epitaxial substrate according to the present disclosure includes a silicon carbide substrate and a silicon carbide epitaxial film. A silicon carbide epitaxial film is on a silicon carbide substrate. The polytype of the silicon carbide substrate and silicon carbide epitaxial film is 4H. The silicon carbide epitaxial film includes a first layer that is in contact with the silicon carbide substrate, and a second layer that is on the first layer and constitutes the main surface of the silicon carbide epitaxial film. The silicon carbide substrate, the first layer, and the second layer contain n-type impurities. The concentration of n-type impurities contained in the first layer is lower than the concentration of n-type impurities contained in the silicon carbide substrate, and higher than the concentration of n-type impurities contained in the second layer. The main surface of the silicon carbide substrate has basal plane dislocations having a first surface density. The main surface of the silicon carbide epitaxial film has basal plane dislocations having a second surface density lower than the first surface density. The value obtained by dividing the second areal density by the first areal density is 1/1000 or less. The main surface of the silicon carbide epitaxial film is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane. The maximum diameter of the main surface of the silicon carbide epitaxial film is 150 mm or more. The thickness of the first layer is 0.5 μm or more and 2 μm or less. The thickness of the second layer is 5 μm or more and 30 μm or less. The concentration of n-type impurities contained in the first layer is 1×10 ¹⁷ cm ⁻³ or more and 1×10 ¹⁹ cm ⁻³ or less. The concentration of n-type impurities contained in the second layer is 1×10 ¹⁵ cm ⁻³ or more and 1×10 ¹⁶ cm ⁻³ or less.

FIG. 1 is a schematic plan view showing the structure of a silicon carbide epitaxial substrate according to this embodiment. FIG. 2 is a schematic cross-sectional view showing the structure of the silicon carbide epitaxial substrate according to this embodiment. FIG. 3 is a schematic partial cross-sectional view showing the configuration of the silicon carbide epitaxial substrate manufacturing apparatus according to the present embodiment. FIG. 4 is a flowchart schematically showing a method for manufacturing a silicon carbide epitaxial substrate according to this embodiment. FIG. 5 is a schematic cross-sectional view showing the first step of the method for manufacturing a silicon carbide epitaxial substrate according to the present embodiment. FIG. 6 is a schematic cross-sectional view showing the second step of the method for manufacturing a silicon carbide epitaxial substrate according to the present embodiment. FIG. 7 is a diagram showing manufacturing conditions for the silicon carbide epitaxial substrate according to this embodiment. FIG. 8 is a flowchart schematically showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment. FIG. 9 is a schematic cross-sectional view showing the first step of the method for manufacturing a silicon carbide semiconductor device according to this embodiment. FIG. 10 is a schematic cross-sectional view showing the second step of the method for manufacturing a silicon carbide semiconductor device according to this embodiment. FIG. 11 is a schematic cross-sectional view showing the configuration of a silicon carbide semiconductor device according to this embodiment. FIG. 12 is a diagram showing manufacturing conditions for a silicon carbide epitaxial substrate according to Sample 2.

[Summary of embodiments of the present disclosure]
First, an overview of an embodiment of the present disclosure will be described. In the crystallographic description of this specification, individual orientations are indicated by [], collective orientations are indicated by <>, individual planes are indicated by (), and collective planes are indicated by {}, respectively. A negative crystallographic index is usually expressed by placing a "-" (bar) above the number, but in this specification, a negative sign is placed in front of the number. Express the negative exponent above.

(1) Silicon carbide epitaxial substrate 100 according to the present disclosure includes silicon carbide substrate 10 and silicon carbide epitaxial film 20. Silicon carbide epitaxial film 20 is on silicon carbide substrate 10 . The polytype of silicon carbide substrate 10 and silicon carbide epitaxial film 20 is 4H. Silicon carbide epitaxial film 20 includes a first layer 21 in contact with silicon carbide substrate 10 and a second layer 22 that is on first layer 21 and constitutes main surface 14 of silicon carbide epitaxial film 20 . Silicon carbide substrate 10, first layer 21, and second layer 22 contain n-type impurities. The concentration of n-type impurities contained in first layer 21 is lower than the concentration of n-type impurities contained in silicon carbide substrate 10 and higher than the concentration of n-type impurities contained in second layer 22. Main surface 12 of silicon carbide substrate 10 has basal plane dislocations 1 having a first surface density. Main surface 14 of silicon carbide epitaxial film 20 has basal plane dislocations 1 having a second surface density lower than the first surface density. The value obtained by dividing the second areal density by the first areal density is 1/1000 or less. Main surface 14 of silicon carbide epitaxial film 20 is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane.

(2) In silicon carbide epitaxial substrate 100 according to (1) above, the value obtained by dividing the second areal density by the first areal density may be 1/2000 or less.

(3) In silicon carbide epitaxial substrate 100 according to (1) or (2) above, maximum diameter 111 of main surface 14 of silicon carbide epitaxial film 20 may be 100 mm or more.

(4) In the silicon carbide epitaxial substrate according to (3) above, maximum diameter 111 of main surface 14 of silicon carbide epitaxial film 20 may be 150 mm or more.

(5) Silicon carbide epitaxial substrate 100 according to the present disclosure includes silicon carbide substrate 10 and silicon carbide epitaxial film 20. Silicon carbide epitaxial film 20 is on silicon carbide substrate 10 . The polytype of silicon carbide substrate 10 and silicon carbide epitaxial film 20 is 4H. Silicon carbide epitaxial film 20 includes a first layer 21 in contact with silicon carbide substrate 10 and a second layer 22 that is on first layer 21 and constitutes main surface 14 of silicon carbide epitaxial film 20 . Silicon carbide substrate 10, first layer 21, and second layer 22 contain n-type impurities. The concentration of n-type impurities contained in first layer 21 is lower than the concentration of n-type impurities contained in silicon carbide substrate 10 and higher than the concentration of n-type impurities contained in second layer 22. Main surface 12 of silicon carbide substrate 10 has basal plane dislocations 1 having a first surface density. Main surface 14 of silicon carbide epitaxial film 20 has basal plane dislocations 1 having a second surface density lower than the first surface density. The value obtained by dividing the second areal density by the first areal density is 1/1000 or less. Main surface 14 of silicon carbide epitaxial film 20 is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane. Main surface 14 of silicon carbide epitaxial film 20 is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane. Maximum diameter 111 of main surface 14 of silicon carbide epitaxial film 20 is 150 mm or more. The thickness of the first layer 21 is 0.5 μm or more and 2 μm or less. The thickness of the second layer 22 is 5 μm or more and 30 μm or less. The concentration of n-type impurities contained in the first layer 21 is 1×10 ¹⁷ cm ⁻³ or more and 1×10 ¹⁹ cm ⁻³ or less. The concentration of n-type impurities contained in the second layer 22 is 1×10 ¹⁵ cm ⁻³ or more and 1×10 ¹⁶ cm ⁻³ or less.

(6) A method for manufacturing silicon carbide semiconductor device 300 according to the present disclosure includes the following steps. Silicon carbide epitaxial substrate 100 according to any one of (1) to (5) above is prepared. Silicon carbide epitaxial substrate 100 is processed.

[Details of embodiments of the present disclosure]
Hereinafter, details of embodiments of the present disclosure will be described. In the following description, the same or corresponding elements are given the same reference numerals, and the same description will not be repeated.

(Silicon carbide epitaxial substrate)
As shown in FIGS. 1 and 2, silicon carbide epitaxial substrate 100 according to this embodiment includes silicon carbide substrate 10 and silicon carbide epitaxial film 20. Silicon carbide epitaxial film 20 is on silicon carbide substrate 10 . Silicon carbide substrate 10 has a first main surface 11 and a first main surface 12 opposite to first main surface 11 . Silicon carbide epitaxial film 20 is in contact with first main surface 11 . Silicon carbide epitaxial film 20 has a third main surface 13 in contact with first main surface 11 and a second main surface 14 opposite to third main surface 13 . The polytype of silicon carbide substrate 10 and silicon carbide epitaxial film 20 is 4H. As shown in FIG. 1 , silicon carbide epitaxial substrate 100 may be provided with a first flat 16 extending in a first direction 101 . Silicon carbide epitaxial substrate 100 may be provided with a second flat (not shown) extending in second direction 102 .

The second direction 102 is, for example, the <1-100> direction. The first direction 101 is parallel to the second main surface 14 and perpendicular to the second direction 102. The first direction 101 is, for example, a direction including a <11-20> direction component. As shown in FIG. 1, the maximum diameter 111 (diameter) of the second main surface 14 is, for example, 100 mm or more. The maximum diameter 111 may be 150 mm or more, 200 mm or more, or 250 mm or more. The upper limit of the maximum diameter 111 is not particularly limited. The maximum diameter 111 may be, for example, 300 mm or less.

Silicon carbide substrate 10 is made of, for example, silicon carbide single crystal. Silicon carbide substrate 10 contains, for example, n-type impurities such as nitrogen (N). The conductivity type of silicon carbide substrate 10 is, for example, n-type. The first principal surface 11 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. When the first main surface 11 is inclined with respect to the (000-1) plane, the direction of inclination of the first main surface 11 is, for example, the <11-20> direction. The thickness of silicon carbide substrate 10 is, for example, 350 μm or more and 500 μm or less.

As shown in FIG. 2 , silicon carbide epitaxial film 20 is on first main surface 11 of silicon carbide substrate 10 . Silicon carbide epitaxial film 20 is an epitaxial layer. Silicon carbide epitaxial film 20 is in contact with first main surface 11 . Silicon carbide epitaxial film 20 contains n-type impurities such as nitrogen. The conductivity type of silicon carbide epitaxial film 20 is, for example, n-type. The second main surface 14 is a carbon surface or a surface inclined at an off angle θ of 8° or less with respect to the carbon surface. In other words, the second main surface 14 is a (000-1) plane or a plane inclined with respect to the (000-1) plane at an off angle θ of 8° or less. The off direction is, for example, the <11-20> direction. Note that the off direction is not limited to the <11-20> direction. The off direction may be, for example, the <1-100> direction or a direction having a <1-100> direction component and a <11-20> direction component.

The off-angle θ is the angle at which the second main surface 14 is inclined with respect to the (000-1) plane. The off-angle θ is, for example, greater than 0° and less than or equal to 8°. The off-angle θ may be 1° or more, or 2° or more. The off angle may be 7° or less, or 6° or less.

The plane indicated by a broken line in FIG. 2 is, for example, a {0001} plane. The third direction 103 is a direction perpendicular to the {0001} plane. The third direction 103 is, for example, the [000-1] direction. The fourth direction 104 is a direction perpendicular to the third direction 103. The fourth direction 104 is, for example, the <11-20> direction. The fourth direction 104 is, for example, an off direction. The normal direction of the second main surface 14 is the fifth direction 105. The fifth direction is, for example, a direction inclined in the off direction by an off angle θ with respect to the [000-1] direction.

As shown in FIG. 2, silicon carbide epitaxial film 20 includes a first layer 21 and a second layer 22. The first layer is, for example, a buffer layer. The second layer 22 is, for example, a drift layer. The first layer 21 is in contact with the first main surface 11 . First layer 21 is in contact with silicon carbide substrate 10 . The first layer 21 constitutes the third main surface 13. The second layer 22 is on the first layer 21. Second layer 22 constitutes second major surface 14 . The thickness of the first layer 21 is, for example, 0.5 μm or more and 2 μm or less. The thickness of the first layer 21 may be 0.7 μm or more, or 1.0 μm or more. The thickness of the first layer 21 may be 1.8 μm or less, or 1.5 μm or less. The thickness of the second layer 22 is, for example, 5 μm or more and 30 μm or less. The thickness of the second layer 22 may be 7 μm or more, or 10 μm or more. The thickness of the second layer 22 may be 25 μm or less, or 20 μm or less.

Each of the first layer 21 and the second layer 22 contains an n-type impurity such as nitrogen. The concentration of n-type impurities contained in the first layer 21 is, for example, 1×10¹⁷cm^-3More than 1×10¹⁹cm^-3It is as follows. The concentration of n-type impurities contained in the first layer 21 is 3×10¹⁷cm^-3It may be more than 5×10¹⁷cm^-3It may be more than that. The concentration of n-type impurities contained in the first layer 21 is 7×10¹⁸cm^-3It may be less than 5×10¹⁸cm^-3It may be the following. The concentration of n-type impurities contained in the second layer 22 is, for example, 1×10¹⁵cm^-3More than 1×10¹⁶cm^-3It is as follows. The concentration of n-type impurities contained in the second layer 22 is 2×10 ¹⁵cm^-3It may be more than 3×10¹⁵cm^-3It may be more than that. The concentration of n-type impurities contained in the second layer 22 is 9×10¹⁵cm^-3It may be less than 8×10 ¹⁵cm^-3It may be the following.

The concentration of n-type impurities contained in first layer 21 is lower than the concentration of n-type impurities contained in silicon carbide substrate 10 and higher than the concentration of n-type impurities contained in second layer 22. The concentration of n-type impurities is measured by, for example, a mercury probe type CV measuring device. The area of the probe is, for example, 0.005 cm ² .

As shown in FIG. 2, silicon carbide substrate 10 and silicon carbide epitaxial film 20 have basal plane dislocations 1. The basal plane dislocation 1 is exposed, for example, on both the first main surface 11 and the first main surface 12. The basal plane dislocation 1 extends in a direction parallel to the {0001} plane. The basal plane dislocation 1 includes, for example, a first basal plane dislocation 25, a second basal plane dislocation 26, and a third basal plane dislocation 27. Silicon carbide epitaxial film 20 has, for example, second basal plane dislocations 26, third basal plane dislocations 27, and threading edge dislocations 2. The third basal plane dislocation 27 and the threading edge dislocation 2 are exposed on the second main surface 14. The threading edge dislocation 2 includes, for example, a first threading edge dislocation 35 and a second threading edge dislocation 36. The first threading edge dislocation 35 is a dislocation formed by converting the first basal plane dislocation 25. Similarly, the second threading edge dislocation 36 is a dislocation formed by converting the second basal plane dislocation 26. The threading edge dislocation 2 extends along a third direction 103 that is substantially perpendicular to {0001}.

If basal plane dislocations 1 exist in silicon carbide epitaxial substrate 100, the reliability of a gate insulating film formed on silicon carbide epitaxial substrate 100, for example, deteriorates. On the other hand, even if the threading edge dislocations 2 exist in the silicon carbide epitaxial substrate, they hardly affect the reliability of the gate insulating film formed on the silicon carbide epitaxial substrate. Therefore, it is desirable to reduce the number of basal plane dislocations 1 in silicon carbide epitaxial film 20 by converting basal plane dislocations 1 existing in silicon carbide substrate 10 into threading edge dislocations 2.

In silicon carbide epitaxial substrate 100 according to this embodiment, first main surface 12 of silicon carbide substrate 10 has basal plane dislocations 1 having a first areal density. The second main surface 14 of the silicon carbide epitaxial film 20 has basal plane dislocations 1 having a second surface density lower than the first surface density. The value obtained by dividing the second areal density by the first areal density is 1/1000 or less. In other words, the conversion ratio (conversion rate) from basal plane dislocation 1 to threading edge dislocation 2 is 99.9% or more. The value obtained by dividing the second areal density by the first areal density may be, for example, 1/2000 or less. In other words, the conversion ratio (conversion rate) from basal plane dislocation 1 to threading edge dislocation 2 is 99.95% or more.

The second surface density is, for example, 10 cm ⁻² or less. The second areal density may be, for example, 6 cm ^-2 or less, or 2 cm ^-2 or less. In silicon carbide epitaxial film 20, the areal density of basal plane dislocations is low, but the areal density of threading edge dislocations is high. The areal density of threading edge dislocations on second main surface 14 of silicon carbide epitaxial film 20 may be higher than, for example, 3990 cm ⁻² . Although the lower limit of the first areal density is not particularly limited, the first areal density may be, for example, 2000 cm ^-2 or more, or 2500 cm ^-2 or more. Although the upper limit of the first areal density is not particularly limited, the first areal density may be, for example, 6000 cm ^-2 or less, or 5500 cm ^-2 or less.

(Method for measuring surface density of basal plane dislocations)
Next, a method for measuring the areal density of basal plane dislocations will be explained. For observation of basal plane dislocations, for example, a photoluminescence imaging device (model number: PLIS-100) manufactured by Photon Design Co., Ltd. is used. When a region to be measured of a silicon carbide epitaxial substrate is irradiated with excitation light, photoluminescence light is observed from the region to be measured. For example, a mercury-xenon lamp is used as the excitation light source. The excitation light from the light source passes through a 313 nm bandpass filter and is then irradiated onto the region to be measured. The photoluminescence light passes through a low-pass filter of, for example, 750 nm, and then reaches a light receiving element such as a camera. As described above, a photoluminescence image of the measurement area is taken. The measurement temperature is room temperature.

For example, while moving the silicon carbide epitaxial substrate in a direction parallel to the main surface (specifically, second main surface 14 or first main surface 12) of the silicon carbide epitaxial substrate, a photoluminescence image of the main surface is taken. . Thereby, the photoluminescence image in the entire area of the main surface is mapped. Basal plane dislocations are identified in the acquired photoluminescence image, and the total number of the basal plane dislocations is calculated. The areal density of basal plane dislocations is calculated by dividing the total number of basal plane dislocations by the total measured area.

In silicon carbide epitaxial substrate 100 according to this embodiment, first main surface 12 is a (0001) plane or a plane inclined at an off angle of 8° or less with respect to the (0001) plane. The areal density of basal plane dislocations on the first main surface 12 may be calculated by, for example, counting pits generated using a potassium hydroxide (KOH) melt. Specifically, the first main surface 12 is etched using a KOH melt. The temperature of the KOH melt is, for example, approximately 500°C or higher and 550°C or lower. The etching time is, for example, approximately 5 minutes or more and 10 minutes or less. After etching, the first main surface 12 is observed using a Normalski differential interference microscope. Basal plane dislocations are etched by the KOH melt to form pits. The areal density of basal plane dislocations is calculated by dividing the total number of pits by the total measured area. Note that threading edge dislocations also form pits in the same way as basal plane dislocations. Pits originating from threading edge dislocations and pits originating from basal plane dislocations are distinguished as follows. The rounded hexagonal pits originate from threading edge dislocations, and the elliptical pits originate from basal plane dislocations.

(Silicon carbide epitaxial substrate manufacturing equipment)
Next, the configuration of manufacturing apparatus 200 for silicon carbide epitaxial substrate 100 according to this embodiment will be described.

As shown in FIG. 3, a manufacturing apparatus 200 for silicon carbide epitaxial substrate 100 is, for example, a hot-wall horizontal CVD (Chemical Vapor Deposition) apparatus. The manufacturing apparatus 200 mainly includes a reaction chamber 201, a heating element 203, a quartz tube 204, a heat insulator 205, and an induction heating coil 206.

The heating element 203 has a cylindrical shape, for example, and has a reaction chamber 201 formed therein. The heating element 203 is made of graphite, for example. The heat insulating material 205 surrounds the outer periphery of the heating element 203. The heat insulating material 205 is provided inside the quartz tube 204 so as to be in contact with the inner peripheral surface of the quartz tube 204 . The induction heating coil 206 is wound, for example, along the outer peripheral surface of the quartz tube 204. The induction heating coil 206 is configured to be able to be supplied with alternating current from an external power source (not shown). Thereby, the heating element 203 is heated by induction. As a result, reaction chamber 201 is heated by heating element 203 .

The reaction chamber 201 is a space surrounded by a heating element 203. Silicon carbide substrate 10 is arranged within reaction chamber 201 . Reaction chamber 201 is configured to be able to heat silicon carbide substrate 10 . Reaction chamber 201 is provided with susceptor 210 that holds silicon carbide substrate 10 . The susceptor 210 is configured to be rotatable around a rotation axis 212.

The manufacturing apparatus 200 has a gas inlet 207 and a gas exhaust port 208. Gas exhaust port 208 is connected to an exhaust pump (not shown). Arrows in FIG. 6 indicate gas flows. Gas is introduced into the reaction chamber 201 through the gas inlet 207 and exhausted through the gas exhaust port 208 . The pressure within the reaction chamber 201 is adjusted by balancing the amount of gas supplied and the amount of gas exhausted.

The manufacturing apparatus 200 includes a gas supply section (not shown) configured to be able to supply a mixed gas containing, for example, silane, ammonia, hydrogen, and propane to the reaction chamber 201. Specifically, the gas supply unit may include a gas cylinder capable of supplying propane gas, a gas cylinder capable of supplying hydrogen gas, a gas cylinder capable of supplying silane gas, and a gas cylinder capable of supplying ammonia gas. good.

The winding density of the induction heating coil 206 may be changed in the axial direction of the reaction chamber 201. The winding density [turns/m] is the number of turns of the coil per unit length in the axial direction of the device. For example, the winding density of the upstream induction heating coil 206 may be higher than the winding density of the downstream induction heating coil 206 to effectively pyrolyze ammonia upstream.

(Method for manufacturing silicon carbide epitaxial substrate)
Next, a method for manufacturing a silicon carbide epitaxial substrate according to this embodiment will be described.

First, a silicon carbide single crystal substrate preparation step (S11: FIG. 4) is performed. For example, a silicon carbide single crystal of polytype 4H is produced by a sublimation method. Next, silicon carbide substrate 10 is prepared by slicing the silicon carbide single crystal using, for example, a wire saw. Silicon carbide substrate 10 contains, for example, n-type impurities such as nitrogen. The conductivity type of silicon carbide substrate 10 is, for example, n-type.

As shown in FIG. 5 , silicon carbide substrate 10 has a first main surface 11 and a first main surface 12 on the opposite side of first main surface 11 . The first principal surface 11 is, for example, a surface inclined in the off direction by an off angle θ with respect to the (000-1) plane. The off direction is, for example, the <11-20> direction. The maximum diameter of first main surface 11 of silicon carbide substrate 10 is, for example, 100 mm or more. For example, a plurality of basal plane dislocations 1 exist in silicon carbide substrate 10 . The basal plane dislocation 1 extends in a direction parallel to the {0001} plane. The basal plane dislocation 1 includes, for example, a first basal plane dislocation 25, a second basal plane dislocation 26, and a third basal plane dislocation 27.

Next, silicon carbide substrate 10 is placed on susceptor 210 in reaction chamber 201 (see FIG. 3). Silicon carbide substrate 10 is placed in reaction chamber 201 under atmospheric pressure (time T0). Next, the pressure inside the reaction chamber 201 is reduced. As shown in FIG. 7, from time T1 to time T2, the pressure inside reaction chamber 201 is reduced from atmospheric pressure to about 1×10 ⁻⁴ Pa.

Next, a temperature raising step is performed. From time T2 to time T3, the temperature of silicon carbide substrate 10 rises from room temperature to about 1100° C. while the pressure inside reaction chamber 201 is about 1×10 ⁻⁴ Pa. Next, from time T3 to time T4, the temperature of silicon carbide substrate 10 is maintained at 1100° C. for a certain period of time. From time T4 to time T5, the temperature of silicon carbide substrate 10 increases from 1100°C to 1630°C. At time T4, hydrogen (H ₂ ) gas is introduced into the reaction chamber 201. The flow rate of hydrogen gas is, for example, 100 slm. The pressure inside the reaction chamber 201 is, for example, about 10 kPa. As a result, a hydrogen etching process is performed. From time T5 to time T6, the surface of silicon carbide substrate 10 is etched with hydrogen gas while the temperature of silicon carbide substrate 10 is maintained at 1630°C.

Next, a buffer layer forming step (S12: FIG. 4) is performed. Specifically, a raw material gas, a dopant gas, and a carrier gas are supplied to the reaction chamber 201. For example, a mixed gas containing silane (SiH ₄ ), propane (C ₃ H ₈ ), ammonia (NH ₃ ), and hydrogen is supplied to the reaction chamber 201 . As shown in FIG. 7, silicon carbide substrate 10 is maintained at about 1630° C. from time T6 to time T7. In reaction chamber 201, each gas is thermally decomposed to form buffer layer 21 on silicon carbide substrate 10 (see FIG. 6). In the process of forming the buffer layer 21, the susceptor 210 may be rotating around the rotation axis 212. Silicon carbide substrate 10 may revolve around rotation axis 212 (see FIG. 3).

In the step of forming the buffer layer, the flow rates of silane and propane are adjusted so that the growth rate is, for example, 5 μm/h. Specifically, the flow rate of silane gas is adjusted to, for example, 46 sccm. The flow rate of propane gas is adjusted to, for example, 29 sccm. The flow rate of ammonia gas is adjusted to, for example, 1.5 sccm. The flow rate of hydrogen gas is adjusted to 100 slm. The thickness of the buffer layer 21 is, for example, 1 μm. The pressure in the reaction chamber 201 is, for example, 10 kPa. The C/Si ratio is, for example, 1.9.

As shown in FIG. 6, some of the plurality of basal plane dislocations 1 existing in silicon carbide substrate 10 are converted to threading edge dislocations. For example, the first basal plane dislocation 25 is converted to the first threading edge dislocation 35. For example, the second basal plane dislocation 26 and the third basal plane dislocation 27 are not converted into threading edge dislocations, but propagate within the buffer layer 21 as basal plane dislocations.

Next, a drift layer forming step (S13: FIG. 4) is performed. Specifically, a mixed gas containing silane, propane, ammonia, and hydrogen is supplied to the reaction chamber 201. Silicon carbide substrate 10 is maintained at 1630° C. from time point T6 to time point T7. In the reaction chamber 201, each gas is thermally decomposed, and a drift layer 22 is formed on the buffer layer 21 (see FIG. 2). In the process of forming the drift layer 22, the susceptor 210 may be rotating around the rotation axis 212. Silicon carbide substrate 10 may revolve around rotation axis 212 (see FIG. 3).

In the step of forming the drift layer, the flow rates of silane and propane are adjusted so that the growth rate is, for example, 25 μm/h. Specifically, the flow rate of silane gas is adjusted to, for example, 115 sccm. The flow rate of propane gas is adjusted to, for example, 57.6 sccm. The flow rate of ammonia gas is adjusted to, for example, 2.5×10 ⁻² sccm. The flow rate of hydrogen gas is adjusted to 100 slm. The thickness of the drift layer 22 is, for example, 10 μm. The pressure in the reaction chamber 201 is, for example, 10 kPa. The C/Si ratio is, for example, 1.5. As described above, by increasing the growth rate of the drift layer 22 of the silicon carbide epitaxial film to about 25 μm/h, the conversion ratio (conversion rate) of basal plane dislocations to threading edge dislocations can be improved.

Next, a cooling step is performed. As shown in FIG. 7, the temperature of silicon carbide substrate 10 is reduced from 1630° C. to room temperature from time T8 to time T9. At time T9, the supply of hydrogen introduced into the reaction chamber 201 is stopped, and the pressure in the reaction chamber 201 returns to atmospheric pressure. As described above, silicon carbide epitaxial substrate 100 is manufactured.

(Method for manufacturing silicon carbide semiconductor device)
Next, a method for manufacturing silicon carbide semiconductor device 300 according to this embodiment will be described.

The method for manufacturing a silicon carbide semiconductor device according to this embodiment mainly includes an epitaxial substrate preparation step (S10: FIG. 8) and a substrate processing step (S20: FIG. 8).

First, an epitaxial substrate preparation step (S10: FIG. 8) is performed. Specifically, silicon carbide epitaxial substrate 100 is prepared by the method for manufacturing a silicon carbide epitaxial substrate described above (see FIG. 2).

Next, a substrate processing step (S20: FIG. 8) is performed. Specifically, a silicon carbide semiconductor device is manufactured by processing a silicon carbide epitaxial substrate. "Processing" includes various processing such as ion implantation, heat treatment, etching, oxide film formation, electrode formation, and dicing. That is, the substrate processing step may include at least one of ion implantation, heat treatment, etching, oxide film formation, electrode formation, and dicing.

Below, a method for manufacturing a MOSFET as an example of a silicon carbide semiconductor device will be described. The substrate processing step (S20: FIG. 8) includes, for example, an ion implantation step (S21: FIG. 8), an oxide film formation step (S22: FIG. 8), an electrode formation step (S23: FIG. 8), and a dicing step (S24: FIG. 8). )including.

First, an ion implantation step (S21: FIG. 8) is performed. A p-type impurity such as aluminum (Al) is implanted into the second main surface 14 on which a mask (not shown) having an opening is formed. As a result, body region 132 having p-type conductivity is formed. Next, an n-type impurity such as phosphorus (P) is implanted into a predetermined position within body region 132. As a result, a source region 133 having an n-type conductivity type is formed. Next, a p-type impurity such as aluminum is implanted into a predetermined position within the source region 133. As a result, a contact region 134 having a p-type conductivity type is formed (see FIG. 9).

In second layer 22 of silicon carbide epitaxial film 20 , a portion other than body region 132 , source region 133 , and contact region 134 becomes drift region 131 . Source region 133 is separated from drift region 131 by body region 132 . Ion implantation may be performed by heating silicon carbide epitaxial substrate 100 to about 300° C. or higher and 600° C. or lower. After the ion implantation, activation annealing is performed on silicon carbide epitaxial substrate 100. The activation annealing activates the impurity implanted into the silicon carbide epitaxial film 20 and generates carriers in each region. The activation annealing atmosphere is, for example, an argon (Ar) atmosphere. The activation annealing temperature is, for example, about 1800°C. The activation annealing time is, for example, about 30 minutes.

Next, an oxide film forming step (S22: FIG. 8) is performed. For example, by heating silicon carbide epitaxial substrate 100 in an atmosphere containing oxygen, oxide film 136 is formed on second main surface 14 (see FIG. 10). The oxide film 136 is made of, for example, silicon dioxide. The oxide film 136 functions as a gate insulating film. The temperature of the thermal oxidation treatment is, for example, about 1300°C. The time for the thermal oxidation treatment is, for example, about 30 minutes.

After the oxide film 136 is formed, heat treatment may be further performed in a nitrogen atmosphere. For example, heat treatment is performed at about 1100° C. for about 1 hour in an atmosphere of nitrogen monoxide. Further thereafter, heat treatment is performed in an argon atmosphere. For example, heat treatment is performed in an argon atmosphere at about 1100° C. or more and 1500° C. or less for about 1 hour.

Next, an electrode forming step (S23: FIG. 8) is performed. Specifically, gate electrode 141 is formed on oxide film 136. Gate electrode 141 is formed, for example, by a CVD method. The gate electrode 141 is made of, for example, polysilicon or the like having conductivity. Gate electrode 141 is formed at a position facing source region 133 and body region 132.

Next, an interlayer insulating film 137 covering the gate electrode 141 is formed. Interlayer insulating film 137 is formed, for example, by a CVD method. The interlayer insulating film 137 is made of, for example, silicon dioxide. Interlayer insulating film 137 is formed so as to be in contact with gate electrode 141 and oxide film 136 . Next, a portion of the oxide film 136 and the interlayer insulating film 137 are removed by etching. As a result, source region 133 and contact region 134 are exposed from oxide film 136.

Next, the source electrode 142 is formed on the exposed portion by, for example, sputtering. The source electrode 142 is made of, for example, titanium, aluminum, silicon, or the like. After source electrode 142 is formed, source electrode 142 and silicon carbide epitaxial substrate 100 are heated, for example, at a temperature of approximately 900° C. or higher and 1100° C. or lower. Thereby, source electrode 142 and silicon carbide epitaxial substrate 100 come into ohmic contact. Next, a wiring layer 138 is formed so as to be in contact with the source electrode 142. The wiring layer 138 is made of a material containing aluminum, for example. Next, a drain electrode 143 is formed on the third main surface 13. Drain electrode 143 is made of, for example, an alloy containing nickel and silicon (eg, NiSi, etc.).

Next, a dicing step (S24: FIG. 8) is performed. For example, by dicing silicon carbide epitaxial substrate 100 along dicing lines, silicon carbide epitaxial substrate 100 is divided into a plurality of semiconductor chips. Through the above steps, silicon carbide semiconductor device 300 is manufactured (see FIG. 11).

Note that although the method for manufacturing a silicon carbide semiconductor device according to the present disclosure has been described above by exemplifying a MOSFET, the method for manufacturing a silicon carbide semiconductor device according to the present disclosure is not limited thereto. The manufacturing method according to the present disclosure is applicable to silicon carbide such as IGBT (Insulated Gate Bipolar Transistor), SBD (Schottky Barrier Diode), thyristor, GTO (Gate Turn Off thyristor), PiN diode, etc. It is applicable to elementary semiconductor devices.

Next, the effects of the method for manufacturing a silicon carbide epitaxial substrate and a silicon carbide semiconductor device according to this embodiment will be described.

If basal plane dislocations 1 exist in silicon carbide epitaxial substrate 100, basal plane dislocations 1 may expand and become stacking faults when electricity is applied. In that case, for example, the gate insulating film formed on silicon carbide epitaxial substrate 100 may be damaged, causing a decrease in the withstand voltage of silicon carbide semiconductor device 300. As a result, the reliability of silicon carbide semiconductor device 300 may decrease. On the other hand, even if threading edge dislocations 2 exist in silicon carbide epitaxial substrate 100, they hardly affect the reliability of silicon carbide semiconductor device 300. Therefore, in order to improve the reliability of silicon carbide semiconductor device 300, it is desirable to reduce the number of basal plane dislocations 1 by converting basal plane dislocations 1 to threading edge dislocations 2. Furthermore, it has been difficult to reduce basal plane dislocations 1 on the carbon surface compared to the silicon surface.

According to silicon carbide epitaxial substrate 100 according to the present embodiment, the areal density of basal plane dislocations 1 on second main surface 14 (second areal density) is changed from the areal density of basal plane dislocations 1 on first main surface 12 (second areal density) to The value divided by 1 area density) is 1/1000 or less. Further, the second main surface 14 is a carbon surface or a surface inclined at an off angle of 8° or less with respect to the carbon surface. That is, according to the silicon carbide epitaxial substrate 100 according to the present embodiment, by converting most of the basal plane dislocations 1 in the silicon carbide substrate 10 to threading dislocations, the basal plane on the second main surface 14 of the silicon carbide epitaxial film 20 Dislocation 1 can be reduced. Therefore, the reliability of silicon carbide semiconductor device 300 including silicon carbide epitaxial substrate 100 having second main surface 14 inclined at an off angle of 8° or less with respect to the carbon surface or the carbon surface can be improved.

Next, examples will be described. First, silicon carbide substrates according to Samples 1 and 2 were prepared. The basal plane dislocation (BPD) on the main surface of the silicon carbide substrates of Samples 1 and 2 was 4000 cm ⁻² . The maximum diameter of the main surface of the silicon carbide substrates of Samples 1 and 2 was 150 mm. Next, silicon carbide epitaxial films were grown on the silicon carbide substrates of Samples 1 and 2.

A silicon carbide epitaxial film was formed on the silicon carbide substrate according to Sample 1 using the method for manufacturing a silicon carbide epitaxial substrate according to the present embodiment. That is, a silicon carbide epitaxial film was formed on the silicon carbide substrate according to Sample 1 using the temperature profile shown in FIG. Specifically, the growth rate of the buffer layer was set to 5 μm/h. The growth rate of the drift layer was 25 μm/h. The thickness of the buffer layer was 1 μm. The carrier concentration of the buffer layer was set to 1×10 ¹⁸ cm ⁻³ . The thickness of the drift layer was 10 μm. The carrier concentration of the drift layer was set to 7×10 ¹⁵ cm ⁻³ .

A silicon carbide epitaxial film was formed on the silicon carbide substrate of Sample 2 using the temperature profile shown in FIG. Specifically, the growth rate of the buffer layer was set to 5 μm/h. The growth rate of the drift layer was 10 μm/h. The thickness of the buffer layer was 1 μm. The carrier concentration of the buffer layer was set to 1×10 ¹⁸ cm ⁻³ . The thickness of the drift layer was 10 μm. The carrier concentration of the drift layer was set to 7×10 ¹⁵ cm ⁻³ .

The method for manufacturing the silicon carbide substrate according to Sample 2 differs from the method for manufacturing the silicon carbide substrate according to Sample 1 in the drift layer forming step, and is the same as the method for manufacturing the silicon carbide substrate according to Sample 1 in other steps. be. In the step of forming a drift layer on a silicon carbide substrate according to Sample 2, the flow rate of silane gas was adjusted to, for example, 69 sccm. The flow rate of propane gas was adjusted to, for example, 43.5 sccm. The flow rate of ammonia gas was adjusted to, for example, 1.0×10 ⁻² sccm. The C/Si ratio was 1.9.

As described above, silicon carbide epitaxial substrates according to Samples 1 and 2 were manufactured. Next, the areal densities of basal plane dislocations on the first main surface 12 and the second main surface 14 of the silicon carbide epitaxial substrates of Samples 1 and 2 were measured. The areal density of basal plane dislocations was measured using the measurement method described above.

Table 1 shows the surface density of basal plane dislocations (BPD) on the first main surface 12 of the silicon carbide substrate (first surface density) and the surface density of basal plane dislocations (BPD) on the second main surface 14 of the silicon carbide epitaxial film. It shows the density (second surface density), the value obtained by dividing the second surface density by the first surface density, and the conversion rate from basal plane dislocations to threading edge dislocations. As shown in Table 1, the value obtained by dividing the areal density of basal plane dislocations on the second main surface 14 of the silicon carbide substrate epitaxial substrates according to Samples 1 and 2 by the areal density of basal plane dislocations on the first main surface 12. were 0.0005 and 0.01045, respectively. Further, in the silicon carbide epitaxial substrates of Samples 1 and 2, the conversion rates obtained by subtracting the second areal density from the first areal density divided by the first areal density are 99.95% and 98%, respectively. It was .955%.

From the above results, when manufacturing a silicon carbide epitaxial substrate using the manufacturing conditions shown in FIG. It was confirmed that it is possible to increase the rate of conversion to , and as a result, reduce the areal density of basal plane dislocations in the silicon carbide epitaxial film.

The embodiments disclosed herein are illustrative in all respects and should not be considered restrictive. The scope of the present invention is indicated by the claims rather than the embodiments described above, and it is intended that equivalent meanings to the claims and all changes within the scope are included.

1 basal plane dislocation, 2 threading edge dislocation, 10 silicon carbide substrate, 11 first main surface, 12 first main surface, 13 third main surface, 14 second main surface, 16 first flat, 20 silicon carbide epitaxial film , 21 first layer (buffer layer), 22 second layer (drift layer), 25 first basal plane dislocation, 26 second basal plane dislocation, 27 third basal plane dislocation, 35 first threading edge dislocation, 36th 2 threading edge dislocation, 100 silicon carbide epitaxial substrate, 101 first direction, 102 second direction, 103 third direction, 104 fourth direction, 105 fifth direction, 111 maximum diameter, 131 drift region, 132 body region, 133 source region, 134 contact region, 136 oxide film, 137 interlayer insulating film, 138 wiring layer, 141 gate electrode, 142 source electrode, 143 drain electrode, 200 manufacturing equipment, 201 reaction chamber, 203 heating element, 204 quartz tube, 205 heat insulation material, 206 induction heating coil, 207 gas inlet, 208 gas exhaust port, 210 susceptor, 212 rotating shaft, 300 silicon carbide semiconductor device.

Claims (4)

a silicon carbide substrate;
a silicon carbide epitaxial film on the silicon carbide substrate,
The polytype of the silicon carbide substrate and the silicon carbide epitaxial film is 4H,
The silicon carbide epitaxial film includes a first layer in contact with the silicon carbide substrate, and a second layer on the first layer and forming a main surface of the silicon carbide epitaxial film,
The silicon carbide substrate, the first layer, and the second layer contain n-type impurities,
No p-type impurity is ion-implanted into the first layer,
The concentration of n-type impurities contained in the first layer is lower than the concentration of n-type impurities contained in the silicon carbide substrate, and higher than the concentration of n-type impurities contained in the second layer,
The main surface of the silicon carbide substrate has basal plane dislocations having a first surface density,
The main surface of the silicon carbide epitaxial film has basal plane dislocations having a second surface density lower than the first surface density,
The silicon carbide epitaxial film includes threading edge dislocations formed by conversion of basal plane dislocations,
The value obtained by dividing the second areal density by the first areal density is 1/1000 or less,
The main surface of the silicon carbide epitaxial film is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane,
The maximum diameter of the main surface of the silicon carbide epitaxial film is 150 mm or more,
The thickness of the first layer is 0.5 μm or more and 2 μm or less,
The thickness of the second layer is 5 μm or more and 30 μm or less,
The concentration of n-type impurities contained in the first layer is 1×10 ¹⁷ cm ⁻³ or more and 1×10 ¹⁹ cm ⁻³ or less,
A silicon carbide epitaxial substrate, wherein the second layer has an n-type impurity concentration of 1×10 ¹⁵ cm ⁻³ or more and 1×10 ¹⁶ cm ⁻³ or less. The silicon carbide epitaxial substrate according to claim 1, wherein a value obtained by dividing the second areal density by the first areal density is 1/2000 or less. The silicon carbide epitaxial substrate according to claim 1 or 2 , wherein the surface density of the threading edge dislocations on the main surface of the silicon carbide epitaxial film is higher than 3990 cm ^-2 . A step of preparing a silicon carbide epitaxial substrate according to any one of claims 1 to 3;
A method for manufacturing a silicon carbide semiconductor device, comprising the step of processing the silicon carbide epitaxial substrate.

Images