JP7414348B1 - Semiconductor devices, receiving modules, receivers - Google Patents

Abstract

The present invention aims to further reduce the size and cost of a receiver used in wireless power transmission. SOLUTION: A semiconductor device includes a semiconductor chip and a semiconductor package. The semiconductor chip includes a first rectifier circuit, a second rectifier circuit provided in a direction substantially perpendicular to the first rectifier circuit, a first bonding pad connected to the first rectifier circuit, and a second rectifier circuit connected to the second rectifier circuit. A bonding pad is provided. The semiconductor package includes a first pad connected to the first bonding pad by a first bonding wire, and a second pad connected to the second bonding pad by a second bonding wire. [Selection diagram] Figure 3

Description

The present disclosure relates to a semiconductor device, a receiving module, and a receiver.

In recent years, wireless power transfer (WPT) has been used in various fields. By utilizing WPT, problems such as wiring burden, breakage, and maintenance can be avoided compared to the case of wired power transmission.

Patent Document 1 proposes a technique for suppressing a reduction in the power reception level and deterioration in transmission efficiency when receiving linearly polarized or circularly polarized radio waves.

JP2022-024292A

The antenna element section of the power receiving antenna device described in Patent Document 1 includes a first polarization dipole antenna and a second polarization dipole antenna. The first polarization dipole antenna and the second polarization dipole antenna are arranged at 90 degrees orthogonal to each other, and receive radio waves with orthogonal polarization planes. The first AC voltage received and output by the first polarized dipole antenna is converted into a first DC voltage by the first rectifier. The second AC voltage received and output by the second polarized dipole antenna is converted into a second DC voltage by the second rectifier.

Although Patent Document 1 describes suppressing deterioration of transmission efficiency, it does not mention miniaturization or cost reduction of the power receiving antenna device.

An object of the present disclosure is to further reduce the size and cost of a receiver used in wireless power transmission.

A semiconductor device includes a semiconductor chip and a semiconductor package. The semiconductor chip includes a first rectifier circuit, a second rectifier circuit provided in a direction substantially perpendicular to the first rectifier circuit, a first bonding pad connected to the first rectifier circuit, and a second rectifier circuit connected to the second rectifier circuit. A bonding pad is provided. The semiconductor package includes a first pad connected to the first bonding pad by a first bonding wire, and a second pad connected to the second bonding pad by a second bonding wire.

According to the present disclosure, it is possible to further reduce the size and cost of a receiver used in wireless power transmission.

1 is a diagram showing the overall configuration of a WPT system 1 according to the present embodiment. 2 is a block diagram illustrating a configuration example of a transmitter 100 and a receiver 200 illustrated in FIG. 1. FIG. 2 is a schematic diagram showing an example of the internal configuration of a semiconductor device 210. FIG. 4 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 3. FIG. 3 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. FIG. 6 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 5. FIG. 3 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. FIG. 8 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 7. FIG. 3 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. FIG. 10 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 9. FIG. 3 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. FIG. 12 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 11. FIG. 3 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. FIG. 14 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 13. FIG. 3 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. FIG. 2 is a block diagram showing the basic hardware configuration of a computer 90. FIG.

Embodiments of the present disclosure will be described below with reference to the drawings. In all the figures explaining the embodiments, common components are given the same reference numerals and repeated explanations will be omitted. Note that the following embodiments do not unduly limit the content of the present disclosure described in the claims. Furthermore, not all components shown in the embodiments are essential components of the present disclosure. Furthermore, each figure is a schematic diagram and is not necessarily strictly illustrated.

<Summary>
In a WPT system, a transmitter that wirelessly supplies power and a receiver that receives the wirelessly transmitted power are installed. The receiver has an antenna for receiving radio waves and a rectifier circuit for rectifying the received radio waves. In this embodiment, two rectifier circuits are formed in one semiconductor device, and a pair of antennas (for example, a linearly polarized antenna) can be connected to the rectifier circuit. A semiconductor device has an internal circuit configured such that connected antennas are orthogonal to each other. Specifically, for example, at least two rectifier circuits are formed so as to be orthogonal to each other within the semiconductor device. Then, by forming simple wiring from each rectifier circuit to a connection terminal provided on the semiconductor device, the directions of the connection terminals connected to the rectifier circuits are orthogonal to each other.

Further, for example, at least two rectifier circuits are formed in a semiconductor chip in a semiconductor device, and bonding pads in the semiconductor chip connected to the rectifier circuits are connected to pads formed in a semiconductor package using bonding wires. At this time, bonding pads within the semiconductor chip and pads within the semiconductor package are selected so that the bonding wires associated with each rectifier circuit are substantially perpendicular to each other. As a result, the directions of the connection terminals connected to the rectifier circuit are orthogonal, and the antennas connected to the semiconductor device are orthogonal.

<1 Configuration diagram of the entire system>
FIG. 1 is a diagram showing the overall configuration of a WPT system 1 according to this embodiment.

The WPT system 1 shown in FIG. 1 includes, for example, a transmitter 100, a receiver 200, a first information processing device 300, and a second information processing device 400. The WPT system 1 shown in FIG. 1 is used, for example, in a building or a factory. Note that the connection between the transmitter 100 and the first information processing device 300 and the connection between the first information processing device 300 and the second information processing device 400 may be wired or wireless.

Although FIG. 1 shows an example in which the WPT system 1 includes three transmitters 100, the number of transmitters 100 included in the WPT system 1 is not limited to three. The number of transmitters 100 included in the WPT system 1 may be two or less, or may be four or more.

Although FIG. 1 shows an example in which the WPT system 1 includes seven receivers 200, the number of receivers 200 included in the WPT system 1 is not limited to seven. The number of receivers 200 included in the WPT system 1 may be six or less, or may be eight or more.

Note that in this specification, the transmitter 100 is a (power) transmitter 100 in the sense of wirelessly transmitting power, and similarly, the receiver 200 is a (power) transmitter in the sense of wirelessly receiving power. This is a receiver 200. As described later, the receiver 200 transmits, for example, information regarding the state of the receiver 200 or information regarding the measurement result by the sensor to the transmitter 100 as a data signal, and the transmitter 100 receives such a data signal. There is. In this case, transmitter 100 is a receiver that receives data signals, and receiver 200 functions as a transmitter that transmits data signals.

Although FIG. 1 shows an example in which the WPT system 1 includes two first information processing devices 300, the number of first information processing devices 300 included in the WPT system 1 is not limited to two. The number of first information processing devices 300 included in the WPT system 1 may be one, or three or more.

The transmitter 100 transmits, for example, a power supply signal or a data signal to the receiver 200. The transmitter 100 transmits a power supply signal to the receiver 200 using, for example, a 920 MHz band radio wave. The transmitter 100 transmits a data signal to the receiver 200 using, for example, a 2.4 GHz band radio wave. The transmitter 100 may transmit the data signal using radio waves in the 920 MHz band.

For example, the transmitter 100 may feed power to one receiver 200 or may feed power to a plurality of receivers 200. For example, the transmitter 100 may transmit a data signal to one receiver 200 or may transmit data signals to a plurality of receivers 200. For example, the transmitter 100 may transmit the same data signal as the other transmitters 100, or may transmit a different data signal from the other transmitters 100. For example, the transmitter 100 may transmit a predetermined command signal as a data signal to the receiver 200, or may transmit a preset signal as a data signal to the receiver 200.

Transmitter 100 receives a data signal transmitted from receiver 200, for example. The transmitter 100 may receive a data signal transmitted from one receiver 200, or may receive data signals transmitted from a plurality of receivers 200, for example. The transmitter 100 transmits the data signal transmitted from the receiver 200 to the first information processing device 300. The transmitter 100 transmits information regarding the state of the transmitter 100 to the first information processing device 300.

The receiver 200 receives, for example, a power supply signal or a data signal transmitted from the transmitter 100. For example, when receiver 200 has a power storage unit, it converts the power supply signal transmitted from transmitter 100 into electric power, and stores the converted power in the power storage unit. For example, when the receiver 200 has a predetermined sensor, the receiver 200 converts the power supply signal transmitted from the transmitter 100 into electric power, and drives the sensor with the converted electric power.

The receiver 200 transmits, for example, information regarding the state of the receiver 200 or information regarding the measurement result by the sensor to the transmitter 100 as a data signal.

The first information processing device 300 is an information processing device that monitors the operations of the transmitter 100 and receiver 200 accommodated in the WPT system 1. For example, the first information processing device 300 determines whether the transmitter 100 or the receiver 200 is in a preset state based on information regarding the states of the transmitter 100 and the receiver 200 transmitted from the transmitter 100. Determine whether or not there is. If it is determined that the preset state is reached, the first information processing device 300 transmits predetermined information to the second information processing device 400.

The first information processing device 300 also accumulates information about the transmitter 100 and receiver 200 accommodated in the WPT system 1. For example, the first information processing device 300 stores information regarding the status of the transmitter 100 and the receiver 200, which is transmitted from the transmitter 100, in a storage unit provided in the first information processing device 300.

Further, the first information processing device 300 controls the operation of the transmitter 100 accommodated in the WPT system 1. For example, the first information processing device 300 transmits a predetermined instruction or information to the transmitter 100.

Further, the first information processing device 300 controls the operation of the second information processing device 400.

The second information processing device 400 is, for example, an information processing device operated by an administrator of the WPT system 1. When the second information processing device 400 receives notification from the first information processing device 300 that the transmitter 100, the receiver 200, or both of them housed in the WPT system 1 are in a predetermined state, the second information processing device 400 starts transmitting data. It is presented to the user that the device 100, the receiver 200, or both are in a predetermined state.

Further, the second information processing device 400 analyzes information regarding the status of the transmitter 100 and the receiver 200, which is stored in the first information processing device 300, and presents predetermined information to the user. For example, the predetermined information is as follows.
・Information regarding the arrangement of the transmitter 100 ・Information regarding the arrangement of the receiver 200 ・Information regarding the power consumption ・Information regarding the amount of electric power

<1.1 Configuration of transmitter and receiver>
FIG. 2 is a block diagram showing a configuration example of transmitter 100 and receiver 200 shown in FIG. 1. As shown in FIG. 2, the transmitter 100 and the receiver 200 are spaced apart from each other at a predetermined interval, for example. For example, the transmitter 100 and the receiver 200 are installed separated by a distance of about several meters. Specifically, for example, the transmitter 100 is fixedly installed at a high place indoors, for example, at a predetermined high position provided on a ceiling or a wall. The receiver 200 is installed at a predetermined device indoors, or placed near a device that requires power supply. Further, the receiver 200 may be carried by the user. The transmitter 100 transmits a power supply signal to the receiver 200 using radio waves at a predetermined frequency, for example, a 920 MHz band. The receiver 200 converts the power supply signal transmitted from the transmitter 100 into electric power, and either charges the converted electric power or supplies the converted electric power to a predetermined device.

The transmitter 100 includes, for example, an oscillator 101, a transmitting antenna 102, a microcomputer (controller) 103, a data transceiver 104, and a data transmitting/receiving antenna 105. The oscillator 101, the microcomputer 103, the data transceiver 104, the data transceiver antenna 105, or a combination of at least one of these may be mounted on a PCB (printed circuit board), for example.

The oscillator 101 oscillates a signal in a predetermined frequency band, for example, a 920 MHz band. The oscillated signal may be amplified to remove unnecessary frequency components, if necessary.

The transmitting antenna 102 is configured to be able to efficiently transmit radio waves in the 920 MHz band, for example. The transmitting antenna 102 radiates the signal oscillated by the oscillator 101 as a power feeding signal.

Microcomputer 103 controls the operation of transmitter 100. The microcomputer 103 is realized by, for example, a semiconductor element equipped with an ARM processor. The microcomputer 103 controls, for example, the transmission of radio waves by the transmitting antenna 102.

The data transmitter/receiver 104 performs processes such as converting digital data into analog data and modulating analog data. Further, the data transmitter/receiver 104 performs processing such as demodulating the data signal received by the data transmitting/receiving antenna 105 and digitizing the demodulated data. The data transceiver 104 extracts a predetermined signal from the data signal received by the data transmitting/receiving antenna 105, converts it into digital data, and transmits it to the microcomputer 103, for example.

The data transmitting/receiving antenna 105 is configured to be able to efficiently transmit and receive radio waves in the 2.4 GHz band, for example. Data transmitting/receiving antenna 105 radiates a data signal supplied from data transmitting/receiving device 104 . Further, the data transmitting/receiving antenna 105 receives a data signal transmitted from the receiver 200.

The receiver 200 includes, for example, a receiving antenna 201, a rectifier 202, a power management section 203, a power storage section 204, a microcomputer 205, a data transceiver 206, and a data transmitting/receiving antenna 207. The receiving antenna 201, the rectifier 202, the power management unit 203, the power storage unit 204, the microcomputer 205, the data transmitting/receiving device 206, the data transmitting/receiving antenna 207, or a combination of at least one of these may be mounted on, for example, a PCB or an FPC (flexible circuit board). May be implemented.

The receiving antenna 201 is configured to be able to efficiently receive radio waves in the 920 MHz band, for example. The receiving antenna 201 receives the feeding signal radiated from the transmitting antenna 102.

The rectifier 202 rectifies a radio wave received as a power supply signal and converts it into a DC voltage.

Power management unit 203 manages DC voltage. For example, the power management unit 203 controls charging voltage based on DC voltage. Power management unit 203 charges power storage unit 204 by controlling the charging voltage. Further, for example, when power storage unit 204 stores power of a predetermined capacity or more, power management unit 203 supplies DC voltage to the connected members.

Furthermore, the power management unit 203 causes the power storage unit 204 to release the power stored in the power storage unit 204 under control from the microcomputer 205 .

Power storage unit 204 stores power according to instructions from power management unit 203. Power storage unit 204 is realized by, for example, a battery, a capacitor, or the like. Further, the power storage unit 204 releases the stored power in response to an instruction from the power management unit 203.

Microcomputer 205 controls the operation of receiver 200. The microcomputer 205 is driven by the DC voltage supplied from the power management unit 203 or the power stored in the power storage unit 204. Microcomputer 205 controls power management unit 203 to release the power stored in power storage unit 204 .

For example, various sensors can be connected to the receiver 200. For example, a heat sensor, a temperature sensor, a light sensor, a humidity sensor, a vibration sensor, etc. are connected to the receiver 200. The sensor connected to receiver 200 is driven by, for example, a DC voltage supplied from power management unit 203 or electric power released from power storage unit 204. The microcomputer 205 continuously or intermittently monitors the voltage value at a predetermined portion of the receiver 200, the status of a sensor connected to the receiver 200, information detected by the sensor, and the like. The microcomputer 205 transmits the voltage value at a predetermined portion of the receiver 200, the status of the sensor connected to the receiver 200, information detected by the sensor, etc. as digital data to the data transmitter/receiver 206. Note that the sensor may be built into the receiver 200.

The data transmitter/receiver 206 performs processes such as converting digital data supplied from the microcomputer 205 into analog data and modulating the analog data. Further, the data transmitter/receiver 206 performs processing such as demodulating the data signal received by the data transmitting/receiving antenna 207 and digitizing the demodulated data. The data transmitter/receiver 206 is driven by, for example, a DC voltage supplied from the power management unit 203 or electric power released from the power storage unit 204.

The data transmitting/receiving antenna 207 is configured to be able to efficiently transmit and receive radio waves in the 2.4 GHz band, for example. Data transmitting/receiving antenna 207 radiates a data signal supplied from data transmitting/receiving device 206 . Further, the data transmitting/receiving antenna 207 receives a data signal transmitted from the transmitter 100. For example, the data transmitting/receiving antenna 207 is driven by, for example, a DC voltage supplied from the power management unit 203 or electric power released from the power storage unit 204.

<2 Configuration of the semiconductor device installed in the receiver>
(Example 1)
FIG. 3 is a schematic diagram showing an example of the internal configuration of the semiconductor device 210. The semiconductor device 210 shown in FIG. 3 includes, for example, a semiconductor chip 220 and a semiconductor package 230. The semiconductor package 230 protects the semiconductor chip 220 from the external environment, for example, and serves to provide external connection wiring terminals when mounted on a printed wiring board. The semiconductor package 230 is made of resin, for example. In FIG. 3, the top surface of the semiconductor chip 220 is visible, but in reality, for example, the semiconductor package 230 is formed to cover the semiconductor chip 220. The size of the semiconductor chip 220 in the x-axis direction is, for example, approximately 1 to several mm, and the size in the y-axis direction is, for example, approximately 1 to several mm.

The semiconductor device 210 includes, for example, the rectifier 202 of the receiver 200 and a part of the power management unit 203. The semiconductor device 210 is mounted on, for example, a PCB or an FPC (flexible substrate).

The semiconductor chip 220 has an LDO (Low Drop Out) 221-1, an LDO 221-2, a reference 222, a rectifier circuit 223-1, and a rectifier circuit 223-2 integrated into one chip. Note that the semiconductor chip 220 may include circuits other than those shown in FIG. 3. Furthermore, the semiconductor chip 220 does not need to include any of the circuits shown in FIG.

LDO221-1 and 221-2 are a type of linear regulator. The LDO 221-1 is connected to, for example, a rectifier circuit 223-1. Further, the LDO 221-2 is connected to, for example, a rectifier circuit 223-2.

Reference 222 generates a reference voltage.

The rectifier circuits 223-1 and 223-2 rectify the radio waves received as power supply signals and convert them into DC voltage. The rectifier circuits 223-1 and 223-2 are realized by, for example, capacitors and diodes formed on a multilayer substrate. The rectifier circuit 223-1 is arranged in a direction perpendicular to the rectifier circuit 223-2. Specifically, for example, in FIG. 3, the rectifier circuit 223-1 is arranged at a position where it can be connected to a predetermined side of the semiconductor chip 220 by the shortest distance. Further, the rectifier circuit 223-2 is arranged at a position where it can be connected by the shortest distance to one side adjacent to which the rectifier circuit 223-1 is arranged. That is, in FIG. 3, the rectifier circuit 223-1 is arranged at a position where it can be connected to the lower side of the semiconductor chip 220 in the y-axis direction by the shortest wiring distance. Further, the rectifier circuit 223-2 is arranged at a position where it can be connected to the left side of the semiconductor chip 220 in the x-axis direction by the shortest wiring distance.

Semiconductor chip 220 has multiple bonding pads. In FIG. 3, for example, the bonding pads are formed to surround the chip.

The rectifier circuit 223-1 is connected to a bonding pad formed nearby by wiring. Specifically, for example, the rectifier circuit 223-1 is connected by wiring to the nearest bonding pads 224-1 and 224-2 formed on one side of the vicinity. In other words, the rectifier circuit 223-1 is connected, for example, to the bonding pads 224-1 and 224-2, which can be connected with the shortest wiring distance, by wiring. According to FIG. 3, the rectifier circuit 223-1 is connected to bonding pads 224-1 and 224-2 by wiring formed along the y-axis direction.

The rectifier circuit 223-2 is connected to a bonding pad formed nearby by wiring. Specifically, for example, the rectifier circuit 223-2 is connected by wiring to the nearest bonding pads 224-3 and 224-4 formed on one side of the vicinity. In other words, the rectifier circuit 223-2 is connected, for example, to the bonding pads 224-3 and 224-4, which can be connected with the shortest wiring distance, by wiring. According to FIG. 3, the rectifier circuit 223-2 is connected to bonding pads 224-3 and 224-4 by wiring formed along the x-axis direction.

Semiconductor package 230 has a plurality of pads. The pads serve, for example, to connect with external connection wiring terminals when mounted on a printed wiring board. In FIG. 3, for example, in the semiconductor package 230, pads 231-1 to 231-4 are formed. The pads formed on the semiconductor package 230 are not limited to these.

Bonding pad 224-1 is connected to pad 231-1 by bonding wire 225-1. For example, the bonding pad 224-1 is connected to the pad 231-1 formed closest to the bonding pad 224-1. In other words, the bonding pad 224-1 is connected to, for example, the substantially opposing pad 231-1. According to FIG. 3, the bonding pad 224-1 is connected to the pad 231-1 which is formed to face each other along the y-axis direction. Thus, for example, the bonding wire 225-1 is formed along the y-axis direction in FIG.

Bonding pad 224-2 is connected to pad 231-2 by bonding wire 225-2. For example, the bonding pad 224-2 is connected to the pad 231-2 formed closest to it. In other words, bonding pad 224-2 is connected to, for example, substantially opposing pad 231-2. According to FIG. 3, the bonding pad 224-2 is connected to the pad 231-2 that is formed facing each other along the y-axis direction. Thus, for example, the bonding wire 225-2 is formed along the y-axis direction in FIG.

Bonding pad 224-3 is connected to pad 231-3 by bonding wire 225-3. For example, the bonding pad 224-3 is connected to the pad 231-3 formed closest to the bonding pad 224-3. In other words, bonding pad 224-3 is connected to, for example, substantially opposing pad 231-3. According to FIG. 3, bonding pad 224-3 is connected to pad 231-3, which is formed to face each other along the x-axis direction. Thus, for example, the bonding wire 225-3 is formed along the x-axis direction in FIG. 3.

Bonding pad 224-4 is connected to pad 231-4 by bonding wire 225-4. For example, the bonding pad 224-4 is connected to the pad 231-4 formed closest to the bonding pad 224-4. In other words, bonding pad 224-4 is connected to, for example, substantially opposing pad 231-4. According to FIG. 3, the bonding pad 224-4 is connected to the pad 231-4 formed oppositely along the x-axis direction. Thus, for example, the bonding wire 225-4 is formed along the x-axis direction in FIG. 3.

The rectifier circuit 223-1, bonding pads 224-1, 224-2, pads 231-1, 231-2 are arranged as described above, and the rectifier circuit 223-2, bonding pads 224-3, 224-4, pad 231 By arranging the bonding wires 225-1 and 225-2, the direction in which the bonding wires 225-1 and 225-2 are formed is substantially perpendicular to the direction in which the bonding wires 225-3 and 225-4 are formed. Further, the direction in which the pads 231-1 and 231-2 are formed is approximately perpendicular to the direction in which the pads 231-3 and 231-4 are formed.

FIG. 4 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 3. The semiconductor device 210 to which the antenna is attached may also be referred to as a receiving module. In the example shown in FIG. 4, a dipole antenna 240-1, which is a linearly polarized antenna, is connected to pads 231-1 and 231-2, and a dipole antenna 240-2 is connected to pads 231-3 and 231-4. . Dipole antenna 240-1 is formed along the x-axis direction. Dipole antenna 240-2 is formed along the y-axis direction. In other words, dipole antenna 240-1 and dipole antenna 240-2 are substantially orthogonal to each other.

Note that the antenna formed by the rectifier circuit 223-1 and the rectifier circuit 223-2 is not limited to a dipole antenna. A monopole antenna may be formed from the rectifier circuit 223-1 and the rectifier circuit 223-2. A monopole antenna formed by the rectifier circuit 223-1 and the rectifier circuit 223-2 is formed in directions substantially orthogonal to each other. Further, an inverted F antenna may be formed from the rectifier circuit 223-1 and the rectifier circuit 223-2. The inverted F antenna formed by the rectifier circuit 223-1 and the rectifier circuit 223-2 are formed in directions substantially orthogonal to each other.

(Example 2)
FIG. 5 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. The semiconductor chip 220 shown in FIG. 5 has an LDO 221-1, an LDO 221-2, a reference 222, a rectifier circuit 223-1, and a rectifier circuit 223-2 integrated into one chip. Note that the semiconductor chip 220 may include circuits other than those shown in FIG. Furthermore, the semiconductor chip 220 does not need to include any of the circuits shown in FIG.

The rectifier circuits 223-1 and 223-2 rectify the radio waves received as power supply signals and convert them into DC voltage. The rectifier circuits 223-1 and 223-2 are realized by, for example, capacitors and diodes formed on a multilayer substrate. The rectifier circuit 223-1 is arranged in a direction perpendicular to the rectifier circuit 223-2. Specifically, for example, in FIG. 5, the rectifier circuit 223-1 is arranged at a position where it can be connected to a predetermined corner of the semiconductor chip 220 by the shortest distance. Further, the rectifier circuit 223-2 is arranged at a position where it can be connected by the shortest distance to a corner adjacent to the corner where the rectifier circuit 223-1 is arranged nearby. That is, in FIG. 5, the rectifier circuit 223-1 is arranged at a position where it can be connected to the lower right corner of the semiconductor chip 220 in the y-axis direction by the shortest wiring distance. Further, the rectifier circuit 223-2 is arranged at a position where it can be connected to the lower left corner of the semiconductor chip 220 in the y-axis direction by the shortest wiring distance.

Semiconductor chip 220 has multiple bonding pads. In FIG. 5, for example, the bonding pads are formed to surround the chip.

The rectifier circuit 223-1 is connected by wiring to a bonding pad formed at a nearby corner. Specifically, for example, the rectifier circuit 223-1 is connected by wiring to bonding pads 224-1 and 224-2 formed at the closest corners. In other words, the rectifier circuit 223-1 is connected by wiring to bonding pads 224-1 and 224-2 formed at the corners, which can be connected with the shortest wiring distance, for example. According to FIG. 5, the rectifier circuit 223-1 is connected to bonding pads 224-1 and 224-2 located at 45 degrees clockwise with respect to the x-axis direction.

The rectifier circuit 223-2 is connected to a bonding pad formed at a nearby corner by wiring. Specifically, for example, the rectifier circuit 223-2 is connected by wiring to bonding pads 224-3 and 224-4 formed at the closest corners. In other words, the rectifier circuit 223-2 is connected by wiring to bonding pads 224-3 and 224-4 formed at the corners, which can be connected with the shortest wiring distance, for example. According to FIG. 5, the rectifier circuit 223-2 is connected to bonding pads 224-3 and 224-4 located at 135 degrees clockwise with respect to the x-axis direction.

Semiconductor package 230 has a plurality of pads. The pads serve, for example, as external connection wiring terminals when mounted on a printed wiring board. In FIG. 5, for example, in the semiconductor package 230, pads 231-1 to 231-4 are formed. The pads formed on the semiconductor package 230 are not limited to these.

Bonding pad 224-1 is connected to pad 231-1 by bonding wire 225-1. For example, the bonding pad 224-1 is connected to the pad 231-1 formed closest to it. In other words, the bonding pad 224-1 is connected to, for example, the substantially opposing pad 231-1. According to FIG. 5, the bonding pad 224-1 is connected to the pad 231-1 formed facing each other along the x-axis direction. Thus, for example, the bonding wire 225-1 is formed along the x-axis direction in FIG.

Bonding pad 224-2 is connected to pad 231-2 by bonding wire 225-2. For example, the bonding pad 224-2 is connected to the pad 231-2 formed closest to it. In other words, the bonding pad 224-2 is connected to, for example, the substantially opposing pad 231-2. According to FIG. 5, bonding pad 224-2 is connected to pad 231-2, which is formed to face each other along the y-axis direction. Thus, for example, the bonding wire 225-2 is formed along the y-axis direction in FIG.

Bonding pad 224-3 is connected to pad 231-3 by bonding wire 225-3. For example, the bonding pad 224-3 is connected to the pad 231-3 formed closest to the bonding pad 224-3. In other words, bonding pad 224-3 is connected to, for example, substantially opposing pad 231-3. According to FIG. 5, the bonding pad 224-3 is connected to the pad 231-3 which is formed facing each other along the y-axis direction. Thus, for example, the bonding wire 225-3 is formed along the y-axis direction in FIG.

Bonding pad 224-4 is connected to pad 231-4 by bonding wire 225-4. For example, the bonding pad 224-4 is connected to the pad 231-4 formed closest to the bonding pad 224-4. In other words, bonding pad 224-4 is connected to, for example, substantially opposing pad 231-4. According to FIG. 5, bonding pad 224-4 is connected to pad 231-4, which is formed to face each other along the x-axis direction. Thus, for example, the bonding wire 225-4 is formed along the x-axis direction in FIG.

The rectifier circuit 223-1, bonding pads 224-1, 224-2, pads 231-1, 231-2 are arranged as described above, and the rectifier circuit 223-2, bonding pads 224-3, 224-4, pad 231 By arranging the bonding wires 225-1 and 225-2, the direction in which the bonding wires 225-1 and 225-2 are formed is substantially perpendicular to the direction in which the bonding wires 225-3 and 225-4 are formed. Further, the direction in which the pads 231-1 and 231-2 are formed is approximately perpendicular to the direction in which the pads 231-3 and 231-4 are formed.

FIG. 6 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 5. In the example shown in FIG. 6, a dipole antenna 240-1, which is a linearly polarized antenna, is connected to pads 231-1 and 231-2, and a dipole antenna 240-2 is connected to pads 231-3 and 231-4. . Dipole antenna 240-1 is formed along a direction of 45 degrees counterclockwise with respect to the x-axis direction. Dipole antenna 240-2 is formed along a direction of 45 degrees clockwise with respect to the x-axis direction. In other words, dipole antenna 240-1 and dipole antenna 240-2 are substantially orthogonal to each other.

(Example 3)
FIG. 7 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. In the semiconductor chip 220 shown in FIG. 7, the LDO 221-1, LDO 221-2, and reference 222 are not shown.

In FIG. 7, rectifier circuit 223-1 is arranged in a direction perpendicular to rectifier circuit 223-2. Specifically, for example, in FIG. 7, the rectifier circuit 223-1 is arranged at a position where it can be connected to a predetermined corner of the semiconductor chip 220 by the shortest distance. Further, the rectifier circuit 223-2 is arranged at a position where it can be connected by the shortest distance to a corner adjacent to the corner where the rectifier circuit 223-1 is arranged nearby. That is, in FIG. 7, the rectifier circuit 223-1 is arranged at a position where it can be connected to the lower right corner of the semiconductor chip 220 in the y-axis direction by the shortest wiring distance. Further, the rectifier circuit 223-2 is arranged at a position where it can be connected to the upper right corner of the semiconductor chip 220 in the y-axis direction by the shortest wiring distance. In the third embodiment, the rectifier circuits 223-1 and 223-2 are arranged at a predetermined angle with respect to the rectifier circuits 223-1 and 223-2 described in the second embodiment. Specifically, in the third embodiment, the rectifier circuits 223-1 and 223-2 are arranged at an angle of 45 degrees with respect to the rectifier circuits 223-1 and 223-2 described in the second embodiment.

The rectifier circuits 223-1 and 223-2 are connected to bonding pads formed at nearby corners by wiring. Specifically, for example, the rectifier circuit 223-1 is connected by wiring to bonding pads 224-1 and 224-2 formed at the closest corners. According to FIG. 7, the rectifier circuit 223-1 is connected to bonding pads 224-1 and 224-2 located at 45 degrees clockwise with respect to the x-axis direction. Further, for example, the rectifier circuit 223-2 is connected by wiring to bonding pads 224-3 and 224-4 formed at the closest corners. According to FIG. 7, the rectifier circuit 223-2 is connected to bonding pads 224-3 and 224-4 located at 45 degrees counterclockwise with respect to the x-axis direction.

Bonding pad 224-1 is connected to pad 231-1 by bonding wire 225-1. According to FIG. 7, the bonding pad 224-1 is connected to the pad 231-1 formed facing each other along the x-axis direction. Thereby, for example, the bonding wire 225-1 is formed along the x-axis direction in FIG.

Bonding pad 224-2 is connected to pad 231-2 by bonding wire 225-2. According to FIG. 7, bonding pad 224-2 is connected to pad 231-2, which is formed to face each other along the y-axis direction. Thus, for example, the bonding wire 225-2 is formed along the y-axis direction in FIG.

Bonding pad 224-3 is connected to pad 231-3 by bonding wire 225-3. According to FIG. 7, bonding pad 224-3 is connected to pad 231-3, which is formed to face each other along the y-axis direction. Thus, for example, the bonding wire 225-3 is formed along the y-axis direction in FIG.

Bonding pad 224-4 is connected to pad 231-4 by bonding wire 225-4. According to FIG. 7, bonding pad 224-4 is connected to pad 231-4, which is formed to face each other along the x-axis direction. Thus, for example, the bonding wire 225-4 is formed along the x-axis direction in FIG. 7.

The rectifier circuit 223-1, bonding pads 224-1, 224-2, pads 231-1, 231-2 are arranged as described above, and the rectifier circuit 223-2, bonding pads 224-3, 224-4, pad 231 By arranging the bonding wires 225-1 and 225-2, the direction in which the bonding wires 225-1 and 225-2 are formed is substantially perpendicular to the direction in which the bonding wires 225-3 and 225-4 are formed. Further, the direction in which the pads 231-1 and 231-2 are formed is approximately perpendicular to the direction in which the pads 231-3 and 231-4 are formed.

FIG. 8 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 7. In the example shown in FIG. 8, a dipole antenna 240-1, which is a linearly polarized antenna, is connected to pads 231-1 and 231-2, and a dipole antenna 240-2 is connected to pads 231-3 and 231-4. . Dipole antenna 240-1 is formed along a direction of 45 degrees counterclockwise with respect to the x-axis direction. Dipole antenna 240-2 is formed along a direction of 45 degrees clockwise with respect to the x-axis direction. In other words, dipole antenna 240-1 and dipole antenna 240-2 are substantially orthogonal to each other.

(Example 4)
FIG. 9 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. In the semiconductor chip 220 shown in FIG. 9, the LDO 221-1, LDO 221-2, and reference 222 are not shown.

In FIG. 9, a plurality of sets of rectifier circuits are arranged in a semiconductor chip 220. For example, the semiconductor chip 220 includes a set of a rectifier circuit 223-1 and a rectifier circuit 223-2, and a set of a rectifier circuit 223-3 and a rectifier circuit 223-4. The rectifier circuit 223-1 is arranged in a direction perpendicular to the rectifier circuit 223-2. The rectifier circuit 223-3 is arranged in a direction perpendicular to the rectifier circuit 223-4.

Specifically, for example, in FIG. 9, the rectifier circuits 223-1 and 223-2 are arranged in the same manner as in the first embodiment.

The rectifier circuit 223-3 is arranged at a position where it can be connected by the shortest distance to one side opposite to the one side near which the rectifier circuit 223-1 is arranged. Further, the rectifier circuit 223-4 is arranged at a position where it can be connected by the shortest distance to one side opposite to the one side near which the rectifier circuit 223-2 is arranged. That is, in FIG. 9, the rectifier circuit 223-3 is arranged at a position where it can be connected to the upper side of the semiconductor chip 220 in the y-axis direction by the shortest wiring distance. Further, the rectifier circuit 223-4 is arranged at a position where it can be connected to the right side of the semiconductor chip 220 in the x-axis direction by the shortest wiring distance. For example, the set of rectifier circuit 223-1 and rectifier circuit 223-2 and the set of rectifier circuit 223-3 and rectifier circuit 223-4 have a point-symmetrical positional relationship.

The rectifier circuit 223-3 is connected to a bonding pad formed nearby by wiring. Specifically, for example, the rectifier circuit 223-3 is connected by wiring to the nearest bonding pads 224-5 and 224-6 formed on one side of the vicinity. In other words, the rectifier circuit 223-3 is connected, for example, to the bonding pads 224-5 and 224-6, which can be connected with the shortest wiring distance, by wiring. According to FIG. 9, the rectifier circuit 223-3 is connected to bonding pads 224-5 and 224-6 by wiring formed along the y-axis direction.

The rectifier circuit 223-4 is connected to a bonding pad formed nearby by wiring. Specifically, for example, the rectifier circuit 223-4 is connected by wiring to the nearest bonding pads 224-7 and 224-8 formed on one side of the vicinity. In other words, the rectifier circuit 223-4 is connected, for example, to the bonding pads 224-7 and 224-8, which can be connected with the shortest wiring distance, by wiring. According to FIG. 9, the rectifier circuit 223-4 is connected to bonding pads 224-7 and 224-8 by wiring formed along the x-axis direction.

Semiconductor package 230 has a plurality of pads. In FIG. 9, for example, pads 231-1 to 231-8 are formed in a semiconductor package 230. The pads formed on the semiconductor package 230 are not limited to these.

Bonding pad 224-5 is connected to pad 231-5 by bonding wire 225-5. Bonding pad 224-5 is connected, for example, to pad 231-5 formed closest to it. In other words, bonding pad 224-5 is connected to, for example, substantially opposing pad 231-5. According to FIG. 9, bonding pad 224-5 is connected to pad 231-5, which is formed to face each other along the y-axis direction. Thus, for example, the bonding wire 225-5 is formed along the y-axis direction in FIG.

Bonding pad 224-6 is connected to pad 231-6 by bonding wire 225-6. For example, the bonding pad 224-6 is connected to the pad 231-6 formed closest to it. In other words, bonding pad 224-6 is connected to, for example, substantially opposing pad 231-6. According to FIG. 9, the bonding pad 224-6 is connected to the pad 231-6 formed oppositely along the y-axis direction. Thus, for example, the bonding wire 225-6 is formed along the y-axis direction in FIG.

Bonding pad 224-7 is connected to pad 231-7 by bonding wire 225-7. Bonding pad 224-7 is connected, for example, to pad 231-7 formed closest to it. In other words, bonding pad 224-7 is connected to, for example, substantially opposing pad 231-7. According to FIG. 9, bonding pad 224-7 is connected to pad 231-7, which is formed to face each other along the x-axis direction. Thus, for example, the bonding wire 225-7 is formed along the x-axis direction in FIG.

Bonding pad 224-8 is connected to pad 231-8 by bonding wire 225-8. Bonding pad 224-8 is connected, for example, to pad 231-8 formed closest to it. In other words, bonding pad 224-8 is connected to, for example, substantially opposing pad 231-8. According to FIG. 9, bonding pad 224-8 is connected to pad 231-8, which is formed to face each other along the x-axis direction. Thus, for example, the bonding wire 225-8 is formed along the x-axis direction in FIG.

The rectifier circuit 223-1, bonding pads 224-1, 224-2, pads 231-1, 231-2 are arranged as described above, and the rectifier circuit 223-2, bonding pads 224-3, 224-4, pad 231 By arranging the bonding wires 225-1 and 225-2, the direction in which the bonding wires 225-1 and 225-2 are formed is substantially perpendicular to the direction in which the bonding wires 225-3 and 225-4 are formed. Further, the direction in which the pads 231-1 and 231-2 are formed is approximately perpendicular to the direction in which the pads 231-3 and 231-4 are formed.

In addition, a rectifier circuit 223-3, bonding pads 224-5, 224-6, pads 231-5, 231-6 are arranged, and a rectifier circuit 223-4, bonding pads 224-7, 224-8, and pads 231-7 are arranged. , 231-8, the direction in which the bonding wires 225-5 and 225-6 are formed is approximately perpendicular to the direction in which the bonding wires 225-7 and 225-8 are formed. Furthermore, the direction in which the pads 231-5 and 231-6 are formed is approximately perpendicular to the direction in which the pads 231-7 and 231-8 are formed.

FIG. 10 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 9. In the example shown in FIG. 10, a dipole antenna 240-1, which is a linearly polarized antenna, is connected to pads 231-1 and 231-2, and a dipole antenna 240-2 is connected to pads 231-3 and 231-4. . Dipole antenna 240-1 is formed along the x-axis direction. Dipole antenna 240-2 is formed along the y-axis direction. In other words, dipole antenna 240-1 and dipole antenna 240-2 are substantially orthogonal to each other.

Further, in the example shown in FIG. 10, a dipole antenna 240-3 is formed on pads 231-5 and 231-6, and a dipole antenna 240-4 is formed on pads 231-7 and 231-8. Dipole antenna 240-3 is formed along the x-axis direction. Dipole antenna 240-4 is formed along the y-axis direction. In other words, dipole antenna 240-3 and dipole antenna 240-4 are substantially orthogonal to each other.

Note that the antenna formed by the rectifier circuit 223-3 and the rectifier circuit 223-4 is not limited to a dipole antenna. A monopole antenna may be formed from the rectifier circuit 223-3 and the rectifier circuit 223-4. A monopole antenna formed by the rectifier circuit 223-3 and the rectifier circuit 223-4 is formed in directions substantially orthogonal to each other. Further, an inverted F antenna may be formed from the rectifier circuit 223-3 and the rectifier circuit 223-4. The inverted F antenna formed by the rectifier circuit 223-3 and the rectifier circuit 223-4 are formed in directions substantially orthogonal to each other.

(Example 5)
FIG. 11 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. In the semiconductor chip 220 shown in FIG. 11, the LDO 221-1, LDO 221-2, and reference 222 are not shown.

In FIG. 11, a plurality of sets of rectifier circuits are arranged in a semiconductor chip 220. For example, the semiconductor chip 220 includes a set of a rectifier circuit 223-1 and a rectifier circuit 223-2, and a set of a rectifier circuit 223-3 and a rectifier circuit 223-4. The rectifier circuit 223-1 is arranged in a direction perpendicular to the rectifier circuit 223-2. The rectifier circuit 223-3 is arranged in a direction perpendicular to the rectifier circuit 223-4.

Specifically, for example, in FIG. 11, the rectifier circuits 223-1 and 223-2 are arranged in the same manner as in the third embodiment. Further, in FIG. 11, the rectifier circuits 223-3 and 223-4 are arranged at positions that are line-symmetrical or point-symmetrical to the rectifier circuits 223-1 and 223-2.

The rectifier circuit 223-1, bonding pads 224-1, 224-2, pads 231-1, 231-2 are arranged as described above, and the rectifier circuit 223-2, bonding pads 224-3, 224-4, pad 231 By arranging the bonding wires 225-1 and 225-2, the direction in which the bonding wires 225-1 and 225-2 are formed is substantially perpendicular to the direction in which the bonding wires 225-3 and 225-4 are formed. Further, the direction in which the pads 231-1 and 231-2 are formed is approximately perpendicular to the direction in which the pads 231-3 and 231-4 are formed.

In addition, a rectifier circuit 223-3, bonding pads 224-5, 224-6, pads 231-5, 231-6 are arranged, and a rectifier circuit 223-4, bonding pads 224-7, 224-8, and pads 231-7 are arranged. , 231-8, the direction in which the bonding wires 225-5 and 225-6 are formed is approximately perpendicular to the direction in which the bonding wires 225-7 and 225-8 are formed. Furthermore, the direction in which the pads 231-5 and 231-6 are formed is approximately perpendicular to the direction in which the pads 231-7 and 231-8 are formed.

FIG. 12 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 11. In the example shown in FIG. 12, a dipole antenna 240-1, which is a linearly polarized antenna, is connected to pads 231-1 and 231-2, and a dipole antenna 240-2 is connected to pads 231-3 and 231-4. . Dipole antenna 240-1 is formed along a direction of 45 degrees counterclockwise with respect to the x-axis direction. Dipole antenna 240-2 is formed along a direction of 45 degrees clockwise with respect to the x-axis direction. In other words, dipole antenna 240-1 and dipole antenna 240-2 are substantially orthogonal to each other.

Further, in the example shown in FIG. 12, a dipole antenna 240-3 is formed on pads 231-5 and 231-6, and a dipole antenna 240-4 is formed on pads 231-7 and 231-8. Dipole antenna 240-3 is formed along a direction of 45 degrees clockwise with respect to the x-axis direction. Dipole antenna 240-4 is formed along a direction of 45 degrees counterclockwise with respect to the x-axis direction. In other words, dipole antenna 240-3 and dipole antenna 240-4 are substantially orthogonal to each other.

(Example 6)
FIG. 13 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. In the semiconductor chip 220 shown in FIG. 13, the LDO 221-1, LDO 221-2, and reference 222 are not shown.

In FIG. 13, a plurality of sets of rectifier circuits are arranged in a semiconductor chip 220. For example, the semiconductor chip 220 includes a set of a rectifier circuit 223-1 and a rectifier circuit 223-2, and a set of a rectifier circuit 223-3 and a rectifier circuit 223-4. The rectifier circuit 223-1 is arranged in a direction perpendicular to the rectifier circuit 223-2. The rectifier circuit 223-3 is arranged in a direction perpendicular to the rectifier circuit 223-4.

Specifically, for example, in FIG. 13, the rectifier circuits 223-1 and 223-2 are arranged in the same manner as in the third embodiment. Further, in FIG. 13, the rectifier circuits 223-3 and 223-4 are arranged in the same manner as in the first embodiment.

The rectifier circuit 223-1, bonding pads 224-1, 224-2, pads 231-1, 231-2 are arranged as described above, and the rectifier circuit 223-2, bonding pads 224-3, 224-4, pad 231 By arranging the bonding wires 225-1 and 225-2, the direction in which the bonding wires 225-1 and 225-2 are formed is approximately perpendicular to the direction in which the bonding wires 225-3 and 225-4 are formed. Further, the direction in which the pads 231-1 and 231-2 are formed is approximately perpendicular to the direction in which the pads 231-3 and 231-4 are formed.

In addition, a rectifier circuit 223-3, bonding pads 224-5, 224-6, pads 231-5, 231-6 are arranged, and a rectifier circuit 223-4, bonding pads 224-7, 224-8, and pads 231-7 are arranged. , 231-8, the direction in which the bonding wires 225-5 and 225-6 are formed is approximately perpendicular to the direction in which the bonding wires 225-7 and 225-8 are formed. Furthermore, the direction in which the pads 231-5 and 231-6 are formed is approximately perpendicular to the direction in which the pads 231-7 and 231-8 are formed.

FIG. 14 is a schematic diagram showing a configuration example when an antenna is attached to the semiconductor device 210 shown in FIG. 13. In the example shown in FIG. 14, a dipole antenna 240-1, which is a linearly polarized antenna, is connected to pads 231-1 and 231-2, and a dipole antenna 240-2 is connected to pads 231-3 and 231-4. . Dipole antenna 240-1 is formed along a direction of 45 degrees counterclockwise with respect to the x-axis direction. Dipole antenna 240-2 is formed along a direction of 45 degrees clockwise with respect to the x-axis direction. In other words, dipole antenna 240-1 and dipole antenna 240-2 are substantially orthogonal to each other.

Further, in the example shown in FIG. 14, a dipole antenna 240-3 is formed on pads 231-5 and 231-6, and a dipole antenna 240-4 is formed on pads 231-7 and 231-8. Dipole antenna 240-3 is formed along the y-axis direction. Dipole antenna 240-4 is formed along the x-axis direction. In other words, dipole antenna 240-3 and dipole antenna 240-4 are substantially orthogonal to each other.

As described above, in this embodiment, the semiconductor device 210 includes the semiconductor chip 220 and the semiconductor package 230 that covers the semiconductor chip 220. The semiconductor chip 220 has a first rectifier circuit 223-1. The semiconductor chip 220 has a second rectifier circuit 223-2 provided in a direction substantially perpendicular to the first rectifier circuit 223-1. The semiconductor chip 220 has a first bonding pad 224-1 connected to a first rectifier circuit 223-1. The semiconductor chip 220 has a second bonding pad 224-3 connected to a second rectifier circuit 223-2. The semiconductor package 230 has a first bonding pad 224-1 and a first pad 231-1 connected by a first bonding wire 225-1. The semiconductor package 230 has a second bonding pad 224-3 and a second pad 231-3 connected by a second bonding wire 225-3. As a result, the directions in which the first pad 231-1 and the second pad 231-3 are formed are approximately perpendicular, and even if a plurality of antennas are connected to one semiconductor device 210, the formation of the antenna The directions are substantially orthogonal, making it possible to suppress antenna loss.

Therefore, the semiconductor device 210 according to this embodiment can further reduce the size and cost of a receiver used in wireless power transmission.

Further, in the above embodiment, the first bonding pads 224-1, 224-2, the second bonding pads 224-3, 224-4, the first pads 231-1, 231-2, the second pads 231-3, 231 A plurality of -4s are formed. By forming a plurality of bonding pads and pads, the degree of freedom in connecting the antenna to the semiconductor device 210 increases. Furthermore, the degree of freedom in external connections to the semiconductor device 210 increases.

Further, in the above embodiment, there are a plurality of first rectifier circuits 223-1 and second rectifier circuits 223-2. In other words, it has a plurality of sets of rectifier circuits. This allows the semiconductor device 210 to be connected to multiple antennas.

Further, in the embodiment described above, the semiconductor device 210 includes a semiconductor chip 220 and a semiconductor package 230 that covers the semiconductor chip 220. The semiconductor chip 220 has a first rectifier circuit 223-1. The semiconductor chip 220 has a second rectifier circuit 223-2. The semiconductor chip 220 has a first bonding pad 224-1 connected to a first rectifier circuit 223-1. The semiconductor chip 220 has a second bonding pad 224-3 connected to a second rectifier circuit 223-2. The semiconductor package 230 has a first bonding pad 224-1 and a first pad 231-1 connected by a first bonding wire 225-1. The semiconductor package 230 has a second bonding pad 224-3 and a second pad 231-3 connected by a second bonding wire 225-3. The first bonding wire 225-1 and the second bonding wire 225-3 are substantially perpendicular to each other. As a result, the directions in which the first pad 231-1 and the second pad 231-3 are formed are approximately perpendicular, and even if a plurality of antennas are connected to one semiconductor device 210, the formation of the antenna The directions are substantially orthogonal, making it possible to suppress antenna loss.

(Modified example)
In the above embodiment, a case has been described in which the rectifier circuits 223-1 and 223-2 are arranged orthogonally on the chip. However, the rectifier circuits 223-1 and 223-2 do not necessarily need to be orthogonal. As long as the bonding wires 225-1, 225-2 and the bonding wires 225-3, 225-4 are substantially orthogonal, the rectifier circuits 223-1, 223-2 do not need to be orthogonal. Furthermore, if the directions in which the pads 231-1, 231-2 and the pads 231-3, 231-4 are installed are substantially orthogonal, the rectifier circuits 223-1, 223-2 may not be orthogonal. good.

FIG. 15 is a schematic diagram showing another example of the internal configuration of the semiconductor device 210. In the example shown in FIG. 15, rectifier circuits 223-1 and 223-2 are formed in the same direction. The rectifier circuit 223-1 is not arranged at a position where it can be connected to a predetermined side of the semiconductor chip 220 at the shortest distance. The rectifier circuit 223-1 is connected to a bonding pad formed on a nearby side by bending the wiring. Specifically, for example, the rectifier circuit 223-1 is connected to bonding pads 224-1 and 224-2 formed on one side nearby by bending wiring. According to FIG. 15, the rectifier circuit 223-1 is connected to bonding pads 224-1 and 224-2 by wiring formed by extending in the negative direction of the x-axis and in the negative direction of the y-axis. .

By doing so, the bonding wires 225-1 and 225-2 and the bonding wires 225-3 and 225-4 are substantially perpendicular to each other. Further, the directions in which the pads 231-1, 231-2 and the pads 231-3, 231-4 are installed are substantially perpendicular to each other. Therefore, even if a plurality of antennas are connected to one semiconductor device 210, the directions in which the antennas are formed are substantially orthogonal, and antenna loss can be suppressed.

In the above embodiment, the case where one rectifier circuit 223 is connected to one or two bonding pads 224 has been described. However, the number of bonding pads 224 to which the rectifier circuit 223 is connected is not limited to one or two. The number of bonding pads 224 connected to the rectifier circuit 223 may be three or more.

Further, in the above embodiment, the case where there are one or two sets of rectifier circuits 223 has been described. However, the number of sets of rectifier circuits 223 is not limited to one or two. The number of sets of rectifier circuits 223 may be three or more.

Furthermore, in the above embodiment, a case has been described in which the pad 231 is provided in the semiconductor package 230. However, the pad may not be provided on the semiconductor package 230. For example, when the semiconductor device 210 is attached to a substrate included in a receiver or a receiving module, pads may be provided on this substrate. That is, the pad may be provided around the semiconductor chip 220 and connected to a first bonding pad by a first bonding wire. In this case, the semiconductor device 210 does not need to include the semiconductor package 230.

Furthermore, in each of the above-described embodiments, application to the so-called WPT system 1, in which transmission power consisting of an AC signal is wirelessly transmitted from the transmitter 100 to the receiver 200, has been described, but the receiver is Of course, application to a system that provides power to 200 is also possible. Since such systems are known, a detailed explanation will be omitted, but examples include a system that transmits power generated by solar power to the receiver 200 regardless of whether it is wired or wireless, or a system that transmits power using laser light. For example, there is a system that transmits the information to the receiver 200 regardless of whether it is wired or wireless. In addition, a configuration in which vibration or sound is applied to the receiver 200 and the receiver 200 converts the power of the vibration or the like into electric power is also applicable. In addition, it is naturally applicable to systems using known non-contact power feeding techniques other than wirelessly receiving transmitted power consisting of alternating current signals, such as a non-contact power feeding technique using a magnetic field coupling method.

<3 Basic hardware configuration of the computer>
FIG. 16 is a block diagram showing the basic hardware configuration of the computer 90. The computer 90 includes at least a processor 91, a main storage device 92, an auxiliary storage device 93, and a communication IF 99 (interface). These are electrically connected to each other by a bus.

The processor 91 is hardware for executing a set of instructions written in a program. The processor 91 includes an arithmetic unit, registers, peripheral circuits, and the like.

The main storage device 92 is for temporarily storing programs and data processed by the programs. For example, it is a volatile memory such as DRAM (Dynamic Random Access Memory).

The auxiliary storage device 93 is a storage device for storing data and programs. Examples include flash memory, HDD (Hard Disc Drive), magneto-optical disk, CD-ROM, DVD-ROM, and semiconductor memory.

The communication IF 99 is an interface for inputting and outputting signals for communicating with other computers via a network using a wired or wireless communication standard.
The network is composed of various mobile communication systems constructed using the Internet, LAN, wireless base stations, and the like. For example, the network includes 3G, 4G, 5G mobile communication systems, LTE (Long Term Evolution), a wireless network (for example, Wi-Fi (registered trademark)) that can be connected to the Internet through a predetermined access point, and the like. When connecting wirelessly, communication protocols include, for example, Z-Wave (registered trademark), ZigBee (registered trademark), Bluetooth (registered trademark), and the like. In the case of a wired connection, the network includes a network that is directly connected using a USB (Universal Serial Bus) cable or the like.

Note that the computers 90 can be virtually realized by distributing all or part of each hardware configuration to a plurality of computers 90 and interconnecting them via a network. In this way, the concept of the computer 90 includes not only the computer 90 housed in a single housing or case, but also a virtualized computer system.

<Basic functional configuration of computer 90>
The functional configuration of the computer realized by the basic hardware configuration of the computer 90 shown in FIG. 16 will be described. The computer includes at least functional units of a control section, a storage section, and a communication section.

Note that the functional units included in the computer 90 can also be implemented by distributing all or part of each functional unit to a plurality of computers 90 interconnected via a network. The computer 90 is a concept that includes not only a single computer 90 but also a virtualized computer system.

The control unit is realized by the processor 91 reading various programs stored in the auxiliary storage device 93, loading them into the main storage device 92, and executing processing according to the programs. The control unit can implement a functional unit that performs various information processing depending on the type of program. Thereby, the computer is realized as an information processing device that performs information processing.

The storage unit is realized by a main storage device 92 and an auxiliary storage device 93. The storage unit stores data, various programs, and various databases. Further, the processor 91 can secure a storage area corresponding to the storage section in the main storage device 92 or the auxiliary storage device 93 according to the program. Further, the control unit can cause the processor 91 to execute processing for adding, updating, and deleting data stored in the storage unit according to various programs.

A database refers to a relational database, which is used to manage data sets called tabular tables, which are structurally defined by rows and columns, in relation to each other. In a database, a table is called a table, a table column is called a column, and a table row is called a record. In a relational database, you can set and associate relationships between tables.
Usually, each table has a column set as a key to uniquely identify a record, but setting a key to a column is not essential. The control unit can cause the processor 91 to add, delete, or update records to a specific table stored in the storage unit according to various programs.

The communication unit is realized by a communication IF 99. The communication unit realizes a function of communicating with other computers 90 via a network. The communication unit can receive information transmitted from other computers 90 and input it to the control unit. The control unit can cause the processor 91 to execute information processing on the received information according to various programs. Further, the communication unit can transmit information output from the control unit to another computer 90.

Although several embodiments of the present disclosure have been described above, these embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the gist of the invention. It can be performed. These embodiments and their modifications are included within the scope and gist of the invention as well as within the scope of the invention described in the claims and its equivalents.

Furthermore, in the above description, "processor" refers to one or more processors. The at least one processor is typically a microprocessor such as a CPU (Central Processing Unit), but may be another type of processor such as a GPU (Graphics Processing Unit). At least one processor may be single-core or multi-core.

Furthermore, at least one processor may be a broadly defined processor such as a hardware circuit (for example, an FPGA (Field-Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit)) that performs part or all of the processing.

In addition, in the above explanation, information such as "xxx table" is sometimes used to explain information that provides an output in response to an input, but this information may be data of any structure, and A learning model such as a generated neural network may also be used. Therefore, the "xxx table" can be called "xxx information."

In addition, in the above explanation, the configuration of each table is an example, and one table may be divided into two or more tables, or all or part of two or more tables may be one table. good.

In addition, in the above explanation, processing may be explained using "program" as the subject, but a program is executed by a processor to carry out predetermined processing by appropriately controlling the storage unit and/or interface unit, etc. Since the processing is performed while using the processor, the subject of the processing may be a processor (or a device such as a controller having the processor, or a microcomputer).

The program may be installed on a device such as a computer, or may be located on, for example, a program distribution server or a computer-readable (eg, non-transitory) recording medium. Furthermore, in the following description, two or more programs may be realized as one program, or one program may be realized as two or more programs.

Furthermore, in the above description, identification numbers are used as identification information for various objects, but other types of identification information (for example, identifiers containing alphabetic characters or codes) may also be employed.

In addition, in the above explanation, when the same type of elements are explained without distinguishing them, reference numerals (or common numerals among the reference numerals) are used, and when the same kind of elements are explained separately, the element An identification number (or reference number) may be used.

In addition, in the following description, control lines and information lines are shown to be necessary for the explanation, and not all control lines and information lines are necessarily shown in the product. All configurations may be interconnected.

<Additional notes>
The matters explained in each of the above embodiments are additionally described below.
(Additional note 1)
A first rectifier circuit provided on the semiconductor chip, a second rectifier circuit provided on the semiconductor chip in a direction substantially orthogonal to the first rectifier circuit, and a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit. a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit, a first bonding pad provided on the substrate to which the semiconductor chip is attached, or a semiconductor package covering the semiconductor chip, and a first bonding wire. A semiconductor device comprising a first pad to be connected, a second bonding pad provided on a substrate or a semiconductor package, and a second pad connected by a second bonding wire.
(Additional note 2)
The first bonding pad is formed on a predetermined side of the semiconductor chip, the second bonding pad is formed on an adjacent side of the semiconductor chip, and the first pad is formed at a position substantially opposite to the first bonding pad. The semiconductor device according to Supplementary Note 1, wherein the second pad is formed at a position substantially facing the second bonding pad.
(Additional note 3)
The first bonding pad is formed at a predetermined corner of the semiconductor chip, the second bonding pad is formed at an adjacent corner of the semiconductor chip, and the first pad is formed at a position substantially opposite to the first bonding pad. The semiconductor device according to Supplementary Note 1, wherein the second pad is formed at a position substantially facing the second bonding pad.
(Additional note 4)
The semiconductor device according to any one of (Appendix 1) to (Appendix 3), wherein a plurality of first bonding pads, a plurality of second bonding pads, a plurality of first pads, and a plurality of second pads are formed.
(Appendix 5)
The semiconductor device according to any one of (Appendix 1) to (Appendix 4), which includes a plurality of first rectifier circuits and a plurality of second rectifier circuits.
(Appendix 6)
In a receiving module including a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor, the semiconductor device includes a first rectifier circuit provided in the semiconductor chip and a first rectifier circuit provided in the semiconductor chip. , a second rectifier circuit provided on the semiconductor chip in a direction substantially perpendicular to the first rectifier circuit; a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit; a second bonding pad connected to the rectifier circuit; a first pad provided on a substrate to which the semiconductor chip is attached; or a semiconductor package covering the semiconductor chip; and connected to the first bonding pad by a first bonding wire; Alternatively, the semiconductor package includes a second bonding pad and a second pad connected by a second bonding wire, the first linearly polarized antenna is connected to the first pad, and the second linearly polarized antenna is connected to the first pad. is a receiving module connected to the second pad.
(Appendix 7)
In the receiver including a power storage unit, a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device, the semiconductor device is provided on a semiconductor chip. a first rectifier circuit; a second rectifier circuit provided on the semiconductor chip in a direction substantially orthogonal to the first rectifier circuit; a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit; A second bonding pad provided and connected to the second rectifier circuit, and a first bonding pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip and connected to the first bonding pad by a first bonding wire. The first linearly polarized antenna is connected to the first pad and has a second bonding pad provided on the substrate or the semiconductor package and connected to the second bonding wire by a second bonding wire. A linearly polarized antenna is a receiver connected to the second pad.
(Appendix 8)
A first rectifier circuit provided on the semiconductor chip, a second rectifier circuit provided on the semiconductor chip, a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit, and a second rectifier circuit provided on the semiconductor chip. A second bonding pad connected to a circuit, a substrate to which a semiconductor chip is attached, or a first pad provided on a semiconductor package covering the semiconductor chip and connected to the first bonding pad by a first bonding wire, and a substrate, or A semiconductor device provided in a semiconductor package, comprising a second bonding pad and a second pad connected by a second bonding wire, the first bonding wire and the second bonding wire being substantially perpendicular to each other.
(Appendix 9)
The first bonding pad is formed on a predetermined side of the semiconductor chip, the second bonding pad is formed on an adjacent side of the semiconductor chip, and the first pad is formed at a position substantially opposite to the first bonding pad. The semiconductor device according to appendix 8, wherein the second pad is formed at a position substantially facing the second bonding pad.
(Appendix 10)
The first bonding pad is formed at a predetermined corner of the semiconductor chip, the second bonding pad is formed at an adjacent corner of the semiconductor chip, and the first pad is formed at a position substantially opposite to the first bonding pad. The semiconductor device according to appendix 8, wherein the second pad is formed at a position substantially facing the second bonding pad.
(Appendix 11)
The semiconductor device according to any one of (Appendix 8) to (Appendix 10), wherein a plurality of first bonding pads, a plurality of second bonding pads, a plurality of first pads, and a plurality of second pads are each formed.
(Appendix 12)
The semiconductor device according to any one of (Appendix 1) to (Appendix 11), which includes a plurality of first rectifier circuits and a plurality of second rectifier circuits.
(Appendix 13)
In a receiving module including a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device, the semiconductor device includes a first rectifier circuit provided on the semiconductor chip. a second rectifier circuit provided on the semiconductor chip; a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit; and a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit. , a first bonding pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip and connected by a first bonding wire; and a second bonding pad provided on the substrate or the semiconductor package and connected by a first bonding wire. and a second pad connected by a second bonding wire, the first bonding wire and the second bonding wire are substantially perpendicular to each other, and the first linearly polarized antenna is connected to the first pad. , the second linearly polarized antenna is connected to the second pad of the receiving module.
(Appendix 14)
In the receiver including a power storage unit, a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device, the semiconductor device is provided on a semiconductor chip. a first rectifier circuit, a second rectifier circuit provided on the semiconductor chip, a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit, and a first bonding pad provided on the semiconductor chip and connected to the second rectifier circuit. 2 bonding pads and a first bonding pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and a first bonding pad and a first pad connected by a first bonding wire and provided on the substrate or the semiconductor package. , has a second bonding pad and a second pad connected by a second bonding wire, the first bonding wire and the second bonding wire are substantially perpendicular to each other, and the first linearly polarized antenna is connected to the first bonding wire. a receiver connected to the pad, and a second linearly polarized antenna connected to the second pad;

1... WPT system 100... Transmitter 101... Oscillator 102... Transmitting antenna 103... Microcomputer 104... Data transceiver 105... Data transmitting/receiving antenna 200... Receiver 201... Receiving antenna 202... Rectifier 203... Power management unit 204... Power storage unit 205... Microcomputer 206...Data transmitter/receiver 207...Data transmitter/receiver antenna 210...Semiconductor device 220...Semiconductor chip 230...Semiconductor package 300...First information processing device 400...Second information processing device

Claims (14)

a first rectifier circuit provided on the semiconductor chip;
a second rectifier circuit provided on the semiconductor chip in a direction substantially perpendicular to the first rectifier circuit;
a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit;
a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit;
a first pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and connected to the first bonding pad by a first bonding wire;
a second pad provided on the substrate or the semiconductor package and connected to the second bonding pad by a second bonding wire ;
The first rectifier circuit is a semiconductor device having a configuration in a predetermined direction that can be connected to the first bonding pad . The first bonding pad is formed on a predetermined side of the semiconductor chip,
The second bonding pad is formed on a side adjacent to the side of the semiconductor chip,
The first pad is formed at a position substantially opposite to the first bonding pad,
2. The semiconductor device according to claim 1, wherein the second pad is formed at a position substantially opposite to the second bonding pad. the first bonding pad is formed at a predetermined corner of the semiconductor chip;
The second bonding pad is formed at a corner adjacent to the corner of the semiconductor chip,
The first pad is formed at a position substantially opposite to the first bonding pad,
2. The semiconductor device according to claim 1, wherein the second pad is formed at a position substantially opposite to the second bonding pad. 2. The semiconductor device according to claim 1, wherein a plurality of each of the first bonding pad, the second bonding pad, the first pad, and the second pad are formed. 2. The semiconductor device according to claim 1, comprising a plurality of said first rectifier circuits and said second rectifier circuits. A receiving module including a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device,
The semiconductor device includes:
a first rectifier circuit provided on the semiconductor chip;
a second rectifier circuit provided on the semiconductor chip in a direction substantially perpendicular to the first rectifier circuit;
a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit;
a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit;
a first pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and connected to the first bonding pad by a first bonding wire;
a second pad provided on the substrate or the semiconductor package and connected to the second bonding pad by a second bonding wire;
The first rectifier circuit has a configuration connectable to the first bonding pad in a predetermined direction,
the first linearly polarized antenna is connected to the first pad;
The second linearly polarized antenna is a receiving module connected to the second pad. A receiver including a power storage unit, a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device,
The semiconductor device includes:
a first rectifier circuit provided on the semiconductor chip;
a second rectifier circuit provided on the semiconductor chip in a direction substantially perpendicular to the first rectifier circuit;
a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit;
a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit;
a first pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and connected to the first bonding pad by a first bonding wire;
a second pad provided on the substrate and the semiconductor package and connected to the second bonding pad and a second bonding wire;
The first rectifier circuit has a configuration connectable to the first bonding pad in a predetermined direction,
the first linearly polarized antenna is connected to the first pad;
The second linearly polarized antenna is a receiver connected to the second pad. a first rectifier circuit provided on the semiconductor chip;
a second rectifier circuit provided on the semiconductor chip;
a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit;
a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit;
a first pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and connected to the first bonding pad by a first bonding wire;
a second pad provided on the substrate or the semiconductor package and connected to the second bonding pad by a second bonding wire;
The first bonding wire and the second bonding wire are substantially perpendicular to each other in the semiconductor device. The first bonding pad is formed on a predetermined side of the semiconductor chip,
The second bonding pad is formed on a side adjacent to the side of the semiconductor chip,
The first pad is formed at a position substantially opposite to the first bonding pad,
9. The semiconductor device according to claim 8, wherein the second pad is formed at a position substantially facing the second bonding pad. the first bonding pad is formed at a predetermined corner of the semiconductor chip;
The second bonding pad is formed at a corner adjacent to the corner of the semiconductor chip,
The first pad is formed at a position substantially opposite to the first bonding pad,
9. The semiconductor device according to claim 8, wherein the second pad is formed at a position substantially facing the second bonding pad. 9. The semiconductor device according to claim 8, wherein a plurality of each of the first bonding pad, the second bonding pad, the first pad, and the second pad are formed. 9. The semiconductor device according to claim 8, comprising a plurality of said first rectifier circuits and said second rectifier circuits. A receiving module including a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device,
The semiconductor device includes:
a first rectifier circuit provided on the semiconductor chip;
a second rectifier circuit provided on the semiconductor chip;
a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit;
a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit;
a first pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and connected to the first bonding pad by a first bonding wire;
a second pad provided on the substrate or the semiconductor package and connected to the second bonding pad by a second bonding wire;
the first bonding wire and the second bonding wire are substantially orthogonal;
the first linearly polarized antenna is connected to the first pad;
The second linearly polarized antenna is a receiving module connected to the second pad. A receiver including a power storage unit, a semiconductor device, a first linearly polarized antenna connected to the semiconductor device, and a second linearly polarized antenna connected to the semiconductor device,
The semiconductor device includes:
a first rectifier circuit provided on the semiconductor chip;
a second rectifier circuit provided on the semiconductor chip;
a first bonding pad provided on the semiconductor chip and connected to the first rectifier circuit;
a second bonding pad provided on the semiconductor chip and connected to the second rectifier circuit;
a first pad provided on a substrate to which the semiconductor chip is attached or a semiconductor package covering the semiconductor chip, and connected to the first bonding pad by a first bonding wire;
a second pad provided on the substrate or the semiconductor package and connected to the second bonding pad by a second bonding wire;
the first bonding wire and the second bonding wire are substantially orthogonal;
the first linearly polarized antenna is connected to the first pad;
The second linearly polarized antenna is a receiver connected to the second pad.