CN115864682A - Power supply device, power supply method and processing method for wafer system - Google Patents

Abstract

The disclosure provides a power supply device, a power supply method and a processing method for a wafer system, and relates to the technical field of computers. The power supply device includes: the wafer system comprises at least one electric energy transmitting unit and at least one electric energy receiving unit connected with the wafer system; the electric energy transmitting unit and the at least one electric energy receiving unit establish a wireless power supply link based on a wireless connection mode, electric energy is transmitted to the electric energy receiving unit based on the wireless power supply link, and the electric energy receiving unit provides the received electric energy to the wafer system. According to the embodiment of the disclosure, stable power supply can be provided for the wafer system, and the normal operation of the wafer system is guaranteed.

Description

Power supply device, power supply method and processing method for wafer system

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to a power supply device, a power supply method, and a processing method for a wafer system.

Background

The supply of electric energy is a necessary condition for the normal operation of the processing system. In the related art, the processing system may be supplied with power supply by a power storage unit (e.g., a battery), a power supply unit, or the like. For the wafer system, because a large number of chips are densely arranged, and the chip integration level is high, if the traditional wired power supply mode is adopted to provide electric energy for the wafer system, the wiring density is high, the power consumption is likely to be large, the heating phenomenon is severe, and the power supply distance is long, the voltage drop problem is likely to be severe, so that the power supply efficiency and the power supply effect of the wafer system are affected. In addition, the wired power supply link may cause a breakage or poor contact of the link during transportation or movement of the wafer system, thereby affecting the power supply of the wafer system, and causing the wafer system to fail to operate stably and reliably.

Disclosure of Invention

The present disclosure provides a power supply apparatus, a power supply method, a processing method, an electronic device, and a computer-readable storage medium for a wafer system.

In a first aspect, the present disclosure provides a power supply apparatus for a wafer system, the power supply apparatus including: the wafer system comprises at least one electric energy transmitting unit and at least one electric energy receiving unit connected with the wafer system; the electric energy transmitting unit and at least one electric energy receiving unit establish a wireless power supply link based on a wireless connection mode, electric energy is transmitted to the electric energy receiving unit based on the wireless power supply link, and the electric energy receiving unit provides the received electric energy for the wafer system.

In a second aspect, the present disclosure provides a power supply method applied to a wafer system, where the wafer system is connected to at least one power receiving unit, the power supply method including: establishing a wireless power supply link between the electric energy receiving unit and at least one electric energy transmitting unit; and transmitting the electric energy of the electric energy transmitting unit to the electric energy receiving unit based on the wireless power supply link, and providing the received electric energy to the wafer system by the electric energy receiving unit.

In a third aspect, the present disclosure provides a processing method applied to a wafer system, the processing method including: responding to the received task processing request, and executing the task to be processed; the task to be processed comprises at least one of an image processing task, a voice processing task, a text processing task and a video processing task.

In a fourth aspect, the present disclosure provides an electronic device comprising: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores one or more computer programs executable by the at least one processor, the one or more computer programs being executable by the at least one processor to enable the at least one processor to perform the processing method described above.

In a fifth aspect, the present disclosure provides an electronic device comprising: a plurality of processing cores; and a network on chip configured to interact data among the plurality of processing cores and external data; one or more instructions are stored in one or more processing cores, and the one or more instructions are executed by the one or more processing cores to enable the one or more processing cores to execute the processing method.

In a sixth aspect, the present disclosure provides a computer readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor/processing core, implements the processing method described above.

According to the embodiment provided by the disclosure, the wafer system comprises at least one electric energy transmitting unit and at least one electric energy receiving unit connected with the wafer system, wherein a wireless power supply link is established between the electric energy transmitting unit and the at least one electric energy receiving unit based on a wireless connection mode, electric energy is transmitted to the electric energy receiving unit based on the wireless power supply link, and the received electric energy is provided for the wafer system by the electric energy receiving unit.

It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure and not to limit the disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:

fig. 1 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of a wafer processing apparatus according to an embodiment of the disclosure;

fig. 3 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 4 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 5 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 6 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 7 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 8 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 9 is a schematic diagram of a power supply device for a wafer system according to an embodiment of the disclosure;

fig. 10 is a schematic diagram of a power supply device for a wafer system according to an embodiment of the disclosure;

fig. 11 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure;

fig. 12 is a flowchart of a power supply method provided in an embodiment of the present disclosure;

FIG. 13 is a flow chart of a processing method provided by an embodiment of the present disclosure;

fig. 14 is a block diagram of an electronic device provided by an embodiment of the present disclosure;

fig. 15 is a block diagram of an electronic device provided in an embodiment of the present disclosure.

Detailed Description

To enable those skilled in the art to better understand the technical aspects of the present disclosure, exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of the embodiments of the present disclosure are included to assist understanding, and they should be considered as being merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

Embodiments of the present disclosure and features of embodiments may be combined with each other without conflict.

As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "made from" \8230; \8230 ";" made from ";" specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

When a chip is used to perform a data processing task, it is usually necessary to supply energy to the chip, wherein one of the most important energies is electrical energy. In the related art, an energy storage unit may be provided in a chip and data processing may be performed using electric energy stored in advance in the energy storage unit, or a power supply unit may be provided in the chip and receive electric energy from the outside to perform data processing. However, when the chip area is large, if power is supplied according to the conventional wiring method, the voltage drop is likely to be large, and the power consumption is also high, so that the temperature of the chip is easily too high, and the stability of the working condition of the chip cannot be guaranteed.

In view of the above, in the embodiment of the present disclosure, a power supply device for supplying power to a wafer system includes at least one power transmitting unit and at least one power receiving unit connected to the wafer system; the electric energy transmitting unit and the at least one electric energy receiving unit establish a wireless power supply link based on a wireless connection mode, electric energy is transmitted to the electric energy receiving unit based on the wireless power supply link, and the electric energy receiving unit provides the received electric energy for the wafer system. Because the power supply device adopts a wireless power supply mode to supply power, a wired power supply line is not needed, the condition that the wired power supply line cannot supply power due to line breakage or poor contact caused by external force action such as carrying, moving and the like can be avoided, the stability of power supply is improved, the normal operation of the wafer system can be ensured, and various processing tasks of the wafer system can be smoothly executed.

It should be further noted that the processing method according to the embodiment of the present disclosure may be executed by an electronic device such as a terminal device or a server, that is, the wafer system may be set in any product form such as a terminal device form or a server. The terminal device may be a User Equipment (UE), a mobile device, a User terminal, a cellular phone, a cordless phone, a Personal Digital Assistant (PDA), a handheld device, a computing device, a vehicle-mounted device, a wearable device, or the like, and the method may be implemented by a processor calling computer-readable program instructions stored in a memory. Alternatively, the method may be performed by a server.

A first aspect of the embodiments of the present disclosure provides a power supply apparatus for a wafer system.

Fig. 1 is a schematic view of a power supply apparatus for a wafer system according to an embodiment of the present disclosure. Referring to fig. 1, the power supply apparatus includes: at least one power transmitting unit 10, and at least one power receiving unit 20 connected to the wafer system 40; the wireless power supply link 30 is established between the power transmitting unit 10 and the at least one power receiving unit 20 based on a wireless connection manner, the power is transmitted to the power receiving unit 20 based on the wireless power supply link 30, and the power receiving unit 20 provides the received power to the wafer system 40.

In some optional implementations, the wafer system refers to a processing system having functions of data processing, data storage, and the like and prepared based on a wafer, and may be used to perform various tasks to be processed. The task to be processed includes at least one of an image processing task, a voice processing task, a text processing task, and a video processing task, which is not limited in this disclosure.

In some alternative implementations, the wafer system includes at least one wafer processing device, which is a wafer processing device prepared based on unsingulated wafers.

In some optional implementations, the wafer processing apparatus includes at least one main functional area and a plurality of auxiliary functional areas, wherein the main functional area includes a plurality of main functional chips distributed in an array, and the auxiliary functional area includes at least one auxiliary functional chip.

For example, the central position of the wafer may be set as a main function region to prepare a main function chip, and the region at the periphery of the main function region may be set as an auxiliary function region to prepare an auxiliary function chip.

Fig. 2 is a schematic diagram of a wafer processing apparatus according to an embodiment of the disclosure. Referring to fig. 2, the wafer processing apparatus 200 includes: a main function chip 210 disposed in the main function region, and auxiliary function chips 221, 222, 223, and 224 disposed in the auxiliary function region.

Illustratively, the main function chip 210 may be a computing chip, the auxiliary function chips 221, 222, 223 and 224 may include a memory chip, a communication chip, and the like, and the wafer processing apparatus 200 is mainly used for providing computing functions.

Illustratively, the main functional chip 210 may be a memory chip, the auxiliary functional chips 221, 222, 223 and 224 may include a computing chip, a communication chip, and the like, and the wafer processing apparatus 200 is mainly used for providing a memory function.

In view of the limitation of the functions or processing capabilities of the wafer system, in order to expand the functions or improve the processing capabilities of the wafer system, some external chips may be additionally disposed on the wafer system, the external chips are connected to at least one of the wafer processing devices, and each task to be processed is executed based on the external chips and the wafer system together. The external chip may be bonded to the wafer processing apparatus, or may adopt other connection manners, which is not limited in this disclosure.

In summary, in a wafer system, a large number of chips are densely arranged, and the chip integration level is high, so that if a conventional wired power supply manner is still used to provide electric energy for the wafer system, the wiring density is high, which may result in high power consumption, a serious heating phenomenon, and possibly affect the operation of the wafer system. Moreover, the use of the wired power supply link may cause breakage or poor contact of the wired power supply link during transportation or movement of the wafer system, which may affect the power supply of the wafer system, and may result in unstable and reliable operation of the wafer system.

In some optional implementation manners, a Wireless Power supply link can be established based on a Wireless connection manner through the electric energy transmitting unit and the electric energy receiving unit, so that a wafer system is powered by a Wireless Power Transfer (WPT) manner, energy can be transmitted without electrical direct contact, power supply stability can be improved, the problem of voltage drop can be effectively alleviated by reasonably setting the number and distribution positions of the electric energy transmitting unit and the electric energy receiving unit, and Power supply efficiency and Power supply effect of the wafer system are improved.

In some optional implementation manners, the power transmitting unit is a functional unit for providing power, the power receiving unit is a functional unit for receiving power, and a wireless power supply link may be established between the power transmitting unit and the power receiving unit, so as to provide power for chips in the wafer system through the wireless power supply link. The chips comprise at least one of a computing chip, a storage chip and a communication chip in the wafer system. It should be noted that, the above description is only for the chip in the wafer system, and the embodiment of the disclosure does not limit this.

In some possible implementations, the power receiving unit may be disposed on a wafer processing apparatus of the wafer system and/or on an external chip.

Fig. 3 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure. Referring to fig. 3, the wafer system 340 includes a power receiving unit 321 disposed on the wafer processing apparatus and a power receiving unit 322 disposed on the external chip 350. In the power supply device, a wireless power supply link 331 is established between the power receiving unit 321 and the power transmitting unit 311, and power is supplied to a chip connected to the power receiving unit 321 based on the wireless power supply link 331, and a wireless power supply link 332 is established between the power receiving unit 322 and the power transmitting unit 312, and power is supplied to a chip connected to the power receiving unit 322 based on the wireless power supply link 332.

Therefore, in the embodiment of the disclosure, the installation position of the electric energy receiving unit is flexible, and the electric energy receiving unit can be reasonably installed according to the conditions of the chip layout, the space position and the like of the wafer system, so that various power supply requirements are met, and the flexibility and convenience of power supply are improved.

In some alternative implementations, the power emission units may be distributed in an area outside of the wafer system, and/or the power emission units are distributed on the wafer system.

In some alternative implementations, at least one external circuit board may be disposed outside the wafer system, and the power receiving unit is carried by the external circuit board to provide power supply for the wafer system.

Illustratively, at least one power receiving unit is arranged in the wafer system, at least one power transmitting unit is arranged in the external circuit board, and power supply to the wafer system is realized by connecting the corresponding power receiving unit and the power transmitting unit.

Fig. 4 is a schematic diagram of a power supply device for a wafer system according to an embodiment of the disclosure. Referring to fig. 4, the wafer system includes a wafer processing apparatus 440, and four external circuit boards 451, 452, 453, and 454 are disposed at the periphery of the wafer processing apparatus 440. Wherein, an electric energy transmitting unit 420 is disposed on the external circuit board 451, an electric energy receiving unit 410 is disposed on the wafer processing apparatus 440, and a wireless power supply link 430 is established between the electric energy transmitting unit 410 and the electric energy receiving unit 420, so as to provide electric energy for the corresponding chip in the wafer system through the wireless power supply link 430.

It should be noted that the external circuit board may provide at least one of power, communication, computation, storage and clock functions for the wafer system, and one wafer system may be externally connected to one or more external circuit boards. In other words, the wafer system may be externally connected to any one or more of a power supply circuit board, a communication circuit board, a storage circuit board, and a crystal oscillator circuit board.

In some possible implementations, the external circuit board may be fixed on the top, bottom, side, or other position of the frame where the wafer system is located. For example, the wafer system includes a wafer handling device that is mounted in the middle of a wafer table, and the various external circuit boards may be distributed outside the wafer handling device and also mounted on the wafer table.

It should be noted that, the above arrangement positions of the external circuit board are merely examples, and the embodiment of the present disclosure does not limit this.

In some optional implementations, the power emission units are distributed on the wafer system, and include: the power transmitting unit is prepared on at least one chip of the wafer system, and/or the power transmitting unit is an independent chip prepared in a preset area of the wafer system. The preset area may be an idle area or a pre-designated multifunctional area, and the like, which is not limited in the embodiment of the present disclosure.

For example, when the wafer system is manufactured, the power emitting unit may be manufactured by using a certain chip thereon, or an independent power emitting unit may be manufactured by using an empty area in the wafer system, or a part of an area in the wafer system may be designated in advance as a multifunctional area, and an independent power emitting unit may be manufactured in the multifunctional area.

It should be noted that in some alternative implementations, the power transmitting unit may be connected to at least one external power source by a wired manner to obtain power from the external power source. In other words, the power transmitting unit obtains power from an external power source, transmits the power to the power receiving unit through the wireless power link, and further transmits the power to each chip through the power receiving unit, so as to support power supply of the wafer system.

It should be noted that no matter where the power transmitting unit and the power receiving unit are disposed, a wireless power supply link may be established between the power receiving unit and the power receiving unit through at least one of an electromagnetic induction type, a magnetic field resonance type, a radio wave type, and an electric field coupling type. In other words, in the wireless connection mode, there is no physical power line between the power transmitting unit and the power receiving unit, and the two units establish a wireless power supply link through a non-contact electrical connection.

The electromagnetic induction type realizes energy transmission mainly through effective conversion of magnetic energy and electric energy. Illustratively, a primary coil is disposed at the transmitting end, a secondary coil is disposed at the receiving end, the primary coil is connected to a wired power supply and generates an electromagnetic signal (i.e., an alternating current signal having a certain frequency), and then a corresponding current is generated in the secondary coil by using electromagnetic induction, so that energy is transferred from the transmitting end to the receiving end.

In the embodiment of the present disclosure, a first coil may be disposed on the power transmitting unit, a second coil may be disposed on the power receiving unit, the first coil generates an electromagnetic signal, and the second coil induces the electromagnetic signal to generate a current and transmits the current to the corresponding power utilization chip, thereby implementing power supply to the processing device.

The magnetic field resonance type mainly generates a same-frequency magnetic field through resonance, and further transmits energy through resonance. Illustratively, a coil is provided at the transmitting end, a coil is also provided at the receiving end, the transmitting end coil vibrates at a certain frequency and radiates electromagnetic waves around, the receiving end coil vibrates at the same frequency so as to receive the energy transmitted by the transmitting end, and the two coils form a nearly closed "energy channel" based on which the energy is transmitted.

In the embodiment of the present disclosure, a third coil may be provided at the power transmitting unit, and a fourth coil may be provided at the power receiving unit, the third coil and the fourth coil vibrating at the same frequency (e.g., 10MHz (megahertz)), so that the third coil transmits energy to the fourth coil, and the fourth coil converts the energy into electric energy and supplies to the corresponding consumer chip.

Radio waves achieve energy transmission mainly through propagation of radio waves. Illustratively, the transmitting end transmits radio waves outwards, and the receiving end receives the radio waves and modulates proper voltage through the voltage regulation processing device so as to meet the use requirement of the power utilization chip.

In the embodiment of the present disclosure, radio waves may be emitted from the power emitting unit, and the power receiving unit receives the radio waves, converts the radio waves into power through the rectenna, and transmits the power to the corresponding power utilization chip.

The electric field coupling type can couple electric energy with two groups of asymmetric dipoles in the vertical direction in a microwave mode to generate electric power, transmit the electric power in a wireless mode, transmit the electric power to a remote receiving antenna, and use the electric power after rectification, modulation and the like. For example, two sets of symmetrical electric dipoles are arranged at the transmitting end and the receiving end, and once the two electric dipoles are close to each other, current is generated between the two sets of symmetrical electric dipoles, so that electric energy transmission is realized.

In the embodiment of the present disclosure, an electric dipole T may be disposed at the electric energy transmitting unit, an electric dipole R may be disposed at the electric energy receiving unit, and when the distance between the electric energy transmitting unit and the electric dipole R is smaller than a preset threshold, electric energy transmission may be implemented, and the electric energy receiving unit further transmits the electric energy to the corresponding power utilization chip.

It should be noted that, the above wireless power transmission manner is only an example, and the embodiment of the disclosure does not limit this.

The positions and the wireless connection modes of the electric energy transmitting unit and the electric energy receiving unit are explained, and on the basis, the distribution conditions of the electric energy transmitting unit and the electric energy receiving unit are explained, so that the problem of voltage drop is further solved on the basis of the distribution conditions, and the power supply efficiency and the power supply effect of the wafer system are improved.

In some optional implementation manners, in order to avoid the power supply distance from being too long, which causes an excessive voltage drop, thereby affecting the power supply efficiency and the power supply effect, the power receiving units may be uniformly distributed in the wafer system, and power is provided to the chips which are less than the preset threshold value from the power receiving units; and/or each chip of the wafer system is provided with at least one electric energy receiving unit, and the electric energy receiving unit is used for providing electric energy for the chip where the electric energy receiving unit is located.

Illustratively, the electric energy receiving units are uniformly distributed in the wafer system and provide electric energy for the electric energy consumption chips which are less than the preset threshold value from the electric energy receiving units, so that the power supply is relatively balanced, the condition that the chips use the electric energy receiving units with longer distance to supply power is reduced, and the problem of voltage drop caused by overlong power supply distance can be reduced. The preset threshold may be set according to any one or more of experience, statistical data, a simulation result, and a power supply requirement, which is not limited in the embodiment of the present disclosure.

It should be noted that "uniform" herein includes a relatively uniform condition, and in practical applications, the power receiving units may not be strictly uniformly arranged in the wafer system due to the shape of the wafer system, the distribution position and layout requirements of the processing units, and the like. In other words, as long as the power receiving units are distributed relatively uniformly in the wafer system, the above power supply requirement can be considered to be satisfied.

In some optional implementations, the corresponding power receiving units may be arranged according to a chip distribution of the wafer system. In an exemplary embodiment, each chip of the wafer system is provided with at least one power receiving unit, and the power receiving unit is configured to provide power for the chip.

It should be noted that the number of the power receiving units arranged in each chip may be individually set according to the chip position, area, power consumption, chip type, and the like.

For example, when the chip is located at the middle position of the wafer system, the chip may be located a relatively long distance from the power transmitting unit in the external circuit board, and in consideration of voltage drop and other factors, some power receiving units may be additionally provided in the chip as appropriate.

For example, when the chip area is large, the voltage drop is large in consideration of the power unit disposed thereon being far from the processing unit at the edge position of the chip, and therefore, a plurality of power receiving units may be uniformly disposed in the chip.

For example, when the power consumption of a chip is large, in order to meet the power consumption requirement, a plurality of power receiving units may be disposed in the chip to meet the power consumption requirement of the chip.

For example, if one of the two chips adjacent to each other and having similar areas is a computing chip and the other chip is a memory chip, considering that the data processing amount of the computing chip is larger than that of the memory chip and the computing power requirement is higher, N1 power receiving units may be disposed in the computing chip and N2 power receiving units may be disposed in the memory chip, where N1 and N2 are integers and N1 > N2.

After the setting of the electric energy receiving unit is completed, the setting (including the number, the position and the like) of the electric energy transmitting unit can be optimized, so that the electric energy receiving unit and the electric energy transmitting unit act together, and the power supply efficiency and the power supply effect are further improved.

In some optional implementation manners, it is considered that the number of the electric energy receiving units is large, and the size of the wafer system is large, if only one electric energy transmitting unit is arranged in the external circuit board, when a chip at a position far away from the electric energy transmitting unit in the wafer system receives electric energy, a voltage drop is large due to a long power supply line, so that the power supply efficiency is low, and the power supply effect is not good. Therefore, in some optional implementation manners, a plurality of electric energy transmitting units can be correspondingly arranged according to the distribution situation of the electric energy receiving units, so that the distance between the electric energy transmitting units and the electric energy receiving units which are connected is not too large, the voltage drop is reduced as much as possible, and the power supply efficiency and the power supply effect are improved.

In some alternative implementations, the power supply to the wafer system may be implemented by providing a power supply partition. The power supply partition can be regarded as an area unit for providing power supply for the wafer system. And power supply is carried out on the wafer system based on the power supply subarea, so that the problem of voltage drop can be relieved, and the power supply efficiency and the power supply effect are improved.

In some alternative implementations, the power supply partition may be determined according to any one or more of the area, power consumption, power supply distance, and other influence factors.

For example, the area difference between the power supply sections is smaller than a preset area threshold, and/or the power consumption difference between the power supply sections is smaller than a preset power consumption threshold, and/or the distance between the connected power transmitting unit and the power receiving unit is smaller than a preset distance threshold.

In other words, the region of the wafer system that needs to be supplied with power can be divided into a plurality of regions more equally according to the area size, and each region is regarded as a power supply partition; the wafer system can also be divided into a plurality of areas according to the distribution condition of the power consumption in the wafer system, each area is used as a power supply subarea, and the power consumption of each power supply subarea is basically similar; the wafer system can be further divided into a plurality of areas according to the distance between the electric energy transmitting unit and the electric energy receiving unit, so that when the areas formed based on the dividing mode are used for supplying power, the distance between the connected electric energy transmitting unit and the connected electric energy receiving unit is smaller.

It should be noted that the shape of the power supply partition may be a regular shape or an irregular shape, which is not limited in the embodiment of the present disclosure.

Illustratively, the wafer system is divided into a plurality of regions, the areas of the regions are basically the same, any one region can be used as a power supply partition, at least one power receiving unit is arranged in the power supply partition and is connected with a corresponding power transmitting unit, so that power is provided for the power utilization chips in the power supply partition.

Illustratively, the wafer system is divided into a plurality of power supply partitions according to the power consumption of each chip in the wafer system, the power consumption of each power supply partition is basically consistent, and at least one power receiving unit is also arranged in each power supply partition and connected with a corresponding power transmitting unit, so as to provide power for the power utilization chips in the corresponding power supply partition. Wherein, the power consumption of the power supply partition is determined according to the power consumption of the power consumption chip in the power supply partition.

For example, when the power supply partitions are divided, the distance between the power transmitting unit and the power receiving unit is considered, so that the distance between the power transmitting unit and the power receiving unit connected to each other in each power supply partition is smaller than a preset distance threshold. The preset distance threshold may be set according to experience, statistical data, and the like, which is not limited in the embodiment of the present disclosure. Moreover, for different types of power supply connection modes, corresponding preset distance thresholds can be set.

Further, a more detailed preset distance threshold value can be set for different wireless power supply modes.

It should be noted that, when the power supply partitions are divided in an area-dividing manner, power consumption of each power supply partition may have a large difference, and therefore, the matching number of the power receiving units and the power transmitting units may be set according to the power consumption of each power supply partition.

For example, if the power consumption of the first power supply partition is 3 times that of the second power supply partition, 3 power receiving units and 3 power transmitting units are provided for the first power supply partition, and 1 power receiving unit and 1 power transmitting unit are provided for the second power supply partition. Moreover, the 3 power receiving units in the first power supply partition may be arranged in an evenly distributed manner.

In some optional implementations, after the power supply partitions are divided, the power supply can be performed on the basis of the power receiving units and the corresponding power transmitting units in the power supply partitions.

For example, a plurality of power supply partitions may be disposed in the wafer system, each power supply partition includes at least one power receiving unit, and the power receiving units in the power supply partitions provide power for the power supply partitions through the wirelessly connected power transmitting units. The wireless power supply method comprises the steps that at least one power receiving unit is arranged in each power supply partition, the power receiving unit is connected with a power transmitting unit, a wireless power supply link is established, and therefore power can be supplied to chips in the corresponding power supply partition based on the wireless power supply link.

Illustratively, the power transmitting unit and the power supply partition have a corresponding relationship (including one-to-one, one-to-many, many-to-one, and the like), and the power transmitting unit establishes a wireless power supply link with at least one power receiving unit in the power supply partition having the corresponding relationship, and provides power for the power supply partition based on the wireless power supply link.

The power supply device according to the embodiment of the present disclosure will be described below with reference to fig. 5 to 8.

Fig. 5 is a schematic diagram of a power supply device for a wafer system according to an embodiment of the disclosure. Referring to fig. 5, the wafer system includes a wafer processing apparatus 510, which is relatively uniformly divided into 10 power supply sections (shown by dotted lines), and four circuit boards for carrying external power are distributed on the upper, lower, left, and right sides of the wafer processing apparatus 510.

As shown in fig. 5, a power receiving unit and a power transmitting unit are disposed in each power supply partition, a wireless power supply link is established between the power receiving unit and the power transmitting unit, and the power transmitting unit is connected to a corresponding external power source in the circuit board to obtain power from the external power source.

The power supply partition 550 is taken as an example for explanation. As shown in fig. 5, in the power supply section 550, a power receiving unit 511 and a power transmitting unit 521 are provided, between which a wireless power supply link 530 is established, wherein the power transmitting unit 521 is connected to an external power supply 541 in the circuit board through a wired link 540, thereby obtaining power. The other power supply sections are powered in a similar manner to the power supply section 550 and will not be described further herein.

Fig. 6 is a schematic diagram of a power supply device for a wafer system according to an embodiment of the disclosure. Referring to fig. 6, in the power supply apparatus, a wafer processing apparatus 610 of a wafer system is relatively uniformly divided into 10 power supply sections (shown by dotted lines), four external circuit boards are distributed on the upper, lower, left, and right sides of the wafer processing apparatus 610, the wafer processing apparatus 610 and the external circuit boards are supported and fixed by a wafer stage 640, and a power receiving unit is disposed in each power supply section and connected to a corresponding power transmitting unit in the external circuit board to supply power to chips (not shown) in a current power supply section.

The external circuit board 620 and the power supply section 650 are explained as an example. As shown in fig. 6, the external circuit board 620 is provided with a power transmitting unit 621, a power receiving unit 611 is provided in the power supply partition 650 of the wafer processing apparatus 610, and a wireless power link 630 is established between the power transmitting unit 621 and the power receiving unit 611, so that the power receiving unit 611 can provide power for the chips in the power supply partition 650 through the wireless power link 630. The other power supply sections are similar to the power supply section 650 in power supply manner and will not be described herein.

As can be seen from fig. 5 and 6, the wafer system can be divided into a plurality of power supply zones more uniformly as required. The number and the area of the power supply partitions can be flexibly set according to experience, statistical data and requirements, and the embodiment of the disclosure does not limit the number and the area. For example, to ensure the power supply effect, the area of the power supply partition may be set to be relatively small, so as to ensure that the power receiving unit in each power supply partition can provide stable power for the corresponding power utilization chip. For another example, in consideration of reducing the cost of the device, the area of the power supply partition may be set to be relatively large, so as to reduce the number of the power receiving units, thereby achieving the effect of reducing the cost.

In addition to fig. 5 and 6, there are also various ways of dividing the power supply sections. Fig. 7 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure. Referring to fig. 7, in the power supply apparatus, for a wafer processing apparatus 710 of a wafer system, it is first divided into two semicircular regions based on a certain diameter, and each semicircular region is further divided into four small regions, so that the wafer processing apparatus 710 is relatively uniformly divided into 8 power supply sections (as indicated by dotted lines). Four external circuit boards are distributed on the upper left corner, the upper right corner, the lower left corner and the lower right corner of the wafer processing device 710, the wafer processing device 710 and the external circuit boards are supported and fixed by the wafer platform 740, and an electric energy receiving unit is arranged in each power supply partition, and each electric energy receiving unit is connected with a corresponding electric energy transmitting unit in the external circuit board to provide electric energy for chips (chips are not shown in the figure) in the current power supply partition.

The description will be made by taking the external circuit board 720 and the power supply section 750 as an example. As shown in fig. 7, the external circuit board 720 is provided with a power transmitting unit 721, a power receiving unit 711 is provided in the power supply partition 750 of the wafer processing apparatus 710, and a wireless power link 730 is established between the power transmitting unit 721 and the power receiving unit 711, so that the power receiving unit 711 can provide power to the chips in the power supply partition 750 through the wireless power link 730. The other power supply sections are powered in a similar manner to power supply section 750 and will not be described further herein.

In fig. 7, the distances between the power receiving units and the power transmitting units connected to each other are substantially the same, and compared with the case where one power receiving unit is disposed at the center of the wafer processing apparatus, the distances are effectively shortened (it can be considered that the distances are smaller than a preset distance threshold), so that the problems of voltage drop and the like can be alleviated.

Fig. 8 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure. Referring to fig. 8, in the power supply apparatus, a wafer processing apparatus 810 of a wafer system is relatively uniformly divided into 8 fan-shaped power supply partitions (shown by dotted lines), four external circuit boards 820 are distributed on the upper left corner, the upper right corner, the lower left corner and the lower right corner of the wafer processing apparatus 810, the wafer processing apparatus 810 and the external circuit boards 820 are supported and fixed by a wafer stage 840, and a power receiving unit is disposed in each power supply partition and connected to a corresponding power transmitting unit in the external circuit board 820 to supply power to chips (not shown in the drawings) in a current power supply partition.

The description will be made taking as an example the external circuit board 820 and the power supply partitions 851 and 852. As shown in fig. 8, the external circuit board 820 is provided with power transmitting units 821, 822, and 823, and the power supply partition 851 consumes twice as much power as the power supply partition 852, based on which one power receiving unit 811 is provided in the power supply partition 851, and a large number of power receiving units 812 and 813 are provided in the power supply partition 852. Further, the power transmitting unit 821 corresponds to the power supply partition 851, and is connected to the power receiving unit 811, and a wireless power supply link 831 is established between the power transmitting unit 821 and the power receiving unit 811, so that the power receiving unit 811 can provide power for the power utilization chips in the power supply partition 851 through the wireless power supply link 831. Similarly, the power transmitting units 822 and 823 correspond to the power supply partition 852, where the power transmitting unit 822 is connected with the power receiving unit 812, a wireless power supply link 832 is established between the power transmitting unit 823 and the power receiving unit 813, and a wireless power supply link 833 is established between the power transmitting unit 823 and the power receiving unit 813, so that the power receiving units 812 and 813 respectively supply power to the chips in the power supply partition 852 through the wireless power supply link 832 and the wireless power supply link 833. The other power supply partitions are supplied with power in a similar manner to the power supply partition 851, and will not be described herein.

It is understood that even in the power supply sections having the same shape and the same area, the number, distribution position, and the like of the power receiving units/power transmitting units may differ depending on power consumption and the like. Moreover, in a wafer system, different power supply partitions may be set and obtained based on different information (for example, a part of the power supply partitions is set in an area sharing manner, a part of the power supply partitions is set according to power consumption, and a part of the power supply partitions is set according to a preset distance threshold).

It should be noted that, the power receiving unit may be a chip prepared in a wafer, or may be an external chip packaged on the wafer, which is not limited in the embodiments of the present disclosure.

Fig. 9 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the present disclosure, in which a plurality of power receiving units 930 are manufactured in a chip manner and a plurality of power transmitting units (not shown) are disposed outside the wafer system 900. Wherein, a main functional area 910 and a plurality of auxiliary functional areas 921, 922, 923 and 924 are provided in the wafer system 900, and the distribution positions of the power receiving units 930 in the wafer system 900 can refer to fig. 9 (a), 9 (b) and 9 (c).

In fig. 9 (a), the power receiving units 930 are disposed in peripheral regions of the wafer system (i.e., corner regions except for the main functional region 910 and the auxiliary functional regions 921, 922, 923, 924), and power is supplied to the corresponding chips in the wafer system 900 and/or the chips in the corresponding power supply section through the connected power transmitting units. In the wafer system manufacturing process, the electrical connection between the power receiving unit and the chip in the area where the power receiving unit is responsible for supplying power may be established through a ReDistribution Layer (RDL).

In the related art, since the areas of the peripheral regions are small and the shapes are generally irregular, the main functional chips and the auxiliary functional chips may not be arranged, thereby easily causing waste of the wafer. In the embodiment of the disclosure, the electric energy emitting unit is arranged on the peripheral area of the wafer system, so that the wafer utilization rate is improved and the waste area of the wafer is reduced while the electric energy supply is provided for the wafer system.

In fig. 9 (b), the power receiving unit 930 is disposed in the functional area (including the main functional area 910 and/or the auxiliary functional areas 921, 922, 923, 924) of the wafer system, and provides power to the corresponding chip in the wafer system 900 and/or the chip in the corresponding power supply partition through the connected power transmitting unit.

For example, one power receiving unit may be provided in each chip of the functional region, or one power receiving unit may be shared by a plurality of chips. If one power receiving unit is arranged in each chip, the power receiving unit and the chips can be electrically connected through the wiring layer, and if a plurality of chips share one power receiving unit, the power receiving unit and the chips can be electrically connected through the RDL.

In fig. 9 (c), a part of the power receiving unit 930 is disposed in a peripheral region of the wafer system 900, and a part of the power receiving unit 930 is disposed in a functional region of the wafer system. Similarly, each power receiving unit 930 may provide power to a corresponding chip in the wafer system 900 and/or a chip in a corresponding power supply partition through the connected power transmitting unit. Through the arrangement mode, on one hand, the electric energy receiving units can be more uniformly distributed in the wafer system, so that the problem of pressure drop is relieved, on the other hand, the corner area of the wafer system is fully utilized, and the utilization rate of wafers is improved.

In some alternative implementations, in order to enable the chips in the wafer system to reliably receive the power supply in consideration of the yield of the chips, the power receiving unit may be arranged in a hybrid manner. The hybrid mode means that one power receiving unit can supply power to a plurality of chips or a plurality of power supply partitions, and the chips of power supplied by different power receiving units can be crossed (that is, the same chip can correspond to a plurality of power receiving units, and one of the chips is used as a power supply source), or the power supply partitions between different power receiving units can be crossed (the power supply partitions have overlapping parts, and the overlapping parts correspond to a plurality of power receiving units, and one of the overlapping parts is used as a power supply source). In other words, certain "redundancy" is set for the power receiving unit, so that in the event of a failure or other emergency, the wafer system can still obtain stable and reliable power supply through the preset "redundancy".

In some optional implementation manners, in order to control and adjust the redundancy condition in the hybrid manner, corresponding switches may be provided to control and adjust the corresponding relationship between the power receiving unit and the chip, and between the power receiving unit and the power supply partition through the off and on states of the switches.

In some optional implementations, a power management device may be provided for the wafer system, and the power management device may reconfigure a power supply partition of the power receiving unit and/or a chip connected to the power receiving unit according to power conditions of the power transmitting unit and the power receiving unit, a chip failure (for example, whether a chip corresponding to the power receiving unit fails or not, whether a chip connected to the power receiving unit fails or not), and the like.

For example, the power management device may adjust the power supply relationship in time by controlling the pairing relationship between the power transmitting unit and the power receiving unit, the corresponding relationship between the power receiving unit and the power supply partition, and the connection relationship between the power receiving unit and the chip, so as to ensure that the wafer system can stably and reliably obtain power supply.

For example, if the power consumption of a certain power supply partition z1 is reduced from P1 to P2 (the power consumption reduction may be caused by a chip failure, or may be caused by other reasons, without limitation), and the power consumption of another power supply partition z2 is increased from P3 to P4, and P1 is closer to P4, and P2 is closer to P3, the power management device may exchange the pairing relationship between the two power supply partitions and the electric energy receiving unit, so that the electric energy receiving unit that originally supplies power to the power supply partition z1 supplies power to the power supply partition z2, and the electric energy receiving unit that originally supplies power to the power supply partition z2 supplies power to the power supply partition z 1.

For example, if at least one of the plurality of power receiving units supplying power to a certain power supply partition fails, the power receiving unit with redundant power supply may be configured to supply power to the current power supply partition, so as to guarantee power supply to the current power supply partition.

For example, if the power consumption of a certain power supply partition is reduced, the number of power receiving units supplying power to the power supply partition can be reduced in an equal proportion manner.

The wireless connection between the power transmitting unit and the power receiving unit includes an electromagnetic induction connection, a magnetic resonance connection, a radio wave connection, an electric field coupling connection, and the like. For the same wafer system, the connection mode between the power receiving unit and the power transmitting unit includes any one or more of the above wireless connection modes, which is not limited in the embodiments of the present disclosure.

It should also be noted that, in some alternative implementations, the power transmitting unit and the power receiving unit may also use a wired connection to establish a power supply link. The wafer system is powered by a wired power transmission mode, and energy needs to be transmitted in an electric direct contact mode.

In some optional implementations, the power receiving unit includes a wired power receiving unit, the power transmitting unit includes a wired power transmitting unit, and the power supply link is a wired power supply link; correspondingly, a wired power supply link is established between the wired electric energy transmitting unit and the wired electric energy receiving unit through a power line. The power line is an electric wire for transmitting current, and includes various types of cables having a conductive property, which is not limited in the embodiments of the present disclosure.

Illustratively, a power supply line or a cable is connected between the power transmitting unit and the power receiving unit in a wire bonding manner, and a wired power supply link is established between the power transmitting unit and the power receiving unit based on the power supply line or the cable.

Fig. 10 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure. Referring to fig. 10, in the power supply apparatus, a wafer system includes a wafer processing apparatus 1010 and is provided with external circuit boards 1021 and 1022.

As shown in fig. 10, a wireless power transmitting unit 10211 is disposed on the external circuit board 1021, and a wireless power link 1031 is established between the wireless power transmitting unit and the wireless power receiving unit 10102 on the wafer processing apparatus 1010, so as to provide power to the corresponding chip based on the wireless power link 1031 (e.g., provide power to the chip connected to the wireless power receiving unit 10102, or provide power to the chip less than a preset distance threshold from the wireless power receiving unit 10102). Similarly, a wired power transmitting unit 10221 is disposed on the external circuit board 1022, and a wired power link 1032 is established between the wired power transmitting unit and a wired power receiving unit 10101 on the wafer processing apparatus 1010, so as to provide power to the corresponding chip based on the wired power link 1022.

In some optional implementation manners, the external circuit board and the wafer processing device may be arranged in a face-to-face manner, so that the distance between the electric energy transmitting unit and the electric energy receiving unit may be reduced, the length of the power supply link is shortened, the voltage drop is reduced, and the power supply efficiency is improved.

Fig. 11 is a schematic diagram of a power supply apparatus for a wafer system according to an embodiment of the disclosure. Referring to fig. 11, in the power supply apparatus, the wafer system includes a wafer processing apparatus 1110, and two external circuit boards 1121 and 1122 are further provided, and the external carrying platform 1140 is used for carrying and fixing the external circuit boards 1121 and 1122.

As shown in fig. 11, the external circuit boards 1121, 1122 are disposed under the external carrying platform 1140, and face the wafer processing apparatus 1110. The external circuit board 1121 is provided with a wired power transmitting unit 11211, the wafer processing apparatus 1110 is provided with a power receiving unit 11101, and a wired power link 1131 is established between the wired power transmitting unit 11211 and the power receiving unit 11101, so that the power receiving unit 11101 can provide the received power to the corresponding power utilization chip. Similarly, a wireless power transmitting unit 11221 is disposed in the external circuit board 1122, and a power receiving unit 11102 is disposed in the wafer processing apparatus 1110, and a wireless power link 1132 is established between the two units, so that the power receiving unit 11102 can provide the received power to the corresponding power utilization chip. As can be seen from fig. 10 and 11, compared to the case where the external circuit board and the wafer processing apparatus are disposed on the same plane, the facing-to-face manner can reduce the distance between the power transmitting unit and the power receiving unit to a certain extent, thereby reducing the voltage drop and improving the power supply efficiency and the power supply effect.

It should be understood that the above power supply device is only an example, and in practical applications, the position of the external circuit board may be determined according to the distribution position of each functional unit in the wafer system, the size of the external circuit board, the connection relationship and the connection manner between the external circuit board and the wafer system, and the like, which is not limited in the embodiment of the present disclosure.

It should be noted that, in the schematic diagram of the embodiment of the present disclosure, the power supply link is only used to represent the connection relationship between the power transmitting unit and the power receiving unit, and is not used to define the actual routing manner and the link shape of the power supply link. In practical application, the positions and shapes of the wires can be set according to actual requirements so as to establish a power supply link between the corresponding electric energy transmitting unit and the corresponding electric energy receiving unit.

It should be emphasized that, in a wafer system, both the wireless power supply method and the wired power supply method may exist, or only one of them may exist, and any one or more of an electromagnetic induction type, a magnetic field resonance type, a radio wave type, and an electric field coupling type may be adopted for the wireless power supply method, and the wired power supply method is similar to it, and will not be described herein again.

A second aspect of the embodiments of the present disclosure provides a power supply method.

Fig. 12 is a flowchart of a power supply method according to an embodiment of the disclosure, where the power supply method is applicable to a wafer system, and the wafer system is connected to at least one power receiving unit. Referring to fig. 12, the power supply method includes:

in step S121, a wireless power supply link between the power receiving unit and the at least one power transmitting unit is established.

In step S122, the power of the power transmitting unit is transmitted to the power receiving unit based on the wireless power supply link, and the received power is provided to the wafer system by the power receiving unit.

In some alternative implementations, the wafer system includes at least one wafer processing device prepared based on unsingulated wafers.

In some optional implementation manners, considering that the chip integration level in the wafer system is high, if the conventional routing manner is still used for supplying power, power consumption is high, and a heating phenomenon is serious, so that the operation of the wafer system is affected. Therefore, the wafer system can be divided into a plurality of power supply zones according to the area shape, the chip distribution condition, the power consumption and the like of the wafer system, each power supply zone comprises at least one electric energy receiving unit and at least one chip, and a wireless power supply link is arranged between each electric energy receiving unit and at least one electric energy transmitting unit, so that the chips in the power supply zone where the electric energy receiving unit is located are supplied with electric energy through the wireless power supply link.

The wafer system is powered by a wireless power transmission mode when a power supply link is established based on a wireless connection mode, and energy can be transmitted without direct electrical contact. The wireless connection includes an electromagnetic induction type, a magnetic field resonance type, a radio wave type, an electric field coupling type, and the like, which is not limited in the embodiment of the present disclosure.

For the dividing manner of the power supply partition, the distribution of the power receiving units and the power transmitting units, etc., reference may be made to the foregoing related matters, and a description thereof will not be repeated.

A third aspect of the embodiments of the present disclosure provides a processing method.

Fig. 13 is a flowchart of a processing method applicable to a wafer system according to an embodiment of the disclosure. Referring to fig. 12, the processing method includes:

in step S131, in response to the received task processing request, the task to be processed is executed.

In some possible implementations, the task processing request is used to instruct the wafer system to perform a pending task based on the wafer processing device and/or the external circuit board. The task to be processed comprises any one of an image processing task, a voice processing task, a text processing task and a video processing task.

It should be noted that, the above to-be-processed task is only an example, and the to-be-processed task is not limited by the embodiment of the present disclosure.

It should be further noted that the electric energy required by the wafer system during the process of executing the task to be processed is transmitted to the electric energy receiving unit by the corresponding electric energy transmitting unit, and is further transmitted to the corresponding chip by the electric energy receiving unit.

It is understood that the above-mentioned method embodiments of the present disclosure can be combined with each other to form a combined embodiment without departing from the logic of the principle, which is limited by the space, and the detailed description of the present disclosure is omitted. Those skilled in the art will appreciate that in the above methods of the specific embodiments, the specific order of execution of the steps should be determined by their function and possibly their inherent logic.

In addition, the present disclosure also provides an electronic device and a computer-readable storage medium, which can be used to implement any one of the processing methods provided by the present disclosure, and the descriptions of the corresponding technical solutions and the corresponding descriptions with reference to the method parts are not repeated.

Fig. 14 is a block diagram of an electronic device provided in an embodiment of the present disclosure.

Referring to fig. 14, an embodiment of the present disclosure provides an electronic device including: at least one processor 1401; at least one memory 1402, and one or more I/O interfaces 1403 connected between the processor 1401 and the memory 1402; the memory 1402 stores one or more computer programs executable by the at least one processor 1401, and the one or more computer programs are executed by the at least one processor 1401 to enable the at least one processor 1401 to perform the processing methods described above.

In other words, the electronic device is a hardware system corresponding to the wafer system in the embodiment of the present disclosure, and may be prepared based on a complete uncut wafer or other functional units, and the power supply method according to any one of the embodiments of the present disclosure provides electric energy to the wafer system, so that the wafer system may be used to execute any one task to be processed.

Fig. 15 is a block diagram of an electronic device provided in an embodiment of the present disclosure.

Referring to fig. 15, an embodiment of the present disclosure provides an electronic device including a plurality of processing cores 1501 and a network on chip 1502, where the plurality of processing cores 1501 are all connected to the network on chip 1502, and the network on chip 1502 is configured to interact data between the plurality of processing cores and external data.

One or more instructions are stored in the one or more processing cores 1501 and executed by the one or more processing cores 1501 to enable the one or more processing cores 1501 to perform the processing methods described above.

In some alternative implementations, a plurality of processing cores may be prepared on a complete uncut wafer, and the power supply method according to any one of the embodiments of the present disclosure supplies power to the wafer system, so that the wafer system can be used to perform any one of the tasks to be processed.

In some embodiments, the electronic device may be a brain-like chip, since the brain-like chip may adopt a vectorization calculation manner, and needs to call in parameters such as weight information of the neural network model through an external memory, for example, a Double Data Rate (DDR) synchronous dynamic random access memory. Therefore, the operation efficiency of batch processing is high in the embodiment of the disclosure.

The disclosed embodiments also provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor/processing core, implements the processing method described above. The computer readable storage medium may be a volatile or non-volatile computer readable storage medium.

The disclosed embodiments also provide a computer program product, which includes computer readable code or a non-volatile computer readable storage medium carrying computer readable code, when the computer readable code runs in a processor of an electronic device, the processor in the electronic device executes the processing method.

It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable storage media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).

Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purposes of limitation. In some instances, features, characteristics and/or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics and/or elements described in connection with other embodiments, unless expressly stated otherwise, as would be apparent to one skilled in the art. Accordingly, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the disclosure as set forth in the appended claims.

Claims (12)

1. A power supply apparatus for a wafer system, comprising: the wafer system comprises at least one electric energy transmitting unit and at least one electric energy receiving unit connected with the wafer system;

the electric energy transmitting unit and at least one electric energy receiving unit establish a wireless power supply link based on a wireless connection mode, electric energy is transmitted to the electric energy receiving unit based on the wireless power supply link, and the electric energy receiving unit provides the received electric energy for the wafer system.

2. The power supply device according to claim 1, characterized by comprising: the wafer system comprises at least one wafer processing device, wherein the wafer processing device is a processing device prepared based on unsegmented wafers;

the wafer processing device comprises at least one main function area and a plurality of auxiliary function areas, wherein the main function area comprises a plurality of main function chips distributed in an array mode, and the auxiliary function areas comprise at least one auxiliary function chip.

3. The power supply device according to claim 2, wherein the wafer system further comprises at least one external chip packaged on the wafer processing device, and the power receiving unit is disposed on the wafer processing device and/or the external chip.

4. The power supply device according to claim 1, wherein the power receiving units are uniformly distributed in the wafer system and provide power for chips which are less than a preset threshold away from the power receiving units;

and/or the presence of a gas in the atmosphere,

each chip of the wafer system is provided with at least one electric energy receiving unit, and the electric energy receiving unit is used for providing electric energy for the chip.

5. The power supply device according to claim 1, characterized by comprising: the wafer system is provided with a plurality of power supply subareas, each power supply subarea comprises at least one electric energy receiving unit, and the electric energy receiving units in the power supply subareas supply electric energy to the power supply subareas through wirelessly connected electric energy transmitting units.

6. The power supply device according to claim 5, characterized by comprising: the electric energy emission units are distributed in an area outside the wafer system, and/or the electric energy emission units are distributed on the wafer system;

the electric energy transmitting unit and the power supply subarea have a corresponding relation, a wireless power supply link is established between the electric energy transmitting unit and at least one electric energy receiving unit in the power supply subarea with the corresponding relation, and electric energy is provided for the power supply subarea based on the wireless power supply link.

7. The power supply device according to claim 5 or 6, wherein an area difference between the power supply sections is smaller than a preset area threshold, and/or a power consumption difference between the power supply sections is smaller than a preset power consumption threshold, and/or a distance between the connected power transmitting unit and the power receiving unit is smaller than a preset distance threshold.

8. The power supply device as claimed in claim 6, wherein the power transmitting units are distributed on the wafer system, and comprise:

the electric energy transmitting unit is prepared on at least one chip of the wafer system, and/or the electric energy transmitting unit is an independent chip prepared in a preset area of the wafer system.

9. The power supply device according to claim 1, wherein the power transmitting unit is connected to at least one external power source by a wired manner to obtain power from the external power source.

10. The power supply device according to claim 1, characterized by comprising: the wireless power supply link is established between the electric energy receiving unit and the electric energy receiving unit through at least one of an electromagnetic induction type, a magnetic field resonance type, a radio wave type and an electric field coupling type.

11. A power supply method is applied to a wafer system, wherein the wafer system is connected with at least one power receiving unit, and the power supply method comprises the following steps:

establishing a wireless power supply link between the electric energy receiving unit and at least one electric energy transmitting unit;

and transmitting the electric energy of the electric energy transmitting unit to the electric energy receiving unit based on the wireless power supply link, and providing the received electric energy to the wafer system by the electric energy receiving unit.

12. A processing method applied to a wafer system is characterized by comprising the following steps:

responding to the received task processing request, and executing the task to be processed;

the task to be processed comprises at least one of an image processing task, a voice processing task, a text processing task and a video processing task.

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