JP7394274B2 - probe card - Google Patents

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Publication number
JP7394274B2
JP7394274B2 JP2020195544A JP2020195544A JP7394274B2 JP 7394274 B2 JP7394274 B2 JP 7394274B2 JP 2020195544 A JP2020195544 A JP 2020195544A JP 2020195544 A JP2020195544 A JP 2020195544A JP 7394274 B2 JP7394274 B2 JP 7394274B2
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circuit board
probe card
probe
accommodation space
connection
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JP2021144023A (en
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林丈▲トウ▼
陳俊吉
李宗潤
盧彦宏
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SYNC−TECH SYSTEM CORPORATION
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SYNC−TECH SYSTEM CORPORATION
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07314—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07371—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate card or back card with apertures through which the probes pass
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433—Sockets for IC's or transistors
    • G01R1/0441—Details
    • G01R1/0466—Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Polishing Bodies And Polishing Tools (AREA)

Description

本発明は、プローブカードに関し、特に、回路基板の表面に電子部品を有するプローブカードに関する。 The present invention relates to a probe card, and particularly to a probe card having electronic components on the surface of a circuit board.

集積回路装置の製造において、電気的試験は、ダイカッティング又はデバイスパッケージングの前に実施される。試験プロセスは、通常プローブカード（Probe Card）を使用することによって、試験機（Tester）から被試験装置（Device Under Testing :DUT）に、電力及び試験信号を伝送することによって達成される。このようにして、被試験装置（DUT）の試験を行うことが可能である。 In the manufacture of integrated circuit devices, electrical testing is performed prior to die cutting or device packaging. The testing process is typically accomplished by using a probe card to transmit power and test signals from a tester to a device under test (DUT). In this way, it is possible to test a device under test (DUT).

図５は、従来のプローブカードを示す。このプローブカードは、いくつかの第１の接続部９１及び第２の接続部９２を有するプリント回路基板９を備える。接続構造は、一般にポゴピン（Pogo Pin）として知られ、試験機（Tester）と、プリント回路基板９における外周側にある第１の接続部９１とを電気的に接続する。プリント回路基板９における内周側にある第２の接続部９２は、プローブ針Ｐに電気的に接続される。プローブ針Ｐは、プローブ保持部材によりプリント配線板９に固定される。プローブ針Ｐは、被試験装置の下方にある試験パッド（Testing pad）に接続されてもよい。 FIG. 5 shows a conventional probe card. This probe card comprises a printed circuit board 9 with several first connections 91 and second connections 92. The connection structure is generally known as a pogo pin, and electrically connects the tester and the first connection portion 91 on the outer peripheral side of the printed circuit board 9. A second connecting portion 92 on the inner circumferential side of the printed circuit board 9 is electrically connected to the probe needle P. Probe needle P is fixed to printed wiring board 9 by a probe holding member. The probe needle P may be connected to a testing pad below the device under test.

プリント回路基板９の領域９’の部分拡大図を示す図６も参照する。一般的に、トランジスタやダイオードなどの能動部品、又は抵抗器やコンデンサなどの受動部品であっても、電子部品１をプリント回路基板９に実装する必要がある。プリント回路基板９は、通常、多層の回路基板を含む。プリント回路基板９には、各構成要素を接続するための電線９３又は貫通孔９４が装備されている。プリント回路基板９の両面には、第１の表面と第２の表面とがある。第２の表面９ｂは、被試験装置を含むウェハに対向するので、第２の表面９ｂには、電子部品１を実装することができない。したがって、電子部品１は、試験機に対向する第１の表面９ａに実装される。プリント回路基板９における第１の接続部９１の外側の領域Ａは、第１の接続部９１によって分離されていることから、電子部品１を収容することが困難である。一方、プリント回路基板９における第２の接続部９２の内側の領域Ｂも、通常、多数のプローブ針の配線のために使用されるので、電子部品１を収容することが困難である。 Reference is also made to FIG. 6 , which shows a partially enlarged view of area 9' of printed circuit board 9. Generally, it is necessary to mount the electronic component 1 on the printed circuit board 9, whether it is an active component such as a transistor or a diode, or a passive component such as a resistor or capacitor. Printed circuit board 9 typically includes a multilayer circuit board. The printed circuit board 9 is equipped with electric wires 93 or through holes 94 for connecting each component. Both sides of printed circuit board 9 have a first surface and a second surface. Since the second surface 9b faces the wafer containing the device under test, the electronic component 1 cannot be mounted on the second surface 9b. Therefore, the electronic component 1 is mounted on the first surface 9a facing the testing machine. Since the area A outside the first connection part 91 on the printed circuit board 9 is separated by the first connection part 91, it is difficult to accommodate the electronic component 1 therein. On the other hand, since the region B inside the second connection portion 92 on the printed circuit board 9 is also normally used for wiring a large number of probe needles, it is difficult to accommodate the electronic component 1 therein.

つまり、プローブカードにおいて電子部品１を実装することが可能な領域は、プリント回路基板９の第１の表面９ａにおける第１の接続部９１と第２の接続部９２との間に位置する部分である。このことは、より複雑且つより多くの電子部品要素を必要とする現在のＩＣチップにおいても当てはまることである。現在のＩＣチップでは、チップ試験のために、プローブカードが多くの入出力信号、高速な動作、又は機能性の増大といった要求に応えなければならない。 In other words, the area in which the electronic component 1 can be mounted on the probe card is the portion located between the first connection part 91 and the second connection part 92 on the first surface 9a of the printed circuit board 9. be. This is also true of current IC chips, which are more complex and require more electronic components. In modern IC chips, probe cards must meet the demands of more input/output signals, faster operation, or increased functionality for chip testing.

要するに、半導体技術の進化による基本的な要求を満たすためには、プリント回路基板９上において、電子部品１を実装するために利用可能な領域がなくなってきている。この問題を解決するために、改良されたプローブカードを提供することが緊急に必要とされている。 In short, in order to meet the basic requirements due to the evolution of semiconductor technology, the area available for mounting the electronic component 1 on the printed circuit board 9 is running out. To solve this problem, there is an urgent need to provide an improved probe card.

本発明の目的は、試験機と多数のプローブ針とを接続するためのプローブカードを提供することにある。本発明のプローブカードは、軸方向の両面に第１の表面及び第２の表面を有する回路基板を備える。前記回路基板は、複数の第１の接続部及び複数の第２の接続部を有する。前記第１の接続部は、前記試験機に電気的に接続される。前記第２の接続部は、プローブ針に電気的に接続される。前記第１の表面は、前記試験機の方向に対向する。前記第２の表面は、前記プローブ針の方向に対向する。前記回路基板は、前記第２の表面に収容スペースを備え、前記収容スペースに電子部品が配置される。 An object of the present invention is to provide a probe card for connecting a testing machine and a large number of probe needles. The probe card of the present invention includes a circuit board having a first surface and a second surface on both sides in the axial direction. The circuit board has a plurality of first connection parts and a plurality of second connection parts. The first connection part is electrically connected to the test machine. The second connection part is electrically connected to the probe needle. The first surface faces the direction of the testing machine. The second surface faces the direction of the probe needle. The circuit board includes an accommodation space on the second surface, and an electronic component is arranged in the accommodation space.

上記回路基板において前記プローブ針に対向した前記第２の表面に、前記電子部品を収容するための前記収容スペースを設けることによって、上記電子部品を実装するための領域が不足するという問題を効果的に解決できる。これにより、より多く又はより大きな電子部品を収容することが可能であり、同時に、回路基板上において前記電子部品がスペースをとり過ぎることを防ぎ、利用可能な表面をより大きくさせるに至る。 By providing the accommodation space for accommodating the electronic component on the second surface facing the probe needle in the circuit board, the problem of insufficient area for mounting the electronic component can be effectively solved. can be solved. This makes it possible to accommodate more or larger electronic components, while at the same time preventing said electronic components from taking up too much space on the circuit board, leading to a larger available surface area.

本発明の第１の実施形態に係るプローブカードの断面構造を部分的に拡大した概略図である。FIG. 1 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a first embodiment of the present invention. 本発明の第２の実施形態に係るプローブカードの断面構造の部分拡大模式図である。FIG. 3 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a second embodiment of the present invention. 本発明の第２の実施形態に係るプローブカードの構成要素の関係を示す概略図である。FIG. 7 is a schematic diagram showing the relationship between components of a probe card according to a second embodiment of the present invention. 本発明の第２の実施形態に係るプローブカードの別の構成要素関係の概略図である。FIG. 6 is a schematic diagram of another component relationship of the probe card according to the second embodiment of the present invention. 本発明の第３の実施形態に係るプローブカードの断面構造の部分拡大模式図である。FIG. 7 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a third embodiment of the present invention. 本発明の第４の実施形態に係るプローブカードの断面構造の部分拡大模式図である。FIG. 7 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a fourth embodiment of the present invention. 従来のプローブカードの断面構造を示す概略図である。1 is a schematic diagram showing a cross-sectional structure of a conventional probe card. 従来のプローブカードの断面構造を部分的に拡大した概略図である。FIG. 2 is a partially enlarged schematic diagram of a cross-sectional structure of a conventional probe card.

特定の用語は、明細書及び特許請求の範囲中において、特定の装置を示すために使用される。しかし、本発明の技術分野における通常の知識を有する者によって、以下のことが理解されるべきである。即ち、製造業者は、同じ装置に対して異なる用語を使用することもある。また、明細書及び特許請求の範囲において、装置どうしを区別する手段として、名称に基づいて区別する方法は使用せず、装置の全体的な技術的利点によって、区別の基準は異なる。本説明及び本申請における「含む」という用語は、自由に変更可能な用語であるものとして引用され、「制限なしに含む」と解釈される。更に、本文中の「接続」という文言は、直接的及び間接的な手段による接続の両方を含むものとする。従って、本文中で第１の装置が第２の装置に接続されていると記述されている場合、それは、第１の装置が第２の装置に直接接続されていること、あるいは、他の装置又は第２の装置に間接的に接地された他の接続手段を介して、第２の装置に接続されていることを意味する。 Specific terms are used in the specification and claims to refer to specific devices. However, the following should be understood by one of ordinary skill in the art of the present invention. That is, manufacturers may use different terms for the same device. Further, in the specification and claims, a method of distinguishing devices based on names is not used as a means of distinguishing devices from each other, and the criteria for distinguishing the devices differs depending on the overall technical advantages of the devices. The term "comprising" in this description and in this application is quoted as being a freely variable term and is to be interpreted as "including without limitation." Furthermore, the term "connection" in this text shall include both direct and indirect means of connection. Therefore, when the text states that a first device is connected to a second device, it does not mean that the first device is directly connected to a second device, or that the first device is connected to a second device. or connected to the second device via other connection means that are indirectly grounded to the second device.

図１を参照して、本発明の第１の実施形態について説明する。図１は、第１の実施形態に係るプローブカードの断面構造を部分的に拡大した概略図を示す。第１の表面２ａは、試験機に対向している。第２の表面２ｂは、プローブ針（図示省略）に対向している。回路基板２は、複数の第１の接続部２１と、複数の第２の接続部２２とを有している。回路基板２には、各構成要素に接続するための電線２３又は貫通孔２４が設けられている。第１の接続部２１は、回路基板２の径方向の外側に配置されている。第１の接続部２１は、通常ポゴピンとして知られている接続構造Ｔを介して、試験機を電気的に接続するために、第１の表面２ａに露出する。第２の接続部２２は、回路基板２の径方向の内側に配置されている。第２の接続部２２は、プローブ針を電気的に接続するために、少なくとも第２の表面２ｂ上に露出している。回路基板２は、第２の表面２ｂ上に１つ以上の収容スペースＲを有している。収容スペースＲは、電子部品１を収容するために用いられる。 A first embodiment of the present invention will be described with reference to FIG . FIG. 1 shows a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a first embodiment. The first surface 2a faces the testing machine. The second surface 2b faces a probe needle (not shown). The circuit board 2 has a plurality of first connection parts 21 and a plurality of second connection parts 22. The circuit board 2 is provided with electric wires 23 or through holes 24 for connecting to each component. The first connecting portion 21 is arranged on the outside of the circuit board 2 in the radial direction. A first connection 21 is exposed on the first surface 2a for electrically connecting the test machine via a connection structure T, commonly known as a pogo pin. The second connecting portion 22 is arranged inside the circuit board 2 in the radial direction. The second connecting portion 22 is exposed on at least the second surface 2b in order to electrically connect the probe needle. The circuit board 2 has one or more accommodation spaces R on the second surface 2b. The accommodation space R is used to accommodate the electronic component 1.

具体的には、本実施形態において、回路基板２は、複数層のプリント回路基板からなる。即ち、回路基板２は、第１の回路基板２５、第２の回路基板２６、及び第３の回路基板２７がそれぞれ複数積層されて構成される。第１の回路基板２５は、試験機に対向する第１の表面２ａを有する。第３の回路基板２７は、プローブ針に対向する第２の表面２ｂを有する。収容スペースＲは、プローブカードの外形に沿った円形状の溝で形成されてもよいし、長方形、円形、又は楕円形の開口により形成されてもよい。更に、収容スペースＲは、第２の接続部２２の径方向の外側に配置されることが好ましい。 Specifically, in this embodiment, the circuit board 2 is composed of a multilayer printed circuit board. That is, the circuit board 2 is configured by laminating a plurality of first circuit boards 25, second circuit boards 26, and third circuit boards 27, respectively. The first circuit board 25 has a first surface 2a facing the tester. The third circuit board 27 has a second surface 2b facing the probe needle. The accommodation space R may be formed by a circular groove along the outer shape of the probe card, or may be formed by a rectangular, circular, or elliptical opening. Furthermore, it is preferable that the accommodation space R is arranged on the outside of the second connecting portion 22 in the radial direction.

収容スペースＲは、第３の回路基板２７を軸方向に入り込んでいてもよい。それゆえに、第１の実施形態では、収容スペースＲ内において、第２の回路基板２６の表面に電子部品１を配置することができる。ただし、本発明は、この構成に限定されるものではない。電子部品１は、回路基板２の電線２３又は貫通孔２４を介して、他の部品に接続される。 The accommodation space R may extend into the third circuit board 27 in the axial direction. Therefore, in the first embodiment, the electronic component 1 can be placed on the surface of the second circuit board 26 within the accommodation space R. However, the present invention is not limited to this configuration. The electronic component 1 is connected to other components via electric wires 23 or through holes 24 of the circuit board 2.

このようにして、本発明の第１の実施形態に係るプローブカードは、回路基板２の第２の表面２ｂに、電子部品１を実装するための収容スペースＲを設けることにより、上記した問題を効果的に解決できる。即ち、電子部品１を実装可能な領域が第１の表面９ａの部分のみであるというプローブカードの問題が解決される。これにより、より多く又は大きな電子部品を実装することが可能である。また、本発明の第１の実施形態は、電子部品１により占められる回路基板２の面積を減少させて、回路基板２において使用可能な表面をより大きくできる。 In this way, the probe card according to the first embodiment of the present invention solves the above-mentioned problem by providing the accommodation space R for mounting the electronic component 1 on the second surface 2b of the circuit board 2. Can be solved effectively. That is, the problem of the probe card that the area where the electronic component 1 can be mounted is only on the first surface 9a is solved. This makes it possible to mount more or larger electronic components. Additionally, the first embodiment of the present invention can reduce the area of the circuit board 2 occupied by the electronic component 1, making the usable surface of the circuit board 2 larger.

図２を参照して、本発明の第２の実施形態について説明する。図２は、第２の実施形態２に係るプローブカードの断面構造を部分的に拡大した概略図である。図２に示すように、回路基板２は、複数層のプリント回路基板（例えば、互いに積層された複数の第１の回路基板２５及び第２の回路基板２６）を含むことに加えて、回路基板２の第２の表面２ｂに、プリント回路基板と同じ材料にすることが可能な高さ調整板２８が設けられている点が、第１の実施形態とは異なる。高さ調整板２８は、予め規定されたプローブカードの仕様に一致するように、回路基板２の軸方向の高さを大きくする設計となっている。高さ調整板２８は、収容スペースＲを形成するために、隙間を保ちながら第２の表面２ｂと組み合わせてもよい。また、収容スペースＲは、電子部品１を実装するために用いられる。 A second embodiment of the present invention will be described with reference to FIG. FIG. 2 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a second embodiment. As shown in FIG. 2 , the circuit board 2 includes a plurality of layers of printed circuit boards (e.g., a plurality of first circuit boards 25 and second circuit boards 26 stacked on each other), as well as a circuit board This embodiment differs from the first embodiment in that a height adjustment plate 28, which can be made of the same material as the printed circuit board, is provided on the second surface 2b of the second embodiment. The height adjustment plate 28 is designed to increase the height of the circuit board 2 in the axial direction so as to match the predefined specifications of the probe card. The height adjustment plate 28 may be combined with the second surface 2b while maintaining a gap to form the accommodation space R. Moreover, the accommodation space R is used for mounting the electronic component 1.

次に、図２Ａも参照する。図２Ａは、本発明の第２の実施形態に係るプローブカードの構成要素の関係を示す概略図である。この実施例では、回路基板２は、いくつかのキャビティＲを備えている。異なるキャビティに配置された各電子部品１は、回路基板２（第２の回路基板２６等）の電線２３又は貫通孔２４を介し、互いに接続されている。一方、図２Ｂは、本発明の第２の実施形態に係るプローブカードの構成要素の関係を示す他の概略図である。収容スペースＲに配置された電子部品１と、回路基板２の第１の表面２ａ上の電子部品１とは、第１の回路基板２５及び第２の回路基板２６の電線２３又は貫通孔２４を介して、接続することができる。その結果、第２の実施形態のプローブカードは、電子部品１の実装自由度を効果的に増大させることができ、加えて、電子部品１のための収容スペースＲを設けることができる。 Next, also refer to FIG. 2A . FIG. 2A is a schematic diagram showing the relationship of components of a probe card according to a second embodiment of the present invention. In this embodiment, the circuit board 2 comprises several cavities R. The electronic components 1 arranged in different cavities are connected to each other via electric wires 23 or through holes 24 of the circuit board 2 (second circuit board 26, etc.). On the other hand, FIG. 2B is another schematic diagram showing the relationship between the components of the probe card according to the second embodiment of the present invention. The electronic component 1 placed in the accommodation space R and the electronic component 1 on the first surface 2a of the circuit board 2 are connected to the electric wire 23 or the through hole 24 of the first circuit board 25 and the second circuit board 26. You can connect via. As a result, the probe card of the second embodiment can effectively increase the degree of freedom in mounting the electronic component 1, and in addition, can provide an accommodation space R for the electronic component 1.

本発明の第３の実施形態について、図３を参照して説明する。図３は、本発明の第３の実施形態に係るプローブカードの断面構造を部分的に拡大した概略図である。図３に示すように、第３の実施形態の回路基板２は、プリント回路基板の複数の層（例えば、互いに積層された複数の第１の回路基板２５及び第２の回路基板２６）を含むことに加えて、回路基板２の第２の表面２ｂに、プリント回路基板とは異なる材料からなる補強板２９が設けられている点が、第２の実施形態と異なる。補強板２９は、回路基板２の構造強度を補強するために用いられる。補強板２９は、隙間を保ちながら第２の表面２ｂと組み合わせることで、電子部品１を設置するための収容スペースＲを形成してもよい。なお、電子部品１及びウェハの表面を保護するために、収容スペースＲを覆うカバー板２９１と補強板２９を結合させてもよい。 A third embodiment of the present invention will be described with reference to FIG . FIG. 3 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a third embodiment of the present invention. As shown in FIG. 3 , the circuit board 2 of the third embodiment includes a plurality of layers of printed circuit boards (e.g., a plurality of first circuit boards 25 and second circuit boards 26 stacked on each other). In addition, this embodiment differs from the second embodiment in that a reinforcing plate 29 made of a material different from that of the printed circuit board is provided on the second surface 2b of the circuit board 2. The reinforcing plate 29 is used to reinforce the structural strength of the circuit board 2. The reinforcing plate 29 may form an accommodation space R for installing the electronic component 1 by combining with the second surface 2b while maintaining a gap. In addition, in order to protect the surface of the electronic component 1 and the wafer, the cover plate 291 that covers the accommodation space R and the reinforcing plate 29 may be combined.

本発明の第４の実施形態について、図４を参照して説明する。図４は、本発明の第４の実施形態に係るプローブカードの断面構造を部分的に拡大した概略図である。図４に示すように、第４の実施形態では、収容スペースＲに配置された電子部品１が回路基板２を貫通する貫通孔２４’に接続されることで、回路基板２の第１の表面２ａに電気的に接続可能となっている点が、上記した第３の実施の形態と相違する。このようにして、元々回路基板２の第１の表面２ａ上に配置されていた電子部品１を、配線の再設計を行うことなく、収容スペースＲに直接移動させることができる。これにより、回路基板を再配列の効率を大幅に高め、その結果、実用性をより高めることができる。 A fourth embodiment of the present invention will be described with reference to FIG. 4 . FIG. 4 is a partially enlarged schematic diagram of a cross-sectional structure of a probe card according to a fourth embodiment of the present invention. As shown in FIG. 4 , in the fourth embodiment, the electronic component 1 placed in the accommodation space R is connected to the through hole 24' passing through the circuit board 2, so that the first surface of the circuit board 2 This embodiment differs from the third embodiment described above in that it can be electrically connected to 2a. In this way, the electronic component 1 originally placed on the first surface 2a of the circuit board 2 can be directly moved to the accommodation space R without redesigning the wiring. This greatly improves the efficiency of rearranging the circuit board, thereby making it more practical.

要するに、本発明のプローブカード及び各実施形態のプローブカードは、電子部品を取り付けるために、回路基板においてプローブ針に対向した第２の表面上に、収容スペースを備えている。各実施形態のプローブカードは、電子部品を収容するために、プリント回路基板の第１の表面だけが利用可能であるという問題を効果的に解決できる。これにより、より多く、又はより大きな電子部品を収容することが可能となる。また、本発明の各実施形態は、電子部品により占有される回路基板の面積を減少させ、回路基板において使用可能な表面をより大きくさせることができる。 In short, the probe card of the present invention and the probe card of each embodiment are provided with an accommodation space on the second surface of the circuit board facing the probe needle in order to attach electronic components. The probe card of each embodiment can effectively solve the problem of only the first surface of the printed circuit board being available to accommodate electronic components. This makes it possible to accommodate more or larger electronic components. Embodiments of the present invention can also reduce the area of the circuit board occupied by electronic components, allowing more surface area available on the circuit board.

上記した記載は、本発明のより好ましい実施形態に過ぎず、本発明の範囲と同等な変形及び修正は、すべて本発明の範囲に含まれる。 The above description is only a more preferred embodiment of the present invention, and all variations and modifications equivalent to the scope of the present invention are included within the scope of the present invention.

１ 電子部品
２ 回路基板
２ａ 第１の表面
２ｂ 第２の表面
２１ 第１の接続部
２２ 第２の接続部
２３ 電線
２４ 貫通孔
２４’ 貫通孔
２５ 第１の回路基板
２６ 第２の回路基板
２７ 第３の回路基板
２８ 高さ調整板
２９ 補強板
２９１ カバー板
Ｔ 接続構造
Ｒ 収容スペース
Ｐ プローブ針
Ｄ 試験下の装置
９ プリント基板
９’ 領域の一部
９ａ 第１の表面
９ｂ 第２の表面
９１ 第１の接続部
９２ 第２の接続部
９３ 電線
９４ 貫通孔
Ａ 領域
Ｂ 領域 1 Electronic component 2 Circuit board 2a First surface 2b Second surface 21 First connection part 22 Second connection part 23 Electric wire 24 Through hole 24' Through hole 25 First circuit board 26 Second circuit board 27 Third circuit board 28 Height adjustment plate 29 Reinforcement plate 291 Cover plate T Connection structure R Accommodation space P Probe needle D Device under test 9 Printed circuit board 9' Part of area 9a First surface 9b Second surface 91 First connection part 92 Second connection part 93 Electric wire 94 Through hole A area B area

Claims (5)

試験機及び複数のプローブ針に接続されるプローブカードであって、
軸方向の両面に第１の表面及び第２の表面を有すると共に、複数の第１の接続部及び複数の第２の接続部を有する回路基板を備え、
前記第１の接続部は、前記第１の表面上に配置され、前記試験機に電気的に接続され、前記回路基板の電線、又は前記回路基板を貫通する貫通孔を介して、前記第２の接続部に電気的に接続され、
前記第２の接続部は、前記第２の表面上に配置され、前記プローブ針に電気的に接続され、
前記第１の表面は、前記試験機の方向に対向し、前記第２の表面は、前記プローブ針の方向に対向し、
前記試験機は、前記第１の接続部及び前記第２の接続部を介して、前記プローブ針に電気的に接続され、
前記回路基板は、前記第２の表面上に形成された凹状の溝又は開口からなり電子部品を実装するための収容スペースを備え、
前記収容スペースの前記溝又は開口に、前記電子部品が配置され、
前記電子部品は、前記電線又は前記貫通孔を介して、前記第１の接続部及び前記第２の接続部と電気的に接続されており、
前記回路基板は、複数のプリント回路基板からなり、
前記複数のプリント回路基板のうちの１つは、前記プローブ針に対向する前記第２の表面を有し、
前記収容スペースは、前記第２の表面を有する前記プリント回路基板の上に形成されており、
前記プリント回路基板と同じ材料の高さ調整板が設けられていることを特徴とするプローブカード。 A probe card connected to a testing machine and a plurality of probe needles,
A circuit board having a first surface and a second surface on both sides in the axial direction, and having a plurality of first connection parts and a plurality of second connection parts,
The first connection portion is disposed on the first surface, is electrically connected to the test machine, and is connected to the second connection portion via an electric wire of the circuit board or a through hole penetrating the circuit board. electrically connected to the connection of
the second connection portion is disposed on the second surface and electrically connected to the probe needle;
the first surface faces the direction of the tester, the second surface faces the direction of the probe needle,
The testing machine is electrically connected to the probe needle via the first connection part and the second connection part,
The circuit board includes a concave groove or opening formed on the second surface and has an accommodation space for mounting electronic components,
The electronic component is arranged in the groove or opening of the accommodation space,
The electronic component is electrically connected to the first connection part and the second connection part via the electric wire or the through hole ,
The circuit board is composed of a plurality of printed circuit boards,
one of the plurality of printed circuit boards has the second surface facing the probe needle;
the accommodation space is formed on the printed circuit board having the second surface;
A probe card characterized in that a height adjustment plate made of the same material as the printed circuit board is provided . 前記回路基板は、複数層のプリント回路基板からなり、The circuit board is composed of a multi-layer printed circuit board,
前記回路基板の前記第２の表面には、前記回路基板の構造強度を補強するための補強板が設けられ、A reinforcing plate for reinforcing the structural strength of the circuit board is provided on the second surface of the circuit board,
前記補強板は、前記回路基板の前記軸方向と直交する方向に隙間を保ちながら前記第２の表面と組み合わされることで、前記収容スペースを形成し、The reinforcing plate forms the accommodation space by being combined with the second surface while maintaining a gap in a direction perpendicular to the axial direction of the circuit board,
前記補強板の材料は、前記プリント回路基板の材料とは異なることを特徴とする請求項１に記載のプローブカード。The probe card according to claim 1, wherein a material of the reinforcing plate is different from a material of the printed circuit board. 前記試験機に接続される前記第１の接続部は、前記プローブカードの中心部から外周部へ向かう方向を径方向としたとき、前記第２の接続部よりも前記回路基板の前記径方向側に配置されていることを特徴とする請求項１又は２に記載のプローブカード。The first connection portion connected to the test machine is located on the radial side of the circuit board relative to the second connection portion, when the direction from the center of the probe card toward the outer circumference is defined as the radial direction. 3. The probe card according to claim 1, wherein the probe card is disposed in the probe card. 前記収容スペースは、前記回路基板の前記第２の表面上において、前記第２の接続部よりも前記径方向側に配置されていることを特徴とする請求項３に記載のプローブカード。4. The probe card according to claim 3, wherein the accommodation space is arranged on the second surface of the circuit board on the radial side of the second connection section. 前記第１の接続部は、ポゴピンを介して、前記試験機に電気的に接続されていることを特徴とする請求項１又は２に記載のプローブカード。3. The probe card according to claim 1, wherein the first connection part is electrically connected to the test machine via a pogo pin.
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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001050979A (en) 1999-08-10 2001-02-23 Tokyo Electron Ltd Probe card
JP2007080976A (en) 2005-09-12 2007-03-29 Shinko Electric Ind Co Ltd Multilayer circuit substrate, its manufacturing method, and electronic component package
JP2008197118A (en) 2001-07-11 2008-08-28 Formfactor Inc Method of manufacturing probe card
JP2010025765A (en) 2008-07-18 2010-02-04 Tokyo Electron Ltd Contact structure for inspection
JP2013145210A (en) 2012-01-16 2013-07-25 Micronics Japan Co Ltd Substrate-laminated type probe card
JP2014025761A (en) 2012-07-25 2014-02-06 Micronics Japan Co Ltd Probe card and inspection device
JP2015025803A (en) 2013-07-26 2015-02-05 サムソン エレクトロ−メカニックス カンパニーリミテッド． Board for probe card embedded with capacitor, method of manufacturing the same, and probe card
JP2015132524A (en) 2014-01-10 2015-07-23 富士通セミコンダクター株式会社 Test apparatus
JP2016075636A (en) 2014-10-08 2016-05-12 株式会社日本マイクロニクス Probe card
JP2018510355A (en) 2015-03-31 2018-04-12 テクノプローベ エス．ピー．エー． Probe card for electronic equipment test equipment with enhanced filtering characteristics

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0879071A (en) * 1994-08-31 1996-03-22 Kokusai Electric Co Ltd Frequency synthesizer
TW390572U (en) * 1998-06-26 2000-05-11 Ansy Electronics Co Ltd Compound steel mold of spreading glue for a printed circuit board
TWI416121B (en) * 2009-11-04 2013-11-21 Mjc Probe Inc Probe card
TWI512296B (en) * 2014-01-24 2015-12-11 Sitronix Technology Corp Active probe card
US9759745B2 (en) * 2014-04-29 2017-09-12 Taiwan Semiconductor Manufacturing Company Ltd. Probe card
TWI583961B (en) * 2015-06-05 2017-05-21 Mpi Corp Probe module with feedback test function (1)

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001050979A (en) 1999-08-10 2001-02-23 Tokyo Electron Ltd Probe card
JP2008197118A (en) 2001-07-11 2008-08-28 Formfactor Inc Method of manufacturing probe card
JP2007080976A (en) 2005-09-12 2007-03-29 Shinko Electric Ind Co Ltd Multilayer circuit substrate, its manufacturing method, and electronic component package
JP2010025765A (en) 2008-07-18 2010-02-04 Tokyo Electron Ltd Contact structure for inspection
JP2013145210A (en) 2012-01-16 2013-07-25 Micronics Japan Co Ltd Substrate-laminated type probe card
JP2014025761A (en) 2012-07-25 2014-02-06 Micronics Japan Co Ltd Probe card and inspection device
JP2015025803A (en) 2013-07-26 2015-02-05 サムソン エレクトロ−メカニックス カンパニーリミテッド． Board for probe card embedded with capacitor, method of manufacturing the same, and probe card
JP2015132524A (en) 2014-01-10 2015-07-23 富士通セミコンダクター株式会社 Test apparatus
JP2016075636A (en) 2014-10-08 2016-05-12 株式会社日本マイクロニクス Probe card
JP2018510355A (en) 2015-03-31 2018-04-12 テクノプローベ エス．ピー．エー． Probe card for electronic equipment test equipment with enhanced filtering characteristics

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