JP7387391B2 - Audio circuits, electronic devices using them, and in-vehicle audio systems - Google Patents

Description

The present invention relates to an audio amplifier circuit that drives speakers and headphones.

Highly efficient class D amplifiers are used as power amplifiers that drive electroacoustic transducers such as speakers and headphones. FIG. 1 is a block diagram of an audio system 100R using a class D amplifier. The audio system 100R mainly includes a speaker 102, a filter 104, and a class D amplifier circuit 900.

Class D amplifier circuit 900 generates a pulse signal S _OUT having a duty ratio according to input audio signal S _IN . Filter 104 removes high frequency components from output signal S _OUT of class D amplifier circuit 900 and supplies it to speaker 102 .

The class D amplifier circuit 900 of FIG. 1 includes an output stage 902, an integrator 904, a comparator 906, and a driver 908. The integrator 904 integrates the difference between the input audio signal S _IN and the feedback signal S _FB according to the output signal S _OUT . Comparator 906 compares the output of integrator 904 with clock signal CLK and outputs pulse signal _SD . Driver 908 drives output stage 902 in response to pulse signal _SD .

Patent No. 5618776

In audio systems for cars and televisions, a high voltage of about 12 to 15 V is used as the power source for the class D amplifier circuit 900. In this case, the power transistor of the output stage 902 of the class D amplifier circuit 900 cannot be configured with a MOSFET with a withstand voltage of 5V, and must be configured with a DMOS (Double-Diffused MOS) with a high withstand voltage between drain and source (for example, 20V). be.

A DMOS transistor has a large drain-source breakdown voltage, but a gate-source breakdown voltage of about 5V, which is not so high. If an attempt is made to further increase the breakdown voltage between the gate and source of a DMOS transistor, there is a problem in that the device size increases. In the audio system 100R shown in FIG. 1, by configuring the circuit blocks (904, 906, 908) before the driver 908 with 3.3V or 5V systems, the gate-source voltage of the DMOS transistor can be suppressed to 5V or less, and the DMOS The size of the transistor is suppressed.

This class D amplifier circuit 900 has a gain g of 14.4V/5V=9.2dB. Therefore, there is a problem in that the noise, distortion, and offset voltage generated in the integrator 904 and its preceding stage are multiplied by the gain (×g) and worsened.

The present invention has been made in view of the above problems, and one exemplary object of one aspect of the present invention is to provide an audio circuit with improved characteristics.

One aspect of the present invention relates to an audio circuit including a class D amplifier circuit. The class D amplifier circuit includes a push-pull output stage to which a first power supply voltage is supplied, an integrator to which the first power supply voltage is supplied and receives a feedback signal according to an input audio signal and an output signal of the output stage, and a first power supply voltage. a comparator that is supplied with one power supply voltage and that converts the output of the integrator into a PWM signal; and a driver that is supplied with a second power supply voltage that is lower than the first power supply voltage and that drives the output stage based on the output of the comparator. .

The gain of this class D amplifier circuit is 1 times, and the noise, distortion, offset voltage, etc. of the previous stage are not amplified, so the characteristics can be improved. Note that "the first power supply voltage is supplied" includes not only the case where the first power supply voltage is directly supplied but also the case where the first power supply voltage is supplied indirectly. "Indirectly supplied" means that the voltage is stabilized to a voltage level slightly lower than the first power supply voltage (but higher than the second power supply voltage) through a regulator, buffer, voltage divider circuit, clamp circuit, etc. A case where an intermediate voltage is supplied may also be included.

The input audio signal may be an analog signal.

The audio circuit includes an audio interface circuit that receives a digital audio signal, a D/A converter that converts the digital audio signal into an analog input audio signal, and a master clock that is received by the audio interface circuit, and which divides the frequency and generates a triangular wave or a sawtooth wave. The device may further include a frequency divider that generates a periodic signal. A comparator may compare the output of the integrator with the periodic signal and generate a PWM signal. In this case, noise, distortion, and offset voltage generated in the audio interface circuit and the D/A converter can be prevented from being amplified in the class D amplifier circuit.

The audio circuit further includes an input gain control circuit that amplifies the analog audio signal with an adjustable gain and generates an input audio signal, and an oscillator that generates a triangular or sawtooth periodic signal having a predetermined frequency. Good too. A comparator may compare the output of the integrator with the periodic signal and generate a PWM signal. In this case, noise, distortion, and offset voltage generated in the input gain control circuit can be prevented from being amplified in the class D amplifier circuit.

The input audio signal may be a PWM (Pulse Width Modulation) signal. A comparator may compare the output of the integrator to a predetermined threshold voltage and generate a PWM signal.

The audio circuit may further include an audio interface circuit that receives the digital audio signal and a processor that converts the digital audio signal into a PWM signal input audio signal. In this case, noise, distortion, and offset voltage generated in the audio interface circuit and processor can be prevented from being amplified in the class D amplifier circuit.

The audio circuit may further include an audio interface circuit that receives the PWM audio signal and outputs it to the integrator. In this case, noise, distortion, and offset voltage generated in the audio interface circuit can be prevented from being amplified in the class D amplifier circuit.

The audio circuit may be monolithically integrated on one substrate. "Integrated" includes cases in which all of the circuit components are formed on the substrate, and cases in which the main components of the circuit are integrated, and some resistors are used to adjust the circuit constants. A capacitor or the like may be provided outside the substrate. By integrating circuits on one chip, the circuit area can be reduced and the characteristics of circuit elements can be kept uniform.

Another aspect of the present invention relates to electronic equipment. The electronic device includes any of the audio circuits described above.

Another aspect of the invention relates to an in-vehicle audio system. The in-vehicle audio system includes any of the audio circuits described above.

Note that arbitrary combinations of the above constituent elements and expressions of the present invention converted between methods, devices, etc. are also effective as aspects of the present invention. Furthermore, the description in this section (Means for Solving the Problems) does not describe all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. .

According to an aspect of the present invention, characteristics can be improved.

1 is a block diagram of an audio system using a class D amplifier. FIG. 1 is a block diagram of an audio system including an audio circuit according to an embodiment. FIGS. 3A and 3B are circuit diagrams showing an example of the configuration of an integrator. FIGS. 4(a) and 4(b) are circuit diagrams showing a configuration example of a comparator. 3 is a circuit diagram of an audio circuit according to Example 1. FIG. 3 is a circuit diagram of an audio circuit according to a second embodiment. FIG. 3 is a circuit diagram of an audio circuit according to a third embodiment. FIG. FIG. 3 is a circuit diagram of an audio circuit according to a fourth embodiment. FIG. 1 is a block diagram of an in-vehicle audio system using an audio circuit according to an embodiment. FIGS. 10(a) and 10(b) are diagrams showing electronic equipment using the audio circuit according to the embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on preferred embodiments with reference to the drawings. Identical or equivalent components, members, and processes shown in each drawing are designated by the same reference numerals, and redundant explanations will be omitted as appropriate. Further, the embodiments are illustrative rather than limiting the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In this specification, "a state in which member A is connected to member B" refers to a case where member A and member B are physically directly connected, or where member A and member B are electrically connected. This also includes cases where it is indirectly connected via other members that do not affect the state or inhibit the function.
Similarly, "a state in which member C is provided between member A and member B" refers to the case where member A and member C or member B and member C are directly connected, as well as when member C is electrically connected. This also includes cases where the connection is made indirectly through other members that do not affect the connection state or inhibit the function.

FIG. 2 is a block diagram of an audio system 100 including an audio circuit 300 according to an embodiment. Audio system 100 includes a speaker 102, a filter 104, and an audio circuit 300.

The class D amplifier circuit 200 receives an input audio signal S _IN and generates a pulse signal S _OUT having a duty ratio according to the input audio signal S _IN . The class D amplifier circuit 200 includes an output stage 202, an integrator 204, a comparator with a level shift function (hereinafter simply referred to as a comparator) 208, and a driver 210, and is integrated into the audio circuit 300. Although only one channel configuration is shown in FIG. 2, the actual audio circuit 300 includes integrated class D amplifier circuits 200 for multiple channels.

The push-pull output stage 202 is supplied with a first power supply voltage V _DDH . Output stage 202 is an inverter including a high-side transistor MH and a low-side transistor ML. The output signal S _OUT of the output stage 202 swings between 0V and V _DDH and is provided to the speaker 102 via the filter 104 . High-side transistor MH may be an NMOS transistor.

The integrator 204 is supplied with the same first power supply voltage V _DDH as the output stage 202 . The integrator 204 receives the input audio signal S _IN and the feedback signal S _FB corresponding to the output signal S _OUT of the output stage 202, and integrates a signal corresponding to the difference (error) between them. The input signals S _IN , S _FB and the output signal S _INT of the integrator 204 will all vary between 0 and V _DDH .

FIG. 3A is a circuit diagram showing a configuration example of the integrator 204. Integrator 204 includes an operational amplifier OP1, a capacitor C11, and resistors R11 and R12. The inverting input terminal of operational amplifier OP1 receives input signal S _IN via resistor R11 and feedback signal S _FB via resistor R12. A reference voltage V _REF is input to the inverting input terminal of the operational amplifier OP1. As shown in FIG. 3(b), the reference voltage V _REF may be generated by a resistor network including four resistors R41 to R41. By determining the resistance values to satisfy the relationships R41=R42=R11, R43=R44=R12, the two signals S _IN and S _FB having different amplitudes are appropriately scaled (level shifted).

Return to Figure 2. Comparator 208 converts the output S _INT of integrator 204 into a PWM signal S _PWM . The input stage of the comparator 208 operates with the first power supply voltage V _DDH , but the output stage thereof is supplied with the second power supply voltage V _DDL , which is lower than the first power supply voltage V _DDH , and has a binary value of 0V-V _DDL . A PWM signal S _PWM is output.

FIGS. 4A and 4B are circuit diagrams showing a configuration example of the comparator 208. The comparator 208 in FIG. 4A includes a front-stage differential amplifier DA1 and a rear-stage buffer (amplification stage) BUF1. In this configuration, the first power supply voltage V _DDH is supplied to the differential amplifier DA1, and the second power supply voltage V _DDL is supplied to the subsequent buffer BUF1. This enables voltage comparison in the range of 0V to V _DDH , and the amplitude of the output signal S _PWM indicating the comparison result is 0 to V _DDL .

The comparator 208 in FIG. 4(b) includes a voltage comparator COMP1 at the front stage and a level shifter 209 at the rear stage. In this configuration, the first power supply voltage V _DDH is supplied to the voltage comparator COMP1 at the previous stage, and the voltage comparator COMP1 outputs a comparison signal in which 0V is low and V _DDH is high. The subsequent level shifter 209 is supplied with the first power supply voltage V _DDH and the second power supply voltage V _DDL , and converts the comparison signal generated by the voltage comparator COMP1 into an output signal S that sets 0V as low and V _DDL as high. Convert to _PWM .

Return to Figure 2. The driver 210 is supplied with a second power supply voltage V _DDL and drives the output stage 202 based on the output S _PWM of the comparator 208 .

The above is the configuration of the audio system 100. Next, we will explain its advantages.
The gain of this class D amplifier circuit 200 is 1 times. Therefore, since the gain is smaller than that of the class D amplifier shown in FIG. 1, noise, distortion, offset voltage, etc. of the preceding stage circuit block (not shown) are not amplified, so that the characteristics can be improved.

The present invention extends to various devices and circuits that can be understood as the circuit diagram in FIG. 2 or derived from the above description, and is not limited to a specific configuration. More specific configuration examples will be described below, not to narrow the scope of the present invention, but to facilitate and clarify the understanding of the essence of the invention and circuit operation.

(Example 1)
FIG. 5 is a circuit diagram of an audio circuit 300A according to the first embodiment. Audio circuit 300A receives digital audio signals from sound source 106. For example, the sound source 106 and the audio circuit 300A are connected by a serial interface such as I ² S (Inter IC Sound).

The audio circuit 300A includes an interface circuit 301A in addition to the class D amplifier circuit 200A. The interface circuit 301 includes a digital audio interface 302, a D/A converter 304, and a frequency divider 306. Digital audio interface 302 receives digital audio signals from sound source 106 . D/A converter 304 converts the digital audio signal received by digital audio interface 302 into an analog input audio signal S _IN . The D/A converter 304 is supplied with a first power supply voltage V _DDH and a second power supply voltage V _DDL , the digital block at the front stage operates at 3V (or 5V), and the analog block at the output stage operates at 14.4V. It works.

The frequency divider 306 receives the master clock MCLK received by the digital audio interface 302, divides it, and generates a triangular wave or sawtooth wave periodic signal _SOSC . This periodic signal S _OSC varies between 0V and V _DDH . The comparator 208 compares the output signal S _INT of the integrator 204 with the periodic signal S _OSC and outputs a PWM signal S _PWM indicating the comparison result.

The above is the configuration of the audio circuit 300A. According to this audio circuit 300A, noise, distortion, and offset voltage generated in the digital audio interface 302 and the D/A converter 304 can be prevented from being amplified in the class D amplifier circuit 200A.

(Example 2)
FIG. 6 is a circuit diagram of an audio circuit 300B according to the second embodiment. Audio circuit 300B receives digital audio signals from sound source 106. For example, the sound source 106 and the audio circuit 300A are connected by a serial interface such as I ² S (Inter IC Sound).

The interface circuit 301B of the audio circuit 300B includes a digital audio interface 302, a PWM processor 308, and a reference voltage source 310. Digital audio interface 302 receives digital audio signals from sound source 106 . PWM processor 308 converts the digital audio signal received by digital audio interface 302 into a pulse width modulated input audio signal S _IN . The PWM processor 308 is supplied with a first power supply voltage V _DDH and a second power supply voltage V _DDL , the digital block at the front stage operates at 3V (or 5V), and the output stage operates at 14.4V. The input audio signal S _IN in this second embodiment is a pulse signal that switches between two values, 0V and _VDDH . Further, in the class D amplifier circuit 200B, the output signal S _INT of the integrator 204 becomes a periodic signal.

Reference voltage source 310 generates a reference voltage V _REF having a predetermined voltage level. Comparator 208 compares output signal S _INT of integrator 204 with reference voltage V _REF and outputs PWM signal S _PWM according to the comparison result.

The above is the configuration of the audio circuit 300B. According to this audio circuit 300B, noise, distortion, and offset voltage generated in the digital audio interface 302 and the PWM processor 308 can be prevented from being amplified in the class D amplifier circuit 200B.

(Example 3)
FIG. 7 is a circuit diagram of an audio circuit 300C according to the third embodiment. Audio circuit 300C receives a pulse width modulated audio signal from sound source 106. This audio signal is, for example, a pulse signal that switches between two values, 0V and _VDDL .

In the audio circuit 300C, the interface circuit 301C includes a PWM driver 312. The PWM driver 312 converts the signal level of the PWM signal supplied from the sound source 106 to 0V-V _DDH and supplies it to the integrator 204 as an input audio signal S _IN .

The configuration of the class D amplifier circuit 200C is similar to the class D amplifier circuit 200B in FIG.

The above is the configuration of the audio circuit 300C. According to this audio circuit 300C, noise, distortion, and offset voltage generated in the PWM driver 312 can be prevented from being amplified in the class D amplifier circuit 200C.

(Example 4)
FIG. 8 is a circuit diagram of an audio circuit 300D according to the fourth embodiment. Audio circuit 300D receives analog audio signal _SANL from sound source 106. This audio signal S _ANL varies within a predetermined voltage range.

The interface circuit 301D of the audio circuit 300D includes an input gain controller 314 and an oscillator 316. The input gain controller 314 amplifies the externally input audio signal S _ANL with an appropriate gain to generate an input audio signal S _IN varying between 0V and V _DDH . Oscillator 316 generates a triangular or sawtooth periodic signal S _OSC that varies between 0V and V _DDH . The configuration of the class D amplifier circuit 200D is similar to the class D amplifier circuit 200A of FIG. 5.

The above is the configuration of the audio circuit 300D. According to this audio circuit 300D, noise, distortion, and offset voltage generated in the input gain controller 314 can be prevented from being amplified in the class D amplifier circuit 200C.

(Application)
The application of the audio circuit 300 will be explained. FIG. 9 is a block diagram of an in-vehicle audio system using the audio circuit according to the embodiment.

The in-vehicle audio system 500 includes four speakers 502 _FL , 502 _FR , 502 _RL , 502 _RR , four filters 504 _FL , 504 _FR , 504 _RL , 504 _RR , a sound source 506 , and an audio circuit 300 .

The sound source 106 outputs left and right (LR) two-channel or multi-channel digital audio signals. The audio circuit 300 includes a four-channel class D amplifier circuit 200 and an interface circuit 301 with the sound source 106. The format of the interface circuit 301 is not limited, and may have any of the configurations shown in FIGS. 5 to 8, or may have another configuration.

The filter 504, sound source 506, and audio circuit 300 are built into an audio head unit or car navigation device. Alternatively, audio circuit 300 may be a separate product from sound source 106.

FIGS. 10(a) and 10(b) are diagrams showing electronic equipment using the audio circuit according to the embodiment. The electronic device in FIG. 10(a) is a display device 600 such as a television. The display device 600 includes speakers 602L and 602R, filters 604L and 604R, a sound source 606 and an audio circuit 300, and a display panel 610.

The electronic device in FIG. 10(b) is an audio component device 800. The audio component device 800 includes an audio signal processing circuit 806 corresponding to a sound source, an audio circuit 300, and a filter (not shown). The audio circuit 300 drives 802L and 802R connected via speaker cables.

The present invention has been described above based on the embodiments. Those skilled in the art will understand that this embodiment is merely an example, and that various modifications can be made to the combinations of these components and processing processes, and that such modifications are also within the scope of the present invention. be. Hereinafter, such modified examples will be explained.

(Modification 1)
In the embodiment, a half-bridge type class D amplifier has been described, but the present invention is also applicable to a full-bridge type (BTL: Bridge-Tied Load) class D amplifier, and in this case, the DC block of the filter 104 No need for a capacitor. Furthermore, a full-bridge class D amplifier may employ a filterless modulation method in which the low-pass filter 104 is omitted.

(Modification 2)
In the embodiment, the first power supply voltage V _DDH common to the output stage 202 is supplied to the integrator 204 and the comparator 208, but this is not the case. The output stage 202 may be directly supplied with the first supply voltage V _DDH , while the integrator 204 and the comparator 208 may be indirectly supplied with the first supply voltage V _DDH . For example, an intermediate voltage stabilized to a voltage level slightly lower than the first power supply voltage V _DDH (but higher than the second power supply voltage V _DDL ) using a regulator, buffer, voltage divider circuit, clamp circuit, etc. V _DDH ' may be provided to integrator 204 and comparator 208. Thereby, it is possible to suppress overvoltage from being applied to the integrator 204 and the comparator 208 during the load dump test.

(Modification 3)
The audio circuit 300 may be integrated with a DSP (Digital Signal Processor or Digital Sound Processor) that processes digital audio signals.

100 Audio system 102 Speaker 104 Filter 106 Sound source 200 Class D amplifier circuit 202 Output stage 204 Integrator 208 Comparator 210 Driver 300 Audio circuit 301 Interface circuit 302 Digital audio interface 304 D/A converter 306 Frequency divider 308 PWM processor 310 Reference voltage source 312 PWM driver 314 Input gain controller 316 Oscillator

Claims (10)

Equipped with a class D amplifier circuit,
The class D amplifier circuit is
a push-pull output stage supplied with a positive first supply voltage and a ground voltage ;
an integrator to which the first power supply voltage and the ground voltage are supplied and receives a feedback signal according to the input audio signal and the output signal of the output stage;
a comparator to which the first power supply voltage and the ground voltage are supplied and converts the output of the integrator into a PWM (Pulse Width Modulation) signal;
a driver that is supplied with a positive second power supply voltage lower than the first power supply voltage and the ground voltage and drives the output stage based on the PWM signal that is the output of the comparator;
An audio circuit comprising: The audio circuit according to claim 1, wherein the input audio signal is an analog signal. an audio interface circuit for receiving digital audio signals;
a D/A converter that converts the digital audio signal to the analog input audio signal;
a frequency divider that divides the master clock received by the audio interface circuit to generate a triangular wave or sawtooth wave periodic signal;
Furthermore,
The audio circuit according to claim 2, wherein the comparator compares the output of the integrator with the periodic signal to generate the PWM signal. an input gain control circuit that amplifies an analog audio signal with an adjustable gain to generate the input audio signal;
an oscillator that generates a triangular or sawtooth periodic signal having a predetermined frequency;
Furthermore,
The audio circuit according to claim 2, wherein the comparator compares the output of the integrator with the periodic signal to generate the PWM signal. The input audio signal is a PWM format signal,
The audio circuit according to claim 1, wherein the comparator compares the output of the integrator with a predetermined threshold voltage to generate the PWM signal. an audio interface circuit for receiving digital audio signals;
a processor that converts the digital audio signal into the input audio signal in PWM format ;
The audio circuit according to claim 5, further comprising:. 6. The audio circuit of claim 5, further comprising an audio interface circuit that receives the input audio signal in PWM format and outputs it to the integrator. 8. The audio circuit according to claim 1, wherein the audio circuit is monolithically integrated on one substrate. An electronic device comprising the audio circuit according to claim 1. An in-vehicle audio system comprising the audio circuit according to any one of claims 1 to 7.

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