JP7383631B2 - システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御 - Google Patents

システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御 Download PDF

Info

Publication number
JP7383631B2
JP7383631B2 JP2020552287A JP2020552287A JP7383631B2 JP 7383631 B2 JP7383631 B2 JP 7383631B2 JP 2020552287 A JP2020552287 A JP 2020552287A JP 2020552287 A JP2020552287 A JP 2020552287A JP 7383631 B2 JP7383631 B2 JP 7383631B2
Authority
JP
Japan
Prior art keywords
agent
soc
interconnect
transaction
reset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2020552287A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2019191431A5 (https=
JP2021519463A5 (https=
JP2021519463A (ja
Inventor
デサイ・シャイレンドラ
ピアース・マーク
ジェイン・アミト
バット・ルトゥル
パテル・ジャイミン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Google LLC
Original Assignee
Google LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Google LLC filed Critical Google LLC
Publication of JP2021519463A publication Critical patent/JP2021519463A/ja
Publication of JPWO2019191431A5 publication Critical patent/JPWO2019191431A5/ja
Publication of JP2021519463A5 publication Critical patent/JP2021519463A5/ja
Priority to JP2023190712A priority Critical patent/JP7660647B2/ja
Application granted granted Critical
Publication of JP7383631B2 publication Critical patent/JP7383631B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3209—Monitoring remote activity, e.g. over telephone lines or network connections
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/542—Event management; Broadcasting; Multicasting; Notifications
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00—Computing arrangements using knowledge-based models
    • G06N5/04—Inference or reasoning models
    • G06N5/043—Distributed expert systems; Blackboards
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
    • H04L9/085—Secret sharing or secret splitting, e.g. threshold schemes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Computational Linguistics (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Artificial Intelligence (AREA)
  • Multimedia (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Microcomputers (AREA)
  • Power Sources (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Debugging And Monitoring (AREA)
  • Small-Scale Networks (AREA)
  • Electrotherapy Devices (AREA)
JP2020552287A 2018-03-30 2019-03-28 システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御 Active JP7383631B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023190712A JP7660647B2 (ja) 2018-03-30 2023-11-08 システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201862650589P 2018-03-30 2018-03-30
US62/650,589 2018-03-30
US201862691117P 2018-06-28 2018-06-28
US62/691,117 2018-06-28
PCT/US2019/024586 WO2019191431A1 (en) 2018-03-30 2019-03-28 PROTOCOL LEVEL CONTROL FOR SYSTEM ON A CHIP (SoC) AGENT RESET AND POWER MANAGEMENT

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2023190712A Division JP7660647B2 (ja) 2018-03-30 2023-11-08 システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御

Publications (4)

Publication Number Publication Date
JP2021519463A JP2021519463A (ja) 2021-08-10
JPWO2019191431A5 JPWO2019191431A5 (https=) 2022-02-15
JP2021519463A5 JP2021519463A5 (https=) 2022-02-15
JP7383631B2 true JP7383631B2 (ja) 2023-11-20

Family

ID=68054464

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2020552287A Active JP7383631B2 (ja) 2018-03-30 2019-03-28 システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御
JP2023190712A Active JP7660647B2 (ja) 2018-03-30 2023-11-08 システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2023190712A Active JP7660647B2 (ja) 2018-03-30 2023-11-08 システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御

Country Status (6)

Country Link
US (5) US11340671B2 (https=)
EP (2) EP3776225B1 (https=)
JP (2) JP7383631B2 (https=)
KR (1) KR102679562B1 (https=)
IL (1) IL277567B2 (https=)
WO (1) WO2019191431A1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL315283A (en) 2018-03-30 2024-10-01 Google Llc Arbitrating portions of transactions over virtual channels associated with an interconnect
JP7383631B2 (ja) 2018-03-30 2023-11-20 グーグル エルエルシー システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御
KR102589373B1 (ko) * 2018-05-15 2023-10-19 현대자동차주식회사 차량 네트워크에서 통신 노드의 웨이크업 방법 및 장치
US10863432B2 (en) * 2018-10-16 2020-12-08 Hewlett Packard Enterprise Development Lp Access point wake up
US11871308B2 (en) * 2019-07-29 2024-01-09 TapText llc System and method for link-initiated dynamic-mode communications
KR102914332B1 (ko) 2020-01-29 2026-01-19 삼성전자주식회사 시스템 온 칩 및 이의 리셋 제어 방법
US11714779B2 (en) * 2020-03-25 2023-08-01 Xilinx, Inc. NoC relaxed write order scheme
EP3958136A1 (en) 2020-08-17 2022-02-23 Nokia Technologies Oy Dynamically reprogrammable topologically unique integrated circuit identification
FR3117225B1 (fr) * 2020-12-04 2024-05-17 Stmicroelectronics Grand Ouest Sas Procédé de réinitialisation d’un dispositif maître d’un système sur puce et système sur puce correspondant
US11989567B2 (en) * 2022-03-24 2024-05-21 Lenovo Global Technology (United States) Inc. Automatic systems devices rediscovery
WO2024226173A1 (en) * 2023-04-28 2024-10-31 Qualcomm Incorporated Detecting and recovering from timeouts in scalable mesh networks in processor-based devices
US12572404B2 (en) 2023-04-28 2026-03-10 Qualcomm Incorporated Detecting and recovering from timeouts in scalable mesh networks in processor-based devices
US20250284651A1 (en) * 2023-10-09 2025-09-11 Jariet Technologies, Inc. Circuits For Converting Between Streaming Data Protocols, and Methods of Use Thereof
US20250237175A1 (en) * 2024-01-22 2025-07-24 Rtx Corporation Modular FADEC Thermal Management

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130073878A1 (en) 2011-09-19 2013-03-21 Sonics, Inc. Apparatus and methods for an interconnect power manager
US20140082237A1 (en) 2012-09-20 2014-03-20 Aviad Wertheimer Run-time fabric reconfiguration
US20140095911A1 (en) 2012-09-29 2014-04-03 Nir Rosenzweig Controlling Power Consumption By Power Management Link
US20140115207A1 (en) 2012-10-22 2014-04-24 Venkatraman Iyer High performance interconnect physical layer

Family Cites Families (73)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60031515T2 (de) 1999-03-17 2007-08-23 Broadcom Corp., Irvine Netzwerkvermittlung
US6604159B1 (en) 1999-08-12 2003-08-05 Mips Technologies, Inc. Data release to reduce latency in on-chip system bus
US6829666B1 (en) 1999-09-29 2004-12-07 Silicon Graphics, Incorporated Modular computing architecture having common communication interface
US6654896B1 (en) * 2000-05-16 2003-11-25 Hewlett-Packard Development Company, L.P. Handling of multiple compliant and non-compliant wake-up sources in a computer system
US6678767B1 (en) 2000-10-06 2004-01-13 Broadcom Corp Bus sampling on one edge of a clock signal and driving on another edge
TW513635B (en) 2000-11-24 2002-12-11 Ibm Method and structure for variable-length frame support in a shared memory switch
US7096292B2 (en) 2001-02-28 2006-08-22 Cavium Acquisition Corp. On-chip inter-subsystem communication
US7174467B1 (en) 2001-07-18 2007-02-06 Advanced Micro Devices, Inc. Message based power management in a multi-processor system
US7577857B1 (en) * 2001-08-29 2009-08-18 3Com Corporation High speed network interface with automatic power management with auto-negotiation
US6976134B1 (en) 2001-09-28 2005-12-13 Emc Corporation Pooling and provisioning storage resources in a storage network
US7664018B2 (en) 2002-07-02 2010-02-16 Emulex Design & Manufacturing Corporation Methods and apparatus for switching fibre channel arbitrated loop devices
US7283944B2 (en) 2003-12-15 2007-10-16 Springsoft, Inc. Circuit simulation bus transaction analysis
US7260688B1 (en) 2004-04-15 2007-08-21 Xilinx, Inc. Method and apparatus for controlling access to memory circuitry
US7500066B2 (en) 2005-04-30 2009-03-03 Tellabs Operations, Inc. Method and apparatus for sharing instruction memory among a plurality of processors
KR100653087B1 (ko) 2005-10-17 2006-12-01 삼성전자주식회사 ＡＸＩ가 적용된 ＮｏＣ 시스템 및 그 인터리빙 방법
US20070130344A1 (en) 2005-11-14 2007-06-07 Pepper Timothy C Using load balancing to assign paths to hosts in a network
EP1785811B1 (en) * 2005-11-14 2018-12-05 Texas Instruments Incorporated Memory information transfer power management
US7912075B1 (en) 2006-05-26 2011-03-22 Avaya Inc. Mechanisms and algorithms for arbitrating between and synchronizing state of duplicated media processing components
WO2009072134A2 (en) 2007-12-06 2009-06-11 Technion Research & Development Foundation Ltd Bus enhanced network on chip
US20090245257A1 (en) 2008-04-01 2009-10-01 International Business Machines Corporation Network On Chip
WO2010022767A1 (en) 2008-08-26 2010-03-04 Telefonaktiebolaget Lm Ericsson (Publ) Packet forwarding in a network
WO2010069398A1 (en) 2008-12-19 2010-06-24 Telefonaktiebolaget L M Ericsson (Publ) Resolving contention between data bursts
US20100158005A1 (en) 2008-12-23 2010-06-24 Suvhasis Mukhopadhyay System-On-a-Chip and Multi-Chip Systems Supporting Advanced Telecommunication Functions
US8918488B2 (en) 2009-02-04 2014-12-23 Citrix Systems, Inc. Methods and systems for automated management of virtual resources in a cloud computing environment
US9514074B2 (en) 2009-02-13 2016-12-06 The Regents Of The University Of Michigan Single cycle arbitration within an interconnect
US8448001B1 (en) * 2009-03-02 2013-05-21 Marvell International Ltd. System having a first device and second device in which the main power management module is configured to selectively supply a power and clock signal to change the power state of each device independently of the other device
WO2010103670A1 (en) 2009-03-12 2010-09-16 Hitachi, Ltd. Storage apparatus and method for controlling the same
JP5083464B2 (ja) 2009-05-25 2012-11-28 日本電気株式会社 ネットワークオンチップとネットワークルーティング方法とシステム
US8831666B2 (en) 2009-06-30 2014-09-09 Intel Corporation Link power savings with state retention
CN101651625B (zh) 2009-09-03 2011-09-21 中兴通讯股份有限公司 多业务恢复的选路装置及选路方法
US8782456B2 (en) 2010-06-01 2014-07-15 Intel Corporation Dynamic and idle power reduction sequence using recombinant clock and power gating
US8850250B2 (en) 2010-06-01 2014-09-30 Intel Corporation Integration of processor and input/output hub
US8904115B2 (en) 2010-09-28 2014-12-02 Texas Instruments Incorporated Cache with multiple access pipelines
JP5644429B2 (ja) * 2010-11-30 2014-12-24 株式会社リコー データ処理装置、画像形成装置、省電力制御方法、省電力制御プログラム及び記録媒体
CN103748837B (zh) 2011-08-22 2017-08-15 英特尔公司 使用可动态选择的冗余共享链路物理路径在基于开放核心协议的互连网络中改善数据吞吐量的方法
US8711867B2 (en) 2011-08-26 2014-04-29 Sonics, Inc. Credit flow control scheme in a router with flexible link widths utilizing minimal storage
WO2013036222A1 (en) * 2011-09-06 2013-03-14 Intel Corporation Power efficient processor architecture
US8713234B2 (en) 2011-09-29 2014-04-29 Intel Corporation Supporting multiple channels of a single interface
US8711875B2 (en) 2011-09-29 2014-04-29 Intel Corporation Aggregating completion messages in a sideband interface
CN103842929B8 (zh) 2011-09-30 2017-05-10 英特尔公司 在管芯上系统结构中管理边带段
US20130117511A1 (en) * 2011-11-08 2013-05-09 Arm Limited Data processing apparatus and method
US9053251B2 (en) 2011-11-29 2015-06-09 Intel Corporation Providing a sideband message interface for system on a chip (SoC)
US9755997B2 (en) 2012-01-13 2017-09-05 Intel Corporation Efficient peer-to-peer communication support in SoC fabrics
US8924779B2 (en) * 2012-03-30 2014-12-30 Lsi Corporation Proxy responder for handling anomalies in a hardware system
US9258234B1 (en) 2012-12-28 2016-02-09 Juniper Networks, Inc. Dynamically adjusting liveliness detection intervals for periodic network communications
US9223668B2 (en) 2013-03-13 2015-12-29 Intel Corporation Method and apparatus to trigger and trace on-chip system fabric transactions within the primary scalable fabric
US9471521B2 (en) 2013-05-15 2016-10-18 Stmicroelectronics S.R.L. Communication system for interfacing a plurality of transmission circuits with an interconnection network, and corresponding integrated circuit
US20150026494A1 (en) 2013-07-19 2015-01-22 Sonics, Inc. Intelligent mesochronous synchronizer
US9473388B2 (en) 2013-08-07 2016-10-18 Netspeed Systems Supporting multicast in NOC interconnect
US20150199134A1 (en) 2014-01-10 2015-07-16 Qualcomm Incorporated System and method for resolving dram page conflicts based on memory access patterns
JP5847887B2 (ja) 2014-06-17 2016-01-27 株式会社東芝 オンチップルータ及びそれを用いたマルチコアシステム
US9742630B2 (en) 2014-09-22 2017-08-22 Netspeed Systems Configurable router for a network on chip (NoC)
US9727114B2 (en) * 2014-09-25 2017-08-08 Telefonaktiebolaget L M Ericsson (Publ) HW-controlled power domains with automatic power-on request
US9971397B2 (en) * 2014-10-08 2018-05-15 Apple Inc. Methods and apparatus for managing power with an inter-processor communication link between independently operable processors
TWI536267B (zh) * 2014-11-07 2016-06-01 瑞昱半導體股份有限公司 應用於操作模式有限狀態機的控制方法以及電腦可讀媒體
KR102347657B1 (ko) * 2014-12-02 2022-01-06 삼성전자 주식회사 전자 장치 및 이의 공유 캐시 메모리 제어 방법
US10210120B2 (en) 2015-03-26 2019-02-19 Intel Corporation Method, apparatus and system to implement secondary bus functionality via a reconfigurable virtual switch
GB2537855B (en) * 2015-04-28 2018-10-24 Advanced Risc Mach Ltd Controlling transitions of devices between normal state and quiescent state
US10157160B2 (en) * 2015-06-04 2018-12-18 Intel Corporation Handling a partition reset in a multi-root system
US9733689B2 (en) * 2015-06-27 2017-08-15 Intel Corporation Hardware apparatuses and methods to perform transactional power management
US10353747B2 (en) 2015-07-13 2019-07-16 Futurewei Technologies, Inc. Shared memory controller and method of using same
US10209734B2 (en) * 2016-01-25 2019-02-19 Samsung Electronics Co., Ltd. Semiconductor device, semiconductor system, and method of operating the semiconductor device
KR102497804B1 (ko) 2016-04-01 2023-02-10 한국전자통신연구원 듀얼 스위칭 네트워크 모드들에서 네트워킹 가능한 온칩 네트워크 장치 및 그것의 동작 방법
US10133341B2 (en) * 2016-06-06 2018-11-20 Arm Limited Delegating component power control
US10452124B2 (en) * 2016-09-12 2019-10-22 Netspeed Systems, Inc. Systems and methods for facilitating low power on a network-on-chip
US10223128B2 (en) * 2016-09-23 2019-03-05 Apple Inc. Booting and power management
US10775871B2 (en) * 2016-11-10 2020-09-15 Apple Inc. Methods and apparatus for providing individualized power control for peripheral sub-systems
US10725955B2 (en) * 2017-12-08 2020-07-28 Arm Limited Power control of inter-domain transaction bridge
US10642341B2 (en) * 2018-03-23 2020-05-05 Juniper Networks, Inc. Selective modification of power states based on conditions
US10739836B2 (en) * 2018-03-27 2020-08-11 Intel Corporation System, apparatus and method for handshaking protocol for low power state transitions
JP7383631B2 (ja) 2018-03-30 2023-11-20 グーグル エルエルシー システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御
IL315283A (en) 2018-03-30 2024-10-01 Google Llc Arbitrating portions of transactions over virtual channels associated with an interconnect
US11294850B2 (en) 2019-03-29 2022-04-05 Intel Corporation System, apparatus and method for increasing bandwidth of edge-located agents of an integrated circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130073878A1 (en) 2011-09-19 2013-03-21 Sonics, Inc. Apparatus and methods for an interconnect power manager
US20140082237A1 (en) 2012-09-20 2014-03-20 Aviad Wertheimer Run-time fabric reconfiguration
US20140095911A1 (en) 2012-09-29 2014-04-03 Nir Rosenzweig Controlling Power Consumption By Power Management Link
US20140115207A1 (en) 2012-10-22 2014-04-24 Venkatraman Iyer High performance interconnect physical layer

Also Published As

Publication number Publication date
WO2019191431A1 (en) 2019-10-03
US11340671B2 (en) 2022-05-24
IL277567B1 (en) 2025-04-01
US11914440B2 (en) 2024-02-27
JP7660647B2 (ja) 2025-04-11
EP4502761A2 (en) 2025-02-05
EP4502761A3 (en) 2025-04-16
IL277567B2 (en) 2025-08-01
US20190302861A1 (en) 2019-10-03
US20190303777A1 (en) 2019-10-03
IL277567A (en) 2020-11-30
US20220291730A1 (en) 2022-09-15
KR20200139673A (ko) 2020-12-14
JP2024020317A (ja) 2024-02-14
US20220214731A1 (en) 2022-07-07
EP3776225A4 (en) 2022-01-05
EP3776225A1 (en) 2021-02-17
EP3776225B1 (en) 2024-12-18
US20190303778A1 (en) 2019-10-03
JP2021519463A (ja) 2021-08-10
KR102679562B1 (ko) 2024-07-01

Similar Documents

Publication Publication Date Title
JP7383631B2 (ja) システムオンチップ（ＳｏＣ）エージェントのリセットおよび電力管理のためのプロトコルレベル制御
US10205653B2 (en) Fabric discovery for a cluster of nodes
JP7793611B2 (ja) マルチｇｐｕシステムの分散型電力管理を実行するためのメカニズム
US9829962B2 (en) Hardware and software enabled implementation of power profile management instructions in system on chip
US7272741B2 (en) Hardware coordination of power management activities
US20080307422A1 (en) Shared memory for multi-core processors
US10198294B2 (en) Handling tenant requests in a system that uses hardware acceleration components
JP2021519464A (ja) 相互接続に関連付けられている仮想チャネルを介するトランザクションの部分のアービトレーション
US20130097351A1 (en) System and Method for High-Performance, Low-Power Data Center Interconnect Fabric
GB2460735A (en) Bus Fabric for Embedded System Comprising Peer-to-Peer Communication Matrix
US20070053350A1 (en) Buffering data packets according to multiple flow control schemes
US12010033B2 (en) On chip router
US12483515B2 (en) Application-to-application resource reservation schemes for precision networking
KR101061187B1 (ko) 버스 시스템 및 그 제어 장치
EP4524742A1 (en) I/o acceleration in a multi-node architecture

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20211210

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20211210

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20220204

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220204

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230411

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230707

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20231010

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20231108

R150 Certificate of patent or registration of utility model

Ref document number: 7383631

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150