JP7368338B2 - Micro LED display device - Google Patents

Micro LED display device Download PDF

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JP7368338B2
JP7368338B2 JP2020170084A JP2020170084A JP7368338B2 JP 7368338 B2 JP7368338 B2 JP 7368338B2 JP 2020170084 A JP2020170084 A JP 2020170084A JP 2020170084 A JP2020170084 A JP 2020170084A JP 7368338 B2 JP7368338 B2 JP 7368338B2
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wiring
region
display device
solder
led
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JP2022061868A (en
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勲 安達
晴美 奥野
貴之 太田
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エルジー ディスプレイ カンパニー リミテッド
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Description

本発明は、マイクロLED(Light Emitting Diode)表示装置に関する。 The present invention relates to a micro LED (Light Emitting Diode) display device.

近年、マイクロLEDディスプレイと呼ばれる、マトリクス状に配置されたLED素子の発光を制御することで映像を表示するマイクロLED表示装置が注目されている。
このようなマイクロLED表示装置は、例えば、配線基板に設けられた、第1方向に延在する複数の縦配線と第2方向に延在する複数の横配線とで区画される画素領域にLED素子を自己凝集半田(SAP:self-assembly anisotropic conductive paste)により実装することで高精細化が実現される。
従来のマイクロLED表示装置では、縦配線と横配線とが短絡しないように、縦配線と横配線との配線交差部に絶縁層が設けられ、該配線交差部においていずれかの配線をブリッジ接続する構造としている。
In recent years, a micro LED display device called a micro LED display that displays images by controlling the light emission of LED elements arranged in a matrix has been attracting attention.
Such a micro LED display device, for example, includes LEDs in a pixel area provided on a wiring board and defined by a plurality of vertical wirings extending in a first direction and a plurality of horizontal wirings extending in a second direction. High definition is achieved by mounting the elements using self-assembly anisotropic conductive paste (SAP).
In a conventional micro LED display device, an insulating layer is provided at the intersection of the vertical wiring and the horizontal wiring to prevent a short circuit between the vertical wiring and the horizontal wiring, and one of the wirings is bridge-connected at the wiring intersection. It has a structure.

例えば、特許文献1の図12には、タッチ駆動電極110T上に絶縁膜110Iを配置し、絶縁膜110I上にブリッジ110Bを配置するブリッジ構造が開示されている。 For example, FIG. 12 of Patent Document 1 discloses a bridge structure in which an insulating film 110I is disposed on a touch drive electrode 110T and a bridge 110B is disposed on the insulating film 110I.

米国特許出願公開第2020/194515号明細書US Patent Application Publication No. 2020/194515

しかしながら、従来の技術では、配線交差部に絶縁層を形成し、該交差部においていずれかの配線をブリッジさせる構造を形成するために工程数及びフォトマスク数が増加する。 However, in the conventional technique, the number of steps and the number of photomasks increase because an insulating layer is formed at the wiring intersection and a structure is formed in which any of the wirings is bridged at the intersection.

本発明は、上記に鑑み、従来よりもマイクロLED表示装置の配線基板の作製工程を簡略にすることを目的とする。 In view of the above, an object of the present invention is to simplify the manufacturing process of a wiring board for a micro LED display device compared to the conventional method.

上述の課題を解決して目的を達成する本発明は、第1方向に延在する配線と該第1方向に交差する第2方向に延在する配線とが設けられた配線基板に複数のLED素子が実装されたマイクロLED表示装置であって、前記第1方向に延在する配線に接続する端子の各々が、第1領域と、前記第1領域と間隔を空けて設けられた第2領域と、を備え、前記第2方向に延在する配線が、前記第1領域と前記第2領域との間を通り、前記第1方向に延在する配線に接続する端子及び前記第2方向に延在する配線に接続する端子の各々には、自己凝集半田によりLED素子の電極が接合されるマイクロLED表示装置である。 The present invention, which solves the above-mentioned problems and achieves the object, is a wiring board provided with wiring extending in a first direction and wiring extending in a second direction intersecting the first direction, and a plurality of LEDs. A micro LED display device in which an element is mounted, wherein each terminal connected to the wiring extending in the first direction is provided in a first region and a second region spaced apart from the first region. A wiring extending in the second direction passes between the first region and the second region, a terminal connected to the wiring extending in the first direction, and a terminal extending in the second direction. This is a micro LED display device in which an electrode of an LED element is bonded to each terminal connected to the extending wiring by self-cohesive solder.

上記構成のマイクロLED表示装置において、前記第2方向に延在する配線は、前記第1領域と前記第2領域との間では少なくとも上面の全部が難半田性材料により形成されていることが好ましい。 In the micro LED display device having the above configuration, it is preferable that at least the entire upper surface of the wiring extending in the second direction is formed of a difficult-to-solder material between the first region and the second region. .

上記構成のマイクロLED表示装置において、前記第2方向に延在する配線は、銅と、前記難半田性材料と、により形成され、前記難半田性材料は、アルミニウム、チタン、モリブデン又はITO(Indium Tin Oxide)とするとよい。 In the micro LED display device having the above configuration, the wiring extending in the second direction is formed of copper and the difficult-to-solder material, and the difficult-to-solder material is aluminum, titanium, molybdenum, or ITO (Indium Tin Oxide) is recommended.

上記構成のマイクロLED表示装置において、前記第1方向に延在する配線に接続する端子と前記第2方向に延在する配線に接続する端子との間には絶縁性の隔壁が設けられていることが好ましい。 In the micro LED display device having the above configuration, an insulating partition is provided between a terminal connected to the wiring extending in the first direction and a terminal connected to the wiring extending in the second direction. It is preferable.

本発明によれば、従来よりもマイクロLED表示装置の配線基板の作製工程を簡略にすることができる。 According to the present invention, the manufacturing process of a wiring board for a micro LED display device can be simplified compared to the conventional method.

図1は、実施形態1に係るマイクロLED表示装置の配線基板のブロック図である。FIG. 1 is a block diagram of a wiring board of a micro LED display device according to a first embodiment. 図2は、図1に示すマトリクス部のLED素子実装前における概略構成を示す上面図である。FIG. 2 is a top view showing a schematic configuration of the matrix section shown in FIG. 1 before the LED elements are mounted. 図3は、実施形態1におけるLED素子実装前のサブ画素の構成を示す上面図である。FIG. 3 is a top view showing the configuration of a sub-pixel before mounting an LED element in the first embodiment. 図4Aは、図3のA1-A1’におけるLED素子実装後の断面図である。FIG. 4A is a cross-sectional view taken along line A1-A1' in FIG. 3 after the LED element is mounted. 図4Bは、図3のA2-A2’におけるLED素子実装後の断面図である。FIG. 4B is a cross-sectional view taken along line A2-A2' in FIG. 3 after the LED element is mounted. 図5Aは、図3のB1-B1’におけるLED素子実装後の断面図である。FIG. 5A is a cross-sectional view taken along line B1-B1' in FIG. 3 after the LED element is mounted. 図5Bは、図3のB2-B2’におけるLED素子実装後の断面図である。FIG. 5B is a cross-sectional view taken along line B2-B2' in FIG. 3 after the LED element is mounted. 図6は、実施形態1におけるLED素子実装前のサブ画素の構成を示す他の例の上面図である。FIG. 6 is a top view of another example of the configuration of a sub-pixel before mounting an LED element in Embodiment 1. 図7は、図6のA-A’におけるLED素子実装後の断面図である。FIG. 7 is a cross-sectional view taken along line A-A' in FIG. 6 after the LED element is mounted. 図8は、図6のB-B’におけるLED素子実装後の断面図である。FIG. 8 is a cross-sectional view taken along line B-B' in FIG. 6 after the LED element is mounted. 図9は、実施形態2におけるLED素子実装前のサブ画素の構成を示す上面図である。FIG. 9 is a top view showing the configuration of a sub-pixel before mounting an LED element in the second embodiment. 図10は、図9のA-A’におけるLED素子実装後の断面図である。FIG. 10 is a cross-sectional view taken along line A-A' in FIG. 9 after the LED element is mounted. 図11は、図9のB-B’におけるLED素子実装後の断面図である。FIG. 11 is a cross-sectional view taken along line BB' in FIG. 9 after the LED element is mounted. 図12は、実施形態2におけるLED素子実装前のサブ画素の構成を示す他の例の上面図である。FIG. 12 is a top view of another example showing the configuration of a sub-pixel before mounting an LED element in the second embodiment. 図13は、図12のA-A’におけるLED素子実装後の断面図である。FIG. 13 is a cross-sectional view taken along line A-A' in FIG. 12 after the LED element is mounted. 図14は、図12のB-B’におけるLED素子実装後の断面図である。FIG. 14 is a cross-sectional view taken along line BB' in FIG. 12 after the LED element is mounted.

以下、添付図面を参照して、本発明を実施するための形態について説明する。
ただし、本発明は、以下の実施形態の記載によって限定解釈されるものではない。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described with reference to the accompanying drawings.
However, the present invention is not limited to the description of the embodiments below.

<実施形態>
図1は、本実施形態に係るマイクロLED表示装置1の配線基板10のブロック図である。
図1に示す配線基板10は、制御部11と、駆動部12と、駆動部13と、マトリクス部100と、を備える。
制御部11は、タイミングコントローラーを含み、タイミング同期信号及びデータ電流に基づいて、駆動部12及び駆動部13に各々制御信号を出力する。
駆動部12は、第2方向(以下、X方向とする)に延在する複数の配線を介してマトリクス部100に接続され、制御部11からの制御信号に基づいて、当該複数の配線に駆動信号を出力する。
駆動部13は、第2方向に交差する第1方向(以下、Y方向とする)に延在する複数の配線を介してマトリクス部100に接続され、制御部11からの制御信号に基づいて、当該複数の配線に駆動信号を出力する。
なお、制御部11、駆動部12及び駆動部13は、配線基板10の外部に設けられていてもよい。
<Embodiment>
FIG. 1 is a block diagram of a wiring board 10 of a micro LED display device 1 according to this embodiment.
The wiring board 10 shown in FIG. 1 includes a control section 11, a drive section 12, a drive section 13, and a matrix section 100.
The control section 11 includes a timing controller, and outputs control signals to the drive section 12 and the drive section 13, respectively, based on the timing synchronization signal and the data current.
The drive section 12 is connected to the matrix section 100 via a plurality of wires extending in a second direction (hereinafter referred to as the X direction), and drives the plurality of wires based on a control signal from the control section 11. Output a signal.
The drive section 13 is connected to the matrix section 100 via a plurality of wirings extending in a first direction (hereinafter referred to as the Y direction) intersecting the second direction, and based on a control signal from the control section 11, A drive signal is output to the plurality of wirings.
Note that the control section 11, the drive section 12, and the drive section 13 may be provided outside the wiring board 10.

図2は、図1に示すマトリクス部100のLED素子実装前における概略構成を示す上面図である。
図2に示すマトリクス部100は、X方向に延在する配線101と、Y方向に延在する配線102と、マトリクス状に配列されたサブ画素110と、を備える。
X方向に延在する配線101は、図1に示す駆動部12に接続されている。
Y方向に延在する配線102は、図1に示す駆動部13に接続されている。
FIG. 2 is a top view showing a schematic configuration of the matrix section 100 shown in FIG. 1 before the LED elements are mounted.
The matrix section 100 shown in FIG. 2 includes a wiring 101 extending in the X direction, a wiring 102 extending in the Y direction, and sub-pixels 110 arranged in a matrix.
The wiring 101 extending in the X direction is connected to the drive unit 12 shown in FIG.
The wiring 102 extending in the Y direction is connected to the drive section 13 shown in FIG.

図3は、本実施形態におけるLED素子実装前のサブ画素110の構成を示す上面図である。
図3に示すサブ画素110には、X方向に延在する配線101に接続するX方向端子111と、Y方向に延在する配線102に接続するY方向端子112と、X方向端子111とY方向端子112との間に配された隔壁113と、が設けられている。
FIG. 3 is a top view showing the configuration of the sub-pixel 110 before mounting the LED element in this embodiment.
The sub-pixel 110 shown in FIG. 3 includes an X-direction terminal 111 connected to a wiring 101 extending in the A partition wall 113 disposed between the direction terminal 112 and the direction terminal 112 is provided.

X方向端子111は、X方向に延在する配線101が拡大することにより形成されている。
Y方向端子112は、第1の領域112aと、第1の領域112aと間隔を空けて設けられた第2の領域112bと、を備える。
すなわち、Y方向端子112は、Y方向に交差する方向で分断されている。
X方向に延在する配線101は、Y方向端子112における第1の領域112aと第2の領域112bとの間を通ることで、X方向に連続的に設けられている。
The X-direction terminal 111 is formed by expanding the wiring 101 extending in the X-direction.
The Y-direction terminal 112 includes a first region 112a and a second region 112b spaced apart from the first region 112a.
That is, the Y direction terminal 112 is divided in a direction intersecting the Y direction.
The wiring 101 extending in the X direction is provided continuously in the X direction by passing between the first region 112a and the second region 112b of the Y direction terminal 112.

隔壁113は、LED素子実装時にX方向端子111とY方向端子112との間が短絡することを防止するために設けられた絶縁物である。
隔壁113は、無機材料又は有機材料により形成することができる。
無機材料としては、酸化シリコンを例示することができる。
有機材料としては、感光性のアクリル樹脂を例示することができる。
The partition wall 113 is an insulator provided to prevent a short circuit between the X-direction terminal 111 and the Y-direction terminal 112 when mounting the LED element.
The partition wall 113 can be formed of an inorganic material or an organic material.
An example of the inorganic material is silicon oxide.
As the organic material, photosensitive acrylic resin can be exemplified.

なお、X方向に延在する配線101は、第1の領域112aと第2の領域112bの間に難半田性配線101aを含む。
難半田性配線101aは、X方向に延在する配線101の一部を形成し、少なくとも上面の全部が難半田付性材料で形成された配線である。
例えば、X方向に延在する配線101は銅により形成され、難半田性配線101aはアルミニウム、チタン、モリブデン又はITOにより形成される。
なお、Y方向に延在する配線102は、X方向に延在する配線101の難半田性配線101a以外の部分と同様に、銅により形成することができる。
Note that the wiring 101 extending in the X direction includes a difficult-to-solder wiring 101a between the first region 112a and the second region 112b.
The hard-to-solder wiring 101a forms a part of the wiring 101 extending in the X direction, and is a wiring whose at least the entire upper surface is made of a hard-to-solder material.
For example, the wiring 101 extending in the X direction is made of copper, and the difficult-to-solder wiring 101a is made of aluminum, titanium, molybdenum, or ITO.
Note that the wiring 102 extending in the Y direction can be formed of copper, similar to the portion of the wiring 101 extending in the X direction other than the difficult-to-solder wiring 101a.

このようなマトリクス部100を含む配線基板は、絶縁性基板上に導電性材料膜を形成してパターン形成することで配線101及び配線102を形成し、その後、難半田性材料膜を形成してパターン形成することで難半田性配線101aを形成し、その後、絶縁性材料膜を形成してパターン形成することで隔壁113を形成することによって作製される。
このようにして作製したマトリクス部100を含む配線基板にLED素子200が実装される。
A wiring board including such a matrix portion 100 is formed by forming a conductive material film on an insulating substrate and patterning it to form the wirings 101 and 102, and then forming a film of a difficult-to-solder material. It is manufactured by forming a difficult-to-solder wiring 101a by patterning, and then forming a barrier rib 113 by forming an insulating material film and patterning.
The LED element 200 is mounted on the wiring board including the matrix section 100 produced in this manner.

図4Aは、図3のA1-A1’におけるLED素子200実装後の断面図である。
図4Bは、図3のA2-A2’におけるLED素子200実装後の断面図である。
図5Aは、図3のB1-B1’におけるLED素子200実装後の断面図である。
図5Bは、図3のB2-B2’におけるLED素子200実装後の断面図である。
LED素子200は、互いに絶縁された第1のLED電極201及び第2のLED電極202を備える。
第1のLED電極201は、第1の接合部211を介してX方向端子111に接続されている。
第2のLED電極202は、第2の接合部212aを介してY方向端子112の第1の領域112aに接続され、第2の接合部212bを介してY方向端子112の第2の領域112bに接続されている。
すなわち、Y方向に延在する配線102は、第1の領域112aと第2の領域112bの間において、第2のLED電極202、第2の接合部212a及び第2の接合部212bによって、ブリッジ接続されている。
FIG. 4A is a cross-sectional view taken along line A1-A1' in FIG. 3 after the LED element 200 is mounted.
FIG. 4B is a cross-sectional view taken along A2-A2' in FIG. 3 after the LED element 200 is mounted.
FIG. 5A is a cross-sectional view taken along line B1-B1' in FIG. 3 after the LED element 200 is mounted.
FIG. 5B is a cross-sectional view taken along line B2-B2' in FIG. 3 after the LED element 200 is mounted.
The LED element 200 includes a first LED electrode 201 and a second LED electrode 202 that are insulated from each other.
The first LED electrode 201 is connected to the X-direction terminal 111 via a first joint 211.
The second LED electrode 202 is connected to the first region 112a of the Y-direction terminal 112 via a second joint 212a, and to the second region 112b of the Y-direction terminal 112 through a second joint 212b. It is connected to the.
That is, the wiring 102 extending in the Y direction is bridged between the first region 112a and the second region 112b by the second LED electrode 202, the second joint 212a, and the second joint 212b. It is connected.

第1の接合部211、第2の接合部212a及び第2の接合部212bは、自己凝集半田によって形成する。
第1の接合部211、第2の接合部212a及び第2の接合部212bは、熱硬化性樹脂中に、銅又はスズ等を含む半田合金材料からなる複数の半田粒子を均一に分散させたペースト状の材料をX方向端子111及びY方向端子112に塗布し、ペースト状の材料に第1のLED電極201及び第2のLED電極202を重ねることにより形成される。
ここで、複数の半田粒子を含むペースト状の材料の塗布は、スクリーン印刷法により行ってもよいし、メッシュマスクを用いた印刷法により行ってもよいし、インクジェット法により行ってもよい。
The first bonding portion 211, the second bonding portion 212a, and the second bonding portion 212b are formed by self-cohesive solder.
The first joint 211, the second joint 212a, and the second joint 212b are formed by uniformly dispersing a plurality of solder particles made of a solder alloy material containing copper, tin, etc. in a thermosetting resin. It is formed by applying a paste-like material to the X-direction terminal 111 and the Y-direction terminal 112, and overlapping the first LED electrode 201 and the second LED electrode 202 on the paste-like material.
Here, the paste-like material containing a plurality of solder particles may be applied by a screen printing method, a printing method using a mesh mask, or an inkjet method.

そして、半田粒子を含むペースト状の材料が塗布されたX方向端子111及びY方向端子112には、所定の精度で位置合わせされた第1のLED電極201及び第2のLED電極202を含むLED素子200が密着される。
ここでは、異方性導電膜による接合法と同様の熱圧着装置が用いられ、サブ画素110とLED素子200とが互いに接近する方向に、所定の温度及び時間で加圧される。
ここで、加熱とともに加圧する場合には、加圧は、例えば150℃まで加熱して150℃で15分間行う。
ただし、本発明はこれに限定されるものではなく、加熱前に加圧してもよい。
このように加熱して加圧されると、熱硬化性樹脂及び複数の半田粒子は溶融し、溶融した複数の半田粒子は凝集しつつ、X方向端子111及び第1のLED電極201、並びにY方向端子112及び第2のLED電極202に引き寄せられていく。
そして、最終的には、自己凝集して金属結合した半田によって、X方向端子111と第1のLED電極201との間には第1の接合部211が形成され、Y方向端子112と第2のLED電極202との間には第2の接合部212a及び第2の接合部212bが形成される。
また、配線基板10とLED素子200との間には溶融した熱硬化性樹脂が集まり、配線基板10とLED素子200とが熱圧着により接着されて放冷される。
The X-direction terminal 111 and the Y-direction terminal 112 coated with a paste-like material containing solder particles are provided with an LED including a first LED electrode 201 and a second LED electrode 202 that are aligned with a predetermined precision. Element 200 is brought into close contact.
Here, a thermocompression bonding device similar to the bonding method using an anisotropic conductive film is used, and pressure is applied at a predetermined temperature and time in a direction in which the sub-pixel 110 and the LED element 200 approach each other.
Here, in the case of pressurizing with heating, the pressurizing is performed, for example, by heating to 150° C. and at 150° C. for 15 minutes.
However, the present invention is not limited to this, and pressure may be applied before heating.
When heated and pressurized in this way, the thermosetting resin and the plurality of solder particles are melted, and while the plurality of melted solder particles are agglomerated, the X direction terminal 111, the first LED electrode 201, and the Y It is attracted to the direction terminal 112 and the second LED electrode 202.
Finally, by the solder that self-agglomerates and metallurgically bonds, a first joint 211 is formed between the X-direction terminal 111 and the first LED electrode 201, and a first joint 211 is formed between the Y-direction terminal 112 and the second LED electrode 201. A second bonding portion 212a and a second bonding portion 212b are formed between the LED electrode 202 and the LED electrode 202.
Moreover, the molten thermosetting resin gathers between the wiring board 10 and the LED element 200, and the wiring board 10 and the LED element 200 are bonded together by thermocompression bonding and allowed to cool.

このようにして、X方向端子111と第1のLED電極201とが、第1の接合部211によって選択的に金属結合されることで電気的に接続され、Y方向端子112と第2のLED電極202とが、第2の接合部212a,212bによって選択的に金属結合されることで電気的に接続される。
また、配線基板10とLED素子200とは、X方向端子111と第1の接合部211との間の金属結合と、第1のLED電極201と第1の接合部211との間の金属結合と、Y方向端子112と第2の接合部212a,212bとの間の金属結合と、第2のLED電極202と第2の接合部212a,212bとの間の金属結合と、熱硬化性樹脂による接着と、により、機械的に接合される。
このように、自己凝集半田を用いることで、接合を高精度に行うことができるため、高精細なマイクロLED表示装置を実現することができ、実装工程を簡略化することができる。
In this way, the X-direction terminal 111 and the first LED electrode 201 are electrically connected by being selectively metal-bonded by the first joint 211, and the Y-direction terminal 112 and the second LED electrode The electrode 202 is electrically connected to the electrode 202 through selective metal bonding through the second joints 212a and 212b.
Furthermore, the wiring board 10 and the LED element 200 have a metal bond between the X direction terminal 111 and the first joint 211 and a metal bond between the first LED electrode 201 and the first joint 211. , a metal bond between the Y-direction terminal 112 and the second joint portions 212a, 212b, a metal bond between the second LED electrode 202 and the second joint portions 212a, 212b, and a thermosetting resin. It is mechanically joined by adhesion and.
In this way, by using self-agglomerated solder, bonding can be performed with high precision, so a high-definition micro LED display device can be realized, and the mounting process can be simplified.

なお、このような自己凝集半田としては、例えば、商品名「リフロー実装異方性導電ペーストエポウェル APシリーズ」(積水化学工業株式会社製)又は商品名「Low-Temperature-Curable conductive」(日立化成株式会社製)等を用いることができる。 Examples of such self-cohesive solder include the product name "Reflow Mounting Anisotropic Conductive Paste Epowel AP Series" (manufactured by Sekisui Chemical Co., Ltd.) or the product name "Low-Temperature-Curable Conductive" (manufactured by Hitachi Chemical Co., Ltd.). Co., Ltd.) etc. can be used.

なお、本実施形態において、難半田性配線101a上にも隔壁114が設けられていてもよい。
図6は、本実施形態におけるLED素子実装前のサブ画素110Aの構成を示す他の例の上面図である。
図6に示すサブ画素110Aは、図3に示すサブ画素110に対して、難半田性配線101a上に隔壁114が設けられた点が異なり、その他の構成は図3に示すサブ画素110と同じである。
In addition, in this embodiment, the partition wall 114 may be provided also on the difficult-to-solder wiring 101a.
FIG. 6 is a top view of another example of the configuration of the sub-pixel 110A before mounting the LED element in this embodiment.
The sub-pixel 110A shown in FIG. 6 differs from the sub-pixel 110 shown in FIG. 3 in that a partition wall 114 is provided on the hard-to-solder wiring 101a, and the other configuration is the same as the sub-pixel 110 shown in FIG. It is.

図7は、図6のA-A’におけるLED素子200実装後の断面図である。
図8は、図6のB-B’におけるLED素子200実装後の断面図である。
図7,8に示すように、第1の領域112aと第2の領域112bとの間に設けられた隔壁114によれば、第2の接合部212aと第2の接合部212bとの間の短絡を防止することができる。
FIG. 7 is a cross-sectional view taken along line AA' in FIG. 6 after the LED element 200 is mounted.
FIG. 8 is a cross-sectional view taken along line BB' in FIG. 6 after the LED element 200 is mounted.
As shown in FIGS. 7 and 8, according to the partition wall 114 provided between the first region 112a and the second region 112b, there is a gap between the second joint portion 212a and the second joint portion 212b. Short circuits can be prevented.

隔壁114は、隔壁113と同一材料で同一工程により形成すればよい。
なお、隔壁114は、隔壁113に連続して上面においてT字状又は十字形状となるように設けられていてもよい。
The partition wall 114 may be formed from the same material as the partition wall 113 and by the same process.
Note that the partition wall 114 may be provided continuously from the partition wall 113 so as to have a T-shape or a cross shape on the upper surface.

なお、上述の説明において、第1の接合部211及び第2の接合部212a,212bは、自己凝集半田によって形成されているが、本発明はこれに限定されるものではない。
配線基板とLED素子との接合は、自己凝集半田ではない半田により行ってもよい。
ただし、配線基板とLED素子との接合を自己凝集半田ではない半田により行う場合には、上述の隔壁114を設ける。
Note that in the above description, the first bonding portion 211 and the second bonding portions 212a, 212b are formed of self-agglomerated solder, but the present invention is not limited to this.
The wiring board and the LED element may be bonded using solder other than self-agglomerated solder.
However, when the wiring board and the LED element are bonded using solder other than self-agglomerated solder, the above-mentioned partition wall 114 is provided.

なお、上述の説明におけるX方向端子111とY方向端子112との間に配された隔壁113は、第1の接合部211と第2の接合部212a及び第2の接合部212bの双方との間の絶縁性を確保することができるのであれば、設けられていなくてもよい。 Note that the partition wall 113 disposed between the X-direction terminal 111 and the Y-direction terminal 112 in the above description connects the first joint 211 with both the second joint 212a and the second joint 212b. As long as insulation between them can be ensured, it may not be provided.

なお、上述の説明では、配線基板上にマトリクス状に配される素子としてLED素子を例示して本実施形態に係るマイクロLED表示装置について説明したが、本発明はこれに限定されるものではない。
ミニLED表示装置も本発明に含まれる。
また、配線基板上にLED素子以外の素子がマトリクス状に配されるその他の装置も本発明に含まれる。
Note that in the above description, the micro LED display device according to the present embodiment has been explained by exemplifying LED elements as elements arranged in a matrix on a wiring board, but the present invention is not limited thereto. .
Mini LED displays are also included in the invention.
The present invention also includes other devices in which elements other than LED elements are arranged in a matrix on a wiring board.

なお、上述の説明では、隔壁113は、上面図においてY方向に延在した形状であるが、本発明はこれに限定されるものではなく、隔壁113の上面形状は特定のものに限定されるものではない。 In the above description, the partition wall 113 has a shape extending in the Y direction in the top view, but the present invention is not limited to this, and the top surface shape of the partition wall 113 is limited to a specific shape. It's not a thing.

以上説明したように、本実施形態によれば、実装される素子の電極によりブリッジ接続を行うことで、ブリッジ接続を形成するための工程を省略することが可能となり、マトリクス状に素子が配置される配線基板の縦横の配線の短絡を防止可能な構造を簡略な作製工程で実現することができる。 As explained above, according to this embodiment, by making a bridge connection using the electrodes of the elements to be mounted, it is possible to omit the process for forming a bridge connection, and the elements are arranged in a matrix. A structure that can prevent short circuits between vertical and horizontal wiring of a wiring board can be realized through a simple manufacturing process.

(実施形態2)
実施形態1では、配線の一部を難半田性配線により形成した形態について説明したが、本発明はこれに限定されるものではない。
本実施形態では、難半田性配線を用いない例について説明する。
(Embodiment 2)
In Embodiment 1, a mode in which a part of the wiring is formed by a difficult-to-solder wiring has been described, but the present invention is not limited to this.
In this embodiment, an example will be described in which hard-to-solder wiring is not used.

図9は、本実施形態におけるLED素子実装前のサブ画素110Bの構成を示す上面図である。
図9に示すサブ画素110Bは、配線101に代えて難半田性配線101aを含まない配線101Aが用いられ、サブ画素110において難半田性配線101aが配置される部分の配線101A上に配線101Aを覆う絶縁物115が設けられている点が図3に示すサブ画素110と異なり、その他の構成は図3に示すサブ画素110と同じである。
FIG. 9 is a top view showing the configuration of the sub-pixel 110B before mounting the LED element in this embodiment.
In the sub-pixel 110B shown in FIG. 9, a wiring 101A that does not include the hard-to-solder wiring 101a is used instead of the wiring 101, and the wiring 101A is placed on the wiring 101A in the portion of the sub-pixel 110 where the hard-to-solder wiring 101a is arranged. This sub-pixel 110 differs from the sub-pixel 110 shown in FIG. 3 in that a covering insulator 115 is provided, and the other configurations are the same as the sub-pixel 110 shown in FIG. 3.

図10は、図9のA-A’におけるLED素子200実装後の断面図である。
図11は、図9のB-B’におけるLED素子200実装後の断面図である。
図10,11に示すように、配線101A上の第1の領域112aと第2の領域112bとの間に設けられた絶縁物115によれば、配線101Aへの半田の付着を防止することができるとともに、第2の接合部212aと第2の接合部212bとの間の短絡を防止することができる。
FIG. 10 is a cross-sectional view taken along line AA' in FIG. 9 after the LED element 200 is mounted.
FIG. 11 is a cross-sectional view taken along line BB' in FIG. 9 after the LED element 200 is mounted.
As shown in FIGS. 10 and 11, the insulator 115 provided between the first region 112a and the second region 112b on the wiring 101A can prevent solder from adhering to the wiring 101A. At the same time, it is possible to prevent a short circuit between the second joint portion 212a and the second joint portion 212b.

絶縁物115は、実施形態1の隔壁113及び隔壁114と同様に形成すればよい。
ただし、絶縁物115は、配線101Aへの半田の付着を防止するために、配線101AよりもY方向の幅を広くすることで、第1の領域112aと第2の領域112bとの間における配線101Aの全面を覆うように形成される。
The insulator 115 may be formed in the same manner as the partition walls 113 and 114 in the first embodiment.
However, in order to prevent solder from adhering to the wiring 101A, the insulator 115 is made wider in the Y direction than the wiring 101A, so that the wiring between the first region 112a and the second region 112b is It is formed to cover the entire surface of 101A.

図12は、本実施形態におけるLED素子実装前のサブ画素110Cの構成を示す他の例の上面図である。
図12に示すサブ画素110Cは、絶縁物115に代えて、配線101Aを覆う絶縁物116が設けられた点が異なり、その他の構成は図10に示すサブ画素110Bと同じである。
FIG. 12 is a top view of another example of the configuration of the sub-pixel 110C before mounting the LED element in this embodiment.
The sub-pixel 110C shown in FIG. 12 differs in that an insulator 116 covering the wiring 101A is provided instead of the insulator 115, and the other configuration is the same as the sub-pixel 110B shown in FIG.

図13は、図12のA-A’におけるLED素子200実装後の断面図である。
図14は、図12のB-B’におけるLED素子200実装後の断面図である。
図13,14に示すように、第1の領域112aと第2の領域112bとの間及びX方向端子111とY方向端子112との間に設けられた上面において十字形状の絶縁物116によれば、第2の接合部212aと第2の接合部212bとの間の短絡を防止することができるのみならず、実施形態1の隔壁113と同様に、第1の接合部211と第2の接合部212a又は第1の接合部211と第2の接合部212bとの間の短絡を防止することができる。
FIG. 13 is a cross-sectional view taken along line AA' in FIG. 12 after the LED element 200 is mounted.
FIG. 14 is a cross-sectional view taken along line BB' in FIG. 12 after the LED element 200 is mounted.
As shown in FIGS. 13 and 14, a cross-shaped insulator 116 is formed on the upper surface provided between the first region 112a and the second region 112b and between the X-direction terminal 111 and the Y-direction terminal 112. For example, it is possible not only to prevent a short circuit between the second joint part 212a and the second joint part 212b, but also to prevent the short circuit between the first joint part 211 and the second joint part 212b, similar to the partition wall 113 of the first embodiment. A short circuit between the joint portion 212a or the first joint portion 211 and the second joint portion 212b can be prevented.

絶縁物116は、実施形態1の隔壁113及び隔壁114と同様に形成すればよい。
また、絶縁物116の形状はX方向における短絡とY方向における短絡の双方を防止することができれば、図示する形状に限定されるものではない。
The insulator 116 may be formed in the same manner as the partition walls 113 and 114 in the first embodiment.
Further, the shape of the insulator 116 is not limited to the illustrated shape as long as it can prevent both short circuits in the X direction and short circuits in the Y direction.

なお、本発明は、上述の実施形態に限定されるものではなく、上述の構成に対して、構成要素の付加、削除又は転換を行った様々な変形例も含むものとする。 Note that the present invention is not limited to the above-described embodiments, and includes various modifications in which components are added, deleted, or converted to the above-described configuration.

10 配線基板
11 制御部
12,13 駆動部
100 マトリクス部
101,101A,102 配線
101a 難半田性配線
110,110A,110B,110C サブ画素
111 X方向端子
112 Y方向端子
112a 第1の領域
112b 第2の領域
113,114 隔壁
115,116 絶縁物
200 LED素子
201 第1のLED電極
202 第2のLED電極
211 第1の接合部
212a,212b 第2の接合部
10 Wiring board 11 Control section 12, 13 Drive section 100 Matrix section 101, 101A, 102 Wiring 101a Difficult to solder wiring 110, 110A, 110B, 110C Sub-pixel 111 X-direction terminal 112 Y-direction terminal 112a First region 112b Second region 113, 114 partition 115, 116 insulator 200 LED element 201 first LED electrode 202 second LED electrode 211 first joint 212a, 212b second joint

Claims (4)

第1方向に延在する配線と該第1方向に交差する第2方向に延在する配線とが設けられた配線基板に複数のLED素子が実装されたマイクロLED表示装置であって、
前記第1方向に延在する配線に接続する端子の各々が、
第1領域と、
前記第1領域と間隔を空けて設けられた第2領域と、を備え、
前記第2方向に延在する配線が、前記第1領域と前記第2領域との間を通り、
前記第1方向に延在する配線に接続する端子及び前記第2方向に延在する配線に接続する端子の各々には、自己凝集半田によりLED素子の電極が接合されるマイクロLED表示装置。
A micro LED display device in which a plurality of LED elements are mounted on a wiring board provided with wiring extending in a first direction and wiring extending in a second direction crossing the first direction,
Each of the terminals connected to the wiring extending in the first direction,
a first area;
a second region spaced apart from the first region;
A wiring extending in the second direction passes between the first region and the second region,
A micro LED display device in which an electrode of an LED element is bonded to each of the terminal connected to the wiring extending in the first direction and the terminal connected to the wiring extending in the second direction by self-agglomerated solder.
前記第2方向に延在する配線は、前記第1領域と前記第2領域との間では少なくとも上面の全部が難半田性材料により形成されている請求項1に記載のマイクロLED表示装置。 2. The micro LED display device according to claim 1, wherein at least the entire upper surface of the wiring extending in the second direction is formed of a difficult-to-solder material between the first region and the second region. 前記第2方向に延在する配線は、銅と、前記難半田性材料と、により形成され、
前記難半田性材料は、アルミニウム、チタン、モリブデン又はITOである請求項2に記載のマイクロLED表示装置。
The wiring extending in the second direction is formed of copper and the difficult-to-solder material,
3. The micro LED display device according to claim 2, wherein the difficult-to-solder material is aluminum, titanium, molybdenum, or ITO.
前記第1方向に延在する配線に接続する端子と前記第2方向に延在する配線に接続する端子との間には絶縁性の隔壁が設けられている請求項1から3のいずれか一項に記載のマイクロLED表示装置。 Any one of claims 1 to 3, wherein an insulating partition is provided between a terminal connected to the wiring extending in the first direction and a terminal connected to the wiring extending in the second direction. The micro LED display device described in .
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012175066A (en) 2011-02-24 2012-09-10 Sony Corp Light-emitting device, lighting apparatus, and display apparatus
JP2015198145A (en) 2014-03-31 2015-11-09 ソニー株式会社 Mounting board and electronic device
US20170186740A1 (en) 2015-12-23 2017-06-29 X-Celeprint Limited Matrix-addressed device repair
US20200194515A1 (en) 2018-12-17 2020-06-18 Lg Display Co., Ltd. Sensor package module and organic light-emitting display device having same
CN111627953A (en) 2020-06-29 2020-09-04 上海天马微电子有限公司 Display panel, preparation method thereof and display device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101763107B1 (en) * 2015-09-14 2017-08-07 루미마이크로 주식회사 Light emitting package and transparent display device including it
KR102622421B1 (en) * 2018-12-31 2024-01-05 엘지디스플레이 주식회사 Light emitting diode display apparatus and multi screen display apparatus using the same
JP2020194515A (en) 2019-05-29 2020-12-03 株式会社ストンピィ General-purpose artificial intelligence

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012175066A (en) 2011-02-24 2012-09-10 Sony Corp Light-emitting device, lighting apparatus, and display apparatus
JP2015198145A (en) 2014-03-31 2015-11-09 ソニー株式会社 Mounting board and electronic device
US20170186740A1 (en) 2015-12-23 2017-06-29 X-Celeprint Limited Matrix-addressed device repair
US20200194515A1 (en) 2018-12-17 2020-06-18 Lg Display Co., Ltd. Sensor package module and organic light-emitting display device having same
CN111627953A (en) 2020-06-29 2020-09-04 上海天马微电子有限公司 Display panel, preparation method thereof and display device

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