JP7276830B2 - game machine - Google Patents

Description

The present invention relates to a game machine having game control means capable of executing games.

In a conventional game machine, a stack area exists in the RAM (update information storage means) of the game control device (for example, Patent Document 1).

Japanese Patent Application Laid-Open No. 2002-000878

However, since the stack area can be arbitrarily set by the program, there is a possibility that the work efficiency of creating the program is lowered.

SUMMARY OF THE INVENTION An object of the present invention is to prevent a decrease in work efficiency of program creation.

According to a representative aspect of the present invention, in a gaming machine comprising game control means capable of executing a game, the game control means includes program storage means for storing a program, and arithmetic processing for performing predetermined arithmetic processing according to the program. and update information storage means capable of storing information to be updated by the arithmetic processing means, and stacking the default address before executing the instruction stored at the start address of the program storage means. The program storage means includes a first storage area for storing a first program related to game control and a second storage area for storing a second program related to other than game control. The update information storage means includes a first work area and a first stack area used for work of the first program, and a first work area and a first stack area used for work of the second program . There are two work areas and a second stack area, and the first stack area is the default address set in the stack pointer and is an abbreviation of a plurality of addresses assigned to the update information storage means. After that, the address of the base point of the first stack area is not changed from the default address, and the address of the base point of the second stack area is the default address. The second address is set to the stack pointer when the second program is executed, and the first work area is read and written by the first program, and a first common area that is at least written by the first program and readable by the second program, the first common area comprising: It is arranged between the plurality of first dedicated areas.

According to one aspect of the present invention, it is possible to prevent the work efficiency of program creation from being lowered.

It is a perspective view of the game machine viewed from the front side. It is a front view of a game board. It is a block diagram which shows the structural example of the game control system of a game machine. It is a block diagram which shows the structural example of the production|presentation control system of a game machine. 10 is a flowchart showing the procedure of the first half of main processing; FIG. 10 is a flow chart showing the procedure of the second half of the main processing; FIG. 4 is a flow chart showing a procedure of timer interrupt processing; 9 is a flowchart showing the procedure of probability setting change/confirmation processing; It is a flowchart which shows the procedure of a special figure game process. 4 is a flow chart showing a procedure of a starting port switch monitoring process; It is a flowchart which shows the procedure of a special figure starting mouth switch common process. It is a flowchart which shows the procedure of a special figure usual process. It is a flow chart showing the procedure of special figure 1 fluctuation start processing. It is a flow chart showing the procedure of special figure 2 fluctuation start processing. It is a flowchart which shows the procedure of a jackpot flag 1 setting process. It is a flowchart which shows the procedure of a jackpot flag 2 setting process. It is a flowchart which shows the procedure of a big-hit determination process. It is a flowchart which shows the procedure of special figure information setting processing. It is a flowchart which shows the procedure of a variation pattern setting process. 10 is a flow chart showing a procedure of 2-byte allocation processing; 10 is a flow chart showing a procedure of sorting processing; 9 is a flow chart showing the procedure of a change start information setting process; It is a flowchart which shows the procedure of normal figure game processing. It is a flowchart which shows the procedure of normal figure usual processing. It is a flow chart which shows the main processing of the production control device. 9 is a flowchart showing received command check processing; 9 is a flowchart showing received command analysis processing; 10 is a flowchart showing single-shot command processing; It is a flow chart showing a look-ahead pattern system command process. FIG. 11 is a flow chart showing look-ahead variation command processing; FIG. It is a flow chart which shows design system command processing. 10 is a flowchart showing variable command processing; It is a flow chart which shows change production setting processing. It is a flowchart which shows the procedure of hit system command processing. It is the perspective view (a) which looked at the lower tray unit from the diagonally upper right, and the perspective view (b) which looked at the lower tray unit from the diagonally upper left. It is a block diagram which shows the structure of the modification of the game control system of a game machine. It is a block diagram which shows the structure of the modification of the production|presentation control system of a game machine. It is an example of the screen transition diagram which showed the display screen of the display apparatus in time series when the call button is operated. It is an example of the screen transition diagram which showed the display screen of a display apparatus when performing the explanatory display about operation of the call button in time series. It is a figure showing a state that the detachable parts according to the second embodiment are normally attached to the gaming machine. FIG. 10 is a diagram showing how the detachable part according to the second embodiment is incorrectly attached to the game machine; FIG. 10 is a diagram showing a state in which error notification is performed in the gaming machine according to the second embodiment; It is a figure which shows the example which displays the alerting|reporting information which concerns on 2nd Embodiment on the display apparatus during display of the loss stop design of a special figure fluctuation display game. FIG. 11 is a schematic configuration diagram schematically showing a configuration example of a gaming machine according to a second embodiment; It is a figure which shows the rotary switch of the parts which concern on 2nd Embodiment. FIG. 10 is a diagram showing a reference table that associates model designation commands with series IDs (series identification information); 2 shows the configuration of a parallel-serial conversion unit when the parallel-serial conversion unit is a normal parallel-serial conversion IC; 4 shows a first modification of the part identification substrate. FIG. 11 shows a second modification of the part identification substrate. FIG. It is a figure which shows the ID change mode for changing (adding) model designation command and series ID which the production|presentation control apparatus of 2nd Embodiment performs. 9 is a flowchart showing the procedure of main processing (main program) according to the second embodiment; It is a flowchart which shows the procedure of the parts collation process performed by the production|presentation control apparatus. FIG. 48A is a diagram showing a reference table (FIG. 48A) that associates a model designation command with combined identification information, and a reference table (FIG. 48B) that shows classification of nonconforming models according to the second embodiment; It is a flowchart which shows the procedure of the modification of the parts collation process performed by the production|presentation control apparatus. It is a block diagram which shows the structural example of the game control system which concerns on 3rd Embodiment. It is a circuit diagram which illustrates the electric circuit of the periphery of the microcomputer for a game, and each IC chip for drivers. It is a circuit diagram which illustrates the peripheral electric circuit of the microcomputer for a game, and the IC chip for solenoid drivers. It is a circuit diagram which illustrates an electric circuit around a microcomputer for a game and a connector part. FIG. 2 is a circuit diagram illustrating an electric circuit (electronic circuit) around a connector section and a serial/parallel conversion circuit on a relay board; FIG. 12 is a flow chart showing the procedure of the second half of the main processing according to the third embodiment; FIG. FIG. 11 is a flow chart showing a procedure of timer interrupt processing according to the third embodiment; FIG. 4 is a flowchart showing a procedure of output processing; It is a flowchart which shows the procedure of test-firing test signal output processing. 7 is a flow chart showing a procedure of performance display monitor control processing (performance display setting processing); 9 is a flow chart showing a procedure of initial display timer update processing; FIG. 10 is a flow chart showing a procedure of performance display monitor tabulation processing (performance display editing processing); FIG. 3 is a diagram illustrating an outline of storage areas of ROM and RAM; FIG. FIG. 4 is a diagram illustrating details of a ROM storage area; FIG. 3 is a diagram illustrating details of a RAM storage area; FIG. FIG. 12 is a block diagram showing the internal configuration of a CPU according to the third embodiment; FIG. 1 is a program list (part 1) showing a program structure of an output processing program; FIG. 10 is a program list (part 2) showing the program structure of the output processing program; FIG. 3 is a program list (part 3) showing the program structure of an output processing program; 4 is a program list showing a program structure of a performance display monitor control program (performance display setting program); 4 is a program list showing the program structure of a test-firing test signal output program; FIG. 10 is a diagram showing a display example of base values; (A) is a diagram showing a management interval, which is a base value measurement interval. (B) is a diagram explaining a display mode of a base value. FIG. 14 is a flowchart showing a procedure of power-on processing according to the fourth embodiment; FIG. It is a flow chart which shows the procedure of game control device program start preparation processing concerning a 4th embodiment. FIG. 11 is a diagram illustrating details of storage areas of a RAM according to the fourth embodiment; FIG. FIG. 14 is a flowchart showing the procedure of base error notification processing according to the fifth embodiment; FIG. It is a block diagram showing the board|substrate etc. which are connected to the production|presentation control apparatus of 6th Embodiment, and this. It is a circuit diagram in the decoration control device. 4 is a time chart showing the fall of a DC32V power supply, a DC15V power supply, a DC12V power supply, and a DC5V power supply; It is a circuit diagram which shows the connection aspect of VDP in a production|presentation control apparatus, and a volume control switch. It is a circuit diagram which shows the connection aspect of VDP in a production|presentation control apparatus, a motor sensor, etc. FIG. It is a circuit diagram which shows the connection aspect of VDP and a display device in a production|presentation control apparatus. It is a flow chart which shows the main processing of the production control device. It is a flowchart which shows the procedure of the production|presentation apparatus error monitoring process performed by the production|presentation control apparatus. It is a flow chart showing a procedure of movable body control timer interrupt processing executed by the effect control device. 4 is a flowchart showing the procedure of motor A control processing; It is a figure which shows the delay branch processing which CPU in a production|presentation control apparatus performs, and FIG.84(a) shows the case where delay branch processing is performed when delay branch processing is performed, and FIG.84(b) shows the case where delay branch processing is not performed. It is a figure which shows the procedure of the error processing regarding the CPU error of CPU in a production|presentation control apparatus.

[First embodiment]
Preferred embodiments of the present invention will be described below with reference to the drawings. Note that front, back, left, and right in the description of the gaming machine refer to directions seen by the player during the game.

[General view of game machine]
FIG. 1 is a diagram illustrating a gaming machine.

The game machine 10 has an opening/closing frame attached to a frame 11 fixed to an island facility via a hinge so as to be freely opened/closed. The opening/closing frame is composed of a front frame 12 (body frame) and a glass frame 15 .

A game board 30 (see FIG. 2) is arranged on the front frame 12, and a glass frame 15 having a cover glass 14 covering the front surface of the game board 30 is attached. The cover glass 14 functions as a game visual recognition area that makes a game area 32 (see FIG. 2) formed on the game board 30 visible.

The front frame 12 and the glass frame 15 can be opened individually. For example, by opening only the glass frame 15, the game area 32 of the game board 30 can be accessed. Also, by opening the front frame 12 in a state where the glass frame 15 is not opened, it is possible to access the game control device (main board) 100 (see FIG. 3) and the like arranged on the back side of the game board 30. can be done.

Various frame-constituting members are arranged on the edge portion of the glass frame 15 around the cover glass 14 .

At the upper center and left side of the glass frame 15, decoration devices 1 capable of emitting light according to the game state are provided.
8a and 18b are provided. The decoration devices 18a and 18b house lighting members such as LEDs therein, and perform light emission effects according to the game state. The illumination members arranged inside these decoration devices 18a and 18b constitute part of the frame decoration device 18 (see FIG. 4).

Upper speakers 19a are arranged at the upper right corner portion and the upper left corner portion of the glass frame 15, respectively. Two lower speakers 19b are provided in the lower part of the game machine 10 separately from the upper speakers 19a. The lower speaker 19 b is arranged at the lower left corner portion of the glass frame 15 and the lower right corner portion of the front frame 12 . These upper speaker 19a and lower speaker 19b emit sound effects, alarm sounds, notification sounds, and the like.

On the right side of the glass frame 15, a protruding effect unit 13 that extends in the vertical direction of the gaming machine 10 and protrudes forward (toward the player) is arranged. Protruding production unit 1
Reference numeral 3 denotes a performance device that performs lighting effects and the like in accordance with the progress of the game. Protruding production unit 13
The illumination member disposed inside also constitutes a part of the frame decoration device 18 (see FIG. 4).

An upper plate unit having an upper plate 21 capable of storing game balls (game media) is attached to the lower portion of the glass frame 15 . The upper plate 21 is formed in a box shape with an open top. Upper plate 2
The game balls stored in 1 are supplied one by one to a ball shooting device (not shown).

The upper tray unit further includes a performance operation device for receiving input operations from the players, a ball lending operation device for receiving input operations from the players, and a decoration device 22 for performing light-emitting performance or the like according to the game state. .

The production operation device is an operation device in which a touch panel 25b is incorporated in the production button 25,
It is provided in the upper center of the upper tray unit so that the player can easily operate it.

By operating the effect operation device by the player, it is possible to perform an effect in which the player's operation is intervened in a special figure variation display game (game) or the like displayed on the display device 41 (see FIG. 2). For example, it is possible to select an effect pattern (effect mode), or execute an advance notice effect that gives advance notice of the result of the variable display game (game) corresponding to the starting memory. Note that the variable display game includes a special figure variable display game, and when simply referred to as a variable display game, this specification refers to a special figure variable display game.

Also, the effect pattern may be changed not only during execution of the variable display game but also by the player operating the effect operation device while the game is not being executed.

The game state when the variable display game is executed consists of a plurality of game states. The normal game state (normal state) is a game state in which no special game state occurs. In addition, the special game state is, for example, a state with a high probability of occurrence of a special result (for example, a big hit) in a time-saving state or a variable display game as a specific game state (variable state, probability variable state), a big hit state (
special game state).

Here, the probability variable state (specific game state) continues until the next big hit occurs (loop type), continues until a predetermined number of variable display games are executed (number cut type, ST), and There is one that continues until a predetermined probability fall lottery is won (fall lottery type).

Furthermore, whether or not to generate the probability variable state may be always generated when the big hit occurs without determining whether or not to generate the probability variable state by the big hit pattern random number, or a prize winning device having a specific area may be provided and specified. A variable probability state may be generated when a game ball passes through the area.

The ball lending operation device is an operation device operated by the player when borrowing game balls, and is provided on the upper right side of the upper tray unit. The ball rental operation device includes a ball rental button 27 and a return button 28.
, and a balance display unit 26 . A ball lending button 27 is a button operated by a player when borrowing a game ball, and a return button 28 is used when ejecting a prepaid card or the like from a card unit (not shown) arranged adjacent to the gaming machine 10. These are buttons operated by the player. The balance display portion 26 is a display area for displaying the balance of a prepaid card or the like.

The decoration device 22 accommodates an illumination member such as an LED inside, and is a device that performs light emission effect or the like according to the game state, and is provided in the front portion of the upper tray unit. The illumination member arranged inside the decoration device 22 constitutes a part of the frame decoration device 18 (see FIG. 4).

Beneath the glass frame 15 including the above-described upper tray unit and the like, and below the front frame 12, there are an operation handle 24 for controlling the operation of a ball shooting device (not shown) and a game ball capable of being stored. A lower plate 23 is provided.

The operating handle 24 is arranged in the lower right portion of the front frame 12 and below the right lower speaker 19b. The ball shooting device shoots game balls supplied from the upper tray 21 to the game area 32 of the game board 30 when the player rotates the operation handle 24 . The shooting speed of the game ball shot from the ball shooting device is set so as to increase as the rotation amount of the operation handle 24 increases. That is, the ball launching device has a momentum (speed) for launching the game ball into the game area.
can be changed according to the operation of the operation handle 24 by the player, and the game ball can be shot in various shooting modes with different shooting momentum. The shooting modes include left hitting (normal hitting) in which the game ball flows down on the left side of the game area 32 and right hitting in which the game ball flows down on the right side of the game area 32 .

The lower tray 23 is arranged below the upper tray unit with a predetermined gap from the upper tray unit. The lower plate 23 has a ball removal hole 23a vertically passing through the bottom surface of the lower plate 23, and an opening/closing operation portion 23b for opening and closing the ball removal hole 23a. When the player operates the opening/closing operation portion 23b to open the ball extraction hole 23a, the game balls stored in the lower tray 23 can be discharged to the outside through the ball extraction hole 23a.

[Game board]
Next, the game board 30 of the game machine 10 will be described with reference to FIG. FIG. 2 is a front view of the game board 30 provided in the game machine 10. As shown in FIG.

As shown in FIG. 2, the game board 30 includes a flat plate-shaped game board main body 3 that serves as an attachment base for various members.
0a. The game board main body 30a is made of wood or synthetic resin.
A game area 32 surrounded by guide rails 31 is provided on the front surface of the . The gaming machine 10
A game is played by shooting game balls from a ball shooting device into a game area 32 surrounded by guide rails 31. - 特許庁In the game area 32, windmills, obstacle nails, etc. are arranged as members for changing the flowing direction of the game ball.

At approximately the center of the game area 32, a center case (front structure) 40 is attached to form a window portion that serves as a display area for the variable display game. At the rear of the window formed in the center case 40, there is an effect display device (variable display device) that variably displays (variably displays) a plurality of pieces of identification information.
A display device 41 is arranged. The display device 41 includes, for example, a liquid crystal display, and is arranged so that display contents can be visually recognized from the front side of the game board 30 through the window portion of the center case 40 . The display device 41 is not limited to having a liquid crystal display, and may have a display such as an EL or a CRT.

A plurality of variable display areas are provided on the display screen (display unit) of the display device 41, and identification information (special symbols) and characters for producing a variable display game are displayed in each variable display area. In addition, images based on the progress of the game (big win display, fanfare display, ending display, etc.) are displayed on the display screen.

In addition, the center case 40 is equipped with a game ball flowing down the game area 32 .
An inflow port 40a to a warp passage 40e for guiding the game ball to the inside and a stage portion 40b on which game balls that have passed through the warp passage 40e can roll are provided. Since the stage portion 40b of the center case 40 is arranged above the starting prize opening 36 and the normal variable prize winning device 37,
A game ball rolled on the stage portion 40b is likely to enter the starting prize winning port 36 or the normal variable prize winning device 37.例文帳に追加

An upper effect unit 40c and a side effect unit 40d are provided in the upper part and the right part of the center case 40, respectively. Upper production unit 40c and side production unit 40d
constitutes a part of the board decoration device 46 (see FIG. 4) and the board rendering device 44 (see FIG. 4).

A normal pattern start gate (normal pattern start gate) 34 is provided in the game area 32 on the right side of the center case 40 . Inside the normal pattern starting gate 34, a gate switch (SW) 34a (see FIG. 3) for detecting a game ball that has passed through the normal pattern starting gate 34 is provided. When the game ball hit into the game area 32 passes through the normal pattern starting gate 34, the normal pattern fluctuation display game is executed.

A general prize winning opening 35 is arranged in the lower left game area 32 of the center case 40 , and a general winning opening 35 is also arranged in the lower right game area 32 of the center case 40 . Winning of game balls to these general winning openings 35 is achieved by a winning opening switch (SW) provided in the general winning opening 35
) 35a-35n (see FIG. 3).

In the lower game area 32 of the center case 40, there is provided a start winning opening (first starting winning area) 36 that gives the starting condition of the special figure fluctuation display game, and directly below it is a second starting winning opening (second A normal variable winning device 37 having a starting winning area) is provided. The normal variable winning device 37 is provided with a movable member (movable piece) 37b that converts into a state in which game balls can easily flow in by rotating in a direction in which the upper end side falls down toward the near side. When the movable member 37b is in the closed state, the game balls cannot win the normal variable winning device 37.例文帳に追加When the game ball wins the starting winning port 36 or the normal variable winning device 37, a special figure variable display game is executed as an auxiliary game.

The movable member 37b is a so-called tongue type normal electric accessory, and rotates via a normal electric solenoid 37c (see FIG. 3) when the result of the normal figure fluctuation display game is in a predetermined stop display mode. , and changes to an open state in which game balls tend to flow into the normal variable winning device 37 (an easy winning state advantageous to the player).

The movable member 37b is controlled by a game control device 100, which will be described later. The game control device 100 shortens the fluctuation time of the normal pattern fluctuation display game or increases the probability of winning the normal pattern fluctuation display game by making the probability higher than usual, thereby increasing the frequency of occurrence of the easy winning state, or normal game state. By making the occurrence time of the easy winning state longer than the easy winning state generated in , a time saving state (general electric support state) is generated as the above-mentioned specific game state. In addition, the variable state (
Even in the latent probability variable state), a time-saving state (general electric support state) will occur.

In the game area 32 on the lower right side of the normal variable winning device 37, there is a large winning opening solenoid 39b (Fig. 3)
), there is provided a special variable winning device 39 having an attacker type open/close door 39c that opens the big winning opening by rotating in a direction in which the upper end side falls forward. The special variable winning device 39 converts the state of the large winning opening closed (blocked state unfavorable to the player) to an open state (special game state advantageous to the player) according to the result of the special figure variable display game, thereby winning a large prize. By facilitating the inflow of game balls into the mouth, predetermined game values (prize balls) are awarded to the player. A count switch 39a (large winning opening switch 39a, see FIG. 3) is arranged in the large winning opening as detecting means for detecting a game ball that has entered the large winning opening. In addition, a light-emitting member for illuminating the big winning opening is arranged in or near the big winning opening.

A specific area 86 (so-called V winning opening) is provided inside the second special variable winning device 39 . When the game ball enters the specific area 86 (V winning opening), the probability change state (
High probability state, specific game state) is determined. The specific area 86 may be opened for a long time only in the case of a variable probability big hit so that the game ball can easily pass through. In addition, the game control device 100 can detect passage of the game ball to the specific area 86 (V winning) through a sensor (specific area switch 72 described later) or the like. While confirming that it does, it transmits information (specific area passing command etc.) indicating that there was a V prize to the effect control device 300 described later. Then, the effect control device 300 displays the V prize on the display device 4
1 and so on.

General winning port 35, starting winning port 36, normal variable winning device 37, and special variable winning device 39
When a game ball wins in the big winning hole, the payout control device 200 (see FIG. 3) discharges the number of prize balls from the payout device to the upper tray 21 according to the type of the winning winning hole. In addition, normal variable winning device 3
In the game area 32 below 7, an out port 30 for collecting game balls that did not win a prize such as a prize winning port
b is provided.

In addition, outside the game area 32 and in the lower right corner of the game board main body 30a, a special figure variation display game (a special figure 1 variation display game, a special figure 2 variation display game) and a normal figure variation display game are executed. A collective display device 50 is provided. The collective display device 50 includes display units 51 to 60 for displaying information such as the current game state.

The collective display device 50 includes a first special figure variation display unit 51 (special figure 1 indicator, lamp D1) and a second special figure variation for a variation display game composed of a 7-segment type display (LED lamp) Display unit 52 (special figure 2 indicator, lamp D2), variation display unit 53 for normal figure variation display game (normal figure indicator, lamps D10, D18), start (hold) memory number of each variation display game Storage display unit for notification (special figure 1 reservation indicator 54, special figure 2 reservation indicator 55, general figure reservation indicator 56),
have. The special figure 1 reservation indicator 54 is composed of lamps D11 and D12. special figure 2
The hold indicator 55 is composed of lamps D13 and D14. The general map holding display 56 is configured by lamps D15 and D16.

In addition, the collective display device 50 has a first game state display unit 57 (first game state display, lamp D8),
A second game state display unit 58 (second game state indicator, lamp D9) which lights up when a time saving state occurs to inform the occurrence of the time saving state, and when the game machine 10 is powered on, the probability state of a big hit becomes a high probability state. 3rd game state display unit 59 (third game state display unit, probability state display unit, lamp D17) for displaying that the game is on, round display for displaying the number of rounds at the time of the big win (the number of opening and closing times of the special variable winning device 39) A section 60 (lamps D3-D7) is provided.

In the special figure 1 indicator 51 and the special figure 2 indicator 52, the variable display game is executed by a variable display in which the identification information (for example, the central segment) is repeatedly turned on and off (blinking). In addition, the special figure 1 indicator 51 and the special figure 2 indicator 52 are not limited to such segment type display units,
It may be composed of an aggregate of a plurality of LEDs, and when performing a variable display, all LEDs provided as indicators may be all lit and all extinguished (simultaneous blinking of all LEDs), or cyclic lighting (any One LED may be turned on and off in a predetermined order every predetermined time), or a predetermined number of LEDs out of a plurality of LEDs may be lit and extinguished (blinking) or cyclically lit. Also in the normal figure display device 53, the variable display game is executed by a variable display (blinking) in which the lamps D10 and D18 are repeatedly turned on and off. In addition, the normal figure indicator 53 is also the special figure 1 indicator 5
1. It is possible to configure appropriately in the same manner as the special figure 2 display 52.

In addition, the lamp display device 80 provided on the upper part of the center case 40 is a lamp display unit (flash) that performs a variable display (blinking) that repeats lighting display and extinguishing display as a pattern (fourth special pattern).
LED) and a lamp display unit (LED
). Note that the lamp display device 80 is controlled by an effect control device 300 (described later).
The lamp display unit (LED) for notifying the start (reservation) memory number of each special figure fluctuation display game ends the display of the reservation number due to the occurrence of a big hit, but if it is not in the state of a big hit (reach described later on the display device 41 (including cases where is occurring), display the number of pending.

Next, details of the flow of the game in the gaming machine 10, the normal figure variation display game, and the special figure variation display game will be described.

In the gaming machine 10, a game is played by shooting game balls toward the game area 32 from a ball shooting device (not shown). The launched game ball flows down the game area 32 while changing the rolling direction by obstructing nails, windmills, etc. arranged at various places in the game area 32, and enters a normal figure start gate 34, a general prize winning opening 35, and a starting winning opening. 36, wins a normal variable winning device 37 or a special variable winning device 39, or flows into an out port 30b provided at the bottom of the game area 32, and is discharged from the game area 32. When game balls enter the general winning port 35, the starting winning port 36, the normal variable winning device 37, or the special variable winning device 39, the number of prize balls corresponding to the type of the winning winning port is sent through the payout device. It is discharged to the upper tray 21 .

The normal pattern starting gate 34 is provided with a gate switch 34a (see FIG. 3) for detecting a game ball that has passed through the normal pattern starting gate 34 . When the game ball passes through the normal pattern start gate 34, it is detected by the gate switch 34a, and the normal pattern variation display game is executed based on the determination result of the hit determination random number value extracted at this time.

A state where the normal pattern fluctuation display game cannot be started, for example, when the normal pattern fluctuation display game has already been played and the normal pattern fluctuation display game has not ended, or the result of the normal pattern fluctuation display game is a hit. When the variable prize winning device 37 is converted to the open state, when the game ball passes through the normal pattern start gate 34, if the normal pattern start memory number is less than the upper limit number, the memory number is added (+1).

The normal pattern start memory stores a hit judgment random value for determining the hit or miss of the normal pattern fluctuation display game, and when this hit judgment random value matches the judgment value, the normal pattern fluctuation display A game wins and a specific result mode (specific result) is derived.

The normal pattern fluctuation display game is executed by the normal pattern display device 53 provided in the collective display device 50 . The normal figure display 53 is composed of an LED that indicates a hit in the case of a lit state as normal identification information (normal figure), and indicates a deviation in the case of an off state. After a predetermined variable display time has elapsed, the result is displayed by turning on or off the LED.

When the normal pattern random number value extracted when passing the normal pattern starting gate 34 is a winning value, the normal pattern displayed on the normal pattern display device 53 stops in a winning state and becomes a winning state. At this time, by driving the general electric solenoid 37c (see FIG. 3), the movable member 37b is converted to an open state for a predetermined time (for example, 0.3 seconds), and the game balls to the normal variable winning device 37 Winning is allowed.

Winning of the game ball to the starting winning opening 36 and winning to the normal variable winning device 37 are detected by the starting opening 1 switch 36a (see FIG. 3) and the starting opening 2 switch 37a (see FIG. 3).
The game ball that has won the start prize opening 36 is detected as the start prize ball of the special figure 1 variable display game,
The game balls that have won the normal variable winning device 37 are detected as starting winning balls of the special figure 2 variable display game, and are stored up to the predetermined upper limit.

At the time of detection of the starting prize ball of the special figure variation display game, a big hit random number value, a big hit pattern random number value, each variation pattern random number value, etc. are extracted. These random numbers are stored in the special figure reservation storage area (a part of the RAM) of the game control device 100 as special figure start winning memory for each predetermined number of times (for example, up to 8 times). The number of memories of the special figure start winning memory is displayed on the special figure 1 reservation display 54 and the special figure 2 reservation display 55 for notifying the start winning number of the collective display device 50, and the display device 4
1 is also displayed on the display screen.

The game control device 100 executes the special figure 1 variable display game with the special figure 1 indicator 51 based on the winning to the start winning opening 36 or the first start memory. In addition, the game control device 100, based on the winning to the normal variable winning device 37 or the second start memory, the special figure 2 on the special figure 2 indicator 52
Run the floating display game.

The special figure 1 variation display game (first special figure variation display game) and special figure 2 variation display game (second special figure variation display game) are identified by the special figure 1 indicator 51 and the special figure 2 indicator 52 ( It is performed by stopping and displaying a predetermined result mode after variably displaying special symbols, special symbols). again,
In the display device 41, a decorative special figure variation display game is executed in which a plurality of types of identification information (eg, numbers, symbols, character designs, etc.) are variably displayed corresponding to each special figure variation display game.

In the decorative special symbol variation display game on the display device 41, the decorative special symbols (identification information) composed of the numbers etc. described above are left (first special symbol), right (second special symbol), middle (third special symbol ), the variable display (scroll display) is started in order, and after a predetermined time, the varying symbols are sequentially stopped, and the results of the special figure variation display game are displayed. In addition, the display device 41 performs various presentation displays such as the appearance of a character to enhance interest. Furthermore, in the decorative special symbol variation display game, as another decorative special symbol (identification information), in the lamp display unit (LED) of the lamp display device 80, the fourth special symbol ( 4th pattern) fluctuates. After a predetermined time from the start, the variable display on the lamp display stops with "lighting" in the case of a loss, and "lighting out" in the case of a big hit.

Conversely, the variable display of the lamp display unit (LED) as the fourth special pattern (fourth pattern) can be configured to stop at "lights off" in the case of a loss and "lights up" in the case of a big hit. . In addition, there is also a configuration in which a plurality of LEDs (fourth pattern LEDs) are provided as each lamp display part, one of the plurality of LEDs is lit in the case of a loss, and all the plurality of LEDs are lit in the case of a big hit. It is possible.

When the winning of the game ball to the starting winning opening 36 or the normal variable winning device 37 is made at a predetermined timing (when the jackpot random value at the time of winning detection is a jackpot value), the special figure 1 display 51 or special In the display 52 of FIG. 2, a specific result mode (special result mode) is derived from the displayed symbols as a result of the special figure variation display game, and a big hit state (special game state) is established. Correspondingly, the display mode of the display device 41 becomes a special result mode (for example, a state in which numbers such as "7, 7, 7" are aligned).

At this time, in the special variable prize winning device 39, the special prize winning port solenoid 39b (see FIG. 3) is energized, so that the special prize winning port is changed from the closed state to the open state for a predetermined time (for example, 30 seconds).
In other words, the big winning opening provided in the special variable winning device 39 opens wide for a predetermined time or until a predetermined number of game balls win, and during this time the player is given the privilege of being able to win a lot of game balls. be.

In addition, the special figure 1 indicator 51 and the special figure 2 indicator 52 may be configured as separate indicators or may be configured as the same indicator, but each special figure variation display game is not executed at the same time. is set to

Regarding the decorative special figure variation display game on the display device 41, the special figure 1 variation display game and the special figure 2 variation display game may be executed on separate display devices or separate display areas, or the same display may be performed. You may make it perform by a device or a display area. In this case, the decoration special figure variation display games corresponding to the special figure 1 variation display game and the special figure 2 variation display game are not executed at the same time. In addition, the special figure 2 variation display game is to be executed with priority over the special figure 1 variation display game, and there is a start memory of the special figure 1 variation display game and the special figure 2 variation display game, When it becomes possible to execute the figure fluctuation display game, the special figure 2 fluctuation display game is executed.

In the following description, when the special figure 1 variation display game and the special figure 2 variation display game are not distinguished, they are simply referred to as the special figure variation display game.

Also, although not particularly limited, the starting port 1 switch 36 in the starting winning port 36
a. The starting port 2 switch 37a, the gate switch 34a, the winning port switch 35a, and the count switch 39a in the normal variable prize winning device 37 are provided with coils for detecting magnetism, and the phenomenon that the magnetic field changes when metal comes close to the coils. Non-contact magnetic proximity sensors (hereinafter referred to as proximity switches) are used to detect game balls. Also, the glass frame 15 of the game machine 10
A microswitch with a mechanical contact is used for the glass frame open detection switch 63 provided in the etc. and the front frame open detection switch 64 (main body frame open detection switch) provided in the front frame (game frame) 12 etc. be able to.

[Game control device]
FIG. 3 is a block diagram of the game control system of the game machine 10. As shown in FIG. The game machine 10 is a game control device 10
0 (main board), the game control device 100 is a main control device (main board) that controls the game in general, and has a CPU section having a game microcomputer (hereinafter referred to as a game microcomputer) 111. 110, an input section 120 having an input port, an output section 130 having an output port and a driver, etc., and a data bus 140 connecting between the CPU section 110, the input section 120 and the output section 130, and the like.

The CPU unit 110 is a gaming microcomputer (CP) called an amusement chip (IC).
U) 111, and an oscillator circuit (crystal oscillator) 113 for generating an operating clock for the CPU, a timer interrupt, a reference clock for the random number generation circuit, and the like. The game control device 100 and electronic components such as solenoids and motors driven by the game control device 100 are supplied with DC32V, DC12V, and DC5 generated by the power supply device 400.
A DC voltage of a predetermined level, such as V, is supplied and enabled.

The power supply device 400 includes an ACDC converter that generates a DC voltage of 32V from a 24V AC power supply, a DC-DC converter that generates a DC voltage of a lower level such as 12V or 5V from a voltage of 32V DC, and a normal power supply unit 410. , gaming microcomputer 11
It has a backup power supply unit 420 that supplies power supply voltage to the internal RAM of 1 at the time of power failure, and a power failure monitoring circuit, and control signals such as power failure monitoring signals and reset signals that inform the game control device 100 of power failure occurrence and recovery. and a control signal generator 430 for generating and outputting the .

In this embodiment, the power supply device 400 is configured separately from the game control device 100,
The backup power supply unit 420 and the control signal generation unit 430 may be configured to be provided on a separate substrate or integrally with the game control device 100, that is, on the main substrate. Since the game board 30 and the game control device 100 are to be replaced when the model is changed, the backup power supply section 420 and the control signal generation section 43 are mounted on a board different from the power supply device 400 or the main board as in the embodiment.
By providing 0, the cost can be reduced by excluding it from the object of replacement.

The backup power supply unit 420 can be configured with one large-capacity capacitor such as an electrolytic capacitor. The backup power supply is the gaming microcomputer 111 (
In particular, the data is supplied to the built-in RAM), and the data stored in the RAM is retained even during a power failure or after the power is turned off. The control signal generation unit 430 monitors the voltage of 32 V generated by the normal power supply unit 410, for example, and detects the occurrence of a power failure when the voltage drops below 17 V, for example, and changes the power failure monitoring signal. to output Also, when the power is turned on or when the power is restored, the reset signal is output after a predetermined time has elapsed from that time.

Also, the game control device 100 is provided with a RAM initialization switch 112 . RAM
When the initialization switch 112 is pressed and turned on, an initialization switch signal is generated,
Based on this, the RAM 111c in the game microcomputer 111 and the RA in the payout control device 200
A process of forcibly initializing the information stored in M is performed. Although not particularly limited, the initialization switch signal is read when the power is turned on, and the power failure monitoring signal is the game microcomputer 1
It is read repeatedly in the main loop of the main program executed by 11. A reset signal is a kind of forced interrupt signal and resets the entire control system.

Also, the game control device 100 (main board) is provided with a setting key switch 93 . When the setting key switch 93 is turned on by an operator's rotating operation or the like, the probability setting value (setting value) corresponding to the setting regarding the game condition (game) can be changed. The RAM initialization switch 112 can also be used as a set value change switch that can change the probability set value according to the operator's operation. In this embodiment, the probability setting value is a setting value for setting the winning probability such as a big hit probability or a small win probability (only when there is a small win), but other game conditions other than the probability (such as production) can also be changed according to the probability setting value. Setting key switch 93 and RAM
The initialization switch 112 constitutes setting changing means (setting changing device 42) capable of changing settings (probability setting values) relating to game conditions. Instead of the RAM initialization switch 112, another switch may also serve as the set value change switch, or a unique set value change switch may be provided exclusively.

The setting key switch 93 and the RAM initialization switch 112 are arranged on the game control device 100 inside the game machine 10 so that they cannot be operated (positions inaccessible) unless the front frame 12 (body frame) is opened. be done. That is, general players cannot access and operate the setting key switch 93 and the RAM initialization switch 112 .

As will be described later, when the game machine 10 is turned on (recovery from power failure, power recovery), the game machine 10 sets the probability setting value according to the ON/OFF states of the setting key switch 93 and the RAM initialization switch 112. It is possible to shift to various states such as a changeable setting variable state (setting change state, setting change mode) and a setting confirmation state (setting confirmation mode) in which probability setting values can be confirmed.

In the present embodiment, the probability setting value is defined, for example, in six stages, and probability setting value 1 (setting 1
), probability setting value 2 (setting 2), probability setting value 3 (setting 3), probability setting value 4 (setting 4), probability setting value 5 (setting 5), and probability setting value 6 (setting 6). In general, setting 1 is the most unfavorable setting for the player and setting 6 is the most favorable setting for the player. Settings 1 and 2 are low settings, settings 3 and 4 are intermediate settings (intermediate settings), and settings 5 and 6 are high settings.

In the probability setting change process, each time the operator presses the RAM initialization switch 112, the working setting value (setting) in the working setting value area is changed to the setting value 0 (setting 1, probability setting value 1).
→ setting value 1 (setting 2, probability setting value 2) → setting value 2 (setting 3, probability setting value 3) → setting value 3 (
Setting 4, probability setting value 4) → setting value 4 (setting 5, probability setting value 5) → setting value 5 (setting 6, probability setting value 6) → setting value 0 (setting 1) → setting value 1 (setting 2) → It is changed as follows. Thus, the RAM initialization switch 112 also functions as a set value change switch. For the convenience of explanation, work set values 0 to 5 are provided corresponding to probability set values 1 to 6, respectively, in the setting change state (setting change mode), but the work set values and probability set values are the same. They may be treated as the same by aligning them to a numerical range (ie, 0 to 5 or 1 to 6) (making the working set value and the probability set value the same numerical value).

Instead of operating the RAM initialization switch 112 (setting value change switch), the setting key switch 93 may be rotated to a predetermined position to change the probability setting value. Moreover, the probability setting value is not limited to six levels. The performance display device 152, which is a 4-digit 7-segment type (8-segment type including dot Dp) display, displays the probability setting values for display corresponding to the selected working setting values 0 to 5, for example. etc.

The gaming microcomputer 111 includes a CPU (central processing unit: microprocessor) 111a
, a read-only ROM (read-only memory) 111b and an RA that can be read and written at any time
M (random access memory) 111c.

The ROM 111b non-volatilely stores constant information (programs, fixed data, determination values of various random numbers, etc.) for game control. The RAM 111c is used as a work area for the CPU 111a during game control and as a storage area for various signals and random numbers. can be held and stored. An electrically rewritable non-volatile memory such as an EEPROM may be used as the ROM 111b or RAM 111c.

Further, the ROM 111b stores a variation pattern table for determining a variation pattern (variation mode) that defines, for example, the execution time of the special figure variation display game, the content of the effect, the presence or absence of the occurrence of the ready-to-win state, and the like. The fluctuation pattern table is a table for the CPU 111a to refer to the fluctuation pattern random numbers 1 to 3 stored as start memory to determine the fluctuation pattern. In addition, the variation pattern table includes a winning variation pattern table selected when the result is a loss, a big hit variation pattern table selected when the result is a big hit, and the like. Furthermore, these pattern tables include tables for determining the second half fluctuation pattern, which is the fluctuation pattern after reaching the reach state (second half fluctuation group table, second half fluctuation pattern selection table, etc.), fluctuation before reaching the reach state Tables for determining the first half variation pattern (first half variation group table, first half variation pattern selection table, etc.) are included.

Here, reach (reach state) means that the display device has a display device whose display state can be changed, the display device derives and displays a plurality of display results at different times, and the plurality of display results are determined in advance. A game state (special game state) in which the game state is advantageous to the player when the special result mode is reached.
In the gaming machine 10, at a stage where some of the plurality of display results are not yet derived and displayed
A display state in which a display result that has already been derived and displayed satisfies the conditions for becoming a special result mode. In other words, the ready-to-reach state means that even when the variable display control of the display device progresses and reaches the stage before the display result is derived and displayed, the display conditions for the special result mode are not met. It refers to a display mode that does not exist. And, for example, a state in which variable display is performed using a plurality of variable display areas while maintaining a state in which the special result modes are uniform (so-called full rotation reach) is also included in the reach state. In addition, the reach state is a display state at the time when the display control of the display device progresses and reaches the stage before the display result is derived and displayed, and is determined before the display result is derived and displayed. It means a display state when at least some of the display results of a plurality of variable display areas that are present satisfy the conditions for the special result mode.

Therefore, for example, the decoration special figure variation display game displayed on the display device corresponding to the special figure variation display game changes the plurality of identification information for a predetermined time in each of the left, middle, and right variation display areas on the display device. After displaying, when the variable display is stopped in the order of left, right, and middle to display the result mode, the condition for the special result mode is satisfied in the left and right variable display areas (for example, The state in which the variable display is stopped with the same identification information) is the reach state. In addition, when the variable display of all the variable display areas is temporarily stopped, any two of the left, middle, and right variable display areas satisfy the condition for the special result mode (for example, the same identification information This state (excluding the special result mode) may be set as the ready-to-win state, and the remaining one variable display area may be variably displayed from the ready-to-win state.

The ready-to-win state includes a plurality of ready-to-win effects, and the systems (types) of ready-to-win effects with different possibilities (different expectations) of deriving a special result mode (jackpot mode) are normal reach (N reach), Special 1 reach (SP1 reach), Special 2 reach (SP
2 reach), special 3 reach (SP3 reach), and premier reach.
The degree of expectation (expected value) of the ready-to-win performance is set to increase in the order of no reach<normal reach<special 1 reach<special 2 reach<special 3 reach<premier reach. Also, the ready-to-win state is included in the variable display mode at least when the special result mode is derived in the special figure variable display game (when the game becomes a big hit). That is, it may be included in the variation display mode when it is determined that the special result mode is not derived in the special figure variation display game (when it becomes a loss). Therefore, the state in which the ready-to-win state has occurred is a state with a high possibility of winning a big hit compared to the case in which the ready-to-win state has not occurred.

In addition, the expectation of the production (notice) suggests the probability of a big hit when the production is selected, the selection rate of the production when it is a big hit, and the production when it is not a big hit (when it is lost). It can be calculated based on the selectivity or the like.

The CPU 111a executes a game control program in the ROM 111b to generate a control signal (command) for the payout control device 200 or the effect control device 300, or to generate and output a drive signal for a solenoid or a display device. 10 overall control. In addition, although not shown, the gaming microcomputer 111 generates a jackpot random number for determining a jackpot in a special figure variation display game, a jackpot pattern random number for determining a jackpot pattern, and a small hit pattern for determining a small hit pattern. Pattern random numbers (only if there is a small hit), fluctuation pattern random numbers, etc. for determining the fluctuation pattern in the special figure fluctuation display game (including the execution time of the fluctuation display game in various reach and fluctuation display without reach) A random number generation circuit for generation and an oscillation signal from the oscillation circuit 113 (
A clock generator is provided for generating a timer interrupt signal with a predetermined cycle (for example, 4 msec (milliseconds)) for the CPU 111a based on the original clock signal) and a clock for giving the update timing of the random number generation circuit.

In addition, the CPU 111a uses the ROM 111b in processing related to the special figure variation display game.
Any one variation pattern table is acquired from among a plurality of variation pattern tables stored in the . Specifically, the CPU 111a, the game result of the special figure fluctuation display game (big hit or lose), the probability state of the special figure fluctuation display game as the current game state (normal probability state or high probability state), the number of starting memories Any one variation pattern table is selected and acquired from among a plurality of variation pattern tables based on the above. Here, the CPU 11
1a constitutes variation distribution information acquiring means for acquiring any one variation pattern table among a plurality of variation pattern tables stored in ROM 111b when executing a special figure variation display game.

The payout control device 200 includes a CPU, a ROM, a RAM, an input interface, an output interface, etc., and drives a payout motor 91 of the payout unit in accordance with a prize ball payout command (command or data) from the game control device 100 to produce a prize ball. control to pay out
Further, the payout control device 200 drives the payout motor 91 of the payout unit based on the ball rental request signal from the card unit 600, and performs control for paying out the rental balls.

The input unit 120 of the game control device 100 includes a radio wave sensor 62 (board radio wave sensor) that detects the emission of radio waves to the game machine, a gate switch 34a of the normal figure start gate 34, a start opening 1 in the first start winning opening 36 It is connected to the switch 36a, the starting port 2 switch 37a in the second start winning port 37 (normal variable winning device), the winning port switch 35a of the general winning port 35, and the large winning port switch 39a of the special variable winning device 39. The high level supplied from the switch is 11
An interface chip (proximity I/F) 121 is provided for inputting a negative logic signal such as V and a low level of 7V and converting it into a positive logic signal of 0V-5V.

Further, the interface chip (proximity I/F) 121 is connected to the specific area switch 72 , the remaining ball outlet switch 73 and the out ball detection switch 74 . Specific area switch 72
detects the passage of the game ball (V winning) to the specific area 86 (V winning opening). The remaining ball discharge port switch 73 detects game balls that have passed through the remaining ball discharge port for discharging game balls from the special variable winning device 39 . The out-ball detection switch 74 may detect only game balls passing through the out port 30b, or may detect all game balls that have been shot into the game area and finished playing.

The output of the proximity I/F 121 is supplied to the second input port 123, the third input port 124, or the fourth input port 126 and read into the game microcomputer 111 via the data bus 140. Among the outputs of the proximity I/F 121, the detection signals of the gate switch 34a, the starting port 1 switch 36a, the starting port 2 switch 37a, the prize winning port switch 35a, and the big winning port switch 39a are input to the third input port 124. .

Among the outputs of the proximity I/F 121 , the detection signal of the radio wave sensor 62 and the abnormality detection signal output when an abnormality of the sensor or switch is detected are input to the second input port 123 .

Among the outputs of the proximity I/F 121 , the detection signal of the specific area switch 72 , the remaining ball outlet switch 73 , or the out ball detection switch 74 is input to the fourth input port 126 .

Further, the second input port 123 receives the detection signal of the fraud detection magnetic sensor switch 61 provided on the front frame 12 of the gaming machine 10 or the like, and the glass frame opening detection signal provided on the glass frame 15 of the gaming machine 10 or the like. Switch 63, a signal from the front frame open detection switch 64 (main body frame open detection switch) provided on the front frame 12 (main body frame), etc., vibration sensor 6 for detecting vibration of game machine 10
5 is input. Also, the glass frame 1 of the gaming machine 10 is connected to the second input port 123 .
A signal from a call button switch 67 (described later) provided in 5 or the like is also input.

Also, the second input port 123 takes in the setting key switch signal from the setting key switch 93 and supplies it to the game microcomputer 111 via the data bus 140 .

Further, among the outputs of the proximity I/F 121, the output to the third input port 124 is also supplied from the game control device 100 through the relay board 70 to a test fire test device (not shown). Furthermore, among the outputs of the proximity I/F 121, the detection signals of the starting port 1 switch 36a and the starting port 2 switch 37a are configured to be input to the gaming microcomputer 111 in addition to the third input port 124.

As described above, the proximity I/F 121 has a signal level conversion function. In order to enable such a level conversion function, the proximity I/F 121 is supplied with a voltage of 12 V in addition to a voltage of 5 V required for normal IC operation from the power supply device 400. It's becoming

The data held by the third input port 124 is processed by the enable signal CE when the gaming microcomputer 111 decodes the address assigned to the third input port 124.
It can be read by asserting 2 (changed to valid level). The same applies to the second input port 123, the fourth input port 126, and the first input port 122, which will be described later.

In addition, the input unit 120 receives a frame radio fraud signal output from the payout control device 200, a payout busy signal, a status signal indicating payout abnormality, a shoot ball cut switch signal indicating a shortage of game balls before payout, and an overflow. Overflow switch signal, touch switch signal based on the input of the touch switch provided on the operation handle 24, RAM initialization switch 1
A first input port 122 is provided for taking in a signal from 12 and supplying it to the gaming microcomputer 111 via a data bus 140 . The overflow switch signal is a signal that is output when it is detected that the lower tray 23 is filled with a predetermined amount or more of game balls (that the tray is full). The frame radio wave illegal signal is a signal that is output based on the detection of radio waves by a frame radio wave sensor provided on the front frame 12 (body frame). This is a signal indicating whether or not

Further, the input unit 120 is provided with a Schmidt buffer 125 for inputting signals such as a power failure monitoring signal and a reset signal from the power supply device 400 to the game microcomputer 111 and the like. It has the function of removing noise from
A power failure monitoring signal from the power supply device 400 is once input to the first input port 122 and taken into the gaming microcomputer 111 via the data bus 140 . That is, they are treated as signals equivalent to the signals from the various switches described above. This is because the number of terminals for receiving signals from the outside provided in the gaming microcomputer 111 is limited.

On the other hand, the reset signal RST noise-removed by the Schmidt buffer 125 is directly input to the reset terminal provided in the game microcomputer 111, and the output section 13
0 to each port. In addition, by outputting the reset signal RST directly to the relay board 70 without going through the output section 130, the test-firing test signal held in the port (not shown) of the relay board 70 for output to the test-firing test apparatus is turned off. is configured as

Also, the reset signal RST may be configured to be output to the test-firing test apparatus via the relay board 70 . Note that the reset signal RST is applied to the ports 122 and 123 of the input section 120.
, 124. The data set to each port of the output section 130 by the game microcomputer 111 immediately before the reset signal RST is input must be reset to prevent malfunction of the system. This is because the data read by the game microcomputer 111 from the port is discarded when the game microcomputer 111 is reset.

The output unit 130 is provided with a Schmidt buffer 132 arranged on a communication path from the game microcomputer 111 to the effect control device 300 and a communication path from the game microcomputer 111 to the payout control device 200 . Data is transmitted from the game control device 100 to the effect control device 300 and the payout control device 200 by serial communication. In addition, it is made into the one-way communication which made it impossible to input a signal to the game control apparatus 100 from the production control apparatus 300 side.

Further, the output unit 130 is connected to the data bus 140 and transmits data for notifying the special symbol pattern information of the variable display game to a trial firing test device of an accredited organization (not shown) and a signal indicating the probability state of the big hit via the relay board 70. A buffer 133 for output is configured to be mountable. The buffer 133 is a component that is not mounted on a game control device (main board) of a pachinko game machine as an actual machine (mass-produced product) installed in amusement arcades. A detection signal of a switch that does not need to be processed, such as a starting switch, output from the proximity I/F 121 is supplied to the test firing test apparatus via the relay board 70 without passing through the buffer 133 .

On the other hand, detection signals such as those from the magnetic sensor switch 61 and the radio wave sensor 62, which cannot be directly supplied to the test-firing test device, are temporarily taken into the gaming microcomputer 111 and processed into other signals or information. An error signal indicating that it is not possible is supplied from the data bus 140 through the buffer 133 and the relay board 70 to the test-firing apparatus.

The relay board 70 is provided with a port that takes in the signal output from the buffer 133 and supplies it to the test firing test apparatus, a connector that relays the signal line of the detection signal of the switch that does not pass through the buffer, and the like. there is The game microcomputer 11 is connected to the port on the relay board 70.
A chip enable signal CE output from 1 is also supplied, and signals of ports selectively controlled by the signal CE are supplied to the test-firing apparatus.

The output unit 130 also includes a solenoid (universal electric solenoid) 37c connected to the data bus 140 for opening the normal variable winning device 37, a large winning opening solenoid 39b (large winning opening solenoid) for opening the special variable winning device 39, A second output port 134 is provided for outputting opening/closing data for the lever solenoid 86b that operates the lever to open the specific area 86. As shown in FIG.

The output unit 130 also includes a third output port 135 for outputting ON/OFF data of the segment line to which the anode terminals of the LEDs are connected in accordance with the content to be displayed on the collective display device 50 , and the collective display device 50 . ON/ON of the digit line to which the cathode terminal of the LED of
A fourth output port 136 is provided for outputting OFF data.

Also, the output unit 130 outputs information related to the gaming machine 10 such as jackpot information to the external information terminal 71 .
A fifth output port 137 is provided for outputting to. The external information terminal 71 is provided with a photorelay, and can be connected to, for example, an external device (information collection terminal, game hall internal management device (hall computer), etc.) installed in the game parlor, so that information on the game machine 10 can be sent to an external device. It is ready to be fed to the device. Also, a firing permission signal is output from the fifth output port 137 to the payout control device 200 via the Schmitt buffer 132 .

Further, the output unit 130 includes a general-purpose solenoid 37 output from a second output port 134.
A first driver (driving circuit) 138a that receives an opening/closing data signal for the large winning opening solenoid 39b and the like to generate and output a solenoid drive signal, and a current supply side of the batch display device 50 output from the third output port 135. A second driver 138b for outputting an ON/OFF drive signal for the segment line, a third driver 138c for outputting an ON/OFF drive signal for the digit line on the current drawing side of the collective display device 50 output from the fourth output port 136, Fifth output port 13
7 outputs to an external information terminal 71 an external information signal to be supplied to an external device such as a management device.
A driver 138d is provided.

DC 32V is supplied from the power supply device 400 as a power supply voltage to the first driver 138a so as to drive a solenoid that operates at 32V. Also, the collective display device 50
DC 12V is supplied to the second driver 138b that drives the segment line. The third driver 138c, which drives the digit lines, draws current from the digit lines according to display data, so the power supply voltage may be either 12V or 5V.

A second driver 138b that outputs 12 V supplies a current to the anode terminal of the LED via a segment line, and a third driver 138c that outputs a ground potential draws current from the cathode terminal via a digit line. L selected sequentially with
A power supply voltage flows through the ED to light it up. The fourth driver 138d, which outputs the external information signal to the external information terminal 71, is supplied with DC 12V to give the external information signal a level of 12V. The buffer 133, the second output port 134, the first driver 138a, etc. may be provided on the output section 130 of the game control device 100, that is, not on the main board but on the relay board 70 side.

Further, the output unit 130 is provided with a photocoupler 139 for transmitting information such as the identification code and program of each gaming machine to the external inspection device 500 . photocoupler 13
9 is configured to allow two-way communication so that the game microcomputer 111 can transmit and receive data to and from the inspection device 500 by serial communication. It should be noted that since the transmission and reception of such data is performed using a serial communication terminal of the game microcomputer 111 as in a normal general-purpose microprocessor, ports such as the input ports 122, 123, and 124 are not provided.

Furthermore, the output unit 130 receives serial data (control data, lighting pattern data, character code, etc.) output from the second output port 134, and outputs a performance display device 152 (status display device). A driver 150 is provided for driving. In this embodiment, the performance display device 152 is composed of a plurality (four) of 7-segment type (8-segment type including dots Dp) indicators (LED lamps), and the driver 150 is an LED driver. is not limited to

The performance display device 152 is provided on the game control device 100 (main board).
It may be provided in other places. For example, the performance display device 152 can display the probability setting value for display, and as performance display, the role ratio, the ball output rate, and the number of discharged balls.

Here, the number of discharged balls is the number of game balls discharged from the game area 32 (also called the number of out balls).
is the sum of the number of game balls that have passed through the winning hole (the number of winning prizes) and the number of game balls that have passed through the out hole 30b. The number of ejected balls is counted by counting the signal of the out ball detection switch 74 etc.
can be obtained by In this embodiment, the winning openings include a general winning opening 35, a starting winning opening 36 (first starting winning opening, starting opening 1), a normal variable winning opening 37 (second starting winning opening, starting opening 2
), and a special variable winning device 39 (large winning opening).

The ball output rate is the ratio (percentage) of the total number of prize balls to the number of discharged balls (or the number of fired balls),
Number of acquired balls / number of discharged balls) x 100 (%). That is, the ball output rate is the number of winning balls (total number of prize balls) per 100 discharged balls.

For example, the role ratio is the total number of prize balls (total number of prize balls) obtained by entering a prize slot for a predetermined period (for example, from the power-on of the gaming machine 10 to the present). It is the ratio (%) (=so-called continuous role ratio) of the number of prize balls (number of winning balls by role) obtained by winning the big prize mouth. In addition, the role ratio may be the ratio of the number of prize balls (during the big win state and the small win state) obtained by winning the big prize hole out of the total number of prize balls (= big prize hole ratio). , or the ratio of the number of prize balls obtained by winning the big winning opening and the normal variable winning device 37 (second start winning opening) (= the so-called role ratio (total role ratio )).

[Production control device]
Next, the configuration of the production control device 300 (sub board) will be described with reference to FIG. Figure 4
2 is a block diagram of an effect control system of the gaming machine 10. FIG.

The effect control device 300 is an amusement chip (IC
), and a VDP (Video Display Processor) 312 as a graphic processor that performs image processing for video display on the display device 41 according to commands and data from the main control microcomputer 311. , and a sound source LSI 314 for controlling sound output in order to reproduce various melodies and sound effects from the speaker 19 .

The main control microcomputer 311 stores programs executed by the CPU and various data.
A program ROM 321 consisting of a ROM (programmable read only memory), a RAM 322 that provides a work area, and an Fe that can retain memory contents even if power is not supplied during a power failure.
A RAM 323 is connected to an RTC (real-time clock) 338 that forms a timekeeping means for generating information indicating the current date and time (year/month/day, day of the week, time, etc.). A RAM that provides a work area is also provided inside the main control microcomputer 311 .

A WDT (watchdog timer) circuit 324 is connected to the main control microcomputer 311 . The main control microcomputer 311 analyzes commands from the game microcomputer 111 , determines the content of the effect, instructs the VDP 312 on the content of the output video,
It performs processing such as instructing playback sound to, lighting decorative lamps, driving control of motors and solenoids, and managing performance time.

The VDP 312 is provided with a RAM 312a that provides a work area and a scaler 312b that enlarges and reduces images. The VDP 312 also includes an image ROM 325 storing character images and video data, and an ultra-high-speed VRAM (video RAM) used to develop and process image data such as characters read from the image ROM 325. ) 326 are connected.

Although not particularly limited, the main control microcomputer 311 and the VDP 312 are configured to transmit and receive data in parallel. By transmitting and receiving data in parallel, commands and data can be transmitted in a shorter time than in the case of serial transmission.

From VDP 312 to main control microcomputer 311, a vertical synchronizing signal VSYN for synchronizing the image of display device 41 with lighting of decoration lamps provided on glass frame 15 and game board 30 is transmitted.
C. Synchronization signal STS that provides data transmission timing is input. Note that VDP312
to the main control microcomputer 311. Interrupt signals INT0 to n to notify the processing status such as the end of drawing to the VRAM and a wait to notify that it is waiting for reception of commands and data from the main control microcomputer 311 A signal WAIT or the like is also input.

The effect control device 300 is provided with a signal conversion circuit 313 that generates a video signal to be transmitted to the display device 41 by the LVDS (small amplitude signal transmission) method. Video data, a horizontal synchronization signal HSYNC and a vertical synchronization signal VSYNC are input from the VDP 312 to the signal conversion circuit 313 , and the video generated by the VDP 312 is sent to the display device 41 via the signal conversion circuit 313 . Is displayed.

An audio ROM 327 storing audio data is connected to the sound source LSI 314 . The main control microcomputer 311 and the tone generator LSI 314 are connected via an address/data bus 340 . Also, an interrupt signal INT is sent from the tone generator LSI 314 to the main control microcomputer 311.
is entered. The effect control device 300 is provided with an amplifier circuit 337 including an audio power amplifier for driving the upper speaker 19 a provided on the glass frame 15 and the lower speaker 19 b provided on the front frame 12 . The generated sound is output from the upper speaker 19a and the lower speaker 19b through the amplifier circuit 337. FIG.

Also, the effect control device 300 is provided with an interface chip (command I/F) 331 for receiving commands transmitted from the game control device 100 . Command I/F3
Via 31, received decoration special figure pending number command, decoration special figure command, variation command, stop information command, etc. transmitted from game control device 100 to production control device 300 as production control command signal (production command). . The game microcomputer 111 of the game control device 100 is DC5
V, and since the main control microcomputer 311 of the effect control device 300 operates at DC 3.3V, the command I/F 331 is provided with a signal level conversion function.

In addition, the effect control device 300 includes a board decoration LED control circuit 332 that drives and controls a board decoration device 46 having LEDs (light emitting diodes) provided on the game board 30 (including the center case 40), A frame decoration LED control circuit 333 for driving and controlling a frame decoration device (for example, the frame decoration device 18 or the like) having an LED (light emitting diode) provided, and a game board 3
0 (including the center case 40).
A board production movable body control circuit 334 is provided for driving and controlling a movable accessory that enhances the production effect in cooperation with the production display in the game. Note that the board decoration device 46 includes the lamp display device 8 described above.
0 may be included.

These control circuits 332 to 334 that drive and control lamps, motors, solenoids, etc. are connected to the main control microcomputer 311 via an address/data bus 340 . A frame effect movable body control circuit for driving and controlling a frame effect device such as a motor provided in the glass frame 15 may be provided.

Furthermore, the effect control device 300 includes a effect button switch 25a built into the effect button 25 provided on the glass frame 15, a touch panel 25b provided on the surface of the effect button 25, and a motor inside the board effect device 44. A function of detecting the on/off state of the production accessory switch 47 (production motor switch) that detects the initial position etc. and inputting a detection signal to the main control microcomputer 311, and a volume control switch provided in the production control device 300 A switch input circuit 336 is provided for detecting the state of 335 and inputting a detection signal to the main control microcomputer 311 .

The normal power supply unit 410 of the power supply device 400 is the effect control device 300 having the configuration as described above.
32 VDC for driving motors and solenoids, 12 VDC for driving motors and LEDs, 32 VDC for driving motors and solenoids, and 12 VDC for driving motors and LEDs. DC5, which is the power supply voltage of the command I/F 331
In addition to V, it is configured to generate a voltage of DC 15V for driving motors, LEDs, and speakers.

Furthermore, when using an LSI that operates at a low voltage such as 3.3V or 1.2V as the main control microcomputer 311, a DC- A DC converter is provided in the performance control device 300 . In addition, DC-
A DC converter may be provided in the normal power supply unit 410 .

The reset signal generated by the control signal generator 430 of the power supply device 400 is supplied to the main control microcomputer 311 to reset the device. In addition, VDP 312 (VDRESET signal), tone generator LSI 314
, an amplifier circuit 337 (SNDRESET signal) for driving a speaker, and control circuits 332 to 334 (IORESET signal) for driving and controlling lamps, motors, etc., to reset them. In addition, the effect control device 300 includes a cooling FA for cooling various parts of the game machine 10
N45 is connected, and cooling FAN45 drives in the state where the power supply of production control device 300 was turned on.

Next, game control performed in these control circuits will be described. Game control device 1
The CPU 111a of the 00 game microcomputer 111 extracts a random value for determining a hit in a normal game based on the input of the game ball detection signal from the gate switch 34a provided in the normal game starting gate 34, and stores it in the ROM 111b. It is compared with the judgment value that is set, and the hit or miss of the normal pattern fluctuation display game is judged.

Then, after the identification symbols are variably displayed for a predetermined period of time on the normal pattern display device 53, the normal pattern fluctuation display game is displayed in a stopped manner. When the result of the normal pattern fluctuation display game is a hit, a special result mode is displayed on the normal pattern display device 53, the general electric solenoid 37c is operated, and the movable member 37b of the normal fluctuation prize winning device 37 is held for a predetermined time (for example, , 0.3 seconds) The opening control is performed as described above. That is, the game control device 100 serves as conversion control execution means for performing conversion control of the conversion member (movable member 37b). In addition, when the result of the normal pattern variation display game is a loss, the normal pattern display device 53 is controlled to display the result mode of the loss.

In addition, based on the input of the detection signal of the game ball from the starting opening 1 switch 36a provided in the starting winning opening 36, the starting winning prize (starting memory) is stored, and based on the starting memory, the special figure 1 fluctuation display game big hit determination The random number for use is extracted and compared with the determination value stored in the ROM 111b to determine the hit or miss of the special figure 1 variable display game.

In addition, based on the input of the game ball detection signal from the start port 2 switch 37a provided in the normal variable winning device 37, the start memory is stored, and based on the start memory, the random value for judging the big hit of the special figure 2 variable display game is extracted and compared with the determination value stored in the ROM 111b to determine the hit or miss of the special figure 2 variation display game.

And CPU111a of the game control apparatus 100 outputs the control signal (production|presentation control command) containing the determination result of a special figure 1 fluctuation display game and a special figure 2 fluctuation display game to the production|presentation control apparatus 300. FIG. Then, after the identification symbols are variably displayed for a predetermined time on the special figure 1 display device 51 and the special figure 2 display device 52, a special figure variation display game that is stopped and displayed is displayed. That is, the game control device 100 controls the progress of the variable display game based on the winning of the game ball flowing down the game area 32 to the starting winning area (first starting winning opening 36, normal variable winning device 37). form.

Also, the effect control device 300 displays a decoration special figure variation display game corresponding to the special figure variation display game on the display device 41 based on the control signal from the game control device 100 . Furthermore, based on the control signal from the game control device 100, the effect control device 300 performs processing such as setting the effect state, outputting sounds from the speakers 19a and 19b, and controlling light emission of various LEDs. In other words, the effect control device 300 serves as effect control means for controlling effects related to games (such as variable display games).

Then, when the result of the special figure variation display game is hit, the CPU 111a of the game control device 100 displays the special result mode on the special figure 1 indicator 51 and the special figure 2 indicator 52, and generates a special game state. Let In the process of generating the special game state, the CPU 111a
For example, the opening/closing door 39c of the special variable winning device 39 is opened by the large winning opening solenoid 39b, and control is performed to enable the inflow of game balls into the large winning opening.

Then, either a predetermined number (for example, 10) of game balls enter the big winning opening, or a predetermined openable time (for example, 27 seconds or 0.05 seconds) elapses after the opening of the big winning opening. 1 round (R) is to open the big winning opening until the condition is achieved, and this is continued (repeated) control (cycle game) for a predetermined number of rounds (for example, 15 times, 11 times or 2 times). I do. That is, the game control device 100 serves as a large winning opening opening/closing control means for controlling opening and closing of the large winning opening when the stop result mode becomes the special result mode. In addition, when the result of the special figure fluctuation display game is lost, the special figure 1 display device 51 and the special figure 2 display device 52 are controlled to display the result mode of the loss.

Further, the game control device 100 can generate a high-probability state as a game state after the special game state ends based on the result mode of the special figure variation display game. The high probability state (variable state) is
It is a state in which the probability of a hit result in the special figure variation display game is higher than in the normal probability state. In addition, even if it becomes a high probability state based on the result mode of any special figure variation display game of the special figure 1 variation display game and the special figure 2 variation display game, the special figure 1 variation display game and the special figure 2 variation display game Both are high probability states.

Further, the game control device 100 can generate a time-saving state (specific game state) as a game state after the special game state ends based on the result mode of the special figure variation display game. In the time reduction state, control is performed to put the normal figure fluctuation display game and the normal fluctuation prize winning device 37 in the time reduction operation state, and the normal fluctuation prize winning device 37 per unit time is higher than when the normal fluctuation prize winning device 37 is in the normal operation state. is controlled so that the opening time of the is substantially increased, so it becomes a general electricity support state.
In addition, even in the high-probability state (normal probability state) except for the latent probability state, the normal power supply support is performed in a time-saving state.

For example, in the time saving state, the execution time of the above-mentioned normal pattern fluctuation display game (normal pattern fluctuation time)
to a second variable display time that is shorter than the normal first variable display time (eg, 10000 msec becomes 1000 msec). In addition, in the time saving state, the execution time of the special figure variation display game (special figure variation time) is also shortened than usual, and the time shortening variation of the special figure variation display game is also performed.

In addition, in the time-saving state, the normal pattern stop time to display the results of the normal pattern fluctuation display game is the first
A second stop time (eg 704 msec) shorter than the stop time (eg 1604 msec)
It is possible to control so that

In addition, in the time saving state, when the normal fluctuation display game results in a win and the normal fluctuation winning device 37 is opened, the opening time (general electric opening time) is the first opening time (for example, 100 msec) in the normal state. It is possible to control the second opening time (for example, 1352 msec) to be longer.

In addition, in the time saving state, the number of openings of the normal fluctuation prize winning device 37 (the number of openings of the general electric power) is greater than the first number of openings (for example, 2 times) for one hit result of the normal figure fluctuation display game. It is possible to set the second number of openings to (eg, 4 times). In addition, in the time-saving state, it is possible to make the probability of a winning result in the normal pattern variation display game (normal pattern probability) higher than the normal probability (low probability) in the normal operation state.

In the time saving state, the normal fluctuation winning device 37 is in the open state by changing one or more of the normal pattern fluctuation time, the normal pattern stop time, the normal pattern open number of times, the normal pattern open time, and the normal pattern probability. Make the conversion time longer than usual. Thus, in the time-saving state, winning to the normal variable prize winning device 37 becomes easier than in the normal game state, and the number of executions of the special figure variable display game per unit time can be increased more than in the normal game state. It is also possible to set a plurality of types of time-saving states with different things to be changed. Also, in the normal operating state, the movable member 3
It may be set so as not to open 7b (normal pattern probability is 0). Alternatively, either the first opening mode or the second opening mode may be selected when a win is achieved. In this case, the selection probabilities of the first open mode and the second open mode may be different. Also, the high probability state and the time saving state can be generated independently of each other, both can be generated at the same time, or only one of them can be generated.

[Transitional state at power-on]
As described above, it shifts to four states (modes) depending on the ON/OFF states of the RAM initialization switch 112 and the setting key switch 93 when the power is turned on.

When the power is turned on, if the RAM initialization switch 112 and the setting key switch 93 are turned on, the setting variable state (setting change state, setting change mode) in which the probability setting value (setting value) can be changed is entered. (see A1027-A1036 in FIG. 5B and FIG. 6B).

Next, when the power is turned on, if the setting key switch 93 is turned on but the RAM initialization switch 112 is turned off, the setting confirmation state (setting confirmation mode) in which the probability setting value can be confirmed is entered (Fig. 5B A1031-A1036 and FIG. 6B).

When the power is turned on, although the setting key switch 93 is off, the RAM initialization switch 11
2 is turned on, transition to the RAM initialization state (RAM clear mode);
AM initialization processing (RAM clearing processing) is executed to initialize the RAM 111c (see A1042-1044 in FIG. 5B).

If the setting key switch 93 and the RAM initialization switch 112 are off when the power is turned on, the normal power recovery state (normal power recovery mode) is entered and the power is simply restored.

[Control of game control device]
The control of the gaming machine that performs such games will be described below. First, the control executed by the game microcomputer (game microcomputer) 111 of the game control device 100 will be described. The control processing by the game microcomputer 111 mainly consists of main processing shown in FIGS. 5A and 5B and timer interrupt processing shown in FIG. 9 which is performed at predetermined time intervals (for example, 4 msec).

[Main processing (game control device)]
First, the main processing will be explained. 5A and 5B are flowcharts showing the procedure of main processing by the game control device 100. FIG. Main processing is started when the power is turned on. In addition, in the flowchart of the processing executed by the game control device 100, the code (number) of the step is expressed as "A****".

As shown in FIG. 5A, when starting the main process, the game control device 100 first executes a process of prohibiting an interrupt (A1001). Furthermore, a stack pointer setting process is executed to set a stack pointer, which is the top address of the area where the values of registers and the like are saved when an interrupt occurs (A1002).

Subsequently, the register bank 0 is designated as the register bank to be used (A1003), and the upper address of the RAM head address is set in a predetermined register (A1004). For example, if the RAM address ranges from 0000h to 01FFh, 00h is set as the upper address.

Next, the game control device 100 outputs a signal for prohibiting the firing and sets the firing permission signal to the prohibited state (A1005). When at least one of the game control device 100 and the payout control device 200 outputs a signal for prohibiting the shooting, the shooting permission signal is set to a prohibited state, and the shooting of the game ball is prohibited. After that, the game control device 100 reads the states of the setting key switch 93 and the RAM initialization switch 112 (A1006). That is, the signals from the setting key switch 93 and the RAM initialization switch 112 are read.

Furthermore, the game control device 100 sets a power delay timer (A1007). A game control device 1 serving as main control means by setting a predetermined initial value in a power delay timer
00 to perform various controls according to the instructions from the sub-control means (e.g., payout control device 200 and effect control device 300) to wait until the program is normally started (e.g., 3
seconds) is set. As a result, when the power is turned on, if the game control device 100 starts up first and the command is sent to the slave control device before the slave control device (for example, the payout control device 200 or the effect control device 300) starts up, the slave control device can avoid missing commands. That is, the game control device 100 delays the activation of the main control means (game control device 100) when the power is turned on, and the sub-control devices (payout control device 200, effect control device 3
00 etc.) for setting a predetermined waiting time for waiting for activation.

In addition, the power supply delay timer clocks time using a storage area that is not subject to RAM validity determination (checksum calculation) (RAM area not subject to validity determination, registers, or the like). As a result, when calculating check data such as the checksum of the RAM area,
Since it is not necessary to perform calculation while excluding the AM region, it is possible to prevent the control from becoming complicated when the power is turned on.

By reading the states of the setting key switch 93 and the RAM initialization switch 112 before the standby time starts, the operation of the setting key switch 93 and the RAM initialization switch 112 can be reliably detected. That is, if the states of the setting key switch 93 and the RAM initialization switch 112 are read after the standby time has elapsed, the setting key switch 93 and the RAM initialization switch 112 are operated after the standby time has elapsed, or the power is turned on. It is necessary to keep operating the setting key switch 93 and the RAM initialization switch 112 until the waiting time elapses. However, by reading the state before the start of the standby time, even without performing such troublesome operations, a situation in which the operation of the setting key switch 93 and the RAM initialization switch 112 performed when the power is turned on can be prevented. can be prevented.

When the power delay timer is set (A1007), the game control device 100 executes the timing of the waiting time and the process of monitoring the occurrence of a power failure during the waiting time (from A1008 to A
1010).

When the power failure monitoring process is started, the game control device 100 first reads the power failure monitoring signal input from the power supply device 400 via the port and the data bus, and determines whether or not a power failure has occurred. (A1008). If a power failure occurs (the result of A1008 is "Y"), wait until the game machine is powered off.

If the game control device 100 does not have a power failure (result of A1008 is "N")
, the power-on delay timer is updated by -1 (A1009), and it is determined whether or not the value of the timer is 0 (A1010). If the timer value is not 0 (the result of A1010 is "N"), that is, if the standby time has not expired, the process returns to step A1008.

That is, the game control device 100 serves as power failure monitoring means for monitoring the occurrence of power failure during a predetermined waiting time. As a result, it is possible to cope with a power failure that occurs during the period in which the activation of the game control device 100, which constitutes the main control means, is delayed, and it is possible to appropriately deal with troubles at the time of turning on the power. Note that access to the RAM is not permitted until the standby time is over, and the memory contents of the previous power shutdown are still retained, so backup processing, etc. will be performed when a power failure occurs here. No need. Therefore, even if a power failure occurs during the standby time, there is no need to back up the RAM, and the burden of control can be reduced.

On the other hand, if the value of the timer is 0 (the result of A1010 is "Y"), the game control device 100
), that is, when the standby time is over, access to a readable and writable RWM (read/write memory) such as RAM or EEPROM is permitted (A1011), and off data is output to all output ports (no output state). (A1012).

Next, the game control device 100 sets a serial port (a port pre-installed in the game microcomputer 111 and used for communication with the effect control device 300 and the payout control device 200 in this embodiment) (A1013 ).

Further, the driver 150 that drives the performance display device 152 (status display device) may be initialized here. The game control device 100 writes a command including control data corresponding to the content of the initial settings to the transmission buffer of the second output port 134 (serial communication circuit) and transmits the command to the driver 150 . For example, the game control device 100 sets the duty ratio in initial setting. The duty ratio corresponds to the brightness of each LED (each segment) of performance display device 152 . The game control device 100 sets the number of digits to be used for the performance display device 152 in the initial setting. In this embodiment, the number of digits used is four.

Next, the game control device 100 generates a CTC (Counter/Timer C) that generates a timer interrupt signal and a random number update trigger signal (CTC) in the game microcomputer 111 (clock generator).
ircuit) Activate the circuit (A1014). Incidentally, the CTC circuit is provided in the clock generator in the gaming microcomputer 111 . The clock generator includes a frequency dividing circuit that divides the oscillation signal (original clock signal) from the oscillation circuit 113, and a CP based on the frequency-divided signal.
For U111a, there is provided a CTC circuit that generates a signal CTC that provides a timer interrupt signal with a predetermined period (for example, 4 milliseconds) and a random number update trigger that is supplied to the random number generation circuit.

Then, the game control device 100, RAM (here RAM111c) indicating the abnormality of RA
The M abnormality flag is set (A1015). Here, a flag indicating an anomaly is temporarily set in a predetermined register.

Next, the game control device 100 determines whether or not the value of the power failure inspection area 1 in the RWM is normal power failure inspection area check data (A1016). And if it is normal (A101
6 is "Y"), it is determined whether or not the value of power failure inspection area 2 in RWM is normal power failure inspection area check data (A1017).

Furthermore, the game control device 100, if the value of the power failure inspection area 2 is normal (result of A1017 is "Y"), the checksum for calculating the checksum of the predetermined area (for example, game control work area) in the RWM Calculation processing is executed (A1018), and it is determined whether or not the calculated checksum matches the checksum at power-off (A1019). If the checksums match (the result of A1019 is "Y"), the RAM is normal, indicating that the RAM is abnormal.
Clear the abnormal flag (A1020). After that, the process proceeds to step A1021.

In addition, the game control device 100, if it is determined that the check data in the power failure inspection area is not normal data (the result of A1016 is "N", or the result of A1017 is "N"), if the checksum does not match (the result of A1019 is "N"), the process proceeds to step A1021 without clearing the RAM abnormality flag.

Next, the game control device 100 uses the setting key switch 93 and the RAM initialization switch 112
are on (A1021). When both switches are on (the result of A1021 is "Y"), the game control device 100 shifts to the setting variable state (setting change mode), and executes the process during probability setting change in steps A1027-A1037. .

When at least one of the setting key switch 93 and the RAM initialization switch 112 is off (the result of A1021 is "N"), the game control device 100 resets the RAM (RAM
111c) is determined whether or not the RAM abnormality flag indicating the abnormality is set (A102).
2). If the RAM abnormality flag is not set (the result of A1022 is "N"), it is determined whether or not the probability setting changing flag is set (A1023). If the probability setting changing flag is not set (result of A1023 is "N"), step A103
1-Probability setting confirmation process in A1037 (setting confirmation state, setting confirmation mode), RAM initialization process (RAM clear process) in steps A1041-1044, or step A1
041, A1045, and A1046 are executed when the power is turned on (when the power is restored).

Game control device 100, when the probability setting changing flag is set (A1023
result is "Y"), a command of main abnormality error notification for notifying that there is an abnormality in the game control device 100 (main board, main board) is transmitted to the effect control device 300 (A1024)
. The effect control device 300 that has received the command of the main abnormality error notification is the game control device 10
0 anomaly is notified.

Subsequently, the game control device 100 displays the 7-segment display data when the game is stopped ("E1
error display data) is output to the driver 150 of the performance display device 152 so as to be displayed on the performance display device 152 (A1025). Then, ON data of a security signal for notifying the abnormality to an external device (playground internal management device (hall computer), information collecting terminal, etc.) is output to the external information terminal 71 (A1026). Here, even if the information about the big win remains in the RAM 111c, other signals to the external information terminal 71 such as the big win signal are kept off. After that, the processing of steps A1025 and A1026 is repeated to wait, and the setting change operation (setting key switch 93 and RAM initialization switch 1) is performed again.
12) and wait for the power to be turned on. It should be noted that, while waiting to repeat the processing of steps A1025 and A1026 and waiting, the interrupt remains prohibited (A1001), timer interrupt processing that can execute special figure 1, 2 game processing and general figure game processing (FIG. 7) cannot be executed, games (special figure fluctuation display game, normal figure fluctuation display game) cannot be executed.

In this way, setting change operations (setting key switch 93 and RAM initialization switch 112
If the probability setting changing flag is set even though the two ON operations are not executed, it is assumed that there is an abnormality, and the processing of A1024 to A1026 is executed. For example, if the power is turned off and restarted while the probability setting is being changed (before the setting change is completed), the probability setting changing flag may be set even though the setting change operation is not performed. be.

On the other hand, the game control device 100, even when the RAM abnormality flag is set (A102
The result of 2 is "Y"), the main abnormality error notification command for notifying that there is an abnormality in the game control device 100 (main board) is transmitted to the effect control device 300 (A1024), and the 7 segments when the game is stopped. Display data (error display data of "E1" in FIG. 9C) is output to the driver 150 of the performance display device 152 (A1025), and in order to inform the external device of the RAM abnormality, the security signal ON data is sent to the external device. Output to the information terminal 71 (A1026). It should be noted that, in the same manner as described above, even if the information about the big win remains in the RAM 111c, other signals to the external information terminal 71 such as the big win signal are kept off. Then step A10
25 and A1026 are repeated to wait.

When both the setting key switch 93 and the RAM initialization switch 112 are on (the result of A1021 is "Y"), the game control device 100 starts the process of changing the probability setting (during the variable setting state). First, it is determined whether or not the RAM abnormality flag is set (A1027). If the RAM error flag is set (the result of A1027 is "Y
”), since it is unclear whether the probability setting value is correct, the probability setting value stored in the probability setting value area of the RAM 111c is cleared to the initial value (for example, the minimum setting value “1”), and then (A1028 ), set the probability setting changing flag indicating that the probability setting is being changed (
A1029). If the RAM error flag is not set (the result of A1027 is "N
'), the probability setting change flag is set without clearing the probability setting value (A1029).
Next, a command during probability setting change is transmitted to the production control device 300 (production control board) (A1
030), the process proceeds to step A1034. In addition, the effect control device 300 that has received the command of changing the probability setting notifies the fact that the probability setting is being changed on the display device 41 or the like.

In the game control device 100, at least one of the setting key switch 93 and the RAM initialization switch 112 is off (the result of A1021 is "N"), and the RAM abnormality flag is not set (the result of A1022 is "N"). ), and if the probability setting changing flag is not set (the result of A1023 is "N"), it is determined whether or not the setting key switch 93 is on (A1031). When the setting key switch 93 is on (the result of A1031 is "Y"), the RAM initialization switch 112 is off, and the probability setting confirming (setting confirming state) process starts. A probability setting confirming flag indicating that the setting is being confirmed is set (A1032). Then, the production control device 30
0 (effect control board) (A1033), and the process proceeds to step A1034. In addition, the effect control device 300 that has received the command of changing the probability setting informs that the probability setting is being confirmed on the display device 41 or the like.

After step A1030 or step A1033, the game control device 100 executes the processing of steps A1034 to A1040 as common processing during probability setting change and during probability setting confirmation.

The game control device 100 first saves 128 ms (predetermined time) in the security signal control timer area in order to output the security signal during probability setting change and probability setting confirmation (A1034). The counting of the security signal control timer and the output of the security signal are executed in the probability setting change/confirmation process (FIG. 6B) described later. The counting of the security signal control timer and the output of the security signal are executed in the external information editing process (A1319). The security signal is output for at least 50 ms during the probability setting change and the probability setting confirmation.

Next, the game control device 100 permits interruption (A1035). As a result, timer interrupt processing (FIG. 7) can be executed. Then, it is determined whether or not the setting key switch 93 is off (A1036). If the setting key switch 93 is on (the result of A1036 is "N"), it is determined whether or not a power failure has occurred (A1037). If no power failure has occurred (the result of A1037 is "N"), the process returns to step A1036. on the other hand,
If a power failure has occurred (the result of A1037 is "Y"), steps A1055-A10
61 is executed when a power failure occurs.

In this way, as long as the setting key switch 93 is on and no power failure has occurred, the setting variable state (setting change state, setting change mode) in which the probability setting value can be changed, or the probability setting value can be confirmed. The setting confirmation state (setting confirmation mode) is continued.

On the other hand, the game control device 100, when the setting key switch 93 is off (A1036
The result is "Y"), prohibits the interruption (A1038), and transmits a command to end the notification to the effect control device 300 (effect control board) (A1039). In addition, the effect|presentation control apparatus 300 which received the command of the information completion|finish complete|finishes the information that it is during probability setting confirmation or probability setting change.

Next, the game control device 100 determines whether or not the probability setting changing flag is set, that is, whether or not the probability setting is being changed (A1040). If the probability setting changing flag is set (the result of A1040 is "Y"), that is, if the probability setting has been changed so far, RAM initialization processing (described later) of steps A1042 to A1044 is executed. do. On the other hand, if the probability setting changing flag is not set (the result of A1040 is "N"), that is, if the probability setting has been confirmed until now, when the power is turned on after step A1045 (when the power is restored) normal processing.

When the setting key switch 93 is off (the result of A1031 is "N"), the game control device 100 determines whether the RAM initialization switch 112 is on (A1041).
. When the RAM initialization switch 112 is on (result of A1041 is "Y"), RA
In M111c, the RAM area other than the probability setting value area for storing the probability setting value is set to 0.
Clear (A1042). That is, the game information stored in the RAM 111c is cleared to 0, except for the probability set values stored in the probability set value area. Furthermore, the above-mentioned probability setting changing flag is also cleared here. In addition to the probability setting value area, it is also possible to configure such that the stack area and unused area are not cleared, and the work area and stack area related to the performance information and its display (performance display) are not cleared. . The performance information is derived based on the number of prize balls obtained by winning prizes, such as ball output rate, base value (ball output rate in normal game state), role ratio, number of discharged balls, etc. is.

Next, the game control device 100 saves the initial value at the time of RAM initialization in the area to be initialized (A1043). And, the command at the time of RAM initialization is transmitted to production control device 300 (production control board) (A1044), it moves to the processing of step A1047.

On the other hand, the game control device 100, when the RAM initialization switch 112 is off (A1
041 result is "N"), the setting key switch 93 and the RAM initialization switch 112 are both off, so normal power-on (power recovery) processing is started, and power failure recovery processing is executed ( A1045). For example, the initial value at the time of restoration from power failure (at the time of power restoration) is saved in the area to be initialized. In addition, the above-mentioned probability setting confirming flag is also cleared here. Next, the command at the time of power failure recovery corresponding to the processing number prepared for rationally executing the special game processing described later is transmitted to the production control device 300 (production control board) (A1046), step A10
47 is processed.

In addition, the command for RAM initialization transmitted in the process of step A1044 and the command for power failure recovery transmitted in the process of step A1046 include a model designation command indicating the type of game machine, special figures 1 and 2 pending Decoration special figure 1 reservation number command and decoration special figure 2 reservation number command indicating the number, probability information command indicating the presence or absence of probability state (high probability state or low probability state) and time saving state, special figure fluctuation in predetermined production mode It includes a number-of-effects information command indicating the number of times the display game has been executed, and a power failure recovery command indicating that the power has been turned on.

Furthermore, the command for RAM initialization and the command for power failure recovery include a setting value information command (probability setting value information commands) are included. The game control device 100 only needs to transmit the setting value information command to the production control device 300 only once when the power is restored (turned on), and thereafter, the production control device 300 refers to the setting value information stored by itself. You can control the production.

The command for RAM initialization includes a RAM initialization command (RAM clear command). The effect control device 300 that has received the RAM initialization command is, for example,
A customer waiting demonstration is displayed on the display device 41, and RAM
Notification of initialization (RAM clearing) is performed for 30 seconds. Further, the command for restoration from power failure includes a screen designation command for designating the display contents of the screen of the display device 41 . In addition, the command for specifying the screen is during normal processing for both special figures 1 and 2 (when neither fluctuating nor hitting)
, is a customer waiting demo command, otherwise it is a recovery screen command.

After step A1044 or step A1046, the game control device 100 activates and sets the random number generation circuit (A1047). Specifically, a predetermined register (C
The CPU 111a sets a code (designated value) for activating the random number generation circuit in the TC update permission register). Also, the bit permutation pattern of the hard random number (here, the jackpot random number) generated by the hardware of the random number generating circuit is set.

The bit permutation pattern is a method of permuting the bit arrangement of the extracted random numbers (arrangement before bit transposition in the upper row) in a predetermined order and storing it as a different bit arrangement (arrangement after bit transposition in the lower row). is a pattern that defines

In this embodiment, by replacing the bits of the random number according to the bit permutation pattern, the regularity of the random number can be broken and the secrecy of the random number can be enhanced. The bit transposition pattern may be a single fixed pattern, or may be selected from a plurality of prepared patterns. In addition, the user may be able to set them arbitrarily.

After that, the game control device 100 extracts the value of a predetermined register (soft random number registers 1 to n) in the random number generation circuit when the power is turned on, and corresponding various initial value random numbers Initial value (big hit design initial value random number), initial value of small hit design random number that determines the small hit design (small hit design initial value random number) (only if there is a small hit), hit random number that determines the hit of the general design Initial value (hit initial value random number), initial value of falling lottery random number used in falling lottery (falling lottery initial value random number), etc.) is saved in a predetermined area of RWM as a start value (A1048),
Allow interrupts (A1049). The random number generation circuit in the CPU 111a used in this embodiment is configured so that the initial value of the soft random number register changes each time power is turned on. By doing so, the regularity of the random numbers generated by the software can be broken, making it difficult for the player to acquire illegal random numbers.

Subsequently, the game control device 100 executes an initial value random number update process for updating the values of various initial value random numbers and destroying the regularity of the random numbers (A1050). Although not particularly limited, in the present embodiment, the jackpot random numbers, jackpot pattern random numbers, hit random numbers, and falling lottery random numbers are configured to be generated using random numbers generated in a random number generation circuit. there is however,
The jackpot random number is a so-called "high-speed counter" that is updated based on a clock with a speed equal to or higher than the operating clock of the CPU. CTC output with the same period (CTC of timer interrupt processing (
It is a "slow counter" that is updated based on a CTC (CTC2)) that is different from CTC0).

In addition, in the jackpot pattern random number, the winning pattern random number, and the falling lottery random number, the so-called "initial value change method" is used to change the start value using each initial value random number (generated by software) each time the random number goes around. ing. Note that each random number may be updated by a counter with +1 or 1, or may be updated by a random method in which all values within the range appear separately without duplication until one round is completed. In other words, the jackpot random numbers are random numbers updated only by hardware, and the jackpot pattern random numbers, winning random numbers, and falling lottery random numbers are random numbers updated by hardware and software.

Subsequently, the game control device 100 prohibits interruption (A1051), and executes performance display editing processing for editing performance information and its display (performance display) (A1052). Here, performance information (accessory ratio, payout rate, etc.) may be calculated. Also, when the RAM abnormality flag is set in the register, the work area and stack area related to the performance information and its display (performance display) may be cleared (if not cleared in step A1042). After that, the interrupt is permitted (A1053). As a result, timer interrupt processing (FIG. 7) can be executed.

Next, the game control device 100 determines whether or not a power outage has occurred (A1054).
If no power failure has occurred (the result of A1054 is "N"), the process returns to step A1050. As a result, the processing of steps A1050 to A1054 is repeated until a power failure occurs.

When a power failure occurs (the result of A1054 is "Y"), the game control device 100 starts the process at the time of power failure, temporarily prohibits interrupts (A1055), and outputs off data to all output ports ( 1056). After that, the power failure inspection area check data 1 is saved in the power failure inspection area 1 (A1057), and the power failure inspection area check data 2 is saved in the power failure inspection area 2 (A
1058). Further, checksum calculation processing is executed to calculate the checksum when the RWM is powered off (A1059), and the calculated checksum is saved (A1060).
. Finally, a process of prohibiting access to the RWM is executed (A1061), and the game machine waits until the power is cut off.

In this way, by saving the check data in the power failure inspection area and calculating the checksum when the power is shut off, it is possible to check whether the information stored in the RWM before the power shutoff has been correctly backed up. A decision can be made at the time of re-insertion.

[Timer interrupt processing]
Next, timer interrupt processing will be described. FIG. 6A is a flowchart showing the procedure of timer interrupt processing (interrupt processing program). Timer interrupt processing is started when a periodic timer interrupt signal generated by the CTC circuit in the clock generator is input to the CPU 111a. When a timer interrupt occurs in the game microcomputer 111, timer interrupt processing is started.

When the timer interrupt process is started, the game control device 100 first designates register bank 1 as the register bank to be used (A1301), and sets the upper address of the RAM top address in a predetermined register (A1302). By switching from the register bank 0 used in the main process to the register bank 1 at the start of the timer interrupt process, it becomes equivalent to saving the registers used in the main process. Note that when the timer interrupt process is started, the interrupt is automatically disabled.

Next, the game control device 100 receives inputs from various sensors and switches, takes in signals,
That is, an input process for reading the state of each input port is executed (A1303). Next, based on the probability setting changing flag and the probability setting checking flag, it is determined whether the probability setting is being changed or the probability setting is being checked (A1304). If the probability setting is being changed or the probability setting is being confirmed (result of A1304 is "Y"), probability setting change/confirmation processing for changing or confirming the probability setting value is executed (A1305).

If the game control device 100 is neither changing the probability setting nor confirming the probability setting (A130
4 result is "N"), based on the output data set in various processes, output for driving control of actuators such as solenoids (for example, big winning opening solenoid 39b) and driving control of LEDs (light emission control) Processing is executed (A1306). Note that when a firing prohibition signal is output in the processing of step A1005 in the main processing, a firing permission signal is output by performing this output processing, and the firing permission signal can be set to a permission state.

Next, the game control device 100 executes a payout command transmission process for outputting the command set in the transmission buffer in various processes to the payout control device 200 (A1307), further random number update process 1 (A1308), random number update Process 2 (A1309) is executed. After that, monitor whether or not there is a normal signal input from the starting port 1 switch 36a, the starting port 2 switch 37a, the winning port switch 35a, and the big winning port switch 39a, and monitor errors (front frame and glass frame open) (A1310
).

Next, the game control device 100 determines whether abnormal ejection of game balls is occurring in the big winning opening (A1311). If the abnormal discharge occurrence flag is set by the abnormal discharge monitoring process (A1318), which will be described later, it can be determined that abnormal discharge is occurring. If the abnormal discharge is occurring (the result of A1311 is "Y"), the processing from step A1315 onwards is executed.

The game control device 100, when abnormal discharge is not occurring (the result of A1311 is "N")
, Special figure game processing for performing processing relating to the special figure variation display game is executed (A1312). Details of the special figure game processing will be described later.

Next, the game control device 100 executes normal pattern game processing for performing processing related to the normal pattern fluctuation display game (A1313). A segment LED editing process is executed to drive the segment LED provided in the gaming machine 10 to display the special figure variation game and various information related to the game so as to display desired content (A1314).

Furthermore, the game control device 100 executes magnet fraud monitoring processing for checking the detection signal from the magnetic sensor switch 61 and determining whether or not there is an abnormality (A1315). Furthermore, the radio wave fraud monitoring process (board radio wave fraud monitoring process) is executed to check the detection signal from the radio wave sensor 62 of the game board to determine whether or not there is an abnormality (A1316).

Thereafter, the game control device 100 executes vibration fraud monitoring processing for monitoring fraud due to vibration based on the input from the vibration sensor 65 (A1317). Next, an abnormal ejection monitoring process for monitoring abnormal ejection from the big winning opening is executed (A1318). In the abnormal discharge monitoring process, abnormal discharge of the special variable prize winning device 39 is performed based on inputs from the special variable prize winning device 39 from the large winning prize opening switch 39a, the specific area switch 72 (V winning prize opening switch), and the remaining ball discharge port switch 73. is monitored, and an abnormal discharge flag is set when abnormal discharge occurs. It should be noted that the game ball that has passed through the large winning opening switch 39a of the special variable winning device 39 is the specific area switch 7
2 (V winning opening switch) or the remaining ball discharge opening switch 73 is discharged.

Next, the game control device 100 executes external information editing processing for setting signals to be output to various external devices in the output buffer (A1319). Then, performance display monitor control processing for controlling the display of the performance display device 152 is executed (A1320). After that, the timer interrupt processing ends.

When the timer interrupt processing returns, the restoration of the interrupt disabled state and the restoration of the register bank designation are automatically performed. Alternatively, a process of returning the designation of the register bank to the register bank 0 may be performed.

[Probability setting change/confirmation process]
Next, the details of the probability setting change/confirmation process (A1305) in the timer interrupt process will be described. FIG. 6B is a flowchart showing the procedure of probability setting change/confirmation processing. In the probability setting change/confirm process, the probability setting value can be changed or confirmed.

The game control device 100 first determines whether the probability setting value is within the normal range (A2
401). The probability setting value here is stored in the probability setting value area of the RAM 111c.

Game control device 100, when the probability setting value is within the normal range (the result of A2401 is "
Y"), set the probability set value display data corresponding to the probability set value (A2402), and output it to the performance display device 152 via the driver 150 (A2404). If the probability setting value is not within the normal range (the result of A2401 is "N"), set the light-off data as the probability setting value display data (A2403), and output it to the performance display device 152 via the driver 150 (A
2404).

Here, the probability setting value display data is data of probability setting values for display displayed on the performance display device 152, and is stored in the probability setting value display data area. In addition, in order to prevent confusion among hall officials, etc., if the probability setting values are different but the same big hit probability (and small win probability), the display probability setting value is associated with the big win probability (and small win probability). can be the same. That is, the same display probability setting value may mean the same big win probability (and small win probability).

Next, the game control device 100 updates the security signal control timer by -1 if it is not 0 (A2405). The security signal control timer is set to 1 in step A1034.
28 ms (predetermined time). Subsequently, the external information terminal 71 outputs ON data of a security signal for informing an external device (game hall internal control device (hall computer), etc.) of the abnormality.
(A1026). Here, other signals to the external information terminal 71 such as the jackpot signal are kept off.

After that, the game control device 100 determines whether or not the probability setting changing flag is set (A2407). If the probability setting changing flag is not set (A2407
result is "N"), that is, if the probability setting is being confirmed, the probability setting change/confirmation process is terminated without doing anything.

Game control device 100, when the probability setting changing flag is set (A2407
result is "Y"), that is, if the probability setting is being changed, it is determined whether or not it is the first timer interrupt process after power-on (A2408). If it is the first timer interrupt process after power-on (the result of A2408 is "Y"), the probability setting change/confirmation process is terminated. This is to prevent the probability setting value from being unintentionally updated when the RAM initialization switch 112 is kept pressed.

If the game control device 100 is not the first timer interrupt process after turning on the power (A240
8 is "N"), it is determined whether or not there is an input from the RAM initialization switch 112 (A2
409). If there is no input from the RAM initialization switch (the result of A2409 is "N"), the probability setting change/confirmation process is terminated.

When there is an input from the RAM initialization switch 112, the game control device 100 (A2409
result is "Y"), the work set value in the work set value area (in the RAM 111c or register) is updated by +1 in the range of 0 to 5, and the probability in the probability set value area corresponding to the work set value The set values 1 to 6 are updated by +1 (A2410). As a result, the RAM initialization switch 112
Each time is operated, the probability setting value in the probability setting value area is updated by one. After that, the probability setting change/confirmation process is terminated. When entering the setting change mode, a value corresponding to the probability setting value read out from the probability setting value area (1 subtracted value) may be stored.

In the above description, each time the RAM initialization switch 112 is operated, the probability setting value in the probability setting value area is directly updated corresponding to the update of the working setting value. The probability setting value (setting value for work) during setting change is stored in the area, and when the setting key switch 93 is turned off and the setting change operation is completed (the result of A1036 is "Y").
”), a value corresponding to the work set value in the work set value area may be stored in the probability set value area for the first time. In this way, if a power failure occurs while changing settings (A1037
result is "Y"), the probability setting value (probability setting value stored in the probability setting value area) used for game control, performance control, etc. can be prevented from being changed by an unintended value.

[Special game processing]
Next, the details of the special figure game process (A1312) in the above timer interrupt process will be described. FIG. 7 is a flow chart showing the procedure of special game processing. In the special figure game processing, monitoring of the input of the starting port 1 switch 36a and the starting port 2 switch 37a, control of the entire processing relating to the special figure variation display game, and setting of the display of the special figure are performed.

The game control device 100 first executes a starting opening switch monitoring process for monitoring the winning of the starting opening 1 switch 36a and the starting opening 2 switch 37a (A2601). In the starting opening switch monitoring process, when a game ball wins in a starting winning opening 36 or a normal variable winning device 37 forming a second starting winning opening, various random numbers (such as a jackpot random number) are extracted, and special figure fluctuation display is performed based on the winning. A game result pre-determination is performed to determine a game result based on a prize winning at a stage before the start of the game. note that,
The details of the starting port switch monitoring process will be described later.

Next, the game control device 100 executes a big winning opening switch monitoring process (A2602).
In the big winning opening switch monitoring process, detection of game balls by the count switch 39a provided in the special variable winning device 39 is monitored. The details of the big winning opening switch monitoring process will be described later.

Next, the game control device 100 updates the special figure game processing timer by -1 if it is not 0 (1
is subtracted) (A2603). The special figure game processing timer is clocked by the interrupt period (4 msec) of the timer interrupt processing by -1 update. In addition, the minimum value of the special figure game processing timer is set to 0. Next, it is determined whether or not the special figure game processing timer is 0 (A2604). When the special figure game processing timer is not 0 (the result of A2604 is "N"), the process proceeds to step A2619.

The game control device 100, when the special figure game processing timer is 0 (the result of A2604 is "
Y"), that is, if the time is up or has already timed up, the special game sequence branch table to be referred to for branching to the process corresponding to the special game process number is set in the register (A2605). . Furthermore, the branch destination address of the process corresponding to the special figure game process number is acquired using the special figure game sequence branch table (A2606).
Subsequently, a subroutine call is made by the special game processing number, and game branch processing is executed according to the special game processing number (A2607).

If the game processing number is "0" at step A2607, the game control device 100
To monitor the start of fluctuation of the special figure fluctuation display game, set the start of fluctuation of the special figure fluctuation display game, set the effect, and set the information necessary for processing during the special figure fluctuation. Execute (A2608). In addition, the detail of a special figure usual process is later mentioned in FIG.

If the game processing number is "1" at step A2607, the game control device 100
And the setting of the stop display time of the special figure, the processing during the special figure fluctuation which performs the setting of the information necessary for performing the processing during the special figure display is executed (A2609). For example, in the special figure fluctuation process, set the necessary information such as a symbol stop command indicating the stop of the special symbol and the stop display time corresponding to the stop symbol pattern, and set the processing number "2" related to the special figure display process Set and save in the special game processing number area.

If the game processing number is "2" at step A2607, the game control device 100
To set a fanfare command according to the type of the big win, set a fanfare time according to the opening pattern of the big win for each big win, and perform processing during the fanfare/interval if the game result of the special figure fluctuation display game is a big win. Executes special figure display processing for setting necessary information etc. (A2610). For example, in special figure display processing, if the result of the special figure variation display game is a big hit, necessary information such as a fanfare command and fanfare time is set, and processing number "3" related to fanfare/interval processing is set. and save it in the special game processing number area. If the result of the special figure variation display game is not a big hit, the processing number "0" relating to the special figure normal processing is set and saved in the special figure game processing number area.

If the game processing number is "3" at step A2607, the game control device 100
Fanfare/interval processing for setting the opening time of the big winning opening, updating the number of openings, and setting information necessary for performing the processing during the opening of the big winning opening is executed (A2611). For example, in the fanfare/interval processing, the necessary information such as the round command corresponding to the round of the round game to be executed and the opening time of the big winning opening are set, and the processing number "4" related to the processing during the opening of the big winning opening is set. Set and save in the special game processing number area.

If the game processing number is "4" at step A2607, the game control device 100
If the jackpot round is not the final round, the interval command is set, while if it is the final round, the processing of setting the ending command, and the processing of setting the information necessary for the processing of the remaining balls of the big winning gate, etc. Open the big winning gate. Intermediate processing is executed (A2612). For example, in the large winning opening open process, necessary information such as an interval command and an ending command is set, the processing number "5" relating to the large winning opening remaining ball processing is set, and saved in the special game processing number area.

If the game processing number is "5" at step A2607, the game control device 100
If the jackpot round is the final round, the process of setting the time for the remaining balls in the jackpot to be discharged, and the jackpot remaining ball processing to set the information necessary to perform the jackpot end processing. Execute (A2613). For example, in the process during the opening of the big winning opening, if it is not the final round, the interval time is saved in the special game processing timer area, and the processing number "3" related to the fanfare/interval processing is set in the special game processing number area. Save. If it is the final round, the ending time is saved in the special game processing timer area, the processing number "6" relating to the jackpot end processing is set, and saved in the special game processing number area.

If the game processing number is "6" at step A2607, the game control device 100
Execute the jackpot end processing to set the information necessary for executing the special figure normal processing (A
2614). For example, in the jackpot end process, based on the probability fluctuation determination data corresponding to the stop pattern number (jackpot pattern number) of the special figure fluctuation display game, the probability state after the jackpot state and the general electric support state after the jackpot state ( Time saving state) and other necessary information is set, the processing number "0" related to the special figure normal processing is set and saved in the special figure game processing number area. The probability fluctuation judgment data includes the probability state (high probability / low probability) after the end of the jackpot state, and the number of continuous games (time reduction fluctuation number, electric support number) in the general electric support state (time saving state) after the jackpot state. ) information is included.

When the processing based on the special figure game processing number is completed, the game control device 100 prepares the special figure 1 variation control table for controlling the variation of the special figure 1 indicator 51 (A2615), then the special figure 1 indicator 51 is executed (A2616). Then, after preparing the special figure 2 variation control table for controlling the variation of the special figure 2 indicator 52 (A2617), the symbol variation control process related to the special figure 2 indicator 52 is executed (A2618).

[Starting port switch monitoring process]
Next, the details of the start-up switch monitoring process (A2601) in the special game process will be described. FIG. 8 is a flow chart showing the procedure of the starting port switch monitoring process.

The game control device 100 first prepares a prize-winning monitoring table for the starting prize-winning port 36 (starting port 1) (A2701), executes hardware random number acquisition processing (A2702), and executes the starting prize-winning port 36.
(A2703). If there is no winning to the starting winning port 36 (
If the result of A2703 is "N"), the processing after step A2709 is executed. On the other hand, if there is a prize to the start winning port 36 (the result of A2703 is "Y"), it is determined whether it is during the special figure time saving (during the general electricity support state) (A2704).

When the game control device 100 determines that it is not during the special figure time saving (during the general electricity support state) (A
If the result of step A2704 is "N"), the processing after step A2707 is executed. On the other hand, if it is during special figure time saving (during general electricity support state) (result of A2704 is "Y"), prepare a right-handed instruction notification command as a production command (A2705), and execute production command setting processing ( A2706). In the effect command setting process, the effect command is written in the serial transmission buffer, and the effect command is transmitted to the effect control device 300. - 特許庁

That is, if it is in the general electricity support state (time saving state), regardless of the probability state (high probability state/low probability state) of the variable display game, the right-handed instruction notification command is prepared and the production command setting process is executed. . In the case of this embodiment, it is easier to win a prize in the starting prize-winning port 36 with a left-handed hit, and a right-handed hit in the normal variable prize-winning device 37 does not win a prize. Moreover, the game ball does not pass through the normal figure start gate 34 unless it is hit to the right. Therefore, in the general electricity support state (time saving state), right-handed hitting is more advantageous than left-handed hitting, but if there is a prize at the start winning opening 36 during the general electricity support state (that is, during the general electricity support state In the case of hitting to the left), a hitting to the right instruction notification command is transmitted to the production control device 300, and the production control device 300 instructs to hit to the right (
warning) is executed by the display device 41 or the like.

Next, the game control device 100 prepares a table for setting information on suspension by the starting winning opening 36 (starting opening 1) (A2707), and then executes special figure starting opening switch common processing (A2
708). Then, a winning monitoring table for the second starting winning opening (ordinary variable winning device 37) is prepared (A2709), hardware random number acquisition processing is executed (A2710), and whether or not there is a winning to the second starting winning opening is determined. Judge (A2711). If there is no prize to the 2nd start prize gate (
When the result of A2711 is "N"), the starting port switch monitoring process is terminated.

On the other hand, the game control device 100 determines whether or not the normal electric accessory (normal variable prize winning device 37) is in operation when there is a prize to the second start prize winning port (the result of A2711 is "Y"). That is, it is determined whether or not the normal variable winning device 37 is in an open state in which the game ball can win (A2712). When the normal electric accessory is in operation (the result of A2712 is "Y"
), the process proceeds to step A2714.

On the other hand, the game control device 100, when the normal electric accessory is not in operation (the result of A2712 is "N"), determines whether the normal electric fraud is occurring (A2713). When the number of fraudulent winnings to the normal variable winning device 37 is equal to or greater than the number of fraudulent occurrence determinations (for example, 5), it is determined that general electrical fraud is occurring. The normal variable winning device 37 cannot win a game ball when it is closed, and can win a game ball only when it is open. Therefore, if a game ball wins in the closed state, it means that some kind of abnormality or dishonesty has occurred, and if there is a game ball won in such a closed state, the number is counted as the number of fraudulent wins. Then, when the number of fraudulent prizes thus counted is equal to or greater than a predetermined number (upper limit value) for determination of fraud occurrence, it is determined that fraud is occurring.

The game control device 100 prepares a table for setting information on suspension by the second start winning port (normal variable winning device 37) when the electric fraud is not occurring (the result of A2713 is "N") (A2714). , Executes the special figure starting opening switch common processing (A2715), and ends the starting opening switch monitoring processing. Also, when it is determined at A2713 that the electric power irregularity is occurring (the result of A2713 is "Y"), the start port switch monitoring process is terminated. That is, the second
Prevents further generation of starting memories.

[Common process for special figure start switch]
Next, the special figure start switch common processing in the start switch monitoring process (A2708, A
2715) will be described in detail. FIG. 9 is a flow chart showing the procedure of the special figure starting port switch common processing. Special figure starting opening switch common processing, when there is an input of starting opening 1 switch 36a or starting opening 2 switch 37a, is processing that is performed in common for each input.

First, the game control device 100 outputs information about the number of winnings to the starter switch to be monitored, out of the starter 1 switch 36a and the starter 2 switch 37a, to a management device outside the game machine 10. is loaded (A2901), the loaded value is updated by +1 (A2902), and it is determined whether or not the output count overflows (A2903). If the output count does not overflow (the result of A2903 is "N"),
Save the updated value in the starting signal output count area of RWM (A2904), step A
2905 processing is performed. On the other hand, if the number of outputs overflows (result of A2903 is "Y"), the process proceeds to step A2905. In this embodiment, a value from "0" to "255" can be stored in the starting signal output count area. Then, when the loaded value is "255", the updated value becomes "0" by +1 update, and it is determined that the number of outputs overflows.

Next, the game control device 100, of the starting port 1 switch 36a and the starting port 2 switch 37a, whether or not the update target special figure holding number (starting memory number) corresponding to the monitoring target starting port switch is less than the upper limit (A2905). If the special figure pending number to be updated is not less than the upper limit (the result of A2905 is "N"), the special figure start opening switch common processing is terminated. Also, if the number of special figures pending to be updated is less than the upper limit (the result of A2905 is "Y"), the number of special figures pending to be updated (the number of special figures 1 pending or the number of special figures 2 pending) + 1 update Then (A2906), the target starting gate winning flag is saved (A2907).

Next, the game control device 100 calculates the address of the random number storage area corresponding to the starting switch to be monitored and the special figure reservation number (A2908), and stores the jackpot random number prepared in step A2805 as the RWM jackpot random number. Save in area (A2909). Next, the jackpot symbol random number of the starting switch to be monitored is extracted and prepared (A2910), and saved in the jackpot symbol random number storage area of the RWM (A2911).

Next, the game control device 100 saves the variation pattern random numbers 1 to 3 in the corresponding RWM variation pattern random number storage area (A2912), and executes special figure reservation information determination processing (A2
913). In the special figure reservation information determination process, the pre-reading stop symbol command corresponding to the stopped symbol information based on the saved jackpot random numbers and jackpot random numbers, and the first half variation number based on the saved variation pattern random numbers 1 to 3 (pre-reach variation number) And set the look-ahead variation pattern command corresponding to the second half variation number (number of post-reach variation) as a production command. Then, prepare the decorative special figure reservation number command corresponding to the starting opening switch to be monitored and the number of special figure reservations as a production command (A2914), execute the production command setting process (A2915), common to the special figure starting opening switch End the process.

Here, the game control device 100 (RAM 111c) extracts a predetermined random number based on the inflow of the game ball into the starting winning port 36 or the starting winning region of the normal variable winning device 37, and becomes the execution right of the variable display game. It constitutes a start memory means for storing a predetermined number as an upper limit as a start memory. again,
The starting memory means (game control device 100) stores various random values extracted based on the winning of the game ball into the first starting winning port (starting winning port 36) as the first starting memory up to a predetermined number as the upper limit. , Various random numbers extracted based on the winning of the game ball to the second starting winning port (normal variable winning device 37) are stored as the second starting memory up to a predetermined number as the upper limit.

[Special normal processing]
Next, the details of the special figure normal processing (A2608) in the special figure game processing will be described.
FIG. 10 is a flow chart showing the procedure of the special figure normal processing.

The game control device 100 first determines whether or not the special figure 2 reservation number (second start memory number) is 0 (A3201). When the special figure 2 reservation number is 0 (the result of A3201 is "Y"), it is determined whether the special figure 1 reservation number (first start memory number) is 0 (A3206). Then, if the number of special figures 1 pending is 0 (the result of A3206 is "Y"), it is determined whether the customer waiting demonstration has started (A3211), and if the customer waiting demonstration has not started (A3211 is "N"), the customer waiting demonstration flag is set in the customer waiting demonstration flag area (A3212).

Subsequently, the game control device 100 prepares a customer waiting demo command as an effect command (
A3213), effect command setting processing is performed (A3214), and the process proceeds to step A3215. On the other hand, in step A3211, if the customer waiting demonstration has already started (A32
The result of 11 is "Y"), and set "0" related to special figure normal processing as the processing number (A3215
), save the processing number in the special game processing number area (A3216), and clear the fluctuation symbol discrimination flag area (A3217). Then, the fraud monitoring period flag is saved in the large winning opening fraud monitoring period flag area (A3218), and the special figure normal processing is terminated.

In addition, the game control device 100, if the special figure 2 reservation number is not 0 (the result of A3201 is "N
”), execute the special figure 2 fluctuation start process (A3202), prepare the decoration special figure reservation number command (decoration special figure 2 reservation number command) corresponding to the special figure 2 reservation number as a production command (A3203
), and effect command setting processing is executed (A3204). Then, the processing shift setting processing during the special figure fluctuation of the special figure 2 is executed (A3205), and the special figure usual processing is terminated.

In addition, the game control device 100, if the special figure 1 reservation number is not 0 (the result of A3206 is "N
”), execute the special figure 1 fluctuation start process (A3207), prepare the decoration special figure reservation number command (decoration special figure 1 reservation number command) corresponding to the special figure 1 reservation number as a production command (A3208
), and effect command setting processing is executed (A3209). Then, the processing transition setting processing during special figure fluctuation of special figure 1 is executed (A3210), and the special figure usual processing is ended.

In this way, by performing the check of the special figure 2 reservation number before the special figure 1 reservation number check, if the special figure 2 reservation number is not 0, special figure 2 fluctuation start processing (A3202) is executed The Rukoto. That is, the special figure 2 variation display game is preferentially executed over the special figure 1 variation display game. That is, the game control device 100 is the second start storage means (game control device 100)
If there is a second starting memory in the second starting memory, priority control means for executing the variable display game based on the second starting memory preferentially over the variable display game based on the first starting memory.

[Special figure 1 fluctuation start process]
Next, the details of the special figure 1 fluctuation start process (A3207) in the special figure usual process will be described. FIG. 11 is a flow chart showing the procedure of the special figure 1 fluctuation start process. The special figure 1 fluctuation start process is a process performed at the start of the special figure 1 fluctuation display game.

The game control device 100 saves the special figure 1 fluctuation flag indicating the type of the special figure fluctuation display game to be executed (here, special figure 1) in the fluctuation symbol discrimination area (A3401). Subsequently, a jackpot flag 1 setting process for setting deviation information and jackpot information to the jackpot flag 1 for determining whether or not the special figure 1 variation display game is a jackpot is executed (A3402). The details of the jackpot flag 1 setting process will be described later.

Next, the game control device 100 executes a special figure 1 stop symbol setting process related to the setting of the special figure 1 stop symbol (symbol information) relating to the special figure 1 variable display game (A3403). In the special figure 1 stop design setting process, the stop design number at the time of loss or at the time of the big hit and the loss stop design pattern or the big hit stop design pattern corresponding to this stop design number are saved. Then, a decoration special figure command corresponding to the stop symbol pattern is prepared as a production command, and production command setting processing is executed. In addition, it acquires and saves round number information (round upper limit value) corresponding to the stop design number and probability fluctuation determination data corresponding to the stop design number.

Furthermore, the game control device 100 executes a special figure information setting process for setting special figure information which is a parameter for setting a variation pattern (A3404).

Subsequently, the game control device 100 prepares a special figure 1 variation pattern setting information table, which is a table in which information for referring to various information regarding the setting of the variation pattern of the special figure 1 variation display game is set (A3405 ).

After that, the game control device 100 executes a variation pattern setting process for setting a variation pattern (variation pattern number) which is a variation mode in the special figure 1 variation display game (A3406).
. Next, the game control device 100 executes a fluctuation start information setting process for setting the information of the fluctuation start of the special figure 1 fluctuation display game (A3407), and ends the special figure 1 fluctuation start process. In the fluctuation start information setting process, the fluctuation time value corresponding to the fluctuation pattern (variation pattern number) is acquired and saved in the special figure game processing timer area. Then, a variation command (MODE, ACTION) corresponding to the variation pattern number is prepared as an effect command, and effect command setting processing is performed. Also, in the fluctuation start information setting process, the special figure pending number related to the special figure type (special figure 1 or special figure 2) of the special figure variation display game to be started is updated by -1 (decrease by 1).

[Special figure 2 fluctuation start process]
Next, the details of the special figure 2 fluctuation start process (A3202) in the special figure usual process will be described. FIG. 12 is a flowchart showing the procedure of special figure 2 fluctuation start processing. The special figure 2 variation start process is a process performed at the start of the special figure 2 variation display game, and the same process as the special figure 1 variation start process shown in FIG. 11 is performed for the second start memory. It is something to do.

The game control device 100 first determines the type of special figure variation display game to be executed (here, special figure 2).
To save the special figure 2 fluctuation flag indicating to the fluctuation symbol discrimination area (A3501). Subsequently, a big hit flag 2 setting process for setting deviation information and big hit information to the big hit flag 2 for determining whether or not the special figure 2 variation display game is a big hit is executed (A3502).

Next, the game control device 100 executes a special figure 2 stop symbol setting process related to the setting of the special figure 2 stop symbol (symbol information) relating to the special figure 2 fluctuation display game (A3503). Furthermore, the special figure information setting processing which sets the special figure information which is the parameter in order to set fluctuation pattern is executed (A3504). Subsequently, prepare a special figure 2 variation pattern setting information table, which is a table in which information for referring to various information regarding the setting of the variation pattern of the special figure 2 variation display game is set (A3505).

After that, the game control device 100 executes a variation pattern setting process for setting the variation pattern of the special figure 2 variation display game (A3506). Finally, the fluctuation start information setting process for setting the information of the fluctuation start of the special figure 2 fluctuation display game is executed (A3507), and the special figure 2 fluctuation start process is ended.

[Big hit flag 1 setting process]
Next, the details of the jackpot flag 1 setting process (A3402) in the special figure 1 fluctuation start process will be described. FIG. 13 is a flow chart showing the procedure of the jackpot flag 1 setting process.

The game control device 100 first saves the deviation information in the jackpot flag 1 area (A36
01). Next, the jackpot random number is loaded from the RWM special figure 1 jackpot random number storage area (for the reserved number 1), prepared (A3602), and the special figure 1 jackpot random number storage area (for the reserved number 1) is cleared to 0. (A3603). It should be noted that the reservation number 1 use is an area that stores information (random numbers, etc.) about the special figure start memory of which digestion order is the first (here the first among the special figures 1). After that, according to whether or not the prepared big-hit random number coincides with the big-hit judgment value, big-hit determination processing is executed to determine whether or not the game is a big-hit (A3604).

When the determination result of the big hit determination process (A3604) is a big hit (the result of A3605 is "Y"), the game control device 100 overwrites the big hit flag 1 area where the losing information is saved in step A3601 with the big hit information. Save (A3606) and end the jackpot flag 1 setting process. On the other hand, if the judgment result of the big hit judgment process (A3605) is not a big hit (A
The result of 3605 is "N"), and the jackpot flag 1 setting process is terminated. Thus, in the present embodiment, the result of the special figure 1 variable display game is either "big hit" or "loss".

[Big hit flag 2 setting process]
Next, the details of the jackpot flag 2 setting process (A3502) in the special figure 2 fluctuation start process will be described. FIG. 14 is a flow chart showing the procedure of the big hit flag 2 setting process.
This process performs the same process as the big hit flag 1 setting process shown in FIG. 13 for the second start memory.

The game control device 100 first saves the deviation information in the jackpot flag 2 area (A37
01). Next, load the jackpot random number from the RWM special figure 2 jackpot random number storage area (for the number of reservations 1), prepare (A3702), and clear the special figure 2 jackpot random number storage area (for the number 1 reservation) to 0. (A3703). It should be noted that the reservation number 1 use is an area that stores information (random numbers, etc.) about the special figure start memory of which digestion order is the first (here, the first among the special figures 2). After that, according to whether or not the prepared big-hit random number coincides with the big-hit judgment value, big-hit judgment processing is executed to judge whether or not the game is a big-hit (A3704).

When the determination result of the big hit determination process (A3704) is a big hit (the result of A3705 is "Y"), the game control device 100 overwrites the big hit flag 2 area where the loss information is saved in step A3701 with the big hit information. Save (A3706) and end the jackpot flag 2 setting process. On the other hand, if the judgment result of the big hit judgment process (A3704) is not a big hit (A
If the result of 3705 is "N"), the process of setting the big hit flag 2 is finished while the deviation information is saved in the big hit flag 2. As described above, in the present embodiment, the result of the special figure 2 variation display game is either "big hit" or "loss".

[Jackpot determination process]
Next, the big hit determination process in the big hit flag 1 setting process and the big hit flag 2 setting process (
A3605, A3704) will be described in detail. FIG. 15 is a flow chart showing the procedure of the big hit determination process. It should be noted that the big hit determination process is a process common to the big hit determination process in other processes performed during the timer interrupt process, and is also performed in step A3004 of the special figure reservation information determination process.

The game control device 100 first sets the lower limit judgment value of the big hit judgment value (A3801), and judges whether or not the value of the target big hit random number is less than the lower limit judgment value (A3802). A big hit means that the big hit random number matches the big hit determination value. The jackpot judgment value is a series of multiple values, and when the jackpot random number is equal to or greater than the lower limit judgment value, which is the lower limit value of the jackpot judgment value, and below the upper limit judgment value, which is the upper limit value of the jackpot judgment value , is determined to be a jackpot.

The game control device 100, when the value of the target jackpot random number is less than the lower limit judgment value (A380
The result of 2 is "Y"), set a failure (other than a big hit) as the judgment result (A3807), and end the big hit judgment processing.

In addition, the game control device 100, when the value of the jackpot random number is not less than the lower limit judgment value (A3
The result of 802 is "N"), and it is determined whether or not the probability of occurrence of a big hit is in a high probability state (variable probability state) (A3803). Then, if it is in a high-probability state (the result of A3803 is "Y"
), and sets the upper limit judgment value in the high probability (A3804). On the other hand, if it is not in the high probability state (the result of A3803 is "N"), the upper limit determination value for low probability is set (A3805).

After setting the upper limit judgment value of the value of the jackpot random number, the game control device 100 determines whether or not the target jackpot random number value is greater than the upper limit judgment value (A3806). If the value of the jackpot random number is greater than the upper limit judgment value (the result of A3806 is "Y"), the decision result is set to be a failure (other than the jackpot) (A3807). On the other hand, if the value of the jackpot random number is not greater than the upper limit judgment value (
The result of A3806 is "N"), and a big hit is set as the determination result (A3808). When the determination result is set, the big hit determination process is terminated.

[Special figure information setting process]
Next, special figure information setting processing (A340
4, A3504) will be described in detail. FIG. 16 is a flow chart showing the procedure of the special figure information setting process. In this embodiment, the probability state (low probability/high probability, with/without time saving) does not directly affect the distribution of fluctuations, but the production mode managed by the game control device 100 affects the distribution of fluctuations. One production mode is set from a plurality of production modes according to the probability state, the presence or absence of the time saving state, the progress of the special figure fluctuation display game, and the like.

The game control device 100 first sets the first half variation group selection pointer table (A
4201), acquire the first half variation group selection pointer corresponding to the production mode information (A4
202). Next, set the first half variation group selection offset table (A4203)
, To acquire the offset data corresponding to the target special figure reservation number (special figure 1 reservation number or special figure 2 reservation number) and the stop design pattern (A4204).

Next, the game control device 100 adds the first half variation group selection pointer and the offset data (A4205), and saves the value obtained by the addition in the variation distribution information 1 area (A4206
). As a result, in the fluctuation distribution information 1 area, the fluctuation distribution information 1 generated based on the type of stop symbol, the number of reservations, and the presentation mode is saved. This fluctuation distribution information 1 is a table pointer for distributing the first half fluctuation (variation mode before the start of reach), and is used for selecting a fluctuation group later. However, although it depends on the specifications of the model, when the number of holds is large, the fluctuation time is shortened only in the case of loss, so in cases other than loss, the number of holds does not affect the distribution of the first half fluctuation. A variation group includes multiple variation patterns, and when determining a variation pattern, first select a variation group, and then select one variation pattern from this variation group. ing.

Next, the game control device 100 sets the second half variation group selection pointer table (A
4207), acquire the second half variation group selection pointer corresponding to the presentation mode information (A4
208). Next, set the second half fluctuation group selection offset table (A4209)
, Acquire the offset data corresponding to the target special figure pending number and the stop symbol pattern (A42
10).

Next, the game control device 100 adds the second half variation group selection pointer and the offset data (A4211), and saves the value obtained by the addition in the variation distribution information 2 area (A4212
), to end the special figure information setting process. As a result, in the fluctuation distribution information 2 area, the fluctuation distribution information 2 generated based on the type of stop symbol, the number of reservations, and the presentation mode is saved. This fluctuation distribution information 2 is a table pointer for distributing fluctuations in the second half (types of reach (including no reach)), and is used later to select a fluctuation group. However, only in the case of loss, the rate of reach changes according to the number of holds (the rate of reach is lower when the number of holds is large), so in cases other than losses, the number of holds is distributed in the second half as a result. does not affect

[Variation pattern setting process]
Next, variation pattern setting processing (A
3406, A3506) will be described in detail. FIG. 17 is a flow chart showing the procedure of the variation pattern setting process.

The fluctuation patterns are the first half fluctuation pattern, which is the fluctuation mode from the start of the special figure fluctuation display game to the reach state, and the second half fluctuation pattern, which is the fluctuation form from the reach state to the end of the special figure fluctuation display game. First, the second half fluctuation pattern is set, and then the first half fluctuation pattern is set.

The game control device 100 first sets the variable group selection address table (A430
1) Acquire the address of the second half fluctuation group table corresponding to fluctuation distribution information 2, prepare it (A4302), and load fluctuation pattern random number 1 from the target fluctuation pattern random number 1 storage area (for reserved number 1) , prepare (A4303). In this embodiment, the structure of the second half variation group table is different for winning and losing. Specifically, the size is 1 byte for winning, and 2 bytes for losing. Since the probability of winning is lower than the probability of losing, and even 1 byte is sufficient, the size of the winning is 1 byte from the viewpoint of saving the data capacity. Therefore, only the lower value of the 2-byte variation pattern random number 1 is used at the time of winning. In addition, since the probability of losing is higher than the probability of winning, and it is desired to produce more diverse effects, the size for losing is set to 2 bytes.

Then, the game control device 100 determines whether the result of the special figure variation display game is a loss (A4304), and if it is a loss (the result of A4304 is "Y"), performs 2-byte distribution processing (A4305). Then, the process proceeds to step A4307. Also, if it is not lost (the result of A4304 is "N"), sorting processing (A4306) is performed, and step A
The processing of 4307 is performed.

Next, the game control device 100 acquires the address of the second half variation selection table (second half variation pattern selection table) obtained as a result of the distribution, prepares (A4307), and stores the target variation pattern random number 2 storage area (holding (for formula 1) to load the variation pattern random number 2 and prepare (A4308). Then, the allocation process is executed (A4309), the second half variation number obtained as a result of the allocation is acquired, and saved in the second half variation number area (A4310). Through this processing, the second half variation pattern is set.

Next, the game control device 100 sets the first half variation group table (A4311), and calculates the table selection pointer based on the variation allocation information 1 and the second half variation number (A4312). Then, the address of the first half fluctuation selection table (first half fluctuation pattern selection table) corresponding to the calculated pointer is obtained and prepared (A4313), and the fluctuation pattern random number from the target fluctuation pattern random number 3 storage area (for reserved number 1) 3 is loaded and ready (A4314). after that,
Perform the allocation process (A4315), acquire the first half variation number obtained as a result of allocation, save it in the first half variation number area (A4316), and end the variation pattern setting process. By this processing, the first half variation pattern is set, and the variation pattern of the special figure variation display game is set. That is, the game control device 100 serves as variation pattern setting means for setting a variation pattern, which is a game execution mode, from among a plurality of variations.

[2-byte distribution processing]
Next, the details of the 2-byte allocation process (A4305) in the variation pattern setting process will be described. FIG. 18 is a flow chart showing the procedure of 2-byte allocation processing. 2
The byte distribution process is a process for selecting the second half variation selection table of the special figure variation display game from the second half variation group table based on the variation pattern random number 1.

The game control device 100 first checks whether or not the head data of the selection table (second half variation group table prepared in A4302) is a code without sorting (that is, "0") (A4401). Here, the second half fluctuation group table stores predetermined sorting values in association with at least one second half fluctuation selection table.
In the second half fluctuation group table that defines only the second half fluctuation selection table that becomes "no reach" (for example, some fluctuation group tables when the result is lost), there is no need for sorting, so the sorting value is "0" , that is, a code without sorting is specified at the top.

Then, if the leading data of the selection table (second half variation group table) is a code without sorting (the result of A4402 is "Y"), the game control device 100 updates the address of the data corresponding to the sorting result. (A4407) to end the 2-byte allocation process. On the other hand, if the top data of the selection table (second half fluctuation group table) is not a code without sorting (the result of A4402 is "N"), one sorting specified first in the selection table (second half fluctuation group table) Get the value (A4403).

Subsequently, the distribution value obtained in step A4403 is subtracted from the random value prepared in step A4303 (value of variation pattern random number 1) to calculate a new random value (A4404).
, it is determined whether the calculated new random number value is smaller than "0" (A4405). If the new random number is not smaller than "0" (the result of A4405 is "N"), the address of the next distribution value is updated (A4406), and then the process proceeds to step A4403. The following processing is performed. That is, the distribution value specified next in the selection table (second half fluctuation group table) is acquired (A4403), and then the previous step A4405
Calculate a new random number by subtracting the sorting value from the random number that has already been judged (A44
04), and it is determined whether or not the calculated new random number value is smaller than "0" (A4405).

In step A4405, the above process is judged to be smaller than "0" (A4
Execute until the result of 405 is "Y"). As a result, any one of the second half fluctuation selection tables is selected from at least one second half fluctuation selection table defined in the selection tables (second half fluctuation group tables). Then, if it is determined in step A4405 that the new random number is smaller than "0" (the result of A4405 is "Y"), the address of the data corresponding to the sorted result is updated (A4407), and 2 bytes End the sorting process.

[Distribution process]
Next, distribution processing (A4306, A4309, A43
15) will be described in detail. FIG. 19 is a flow chart showing the procedure of sorting processing. In the distribution process, based on the fluctuation pattern random number 2, the second half fluctuation pattern of the special figure fluctuation display game is selected from the second half fluctuation selection table (second half fluctuation pattern group), or based on the fluctuation pattern random number 3, the first half fluctuation selection table ( It is a process for selecting the first half variation pattern of the special figure variation display game from the first half variation pattern group).

The game control device 100 first selects the target selection table (the second half variation group table prepared in A4302, the second half variation selection table prepared in step A4307, or the first half variation selection table prepared in step A4313). is a code for no sorting (that is, "0") (A4501). Here, the second half variation group table, the second half variation selection table, and the first half variation selection table are predetermined in association with at least one second half variation selection table, second half variation pattern (second half variation number), or first half variation pattern (first half variation number). However, in the case of a selection table that does not require sorting, the sorting value "0", that is, a code indicating no sorting is specified at the head.

Then, the game control device 100, when the top data of the target selection table (the second half variation group table, the second half variation selection table, or the first half variation selection table) is a code without sorting (the result of A4502 is "Y"), The address of the data corresponding to the sorting result is updated (A4507), and the sorting process ends. On the other hand, if the head data of the target selection table (second half variation group table, second half variation selection table, first half variation selection table) is not a code without sorting (the result of A4502 is "N"), the target selection table (
A first sorting value specified in the second half fluctuation group table, the second half fluctuation selection table, or the first half fluctuation selection table) is obtained (A4503).

Subsequently, the game control device 100 subtracts the sorting value obtained in step A4503 from the random numbers prepared in steps A4303, A4308, and A4314 (variation pattern random number 1, variation pattern random number 2, and variation pattern random number 3). to calculate a new random number (A45
04), and it is determined whether the calculated new random number value is smaller than "0" (A4505).
Then, if the new random number value is not smaller than "0" (the result of A4505 is "N"),
After updating to the address of the next distribution value (A4506), the process moves to step A4503 and the subsequent processes are performed.

That is, the distribution value specified next in the target selection table (second half fluctuation group table, second half fluctuation selection table, first half fluctuation selection table) is acquired (A4503), and then the randomness determined in the previous step A4505 A new random number value is calculated by subtracting the distribution value from the numerical value (A4504), and it is determined whether or not the calculated new random number value is smaller than "0" (A4505). In step A4505 of the above process, the new random number is set to "0
” (the result of A4505 is “Y”). As a result, at least one second half fluctuation selection table, second half fluctuation pattern (second half fluctuation number), or first half fluctuation pattern (first half Any one of the second half variation selection table, second half variation pattern (second half variation number), and first half variation pattern (first half variation number) is selected from among the variation numbers).

Then, when the game control device 100 determines in step A4505 that the new random number value is smaller than "0" (the result of A4505 is "Y"), it updates the address of the data corresponding to the sorted result. (A4507), the sorting process ends.

[Variation start information setting process]
Next, the fluctuation start information setting process (A
3407, A3507) will be described in detail. FIG. 20 is a flow chart showing the procedure of the change start information setting process.

The game control device 100 first clears the random number storage area for the target variation pattern random numbers 1 to 3 (A4601). Next, the first half variation time value table is set (A4602), and the first half variation time value corresponding to the first half variation number is acquired (A4603). Furthermore, the second half fluctuation time value table is set (A4604), and the second half fluctuation time value corresponding to the second half fluctuation number is acquired (A4
605).

Then, the game control device 100 adds the first half fluctuation time value and the second half fluctuation time value (A460
6), save the added value in the special game processing timer area (A4607). Thereafter, a variation command (MODE) corresponding to the first half variation number is prepared (A4608), a variation command (ACTION) corresponding to the second half variation number is prepared as an effect command (A4609), and effect command setting processing is performed (A4610). ). Next, the special figure reservation number corresponding to the fluctuation pattern discrimination flag is updated by -1 (A4611), and the address of the random number storage area corresponding to the fluctuation pattern discrimination flag is set (A4612). Next, the random number storage area is shifted (A4613), the free area after the shift is cleared (A4614), and the fluctuation start information setting process ends.

Information about the start of the special figure variation display game is set by the above processing. i.e.
The game control device 100 serves as determination means for determining various random numbers stored in the start storage means (game control device 100). Also, the game control device 100 serves as variation pattern determination means capable of determining the variation pattern of the identification information to be executed in the variation display game based on the determination information in the start memory.

Then, the information on the start of these special figure fluctuation display games is later transmitted to the production control device 300, and the production control device 300 receives the information on the start of the special figure fluctuation display game, and responds to the determined fluctuation pattern. Set the detailed production contents in the decoration special figure fluctuation display game. Information on the start of these special figure fluctuation display games includes a decoration special figure reservation number command including information on the number of starting memories (number of reservations), a decoration special figure command including information on the stop pattern, and a variation of the special figure fluctuation display game A variation command containing information about a pattern and a stop information command containing information about extension of stop time are mentioned, and a command is transmitted to production control device 300 in this order. In particular, by transmitting the decoration special figure command earlier than the variation command, the processing in the production control device 300 can be efficiently advanced.

[General map game processing]
Next, the details of the general-purpose game process (A1310) in the timer interrupt process will be described. FIG. 21 is a flow chart showing the procedure of the general-purpose game process. In the general-purpose game processing, the input of the gate switch 34a is monitored, and the overall processing related to the general-purpose variation display game is controlled.
Set the display of the normal map, etc.

The game control device 100 first executes a gate switch monitoring process for monitoring an input from the gate switch 34a (A7601).

Subsequently, the game control device 100 executes general electric winning switch monitoring processing for monitoring input from the starting port 2 switch 37a (A7602).

Next, the game control device 100 updates the normal game processing timer by -1 if it is not 0 (1
is subtracted) (A7603). In addition, the minimum value of the general-purpose game processing timer is set to zero. Then, the game control device 100 determines whether or not the value of the normal game processing timer has become 0 (A7604).

Game control device 100, when the value of the normal game processing timer is 0 (the result of A7604 is "Y"), that is, when the time is up or has already timed up, to the normal game processing number A general-purpose game sequence branch table to be referred to for branching to the corresponding process is set in the register (A7605).

Furthermore, the game control device 100 acquires the branch destination address of the process corresponding to the general-purpose game processing number based on the set general-purpose game sequence branch table (A7606). Then, a subroutine call is made according to the general-purpose game processing number, and game branch processing is executed according to the general-purpose game processing number (A7607).

If the game processing number is "0" at step A7607, the game control device 100
Monitor the start of fluctuation of the normal pattern fluctuation display game, set the start of fluctuation of the normal pattern fluctuation display game, set the effect, and set the information necessary for processing during normal pattern fluctuation. Execute (A7608). The details of the general/universal pattern normal processing will be described later with reference to FIG. 22 .

In addition, when the game processing number is "1" in step A7607, the game control device 100 executes normal pattern fluctuation processing for setting information necessary for performing normal pattern display processing ( A7609). For example, in the process during normal map fluctuation, in order to shift to the process during normal map display, set "2" as the game processing number and save it in the normal map game processing number area, Save in the processing timer area.

In addition, if the game processing number is "2" in step A7607, if the result of the normal figure fluctuation display game is a hit, the game control device 100 The setting of opening time and the processing during the normal diagram display that performs the setting of information necessary for performing the processing during the normal diagram per is executed (A7610). For example, in the normal pattern display processing, when the result of the normal pattern variation display game is a hit, in order to shift to the normal pattern winning process, "3" is set as the game processing number and the normal pattern game processing number area is set. On the other hand, in the case of a failure, in order to shift to the normal game process, the game process number is set to "0" and saved in the normal game process number area.

Further, if the game processing number is "3" at step A7607, the game control device 100 continues the processing during normal game winning, or sets information necessary for performing normal electric remaining ball processing. Processing during drawing is executed (A7611). For example, in the normal per game process, after setting for opening the normal variation winning device 37 for a predetermined number of times, "4" is set as the game process number to shift to the normal electric remaining ball process. Save in normal game processing number area.

In addition, when the game processing number is "4" at step A7607, the game control device 100 executes normal electric remaining ball processing for setting information necessary for performing normal per pattern end processing (A7612 ). For example, in the normal electric remaining ball processing, in order to shift to the end processing for the normal game, set "5" as the game processing number and save it in the normal game processing number area, and the normal game ending time Save in the processing timer area.

In addition, when the game processing number is "5" at step A7607, the game control device 100 executes normal pattern per end processing for setting information necessary for performing normal pattern normal processing (A7608). (A7613). For example, in the end processing for the general pattern, in order to shift to the normal processing for the general pattern, "0" is set as the game processing number and saved in the general pattern game processing number area.

After that, the game control device 100 prepares a normal pattern fluctuation control table for controlling the normal pattern fluctuation by the normal pattern display device 53 (A7614). After that, a symbol variation control process relating to control of variation of the normal symbol by the normal symbol display 53 is executed (A7615), and the normal symbol game process is terminated.

On the other hand, the game control device 100, when the value of the normal game processing timer is not 0 (A7604
result is "N"), that is, if the time has not expired, the processing from step A7614 onwards is executed.

[Usually normal processing]
Next, the details of the general-purpose normal processing (A7608) in the general-purpose processing will be described.
FIG. 22 is a flow chart showing the procedure of the general/universal figure normal processing.

The game control device 100 first determines whether or not the normal pattern reservation number is 0 (A7901).
. When the number of general patterns pending is 0 (the result of A7901 is "Y"), the general pattern normal processing transition setting process 1 is executed (A7923), and the general pattern normal processing is terminated. Normal figure normal process transition setting process 1
Then, in order to shift to the normal game process, the game process number is set to "0" and saved in the normal game process number area.

In addition, the game control device 100, when the number of normal pattern reservations is not 0 (the result of A7901 is "
N"), load the hit random number from the RWM hit random number storage area (for the reserved number 1),
Load the hit pattern random number from the general pattern random number storage area (for the number of reservations 1) (A7902)
. And, the random number storage area per normal pattern (for the number of reservations 1) and the random number storage area per normal pattern (for the number of reservations 1
) is cleared to 0 (A7903). In addition, whether or not the probability of a hit result in the normal pattern fluctuation display game is higher than normal (in a high probability state), that is, the time saving state (
(A7904). In addition, the probability per normal pattern in the high probability is 250/251, and the probability per normal pattern in the low probability is 0/251.

If the game control device 100 is not in the normal pattern high probability (the result of A7904 is "N"), it sets the low probability lower limit judgment value (here, 251) which is the lower limit judgment value in the normal pattern low probability (A7905
), if it is in the normal pattern high probability (the result of A7904 is "Y"), set the high probability lower limit judgment value (here 1) which is the lower limit judgment value in the normal pattern high probability (A7906), step A7907 to process.

The game control device 100 determines whether or not the hit random number is equal to or greater than the upper limit determination value (here, 251) (A7907). It should be noted that the upper limit judgment value here is common during normal pattern high probability and during normal pattern low probability. If the hit random number is greater than or equal to the upper limit judgment value (the result of A7907 is "Y"), that is,
If not, the process proceeds to step A7909. If the winning random number is less than the upper limit judgment value (the result of A7907 is "N"), it is determined whether the winning random number is less than the lower limit judgment value (A7908).

The game control device 100 hits when the random number is less than the lower limit judgment value (the result of A7908 is "
Y"), that is, in the case of a miss, save the miss information in the hit flag area (A7909)
. Furthermore, the losing stop pattern number is set as the normal stop symbol number (A7910), the losing pattern information is saved in the normal stop symbol information area (A7911), and the process proceeds to step A7915.

The game control device 100, if the hit random number is not less than the lower limit judgment value (the result of A7908 is "
N"), that is, in the case of a hit, the win information is saved in the hit flag area (A7912), the hit stop design number corresponding to the loaded hit design random number is set (A7913), and the hit corresponding to the hit stop design number is set. The stop symbol information is saved in the normal pattern stop symbol information area (A7914), and the process proceeds to step A7915. It should be noted that there may be several types of hit stop symbols.

Next, the game control device 100 saves the stop symbol number in the normal pattern stop symbol area (A791
5) Save the stop pattern number in the test signal output data area (A7916). Next, the general pattern command corresponding to the information related to the general pattern variation display game (especially the hit/loss information of the general pattern variation display game) is prepared as a production command (A7917), and the production command setting process is executed. (A7918). Then, shift the random number storage area per normal pattern (A7919),
After clearing the free space after the shift to 0 (A7920), update the number of normal map reservations by -1 (A7
921).

That is, with the execution of the normal pattern fluctuation display game related to the oldest normal pattern reservation number 1, the positions of the normal pattern reservation numbers 2 to 4 that are reserved after the normal pattern reservation number 1 are advanced one by one.
By this process, the values for the general pattern holding number 2 to the general pattern holding number 4 in the general pattern random number storage area are moved from the general pattern holding number 1 to the general pattern holding number 3 in the general pattern random number storage area. It will be done. Then, the value for the normal pattern reservation number 4 in the normal pattern random number storage area is cleared, and the normal pattern reservation number is decremented by 1.

Next, the game control device 100 executes the process transition setting process during normal figure fluctuation (A7922),
Terminate normal normal processing. In the normal pattern fluctuation process transition setting process, in order to shift to the normal pattern fluctuation process, "1" is set as the game processing number and saved in the general pattern game processing number area, and the normal pattern fluctuation time is set. Save in the game processing timer area.

[Control of production control device]
Below, the control (process) which the production|presentation control apparatus 300 performs by the program for production|presentation control is demonstrated.

[Main processing (production control device)]
First, the details of the main process executed by the effect control device 300 will be described. Figure 23
2 is a flowchart showing a procedure of main processing (main program) executed by the effect control device 300. FIG. The main processing is executed by the main control microcomputer 311 (production microcomputer) when the gaming machine 10 is powered on. In addition, in the flowchart of the processing executed by the effect control device 300, the code (number) of the step is expressed as "B****".

When the execution of the main process is started, the effect control device 300 first prohibits an interrupt (
B0001). Next, the CPU 311 and VDP 312 are initialized (B0002, B
0003), and allow interrupts (B0004). When the interruption is permitted, the game control device 1
00, it becomes possible to execute the command reception interrupt process for receiving the command sent from 00.

Next, the effect control device 300 permits generation of display data to be displayed on the display device 41 or the like (B0005), and sets a random number seed used for random number generation (B0006). Then, the initial value at power-on is saved in the area to be initialized (B0007).

Subsequently, the effect control device 300 clears the WDT (watchdog timer) (B0
008). The WDT is activated by the CPU initial setting (B0002) described above, and the CPU 311
to see if it's working properly. If the WDT is not cleared after a certain period, the WDT times out and the CPU 311 is reset.

After that, the effect control device 300 executes RTC read processing for reading time information from the RTC (real time clock) 338 (B0009).

In the RTC reading process, time information may be read from the RTC 338 at predetermined intervals (for example, every two hours), and it is not necessary to read time information each time the process proceeds to step B0009. When power is turned on to the effect control device 300 (that is, power is turned on to the gaming machine 10), the RTC reading process may be executed only once (by changing the position of the RTC reading process, for example, steps B0003 and B0004 may be executed between). Effect control device 300 sets a time timer (clock means) for measuring time in the timer area in the RAM,
RT only once when time information is read from RTC 338 at a predetermined cycle or when the power is turned on
When the time information is read from the C338, the time timer (clocking means) may be adjusted so as to match the time of the RTC338. And the production|presentation control apparatus 300 may perform various processes using the timer for time. By doing so, the number of times of processing for reading the time from the RTC 338 can be reduced, and the load on the CPU 311 is reduced.

Next, the effect control device 300 detects the operation signal of the effect button 25 by the player (signal of the effect button switch 25a or the touch panel 25b), or changes the effect content (setting) according to the detected signal. A production button input process is executed (B0010). continue,
A hall/player setting mode process for accepting operations such as changing the brightness of LEDs and liquid crystals and sound volume by the person in charge of the game hall (game parlor) or the player is executed (B0011). In the hole/player setting mode process, the player can customize the effect according to the effect points described later.

Next, the effect control device 300 executes effect point control processing for adding and clearing effect points (B0012). In the production point control process, production points are added when the production or operation to which the production points are to be added is executed. For example, information including performance point information is displayed on the display device 41 as a QR code (registered trademark). For example, the effect control device 300 can display the QR code (registered trademark) on the display device 41 in the hall/player setting mode process.

Next, the effect control device 300 executes random number update processing for updating the random number such as the effect random number (B0013), analyzes the received command received from the game control device 100, and executes the corresponding received command check processing. (B0014). Details of the received command check process will be described later with reference to FIG.

Subsequently, the effect control device 300 executes customer waiting demonstration editing processing for editing and controlling the content of the customer waiting demonstration displayed on the display device 41 (B0015), and changes the power saving state of the gaming machine 10 waiting for customers. The power saving control process to be controlled is executed (B0016).

Next, the production control device 300 updates various data in accordance with the content to be displayed on the display device (display means) such as the display device 41, or sets the drawing to be displayed on the display device 41 in the display frame buffer. effect display edit processing is executed (B0017). The drawing data set at this time can update the image of the display device 41 without any problem if the drawing data can be completed by the VDP 312 within 1/30 second (approximately 33.3 msec) of the frame period. Then, the drawing preparation for the display frame buffer is completed, and drawing command preparation end setting is executed (B0018).

Subsequently, the effect control device 300 determines whether or not it is the frame switching timing (B
0019). If it is not the frame switching timing (the result of B0019 is "N"), the processing of B0019 is repeated until the frame switching timing comes. Instruct screen drawing (B0
020). Since the frame period of this embodiment is 1/30 second, for example, when periodic V blanking (image update) is performed twice every 1/60 second (1/2 of the frame period), the frame is switched. . Note that the image may not be updated every 1/60th of a second, and the interval may be increased.

In addition, the effect control device 300 executes sound control processing for controlling the sound output from the speaker 19 (B0021).

In addition, the effect control device 300 executes decoration control processing for controlling decoration devices (the board decoration device 46 and the frame decoration device 18) made up of LEDs and the like (B0022). In the decoration control process, for example, brightness control (light emission control) of a decoration device such as an LED is executed.

Furthermore, the effect control device 300 executes movable body control processing for controlling the effect device (board effect device 44) such as an electric accessory driven by a motor and a solenoid (B0023). In the movable body control process, for example, a performance for driving a motor is set.

And the production|presentation control apparatus 300 returns to the process of B0008, after finishing the process of above-mentioned B0023. Thereafter, the processing from B0008 to B0023 is repeated.

[Receive command check processing]
Next, details of the received command check process (B0014) in the above-described main process (FIG. 23) will be described with reference to FIG. FIG. 24 is a flow chart showing the procedure of the received command check process executed by the effect control device 300. As shown in FIG.

The effect control device 300 first loads the value of the command reception counter in the command reception counter area of the RAM as the command reception number in order to check the number of commands received from the game control device 100 (B1101). Then, it is determined whether or not the number of received commands is 0 (B1102). If the number of received commands is 0, that is, if there is no command received from the game control device 100 (the result of B1102 is "N"), there is no command to be analyzed, so the received command check process is terminated.

On the other hand, the effect control device 300, if the command reception number is not 0, that is, if the command is received from the game control device 100 (the result of B1102 is "Y"), the command reception counter of the command reception counter area After subtracting the value for the number of commands received (B1103
), and copy the contents of the receive command buffer in the RAM to the command area for analysis (B11
04). Here, since the received command buffer is a ring buffer, there is no problem even if the number of received commands is subtracted before copying the contents in the buffer to the command area. Also, even if a new command is received during copying, the data will not be overwritten.

Then, the effect control device 300 updates the command reading index by +1 (adds only 1) within the range of 0 to 31 (B1105). The received command buffer holds 32 received commands.
It is configured to store up to Received commands are stored in the received command buffer in the order of command read indexes 0 to 31. Here, the received commands are read in order of index and copied to the command area for analysis. At the timing when copying to the command area for analysis is completed, the storage area of the received command buffer corresponding to the read command read index is cleared.

The effect control device 300 determines whether or not the copy of the commands for the number of received commands loaded in the process of step B1101 is completed (B1106), and if the copy is not completed (the result of B1106 is "N ”), and the processing from steps B1104 to B1106 is repeated.

When the command transmitted from the game control device 100 is received by the performance control device 300, the contents of the received command are stored in the received command buffer and at the same time the command reception counter value of the command reception counter area is added and updated. Although 32 commands can be stored in the received command buffer, the received commands are analyzed separately in a command area for analysis. Then, when the content of the received command is copied to the command area for analysis, the received command buffer and the command reception counter value are cleared. In this way, it is possible to prepare for receiving a large amount of commands by constantly securing an empty area in the received command buffer without performing direct analysis.

Subsequently, when the copy is completed, the effect control device 300 (the result of B1106 is "Y
”), loads the contents of the received command in the command area for analysis (B1107), and executes received command analysis processing for analyzing the contents (B1108). Details of the received command analysis process will be described later with reference to FIG. Also, the address of the command area for analysis is updated (B1109). After that, it is determined whether or not the analysis of the commands corresponding to the number of received commands loaded in the processing of step B1101 has been completed (B1110). The processing from B1107 to B1110 is repeated. When the analysis is completed (the result of B1110 is "Y"), the received command check process is terminated.

[Receive command analysis processing]
Next, details of the received command analysis processing (B1108) in the received command check processing (FIG. 24) will be described with reference to FIG. FIG. 25 shows the performance control device 30
10 is a flow chart showing the procedure of received command analysis processing executed by .0.

The effect control device 300 first separates the upper byte of the received command as a MODE section and the lower byte as an ACTION section (ACT section) (B1201). Commands transmitted from the game control device 100 to the effect control device 300, MODE section (MODE command) and A
It consists of a CTION section (ACTION command), and is normally transmitted continuously from a MODE section indicating the type of command. Therefore, the upper and lower order of the received command are M
It consists of an ODE section and an ACTION section in that order.

Next, the effect control device 300 determines whether or not the MODE section is within the normal range (B12
02). That is, it is determined whether or not the MODE portion indicating the type of command is a value that can be taken (a value assigned as a command specification indicating the type). Then, if the MODE part is within the normal range (the result of B1202 is "Y"), it is similarly determined whether or not the ACTION part is within the normal range (B1203). That is, it is determined whether or not it is a value (a value assigned as a command specification indicating the content) that can be taken by the ACTION section indicating the content of the command (specific effect instruction, etc.). Then, when the ACTION part is within the normal range (B1203
(B1204). That is, it is determined whether or not the value of the ACTION section is a value that can be taken by the type of command specified by the MODE section. Then, if the combination is correct (the result of B1204 is "Y"), the command processing corresponding to the command system is executed in the processing after B1205.

The effect control device 300 first determines whether or not the value of the MODE portion is within the range of the variation command (B1205). In addition, the variation system command is a command for commanding a variation pattern of a decorative special design, for example, there is a variation command (A3407). If the MODE part indicates a variable command (the result in B1205 is "Y"), the variable command process is executed (B1206), and the received command analysis process ends.

Effect control device 300, when the MODE section does not represent a variable command (B12
The result of 05 is "N"), then it is determined whether or not the MODE part is within the range of the jackpot command (
B1207). The jackpot commands are commands for instructing operations related to the performance during the jackpot (display of a fanfare screen, round screen, etc.). A round command (A2611) for commanding an interval screen, an interval command (A2612) for commanding an interval screen, an ending command (A2612) for commanding an ending screen
A2612), etc. Then, when the MODE part indicates a jackpot command (B1
The result of 207 is "Y"), the big hit system command processing is executed (B1208), and the received command analysis processing ends.

Effect control device 300, when the MODE section does not represent a big hit system command (B1
The result of 207 is "N"), then it is determined whether or not the MODE part is within the range of the pattern-based command (
B1209). The symbol system commands include, for example, decoration special symbol commands (A3403, A3503) corresponding to the stop symbol pattern. Then, if the MODE part indicates a pattern-based command (the result of B1209 is "Y"), the pattern-based command process is executed (B1210
), and terminates the received command analysis process.

Effect control device 300, when the MODE section does not represent the pattern system command (B12
09 result is "N"), then it is determined whether or not the MODE part is within the range of single-shot commands (B
1211). If the MODE part indicates a single-shot command (the result of B1211 is "Y"), single-shot command processing is executed (B1212), and the received command analysis processing ends.

If the MODE part does not represent a single-shot command, the effect control device 300 (B12
11 result is "N"), then it is determined whether or not the MODE part is within the range of the look-ahead symbol system command (B1213). The look-ahead symbol system command includes, for example, a look-ahead stop symbol command (A2
913). Then, when the MODE part indicates a look-ahead symbol command (B121
The result of 3 is "Y"), the look-ahead pattern-based command processing is executed (B1214), and the received command analysis processing ends.

Effect control device 300, when the MODE section does not represent the look-ahead symbol system command (
The result of B1213 is "N"), then it is determined whether or not the MODE part is within the range of the prefetch variation command (B1215). A look-ahead variation command includes, for example, a look-ahead variation pattern command (A2913). If the MODE part indicates a prefetch variation command (result of B1215 is "Y"), prefetch variation command processing is executed (B1216), and the received command analysis processing is terminated.

On the other hand, the production control device 300, if the MODE part does not represent a prefetch variation command (the result of B1215 is "N"), may have received an unexpected command (for example, a command used only during the test mode). Therefore, the received command analysis process is terminated. Also, if the MODE part is out of the normal range (the result of B1202 is "N"), if the ACTION part is out of the normal range (the result of B1203 is "N"), or the AC for the MODE part
Even if the TION part is not a correct combination (the result of B1204 is "N"), the received command analysis process is terminated.

[Single-shot command processing]
Next, with reference to FIG. 26, details of the one-shot command processing (B1212) in the received command analysis processing (FIG. 25) described above will be described. FIG. 26 is a flow chart showing the procedure of single command processing executed by the effect control device 300. As shown in FIG.

The effect control device 300 first determines whether or not the MODE section represents a model designation command indicating the type of gaming machine (B1301). Then, if the MODE part indicates a model designation command (the result of B1301 is "Y"), a model setting process for setting the type of gaming machine is executed (B
1302), the one-shot command processing ends.

If the MODE part does not represent the model designation command, the effect control device 300 (B1
If the result of 301 is "N"), then it is determined whether or not the MODE part indicates a RAM initialization command (B1303). And if the MODE part represents a command for RAM initialization (
If the result of B1303 is "Y"), RAM initialization setting processing for notifying RAM initialization is executed (B1304), and the one-shot command processing ends.

Effect control device 300, when the MODE part does not represent the command of RAM initialization (the result of B1303 is "N"), then determines whether the MODE part represents a power failure recovery command (B1305 ). Then, when the MODE part indicates a power failure recovery command (B13
05 result is "Y"), the power failure restoration setting process is executed (B1306), and the one-shot system command process ends.

If the MODE part does not represent the power failure recovery command, the effect control device 300 (B1
If the result of 305 is "N"), then it is determined whether or not the MODE part indicates a customer waiting demo command (B1307). Then, if the MODE part indicates a customer waiting demo command (B130
7 is "Y"), the customer waiting demonstration setting process is executed (B1308), and the single command process is terminated.

If the MODE part does not indicate the customer waiting demo command, the effect control device 300 (B
The result of 1307 is "N"), then it is determined whether the MODE part represents the decoration special figure 1 reserved number command (B1309). Then, if the MODE part represents the decoration special figure 1 reservation number command (the result of B1309 is "Y"), execute the special figure 1 reservation information setting process (B1310),
Ends single-shot command processing.

Effect control device 300, if the MODE part does not represent the decoration special figure 1 reservation number command (the result of B1309 is "N"), then whether the MODE part represents the decoration special figure 2 reservation number command (B1311). Then, when the MODE part represents the decoration special figure 2 reservation number command (the result of B1311 is "Y"), the special figure 2 reservation information setting process is executed (B131
2) End the one-shot command processing.

Effect control device 300, when the MODE part does not represent the decoration special figure 2 reservation number command (the result of B1311 is "N"), then determines whether the MODE part represents the probability information command (B1313). Then, when the MODE part represents a probability information command (B1
The result of 313 is "Y"), the probability information setting process is executed (B1314), and the single command process ends.

If the MODE part does not represent the probability information command, the effect control device 300 (B1
If the result of 313 is "N"), then it is determined whether or not the MODE part indicates an error/illegal/call command (B1315). Error/illegal system/call commands include, for example, fraud occurrence command, fraud cancellation command, state off command, state on command, magnet fraud notification command (magnetic error command), board radio fraud notification command (board radio wave error command ), there is a call command. In addition, the game control device 100, when the ON signal from the call button switch 67 is input, the external device (
In particular, a signal to the hall computer) may be set, and a call command to the production control device 300 may be generated. As a fraudulent command, the starting port 1 switch 36a, the starting port 2
There is a command indicating the occurrence of fraudulent winning based on the signals of the switch 37a, the winning opening switch 35a, and the big winning opening switch 39a. The fraud cancellation command is a command indicating the cancellation of fraud. In the winning slot switch/state monitoring process (A1310), occurrence of fraudulent prize winning and fraud cancellation are monitored, and a fraud occurrence command and fraud cancellation command can be transmitted. As a state ON command, the generation of a signal from the glass frame open detection switch 63 (glass frame open error) and the generation of a signal from the front frame open detection switch 64 (body frame open detection switch) (body frame open error, front frame There is a command that indicates an open error). A state off command also indicates that no error has occurred. A state ON command and a state OFF command may be sent in the winning hole switch/state monitoring process (A1310). When there is detection (magnet fraud) from the magnetic sensor switch 61, a magnet fraud notification command is transmitted in magnet fraud monitoring processing (A1315). When there is a detection (unauthorized radio wave) from the radio sensor 62, radio unauthorized monitoring processing (A1
316), a radio wave irregularity notification command is transmitted.

If the MODE part indicates an error/illegal/call command (B1315
result is "Y"), error / fraud /
Call setting processing is executed (B1316), and single-shot command processing ends. In the error/illegal/call setting process, an error/illegal/call notification sound is generated, and an error/illegal/call
The display or undisplay corresponding to the call command is set to be executed on the display device 41 .

Effect control device 300, if the MODE part does not represent an error / fraudulent system / call command (the result of B1315 is "N"), then the MODE part is a command for effect mode switching (special figure display (B1317). and MO
When the DE part indicates a command for switching the effect mode (the result of B1317 is "Y"), the effect mode switching setting process is executed (B1318), and the one-shot system command process is terminated.

Effect control device 300, when the MODE part does not represent the command for effect mode switching (the result of B1317 is "N"), then whether the MODE part represents the number of out balls command indicating the number of out balls It is determined whether or not (B1319). Then, if the MODE part indicates the number of out-balls command (the result of B1319 is "Y"), the processing when the number of out-balls is received is executed (B1
320), ending the one-shot command processing.

Effect control device 300, when the MODE section does not represent the out ball number command (B
If the result of 1319 is "N"), then it is determined whether or not the MODE part indicates a count command (large winning opening count command) (B1321). Then, when the MODE part indicates a command for counting the big winning opening switch (the result of B1321 is "Y"), the count information setting process is executed (B1322), and the one-shot system command process ends.

If the MODE section does not indicate a count command, the effect control device 300 (B
If the result of 1321 is "N"), it is determined whether or not the MODE part represents a setting value information command (probability setting value information command) (B1323). The setting value information command is executed in step A of FIG. 6B.
It is included in the command 1046 for recovery from power failure and the command for RAM initialization transmitted in the process of step A1044. Then, when the MODE part represents a setting value information command (
The result of B1323 is "Y"), the set value reception processing is executed (B1324), and the one-shot command processing ends. In the setting value reception processing, the setting value (probability setting value) is stored in a storage unit such as a RAM, and necessary processing is executed.

If the MODE section does not represent the set value information command, the effect control device 300 (B
If the result of 1323 is "N"), it is determined whether or not the MODE part indicates a setting change command (B1325). As a setting change command, for example, a probability setting change command (A
1030). Then, when the MODE part indicates a setting change command (B13
25 is "Y"), the setting change information setting process is executed (B1326), and the one-shot command process ends. In the setting change system information setting process, the contents of the setting change system command are stored, and the process corresponding to the command is executed. For example, when a command indicating that the probability setting is being changed is received, in the setting change information setting process, a setting change indication is displayed on the display device 41 to inform the player that the setting is being changed.

If the MODE section does not represent a setting change command, the effect control device 300 (
If the result of B1325 is "N"), it is determined whether or not the MODE part indicates a setting confirmation type command (B1327). As a setting confirmation command, for example, a command during probability setting confirmation (
A1033). When the MODE part indicates a setting confirmation command (B1
The result of 327 is "Y"), the setting confirmation system information setting process is executed (B1328), and the one-shot system command process is terminated. In the setting confirmation system information setting process, the contents of the setting confirmation system command are stored, and the process corresponding to the command is executed. For example, when the probability setting confirming command is received, in the setting confirmation system information setting process, a setting confirming display is displayed on the display device 41 to notify the player that the setting is being confirmed.

Next, it is determined whether or not the MODE portion indicates a symbol stop command (B1329). It should be noted that the symbol stop command, for example, there is a special figure 1 symbol stop command (decoration special figure 1 stop command) and a special figure 2 symbol stop command (decoration special figure 2 stop command). and MODE
If the part represents a command to stop the pattern (the result of B1329 is "Y"), the effect control device 3
00 then determines whether or not the command in the MODE section is a normal command (B13
30).

If the command in the MODE section is a normal command (result of B1330 is "Y")
, The effect control device 300 sets the stop mode of the corresponding special figure (B1331), sets the game state flag to the normal state after all symbols have stopped (B1332), and ends the single-shot command processing. In the process of B1332, as an example, the game state flag is set to a normal state, but depending on the timing at which this process is executed, the game state flag may be changed to a "fluctuation", "big hit", or "small hit" flag. is set.

On the other hand, if the MODE section does not indicate a symbol stop command (the result of B1329 is "N
”), or if the command in the MODE part is not normal (result of B1330 is “N”)
, the effect control device 300 ends the single-shot command processing.

In addition, the effect control device 300 may execute processing for commands not described in FIG. 26 . For example, the effect control device 300 receives a starting winning command indicating that the starting winning port 36 and/or the normal variable winning device 37 has won from the game control device 100, and from the speaker in response to the starting winning command A starting winning sound may be generated to inform the player of the starting winning.

[Prefetching pattern command processing]
Next, referring to FIG. 27, the details of the prefetch symbol system command process (B1214) in the received command analysis process (FIG. 25) described above will be described. FIG. 27 shows the production control device 30
0 is a flow chart showing the procedure of a look-ahead symbol system command process executed by 0. FIG.

Production control device 300, first, whether or not the latest pending information is the information of special figure 1 suspension (special figure 1 start memory), for example, the decoration special figure reservation number command received at the latest is the number of decoration special figure 1 reservation It is determined whether or not it is a command (B1601). If the latest pending information is the information of the special figure 1 pending (the result of B1601 is "Y"), the look-ahead pattern system command (look-ahead stop design command) to the special figure 1 look-ahead pattern command area corresponding to the number of special figure 1 reservations Save (B1602).

Production control device 300, if the latest pending information is not the information of the special figure 1 pending (the result of B1601 is "N"), that is, the decoration special figure pending number command received at the latest is the decorative special figure 2 pending number command In the case, save the look-ahead symbol system command (look-ahead stop symbol command) in the special figure 2 look-ahead symbol command area corresponding to the special figure 2 reservation number (B1603).

After steps B1602 and B1603, the effect control device 300 sets a prefetch variation command reception wait flag indicating that the prefetch variation command reception wait flag is set (B160
4). This is because the look-ahead symbol system command and the look-ahead variation system command are set, and therefore the game control device 100 transmits the look-ahead variation system command following the look-ahead design system command. After that, the look-ahead symbol system command processing is terminated.

[Prefetching variation command processing]
Next, referring to FIG. 28, the details of the look-ahead variation-related command processing (B1216) in the received command analysis processing (FIG. 25) described above will be described. FIG. 28 shows the production control device 30
10 is a flow chart showing the procedure of prefetch variation command processing executed by .0.

Production control device 300, first, look-ahead variation system command (look-ahead variation pattern command)
(B1701). If the above-mentioned prefetch variation-related command reception waiting flag (B1604) is set, it can be determined that reception of a prefetch variation-related command is waiting. If the prefetch variation command is not waiting to be received (the result of B1701 is "N"), the prefetch variation command processing is terminated. If the prefetch variation command is waiting for reception (the result in B1701 is "Y"), the prefetch variation command reception wait flag is cleared (B1702).

Next, the effect control device 300 (sub board) is the design of the latest pending information (special figure 1 or special figure 2)
(B1703), and acquire the sub-internal prefetch variation command MODE part corresponding to the prefetch variation command MODE part (B1703).
B1704). Next, a look-ahead variation ACT conversion table is set (B1705), and sub-internal look-ahead variation command ACT corresponding to the ACTION part (ACT part) of the look-ahead variation command
part is obtained (B1706).

Next, the effect control device 300 determines whether or not both the converted MODE section and ACT section (that is, sub-inside look-ahead variation command MODE section and ACT section) are other than 0 (B1707).
. If the command is normal (effective), it is converted to a value other than 0. MODE part after conversion, A
If the CT part is both other than 0 (the result of B1707 is "Y"), the MODE part after conversion and the A
The command after conversion composed of the CT part is saved in the latest pending information and the prefetching variation command area (special figure 1 prefetching variation command area or special figure 2 prefetching variation command area) corresponding to the number of reservations (B1708). Then, the read-ahead command consistency check process is executed (B170
9) Determine whether the combination of the MODE part and the ACT part after conversion is normal (B1710
).

It should be noted that the time of the first half variation corresponding to the MODE part changes depending on the number of suspensions when the variation display game is started. When the pending change display game is started, if there is no other pending, the first half variation is longer, and if there is a new pending and the number of pending is large, the first half is shorter. Therefore, even if the time value of the first half variation changes, the MODE part of the received prefetch variation system command is converted into the sub internal prefetch variation command MODE part so that the internal command of the performance control device 300 can be handled in the same way.

Also, since the type of reach is not related to the number of reservations, the second half variation corresponding to the intra-sub prefetch variation command ACT section does not depend on the number of reservations. However, since there are different types of leeches of the same system,
If the ACT part (the value of the second half variation) of the look-ahead variation command is not converted, the effect control device 30
If 0 is used as it is, the number increases and the check becomes difficult. For example, even in normal reach,
There are types such as normal reach-1 stop failure and normal reach +1 stop failure.
Therefore, by converting the ACT portion indicating reach of the same system into the same intra-sub prefetch variation command ACT portion, the number is reduced and the load of check processing such as prefetch command matching check processing is reduced.

Next, the effect control device 300, if at least one of the converted MODE section and ACT section (that is, the sub-inside look-ahead variation command MODE section and ACT section) is 0 (the result of B1707 is "N"), or , if the combination of the MODE part and the ACT part after conversion is not normal (B171
If the result of 0 is "N"), it is determined that there is an abnormality in the converted command, and the read-ahead variation command processing is terminated.

If the combination of the MODE section and the ACT section after conversion is normal, the effect control device 300 (B
The result of 1710 is "Y"), the pending information to be prefetched (latest pending information) is loaded from the prefetching variation command area (B1711), and the prefetching lottery process for the latest pending prefetching effect is executed (B1712). As the look-ahead effect, for example, there are a continuous notice effect (including chance look-ahead effect), a look-ahead zone effect, and a pending change notice. Subsequently, it is determined whether or not the latest hold look-ahead effect (hold change notice, etc.) is generated (B1713). When the latest pending look-ahead effect occurs (the result of B1713 is "Y"), point information corresponding to the selected look-ahead effect is set (B1714).

Next, the effect control device 300 determines whether or not the generated look-ahead effect (suspension change notice, etc.) is an effect that starts immediately (B1715). If the look-ahead effect to be generated is an effect that starts immediately (the result of B1715 is "Y"), the display corresponding to the selected look-ahead effect is set (B1716). If the look-ahead effect that occurs is not the effect that starts immediately (B1715
result is "N"), the display corresponding to the look-ahead effect at the time of hold shift (when the hold display is moved, when the number of holds is decreased) is set and saved (B1717). Then, the read-ahead variation command processing ends.

On the other hand, the effect control device 300, if the latest pending prefetch effect does not occur (the result of B1713 is "N"), or if the generated prefetch effect is not an immediate start effect (B171
If the result of 5 is "N"), leave it as it is. Terminates look-ahead variation command processing.

[Processing of pattern-based commands]
Next, with reference to FIG. 29, details of the pattern-based command processing (B1210) in the received command analysis processing (FIG. 25) described above will be described. FIG. 29 is a flow chart showing the procedure of symbol-based command processing executed by the effect control device 300. As shown in FIG.

The effect control device 300 receives the pattern system command (decoration special figure 1 command or decoration special figure 2
command) to set the special figure type corresponding to the MODE part (B1801). The special figure classification is special figure 1 or special figure 2. Then, the MODE part and the ACTION part (ACT
part), and save it in a predetermined area such as RAM (B180
2). Here, in the special figure 1 and the special figure 2, since the distribution ratio of the design changes, the table is used for each MODE, and the design type is set. It should be noted that, in the present embodiment, the design type is a lost design, a 4R probability variation jackpot design (4R-A1, design 1), a 4R normal jackpot design (4R-A2
, Pattern 2), 8R variable jackpot pattern (8R-A1, pattern 3), 8R normal jackpot pattern (8R-
A2, pattern 4), 12R probability variation jackpot pattern (12R-A1, pattern 5), 12R normal jackpot pattern (12R-A2, pattern 6) and the like.

[Processing of variable commands]
Next, with reference to FIG. 30, details of the variable command processing (B1206) in the received command analysis processing (FIG. 25) described above will be described. FIG. 30 is a flow chart showing the procedure of the variable command process executed by the effect control device 300. As shown in FIG.

Effect control device 300, special figure type (special figure 1
Or special figure 2) determines whether it is undetermined (B1901). If the special figure type is undetermined (the result of B1901 is "Y"), end the variation system command processing. If the special figure type is not undetermined (the result of B1901 is "N"), check the combination of the received variation system command and symbol system command (B1902), whether the variation system command and symbol type are inconsistent is determined (B1903). Here, the inconsistency means a contradiction in effecting, for example, when a winning variation command is received but a jackpot symbol symbol command is received. When the fluctuation system command and the symbol type are inconsistent (the result of B1903 is "Y")
, to terminate the variable command processing.

Effect control device 300, when the variation system command and the symbol type are not inconsistent (the result of B1903 is "N"), determines the variation pattern type from the variation system command (variation command) (B1
904), a variable effect setting process for setting a variable effect that is a variable effect is executed (B19
05). It should be noted that there are multiple effects for the same variable command. Subsequently, the game state flag indicating the game state (P machine state) is set to be during special figure fluctuation (B1906), and if the number of read-ahead effects such as continuous effects is 0, it is updated by -1 (B1907).

[Variation effect setting process]
Next, with reference to FIG. 31, details of the variable effect setting process (B1905) in the variable command process (FIG. 30) described above will be described. FIG. 31 is a flow chart showing the procedure of the variable effect setting process executed by the effect control device 300. As shown in FIG.

The production control device 300 first determines whether or not the variation pattern type is reachless variation (variation that does not reach the reach state) (B2001). If the variation pattern type is no reach variation (the result of B2001 is "Y"), the number of production points, model code,
Set the first half notice distribution group address table corresponding to special figure type, production mode, setting information (setting value) (B2002), corresponding to the MODE part of the variation command (variation command) and the number of reservations of special figure type Acquire the address of the first half advance notice distribution group table (B2003
). In the case of non-reach fluctuation, the higher the number of reservations, the shorter the fluctuation time, so the address of the table corresponding to the number of reservations is obtained.

Effect control device 300, if the variation pattern type is not a change without reach (the result of B2001 is "N"), that is, if it is a change with reach, the number of points of the effect point, the model code, the special figure type, the effect mode, A first half advance notice distribution group address table corresponding to the symbol type and setting information (setting value) is set (B2004), and the variable command (variable command) M
The address of the first half advance notice allocation group table corresponding to the ODE part and the variation pattern type is acquired (B2005).

Effect control device 300, after steps B2003 and B2005, performs a lottery for notice that appears during the first half fluctuation (before reach) (B2006). Subsequently, the number of production points, the model code, the special type, the production mode, the pattern type, and the setting information (setting value) are set (B2007), and the ACT of the variation system command is set. The address of the second half advance notice distribution group table corresponding to the part is acquired (B2008), and a lottery for the advance notice that appears during the second half fluctuation (during reach) is performed (B2009). After that, the content of the variation effect corresponding to the MODE part and the ACT part of the variation command (variation command) is determined (B2010).
In addition, you can see the change time and main reach content from the change command.

Next, the effect control device 300 determines the content of the effect (notice effect) corresponding to the lottery result of the notice (B2011). After that, the stop pattern of the decorative special figure variable display game is determined according to the content of the variable performance such as the reach performance and the notice performance (B2012). Here, the decoration stop pattern is specifically determined, such as determining a loose pattern in the case of a missing pattern.

Next, the effect control device 300 performs display setting of variable effect (B2013), and performs display setting of notice effect (B2014). Subsequently, the display setting of the pending decrease corresponding to the special figure type is performed, for example, the display that the pending display corresponding to the decorative special figure that changes this time is reduced is set (B201
5). Subsequently, a sound number that determines the mode of presentation (sound output mode) by the sound of the speaker and a decoration number that determines the mode of presentation by the light emission of the decoration device are set (B2016). The decoration device (board decoration device 46, frame decoration device 18) has a plurality of decorative light emitting units (decoration LEDs, etc.), and emits light in a light emission mode (color of each LED, light emission timing, etc.) determined by the decoration number. .

Note that it is also possible to set the voice number and decoration number based on setting information (setting values) as well as the effect contents. In this way, the player can enjoy guessing the setting information (set value) of the gaming machine 10 from the light emission mode of the decoration device, that is, the light emission mode of the decorative light emitting unit (LED).

Next, the production control device 300 performs the display setting of the decoration special figure fluctuation corresponding to the special figure type (B
2017), in addition to the above-described first to third special symbols that fluctuate on the display device 41, the display setting of the fourth symbol variation relating to the fourth special symbol (fourth symbol, identification information) is performed (B2018). note that,
The fourth pattern variation is the lamp display unit 1 of the above-described lamp display device 80 provided other than the display device 41.
, 2 (LED), or may be executed on the display screen of the display device 41 .

[Processing of winning commands]
Next, with reference to FIG. 32, the details of the winning command processing (B1208) in the received command analysis processing (FIG. 25) described above will be described. FIG. 32 is a flow chart showing the procedure of the winning system command processing executed by the effect control device 300. As shown in FIG.

The effect control device 300 first determines whether or not the MODE part of the received hit system command indicates fanfare (B2101). If the MODE part of the win-related command indicates fanfare (the result of B2101 is "Y"), that is, if the win-related command is a big win fanfare command (or a small win fanfare command if there is a small win), fanfare effect is set. A fanfare effect setting process is executed (B2102).
The fanfare command includes information on the upper limit of the number of rounds for this big hit. Subsequently, the game state flag indicating the current game state (P machine state) of the game machine 10 is set to fanfare in progress (B2103), and the win system command processing is terminated. In addition, the round number upper limit value can also be obtained from the symbol type determined from the symbol system command (decorative special symbol command corresponding to the stop symbol pattern).

If the MODE part of the received hit-related command does not represent fanfare (the result of B2101 is "N"), the effect control device 300 determines whether the MODE part of the hit-related command represents a round ( B2104). If the MODE part represents a round (the result of B2104 is "Y"), that is, if the hit system command is a round command (or if there is a small hit, the open command during the small hit), the effect control device 300 performs a round effect. Setting processing is executed, the game state flag indicating the current game state (P machine state) of the gaming machine 10 is set to in-round (B2105, B2106), and the win-related command processing is terminated.

If the MODE part of the received hit-related command does not represent a round (the result of B2104 is "N"), the effect control device 300 determines whether the MODE part of the hit-related command represents an interval ( B2107). When the MODE part represents an interval (B2107
result is "Y"), that is, when the hit system command is the interval command, the effect control device 300 executes the interval effect setting process, and the game indicating the current game state (P machine state) of the game machine 10 The status flag is set to "interval" (B2108, B2109), and the winning system command processing is terminated. (In addition, when there is a small win and the big winning opening is opened only once with the small win, that is, when the small win is one round, there is no interval command.)

If the MODE part of the received hit command does not indicate an interval (B2107
result is "N"), the effect control device 300 determines whether or not the MODE part of the hit system command indicates the ending (B2110). When the MODE part indicates the ending (B21
10 result is "Y"), that is, when the hit system command is an ending command (or a small win end screen command if there is a small win), the effect control device 300 sets the ending effect for setting the ending effect. Execute the process, and the current gaming state of the gaming machine 10 (P
(B2111, B2112), and set the game state flag indicating the machine state to "ending" (B2111, B2112)
Terminates hit command processing.

If the MODE part of the received hit command does not indicate the ending (B2
If the result of 110 is "N"), the effect control device 300 ends the winning command process without executing any process.

[Lower plate unit]
A detailed configuration of the lower tray unit 29 will be described with reference to FIG. FIG. 33 shows a perspective view (a) of the lower tray unit 29 as viewed diagonally from the upper right and a perspective view (b) viewed from the diagonally upper left.

A lower tray unit 29 including the lower tray 23 and the like conforms in shape to the upper tray unit, and is arranged side by side in the vertical direction. The lower tray unit 29 is attached to the front frame 12 . The lower tray unit 29 includes a lower tray base 453 on the back side, and a left case portion 456, a central case portion 458, and a right case portion 460 connected to the lower tray base 453 from the front.

The lower tray unit 29 also has a call button 454 in front of the left case portion 456 for calling the staff of the game hall (game shop). Therefore, a player who is playing a game can easily press (operate) the call button 454 by reaching out toward the lower tray unit 29 while sitting. In addition, the call button 454 is covered with a case member that can transmit light, and the case member has characters such as "call" drawn thereon. Therefore, by visually recognizing the characters, the player can easily recognize that the call button 454 is a button (operation means) for calling the staff of the game arcade. An LED (light emitting diode) of the frame decoration device 18 is provided as a light emitting means on the call button 454, that is, below the case member of the call button 454 (not shown).

An ON signal (call signal) from the call button switch 67 provided in the call button 454 is input to the game control device 100 (FIG. 3), and is sent as external information from the external information terminal board 71 to the data lamp. A data lamp, which is a display device for game information and the like, emits light, and the information is also sent to an external device (especially a hall computer). In addition, the game control device 10
An ON signal (call signal) from the call button switch 67 input to 0 is converted into a call command (effect command) corresponding to the ON signal and transmitted to the effect control device 300 as well.

Effect control device 300, by receiving a call command (error / fraudulent system / call command) in the process of step B1315, to light the LED of the call button 454 (lighting or blinking), or cancel the light emission of the LED You can let In addition, production control device 300
can also display or cancel the display corresponding to the display screen of the display device 41 by receiving a call command.

A right decorative portion 466 for decorating the right front side of the lower tray unit 29 is provided in front of the central case portion 458 .
a is provided. In front of the lower plate 23, a left decoration portion 4 for decorating the left front side of the lower plate unit 29 is provided.
66b is provided.

The central case portion 458 has a vertical portion 458a extending substantially vertically and a horizontal portion 458b extending substantially horizontally. Between the vertical portion 458a of the central case portion 458 and the right case portion 460, the lower speaker 19b and the shaft portion 24a of the operating handle 24 are arranged.

The lower tray unit 29 is roughly divided into a flat portion 29a extending in the left-right direction and a flat portion 29a.
It consists of a right protrusion 29b that protrudes upward on the right side of a. Flat portion 29 a includes lower plate 23 , left case portion 456 , and lateral portion 458 b of central case portion 458 . Above the flat portion 29a, a bottom plate portion (not shown) of the upper tray unit 20 is arranged to face. Right protrusion 29
b is the vertical portion 458a of the central case portion 458, the right case portion 460, the lower speaker 19b,
and an operating handle 24 .

A first inlet 461 and a second inlet 465 for game balls are provided on the rear surface of the lower tray base 453 of the lower tray unit 29 . A foul ball (falling ball) that is launched from a ball launcher (not shown) but returns without reaching the game area 32 flows into the first entrance 461,
Game balls (prize balls) from the payout unit may flow in when the upper tray 21 is full. A game ball drawn from the upper tray 21 may flow into the second inlet 465 . The game ball is the first
It flows from the inlet 461 and the second inlet 465 through the passage 462 and into the lower tray 23 from the outlet 463 of the passage 462 . In addition, when the bottom plate 23 is full, game balls are stored in the passage 462 . The passageway 462 may partially pass through or under the left case portion 456 and the central case portion 458 to communicate with the first inlet 461 and the second inlet 465 . A cover 464 that is a transparent member that covers the passage 462 from above is provided at the upper end of the passage 462 . cover 4
64 is transparent, so that when the glass frame 15 is opened to the front frame 12, the passage 46
2 can be visually recognized.

A plate portion 455 forming the bottom and front portions of the lower plate 23 is arranged in front of the left case portion 456 and above the lower case portion 459 . The left case portion 456 has an integrally formed upper plate 456a and a front plate 456b. The front plate 456b (the back plate of the lower tray 23) of the left side case portion 456 is inclined so that the lower the lower tray 23, the deeper the game ball 456b. can be easily scraped out by hand.

The bottom of the lower plate 23 (that is, the bottom of the plate portion 455) has an annular opening 455a and the opening 4
Valleys 455b extending radially in four directions from 55a are provided. A game ball that has flowed into the lower tray 23 from the exit 463 of the passage 462 falls into the opening 455a through the valley 455b that is easy to pass through. The opening 455a is normally closed by the opening/closing member 457, but the opening/closing operation portion 23
The opening/closing member 457 is opened by the operation b. When the opening/closing member 457 is opened, the game ball is placed in the opening 4
It is discharged to the outside of the game machine 10 through 55a (ball extraction hole 23a).

[Modification of Game Control Device]
Next, a configuration of a modification of the game control device 100 (main substrate) will be described with reference to FIG. The game control device 100 may be configured as shown in FIG. FIG. 34 shows the gaming machine 1
It is a block diagram showing the configuration of a modification of the game control system of 0. In the explanation of the block diagram below, the contents overlapping with FIG. 3 will be omitted as appropriate.

In the configuration of the modified example of the game control device 100, as shown in FIG. It outputs on/off data for the segment line to which the anode terminal of the LED is connected according to the signal received.

Further, the fourth output port 136 of the output unit 130 outputs ON/OFF data of the digit line to which the cathode terminals of the LEDs of the collective display device 50 and the call button switch 67 are connected.

The second driver 138b then drives the segment line of the call button 454 together with the collective display device 50. FIG. Also, the third driver 138c drives the digit line of the call button 454 together with the collective display device 50. FIG.

Therefore, according to the configuration of the modification, the game control device 100 is the LE of the collective display device 50
As in D, the LED of the call button 454 can be made to emit light (light up or blink) according to the input from the call button switch 67 without going through the effect control device 300 .

By using the fourth output port 136 and the fifth output port 137, the external information signal corresponding to the detection signal from the call button switch 67 is output to the external information terminal board 71, and the LED of the call button 454 is turned on. /OFF data may be output. In addition, the second output port 134 may be used to output an opening/closing data signal for the general electric solenoid 37c, the big winning opening solenoid 39b, and the like, and may output ON/OFF data to the LED of the call button 454. In addition, when the call button 454 is pressed once (odd number of times), the LE of the call button 454 is
Output ON data to D, and call button 4 by pressing the call button 454 twice (an even number of times).
Off data may be output to the 54 LEDs.

Also, when a signal from the call button switch 67 is input to the second input port 123,
Data corresponding to the effect control device 300 is also transmitted as a call command (error/illegal system/call command). Therefore, the effect control device 300 can display a display corresponding to the display screen of the display device 41 when the call button 454 is pressed.

[Modified example of production control device]
A configuration of a modification of the effect control device 300 (sub board) will be described with reference to FIG.
FIG. 35 is a block diagram showing a configuration of a modification of the effect control system of the gaming machine 10. As shown in FIG. For example, the game control device 100 (see FIG. 3), when a signal from the call button switch 67 is input to the second input port 123, can transmit data corresponding to the effect control device 300 as a call command. The call command may also include on/off data for the call button 454 LED.

Then, when the effect control device 300 receives a call command from the game control device 100, the frame decoration LED control circuit 333 for driving and controlling the frame decoration device (for example, the frame decoration device 18, etc.) calls the LED of the button 454 on/off. A signal including data can be output.
Note that the LED of the call button 454 may be configured as part of the frame decoration device 18 .
The call command includes information for turning on the LED of the call button 454 by pressing the call button 454 once (odd number of times), and turning on the LED of the call button 454 by pressing the call button 454 twice (even number of times). Information to turn off the LED may be included.

Therefore, the frame decoration device 18 can control the light emission of the LED of the call button 454 together with the LED provided on the glass frame 15 .

In addition, the signal from the call button switch 67 may be directly input to the main control microcomputer 311 through the switch input circuit 336 of the production control device 300 together with the production accessory SW47 and the like. In this way, by sending the signal from the call button switch 67 to the effect control device 300, the effect control device 300, without going through the game control device 100, the call button 4
54 being operated can be directly detected, the responsiveness (responsiveness) to the operation of the call button 454 can be improved. Therefore, when the call button 454 is pressed, the LED of the call button 454 immediately emits light, preventing the player from misunderstanding that there is no response (reaction), and the call button 454 is continuously operated. can be suppressed.

[Example of screen transition diagram when the call button is operated]
FIG. 36 is an example of a screen transition diagram showing the display screens of the display device 41 in chronological order when the call button 454 is operated.

Incidentally, as shown in FIG. 36, a light-emitting member 180 capable of emitting light in synchronization with the LED of the call button 454 may be provided above the display screen of the display device 41 .

The light emitting member 180 is, for example, an LED formed in a ribbon shape and provided on or above the glass frame 15 . The player can easily see the light emitting member 180 when looking upwards at the glass frame 15 to see the data lamp. The data lamp is blocked by the member of the frame decoration device 18 provided above the glass frame 15, so that it may be difficult for the player who is playing (sitting) to directly see the data lamp.

Also, in FIG. 36, the light emitting state of the light emitting member 180 is indicated by hatching (slanted lines), and the non-light emitting state is indicated by no hatching. Note that the light emitting member 180 may be configured as part of the frame decoration device 18 .

FIG. 36A shows the display screen of the display device 41 when the fanfare effect 181 is executed as the effect during the big win. In FIG. 36A, the light emitting member 180 is in a non-light emitting state. Incidentally, the fanfare effect 181 is executed at the start of the big win (immediately after).

Here, when a round game is started in which the big winning opening is opened in a big win state (special game state), a predetermined number of prize balls are delivered from the payout device to the upper tray 21 each time a game ball enters the big winning opening. (
game balls) are ejected. The game balls accumulated in the upper tray 21 are discharged through a ball extraction hole (not shown) and the second entrance 4.
It is possible to move to the lower tray 23 by passing through 65, but when it is detected that the lower tray 23 has accumulated more than a predetermined amount of game balls (becomes full), an overflow switch signal is output to the payout control device 200. is output to the game control device 100 (see FIG. 3).

Then, for example, the player presses the call button 454 in order to take out in advance the game balls stored in the upper tray 21 and the lower tray 23 in preparation for the round game that is started after the fanfare effect (
operation), it becomes a staff call state for calling the staff (clerk, hall staff),
As shown in FIG. 36(B), a staff call display 345 is displayed on the display screen of the display device 41 .

FIG. 36(B) shows that when the player presses the call button 454, the attendant call display 34
It is a display screen of the display device 41 when 5 is displayed. Along with the display of the staff call display 345, the light emitting member 180 also emits light as shown in FIG. 36(B). In addition, the light emitting member 1
In conjunction with the light emission of 80, the LED of the call button 454 (not shown) can also emit light.

For the staff call display 345, for example, a character display 345 indicating that the staff is being called
a, and a time display 345b that counts down the time since the staff is being called.
is displayed. It should be noted that a gauge display may be performed in which the gauge within the rectangular frame changes briefly in accordance with the countdown of the time display 345b.

The character display 345a can display, for example, the characters "A staff member is being called."

Also, the time display 345b can display a countdown display from a predetermined time (for example, 30 seconds) to 0 seconds. It should be noted that the time display 345b may be a count-up display so that the time after calling the attendant increases from 0 seconds. in this way,
By changing the time of the time display 345b, it becomes easier for the player to recognize that the state in which the attendant is being called is maintained. The call state of the attendant may be canceled when the countdown display of the time display 345b becomes 0, that is, when a predetermined period of time (for example, 30 seconds) elapses. Also, the call state of the attendant may be maintained even after a predetermined period of time has elapsed.

In addition, a balloon or characters (for example, character display 345a or time display 345b) of the clerk call display 345 are flashed so that the player can more easily recognize that the state in which the clerk is being called is maintained. can be

The light-emitting member 180 may be composed of a ribbon-shaped member and a plurality of letter-shaped members (for example, “peka”) arranged around the ribbon-shaped member. You may make a member light-emitting. In addition, in accordance with the light emission of the character-shaped member, the upper speaker 1
For example, a sound (sound) corresponding to the letters indicated by the letter-shaped members "peka, peka, peka" may be emitted from the lower speaker 19b to emphasize that the light emitting member 180 is emitting light.

In addition, when the game control device 100 receives an overflow switch signal from the payout control device 200, the overflow switch is activated in order to display on the display screen of the display device 41 a display prompting the user to take out the game balls stored in the lower tray 23. A command corresponding to the signal is transmitted to the effect control device 300, but a signal (1-bit ON/OFF) corresponding to the overflow switch signal is also transmitted to the external information terminal board 71, including the external information signal (several bits in total). You may

In this way, when the game control device 100 transmits a signal corresponding to the overflow switch signal to the external information terminal board 71, when the lower tray 23 is filled with a predetermined amount or more of game balls, Even if the player does not press the call button 454, the attendant can be called automatically. Therefore, even a beginner player who is unfamiliar with the game can play the game with peace of mind, and the interest in the game can be improved.

After that, when the player presses the call button 454 again (second press), FIG.
), the staff call display 345 displayed on the display screen of the display device 41 is hidden.

FIG. 36C shows the display screen of the display device 41 when the player presses the call button 454 again (second press). When the staff call display 345 disappears, the light emitting member 180 also turns off. Also, although not shown, the LED of the call button 454 is also turned off. By pressing the call button 454 again (second pressing), the call state of the attendant can also be canceled (suspended).

Then, when the player presses the call button 454 again (third press). Figure 36 (D
), the clerk call display 345 is redisplayed on the display screen of the display device 41, and the light emitting member 180 is put into the light emitting state again. In addition, although not shown, the LED of the call button 454 can also be made to emit light.

FIG. 36D shows the display screen of the display device 41 when the player presses the call button 454 again (the third press). When the attendant call display 345 is redisplayed, the time display 3
The countdown display of 45b is resumed from the point in time when the call state of the attendant is canceled (interrupted) (for example, from 25 seconds). Therefore, the player can easily understand the total elapsed time from the start of the call. The time display 345b may be reset each time the staff call display 345 is redisplayed, and may be counted down from 30 seconds, for example. According to such a mode, the player can easily recognize that the call is being made again.

In this way, after the player presses the call button 454 for the second time, the staff call display 345 can be redisplayed by pressing the button again for the third time.

That is, the player presses the call button 454 an odd number of times (1, 3, 5, . . . 2n).
+1), a staff call state is entered, and a staff call display 345 is displayed. Also, the number of presses of the call button 454 by the player is an even number (2, 4, 6, . . . 2n).
, the call-staff-calling state is cancelled, and the display of the call-staff-calling display 345 is hidden (
It becomes a non-light emitting (lights out) state.

In this way, whenever the game control device 100 receives a signal from the call button switch 67, the effect control device 300 can switch the clerk call display 345 between display and non-display. Before the player presses the call button 454 (zero times), the call-staff state is cancelled, and the call-staff display 345 is not displayed as shown in FIG. 36(A).

Note that the game control device 100 can detect pressing of the call button 454 by the player not only during the fanfare effect but also during the game (game state). Therefore, the player presses the call button 454 in a normal game state, a specific game state (time saving state, etc.), or a special game state (during a round game at the time of a big hit, during an ending effect, etc.), to call an attendant. can be done. In addition, according to the call of the person in charge, the game control device 100
, can notify that it is in a staff call state via the effect control device 300, and can display a staff call display 345 on the display screen of the display device 41, for example.

[An example of a screen transition diagram when an explanation is displayed for the operation of the call button]
FIG. 37 is an example of a screen transition diagram showing, in chronological order, the display screen of the display device 41 when displaying an explanation about the operation of the call button 454. As shown in FIG. Note that explanations that duplicate the contents of FIG. 36 will be omitted as appropriate.

For example, when a fanfare effect 181 is executed as an effect during a big hit as shown in FIG.
4 can be displayed on the display screen of the display device 41 .

FIG. 37(A) is a display screen of the display device 41 when the fanfare effect 181 is executed at the start of the big win as a effect during the big win, and FIG. 37(B) is an explanatory display explaining the operation of the call button 454. It is a display screen of the display device 41 when 182 is displayed.

The explanation display 182 is, for example, as shown in FIG.
Each time you press the call ON/OFF will switch. ". Note that the explanation display 182 is not limited to text, and may be an image such as a diagram or a photograph, or a moving image.

Effect control device 300, by performing the explanation display 182 during the fanfare effect 181,
A player who is unfamiliar with the game can be taught how to call the attendant and can be made to pay attention to calling the attendant. Therefore, even if a round game in which balls are expected to come out is started after the fanfare effect, the player can easily take out the game balls stored in the upper tray 21 and the lower tray 23 by calling the attendant, so that the player can play the game with peace of mind. It becomes possible to improve the interest of the game.

It should be noted that the effect control device 300 also displays the explanation display 182 in addition to the fanfare effect 181 .
It can be performed. For example, the effect control device 300, during the round game, during the SP reach,
After the game ball enters the specific area 86 (so-called V winning hole), the timing at which the ball can be expected to be released, such as when the probability variable state (high probability state, specific game state) after the end of the big hit is confirmed, that is, the variable display game An explanation display 182 can be displayed when the result is a special result (big hit) or when there is a high degree of expectation for a special result.

In addition, the effect control device 300 performs a display explaining the operation of the call button 454 in the explanation display 182.
It is also possible to display other explanations such as switching the calling state of the clerk each time is pressed, an instruction to hit to the right, an instruction to enter the game ball into the specific area 86, and the like.

After that, after a predetermined time (for example, 10 seconds) has passed, the explanation display 182 disappears as shown in FIG. 37(C). In addition, the production control device 300 may hide the explanation display 182 by receiving a command corresponding to the detection of the signal from the call button switch 67 or the like.

Furthermore, when a predetermined time (for example, 10 seconds) has passed since the explanation display 182 was hidden, the effect control device 300 displays the explanation display 18 for calling attention, as shown in FIG.
2 may be displayed again. Therefore, even if the player overlooks the explanatory display 182 of FIG. 37(B), the player can confirm the re-displayed explanatory display 182 shown in FIG. As a result, the interest in the game can be improved.

Note that the re-displayed explanation display 182 (FIG. 37(D)) may be displayed smaller than the first explanation display 182 (FIG. 37(B)). By making the explanation display 182 to be redisplayed smaller than the explanation display 182 to be displayed for the first time, the player can easily enjoy the fanfare effect 181 and the interest in the game can be improved. Also, the redisplayed explanation display 182 may be displayed so as to gradually become smaller and then disappear.

[Actions and effects of the first embodiment]
The gaming machine 10 according to the present embodiment includes game control means (game control device 100) capable of executing games (variation display game, special figure variation display game) and effect control means (game control device 100) capable of executing effects related to the game. Effect control device 300), and when the result of the game is a special result (jackpot), a special game state advantageous to the player can be generated. The gaming machine 10 includes a display device 41 capable of displaying a game, an operation means (call button 454) capable of receiving operations by a player during a game, and a predetermined signal (from the call button switch 67) when an operation is performed. ON signal (call signal), external information) to the outside of the game machine 10 (for example, external information terminal board 71)
and a signal output means (game control device 100) that can be output to. When the operation means receives an operation, the effect control means can display an operation reception display (character display 345a of the staff call display 345) indicating that the operation has been received on the display device 41, and the operation means can operate. Each time the operation reception is accepted, the operation acceptance display is switched between display and non-display.

According to the gaming machine 10, the operation acceptance display is displayed or hidden on the display device 41 each time the operation means accepts an operation, so that the player is in a state of calling the attendant. It becomes easy to confirm whether or not it is. As a result, the player can easily play the game with peace of mind, so that the interest in the game can be improved.

Further, in the gaming machine 10 according to the present embodiment, the effect control means (the effect control device 300) displays the operation reception display (the character display 345a of the staff call display 345) and the reception time indicating the time after the operation is received. The display (time display 345b of the staff call display 345) can be displayed on the display device 41, and when a predetermined time (for example, 30 seconds) elapses after the operation is accepted, the operation reception display and the reception time display are hidden. do.

According to such a game machine 10, it becomes easier for the player to recognize that the state in which the attendant is being called is maintained, and the player can easily play the game with peace of mind, so that the interest in the game can be improved. can be done.

Further, in the gaming machine 10 according to the present embodiment, the effect control means (effect control device 300) displays an operation acceptance (attendant call display 3) every time the operation means (call button 454) receives an operation.
Explanation display 1 for explaining that the character display 345a) of 45 is switched between display and non-display.
82 can be displayed on the display device 41 .

According to such a gaming machine 10, the explanation display 182 displayed on the display device 41 enables
A player unfamiliar with the game can be taught how to call the attendant, etc., and the player can pay attention to the call of the attendant, so that the player can play the game with peace of mind, and the amusement of the game can be improved.

Further, in the game machine 10 according to the present embodiment, the operation means (call button 454) can accept a call operation as an operation, and the signal output means (game control device 100) can receive the call operation when the call operation is performed. , and a predetermined signal (ON signal from call button switch 67, external information).

According to the gaming machine 10 as described above, similarly, every time a call operation is accepted, the operation acceptance display (the character display 345a of the staff call display 345) is displayed or hidden on the display device 41. The player can easily confirm the calling state of the attendant, and the interest in the game can be improved.

The gaming machine 10 according to the present embodiment includes operating means (call button 454) capable of receiving operations by a player during a game (while sitting in front of the gaming machine 10), and light emitting means provided at a position overlapping the operating means. (LED of call button 454). Effect control means (effect control device 300), when the operation means receives an operation, causes the light emitting means to emit light in response to the fact that the operation has been received.

According to such a game machine 10, by pressing the call button 454, the call button 45
Since the 4 LEDs emit light, it is easy to understand that the operation has been performed, and the amusement of the game can be improved.

[Second embodiment]
The gaming machine 10 of the second embodiment will be described with reference to FIGS. 38 to 49. FIG. Configurations other than those described below may be the same as those of the first embodiment. In addition, in the following embodiment, the same reference numerals are used for the configuration having the same function as in the first embodiment, and overlapping descriptions are omitted as appropriate.

In the second embodiment, the effect control device 300 includes parts identification information (first identification information, unit ID) of the detachable parts (parts, members) 510, and combined identification information corresponding to the model and series of the gaming machine 10. If the (combined identification data) do not match, the mismatch is notified as an error. The composite identification information includes model identification information (second identification information, model ID) corresponding to the model of the gaming machine 10 and series identification information (third identification information, model ID) corresponding to the series of the gaming machine 10.
Series ID) is a value obtained by synthesizing.

For example, when the gaming machine 10 is a model A main machine, the effect control device 300 corresponds to the model identification information (second identification information, model ID) corresponding to the model A and the main machine (series of gaming machines 10). Series identification information (third identification information, series ID) is synthesized, and a value obtained by the synthesis (composite identification information) is held.

[Game machine parts]
FIG. 38 is a diagram showing how the detachable part 510 according to the second embodiment is normally attached to the gaming machine 10. As shown in FIG. FIG. 39 shows a detachable part 510 according to the second embodiment.
is attached to the game machine 10 by mistake.

Parts 510 are assigned electrically readable part identification information. For example, the part 510 may be a plate-shaped member on which model information (model logo, etc.) of the gaming machine 10 to be attached is displayed, or a movable accessory constituting the frame effect device or the board effect device 44.
A decorative member having an LED of the frame decoration device 18 or the board decoration device 46 may be used. Part 510 is
Since it can be attached to the game machine 10 in the game arcade because it interferes with the delivery to the arcade (game parlor), there is a possibility that an inexperienced attendant attaches it to the wrong model.

As shown in FIG. 38, for example, if the parts 510A for the model A main machine are normally attached to the game board 30 of the model A main machine of the gaming machine 10, no problem occurs. However, for example, when the part 510B for the model A sweet digital machine is attached to the game board 30 of the model A main machine of the gaming machine 10 as shown in FIG. If the parts 510C for the model B main machine are attached to the game board 30 of the model A main machine of the gaming machine 10, a problem will arise.
1 to notify an error. A sweet digital machine is a machine that has a higher probability of occurrence of a big hit than the main machine.

[Error notification mode of gaming machine 10]
FIG. 40 is a diagram showing a state in which error notification is performed in the gaming machine 10 according to the second embodiment. For example, as shown in FIG. 40, the production control device 300 can execute error notification by means of voice information (a voice saying "Unit error") or character notification information 345 (text information, characters "Unit error"). can.

It should be noted that the output of the audio information can be stopped by operating the production button 25 . Also, the notification information 345 is displayed with priority over the image regarding initialization or the image regarding recovery from power failure.

FIG. 41 is a diagram showing an example in which the notification information 345 according to the second embodiment is displayed on the display device 41 during display of the losing stop symbol of the special figure variation display game. As shown in FIG. 41, notification information 345 for notifying "unit error" is, for example, part identification information different from the composite identification information (combined value of model identification information and series identification information) of game machine 10 of model A main machine. As long as the part 510B or the part 510C with the .

During the special figure variation display game, the notification information 345 is superimposed on the variation display region 610 (first variation display region) in which the variation display of the large symbols is performed, but the variation display region in which the variation display of the small symbols is performed. It is not displayed overlapping 615 (second variable display area). This will
Even if the notification information 345 (“unit error”) is displayed, the player can check the progress and result of the special figure variation display game in the variation display area 615 .

[Configuration example of gaming machine 10]
FIG. 42A is a schematic configuration diagram schematically showing a configuration example of the gaming machine 10 of the second embodiment. FIG. 42B is a diagram showing the rotary switch 521 of the part 510 according to the second embodiment.

The game control device 100 transmits a model designation command indicating the series of the game machine 10 to the effect control device 300 when the power of the game machine 10 is turned on (A1044, A1046). The effect control device 300 searches for the series ID (series identification information) from the received model designation command (B1301) using the reference table (FIG. 42C). Reference table (Fig. 42C
) is stored in a memory (eg, RAM 322, FeRAM 323, etc.) and associates a model designation command with a series ID (series identification information). Moreover, the production|presentation control apparatus 300 acquires model ID memorize|stored in the memory|storage part (FeRAM323 grade|etc.,) previously. If the model designation command also includes model (type) information, the effect control device 300 may select and set model identification information (model ID) corresponding to the model designation command. . Then, the effect control device 300 includes model identification information (model ID) and series identification information (series ID
) and stored in a memory (RAM 322, FeRAM 323, etc.) as combined identification information (combined identification data). In addition, in the second embodiment,
Among the MODE section and the ACTION section, the model designation command as the effect command is particularly A
shall mean the CTION section.

The series ID can be obtained by converting the value of the 8-bit model specification command (especially the lower 2 bits: 2 digits from the least significant bit) with reference to the reference table (Fig. 42C) stored in the memory. can. For example, if the model specification command (ACTION part) is "00000001
B" (01h in hexadecimal) and "00000010B" (02h in hexadecimal), the series ID is "00000000B" (00h), and the model designation command is "0000
0011B" (03h), the series ID is "00000001B" (01h).

If the model designation command contains both model (type) information and series information, for example, the model ID is the upper 6 bits (6 digits from the most significant bit) of the 8-bit model designation command. can be obtained by masking the lower two bits with 0 and replacing them with 0. For example, if the model specification command is "00000101B", the model I
D becomes 000001, and if the model designation command is "00010001B", model I
D becomes 000100. Note that these 000001 and 000100 are numerical values that are displayed on the display screen of the display device 41 for visual recognition.

The composite identification information is obtained by combining the sum of the model identification information (model ID) and the series identification information (series ID) (composite identification information=model ID+series ID). For example, if the model ID is "00000100B" and the series ID is "00000000B", the composite identification information is "00000100B" (04h). For example, if the model ID is "0001
0000B" and the series ID is "00000001B", the combined identification information is "00
010001B" (11h).

In addition, the production control device 300 compares the held composite identification information with the parts identification information read from the parts 510 (model parts 510). The part 510 has an identification substrate 513 that holds part identification information. And the production|presentation control apparatus 300 alert|reports that it is inconsistent as an error, when parts identification information (1st identification information) and synthetic|combination identification information (synthesis|combination identification data) are inconsistent.

In the identification board 513 of the part 510, the part identification information is set by one or more wires 519 (electric wires) to which a predetermined voltage is applied and the rotary switch 521 (rotary SW (ID setting)).

The rotary switch 521 of the part 510 is used to select part identification information (first identification information, unit ID) corresponding to the model and series of the gaming machine 10. For example, as shown in FIG. 521a and rotary switch 5 for lower bits
21b. The two rotary switches 521a and 521b are each configured to have 1 circuit 16 positions (steps, dials) in hexadecimal (0 to F) representation.

For example, the position arrow of the rotary switch 521a points to "0", and the position arrow of the rotary switch 521b points to "4".

Further, as shown in FIG. 42A , each of a plurality of wirings 519 (a plurality of electric wires) is set to a predetermined voltage or a ground voltage by a rotary switch 521, and a plurality of (e.g., eight) terminals (ports) in the parallel-to-serial conversion section 516. ), and information of each bit (“1” or “0”) of the part identification information is input.

Note that the wiring 519 is pulled up to a predetermined voltage via a pull-up resistor.
It is not necessary to provide a pull-up resistor. In addition, the power supply (voltage) to the part 510 is the part 5
10 is attached, it is supplied from the effect control device 300 or the power supply device 400, for example.

In the example of FIG. 42A, the terminal connected to the wiring 519 for which the rotary switch 521 is turned on becomes the ground voltage (bit of value "0") and is connected to the wiring 519 for which the rotary switch 521 is turned off. The terminal has a predetermined voltage (a bit with a value of "1").

In this manner, by turning on/off the rotary switch 521 in each wiring 519, a predetermined terminal to which a predetermined voltage is input is set to a value of "1", and a terminal to which a predetermined voltage is not input (connected to the ground voltage). ) as bits of value '0', for example '000001
00” can be transmitted through the parallel-to-serial converter 516 .

In other words, the identification board 513 can receive parallel data (for example, "00
000100") is assigned. The parallel data (eg, "00000100") assigned to the parts identification information is binary data corresponding to the position values (eg, hexadecimal "04h") of the rotary switches 521a and 521b, as shown in FIG. 42B.

8-bit parallel data (for example, "0000010
0”), the upper 4 bits (for example, “0000”) are set by the position value of the rotary switch 521a for upper bits (for example, the value “0” in FIG. 42B).

Also, 8-bit parallel data (for example, "0000
0100”), the lower 4 bits (for example, “0100”) are set by the position value of the rotary switch 521b for lower bits (for example, the value “4” in FIG. 42B).

And the parallel-serial conversion part 516 converts the input parts identification information (parallel data) into serial data, and transmits it to the production control apparatus 300 by serial communication ( ^I2C here).

[Parallel-serial converter]
FIG. 43 shows the configuration of the parallel-serial conversion unit 516 when the parallel-serial conversion unit 516 is a normal parallel-serial conversion IC.

The parallel-serial conversion unit 516 includes a plurality of D-type flip-flops 516a (D-FF)
It has the configuration of a normal parallel-to-serial conversion IC. Parallel-serial converter 51
6 converts parallel data (for example, “00000100”) as part identification information input from terminals 0 to 7 (ports 0 to 7) into serial data, and connects by serial communication (here, I ² C communication). It transmits to production control device 300 via line SDA (data line). The effect control device 300 has a master IC 300a in I ² C communication, and inputs clock signals for a plurality of D-type flip-flops 516a to the parallel-to-serial converter 516 via a connection line SCL (timing signal line).

A plurality of D-type flip-flops 516a (D-FF) constitute a shift register in which each bit data of parallel data moves from right to left in synchronization with a clock signal. The bit data of each D-type flip-flop 516a at one clock timing moves to the adjacent D-type flip-flop 516a at the next clock timing. Each bit data of the parallel data is taken into a plurality of D-type flip-flops 516a at a certain clock timing, and sequentially output as serial data from the leftmost D-type flip-flop 516a. That is, the output of serial data is completed in 8 clocks after the parallel data is fetched.

[First Modification of Identification Substrate]
FIG. 44A shows a first modification of the identification substrate 513 of the part 510. FIG. In the first modification, the parallel-to-serial converter 516 of the identification board 513 is not an ordinary parallel-to-serial conversion IC, but an input I ² CI/O expander 815 (slave IC). ^I2 for input
The CI/O expander 815 is connected to the master IC 300a of the production control device 300 from port 0 to
The part identification information input from 7 is input as data.

The I ² CI/O expander 815 (slave IC) has a transistor 830 connected to the connection line SDA, a filter 831 connected to the connection line SDA, a driver 832 connected to the connection line SDA, and a connection line SCL. filter 833, bus controller 834,
and a reset signal generation circuit 839 . In addition, another I ² CI/O expander 81
5, and the I ² CI/O expander 815 itself determines whether the connection line SDA is occupied. It has a self-occupied WDT 841 for

The connection line SDA is a connection line for exchanging data signals between the master IC 300a of the effect control device 300 and the I ² CI/O expander 815 (slave IC), and functions as a data line. The connection line SCL is a connection line for inputting and outputting a clock signal used for data communication on the connection line SDA, and functions as a timing signal line.

The filter 831 is connected to the connection line SDA, removes noise from data (response signal, address data, etc.) input from the connection line SDA, and outputs the noise-removed data to the bus controller 834 .

The driver 832 applies a voltage that enables the transistor 830 to operate when outputting data (here, part identification information, etc.) from the connection line SDA to the master IC 300a.
Apply to 0.

A field effect transistor (FET) is used for the transistor 830 in order to suppress power consumption. , and the source is grounded.

The driver 832 transmits data (part identification information, etc.) to the master IC 300a via the connection line SDA.
A voltage is applied to the gate of transistor 830 to allow current to flow between the drain and source of transistor 830 when outputting from . The driver 832 outputs data from the connection line SDA by repeatedly changing the voltage of the connection line SDA from HIGH to LOW.

The filter 833 is connected to the connection line SCL, removes noise from data input from the connection line SCL, and outputs the noise-removed data to the bus controller 834 .

A unique address is set to the I ² CI/O expander 815 by the address setting terminals A 0 to A 3 provided in the I ² CI/O expander 815 and input to the bus controller 834 . Furthermore, an address for resetting the I ² CI/O expander 815 is also preset.

The unique address (8 bits) of the I ² CI/O expander 815 is composed of a fixed address section consisting of the upper 3 bits and a variable address section consisting of the lower 5 bits. The fixed address portion is preset with a predetermined value (eg, “110”) and cannot be changed by the I ² CI/O expander 815 .

The variable address section has a 4-bit I ² CI/O expander address corresponding to the pattern set to the terminals A0 to A3 of the I ² CI/O expander 815, and whether the data is a read request or a write request. 1-bit R/W identification data indicating whether the In the I ² CI/O expander 815 for input, "1" is normally registered in the R/W identification data in response to the read request.

The bus controller 834 determines that the address of the data input from the connection line SDA is I ² CI.
It determines whether or not it matches the unique address set in the /O expander 815, and if it matches, outputs data (part identification information) from the connection line SDA to the master IC 300a. A predetermined port (here, one) of eight ports 0 to 7 (terminals 0 to 7) in the I ² CI/O expander 815 is connected to a corresponding wiring 519 out of a plurality of wirings 519 . By doing so, a predetermined voltage is applied. Therefore, the bus controller 834 provides 8-bit part identification information (eg, "00000100
”) is input as parallel data. A predetermined port to which a predetermined voltage is input corresponds to a bit of value "1", and the other terminals correspond to bits of value "0".

Also, the bus controller 834 determines that the address of the data input from the connection line SDA is I.
² determines whether or not it matches the reset address set in the CI/O expander 815, and if it matches, the data is taken in as initialization instruction data (initialization command RES), and the I ² Initialize the CI/O expander 815 .

Also, the number of times the signal level of the connection line SCL has changed from LOW to HIGH reaches eight times.
After the bus controller 834 outputs the bit-th data (parts identification information), the connection line S
When the CL signal level changes from HIGH to LOW, the master IC 300a outputs a reply signal to the bus controller 834 from the connection line SDA. Further, when it is confirmed that the signal level of the connection line SCL changes from LOW to HIGH, and the signal level of the connection line SCL changes from HIGH to LOW again, the connection line SDA is opened. That is, the master IC 300
a outputs a reply signal at the timing when the signal level of the connection line SCL changes from LOW to HIGH nine times.

The reset signal generation circuit 839 has a Vcc terminal connected to a connection line Vcc that supplies power to the I ² CI/O expander 815, and a RES terminal that receives a reset signal from the outside.
ET terminal is connected.

The reset signal generation circuit 839 powers on the I ² CI/O expander 815,
When the voltage rises to a predetermined value, a reset signal is generated and initialized by inputting the generated reset signal to the bus controller 834 .

Therefore, when the harness is pulled out, the connection line Vcc for supplying power for the logic is temporarily disconnected.
9 will output a reset signal. A harness is a bundle of a connection line Vcc, a connection line SDA, a connection line SCL, a ground line GND, and the like for supplying logic power.

Bus monitor WDT 840 is used to detect when another I ² CI/O expander 815 occupies connection line SDA. The bus monitor WDT 840 is connected to the reset signal generating circuit 839, and when a predetermined time elapses after the connection line SDA is occupied,
By activating its own reset signal generation circuit 839, the I ² CI/O expander 815
to initialize.

The self-occupied WDT 841 is connected to the connection line SD by itself (I ² CI/O expander 815).
Used to detect A's occupancy. When the self-occupied WDT 841 operates continuously for a certain period of time, the self-occupied WDT 841 causes the reset signal generation circuit 839 to generate a reset signal to initialize the I ² CI/O expander 815 .

[Second Modification of Identification Substrate]
FIG. 44B shows a second modification of identification substrate 513 of part 510 . In the second modification, the parallel-to-serial converter 516 of the identification board 513 is not an ordinary parallel-to-serial conversion IC, but an I ² CI/O expander 815 (slave IC) for output. Also, in the second modified example, the parts 510 are equipped with a rendering device and can perform rendering. The production device is, for example, an LED
(Light-emitting part), etc., but may be a movable accessory.

The I ² CI/O expander 815 for output is the master IC 300 of the production control device 300
Based on the effect control data received from a, the output state (here, light emitting state) of the effect device (here, LED, light emitting unit) provided in the part 510 is controlled via ports 0 to 15 on the output side. Note that the I ² CI/O expander 815 is the I ² CI/O expander 815
is input to the master IC 300a of the effect control device 300 using the unique address (8 bits) of the parts identification information.

The I ² CI/O expander 815 for output is connected to the I ² CI/O expander 81 for input.
5 (FIG. 44A), an output setting register 835, an output controller 836, and a driver 8 connected to ports 0 to 15 (terminals 0 to 15) on the output side of the I ² CI/O expander 815.
37, with the addition of transistors 838A-838P connected to each port 0-15. Therefore, the description of the same configuration as the input I ² CI/O expander 815 (FIG. 44A) will be omitted as appropriate.

The filter 831 is connected to the connection line SDA, removes noise from the data input from the connection line SDA (here, effect control data, reply signal, etc.), and outputs the noise-removed data to the bus controller 834.

The driver 832 applies to the transistor 830 a voltage that enables the transistor 830 to operate when data (here, part identification information, response signal, etc.) is output from the connection line SDA to the master IC 300a.

When the driver 832 outputs data (parts identification information, response signal, etc.) from the connection line SDA, the transistor 830 is operable to the gate of the transistor 830 in order to pass a current between the drain and the source of the transistor 830. Apply a voltage of The driver 832 outputs data from the connection line SDA by repeatedly changing the voltage of the connection line SDA from HIGH to LOW.

The bus controller 834 has a ROM 834a in which part identification information (first identification information) of the identification board 513 is stored. The bus controller 834 determines whether or not the address of the data input from the connection line SDA matches the unique address set in the I ² CI/O expander 815 (address determined by A3, A2, A1, A0). If they match, the data (part identification information (first identification information), response signal, etc.) stored in the ROM 834a is output from the connection line SDA to the master IC 300a.

The part identification information to be output to the master IC 300a is the unique address (8 bits) of the I ² CI/O expander 815 as described above, or separately set identification information different from the unique address (first modification set via a port as in the example or stored in a storage unit (memory)). It should be noted that it is not always necessary to output the parts identification information from the bus controller 834 to the master IC 300a, and upon receiving a response signal from the bus controller 834, the effect control device 300 recognizes the address of the transmitted data as the parts identification information. It may be configured to

In addition, after the number of times the signal level of the connection line SCL has changed from LOW to HIGH has reached eight times and the bus controller 834 has taken in the effect control data of the 8th bit from the connection line SDA, the signal level of the connection line SCL has changed to When it changes from HIGH to LOW, the response signal is transferred to the connection line SD
Output from A to the master IC 300a. Furthermore, it is confirmed that the signal level of the connection line SCL changes from LOW to HIGH, and the signal level of the connection line SCL changes from HIGH to LO again.
When it changes to W, it opens the connection line SDA. That is, the bus controller 834 outputs the response signal at the timing when the signal level of the connection line SCL changes from LOW to HIGH nine times.

The operation mode of the I ² CI/O expander 815 and the output states of ports 0 to 15 are set in the output setting register 835 . When the bus controller 834 fetches the initialization instruction data from the connection line SDA and the I ² CI/O expander 815 is initialized, the output setting register 835 indicates that all ports 0 to 15 are supplied with current. The initial state is set to not flow.

Based on the data set in the output setting register 835, the output controller 836
Through the port driver 837, production devices (here, LE
D, the light emitting part), the output state (here, the light emitting state) of the production device is actually controlled by passing a current (output of lighting data). This output state is updated to the content specified in the effect control data when the bus controller 834 takes in the effect control data from the connection line SDA.

That is, based on the effect control data received from the master IC 300a, it is set in the output setting register 835, and when the stop condition is received, the output state of each port 0 to 15 is updated and reflected in the effect device.

Driver 837 applies a voltage to transistors 838A to 838P connected to the port through which the current flows so that the transistors 838A to 838P can operate.

The transistors 838A-838P have their gates connected to the driver 837, their drains connected to port terminals connected to connection lines to which a voltage is applied to operate the rendering device, and their sources grounded.

If the voltage applied to the gates of the transistors 838A to 838P is equal to or higher than a predetermined value for operating the transistor 838, the predetermined voltage applied to the gates from the drive power source is grounded via the drain of the transistor 838. By the current flowing to
It is possible to control the output state of the production device (LED in this case) connected to the port terminal.

[Model designation command and series ID change (addition) mode]
FIG. 45 is a diagram showing an ID change mode (identification information setting state) for changing (adding) a model designation command and a series ID executed by the effect control device 300 of the second embodiment.

When the effect control device 300 executes the ID change mode (identification information setting state), the display device 4
45, for example, is displayed on the display screen 1, and it is possible to change (add) receivable model designation commands, series IDs, and their corresponding relationships.
The ID change mode can be shifted, for example, during development (shipment) debug mode. In the ID change mode in the debug mode, the command I / F33 of the effect control device 300
1, by connecting a command transmission device instead of the game control device 100 and transmitting a dedicated rewrite command to the CPU 311, the series ID and the like can be changed (added).

It should be noted that the ID change mode is, for example, by pressing the effect button 25 during the hole setting mode (B0011).
You may enable it to shift by operating . Thus, the memory (eg RAM3
22, FeRAM 323, etc.) is stored in the reference table (FIG. 42C) and the correspondence between the model designation command and the series ID is cleared (deleted) at the time of installation or power failure, etc. can be restored (recreated) with Similarly, by making it possible to shift to the ID change mode during the hole setting mode, the combination of the model designation command of the reference table (FIG. 48) stored in the memory (for example, the RAM 322, the FeRAM 323, etc.) and the synthesized identification information can be performed. If the association is cleared (deleted) at the time of import or power failure, it can be restored (recreated) at the game hall (game shop).

When the ID change mode is executed, the model designation command can be changed (added) as shown in FIG. 45(A), for example. Then, by operating the production button switch 25a of the production button 25, the touch panel 25a, etc. (a cross key or a volume adjustment key may be used) by the developer or the person in charge of the game hall (game parlor) (game hall manager), As shown in the table of 45(A), the model designation command can be changed (added).

For example, in the table of FIG. 45A, the model of the gaming machine 10 is "RW1" and the model ID is "
000001" (the numerical value handled in the CPU 311 is "00000100B" (04h)
). Also, as the model specification (so-called spec) of the gaming machine 10, "Z
, "F", "M", "GL", and "SP" are prepared, and "preliminary 1" and "preliminary 2" are provided as model designations that can be prepared in reserve.

For example, if the model designation is "Z", the model designation command is "01h".
is set, and the series ID is set to "00" (00000000B). If the model specification is "GL", "03h" is specified in the model specification command, and the series ID is set to "01" (00000001B). Note that "---" is displayed for items that do not have a model designation command or series ID setting, but they may be hidden ("").

Also, in FIG. 45A, for example, the model specification command for model specification "M" being selected is displayed blinking ("[--]"). Therefore, a developer or a game parlor manager who is operating to change (add) a model designation command can easily recognize which model designation command is being selected, and work efficiency can be improved. Note that the model designation command being selected is not limited to blinking, and the color may be changed (for example, from black to red) or the font may be changed (
e.g. bold).

Then, as shown in FIG. 45B, when an arbitrary model designation command (for example, "00h") is set, the series ID " 10” is selected ([10] (00000010B)).

After that, by setting the series ID being selected to, for example, "10" and ending the ID change mode, the change (addition) of the model designation command and the series ID is performed using the reference table that associates the model designation command with the series ID. (FIG. 42C) can be reflected and stored.

By selecting a model designation command (eg "01h") or series ID (eg "00") that has already been set, another model designation command (eg "02h") or series ID
(for example, "11").

In addition, the effect control device 300 has a model ID (second identification information, for example, "00000100B
” (“000001” on the display)) is combined with the newly added series ID (third identification information, for example, “00000010B” (“10” on the display)) to create new combined identification information (“ 00000110B"("06h" in hexadecimal)) to obtain the reference table (FIG. 48).
) can be stored in memory. For example, new synthetic identification information (“00
000110B"), the upper 6 digits (6 bits) are the model ID (“000001” on the display), and the lower 2 digits (2 bits) are the series ID (“10” on the display).

Therefore, when the model designation (spec) of the model A main machine of the gaming machine 10 is changed (for example, from normal middle spec to light middle spec), and the series ID is changed (for example, from "00" to "10") , the parts 510 of the parts identification information (“00000110B”) corresponding to the composite identification information newly obtained from the series ID can be attached and used for game effects.

Therefore, without replacing the entire game board 30, some parts (for example, the parts 510
) to a corresponding one, the model specification (spec) of the gaming machine 10 can be changed easily and inexpensively. In addition, since the specifications of the gaming machine 10 can be changed easily and inexpensively, for example, the manager of the gaming facility can appropriately change (adjust) the specifications of the gaming machines 10 lined up in the gaming facility according to the popularity of the gaming machine 10, thereby increasing the popularity of the gaming machine 10. Sales can be improved by increasing the number of game machines 10 with a certain specification. In addition, the increase in the number of gaming machines 10 with popular specs in the game hall makes it easier for the player to select the gaming machine 10, so that the interest in the game can be improved.

In the ID change mode (identification information setting state), in addition to changing (adding) the series ID (third identification information, series identification information) corresponding to the model designation command, the model identification information (third identification information) corresponding to the model designation command 2 identification information, model ID) may be changed (added).

[Main processing (production control device)]
FIG. 46 is a flowchart showing the procedure of main processing (main program) according to the second embodiment. The main process is executed by the effect control device 300 (main control microcomputer 311) when the game machine 10 is powered on (restored).

The main processing of the second embodiment is the parts matching processing (B50
00) is added, and other processes are the same as those in FIG.

In the parts matching process, parts identification information (first identification information) read from the parts 510,
By comparing the combined identification information (combined value of the model identification information and the series identification information) corresponding to the model designation command (B1301), if the part identification information and the combined identification information do not match,
Warn by error notification. In this embodiment, the parts matching process (B5000) is executed after the received command check process (B0014).

The parts collation process (B5000) is first executed when the gaming machine 10 is powered on, and then repeatedly executed by the loop process from steps B0008 to B0023.

[Parts verification process]
Next, referring to FIG. 47, the parts matching process (B5000) in the main process (FIG. 46)
) will be described in detail. FIG. 47 is a flow chart showing the procedure of the parts matching process executed by the effect control device 300. As shown in FIG.

Effect control device 300, first, if the collation time timer (clock means) is not 0 -1 update (B5001). The verification time timer reads the part identification information and verifies it with the model identification information (
It determines the collation timing or collation time interval for comparison. Then, it is determined whether or not the collation time timer is 0 (B5002). If the collation time timer is not 0 (B5
The result of 002 is "N"), and the matching timing is not reached, so the parts matching process ends.

On the other hand, when the collation time timer is 0 (the result of B5002 is "Y"), the effect control device 300 reads the parts identification information from the parts 510 because it is the collation timing (B5
003). Then, the part identification information (first identification information) and combined identification information (combined value of model identification information (second identification information) and series identification information (third identification information)) are compared (verified) (
B5004). The model identification information and the series identification information are set based on the model designation command as information indicating the type (model) and series of the gaming machine in the model setting process (B1302) when the gaming machine 10 is powered on. It is As described above, the effect control device 300 acquires the model ID stored in advance in the storage unit (FeRAM 323, etc.), searches for the series ID from the model designation command received when the power is turned on, and obtains the combined identification information. (sum of model ID and series ID) can be acquired.

In addition, the effect control device 300 can also acquire (grasp) synthetic identification information from the model designation command received when the power is turned on by referring to the reference table (FIG. 48). The effect control device 300 has a memory (for example, RAM 322, FeRAM 323, etc.) that stores a reference table in which model designation commands and combined identification information are associated with each other as shown in FIG. It holds synthetic identification information corresponding to the model and series.

Next, the effect control device 300 determines whether or not the parts identification information and the composite identification information match (B5005). When the parts identification information and the combined identification information do not match (B500
If the result of step 5 is "N"), an error notification is issued to notify that the parts identification information and the combined identification information do not match (B5006). That is, it is notified that the part 510 is attached to an incorrect model or series that does not match (correspond) to the part 510 . Production control device 3
00 may issue an error notification (warning) by generating sounds from the speakers 19 a and 19 b or displaying characters on the display device 41 . Also, here, the production control device 300,
With reference to the reference table in FIG. 48, the correct model and series compatible with (corresponding to) the part 510 may be notified along with the error notification. A correct model or series is a model that has the same composite identification information as the part identification information of the part 510 .

Subsequently, the effect control device 300 sets the initial value of the collation time timer (B5007), and ends the parts collation processing. Therefore, the part identification information and the composite identification information are compared (verified) periodically every time the time corresponding to the initial value of the verification time timer elapses, starting from the time when the power is turned on. The initial value of the matching time timer is, for example, a time corresponding to several minutes, but is not limited to this.

On the other hand, the effect control device 300 (B5
005 result is "Y"), and since the part 510 is attached to the correct model compatible with (corresponding to) the part 510, the initial value of the collation time timer is set without notifying the error (B50
07), and ends the parts matching process.

In addition, as a modification, the effect control device 300 can be stored in a memory (for example, RAM 322 or FeRA
M323), instead of the reference table of FIG. 48, only combined identification information corresponding to one type of model and series may be held. Also in this case, the production control device 300, the parts 51
The part identification information read from 0 is compared with the held synthetic identification information, and if the parts identification information and the synthetic identification information do not match, an error is reported that they do not match.

[Reference table]
FIG. 48 is a diagram showing a reference table (FIG. 48A) that associates a model designation command with combined identification information according to the second embodiment, and a reference table (FIG. 48B) that shows the classification of nonconforming models. be.

As shown in FIG. 48(A), the memory of the effect control means 300 (RAM322 and FeRAM
323 (FIG. 4, etc.) stores a table of the type of the gaming machine 10 (for example, type A to D), and a table of model designation commands and synthetic identification information corresponding to the model and series of the gaming machine 10 of that type. there is

For example, type A is associated with model designation command A corresponding to model A main machine of game machine 10 and combined identification information (for example, "00000100"("04h" in hexadecimal)).

Type B is associated with a model designation command B corresponding to the model A sweet digital machine of the gaming machine 10 and combined identification information (for example, "00000101"("05h" in hexadecimal)).

Type C is associated with model designation command C corresponding to model B main machine of gaming machine 10 and combined identification information (for example, “00010000” (“10h” in hexadecimal)). Model designation command D corresponding to 10 model B sweet digital machines and synthetic identification information (
For example, "00010001"("11h" in hexadecimal)) is associated.

Therefore, for example, types A and B in which the upper six digits of the combined identification information are "000001"
The model of the game machine 10 of the above is model A, and the model of the game machine 10 of types C and D whose upper six digits are "000100" becomes model B. Further, for example, the series of type A and C gaming machines 10 having the lower two digits of the combined identification information of "00" become the main machines, and the series of gaming machines 10 of type B having "01".
The series of D's gaming machines 10 are sweet digital machines.

47 is executed, for example, when the part 510A for the model A main machine is attached to the model A main machine of the gaming machine 10 (
38), combined identification information (eg “00000100”) and part identification information (eg “0
0000100"), the part 510 is determined to be a standard product that conforms to the game machine 10, and the error notification is not executed. Therefore, driving (light emission) of the frame decoration device 18 (or board decoration device 46) is permitted.

On the other hand, the parts 510B for the model A sweet digital machine and the parts 510C for the model B main machine are
When it is attached to the model A main machine of the gaming machine 10 (FIGS. 39A and 39B), combined identification information (for example, "00000100") and part identification information (for example, "0000010")
1” and “00010000”) do not match, the part 510 is determined to be unsuitable for the game machine 10, and error notification is performed. Along with the error notification, the frame decoration device 18
(or board decoration device 46) is also prohibited from driving (light emission).

Along with the error notification, the correct series (sweet digital machine) suitable for the part 510B and the correct model (model B) suitable for the part 510C may be notified.

Further, when the part identification information does not match any of the combined identification information of types A to D, the part 510 is determined to be a non-standard product (non-conforming model, non-conforming product) that is not compatible with the game machine 10. be.

Even if the parts identification information and the synthetic identification information do not match (in the case of a non-conforming model), if the parts identification information matches any of the synthetic identification information of types A to D, the parts 51
0 is a standard product compatible with the game machine 10 (partially conforming product), as shown in FIG. can be done.

For example, in conventional gaming machines, as a device for providing the gaming machine at a low cost, parts (parts 510) were changed as part of the frame decoration device 18 (model element). If the parts (parts 510) are not correct when they are changed in the field, there is a possibility of causing a failure. Also, there is a possibility that the frame decoration device 18 is used incorrectly.

However, in the gaming machine 10 of the second embodiment, even if a wrong unit (the part 510B or the part 510C) is attached, it is not necessary to prohibit the drive of the frame decoration device 18 (or the board decoration device 46). In addition, parts 51 within the range that does not affect the progress of the game
It is also possible to reduce the cause of failure by permitting the driving of a part of 0.

Therefore, as shown in FIG. 48(B), the memory of the effect control device 300 (RAM322
, FeRAM 323 ( FIG. 4 ), etc.) stores a standard product (partially conforming product) that is compatible with the gaming machine 10 when the parts identification information of the parts 510 does not match the combined identification information of the gaming machine 10 . A look-up table for error classification is stored for determining and classifying whether or not.

The parts 510 decorate the game board 30 ( FIG. 2 ), and include LEDs and movable members that can be controlled by the effect control device 300 . As shown in FIG. 48(B), parts 51
0 can be categorized into those with LEDs only and those with LEDs and movable members according to the corresponding part identification information.

For example, if the upper two digits of the part identification number are "00" or "01", part 5
10 can be determined to have only LEDs. Also, when the upper two digits of the part identification information are "10" or "11", it can be determined that the part 510 has an LED and a movable member.

Incidentally, as shown in FIG. 48(A), the parts identification information corresponds to the gaming machine 10 in the upper two digits.
However, it may be possible to identify the types AD of the gaming machine 10 with arbitrary two digits other than the upper two digits. In this case, any two digits other than the upper two digits of the part identification information can be used to determine whether the part 510 has only the LED or the LED and the movable member. By comparing part of the part identification information in this manner, the type of the part 510 can be classified.

Specifically, when the part 510 is a nonconforming product, as shown in FIG. L
It can be classified into a second category with ED and movable parts and a third category of non-standard products.

Regarding the first category, the L of part 510 is
Since the rating of the ED corresponds to the gaming machine 10, lighting of the LED can be permitted.

Regarding the second category, the LEDs and movable members of the parts 510 can be driven because their ratings correspond to the gaming machine 10 as long as the parts 510 are standard products. However, if the motion mode of the movable member corresponding to the game machine 10 is different due to the difference in the model, such as reciprocating motion and circling motion, the parts 510 may be damaged. Therefore, in the second category, it is necessary to prohibit the driving (movement, rotation, etc.) of the movable member of the part 510 while permitting the driving (light emission) of the LED.

Regarding the third category, if the part 510 is an incompatible, non-standard product, there is a possibility that the ratings of the LEDs and movable members are different from those of the game machine 10, and when these are driven, the board on the game machine 10 side, etc. may be damaged, it is necessary to prohibit the driving of the LEDs and movable members of the part 510 regardless of their presence or absence.

When the parts 510 are part of the board decorating device 46, the main control microcomputer 311 may restrict only the signals related to the parts 510 among the signals transmitted to the board decorating device 46. For example, , when the part 510 belongs to the second classification, the L of the part 510
Allowing transmission of signals related to ED and prohibiting transmission of signals related to movable members, for example,
When the part 510 belongs to the third category, the transmission of signals related to the LED of the part 510 and the movable member should be prohibited.

For example, when the I ² CI/O expander 815 shown in FIG. 44B drives the board decoration device 46, for example, PORT1 is the port that drives the LED of the part 510, and P
If ORT2 is the port that drives the movable member (motor) of part 510, then PORT
1 and the output of signals belonging to the PORT2 addresses should be prohibited.

Moreover, when the part 510 is configured as an independent part from the board decoration device 46,
When the part 510 belongs to the second classification, the main control microcomputer 311 controls the L
Allowing transmission of signals related to ED and prohibiting transmission of signals related to movable members, part 5
10 belongs to the third category, the transmission of signals related to the LED of the part 510 and the movable member should be prohibited.

From the above, the production control device 300 (main control microcomputer 311) is the parts identification information (first identification information) transmitted from the parts 510 and the synthetic identification information (second identification information and third identification information) provided by the production control device 300 information) to determine whether the part 510 is a conforming model (standard product, conforming product) that conforms to the game machine 10 or a non-conforming model that does not conform (non-standard product, non-conforming product). can be discriminated.

Also, if the part 510 is a non-conforming model that does not conform to the gaming machine 10, the
By referring to the table shown in B), it is possible to perform error classification for determining how compatible a standard product (partially conforming product) is with the gaming machine 10 and classifying it.

[Modified example of parts matching process]
FIG. 49 is a flow chart showing a procedure of a modification of the parts matching process executed by the effect control device 300. As shown in FIG. In the modified example of the parts collation process of FIG. 49, the effect control device 300 changes the drive (light emission) restriction by classifying the parts 510 as errors.

Note that in the modified example of the parts matching process of FIG. 49, the same process as the parts matching process of FIG. B5006b). Also, as in FIG. 49, steps B5006 and B500
6b, prohibiting operation of the frame decoration device (B5006) to prohibit driving of the frame decoration device 18
a) may be performed.

Effect control device 300, in the error classification process (B5006b), when it is determined that the parts identification information belongs to the first classification, allows driving (light emission) of the LED of the parts 510 (B5006c).

In addition, the effect control device 300, in the error classification process (B5006b), when it is determined that the parts identification information belongs to the second classification, while permitting driving (emission) of the LED of the parts 510 movable member of the parts 510 is prohibited (B5006d).

In addition, the effect control device 300, in the error classification process (B5006b), when it is determined that the parts identification information belongs to the third classification, prohibits the driving (light emission) of the LEDs and movable members of the parts 510 (B5006e). .

In this way, even if the attached parts 510 are used incorrectly, the error classification performed by the effect control device 300 allows the parts 5 so as not to affect the progress of the game.
Since it is possible to limit the driving (light emission) of 10 and reduce the cause of failure, it is possible to extend the service life.

[Actions and effects of the second embodiment]
The gaming machine 10 according to the present embodiment includes game control means (game control device 100) capable of executing games (variation display game, special figure variation display game) and effect control means (game control device 100) capable of executing effects related to the game. Effect control device 300). The gaming machine 10 includes detachable parts (parts 510) to which electrically readable first identification information (parts identification information, unit ID) is assigned. Effect control means, the second identification information corresponding to the model of the game machine 10 (
model identification information, model ID) and third identification information (series identification information, series ID) corresponding to the series of the game machine 10 can be set. 3 identification information is combined, the value obtained by the combination is held as combined identification information (combined identification data), the first identification information of the part (part 510) is read, compared with the combined identification information, and the first If the identification information and the combined identification information do not match, notify that they do not match (
error notification).

According to such a game machine 10, the first identification information (part identification information, unit ID) of the part (part 510) is read and compared with the synthetic identification information (composite identification data), and the first identification information and the synthetic identification are read. When the information is inconsistent with the information, an error notification is given to inform that the information is inconsistent. Mistakes can be determined quickly and easily

Further, in the gaming machine 10 according to the present embodiment, the effect control means (effect control device 300) can be shifted to the identification information setting state (ID change mode) in which setting can be performed, and during the identification information setting state, the second Identification information (model identification information, model ID) or third identification information (series identification information,
series ID) can be changed or added.

According to such a game machine 10, some parts (
For example, by replacing the part 510) with a corresponding one, the model specification (spec) of the gaming machine 10 can be changed easily and inexpensively.

[Third embodiment]
The gaming machine 10 of the third embodiment will be described with reference to FIGS. 50 to 69. FIG. Configurations other than those described below may be the same as those of the first embodiment or the second embodiment. In addition, in the following embodiments, the same reference numerals are used for configurations that perform the same functions as those of the first embodiment or the second embodiment, and overlapping descriptions are omitted as appropriate.

[Game control device]
FIG. 50 is a block diagram showing a configuration example of a game control system according to the third embodiment. In FIG. 50, unlike FIG. 3 of the first embodiment, the output ports 134 to 137 are not present in the game control device 100 (main board, main board), the electric circuit is simplified, and the number of wires (the number of signals )
is reduced, and a sufficient space (location) for arranging electronic components and the like can be secured. This consists of the gaming microcomputer 111 (CPU 111a) and drivers 138a-138d as follows.
, 150 and the relay board 70 are performed by serial communication instead of conventional parallel communication. In addition, between the game microcomputer 111 and the production control device 300, between the game microcomputer 111 and the payout control device 200, and between the game microcomputer 111 and the inspection device 500, serial communication is performed in the first embodiment. It doesn't change.

Data from the serial port 173a (first serial port) of the gaming microcomputer 111 is sent to the driver 138a by serial communication (serial method) via the serial signal line 174a.
-138d, sent to the driver 150; Serial port 17 of gaming microcomputer 111
Data from 3b (second serial port) is transmitted to relay board 70 by serial communication (serial method) via serial signal line 174b. In addition, in FIG. 3 of the first embodiment, data is transmitted from the gaming microcomputer 111 through the data bus 140 by parallel communication (parallel system). In this embodiment, the serial communication is synchronous serial communication and is performed by, for example, SPI (Serial Peripheral Interface), but it is not limited to this.

In this embodiment, the drivers 138c and 138d are each part of one driver IC chip 156 (integrated circuit chip, electronic component). Drivers 138b, 15
0 are each part of one driver IC chip 157 (integrated circuit chip, electronic component). Each driver may be provided as one IC chip.

The game control device 100 (main board) has a connector section 160 (CN1) for connecting with a relay board 70 that supplies a test-fire test signal to the test-fire test device, and the relay board 70
It has a connector part 162 (CN2) for connecting with the game control device 100 (main board).
The connector portion 160 and the connector portion 162 are insertion ports for electric wires such as cables (or harnesses), and are electrically connected to each other by cables or the like. As with the buffer 133,
The connector part 160 (CN1) is also a component that is not mounted on the game control device (main board) of the pachinko game machine as an actual machine (mass-produced product) installed in the game parlor.

[Circuit diagram of game control device]
51 and 52 are circuit diagrams illustrating part of an electric circuit (electronic circuit) provided in the game control device 100 (main board, main board) according to the third embodiment. It should be noted that the positions of electronic components (such as IC chips), elements and terminals in the circuit diagram may be irrelevant to the positions where they are actually arranged on the substrate. Note that the terminals may be pins, for example. In this embodiment,
A substrate means a circuit board such as a printed circuit board.

The serial port 173a of the gaming microcomputer 111 has a terminal A1 for a serial data signal (TXA), a terminal A2 for a serial clock signal (CKA), a chip select signal (SA
0) includes terminal A3 for (slave select signal) (see FIG. 51). A wiring connected to the terminal A1 is a data line 194 (194a, 194a, 194a) for transmitting a serial data signal (TXA).
94b), the wiring connected to the terminal A2 is the clock line 195 (195a, 195b) for transmitting the serial clock signal (CKA), and the wiring connected to the terminals A3, A4 is the chip select signal (SA0, SA1). ) for transmitting the chip select line 196
(196a, 196b). Since only serial data is output from the gaming microcomputer 111 (master) through serial communication, the terminal A1 is for outputting serial data, and the terminal for inputting serial data from the slave is omitted. . A chip select signal is a signal for selecting a slave (IC chip) capable of input operation or output operation.

Serial signal line 174a (see FIG. 5) from serial port 173a of game microcomputer 111
0) comprises at least a data line 194 (signal line) for transmitting a serial data signal (TXA) and a clock line 195 (signal line) for transmitting a serial clock signal (CKA).

The serial port 173b of the game microcomputer 111 has a terminal B1 for serial data signal (TXB), a terminal B2 for serial clock signal (CKB), a chip select signal (SB
0) includes terminal B3 for (slave select signal) (see FIG. 52). A wiring connected to the terminal B1 serves as a data line 211 for transmitting a serial data signal (TXB).
2 is a clock line 21 for transmitting a serial clock signal (CKB).
2, and the wiring connected to the terminal B3 becomes the chip select line 218 for transmitting the chip select signal (SB0).

Since only serial data is output from the game microcomputer 111 (master) by serial communication, the terminal B1 is for serial data output, and the serial data input terminal from the slave is omitted. . Also, if the serial port 173b performs serial communication with only one IC chip (slave), the chip select signal and its chip select line 218 can be omitted.

Serial signal line 174b (see FIG. 5) from serial port 173b of game microcomputer 111
0) comprises at least a data line 211 (signal line) for transmitting a serial data signal (TXB) and a clock line 212 (signal line) for transmitting a serial clock signal (CKB).

[Circuit diagram related to serial communication between gaming microcomputer and driver]
FIG. 51A is a circuit diagram relating to serial communication between the game microcomputer 111 and each driver in the game control device 100, and an electric circuit (electronic circuit) around the game microcomputer 111 and each driver IC chip. is a circuit diagram illustrating FIG. 51A shows the status of transmission of the external information signal from the serial port 173a of the game microcomputer 111, the LED drive signal of the collective display device 50, the LED drive signal to the performance display device 152, and the like. The LED drive signals are the signals to the digit lines and segment lines of the batch display 50 or performance display 152 .

The driver IC chips 156 and 157 are 16-bit serial/parallel conversion circuits for converting serial data signals (TXA) from the serial port 173a of the gaming microcomputer 111 into parallel data signals. The driver IC chips 156 and 157 may be general ones having shift registers and parallel data latch circuits (data registers). A shift register is composed of, for example, a plurality of D-type flip-flops, and bit data of one D-type flip-flop moves to an adjacent D-type flip-flop in synchronization with a serial clock signal (CKA). The parallel data latch circuit is composed of, for example, a plurality of D-type flip-flops, and latches (holds) and takes in (sets) 16-bit data in the shift register at a predetermined latch timing for receiving a latch signal.

The driver IC chips 156 and 157 are cascaded (connected in multiple stages), with the driver IC chip 156 constituting the first stage and the driver IC chip 157 constituting the second stage. A serial data signal (TXA) transmitted from the gaming microcomputer 111 via the data line 194a
is input to the input terminal DIN of the driver IC chip 156, and the driver IC chip 15
6 shift registers and output from the output terminal DOUT. Driver I
A serial data signal (TXA) output from the output terminal DOUT of the C chip 156 is input to the input terminal DIN of the driver IC chip 157 and passes through the shift register of the driver IC chip 157 .

The driver IC chips 156 and 157 receive the same serial clock signal (CKA) from the clock line 195a and the same chip select signal (SA) from the chip select line 196a.
0), and the same reset signal (RESET) from the reset line 197a is input in parallel to the respective input terminals SCK, /CS, and /RESET. "/" indicates a negative logic terminal. The shift registers of the driver IC chips 156 and 157 operate synchronously with the same serial clock signal (CKA). Driver IC chips 156, 15
7 parallel data latch circuit receives the same chip select signal (SA0) as a latch signal.
is received (latch timing), the data in the shift register is captured. The data captured in the parallel data latch circuits of the driver IC chips 156 and 157 are output as 16-bit parallel data to the parallel output terminals (PA0-PA7, PB0-P
B7) are output at the same time. Therefore, the two driver IC chips 156 and 157 are
Together, it becomes a serial-parallel conversion circuit with a total of 32 bits, and the serial data signal (TX
A) is converted into 32-bit parallel data. The driver IC chips 156 and 157 are simultaneously reset (initialized) by the reset signal from the Schmitt buffer 125, and the internal data is cleared.

Among the parallel output terminals of the driver IC chip 156, terminals PA0-PA7, PB0-
PB2 is connected to terminals S17-S7 of connector section 181 (CN3), respectively. The terminals S17-S7 of the connector section 181 (CN3) are connected to the external information terminal 71 by electric wires such as cables. Therefore, the parallel output terminals PA0-PA of the driver IC chip 156
7 and PB0-PB2 are transmitted to an external information terminal 71 as external information AK (external information signals). Thus, the shift register, parallel data latch circuit, and parallel output terminals PA0-PA7, PB0-PB2 of the driver IC chip 156 constitute the driver 138d (FIG. 50). A terminal PB3 of the parallel output terminals of the driver IC chip 156 supplies a door signal indicating opening of the glass frame 15 or the like.

For example, the external information A to K are, respectively, a call signal, an out signal, a security signal, a main prize ball signal, a big win 4 signal, a big win 3 signal, a big win 2 signal, a big win 1 signal, a starting opening signal,
They are the number of pattern determination signal and the door/frame open signal. The call signal is a signal for calling the staff of the game hall (hall), and the out signal is a signal based on the detection of the out ball detection switch 74 . The security signal is a signal that is transmitted when there is fraud or an error, such as magnet fraud or radio fraud. The main prize ball signal is a signal that is generated each time the number of prize balls (scheduled number of payouts) generated by winning a prize in the prize opening reaches a predetermined number (here, 10).

The jackpot 1 signal, jackpot 2 signal, jackpot 3 signal, and jackpot 4 signal may be signals defined by the model as jackpot information, and may be turned on at the start of the jackpot and turned off at the end of the jackpot or the end of the time saving. signal. The starting port signal is the starting port 1 switch 36a or the starting port 2
It is a prize winning signal of the starting port based on the detection of the switch 37a, the pattern confirmation number signal is a signal indicating the number of executions of the special figure fluctuation display game (the number of symbol confirmation), and the door/frame opening signal is the glass frame opening. It is a signal indicating the opening of the glass frame 15 or the front frame (game frame) 12 by the detection switch 63 or the front frame open detection switch 64 (body frame open detection switch).

In addition, the security signal, the main ball signal, the start signal, the door/frame opening signal, and the number of pattern determination signal may be set in the external information editing process (A1319) of the timer interrupt process.

Terminals PB4 to PB7 of the parallel output terminals of the driver IC chip 156 are connected to terminals L9 to L12 of the connector section 185 (CN4) via the gate driver 183, respectively. The connector part 185 (CN4) is connected to the collective display device 50 by an electric wire such as a cable.
connect to. The parallel output terminals PB4-PB7 are connected to the LED lamps (D
1-D18) are electrically connected to the digit lines (LED digits 0-3) to which the cathode terminals are connected. Thus, the shift register, parallel data latch circuit, and parallel output terminals PB4 to PB7 of the driver IC chip 156 are connected to the driver 138c.
(Fig. 50).

The first special figure fluctuation display section 51 (lamp D1) and the second special figure fluctuation display section 52 of the collective display device 50
(Lamp D2) is a 7-segment type (8-segment type if dot Dp is included) display, so the batch display device 50 can be controlled as a 4-digit by 8-segment LED display. In this case, the digit lines (LED digits 0-3) will select the digits.

The gate driver 183 is used for signal amplification and the like, and is connected to the terminals PB4 to PB7.
The wiring from is branched in two directions. A pull-up resistor R1 is connected to the wiring from the terminals PB4 to PB7. The input terminals I3 and I7 of the gate driver 183 are connected to the wiring from the terminal PB4 of the driver IC chip 156, and the input terminals I2 and I5 are connected to the wiring from the terminal PB5 of the driver IC chip 156. I1 and I8 are connected to wiring from terminal PB6 of driver IC chip 156, and input terminals I4 and I6 are connected to wiring from terminal PB7 of driver IC chip 156. FIG. Signals at input terminals I1-I8 are amplified and output from output terminals O1-O8. The output terminals O5-O7 related to the digit line are connected to the terminals L9-L12 of the connector section 185 (CN4), while the output terminals O1-O4 related to the digit line are of a 4-digit 7-segment type (including dot Dp). It connects to the digit lines (digits 0-3) of the performance display device 152, which is an 8-segment LED display. By sharing the terminals PB4-PB7 with the digit lines (digits 0-3) of the performance display device 152 and the digit lines (LED digits 0-3) of the collective display device 50, the cost can be reduced.

Terminals PA0-PA7 of the parallel output terminals of driver IC chip 157 are connected to terminals L1-L8 of connector section 185 (CN4) through resistors R2, respectively. The connector part 185 (CN4) is connected to the collective display device 50 by an electric wire such as a cable. The parallel output terminals PA0-PA7 are electrically connected to the segment lines (LED segments 0-7) to which the anode terminals of the LED lamps of the collective display device 50 are connected. Thus, the shift register, parallel data latch circuit, and parallel output terminals PA0-PA7 of the driver IC chip 157 constitute the driver 138b (FIG. 50).

A current is supplied to the anode terminal of the LED through the segment line (LED segments 0-7) of the collective display device 50, and the current is extracted through the digit line (LED digits 0-3) from the cathode terminal that outputs the ground potential. Then, a current flows through the LEDs sequentially selected by the dynamic driving method (dynamic lighting method) to light them.

Terminals PB0 to PB7 among the parallel output terminals of the driver IC chip 157 are
They are electrically connected to the segment lines (ag, Dp) of the performance display device 152, which is a 4-digit 7-segment type (8-segment type including dot Dp) LED display. Thus, the shift register, parallel data latch circuit, and parallel output terminals PB0 to PB7 of the driver IC chip 157 constitute the driver 150 (FIG. 50).

A current is supplied to the anode terminal of the LED (light-emitting member, segment) through the segment lines (ag, Dp) of the performance display device 152, and the ground potential is output through the digit line (digits 0-3) from the cathode terminal. By extracting the current with the LED, the current flows through the LEDs sequentially selected by the dynamic driving method, and the LEDs are lit. In this way, the performance display device 152 can display the set probability value, and also displays performance information such as the ratio of the role, the ball-out rate, the base value (the ball-out rate in the normal game state), and the number of discharged balls. can be displayed, but in this embodiment, the base value is particularly displayed. This embodiment can also be applied when the performance display device 152 displays performance information other than the base value. Of the performance information, the accessory ratio, ball output rate, and base value are information related to the number of prize balls.

As described above, the external information signal, the LED drive signal of the batch display device 50 (the signal to the digit line and the segment line), the LED drive signal of the performance display device 152 (the signal to the digit line and the segment line) are By the microcomputer 111, it is included in the serial data signal (TXA) synthesized in the output processing (A1306) and transmitted, and the driver IC chips 156 and 157
are output as parallel data signals.

FIG. 51B is a circuit diagram relating to serial communication between the game microcomputer 111 and the solenoid driver 138a in the game control device 100. Also, an electric circuit (electronic circuit).
The transmission status of the solenoid drive signal from the serial port 173a of the game microcomputer 111 is shown.

IC chips 138a-1 and 138a-2 for solenoid drivers are drivers (drive circuits) 138a (see FIG. 50) that generate and output solenoid drive signals as parallel data signals.
). The IC chip 138a-1 is a general 8-bit serial/parallel conversion circuit having a shift register and a parallel data latch circuit (data register). I
The C chip 138a-2 is connected to the IC by a Darlington connection that directly connects a plurality of transistors.
A Darlington current amplifier that amplifies the current signal from chip 138a-1.

A serial data signal (
TXA) is input to the input terminal SI of the IC chip 138a-1, and the IC chip 138a-1
pass through the shift register. Input terminal SCK and input terminal /G of IC chip 138a-1
, an input terminal /SCLR receives a serial clock signal (CKA), a gate signal (GATE) as an enable signal, and a reset signal from the Schmitt buffer 125 via a clock line 195b, an enable signal line 198b (198), and a reset line. 197b. The data line 194b may be branched from the data line 194a (FIG. 61A), and the clock line 195b may be branched from the clock line 195a (FIG. 51A).

The shift register of the IC chip 138a-1 operates with a serial clock signal (CKA). The parallel data latch circuit of the IC chip 138a-1 takes in the data of the shift register according to the chip select signal (SA1) input to the input terminal RCK. The chip select signal (SA1) here functions as a latch signal. IC chip 138
The data fetched into the parallel data latch circuit a-1 is output to the parallel output terminals (QA-Q) as an 8-bit parallel data signal when the gate signal (GATE) is input.
H). A gate signal (GATE) functions as an enable signal that enables the output of the IC chip 138a-1. When the gate signal (GATE) is input to an output circuit such as a three-state buffer, the parallel data signal is output from the parallel output terminals (QA-QH) through the output circuit that is enabled for output operation. Also, the IC chip 138a-1 is reset by a reset signal, and internal data is cleared.

Of the parallel data signals generated from the serial data signal (TXA) by the IC chip 138a-1, the signal from the parallel output terminal QE is used as a launch permission signal for permitting the launch of the game ball by the ball launcher, and is used for payout control. Output is directed to the device 200 . Signals from the parallel output terminals QA-QC are output as a grand winning opening solenoid drive signal, a lever solenoid drive signal, and a general electric solenoid drive signal, respectively. In other words, the grand prize winning opening solenoid drive signal, the lever solenoid drive signal, and the general electric solenoid drive signal are transmitted from the game microcomputer 111 in a serial data signal (TXA), and the IC chip 138
a-1 is output as a parallel data signal. Even if the number of solenoids differs depending on the model of the gaming machine 10, the drive signal for the solenoids is sent to the gaming microcomputer 111 (CPU 11).
1a), the wiring required for parallel communication can be reduced, and the game control device 100 (game control means) can be easily shared between different models.

Here, the large winning opening solenoid drive signal is a signal for driving the large winning opening solenoid 39b that opens the special variable winning device 39, and the lever solenoid driving signal drives the lever solenoid 86b that opens the specific area 86. The general electric solenoid drive signal is a signal for driving the general electric solenoid 37c that opens the movable member 37b of the normal variable winning device 37. FIG.

The IC chip 138a-2 amplifies the big winning opening solenoid drive signal, the lever solenoid drive signal, and the general electric solenoid drive signal from the parallel output terminals QA-QC of the IC chip 138a-1. The driving signals from the parallel output terminals QA-QC of the IC chip 138a-1 are
They are input to the input terminals J1-J3 of the IC chip 138a-2 through the resistors R4 and output from the output terminals K1-K3 after amplification. The large winning opening solenoid drive signal, the lever solenoid driving signal, and the general electric solenoid driving signal from the output terminals K1-K3 are not only sent to the large winning opening solenoid 39b, the lever solenoid 86b, and the general electric solenoid 37c, respectively.
It is also transmitted to the relay board 70 (FIG. 50).

[Circuit diagram related to serial communication between game microcomputer and relay board]
FIG. 52 illustrates a circuit diagram relating to serial communication between the game microcomputer 111 and the relay board 70 in the game control device 100 (main board).
60 (CN1) is a circuit diagram illustrating an electric circuit (electronic circuit) around 60 (CN1).

As serial signals output from terminals B1-B3 of the serial port 173b of the game microcomputer 111, a serial data signal (TXB), a serial clock signal (CKB) and a chip select signal (SB0) are connected to the connector section 160 (CN1 ) terminal D7 (signal terminal) for serial data signal (TXB) and terminal D6 for serial clock signal (CKB)
(signal terminal) and the terminal D3 (chip select terminal) for the chip select signal (SB0) via the buffer 133 . When the serial port 173b performs serial communication with only one IC chip (slave), the chip select signal and the chip select line 218 through which the chip select signal is transmitted may be omitted.

The serial data signal (TXB) includes a test-firing test signal transmitted to relay board 70 electrically connected to connector section 160 (CN1). Unlike the conventional parallel data signal, the test-firing test signal relating to the gaming machine 10 is transmitted from the gaming microcomputer 111 to the relay board 70 as a serial data signal (TXB). The test-firing test signal is a signal in which information necessary for a test-firing test, such as ON/OFF information of various switches in FIG. Therefore, even if the number of switches differs for each model of the game machine 10, wiring for each switch that was required in the case of parallel communication can be reduced, and the game control device 100 (game control means) can be shared between different models. become easier to convert.

The serial data signal (TXB) is converted to a parallel data signal in the relay board 70 and then output to the test-firing test apparatus that conducts the test-firing test. Therefore, the relay board 70 can be easily shared between different models simply by preparing wiring necessary for serial communication in the relay board 70 (relay means) in advance.

The above various switches include a gate switch 34a, a starting port 1 switch 36a, a starting port 2 switch 37a, a prize winning port switch 35a, a big winning port switch 39a, a specific area switch 72, a remaining ball discharge port switch 73, and the like. Note that the solenoid drive signal as the test firing test signal is transmitted from the driver 138a to the relay board 70 through another route as described above.

In the timer interrupt processing (interrupt processing program, part of the game control program) of FIG.
U111a) is input and taken in (input processing (A1303), prize winning opening switch/state monitoring processing (A1310)), and then transmitted as a test firing test signal of serial data (
Trial test signal output processing (FIG. 57), which will be described later.

In addition, as the test-firing test signal to be transmitted and processed in the test-firing test signal output process (Fig. 57), the symbol 1 signal (set by A7916) corresponding to the stop symbol number of the normal figure variation display game, the stop of the special figure 1 variation display game Symbol 2 signal corresponding to the symbol number (set by A3403), symbol 3 signal corresponding to the stop symbol number of the special figure 2 fluctuation display game (set by A3503), general pattern (normal symbol, normal identification information) related to the start of fluctuation Normal figure 1 fluctuation signal (set by A7922), special figure 1 and special figure 2
Special figure 1, 2 fluctuation signal (set with A3205, A3210), special figure 1 and special figure 2 fluctuation end signal (set with A2609), normal 1 hit signal about the start of the normal figure hit ( A7610), special 1 and 2 hit signals related to the start of the special 1 and special 2 jackpots (set with A2610), signals related to right-handed or left-handed instructions (on/off of firing position designation signal 1) (A2610 and A2614, etc.), and a signal related to the start and end of the opening of the big winning opening (ON/OFF of the signal during operation of the special electric accessory 1) (set by A2611, A2613).

Furthermore, as a test firing test signal transmitted and processed in the test firing test signal output process (Fig. 57), a signal related to the start of operation of the normal fluctuation prize winning device 37 and the end of the normal electric operation (on/off of the signal during normal electric accessory 1 operation), high Signals related to the start and end of the probability state (special symbol 1 high probability state signal ON/OFF, special symbol 2 high probability state signal ON/OFF), signal related to the start and end of time saving (special symbol 1
ON/OFF of the variable time shortening state signal, ON/OFF of the special symbol 2 variable time shortening state signal, ON/OFF of the normal symbol 1 high probability state signal, ON/OFF of the normal symbol 1 variable time shortening state signal, etc.), the occurrence of an error in the game machine 10 There is a game machine error status signal that indicates.

Before executing the test-fire test signal output process (FIG. 57), the data of each test-fire test signal is stored and set in the test signal output data area in the first RAM area (FIG. 63) of the RAM 111c. It is

A test-firing test signal relating to the gaming machine 10 is transmitted to the relay board 70 via the connector section 160 (CN1) as a serial data signal (TXB).

The gaming microcomputer 111 also has a terminal OE to which an enable line 214 (enable wiring) that enables operation of the serial/parallel conversion circuit 192 (predetermined circuit) provided on the relay board 70 is connected. The enable signal (O
E) is a terminal D2 (enable terminal) for an enable signal of the connector section 160 (CN1)
, through the buffer 133 . A wiring through which an enable signal is transmitted is an enable line 214 . A pull-up resistor R is connected to the enable line 214 before connecting to the buffer 133 .

Further, the reset signal (RESET) from the Schmidt buffer 125 is transmitted through the buffer 133 to the reset signal terminal D10 (reset terminal) of the connector section 160 (CN1). Note that a wiring through which a reset signal is transmitted is referred to as a reset line 216 (reset wiring).

In addition, the connector section 160 (CN1) includes ground terminals D1 and D1 for grounding.
It has D4, D5, D8, D9, and power terminals D11, D12 to which a voltage of 5V is supplied.

The buffer 133 is a three-state buffer, and the input to the /1G terminal is L level (
GND), the logic value (L or H) of the input to the input terminals 1A1-1A4 is directly output from the output terminals 1Y1-1Y4, and when the input to the /1G terminal is H level, the input terminal 1A1-1A4 and output terminals 1Y1-1Y4 are in a high impedance state and electrically separated. When the input to the /2G terminal is L level (GND), the buffer 133 outputs the logical value (L or H) of the input to the input terminals 2A1-2A4 as it is to the output terminal 2Y.
1-2Y4, and when the input to the /2G terminal is at H level, the input terminal 2A1-
2A4 and the output terminals 2Y1-2Y4 are in a high impedance state and electrically separated. "/" indicates a negative logic terminal.

The buffer 133 corrects and outputs the voltage of the logical value (L level or H level) and is provided as an option. 133 becomes unnecessary.

In FIG. 52, since the input to the /1G terminal and /2G terminal is L level (GND), the signals input to the input terminals 1A1-1A4 and 2A1-2A4 are respectively output terminals 1Y1-1Y4.
, 2Y1-2Y4. Therefore, the reset signal (RESET), the serial data signal (TXB), the serial clock signal (CKB), the chip select signal (SB0), and the enable signal (OE) are connected to the input terminals 1A1, 1A3, 1A2, 1 of the buffer 133, respectively.
Input to A4 and 2A1, and output from output terminals 1Y1, 1Y3, 1Y2, 1Y4, and 2Y1 toward connector section 160 (CN1). Output terminal 1Y for reset signal (RESET)
1, output terminal 1Y3 for serial data signal (TXB), serial clock signal (CKB
), the output terminal 1Y4 for the chip select signal (SB0), and the output terminal 2Y1 for the enable signal (OE) are connected to the terminal D1 of the connector section 160 (CN1).
0, terminal D7, terminal D6, terminal D3, and terminal D2 by wiring.

〔Relay board〕
FIG. 53 is a circuit diagram illustrating a circuit diagram related to the relay board 70 and an electric circuit (electronic circuit) around the connector section 162 (CN2) and the serial/parallel conversion circuit 192. FIG.

In this embodiment, the relay board 70 is also a double-sided printed board (double-sided board) like the board (main board) of the game control device 100 . In this embodiment, circuit components (electronic components such as ICs and connectors) are arranged on the upper surface of the relay board 70 . Note that the circuit components may be arranged on both sides or the bottom surface of the relay board 70 . In the relay board 70, wiring such as the data line 211, the clock line 212, the enable line 214, the reset line 216, the chip select line 218, and the terminals to which these are connected are arranged on the upper surface (front side, upper layer) and the lower surface (back side, lower layer). It is arranged on the upper surface (it may be on the lower surface). Note that the relay board 70 may be a general multilayer printed board (multilayer board). In this case, data line 211, clock line 2
12. Wirings such as enable line 214, reset line 216, chip select line 218, etc. and terminals to which these are connected are arranged in the outer layer (top layer, surface layer), and the inner two layers (inner layer) are the power supply layer and the ground layer ( ground layer, GND layer).

The connector portion 162 (CN2) of the relay board 70 is connected to the connector portion 160 (CN1) of the game control device 100 (main board) by an electric wire such as a cable. connector portion 162 (CN
2) terminals F1-F12 are connected to terminals D1-D12 of the connector section 160 (CN1), respectively.
corresponding to the electrical connection. The connector portion 162 (CN2) has ground terminals F1, F4, F5, F8, and F9 for grounding, and power terminals F11 and F12 to which a voltage of 5V is supplied.

In this embodiment, in the relay board 70 (double-sided board), the ground terminals F1 and F4 on the upper surface
, F5, F8, and F9 are grounded by being connected to a ground line (not shown) present on the lower surface (back side, lower layer) through through holes, through vias, or the like. The power terminals F11 and F12 on the upper surface are connected to power lines (not shown) present on the lower surface (back side, lower layer) through through holes, through vias, or the like. A ground wire (not shown) to which these ground terminals are connected and a power wire (not shown) to which a power terminal is connected may exist on the upper surface (front side, upper layer). Also, the relay board 70
is a multilayer substrate, the ground terminals F1, F4, F5, F8, and F9 are connected to internal ground layers (ground layers, GND layers) by through holes, through vias, or the like. Also, the power terminals F11 and F12 are connected to the internal power layer by through holes, through vias, or the like.

A serial data signal (TXB), a serial clock signal (CKB), a chip select signal (SB0), an enable signal (OE), and a reset signal (RESET) from the connector section 160 (CN1) are respectively sent to the connector section 162 (CN2). terminals F7, F6, F3, F2 of
, F10 to the data line 211, the clock line 212, the chip select line 218, the enable line 214 and the reset line 216. FIG.

The serial data signal (TXB), serial clock signal (CKB), chip select signal (SB0), enable signal (OE), and reset signal (RESET) are
1 to the serial/parallel conversion circuit 192 . Serial/parallel conversion circuit 1
92, the test firing test signal (serial data) included in the serial data signal (TXB),
It converts it into a parallel data signal and outputs a test-firing test signal as parallel data.

The buffer 191 is a three-state buffer like the buffer 133, and corrects and outputs the logic value voltage (L level or H level). The buffer 191 connects the input terminals NA1 to NA8 when the inputs to the /1G terminal and the /2G terminal are both at L level (GND).
is output from the output terminals NY1 to NY8 as it is, and when any of the inputs to the /1G terminal and /2G terminal is at H level, the input terminals NA1 to NA8 are output as they are.
and the output terminals NY1 to NY8 are in a high impedance state and electrically separated. "/" indicates a negative logic terminal. In FIG. 53, the inputs to the /1G terminal and the /2G terminal are both L level (GND), and the signals applied to the input terminals NA1 to NA8 are respectively output to the NY terminal.
Output from 1-NY8.

A reset line 216 and a data line 211 from the connector section 162 (CN2) are connected to the buffer 1
91 input terminals NA1 and NA2. A reset signal (RESE
T) and the serial data signal (TXB) on the data line 211 are respectively input to the input terminals NA1 and NA2 of the buffer 191 and output from the output terminals NY1 and NY2 to the serial/parallel conversion circuit 192 .

On the other hand, the clock line 212 is bifurcated and connected to the input terminals NA3 and NA4 of the buffer 191 . The serial clock signal (CKB) on the clock line 212 is input to the input terminals NA3 and NA4 of the buffer 191, and the serial clock signal C is output from the output terminals NY3 and NY4.
They are output to the serial/parallel conversion circuit 192 as KB1 and CKB2.

The chip select line 218 is branched into two and connected to the input terminals NA5 and NA6 of the buffer 191 . A chip select signal (SB0) on the chip select line 218 is
are input to the input terminals NA5 and NA6, and output from the output terminals NY5 and NY6 to the serial/parallel conversion circuit 192 as chip select signals SB01 and SB02.

The enable line 214 is branched into two and connected to the input terminals NA7 and NA8 of the buffer 191. FIG. The enable signal (OE) on the enable line 214 is connected to the input terminal NA of the buffer 191.
7 and NA8, and output from output terminals NY7 and NY8 to the serial/parallel conversion circuit 192 as enable signals OE1 and OE2.

A pull-up resistor R is connected to the data line 211 , the clock line 212 , the enable line 214 , the reset line 216 and the chip select line 218 before being connected to the buffer 191 .

The serial-to-parallel conversion circuit 192 consists of ten 8-bit serial-to-parallel conversion IC chips 192a to 192j connected in cascade, converts a maximum 8×10-bit serial data signal (TXB) into a parallel data signal, and converts it into a test firing test signal. can be output as The serial data signal (TXB) is sequentially serial-parallel converted IC chip 192a-1.
Pass 92j.

Five 8-bit serial-to-parallel conversion IC chips 192a-192e (first group)
and five 8-bit serial-to-parallel conversion IC chips 192f-192j (second group)
, branched serial clock signals CKB1 and CKB2, chip select signal S
B01, SB02 and enable signals OE1, OE2 are input in parallel at the same time. Therefore, the serial-to-parallel conversion IC chips 192a-192e of the first group and the serial-to-parallel conversion IC chips 192f-192j of the second group operate synchronously, and parallel data signals (test firing test signals) are generated simultaneously by the enable signals OE1 and OE2. signal). A reset signal (RESET) can be simultaneously input in parallel to each of the serial/parallel conversion IC chips 192a to 192j. That is, the serial/parallel conversion circuit 192
A reset signal for each serial/parallel conversion IC chip 192a-192j
are reset (initialized) at the same time, and the internal data is cleared.

Each serial/parallel conversion IC chip 192a-192j is a general 8-bit serial/parallel conversion circuit having a shift register and a parallel data latch circuit (data register). Chip select signals SB01 and SB02 (SB0) function as latch signals. The parallel data latch circuit takes in the data of the shift register according to the chip select signals SB01 and SB02. Each serial/parallel conversion IC chip 192a-1
The data fetched into the parallel data latch circuit 92j is output by the enable signal OE (OE
1 or OE2) is input, it is output as an 8-bit parallel data signal. By inputting the enable signal OE to an output circuit such as a three-state buffer,
Parallel data signals are output through the output circuit that is enabled for output operation.

[Main processing (game control device)]
FIG. 54 is a flow chart showing the procedure of the second half of the main processing according to the third embodiment. Note that processing other than step A1043a is the same as the main processing (FIG. 5B) of the first embodiment, and description thereof is omitted.

The game control device 100, between steps A1043 and A1044, step A1043
In a, the normal base state information is saved in the normal base state determination area (normal base state determination flag area). Here, the normal base state information is a value (for example, 55h=01010101B) indicating the normal game state in which the base value (ball payout rate in the normal game state) is obtained.

At the time of RAM initialization (RAM clear) (the result of A1041 is "Y"), or in the setting variable state (
setting change mode) is completed (result of A1040 is "Y"), step A1042
- Since the RAM initialization process of A1043 is executed, the game state after step A1043 becomes a normal game state.

In the special game state (jackpot state) or specific game state (probability variable state, time saving state) other than the normal game state, the normal base state information is saved in the normal base state determination area. The non-normal base state information is a value (for example, 00h=00000000B) indicating a special game state or a specific game state in which a base value (ball output rate in a normal game state) cannot be obtained.

[Timer interrupt processing]
FIG. 55 is a flow chart showing the procedure of timer interrupt processing according to the third embodiment.
Processing other than steps A1319a and A1321-A1323 is the same as the timer interrupt processing (FIG. 6A) of the first embodiment, and the description thereof is omitted.

The game control device 100, after step A1319, in step A1319a,
The information (value) of the flag register 1200 (see FIG. 64), which will be described later, is saved (PUSHed) in the stack area of the RAM 111c. The stack area is, for example, a stack area for game control, which will be described later. Then, a performance display monitor control process (performance display setting process) for controlling the display of the performance display device 152 is executed (A1320). Details of the performance display monitor control process (performance display setting process) according to the third embodiment will be described later.

After that, the game control device 100 saves the information of the flag register 1200 to the RAM
111c is restored (POP) from the stack area (A1321).

Next, the game control device 100 determines whether or not the initial display setting flag is on (A
1322). The initial display setting flag is stored in the initial display setting flag area (FIG. 63) of the RAM 111c.
), and when the game machine 10 is powered on (or power is restored), it is set to ON as an initial value for RAM initialization, for example (A1043). By setting the initial display setting flag to ON, the initial display is performed on the performance display device 152 for a predetermined period (for example, about 5000 ms) immediately before starting to display the performance display (performance information) after power-on. The initial display is executed in the initial display timer update process (FIG. 59), which will be described later, and is for confirming the operation of all segments of each digit of the performance display device 152 .

When the initial display setting flag is ON (result of A1322 is "Y"), the game control device 100 clears the initial display setting flag (A1323) and terminates the timer interrupt processing. If the initial display setting flag is off (the result of A1322 is "N"), the timer interrupt processing is terminated. As a result, the initial display setting flag is set to the OFF state at the end of the first timer interrupt process after power-on (or power recovery) of the gaming machine 10 .
That is, only immediately after the power is turned on, the initial display setting flag is set to ON, and the initial display is executed on the performance display device 152 only once.

[Output processing]
Next, details of the output processing (A1306) in the timer interrupt processing described above will be described. FIG. 56 is a flowchart showing the procedure of output processing according to the third embodiment.

The game control program includes a main program corresponding to main processing (FIGS. 5 and 54) and an interrupt processing program corresponding to timer interrupt processing. An output processing program corresponding to output processing, which is a subroutine of the interrupt processing program, is stored in the ROM 11.
It becomes part of the game control program stored (stored) in the first ROM area (FIG. 62) of 1b.

The game control device 100 first outputs off data to the port that outputs the data of the segments (ag, Dp, LED segments 0-7) of the performance display device 152 and the batch display device (LED) 50 and resets ( A1501). In this embodiment, this port is a serial port 173a capable of outputting data to the IC chip 157 for driver.

The off-data of the segment of the performance display device 152 is the driver IC chip 1 of FIG. 51A.
segment lines (
a−g, Dp). The segment off data of the collective display device (LED) 50 is output to the segment lines (LED segments 0-7) of the collective display device (LED) 50 via the parallel output terminals PA0-PA7 of the driver IC chip 157. be.

Next, the game control device 100 acquires digit output data as output data for the digit line of the LED corresponding to the value of the digit counter (A1502). For example, the digit output data is "11100000B", "1
1010000B", "10110000B", and "01110000B". Next, the acquired digit output data of the digit line and the external information data are combined (A1503), and the combined data is output to the digit/external information output port (A1504). In this embodiment,
The digit/external information output port is the serial port 173a.

As shown in FIG. 51A, the digit output data is transmitted to the digit lines (LED digits 0-3) of the batch display device 50 and the performance display device 152 via the shared parallel output terminals PB4-PB7 of the driver IC chip 156. digit lines (digits 0-3). For the digit output data here, the value of the digit counter is incremented by 1 in step A1506, which will be described later.
This is for extinguishing the digits (lighting digits, display digits) that were selected before updating with segment OFF data. The external information data here correspond to the door signal, the door/frame opening signal, the number of pattern determination signal, and the starting port signal, and are connected to the parallel output terminal PB0 of the driver IC chip 156.
It is output to the external information terminal 71 or the like via -PB3.

Subsequently, the game control device 100 synthesizes and outputs various output data of external information to be output to the external information port (A1505). In this embodiment, the external information port is serial port 173a.

As shown in FIG. 51A, the various output data of the external information correspond to the jackpot 1 signal, the jackpot 2 signal, the jackpot 3 signal, the jackpot 4 signal, the main prize ball signal, the security signal, the out signal, and the call signal. It is output to the external information terminal 71 via the parallel output terminals PA0-PA7 of the IC chip 156 for driver.

As described above, the driver IC chips 156 and 157 output data to the parallel output terminals (PA0 to PA7, P
B0-PB7), so that a total of 32-bit serial-to-parallel conversion circuit is formed, and the serial data signal (TXA) is converted into 32-bit parallel data.

For this reason, segment off data, digit output data, external information data (starting port signal, pattern confirmation number signal, door/frame open signal, door signal, call signal, Out signal, security signal, main prize ball signal, 4 jackpot signals, 3 jackpot signals, 2 jackpot signals, 1 jackpot signal) are continuously output from the serial port 173a as a 32-bit serial data signal (TXA). . Therefore, steps A1501-A1505 (the same applies to steps A1508-A1514, which will be described later) are a series of continuous processes.

After that, the game control device 100 displays the collective display device (LED) 50 and the performance display device 152
The value of the digit counter for sequentially scanning the digit lines (LED digits 0-3, digits 0-3) is updated by +1 within the range of 0 to 3 (A1506). In addition, when it is "3", the updated value becomes "0" by +1 update.

As described above, the digit lines (LED digits 0-3) of the collective display device 50 and the digit lines (digits 0-3) of the performance display device 152 are shared parallel output terminals of the driver IC chip 156. Driven by a common drive signal from PB4-PB7. Then, when the value of the digit counter is 0 indicating the 0th digit, LED digit 0 and digit 0 are
LED digit 1 and digit 1 when the digit counter value is 1 indicating 1 digit, LED digit 2 and digit 2 when the digit counter value is 2 indicating 2 digits, and LED digit 2 and digit 2 when the digit counter value is 3 digits. In the case of 3 shown, LED digit 3 and digit 3 output a voltage (ground potential) that draws current from the segment line. Thus, by updating the value of the digit counter, both the 8-segment LEDs (eight LEDs associated with one digit) of the batch display (LED) 50 and the digits of the performance display 152 are sequentially selected. . Then, the LE of the digit (lighting digit, display digit) sequentially selected by the dynamic driving method (dynamic lighting method)
D is energized and lights up.

Next, the game control device 100 determines whether or not the initial display setting flag is on (A
1507). If the initial display setting flag is ON (result of A1507 is "Y"), the process proceeds to step A1515. On the other hand, when the initial display setting flag is off (A
1507 result is "N"), as performance display output processing, the output data (display data) of the digit corresponding to the updated digit counter of the performance display device 152 is transferred to the 0th to 3rd digit output data area. It loads from one of the digits and outputs it to the digit output port (A1508), and shifts to the processing of step A1509.

That is, if the digit counter is 0, the output data is loaded from the 0th digit output data area, if the digit counter is 1, the output data is loaded from the 1st digit output data area, and if the digit counter is 2, the output data is loaded. Output data is loaded from the digit output data area, and if the digit counter is 3, output data is loaded from the 3rd digit output data area and output to the digit output port. As a result, the display data is sequentially displayed at high speed in the 0th to 3rd digits (digits 0 to 3) of the performance display device 152 by updating the digit counter, and the performance information can be displayed.

The output data area of the 0th to 3rd digits of the performance display is located in the outside work area in the second RAM area (FIG. 63) of the RAM 111c. The 0th to 3rd digit output data areas are collectively called a performance display data area.

In this embodiment, the digit output port is serial port 173a. The digit output data is ON/OFF data for all segments of one digit, and is sent to the segment lines (a to g,
Dp). For example, the output data for a digit (Dp, g, f, e, d, c, b, a) is "00111111B" (1 is on, 0 is off ), and to display the number "3", it becomes "01001111B".

Next, the game control device 100 loads the output data of the segment line (LED segments 0-7) of the collective display device (LED) 50 from the segment area corresponding to the value of the digit counter after updating (A1509), The loaded data is output to the segment output port (A1510). The segment area is located in the game control work area of the RAM 111c (
See Figure 63). In this embodiment, the segment output port is the serial port 173a.
is.

Subsequently, similarly to A1502-A1504, the game control device 100 acquires digit output data as output data of the digit line of the LED corresponding to the value of the digit counter after updating (A1511), and digits of the acquired digit line Output data and external information data are synthesized (A1512), and the synthesized data is output to the digit/external information output port (A15
13). In this embodiment, the digit/external information output port is the serial port 173a. For example, the digit output data is the updated digit counter value 0 to
3, "11100000B""11010000B""10110000
B" and "01110000B".

Next, similarly to A1505, the game control device 100 synthesizes and outputs various types of output data of external information to be output to the external information port (A1514). In this embodiment, the external information port is serial port 173a.

After that, the game control device 100 synthesizes the solenoid drive signal data to be output to the solenoid signal output port (A1515). Here, each solenoid drive signal data is shown in FIG.
These are the data of the big winning opening solenoid drive signal, the lever solenoid drive signal, and the general electric solenoid drive signal output via the parallel output terminals QA-QC of the IC chip 138a-1 for the B solenoid driver.

Subsequently, the game control device 100 further synthesizes the synthesized data and the launch permission output data (A1516), and finally outputs the synthesized data to the solenoid signal/fire permission signal output port (A1517). In this embodiment, the solenoid signal/fire permission signal output port (solenoid signal output port and fire permission signal output port) is driven by driver 138a-1.
is a serial port 173a capable of outputting data to the .

After that, the game control device 100 saves (PUSHs) information (value) of the flag register 1200 (see FIG. 64) to the stack area of the RAM 111c (A1518). In this embodiment, the stack area here is a stack area for game control, which will be described later.

Next, the game control device 100 executes a trial shooting test signal output process (A1519). In the test-fire test signal output process, data to be transmitted to each test terminal output port on the relay board 70 that outputs the test-fire test signal to the test-fire test device is loaded and synthesized, and the synthesized data is sent to the test signal output port. Output. Each test terminal output port on the relay board 70 is each serial/parallel conversion IC chip 192a to 192j in FIG. In this embodiment, the test signal output port is the serial port 173b capable of outputting data toward the relay board 70 and the serial/parallel conversion circuit 192, not the serial port 173a. That is, the serial port 173b (second serial port), which is an output port used in the test firing test signal output processing, is composed of A1501, A1504, A1505, A1508, A1510, A1513,
The serial port 173a (
first serial port).

In this way, the test-firing test signal (serial data signal) to be transmitted to the relay board 70 (relay means) is output from the serial port 173b different from the serial port 173a. For this reason, even if parts related to the test fire test (for example, the buffer 133 and the connector section 160 as described above) are not mounted during mass production (other than during the test fire test), the drivers 138a to 138d and 150 can be connected to the serial port 173a. It does not affect the control of the external information terminal 71, the collective display device 50, the solenoids 39b, 37c, 86b, the performance display device 152, etc., which are connected via (drive means).

After that, the game control device 100 saves the information of the flag register 1200 to the RAM
111c is restored (POP) from the stack area (A1520).

[Trial test signal output processing]
Next, the details of the test firing test signal output process (A1519) in the output process described above will be described. FIG. 57 is a flow chart showing the procedure of the test-firing test signal output process. The test-firing test signal output program corresponding to the test-firing test signal output process is a subroutine called by a call instruction (CALL instruction) from the output processing program. The test firing test signal output program itself is stored (stored) in the second ROM area (FIG. 62) of the ROM 111b, and is not stored (stored) in the first ROM area of the ROM 111b.

The game control device 100 first stores the stack pointer in the stack pointer storage area (Fig. 63
) (A1701). The stack pointer storage area is located at the last address in the outside work area (second work area) provided in the second RAM area (FIG. 63) of the RAM 111c. It is cut as a stack area for outside the area. After that, the initial value for outside area, that is, the start address of the stack area for outside area (FIG. 63) is set in the stack pointer (A1702).

Then, the game control device 100 saves (PUSH) the information (values) of all the registers of the CPU 111a to the stack area outside the area (FIG. 63) (A1703). Here, all registers are general-purpose registers (WA, BC, DE, HL, IX, IY) of register bank 0 and general-purpose registers (WA, BC, DE, HL, IX, IY) of register bank 1 (see FIG. 64). ).

In this way, before outputting the test-fire test signal data in the following steps A1704 to A1709, the information (value) of the register provided in the CPU 111a (arithmetic processing means) is transferred to the RA
Save to the stack area of M111c (update information storage means). The register of the CPU 111a may be affected by noise or the like from devices outside the game machine, such as the relay board 70 and the test firing test device, while the data of the test firing test signal is being output. and protect it. Performance display output processing for outputting performance information display data (
A1508), etc., before output processing unrelated to the device outside the game machine, there is no need to protect the information in the register, and the information (value) in the register of the CPU 111a is not saved to the stack area. capacity can be reduced.

Next, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 1 that outputs the test firing test signal to the test firing test device, and outputs the synthesized data to the serial port 173b as the test signal output port. Output (A1704). The test terminal output port 1 corresponds to the 8-bit serial/parallel conversion IC chip 192f of the relay board 70. FIG. The test-firing test signal output from the test terminal output port 1 to the test-firing test apparatus is only the symbol 1 signal indicating the stop symbol number of the normal pattern variation display game. In addition, the data of each test firing test signal to be loaded is R
It is stored and set in the test signal output data area in the first RAM area (FIG. 63) of the AM 111c.

Next, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 2 that outputs the test firing test signal to the test firing test device, and outputs the synthesized data to the serial port 173b as the test signal output port. Output (A1705). The test terminal output port 2 corresponds to the 8-bit serial/parallel conversion IC chip 192 e of the relay board 70 . The test-firing test signal output from the test terminal output port 2 to the test-firing test device is the symbol 3 signal corresponding to the stop symbol number of the special figure 2 variation display game and the signal during special figure 2 variation, and these signals are combined. be.
In addition, the pattern 3 signal and the special figure 2 fluctuation signal are defined by different bits in the 8-bit data and do not interfere.

Subsequently, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 3 that outputs the test firing test signal to the test firing test device, and outputs the synthesized data to the serial port 173b as the test signal output port. Output (A1706). The test terminal output port 3 is
It corresponds to the 8-bit serial-to-parallel conversion IC chip 192 d of the relay board 70 . The test-firing test signal output from the test terminal output port 3 to the test-firing test device is a symbol 2 signal corresponding to the stop symbol number of the special figure 1 variation display game and a signal during special figure 1 variation, and these signals are synthesized. be. In addition, the symbol 2 signal and the special figure 1 fluctuating signal are defined by different bits in the 8-bit data and do not interfere.

After that, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 4 that outputs the test-fire test signal to the test-fire test device, and outputs the synthesized data to the serial port 173b as the test signal output port. (A1707). The test terminal output port 4 is
It corresponds to the 8-bit serial/parallel conversion IC chip 192c of the relay board 70. FIG. The test-firing test signal output from the test terminal output port 4 to the test-firing test device is a normal figure 1 fluctuating signal, a normal symbol 1 high probability state signal (general 1 high probability), and a special symbol indicating time saving of special figure 1. It is a 1 fluctuation time reduction state signal and a special symbol 2 fluctuation time reduction state signal indicating time reduction of special figure 2, and these signals are synthesized. These signals are defined by different bits in the 8-bit data and do not interfere.

Next, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 5 that outputs the test firing test signal to the test firing test device, and outputs the synthesized data to the serial port 173b as the test signal output port. Output (A1708). The test terminal output port 5 corresponds to the 8-bit serial/parallel conversion IC chip 192b of the relay board 70. FIG. The test-firing test signals output from the test terminal output port 5 to the test-firing test device are a general one-hit signal regarding the start of a normal figure hit, a normal electric accessory 1 operating signal regarding the start of operation of the normal variable winning device 37,
A special 1 small winning signal related to the start of the special 1 small win (if there is a special 1 small win), a special 1 winning signal related to the start of the special 1 big win, and a special 2 small winning start Special 2 small hit signal (if there is a special 2 small hit), Special 2 hit signal related to the start of the special 2 big hit, Signal related to the start of opening the big winning opening of the special variable winning device 39 (special electric accessory 1 in operation signal) and a signal (special electric accessory 2 in operation signal) related to the start of opening the big winning opening of another special variable winning device (if it exists other than the special variable winning device 39) , these signals are synthesized. These signals are defined by different bits in the 8-bit data and do not interfere.

Subsequently, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 6 that outputs the test firing test signal to the test firing test device, and outputs the synthesized data to the serial port 173a as the test signal output port. Output (A1709). The test terminal output port 6 is
It corresponds to the 8-bit serial/parallel conversion IC chip 192a of the relay board 70. FIG. The test-firing test signal output from the test terminal output port 6 to the test-firing test device includes a signal indicating either a right-handed shot instruction or a left-handed shot instruction (firing position designation signal 1), and a game signal indicating the occurrence of an error in the game machine 10. A machine error state signal, a condition 1 valid signal, a role 1 valid signal, a conditional device operating signal indicating the occurrence of a V prize, and a special fluctuation prize device operating continuously (accessory continuous operation). and the active signal shown, and these signals are synthesized. These signals are defined by different bits in the 8-bit data and do not interfere.

At the end of step A1709, chip select signals SB01 and SB02 and enable signals OE1 and O
E2 are input simultaneously in parallel. Therefore, the 8-bit serial/parallel conversion IC chips 192f-192a of the serial/parallel conversion circuit 192 simultaneously output the test firing test signal (parallel data signal). Since no test firing test signal (serial data signal) is transmitted to the unused 8-bit serial-to-parallel conversion IC chips 192g-192j, each 8-bit serial-to-parallel conversion IC chip 192g-192j outputs zero 8-bit data "00000000B" is output as a parallel data signal.

Next, the game control device 100 restores (POPs) the information (values) of all the registers of the CPU 111a from the outside stack area (FIG. 63) (A1710). Then, the value of the stack pointer storage area (FIG. 63) is loaded into the stack pointer (A1711), and the output processing is terminated.

In addition, in each step of A1704-A1709, the game control device 100 sends to each of the test terminal output ports 1 to 6 (8-bit serial-to-parallel conversion IC chip 192f-192a) that outputs the test-fire test signal to the test-fire test device. data are loaded and synthesized, and the synthesized data is output to the serial port 173a as a test signal output port. note that,
If the 8-bit serial-parallel conversion IC chips 192g-192j are also used, the test terminal output ports 7 to 10 (8-bit serial-parallel conversion IC chips 192j-192g
) are loaded and synthesized, and the synthesized data is output to the serial port 173a.

[Performance display monitor control processing (performance display setting processing)]
Next, performance display monitor control processing (performance display setting processing) in the timer interrupt processing described above
Details of (A1320) will be described. FIG. 58 is a flow chart showing the procedure of performance display monitor control processing.

A performance display monitor control program (performance display setting program) corresponding to the performance display monitor control process is a subroutine called by a call instruction (CALL instruction) from the interrupt processing program. The performance display monitor control program itself, including its subroutines (programs for processing such as A1904, A1905 and A1907), is stored in the ROM 11.
1b is stored (stored) in the second ROM area (FIG. 62), and the first ROM of the ROM 111b
It is not stored (memorized) in the area.

The game control device 100 first stores the stack pointer in the stack pointer storage area (Fig. 63
) (A1901). The stack pointer storage area is located at the last address in the outside work area (second work area) provided in the second RAM area (FIG. 63) of the RAM 111c. It is separated as a stack area for outside the area (such as a stack area for displaying performance). After that, the initial value for performance display control, that is, the head address of the outside stack area (performance display stack area, etc.) (FIG. 63) is set in the stack pointer (A1902).

Next, the game control device 100 saves (PUSH) the information (values) of all the registers of the CPU 111a to the outside stack area (FIG. 63). Here, all registers are general-purpose registers (WA, BC, DE, HL, IX, IY) of register bank 0 and general-purpose registers (WA, BC, DE, HL, IX, IY) of register bank 1 (see FIG. 64). ) (A1903).
The processing of A1901-A1903 is the same processing as A1701-A1703.

After that, the game control device 100 executes a second work RAM check process for checking (inspecting) the outside work area (second work area) in the second RAM area (FIG. 63) of the RAM 111c (A1904). . In the second work RAM check process, the work area outside the area (second work area) is checked. Set initial value. Note that the stack pointer storage area and the outside stack area are not cleared.

Subsequently, the game control device 100 executes the initial display timer update process (FIG. 59) for executing the control related to the initial display (A1905).

After that, the game control device 100 transfers the switch detection information (SW detection information) of the game control work area (first work area) in the first RAM area (FIG. 63) of the RAM 111c to the second RAM area. A process of copying to the non-area work area (second work area) in the . In this process, the switch detection information (rising edge) of the switch whose detection state (on state) has changed to the signals of the input ports 122, 123, 124, and 126 is copied.

When copying, the switch detection information of the switch unrelated to the calculation of the base value (ball payout rate in normal game state) is erased. Switches unrelated to the calculation of the base value are basically switches or sensors (gate switch 34a, radio wave sensor 62, front frame open detection switch 64, etc.) that do not detect prize balls even if they are detected, but out ball detection Switch 74 is omitted as it is involved in calculating the base value. That is, in this embodiment, the starting port 1 switch 36a, the starting port 2 switch 37a, the winning port switch 35a, the big winning port switch 39a, and the out ball detection switch 7
4, the switch detection information (rising edge) of the switch that has changed to the detection state (ON state) is copied.

With the above copy, in the processing related to the update of the display content of the performance display (the display content update processing of the performance display monitor control processing, the performance display monitor aggregation processing), the work area outside the area in the second RAM area (second work area) area), it becomes easier to create and understand programs related to performance display (performance display monitor control program and performance display monitor tallying program, which will be described later).

Next, the game control device 100 executes display content update processing (A1907). In the display content update process, the display mode displayed on the performance display device 152 is managed, and the performance information (base value in this embodiment) calculated in the performance display monitor aggregation process (performance display edit process, A1052 of the main process) is updated. Based on this, the digit output data (display data) of the performance display device 152 is set in the 0th to 3rd digit output data areas. The 0th to 3rd digit output data area is RAM 111c
63) in the outside work area (second work area) provided in the second RAM area (FIG. 63).

Subsequently, the game control device 100 restores (POPs) the information (values) of all the registers of the CPU 111a from the outside stack area (FIG. 63) (A1908). Then, the value of the stack pointer storage area (FIG. 63) is loaded into the stack pointer (A1909), and the performance display monitor control process is terminated.

[Initial display timer update process]
Next, the details of the initial display timer update process (A1905) in the performance display monitor control process (performance display setting process) described above will be described. FIG. 59 is a flow chart showing the procedure of initial display timer update processing.

The game control device 100 first determines whether or not the initial display setting flag is on (A
2001). If the initial display setting flag is off (the result of A2001 is "N"), the process proceeds to step A2005.

The game control device 100, when the initial display setting flag is on (the result of A2001 is "Y
”), and save the timer initial value (for example, equivalent to about 5000 ms) in the initial display timer area (
A2002), save a timer initial value (corresponding to about 300 ms, for example) in the blink control timer area (A2003), and save the initial value in the blink control pointer area (A2004).

Note that the initial display timer area, blink control timer area, and blink control pointer area are R
It is provided in the outside work area (second work area) in the second RAM area (FIG. 63) of the AM 111c.

Next, the game control device 100 determines whether or not the initial display timer is 0 (A200
5). If the initial display timer is not 0 (the result of A2005 is "N"), the initial display timer is updated by -1 (A2006). If the initial display timer is 0 (the result of A2005 is "Y"), that is, if the initial display timer has timed out or has already timed out, the initial display timer update process is terminated.

In the above-described display content update process (A1907), when the blink control timer in the blink control timer area is updated and the blink control timer times up, the blink control pointer in the blink control pointer area is updated. The flashing control pointer alternately indicates data for the lighting state and data for the lighting state. As a result, immediately after the game machine 10 is powered on, all segments (all LEDs, all light-emitting members) of each digit of the performance display device 152 are flashed to perform the initial display for a predetermined period (for example, about 5000 ms). The flashing cycle is twice the timer initial value in the flashing control timer area (for example, about 300ms×2), and the number of flashing repetitions is 5000/600≈.
8 times. With such an initial display, it can be confirmed whether or not all segments of each digit of the performance display device 152 operate normally when the power is turned on.

[Performance Display Monitor Aggregation Processing (Performance Display Editing Processing)]
Next, as an example of the performance display edit processing (A1052) in the main processing (FIG. 54) described above, the performance display monitor aggregation processing will be described. FIG. 60 shows the performance display monitor aggregation process (
10 is a flowchart showing a procedure of performance display editing processing).

Note that the performance display monitor tabulation program (performance display edit program) corresponding to the performance display monitor tabulation process is a subroutine called by a call instruction (CALL instruction) from the main program. The performance display monitor summary program itself is a subroutine (
A2204, A2209, etc.), the second RO of the ROM 111b
It is stored (stored) in the M area (FIG. 62) and is not stored (stored) in the first ROM area of the ROM 111b.

Similar to A1901-A1904, the game control device 100 first saves the stack pointer in the stack pointer storage area (A2201), and then sets the stack pointer to the initial value for performance display control, that is, the outside stack area ( performance display stack area, etc.) (A2202), saves (PUSH) the information (values) of all registers of the CPU 111a to the stack area outside the area (A2203), and stores it in the second RAM area of the RAM 111c. Second work R to check (inspect) a work area outside a certain area (second work area)
AM check processing is executed (A2204).

Next, the game control device 100 determines whether or not the current management section is switched (
A2205). A management section is a measurement section defined for the number of out balls (the number of discharged balls) within a predetermined range, and a plurality of management sections are continuously provided (see FIG. 69). The number of out balls here is the total number of out balls, which is the number of out balls in all gaming states. The total game state includes not only the normal game state but also game states other than the normal game state (special game state, specific game state, etc.).

In this embodiment, as a management section that is a measurement section of the base value, section A (0≦X< 300)
, Section B (300≦X<60300), Section C (60300≦X<120300), Section D (120300≦X<180300), Section E (180300≦X<240300),
are provided (see FIG. 69). The switching of the management section is the boundary between the adjacent management sections.
0300, 180300, and so on.

The range (width) of section A is 300, and the range (width) of other sections is 60000. Therefore, when the total out count SOUT, which indicates the count value of the total number of out balls in each management section, reaches a predetermined value (300 in section A, 60000 in other sections), the management section shifts to the next management section and switches. .

Then, the game control device 100, in the case of switching of the management section (result of A2205 is "Y"), executes the initial setting at the time of section switching (A2206), and step A22.
10 processing. As an initial setting at section switching, the total out counter SOUT
, normal out counter TOUT, and normal prize ball counter NSHO are cleared, and the final base value (or the latest base value) of each management section is shifted to the base value storage area of the adjacent management section (
Moving. The final base values (or latest base values) of the current management interval and the management intervals 1, 2, and 3 times before are stored in the base value storage area 0 to
3 is stored.

Here, the total out counter SOUT indicates a count value obtained by counting the number of out balls in all game states within each management section, while the normal out counter TOUT indicates a normal game within each management section. Indicates the count value obtained by counting the number of out balls (the number of discharged balls) in the state. The normal prize ball number counter NSHO indicates a count value obtained by counting the total number of prize balls (the number of won balls) in the normal game state in each management section.

In this embodiment, the out ball is a game ball ejected from the game area 32 , that is, a game ball that has been shot into the game area 32 and finished playing, and is detected by the out ball detection switch 74 . Then, when there is a detection input from the out ball detection switch 74, the game control device 100 sets the total out counter SOUT and the normal out counter TOUT as described later.
, is updated by +1 (added by 1).

On the other hand, if the management section is not switched (result of A2205 is "N"), the game control device 100 determines whether there is detection (input) in any of the switches to be monitored (A
2207). In this embodiment, the switches to be monitored are the prize-winning switches that generate prize balls when detected, and the out-ball detection switch 74 . In this embodiment, the prize winning switches are the starting port 1 switch 36a, the starting port 2 switch 37a, the winning port switch 35a, and the big winning port switch 39a.

Then, when there is no detection (input) in any of the switches to be monitored (the result of A2207 is "N"), the game control device 100 performs division task processing for calculating the base value. Execute (A2208). In the division task process, (counter value of normal prize ball number counter NSHO)/(counter value of normal out counter TOUT)×100 (%) is calculated as a base value which is the ball output rate in the normal game state. In addition, in this calculation,
The first decimal place is rounded off.

On the other hand, when there is detection (input) in any of the switches to be monitored (the result of A2207 is "Y"), the game control device 100 detects the switch to be monitored (input from the switch).
(A2209).

In the winning ball addition determination process, if any winning switch is detected, the game control device 100 counts the number of winning balls paid out corresponding to the detection of the winning switch by the normal winning ball counter NSHO. Add to value. For example, starting winning mouth 36 (starting mouth 1 switch 3
6a) For each of the normal variable winning device 37 (starting port 2 switch 37a), general winning port 35 (winning port switch 35a), and special variable winning device 39 (large winning port switch 39a), the number of prize balls is 4, 1, 3 and 10.

Also, in the prize ball addition determination process, when the out ball detection switch 74 is detected, the game control device 100 updates the counter values of the total out counter SOUT and the normal out counter TOUT by +1 (adds only 1 ).

In addition, in the prize ball addition determination process, the game control device 100 calculates the base value,
Determine whether the detection (input) is valid or not. Except for the effective period of detection, the game control device 100 invalidates this detection even if there is detection in the switch to be monitored. It should be noted that the effective period is the period in which the payout percentage is treated as a base value (also called a normal base), that is, the normal game state period. Also, in the winning opening switch / state monitoring process (A1310 in FIG. 55), etc., when the large winning opening fraud to the special fluctuation winning device 39 or the general electric fraud to the normal fluctuation winning device 37 is detected, game control The device 100 includes a large winning opening switch 39 which is a target switch.
a or the detection of the start port 2 switch 37a is invalidated.

Furthermore, in the prize ball addition determination process, the process corresponding to the detection of one switch is performed in one process. Then, the detection information (input information) of the switch that has performed the processing corresponding to the detection is cleared. Therefore, when there are detections (inputs) in a plurality of switches to be monitored in an extremely short period of time, the processing corresponding to the previous detection for one switch is performed and the detection information of the switch is cleared. However, the processing corresponding to the detection of the next one switch is the next prize ball addition judgment processing (
(within the next performance display monitor tallying process), and the detection information of the switch is maintained until then. In this way, unprocessed detection information is maintained.

After that, the game control device 100 restores (POPs) the information (values) of all the registers of the CPU 111a from the outside stack area (A2210) in the same manner as A1908-A1909.
. Then, the value of the stack pointer storage area is loaded into the stack pointer (A2211).
, to end the performance display monitor tallying process.

[ROM and RAM storage areas]
61 to 63, ROM 111b and RAM 111c of game control device 100
storage area will be described. FIG. 61 is a diagram illustrating an outline of storage areas of the ROM 111b and the RAM 111c. FIG. 62 is a diagram illustrating details of the storage area of the ROM 111b. FIG. 63 is a diagram illustrating details of the storage area of the RAM 111c. For ease of viewing, in FIGS. 61 to 63, the width of each area is drawn without being proportional to the actual width of the address.

In the game control device 100, the CPU 111a constitutes arithmetic processing means for performing predetermined arithmetic processing by a program, the ROM 111b constitutes program storage means for storing the program, and the RAM 111c stores information updated by the arithmetic processing means ( calculation result, etc.)
constitutes update information storage means capable of storing

As shown in FIG. 61, the ROM 111b (program storage means) stores addresses 8000h to 9
ADBh first ROM area (first program storage area) and addresses 9C10h to A1
The second ROM area (second program storage area) of F2h, the first ROM area and the second R
Unused area between OM areas (addresses 9ADCh to 9C0Fh, first unused ROM area)
And prepare. The first ROM area and the second ROM area have addresses 9ADCh to 9C0F.
It is located in the address space (or memory space) so as to sandwich the unused area of h.

Unauthorized modification of the game control program may increase the size of the game control program, but due to the existence of the unused area (first unused ROM area), the first ROM
Unauthorized modification of the game control program for the area becomes difficult. A predetermined numerical value that is not used for control may be stored in the addresses of all unused areas. Also, CPU1
11a may be reset when the unused area (first unused ROM area) is used.

Also, after the second ROM area, there is an unused area (second unused ROM area) with addresses A1F3h to BF1Fh, and after that, addresses BF20h to BF20h for storing hardware (HW) parameters, vector tables, etc. There is a program management area of BFFFh. The second ROM area and the program management area are located in the address space so as to sandwich the unused area of addresses A1F3h to BF1Fh.

The RAM 111c (update information storage means) stores the first R
The AM area (first information storage area), the second RAM area (second information storage area) with addresses 01B0h to 01FFh, and the unused area (address 0130h) between the first RAM area and the second RAM area ˜01AFh, first unused RAM area). The first RAM area and the second RAM area are located in the address space (or memory space) so as to sandwich the unused area at addresses 0130h to 01AFh. Also, after the second RAM area, there is an unused area (second unused RAM area) with addresses 0200h to 03FFh.

Note that no unused area is provided after the second RAM area, the last address of the second RAM area is matched with the last address of the RAM 111c, and the second RAM area is moved to address 03B.
A configuration provided in the region from 0h to 03FFh is also possible.

As shown in FIG. 62, in the first ROM area, addresses 8000h to 8BA8h serve as game control program areas in which game control programs are stored, and addresses 8BA9h to 8F
FFh becomes an unused area (third unused ROM area), addresses 9000h to 9ADBh
is a game control data area in which game control data used by the game control program is stored. It should be noted that it is also possible to have a configuration in which an unused area (third unused ROM area) is not provided between the game control program area and the game control data area. Various tables and data are stored in the game control data area.

The first ROM area is an area in which a game control program and its game control data are stored. In addition, you may include the data for game control in the concept of the program for game control. The game control program is a program (a collection of codes or instructions) for controlling games. The game control program includes a main processing program corresponding to the main processing (FIG. 5) and its subroutine program, an interrupt processing program corresponding to the timer interrupt processing and its subroutine program, excluding the predetermined outside program.

As described above, in each process in the timer interrupt process (for example, special figure 1 stop pattern setting process, special figure 2 stop pattern setting process, general figure normal process, etc.), the test fire test signal for setting the data of the test fire test signal Setting processing (for example, A3403, A3503, A7916, etc.) is included.
Therefore, the game control program includes a test-fire test signal setting program (test-fire test signal setting code) corresponding to the test-fire test signal setting process. By executing the test-firing test signal setting program (test-firing test signal setting code), the CPU 111a stores the data of each trial-firing test signal (described above) in the test signal output data area in the first RAM area of the RAM 111c before outputting. , is set (corresponding to #1 in FIG. 61).

In addition, the game control program is a performance display output process (A1508
) corresponding to the performance display output program (performance display output code). Accordingly, the performance display output program is also stored in the first ROM area. By executing the performance display output program, the CPU 111a outputs display data (output data) which is display data of performance information related to the gaming machine and is stored in the 0th to 3rd digit output data areas of the second RAM area. is loaded (referenced, acquired) into the register and output (corresponding to #4 in FIG. 61). As a result, the performance information of the performance information is displayed in the 0th to 3rd digits (digits 0 to 3) of the performance display device 152 . In the present embodiment, the performance information is the base value, but other performance information may be displayed, such as the ratio of the character or the number of discharged balls (the number of out balls).

In addition, the game control program is step A24 of the probability setting change/confirmation process (FIG. 6B).
10 includes a set value change program (set value change code). Therefore, the setting value changing program is also stored in the first ROM area. By executing the setting value change program, the CPU 111a updates the probability setting value in the probability setting value area of the first RAM area (first information storage area), and stores the updated probability setting value in the probability setting value area. Store and set (corresponding to #1 in FIG. 61).

The second ROM area is an area in which an area-outside program other than the game control program in the first ROM area is stored, and is outside the first ROM area. The concept of the out-of-area program may include data used by the out-of-area program (performance display data, etc.). The outside program is a performance display monitor control program (
performance display setting program) and its subroutine program, performance display monitor aggregation program (performance display editing program) corresponding to performance display monitor aggregation processing and its subroutine program, and test firing test signal output corresponding to test firing test signal output processing Contains programs and their subroutine programs.

By executing the performance display monitor control program (performance display setting program), the CPU 1
11a stores display data (output data ) is stored and set (corresponding to #3 in FIG. 61).

By executing the performance display monitor tallying program (performance display editing program), CPU1
11a updates the normal winning ball number counter NSHO by adding the number of winning balls for each winning switch when any winning switch is detected, and normal out when the out ball detection switch 74 detects The counter TOUT is updated by +1, and the number of normal prize balls counter NSH
Performance information (base value) is calculated based on O and the counter value of the normal out counter TOUT. In addition, by the performance display monitor tabulation program, the CPU 111a updates the total out counter SOUT by +1 when the out ball detection switch 74 is detected, and switches each management section based on the counter value of the total out counter SOUT. Manage, count the normal ball number counter NSHO and the normal out counter TOUT for each management section and perform performance information (
base value).

By executing the test-firing test signal output program, the CPU 111a loads data of each test-firing test signal set in the test signal output data area in the first RAM area into the register (
reference and acquisition) and output as serial data to the serial port 173b (# in FIG. 61).
2).

As described above, as a program outside the area, the test firing test signal output program is the second RO
It is stored in the M area (second program storage area) and separated from the first ROM area (first program storage area) via an unused area (first unused ROM area). That is, the test-firing test signal output program is placed in the second ROM area which is different from the first ROM area in which game control programs such as the test-firing test signal setting program and the performance display output program are stored. Therefore, the part corresponding to the test-firing test signal output program is easy to understand, so that it can be reused for other game machines (shared use with other game machines), and the development efficiency of the program used in the game machine 10 can be improved. . The test-firing test signal output program, which only outputs the test-firing test signal, has the same algorithm regardless of the game machine model, so the same program can be used in common and can be reused for different models. Easy.

However, since the test firing test signal differs depending on the game machine model, depending on the specifications of the gaming machine, such as the type and number of winning slots, whether there is a time saving state or a variable probability state, etc., the data of the test firing test signal is set. The test-firing test signal setting program differs for each game machine model, and is difficult to reuse between different models. In addition, the display data of the performance information and the display data of the variable display game are output substantially simultaneously for each digit of the performance display device 152, which is an LED display device, and the collective display device 50.
In the output processing program, the performance display output program (corresponding to A1508) that outputs the display data of the performance information is harmoniously integrated with the segment output program (corresponding to A1509, A1510) that outputs the display data of the variable display game. This makes it difficult to reuse between different models of game machines. Therefore, if the test-fire test signal setting program or the performance display output program and the test-fire test signal output program coexist in the storage area of the ROM 111b, it becomes difficult to understand the portion corresponding to the easy-to-use test-fire test signal output program. There was a possibility that the development efficiency of the aircraft control program would decrease.

In addition, as with the test firing test signal output program, the performance display monitor control program (performance display setting program) and the performance display monitor aggregation program (performance display editing program) have the same algorithm regardless of the model of the game machine. The same can be used in common,
It is easy to reuse even with different models. Therefore, the performance display monitor control program and the performance display monitor aggregation program are stored in the second ROM area (second program storage area), and are transferred from the first ROM area (first program storage area) to the unused area ( 1st unused ROM area). That is, the performance display monitor control program and the performance display monitor tallying program are stored in the second ROM area, which is different from the first ROM area in which game control programs such as the test firing test signal setting program and the performance display output program are stored. Placed in the ROM area. Therefore, the parts corresponding to the performance display monitor control program and the performance display monitor tallying program are easy to understand and can be reused for other game machines (shared with other game machines). can improve development efficiency.

As shown in FIG. 63, in the first RAM area, addresses 0000h to 00F6h serve as a game control work area (first work area), and addresses 00F7h to 012Fh serve as a game control stack area.

At the top address (address 0000h) of the game control work area, there is a probability setting value area for storing the probability setting value, followed by a power failure inspection area 1 (address 0001h). Since the address of the probability setting value area is the top address of the RAM 111c and the top address of the first RAM area, the probability setting value area RAM 111c or the first
When clearing (initializing) at least part of the RAM area of the RAM
Clear processing (RAM initialization processing) is simplified.

In addition, power failure inspection area 2 (address 00F5h
), and at the end of the work area for game control there is a checksum area (address 00F6h) for storing the checksum.

Further, between the power failure inspection area 1 and the power failure inspection area 2 of the first RAM area, there are a probability setting mode flag area (address 0002h), a normal base state determination area (address 0004h),
There is an initial display setting flag area (address 0005h). A probability setting changing flag or a probability setting checking flag is stored in the probability setting mode flag area. In the normal base state determination area, the normal base state information is set in the normal game state, and the normal base state information is not set in the game state other than the normal game state (special game state, specific game state, etc.). An initial display setting flag is stored in the initial display setting flag area.

In addition, between the power failure inspection area 1 and the power failure inspection area 2 of the first RAM area, there are various areas that store information necessary for game control, such as a test signal output data area and a fluctuation pattern random number area. . In addition, the test signal output data area may be scattered at positions according to the type of the test firing test signal (symbol 1 signal, normal figure 1 changing signal, firing position designation signal 1, etc.) without providing it collectively. .

As shown in FIG. 63, in the second RAM area, addresses 01B0h to 01D0h serve as an outside work area, and addresses 01D2h to 01FFh serve as an outside stack area. The outside work area (second work area) is a work area other than the game control work area (first work area), and the outside stack area is a stack area other than the game control stack area. The out-of-area stack area includes a performance display stack area and the like used in connection with performance display.

In the work area outside the area, from the beginning, the normal prize number counter area (address 01B
0h, 01B1h), a normal out counter area (addresses 01B2h, 01B3h), and a total out counter area (addresses 01B4h, 01B5h). The normal ball number counter area, normal out counter area, and total out counter area are 2-byte areas in which the count values of the normal ball number counter NSHO, normal out counter TOUT, and total out counter SOUT are stored, respectively. These 2-byte counters can count from 0 to 65,535.

The range (width) of the management section is 60000 or 3 for the total out count SOUT.
00, the normal out counter TOUT and the total out counter SOU
T does not overflow (maximum of 65535 is not reached). Also, since the base value is typically 30(%), the normal number-of-balls counter NSHO does not overflow (it does not reach the maximum value of 65535) within the management interval. That is, by providing a management interval, a 2-byte normal out counter TOUT, a total out counter SOUT, and a normal prize ball counter NSH
Since O does not overflow (does not reach the maximum value of 65535), performance information such as the base value can be calculated accurately.

In addition, in the out-of-area work area, at the end, a 2-byte stack pointer storage area (addresses 01D0h, 01D1h) separating the out-of-area work area and the out-of-area stack area is provided.
is provided. Between the counter area and the stack pointer storage area, an output data area for the 0th to 3rd digits of the performance display (performance display data area) is provided.

In this way, data related to the performance information related to the number of prize balls or the number of out balls (normal out counter TOUT, total out counter SOUT, counter value of normal prize ball number counter NSHO)
and its performance display data (0th to 3rd digit output data, digit output data) in a second RAM area that can be distinguished from the first RAM area by an unused area, performance information or It becomes easier to develop programs relating to performance display (performance display output program, performance display monitor control program, performance display monitor totalization program) and to make the programs easier to understand.

In addition, in the present embodiment, the game control device 100, at the time of power-on (power restoration), at least part of the first RAM area (first information storage area) (for example, RAM area other than the probability setting value area) is initialized, but the second RAM area (second information storage area) is not initialized. Here, the predetermined condition means step A1040 or A
The result of 1041 is "Y", which means that the RAM initialization switch 112 is turned on to execute RAM initialization processing (RAM clear processing), for example. This prevents the RAM initialization switch 112 from being fraudulent while the game hall is open.
is turned on and the power is turned on (power is restored), the counter area (addresses 01B0h to 01B5h) that stores the information used to calculate the performance information (base value) and the 0th to 3rd digit output data of the performance display The area is neither cleared nor initialized, and the continuity of the performance information (base value) display can be maintained. In this embodiment, the information used to calculate the performance information (base value) is at least the counter value of the normal prize ball counter NSHO (information on the number of prize balls) and the normal out counter T
This is the OUT counter value.

[Configuration of CPU]
FIG. 64 is a block diagram showing the internal configuration of the CPU 111a of the gaming microcomputer 111 according to the third embodiment. In the third embodiment, CPU 111a is shown as CPU core 102 . The CPU core 102 is configured as a Z80 series CPU.

The CPU core 102 (CPU 111a) shown in FIG. 64 includes a W register 1201A, an A register 1202A, a B register 1204A, and a C register 1201A, each having a width of 8 bits.
205A, a D register 1207A, an E register 1208A, an H register 1210A and an L register 1211A.

These general purpose registers combine the W register 1201A and the A register 1202A into a WA register 1203A (pair register, register pair) with a width of 16 bits.
It can also be used as Similarly, B register 1204A and C register 1205
BC register 1206A (pair register, register pair) combined with A, DE register 1209A (pair register, register pair) combined with D register 1207A and E register 1208A, HL combined with H register 1210A and L register 1211A It is also possible to use registers 1212A (pair register, register pair).

Further, each of the CPU cores 102 (CPU 111a) has a width of 16 bits,
It has an IX register 1231a and an IY register 1232a. IX register 1231
The IY register 1232a is used as an index when the instruction interpretation and execution circuit 1242 accesses data. Also, the IY register 1232a can be used as a start address specifying register for setting the start address of the RAM 111c (update information storage means) in the address space (or memory space).

These general-purpose registers form one general-purpose register group (register group of register bank 0) 1220A. On the other hand, the CPU core 102 has another general-purpose register group (register bank 1 register group) 1220B having the same (or similar) configuration as the general-purpose register group included in the register group 1220A of register bank 0 .

W register 1 of register bank 0 is stored in register group 1220B of register bank 1.
It has W registers 1201B to L registers 1211B having the same functions as the 201A to L registers 1211A. These registers can also be used as WA registers 1203B to HL registers 1212B as 16-bit registers in the same manner as register bank 0. The register group 1220B of the register bank 1 includes an IX register 1231b, an IX register 1231b, and a
It has an IY register 1232b.

Further, the CPU core 102 has a flag register 1200 with a width of 8 bits.

A flag register 1200 stores the result of computation using the register. A register bank selector (RBS), which is a bit of the flag register 1200, selects which of the two general-purpose register groups 1220A and 1220B is to be used as an arithmetic target.

Each register belonging to the register group selected by the register bank selector (RBS) is used by the instruction interpretation and execution circuit 1242 for calculation. On the other hand, each register belonging to the unselected register group retains its value until the value of the register bank selector (RBS) is changed and becomes a selection target.

The CPU core 102 also has a DP register 1230 . DP register 123
0 can be used, for example, to store the top address of the game control data area of the ROM 111b in the address space (or memory space).

Further, the CPU core 102 has an SP register 1233 functioning as a stack pointer and a PC register 1234 functioning as a program counter, each having a width of 16 bits.

The stack pointer 1233 indicates the position of the area when data is stored in (or retrieved from) the stack area. The program counter 1234 is an instruction interpretation execution circuit 1242
indicates the address where the instruction being executed is stored.

The command interpreting and executing circuit 1242 executes a program (game control program or out-of-area program) and performs arithmetic processing using each register inside the CPU core 102 . Specifically, in the ROM 111b, the data stored at the address indicated by the program counter 1234 is read, the read data is regarded as code, and the instruction corresponding to the code is executed. The instruction interpretation and execution circuit 1242 interprets and executes instructions included in a predetermined instruction set.

Therefore, in the present embodiment, the CPU core 102 (CPU 111a) itself is exemplified as the arithmetic processing means, but inside the CPU core 102, the instruction interpretation execution circuit 1242 plays the main role of the arithmetic processing means. there is The RAM 111c serves as update information storage means for storing information updated by the arithmetic processing means (CPU 111a, CPU core 102), and can retain the stored information even if a power failure occurs due to the backup power supply. holding storage means.

Note that the instruction interpretation and execution circuit 1242 performs the access circuit 12 in response to program instructions.
43, an address bus 721, and a data bus 722, the R external to the CPU core 102
Data may be exchanged between the OM 111b, RAM 111c, and other circuits. The address bus 721 is composed of 16-bit signal lines, and the CPU core 102
It outputs the specified address to the address bus 721 and inputs/outputs the data stored in the specified address (the address of the ROM 111b, the RAM 111c, etc.) via the data bus 722. FIG.

Also, every time the instruction interpretation execution circuit 1242 executes the instructions in the ROM 111b one by one,
The address where the next instruction is stored is stored in the program counter 1234 . By repeating the execution of commands and the update of the program counter 1234 in this manner, the game control programs are sequentially executed. When an interrupt signal from the interrupt control circuit 724 provided in the gaming microcomputer 111 is received, the value of the program counter 1234 is switched to the value of the preset interrupt processing address.

Data is exchanged between the instruction interpretation and execution circuit 1242 and each register provided in the CPU core 102 via an internal bus 1235 .

The initial value setting circuit 1241 is a circuit that sets an initial value to each register provided in the CPU core 102 by means of hardware.

When the internal reset circuit 1240 receives a reset signal from the security circuit 725 provided in the game microcomputer 111, it activates the initial value setting circuit 1241, and the CPU
After setting an initial value to each register provided in the core 102, the instruction interpretation execution circuit 1242
start up.

[Program list]
65-67 show the CPU 111a (CPU
It is a program list illustrating the program structure of the output processing program, performance display monitor control program (performance display setting program, test firing test signal output program) executed by the core 102). and
Modifications such as deletion or addition of codes are possible as appropriate. Each program list is a list of instructions (source code) in assembly language for Z80, an 8-bit microprocessor. code) in a one-to-one correspondence. All instructions are included in the instruction set that can be interpreted and executed by the instruction interpretation and execution circuit 1242 as machine language instructions.

The description of one line in each program list is the "line number" attached for convenience from the left side.
, ``address in ROM 111b'', ``code machine language data (machine language instruction)'', ``assembly language code'', and ``comment'' added for convenience of explanation. "Assembly language code" is divided into "mnemonics" that indicate operation content (calculation content) and "operands" that are instruction objects. Unless there is an instruction to call a subroutine or a jump instruction (branch instruction), instructions on the program list are basically executed in order of line number (from smallest to largest) from top to bottom of the program list.

[Output processing program]
65A-65C are program listings showing the program structure of the output processing program.

Line number 2924 indicates the label of the output processing program as a subroutine.

At line number 2931, the value of the IY register is cleared and set to 0 as the top address of the RAM 111c by taking the exclusive OR of the values of the IY register (code "XOR IY, IY").

At line number 2934, by XORing the values of the A registers,
Clear the value of the A register and set it to 0 as data for turning off the performance display (code "X
OR A, A").

At line number 2935, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output the value 0 of register A to SPIBUFA0 (that is, the transmission/reception buffer register of the numerical number corresponding to label C_SPIBUFA0) (code OUT (C_SPIBUFA
0), A). As a result, the digit corresponding to the current digit counter on the performance display device 152 is extinguished.

At line number 2938, the A register value 0 is again output to the transmission/reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (that is, the transmission/reception buffer register with the numerical number corresponding to the label C_SPIBUFA0) (code OUT (C_SPIB
UFA0), A). As a result, the digit corresponding to the current digit counter on the collective display device 50 is extinguished. The processing of line numbers 2934, 2935, and 2938 is output processing (
This corresponds to the processing of step A1501 in FIG.

At line number 2941, the numerical value corresponding to the start address of table D_DIGTBL is set to HL
Load register (code LD HL, D_DIGTBL).

At line number 2942, the numerical value (0-3) of the digit counter (address R_DIGCNT+00H) is loaded into the A register (code LD A, (IY+R_DIGCNT+0
0H)). Note that the value of the IY register is 0 here.

At line number 2943, the subroutine V_GET_BYTE is called to
Based on DIGTBL, the digit output data corresponding to the value of the digit counter R_DIGCNT is obtained in the A register (code CALLV V_GET_BYTE). The processing of line number 2943 corresponds to the processing of step A1502 of the output processing.

At line number 2945, a 2-byte external information data area (address R_INFBF2+0
0H) to the HL register (code LD HL, (IY+R_INFBF
2+00H)). The data of the door signal and the door/frame opening signal are loaded into the H register, and the data of the number of pattern determination signal and the start port signal are loaded into the L register.

At line number 2946, the data of the number of pattern determination signal and the starting port signal in the L register and the digit output data in the A register are synthesized and stored in the A register (code OR A, L).

At line number 2947, the data of the door signal and door/frame open signal in the H register and the data in the A register are combined and stored in the A register (code OR A, H). As a result, the digit output data and the external information data (door signal, door/frame open signal, pattern determination frequency signal, and starting port signal data) are synthesized in the A register. The processing of line number 2945 to line number 2947 corresponds to the processing of step A1503 of the output processing.

At line number 2948, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output synthesized data of A register to SPIBUFA0 (code OUT (C_SPIB
UFA0), A). As a result, combined data of the digit output data and the external information data is output to the serial port 173a. The processing of line number 2948 corresponds to the processing of A1504 of the output processing.

At line number 2950, the B register is loaded with the synthetic data of the A register (code LD
B, A). The value of the B register is later saved to the stack area.

In line number 2953, a 2-byte external information data area (address R_INFBF1+0
0H) as external information data, the data of the main ball signal, security signal, out signal, and call signal are loaded into the WA register (code LD WA, (IY+R_INF
BF1+00H)). The security signal, out signal, and main prize signal data are loaded into the A register, and the call signal data are loaded into the W register.

At line number 2954, a 2-byte external information data area (address R_INFBF1+0
2H), as external information data, data of jackpot 1 signal, jackpot 2 signal, jackpot 3 signal, and jackpot 4 signal are loaded into the HL register (code LD HL, (IY+R_INFB
F1+02H)). The jackpot 1 signal and jackpot 4 signal are loaded into the L register and the jackpot 2 signal is loaded.
The signal, jackpot 3 signal, is loaded into the H register.

From line number 2955 to line number 2957, the values of the A register, W register, L register and H register are combined and stored in the A register (code OR A, W; code OR A,
L; code OR A, H). As a result, various output data of the external information (jack 1 signal, jack 2 signal, jack 3 signal, jack 4 signal, main prize ball signal, security signal, out signal, call signal data) are synthesized and stored in the A register. be done.

At line number 2958, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output synthesized data of A register to SPIBUFA0 (code OUT (C_SPIB
UFA0), A). The processing from line number 2953 to line number 2958 is output processing A1505
corresponds to the processing of

At line number 2962, the C register is loaded with the synthesized data in the A register (code LD
B, A). The value of the C register is later saved to the stack area (code LD C,A
).

At line number 2963, the value of the BC register is saved in the stack area (code PUSH
B-C). As a result, the composite data of the digit output data and the external information data, and the composite data of the various output data of the external information are saved in the stack area, and can be restored and used later.

At line number 2971, the digit counter address R_DIGCNT+00H is loaded into the E register (code LD E, R_DIGCNT+00H).

Line 2972 loads the value of C_DIG_MAX into the B register (code LD
B, C_DIG_MAX). C_DIG_MAX is the digit counter upper limit value of 3
, and is 4 in this embodiment.

At line number 2973, the subroutine V_INC_BYTE is called to set the value of the digit counter (address R_DIGCNT+00H) to + unless it reaches C_DIG_MAX.
1 is updated and stored in the A register. When the digit counter upper limit value is exceeded and C_DIG_MAX is reached, 0 is stored in the A register (code CALLV V_INC_BYTE).
. The processing from line number 2971 to line number 2973 corresponds to the processing of A1506 of the output processing.

At line number 2976, the top address (R_EDVBF1+00H) of the performance display data area (0th to 3rd digit output data area) is stored in the HL register (code LD HL, R
_EDVBF1+00H).

Line number 2977 loads the updated digit counter value currently stored in the A register into the B register (code LD B, A).

Line number 2978 calls subroutine V_GET_BYTE to store in the A register the value stored at the address obtained by adding the value in the A register to the HL register (code CALLV V_GET_BYTE). As a result, the output data (display data) of the digit corresponding to the updated digit counter is loaded from the corresponding one of the 0th to 3rd digit output data areas and stored in the A register.

At line number 2986, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output the A register value (digit output data) to SPIBUFA0 (code OUT (C
_SPIBUFA0), A). The processing from line number 2976 to line number 2986 is the performance display output program and corresponds to the processing of A1508 of the output processing.

At line number 2989, the start address (R_SEGBF+00H) of the segment area is set to H.
Store in the L register (code LD HL, R_SEGBF+00H).

At line number 2990, the updated digit counter value currently stored in the B register is loaded into the A register (code LD A,B).

Line number 2991 calls subroutine V_GET_BYTE to store in the A register the value stored at the address obtained by adding the value in the A register to the HL register (code CALLV V_GET_BYTE). As a result, the data in the segment area corresponding to the updated digit counter is stored in the A register. Line number 2989 to line number 29
The processing of 91 corresponds to the processing of A1509 of the output processing.

At line number 2999, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output the A register data to SPIBUFA0 (code OUT (C_SPIBUF
A0), A). As a result, from the segment area corresponding to the updated digit counter,
The output data of the segment lines (LED segments 0-7) of the collective display (LED) 50 are output. The processing of line number 2999 corresponds to the processing of A1510 of the output processing.

At line number 3002, the numerical value corresponding to the head address of table D_DIGTBL is set to HL
Load register (code LD HL, D_DIGTBL).

At line number 3003, the updated digit counter value currently stored in the B register is loaded into the A register (code LD A, B).

At line number 3004, the subroutine V_GET_BYTE is called to
Digit output data corresponding to the value of the A register (value of the digit counter after updating) is obtained in the A register based on DIGTBL (code CALLV V_GET_BYTE
). The processing from line number 3002 to line number 3004 corresponds to the processing of A1511 of the output processing.

At line number 3005, the value saved in the stack area is restored to the BC register (code POP BC). As a result, the combined data of the digit output data and the external information data is B
Composite data of various output data of external information is stored in the C register.

At line number 3006, the value of the upper 4 bits of the B register is masked with 00001111B to zero and stored in the B register (code AND B, 00001111B). As a result, external information data is obtained in the B register.

At line number 3007, the digit output data corresponding to the updated digit counter value in the A register and the external information data in the B register are synthesized and stored in the A register (code OR A, B). The processing from line number 3002 to line number 3007 is output processing A1512
corresponds to the processing of

At line number 3008, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output synthesized data of A register to SPIBUFA0 (code OUT (C_SPIB
UFA0), A). As a result, combined data of the digit output data after the digit counter is updated and the external information data is output to the serial port 173a. The processing of line number 3008 corresponds to the processing of A1513 of the output processing.

At line number 3011, synthesized data of various output data of the external information currently stored in the C register is stored in the A register (code LD A, C).

At line number 3012, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output synthesized data of A register to SPIBUFA0 (code OUT (C_SPIB
UFA0), A). The processing from line number 3011 to line number 3012 is A1514 of output processing.
corresponds to the processing of

At line number 3019, by XORing the values of the A registers,
Clear the value of the A register and set it to 0 (code XOR A, A).

At line number 3024, the data of the general electric solenoid drive signal stored at the address (R_FSOLBF+00H) is added to the A register, which is currently 0, and stored (code OR
A, (IY+R_FSOLBF+00H)). Note that the value of the IY register is 0 here.

In line number 3025, the data of the common solenoid drive signal in the A register and the address (R
_TSOLBF+00H), and stores the data of the big winning opening solenoid drive signal stored in A register (code OR A, (IY+R_TSOLBF+00H)).

At line number 3026, the data in the A register and the address (R_LSOLBF+00H)
data of the lever solenoid drive signal stored in the register A (code ORA, (IY+R_LSOLBF+00H)). As a result, the solenoid drive signal data to be output to the solenoid signal output port is synthesized. The processing from line number 3019 to line number 3026 corresponds to the processing of A1515 of the output processing.

At line number 3027, the combined data of the A register and the output data C_SHOT of the fire permission
_OK is synthesized and stored in the A register (code OR A, C_SHOT_OK). The processing of line number 3027 corresponds to the processing of A1516 of the output processing.

At line number 3030, the transmit/receive buffer register C_ corresponding to the serial port 173a
Output the final synthesized data of the A register to SPIBUFA1 (code OUT (C
_SPIBUFA1), A). The process of line number 3030 corresponds to the process of A1517 of the output process.

In line number 3035, the information (value) of the flag register 1200 is saved in the game control stack area (code PUSH PSW). The processing of line number 3035 is A151 of the output processing
8 processing.

At line number 3036, the trial firing test signal output program is executed by the subroutine P_SOUTPUT.
(code CALL P_SOUTPUT). The processing of line number 3036 corresponds to the processing of A1519 of the output processing. Although the output processing program including the performance display output program and the like is stored in the first ROM area, the test firing test signal output program itself is stored in the second ROM area.

In line number 3037, the information of the flag register 1200 that had been saved is restored (POP) from the stack area for game control (code POP PSW). The processing of line number 3037 corresponds to the processing of A1520 of the output processing.

At line number 3039, the output processing program as a subroutine is ended and the interrupt processing program is returned to (code RET).

[Performance display monitor control program (performance display setting program)]
FIG. 66 is a program list showing the program structure of the performance display monitor control program (performance display setting program). A performance display monitor control program (performance display setting program) is stored in the second ROM area as a program outside the area.

Line number 9522 shows the label of the performance display monitor control program as a subroutine. (Code P_SHYMT:).

At line number 9532, the value of the stack pointer SP is stored in the stack pointer storage area at address (R_ESTCKPT+00H) (code LD (R_ESTCKPT+0
0H), SP). The process of line number 9532 corresponds to the process of A1901 of the performance display monitor control process.

At line number 9533, the stack pointer is loaded with the start address of the stack area outside the area (such as the stack area for performance display) (code LD SP, C_S_STKTOP).
The process of line number 9533 corresponds to the process of A1902 of the performance display monitor control process.

At line number 9534, the register bank selector (RBS) is set to 0 to select register bank 0 (code LD RBS, 0).

At line number 9535, the information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is saved to the outside stack area (code PUSH WA, BC, DE, HL, IX, IY).

At line number 9536, the register bank selector (RBS) is set to 1 to select register bank 1 (code LD RBS, 1).

At line number 9537, the information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 1 is saved to the outside stack area (code PUSH WA, BC, DE, HL, IX, IY). The processing from line number 9534 to line number 9537 corresponds to the processing of A1903 of the performance display monitor control processing.

At line number 9540, the subroutine P_RWMCCK of the second work RAM check process
(code CALL P_RWMCCK). The process of line number 9540 corresponds to the process of A1904 of the performance display monitor control process.

At line number 9541, a subroutine P_INITTM_PR for initial display timer update processing
C (code CALL P_INITTM_PRC). The process of line number 9541 corresponds to the process of A1905 of the performance display monitor control process.

At line number 9544, the switch related address table (D_TBL_SWINF1)
to the HL register (code LD HL, D_TBL_SWIN
F1).

At line number 9546, label P_SH is stored at a predetermined address (9C2B) in ROM 111b.
Allocate YMT_10 (Code P_SHYMT_10:).

At line number 9547, the address value stored at the address in the HL register (initially the top address of the switch-related address table) is loaded into the DE register (code LD
DE, (HL+)). "HL+" means update the address in the HL register to the next address after loading.

At line number 9548, branch (jump) to processing of label P_SHYMT_20 when the DE register is loaded with end code 0000H (code JR Z, P_SHYM
T_20).

In line number 9551, the current switch detection information stored in the address value (for example, 005Bh) stored in the DE register is loaded into the A register (code LD A, (DE
)). It should be noted that the current switch detection information is stored in a game control work area (first work area) in the first RAM area.

At line number 9552, the logical product of the mask value stored at the address in the current HL register and the current switch detection information in the A register is taken, and the current switch detection information is used to calculate the base value. Delete the switch detection information of the switch (code AND A, (
HL+)). Then, the value of the HL register is updated by +1.

Line number 9553 loads the DE register with the address value (eg, 01CAh) stored at the address in the current HL register (code LD DE, (HL+)). note that,
This address value is located in the work area outside the area (second work area) in the second RAM area, and the previous switch detection information is stored. Then, the value of the HL register is updated by +1.

At line number 9554, the logical sum of the previous switch detection information stored in the address value (for example, 01CAh) stored in the DE register and the current switch detection information in the A register is taken and stored in the A register (code OR A, (DE)). In the previous switch detection information, the detection information (bit) of the switch that performed the processing corresponding to the detection in the prize ball addition determination processing (A2209) is cleared, but the switch that did not perform the processing corresponding to the detection detection information (bit value 1) is maintained. Therefore, the A register stores unprocessed switch detection information including the current switch detection information.

At line number 9555, the value in the A register is loaded into the address value (eg, 01CAh) stored in the DE register (code LD(DE), A). As a result, the current switch detection information in the work area for game control (first work area) is an area in the second RAM area in a form in which the switch detection information of the switch irrelevant to the calculation of the base value is deleted. It is copied to an external work area (second work area, address 01CAh, for example). The copied switch detection information of this time is treated as the previous switch detection information in the next execution of the performance display monitor control program.

At line number 9556, a branch (jump) is made to return to the processing of label P_SHYMT_10.
(code JR P_SHYMT_10). Therefore, the processing from line number 9546 to line number 9556 is repeated until the end code 0000H is detected, and the switch detection information of the necessary switches is copied to the outside work area. Line number 9546 to line number 955
The processing up to 6 corresponds to the processing of A1906 of the performance display monitor control processing.

At line number 9559, a label P_SHYMT_ is stored at a predetermined address (9C39) in the ROM.
assign 10 (code P_SHYMT_20:)

At line number 9560, a subroutine P_DSPSHM for display content update processing is called (
code CALL P_DSPSHM). The digit output data (display data) of the performance display device 152 is set in the 0th to 3rd digit output data areas. The process of line number 9560 corresponds to the process of A1907 of the performance display monitor control process.

At line number 9563, information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 1 is returned from the outside stack area (code POP WA, BC, DE, HL, IX, IY).

At line number 9564, the register bank selector (RBS) is set to 0 to select register bank 0 (code LD RBS, 0).

At line number 9565, the information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is restored from the outside stack area (code POP WA, BC, DE, HL, IX, IY). The processing from line number 9563 to line number 9565 corresponds to the processing of A1908 of the performance display monitor control processing.

At line number 9567, the value of the stack pointer storage area is loaded into the stack pointer (code LD SP, (R_ESTCKPT+00H)). The process of line number 9567 corresponds to the process of A1909 of the performance display monitor control process.

At line number 9569, the performance display monitor control program as a subroutine is terminated and the interrupt processing program is returned to (code RET).

[Performance display monitor control program (performance display setting program)]
FIG. 67 is a program list showing the program structure of the test-firing test signal output program. The test-firing test signal output program is stored in the second ROM area as a program outside the area.

Line number 10538 shows the label of the test firing test signal output program as a subroutine. (Code P_SOUTPUT:).

At line number 10540, the value of the stack pointer SP is stored in the stack pointer storage area at address (R_ESTCKPT+00H) (code LD (R_ESTCKPT+
00H), SP). The process of line number 10540 corresponds to the process of A1701 of the test firing test signal output process.

At line number 10541, the stack pointer is loaded with the top address of the outside stack area (performance display stack area) (code LD SP, C_S_STKTOP).
The process of line number 10541 corresponds to the process of A1702 of the test firing test signal output process.

At line number 10542, the register bank selector (RBS) is set to 0 to select register bank 0 (code LD RBS, 0).

At line number 10543, the information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is saved to the outside stack area (code PUSH WA, BC, DE, HL, IX, IY).

At line number 10544, the register bank selector (RBS) is set to 1 to select register bank 1 (code LD RBS, 1).

At line number 10545, the information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 1 is saved to the outside stack area (code PUSH WA, BC, DE, HL, IX, IY). line number 10542
The processing of line number 10545 corresponds to the processing of A1703 of the test firing test signal output processing.

At line number 10550, the value of the A register is cleared and set to 0 as the 0 clear data of the test firing test signal by taking the exclusive OR of the values of the A register (
Code XOR A,A).

At line number 10551, the transmit buffer register C_ corresponding to serial port 173b
0 clear data of the test firing test signal is output to SPIBUFB (that is, the transmission/reception buffer register of the numerical number corresponding to label C_SPIBUFB) (code OUT (C_SPI
BUFB), A).

At line number 10558, the start address of the address table D_SKNDAT2 is set to HL
Load register (code LD HL, D_SKNDAT2). Address table D
_SKNDAT2 defines the address of the test signal output data area where each firing test signal is stored.

At line number 10559, a subroutine P_SNK_OUT is called to sequentially synthesize the data stored in the address value while updating the address value of the HL register by +1 a predetermined number of times, and output the synthesized data to the serial port 173b (code CALL P_
SNK_OUT). Here, the data to be transmitted to the test terminal output port 1 are combined and output. The process of line number 10559 corresponds to the process of A1704 of the test firing test signal output process.

At line number 10560, the subroutine P_SNK_OUT is called and line number 105
59, the data to be transmitted to the test terminal output port 2 is synthesized, and the serial port 173
b (code CALL P_SNK_OUT). line number 105
The processing of 60 corresponds to the processing of A1705 of the test firing test signal output processing.

At line number 10561, the subroutine P_SNK_OUT is called and line number 105
59, the data to be transmitted to the test terminal output port 3 are synthesized, and the serial port 173
b (code CALL P_SNK_OUT). line number 105
The processing of 61 corresponds to the processing of A1706 of the test firing test signal output processing.

At line number 10562, the subroutine P_SNK_OUT is called and line number 105
59, the data to be transmitted to the test terminal output port 4 are synthesized, and the serial port 173
b (code CALL P_SNK_OUT). line number 105
The processing of 62 corresponds to the processing of A1707 of the test firing test signal output processing.

At line number 10563, the subroutine P_SNK_OUT is called and line number 105
59, the data to be transmitted to the test terminal output port 5 are synthesized, and the serial port 173
b (code CALL P_SNK_OUT). line number 105
The processing of 63 corresponds to the processing of A1708 of the test firing test signal output processing.

At line number 10564, the subroutine P_SNK_OUT is called and line number 105
59, the data to be transmitted to the test terminal output port 6 are synthesized, and the serial port 173
b (code CALL P_SNK_OUT). line number 105
The processing of 64 corresponds to the processing of A1709 of the test firing test signal output processing.

At line number 10569, the information (values) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 1 is restored from the outside stack area (code POP WA, BC, DE, HL, IX, IY).

At line number 10570, the register bank selector (RBS) is set to 0 to select register bank 0 (code LD RBS, 0).

At line number 10571, the information (values) of the WA, BC, DE, HL, IX, and IY registers of register bank 0 is restored from the outside stack area (code POP WA, BC, DE, HL, IX, IY). line number 10569
The process of line number 10571 corresponds to the process of A1710 of the test-firing signal output process.

At line number 10573, the value of the stack pointer storage area is loaded into the stack pointer (code LD SP, (R_ESTCKPT+00H)). The process of line number 10573 corresponds to the process of A1711 of the test firing test signal output process.

At line number 10575, the test-firing test signal output program as a subroutine is terminated, and the output processing program (within the interrupt processing program) is returned to (code RET).

[Base value display mode]
68 and 69, a display mode of the base value displayed as performance information on the performance display device 152 will be described.

FIG. 68 is set by the performance display monitor control processing (performance display setting processing) (FIG. 58) and the performance display monitor aggregation processing (performance display editing processing) (FIG. 60), and the performance display output processing (
FIG. 57 is a diagram showing a display example of base values displayed by outputting display data according to A1508) of FIG. 56 .

As shown in FIG. 68, the base value is cyclically displayed by switching the type every 5 seconds (predetermined period). For example, the types of base values displayed are: real-time values being measured (that is, the latest base values (final base values) of the control section currently being measured) → base values measured throughout the control section one time before ( That is, the final base value of the control section 1 time before) → Base value measured throughout the control section 2 times before (that is, the final base value of the control section 2 times before) → Measured throughout the control section 3 times ago The base value (that is, the final base value of the control section three times before)→the real-time value during measurement→ . . .

It should be noted that the real-time value during the measurement of the base value is stored in the base value storage area 0, as described above. The base values measured throughout the management interval 1, 2, and 3 times before are stored in base value storage areas 1, 2, and 3, respectively. Then, when the management section is switched, it is shifted (moved) to the adjacent base value storage area and stored (A2206 in FIG. 60).

Here, digits 0 and 1 are identification segments (identification segments) that identify and indicate the type of base value.
corresponds to Digits 2 and 3 correspond to the ratio segment (ratio segment, numeric segment) that indicates the base value as a percentage (%). When the power is turned on, the aforementioned initial display (blinking of all segments of all digits) is displayed from digit 0 to digit 3.

In addition, the identification segment (digit 0 and digit 1) corresponds to the real-time value during measurement of the base value, "
bL. ”, and corresponding to the base value measured throughout the previous control section, “b1
. ", corresponding to the base value measured throughout the control section two times before, "b2."
is displayed, and "b3." is displayed corresponding to the base value measured over the entire management section three times before.

In addition, the ratio segment (digit 2 and digit 3) is "9
9. " is displayed, and when the counter value of the normal out counter TOUT is 0, "00" is displayed.

FIG. 69(A) shows a management interval, which is a base value measurement interval. Each time the total number of out balls increases by 300 or 60,000, the management section is section A → section B → section C → section D → section E from power-on at the opening of the game hall (game shop). → Switches like this.
In addition, as described above, even if RAM clear (RAM initialization) is executed due to fraud etc.,
Normal prize ball counter NSHO, normal out counter TOUT, total out counter SOUT
is not cleared, and the management sections (sections A to E) are not changed, and the performance information (base value) is not changed suddenly.

FIG. 69(B) shows the real-time value (bL.) during measurement of the base value for the sections A to E.
, and a display mode of base values (b1. to b3.) measured throughout the management section one to three times before.

Regarding the real-time value (bL.), the identification segment (digit 0 and digit 1) is "bL.
” blinks, and in the section after section B, the normal out counter TOUT is 0 to 59
If the number is 99, "bL."
L. ” lights up. As a result, "bL." is flashed while the real-time value is not stable. For the real-time value (bL.), the ratio segment (digit 2 and digit 3) is
Even if the real-time value is calculated (measured) in the section A, it is displayed as "--", and in the section B and the subsequent sections, the calculated real-time value is displayed as it is. Interval A is not displayed because the real-time value is not stable.

With respect to the base value (b1.) measured throughout the previous control interval, the identification segment (digit 0
and digit 1) are displayed by blinking "b1." in sections A and B, and "b
1. ” lights up. Regarding the base value (b1.), the ratio segment (digit 2 and digit 3) is displayed as "--" in intervals A and B, and in intervals C to E, the final base values of intervals B to D ( final value of real-time value) is displayed as it is.

Regarding the base value (b2.) measured over the entire control interval two times before, the identification segment (digit 0
and digit 1) are indicated by blinking "b2." in sections A to C, and "b
2. ” lights up. Regarding the base value (b2.), the ratio segment (digit 2 and digit 3) is displayed as "--" in intervals A to C, and in intervals D and E, the final base values of intervals B and C (
final value of real-time value) is displayed as it is.

Regarding the base value (b3.) measured over the entire control interval three times before, the identification segment (digit 0
and digit 1) are indicated by blinking "b3." in sections A to D, and "b
3. ” lights up. Regarding the base value (b3.), the ratio segment (digit 2 and digit 3) is displayed as "--" in intervals A to D, and in interval E, the final base value of interval B is displayed as it is.

[Action and effect of the third embodiment]
The gaming machine 10 according to the third embodiment includes game control means (for example, the game control device 100) capable of executing a game (variation display game), and when the result of the game is a special result, the game is advantageous to the player. A special game state can be generated. The game control means includes program storage means (for example, ROM 111b) for storing programs, arithmetic processing means (for example, CPU 111a) for performing predetermined arithmetic processing by the program, and update information storage capable of storing information updated by the arithmetic processing means. and means (for example, RAM 111c). The program storage means
A first program storage area (for example, a first ROM area), a second program storage area (for example, a second ROM area), and an unused area (for example, a second program storage area) between the first program storage area and the second program storage area. 1 unused ROM area). Arithmetic processing means (for example, CPU 11
1a) sets data of a test signal (for example, a test fire test signal) related to the game machine by a test signal setting program stored in the first program storage area, and sets test signals stored in the second program storage area. The signal output program outputs test signal data.

According to the gaming machine 10, the test signal output program is stored in the second program storage area that can be recognized as a location different from the first program storage area (for example, the first ROM area) in which the test signal setting program is stored. (for example, the second ROM area). Therefore, the part corresponding to the test signal output program is easy to understand and can be reused for other game machines (sharing with other game machines), and the development efficiency of the program used in the game machine 10 can be improved.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means outputs the data of the test signal as serial data. Therefore, in the game control means (for example, the game control device 100), the number of wires (the number of signals) and the number of connector terminals (the number of pins) can be reduced, and the space (place) for arranging electronic components can be sufficiently secured, thereby reducing the cost. It also leads to reduction. When outputting test signal data as parallel data, it is necessary to install wiring and terminals according to the type of data to be transmitted. growing.

In the gaming machine 10 according to the third embodiment, update information storage means (for example, RAM 111c)
is a first information storage area (eg, first RAM area), a second information storage area (eg, second RAM area), and an unused area between the first information storage area and the second information storage area ( For example, a first unused RAM area). Arithmetic processing means (for example, CPU 111a) is stored in a second information storage area (for example, second RAM area) by a performance display output program stored in a first program storage area (for example, first ROM area). Display data of performance information related to the gaming machine is output, and a test signal output program stored in a second program storage area (eg, a second ROM area) outputs data to a first information storage area (eg, a first RAM area). )
and outputs the data of the test signal related to the gaming machine stored in the .

According to such a game machine 10, the portion corresponding to the test signal output program is easy to understand, and the program can be reused for other game machines (shared with other game machines). can improve development efficiency. In addition, the display data of the performance information and the data of the test signal are stored in different areas (the first information storage area and the second information storage area) that can be distinguished by unused areas, so that these data can be easily handled. , the development of the performance display output program and the test signal output program becomes simple and easy to understand.

Further, in the gaming machine 10 according to the third embodiment, arithmetic processing means (for example, the CPU 111a
) saves the value of the register provided in the arithmetic processing means to the stack area of the update information storage means before outputting the data of the test signal, and before outputting the display data of the performance information, the arithmetic processing means The value of the provided register is not saved in the stack area of the update information storage means.

According to such a gaming machine 10, the register of the arithmetic processing means (for example, the CPU 111a) may be affected by a device outside the gaming machine such as the relay board 70 or the trial shooting test device while the data of the trial shooting test signal is being output. However, it is possible to protect the value of the register by saving it to the stack area before outputting the data of the test signal. Before outputting the display data of the performance information unrelated to the device outside the gaming machine, the value of the register is not saved in the stack area, so that the amount of data to be saved can be reduced.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means outputs the performance information display data and the test signal data as serial data from different output ports.
Therefore, even if components related to the trial firing test are not mounted during mass production (other than during the trial firing test), the output of the display data of the performance information is not affected.

Further, the gaming machine 10 according to the third embodiment includes setting change means (for example, the setting change device 42) capable of changing a set value (probability set value) according to the setting related to the game, and the arithmetic processing means includes the first A setting value is set in a first information storage area (eg, first RAM area) by a setting value changing program stored in a program storage area (eg, first ROM area). Therefore, by executing the setting value changing program, the arithmetic processing means updates the probability setting value in the probability setting value area, and stores and sets the updated probability setting value in the probability setting value area of the first information storage area. be able to.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means initializes at least a part of the first information storage area under a predetermined condition when the power is turned on, but initializes the second information storage area. Do not initialize. Therefore, even if the update information storage means (for example, the RAM 111c) is initialized due to fraud while the amusement arcade is open (while the store is open), the second information storage area is neither cleared nor initialized. Continuity (continuity) of display data of information (for example, base value) can be maintained, and a person confirming performance information does not feel uncomfortable.

[Fourth Embodiment]
The gaming machine 10 of the fourth embodiment will be described with reference to FIGS. 70 to 72. FIG. Configurations other than those described below may be the same as those of the first to third embodiments. In addition, in the following embodiments, the same reference numerals are used for configurations that perform the same functions as those of the first to third embodiments, and overlapping descriptions are omitted as appropriate.

The fourth embodiment particularly corresponds to a modification of the third embodiment, and relates to the storage area of the RAM 111c.

FIG. 70 is a flow chart showing the procedure of power-on processing executed by the game control device 100 when the gaming machine 10 is powered on in the fourth embodiment.

The power-on processing of the game control device 100 is not the processing executed by the game control program (see FIG. 62) stored in the ROM 111b, but the various hardware provided in the game control device 100 (the peripheral of the CPU core 102 in FIG. 64). hardware).

First, the game control device 100 receives a reset signal output from the power supply device 400 (A10301).

This reset signal is sent from the power supply device 400 through the Schmidt buffer 125, the security circuit 725 (see FIG. 64) provided in the gaming microcomputer 111, the RAM access control circuit (see FIG. 64) provided in the gaming microcomputer 111, and the (not shown) and a reset terminal of a serial communication circuit (not shown) provided in the gaming microcomputer 111 . The game microcomputer 111 transmits data to the performance control device 300, the payout control device 200, the relay board 70, and various drivers 138a-138, 150 by serial communication as described above. Specifically, when power is turned on, a reset signal is input to these reset terminals by applying a voltage equal to or lower than a predetermined voltage (eg, 5 V) for a predetermined period of time. is applied, the reset signal is no longer input.

Note that when a reset signal is input from the power supply device 400, the security circuit 725
The reset signal is continuously output to the reset terminal of the CPU core 102 until the security check processing (to be described later) is completed, and the activation of the CPU core 102 is made to wait.

Also, the reset signal is sent from the power supply device 400 to the relay board 70 and various drivers 138a-
138 and 150 reset terminals.

Then, when a reset signal is input to the reset terminal of the serial communication circuit, the voltage levels of the input terminal and the output terminal of the serial communication circuit are controlled to be low, and the serial communication circuit is initialized by hardware ( A10302). When a reset signal is input to the reset terminals of the relay board 70 and various drivers 138a-138d and 150, all data are set to 0, and the relay board 70 and various drivers 138a-138 and 150 are initialized by hardware. (A10302).

Next, by the RAM access control circuit provided in the game microcomputer 111, RA
A RAM write inhibit state in which writing to M111c is restricted occurs (A10303).
By generating a RAM write-inhibit state at power-on, the RAM can be written at the wrong time.
111c can be prevented from being updated.

Next, the security circuit 725 (FIG. 64) to which the reset signal is input executes self-diagnostic processing (A10304). The self-diagnosis process is a process of determining whether or not the security circuit 725 has been initialized.

Then, when the self-diagnostic process determines that the security circuit 725 has been initialized, the security circuit 725 executes the security check process (A1
0305). The security check process is executed by using the validity confirmation information stored in the ROM 111b as hardware (HW) parameters.
This is a process of judging the validity of the program stored in the .

In the process of step A10305, when the security check process is executed, the process proceeds to the game control device program start preparation process. At this time, the security circuit 725 stops outputting the reset signal to the reset terminal of the CPU core 102 so that the CPU core 10
2 is activated. Therefore, the game control device program start preparation process is executed by the CPU core 102 . The game control device program start preparation processing will be described later with reference to FIG.

[Game control device program start preparation process]
FIG. 71 is a flow chart for explaining game control device program start preparation processing of the fourth embodiment. In addition, the first half of the game control device program start preparation process (program counter 1
234 (PC register) until the reset address is set) is the ROM 111b (
3 and 50), but not by the initial value setting circuit 1241 (see FIG. 64) provided in the CPU core 102.

When the CPU core 102 receives the reset signal from the security circuit 725 , the built-in reset circuit 1240 causes the initial value setting circuit 1241 to operate. At this time, the built-in reset circuit 1240 causes the instruction interpretation and execution circuit 1242 to wait until the initial value setting circuit 1241 sets the initial values in each register.

When the initial value setting circuit 1241 starts operating, it sets "01FFh" as a default value (initial value) in the stack pointer 1233 (SP register), and sets the IY register 1232a.
, 1232b are set to the initial value "0000h" (the top address of the RAM 111c), and DP
The initial value "9000h" (the top address of the game control data area of the ROM 111b) is set in the register 1230, and the reset address "8000h" is set in the HL register 1212A.
” and a value of “00h” for other registers (“0000h” for 16-bit registers).
value) is set (A10401).

It should be noted that the default value "01FFh" of the stack pointer 1233 (SP register) set by the initial value setting circuit 1241 is the default value of the starting address (leading address) which is the base point (reference) of the stack area for game control. .

Next, the initial value setting circuit 1241 sets the value of "8000h", which is the top address of the ROM 111b, as the reset address in the program counter 1234 (A104
02). As a result, an initial value is set in each register. Next, built-in reset circuit 12
40 activates the instruction interpretation and execution circuit 1242 that has been on standby, and the instruction interpretation and execution circuit 1
242 starts executing the program from the address indicated by the program counter 1234 (corresponding to the reset address of the ROM 111b in which the game control program is stored). The processing after the command interpretation execution circuit 1242 starts executing the program will be described in the game control device main processing (FIGS. 5 and 54).

FIG. 72 is a diagram illustrating details of storage areas of the RAM 111c in the fourth embodiment. In the fourth embodiment, the configuration of the storage area of the RAM 111c is different from that in the third embodiment.

In this embodiment, the RAM 111c (update information storage means) has addresses 0000h to
A first RAM area (first information storage area) at 01FFh and addresses 0280h to 03FF
h, a second RAM area (second information storage area), and an unused area A (addresses 0200h to 027Fh, first unused RAM area) between the first RAM area and the second RAM area. Prepare. The first RAM area and the second RAM area are located in the address space (or memory space) with the unused area A interposed therebetween.

The minimum address (lower limit address) "0200h" is used as the addresses at both ends of the unused area A.
and the maximum address (upper limit address) "027Fh" are stored in the program management area of the ROM 111b as hardware (HW) parameters.

No unused area is provided after the second RAM area, and the last address of the second RAM area is matched with the last address of the RAM 111c.

In the first RAM area, addresses 0000h to 00F6h are work areas for game control (first
Work area, first work area), and addresses 01C7h to 01FFh are stack areas for game control (first stack area). Between the game control work area and the game control stack area, an unused area B1 (addresses 00F7h to 01C6h) is provided. The work area for game control and the stack area for game control are address spaces (or
memory space).

Start address (leading address) "01F
Fh" maintains the default value set in the stack pointer 1233 (SP register) by the initial value setting circuit 1241 when the power is turned on as described above, and is not changed by the program. That is, even in the stack pointer setting process (A1002) of the main process, the start address (top address) "01FFh" of the stack area for game control is not changed. Thus, the game control stack area is provided based on the default address that is not changed by the program. Game control stack area, start address (top address, tip address) from "01FFh" limit address (minimum value, end address)
The range is up to "01C7h". Note that the limit address is also set to the initial value setting circuit 1 when the power is turned on.
241 may be set.

In addition, the width of the first RAM area from the base point "01FFh" of the stack area for game control to the top address "0000h" of the RAM 111c is the total storage capacity of the RAM 111c.
It is 512 bytes which is half a byte.

The direction in which the stack of the stack area for game control extends is the direction toward the work area for game control, which is the direction in which the address becomes smaller in this embodiment. Data stored in the game control stack area is stored at address "0
1FFh", and the stack pointer 1233 stores the smaller address accordingly. Return data from game control stack area (PO
P) Then the address stored in the stack pointer 1233 is increased. An area in which no data is stored in the stack area for game control becomes an empty area.

In addition, when the stack pointer 1233 becomes smaller than the limit address (minimum value) "01C7h", an overflow occurs in the game control stack area, but the data in the game control work area is destroyed due to the existence of the unused area B1. it gets harder.

In the second RAM area, addresses 0280h to 02A0h serve as an outside work area (second work area, second work area), and addresses 03D2h to 03FFh serve as an outside stack area (second stack area). An unused area B2 (addresses 02A2h to 03D1h) is provided between the out-of-area work area and the out-of-area stack area. The work area for outside the area and the stack area for outside the area are divided into address spaces (or memory spaces) so as to sandwich the unused area B2.
located in

The start address (leading address), which is the base point (reference) of the stack area outside the area, is "03FF
h" saves the information in the registers of the CPU 111a to the outside stack area (
PUSH) is set (A1702, A1902, A2202). The start address (top address) of the stack area outside the area is the start address of the game control stack area (
Unlike the head address), it may not be set by the initial value setting circuit 1241 when the power is turned on, and may be appropriately changed by a program without being fixed. The outside stack area is
The range is from the start address (top address, top address) "03FFh" to the limit address (minimum value, end address) "03D2h". Note that the limit address may not be set by the initial value setting circuit 1241 when power is turned on, or may be appropriately changed by a program instead of being fixed.

It should be noted that the direction in which the stack in the out-of-area stack area extends is the direction toward the out-of-area work area, which is the direction in which the address becomes smaller in this embodiment. Data stored in the outside stack area is stored at address "03FF
h", and the stack pointer 1233 will store the smaller address accordingly. When data is returned (POP) from the outside stack area, the address stored in the stack pointer 1233 is increased. An area in which data is not stored in the outside stack area becomes an empty area.

When the stack pointer 1233 becomes smaller than the limit address (minimum value) "03D2h", overflow occurs in the outside stack area. Become.

As described above, the RAM 111c has, in the address space (or memory space), a work area for game control (first work area) used in connection with the control of the game (variation display game) in ascending order of address. And, game control stack area (first stack area) used in connection with game control, area outside work area (second work area) other than game control work area, and game control stack area other than and an outside stack area (second stack area). In addition, the RAM 111c includes an unused area B1 between the game control work area and the game control stack area in the address space, and an unused area A between the game control stack area and the outside work area, An unused area B2 is provided between the out-of-area work area and the out-of-area stack area.

The unused areas A, B1, and B2 are unused areas other than the working area and the stack area, and the addresses of the unused areas may store predetermined numerical values that are not used for control. . In this embodiment, all unused areas are provided between the work area and the stack area, but a configuration in which the unused areas B1 and B2 are not provided is also possible.

In particular, when the CPU 111a attempts to access the unused area A through the access circuit 1243 (FIG. 64), that is, when the address of the unused area A is specified in the instruction to be executed by the CPU 111a, the built-in Through the reset circuit 1240, the CPU 11
1a (CPU core 102) is reset. For example, the reset is performed by the built-in reset circuit 12
40 activates the initial value setting circuit 1241 to set initial values in each register provided in the CPU 111a (CPU core 102), and then activates the instruction interpretation and execution circuit 1242. FIG.

Thus, the unused area A becomes an access-prohibited area (protected area) where access is prohibited and protected, and becomes an area in which neither reading nor writing can be performed. Malicious programs often use the unused area A between the first stack area and the second work area, so by using the unused area A as a protection area, the malicious program is prevented from running. can. It should be noted that the unused area A is, as described above, the hardware (H
W) Determined by parameters (here, addresses “0200h” and “027Fh” at both ends).

In this embodiment, the unused areas B1 and B2 are not access-prohibited areas (protected areas) for the sake of simplicity.

In addition, the RAM 111c can be in a RAM protected state (RAM protected state) under predetermined conditions (including when the power is turned on), such as when the CPU 111a is reset. In the RAM protect state, the RAM 111c can be read but cannot be written. Note that when clearing the RAM (initializing the RAM) in steps A1042-A1044,
The RAM 111c may be cleared (initialized) after invalidating and canceling the RAM protection state. For example, in step A1011 of the main processing (FIGS. 5 and 54), the RAM protection state is invalidated and released when RAM access is permitted.

The CPU 111a has an access prohibition/protection setting register (not shown) for setting access prohibition (access prohibition to unused area A) and RAM protection valid or invalid. Access prohibition and RAM protection are (invalid and invalid), (invalid and valid), (valid and invalid), respectively, when values 00h, 01h, 80h and 81h are set in the access prohibition/protect setting register. (valid and valid). Access prohibition and RAM protection can be set collectively by the access prohibition/protection setting register, which is convenient.

In this embodiment, when a numerical value of 80h or 81h is set in the access prohibition/protect setting register, prohibition of access to the unused area A (that is, setting of the access prohibition area) becomes effective. When a value of 00h or 01h is set in the access prohibition/protection setting register, the prohibition of access to the unused area A is invalidated, and the unused area A (that is, the addresses of both ends "0200h" and "027Fh") are set, the unused area A can be accessed. That is, when 00h or 01h is set, the CPU 111a is not reset even if an address in the unused area A is specified in an instruction to be executed by the CPU 111a, and the access becomes possible.

In the present embodiment, RAM protection is enabled when a value of 01h or 81h is set in the access prohibition/protection setting register, and when a value of 00h or 80h is set in the access prohibition/protection setting register. RAM protection is invalid.

[Functions and effects of the fourth embodiment]
In the gaming machine 10 according to the fourth embodiment, the gaming machine is provided with a game control means capable of executing a game, and is capable of generating a special game state advantageous to the player when the result of the game is a special result. The control means includes program storage means (for example, ROM 111b
) and arithmetic processing means (for example, CPU 111a) that performs predetermined arithmetic processing by a program
and update information storage means (for example, RAM
111c) and The update information storage means includes a first work area (for example, game control work area) used in connection with game control, and a first stack area (for example, game control stack area) used in connection with game control. , a second work area other than the first work area (for example, an out-of-area work area), and a second stack area other than the first stack area (for example, a second stack area). The first stack area is provided based on a default address (for example, "01FFh") that is not changed by the program.

According to such a gaming machine 10, the reference (base point) address of the first stack area used in connection with game control uses the default address as it is. A decrease in work efficiency (development efficiency) can be prevented. In addition, even when a program (especially a game control program) is commonly developed between different models, it is possible to prevent a decrease in work efficiency (development efficiency). Since the stack area can be set arbitrarily, if the address of the stack area is different between the models of gaming machines, it becomes an obstacle to developing a common program between the models.

Further, in the gaming machine 10, the update information storage means has a protection area (for example, unused area A) between the first stack area and the second work area. An unauthorized program (especially an unauthorized game control program) is located in a protected area that is neither a work area nor a stack area (for example, an unused area A
However, even in this case, since the protected area is protected, the arithmetic processing means cannot be reset or written, and an unauthorized program cannot operate. In particular, malicious programs often use the unused area A between the first stack area and the second work area. can be prevented.

[Fifth embodiment]
The gaming machine 10 of the fifth embodiment will be described with reference to FIG. Configurations other than those described below may be the same as those of the first embodiment. In addition, in the following embodiment, the same reference numerals are used for the configuration having the same function as in the first embodiment, and overlapping descriptions are omitted as appropriate.

Note that the base value shown in the fifth embodiment is the performance value (performance information) of the gaming machine 10, and is the payout rate in the normal game state. Also, in general, a set value (fixed value) is determined for each gaming machine as the base value. In the fifth embodiment, an example in which setting values (design base values) of the gaming machine 10 are stored in the ROM 111b (FIG. 3) of the gaming microcomputer 111 is shown. In addition, the CPU 111a (FIG. 3) of the game microcomputer 111 calculates the payout rate (base calculation),
Get the base value (measurement base value) in live fire. As mentioned above, the payout rate is
It is calculated by (the number of acquired balls / the number of discharged balls) x 100 (%).

[Base error notification processing]
First, the base error notification process will be described. FIG. 73 is a flow chart showing the procedure of the base error notification process by the game control device 100. As shown in FIG. The base error notification process may be executed as part of the performance display edit process (A1052 in FIG. 5B). Alternatively, it may be executed between steps A1318 and A1319 of the timer interrupt process (FIG. 6A).

As shown in FIG. 73, when starting the base error notification process, the game control device 100 first determines whether or not the number of out balls is equal to or greater than a specified number (A10101). The number of out balls (the number of ejected balls) can be obtained by counting the signals of the out ball detection switch 74 (FIG. 3). In addition, the acquired number of out-balls is stored in the number of out-balls area (for example, the area within the RAM 111c (FIG. 3) of the gaming microcomputer 111). Also, the prescribed number is
60000 pieces. The specified number does not have to be constant, and may be changed according to the situation (for example, the time after power-on of the gaming machine 10 or the gaming state).

If the number of out balls is less than the specified number (the result of A10101 is "N"), it is repeatedly determined whether or not the number of out balls is equal to or greater than the specified number (A10101). On the other hand, when the number of out balls is equal to or greater than the specified number (the result of A10101 is "Y"), the game control device 100 acquires the design base value stored in the ROM 111b (FIG. 3) of the game microcomputer 111. (A10102). Note that the number-of-out-balls area storing the number of out-balls is cleared to zero when the specified number is reached (that is, when the result of A10101 becomes "Y").

Next, the game control device 100 acquires the base value (measurement base value) in actual shooting by calculating the payout rate (base calculation) (A10103). Note that the base value (measurement base value) is calculated as a performance value (performance information) in the performance display editing process (A1
052). Next, the game control device 100, the acquired measurement base value, the game microcomputer 11
Calculate the difference (absolute value) from the design base value acquired from the ROM 111b (FIG. 3) of 1 (
A10104). Specifically, (measurement base value) - (design base value) is calculated, and the absolute value of the calculation result is obtained.

Next, the game control device 100 determines whether or not the difference (absolute value) between the measured base value and the design base value is within the range of 0 to 10% of the design base value (A10105). That is, the ratio of the difference (absolute value) between the measured base value and the design base value to the design base value is calculated. Specifically, {(difference (absolute value) between measured base value and design base value)/(design base value)}×100 (%) is calculated. Then, it is determined whether or not the calculated result is within the range of 0 to 10% of the design base value.

If the difference (absolute value) between the measured base value and the design base value is within the range of 0 to 10% of the design base value (the result of A10105 is "Y"), the base error notification process is terminated. Thus, when the degree of divergence between the measured base value and the design base value is very small, the game machine 1
0, malfunction of the game machine 10, or the state of the faulty nail of the game machine 10 is different from that at the time of shipment. do.

On the other hand, if the difference (absolute value) between the measured base value and the design base value exceeds 10% of the design base value (the result of A10105 is "N"), the game control device 100 It is determined whether or not the difference (absolute value) from the design base value is 21% or more of the design base value (A10106). The difference (absolute value) between the measurement base value and the design base value is 2 of the design base value.
When it is 1% or more (the result of A10106 is "Y"), the game control device 100 sets a strong error flag in a predetermined register (A10107).

Thus, when the strong error flag is set, the game control device 100 outputs data for displaying a strong error to the driver 150 of the performance display device 152, ON data of a strong error signal is output to the external information terminal 71 for informing the internal control device (hall computer, etc.) of the strong error.

For example, when the strong error flag is set, the ON data of the strong error signal is saved in the external information output data area and notified to the external device by the external information editing process (A1319 in FIG. 6A). For example, an external device installed in a game store (information collection terminal, game hall internal management device (
hall computer), etc.), and from the external device, strong error notification information indicating that the measurement base value and the design base value are significantly different is output by voice, image display, or the like. By outputting this strong error notification information, it becomes possible for hall officials and the like to quickly determine whether the gaming machine 10 is fraudulent or malfunctioning.

Alternatively, when the strong error flag is set, the performance display monitor control process (A1320 in FIG. 6A
) outputs data for displaying a severe error to the driver 150 , and the performance display device 152 notifies (displays) the severe error. In this way, the performance display device 152 notifies (displays) the severe error notification information indicating that the measured base value and the design base value are significantly different, so that the persons involved in the hall, etc. can promptly detect fraud or malfunction of the gaming machine 10. It becomes possible to judge

On the other hand, the difference (absolute value) between the measurement base value and the design base value is less than 21% of the design base value (
That is, if the result of A10106 is "N"
), the game control device 100 sets a weak error flag in a predetermined register (A101
08).

Thus, when the weak error flag is set, the game control device 100 outputs data for displaying the weak error to the driver 150 of the performance display device 152, ON data of a weak error signal for notifying an internal control device (hall computer, etc.) of the weak error is output to the external information terminal 71 .

For example, when the weak error flag is set, the ON data of the weak error signal is saved in the external information output data area and notified to the external device by the external information editing process (A1319 in FIG. 6A). For example, an external device installed in a game store (information collection terminal, game hall internal management device (
hall computer), etc.), and weak error notification information indicating that the measurement base value and the design base value are slightly different is output from the external device by voice or image display. By outputting this weak error notification information, it becomes possible for hall personnel and the like to quickly determine whether the gaming machine 10 is fraudulent or malfunctioning, or whether the state of the obstacle nail of the gaming machine 10 is different from that at the time of shipment.

Alternatively, when the weak error flag is set, the performance display monitor control process (A1320 in FIG. 6A
) outputs data for displaying the weak error to the driver 150 , and the weak error is reported (displayed) on the performance display device 152 . In this way, the performance display device 152 notifies (displays) weak error notification information to the effect that the measured base value and the design base value are slightly different, so that the persons involved in the hall, etc. can Alternatively, it is possible to quickly determine that the state of the obstacle nail of the game machine 10 is different from that at the time of shipment.

It should be noted that the mode of notification of strong error notification information and weak error notification information are different. For example, when the performance display device 152 is a 4-digit 7-segment display as described above, the strong error annunciation information is conspicuously displayed as "EEEE" using 4 digits, and the weak error annunciation information may be inconspicuously displayed as "----". Further, for example, in the external device, the strong error notification information may be notified by loud sound from a speaker or a large image display on the monitor, and the weak error notification information may be notified by a soft sound or a small image display on the monitor. .

[Functions and Effects of the Fifth Embodiment]
The gaming machine 10 according to the fifth embodiment can execute games (ordinary figure variation display game, special figure variation display game), and when the result of the game is a special result (big hit), it is advantageous to the player. It is a gaming machine capable of generating a special game state (big hit state). In addition, the game machine 10 is the game machine 1
Performance value measuring means (game control device 100 (especially game microcomputer CPU 111a)) for measuring a performance value of 0 (base value (ball payout rate in normal game state)), and the measured performance value (
A calculation means (game control device 100 (especially game microcomputer C
PU 111a)) and the ratio of the difference to a predetermined design value is a predetermined value (for example, 10%)
Error notification means (game control device 100 (especially game microcomputer CPU 111a), etc.) for notifying an error (weak error, strong error) when the error is greater than.

According to such a game machine 10, the performance value (base value) of the game machine 10 is measured, and the difference between the measured performance value (measurement base value) and a predetermined design value (design base value) is calculated. and if the ratio of the difference to a predetermined design value is greater than a predetermined value (for example, 10%) (and
21%), it is possible to report a weak error, so that it is possible to quickly discover fraud or failure of the game machine 10, or a difference in the state of the obstacle nail of the game machine 10 from that at the time of shipment. can.

Further, according to the game machine 10, the performance value (base value) of the game machine 10 is measured, and the difference between the measured performance value (measurement base value) and a predetermined design value (design base value) is calculated. is calculated, and when the ratio of the difference to a predetermined design value is equal to or greater than a predetermined value (for example, 21%), a strong error can be reported, so that fraud or failure of the gaming machine 10 can be quickly discovered. can be done.

Further, in the gaming machine 10 according to the fifth embodiment, when the number of discharged game balls discharged from the game area reaches a specified number, the computing means (game control device 100) calculates the difference and notifies an error. Means (game control device 100, etc.) can report an error. Therefore, the difference is not always calculated or the error is notified, and the load on the calculation means and the error notification means is reduced.

[Sixth embodiment]
A sixth embodiment will be described with reference to FIGS. 74 to 85. FIG. Configurations other than those described below may be the same as those of the first to fifth embodiments.

[Production control device of the sixth embodiment]
FIG. 74 is a block diagram showing the effect control device 300 and the board etc. connected thereto, which constitute the gaming machine 10 of the sixth embodiment. As shown in FIG. 74, the gaming machine 10 of the present embodiment includes a power supply device 400, a game control device 100 (game control means, not shown), and an effect control device 300 (effect control means). A panel relay board 915, a frame relay board 916, a cooling fan 45, an LVDS board 918, a ROM board 920, etc. are harnesses and connectors (CN).
are connected via

The production control device 300 is connected to the power supply device 400, and has a DC power supply (32V, 15V, 12V
V, 5V), a power failure monitoring signal (5V), and a reset signal (5V) are input. Moreover, the analysis port 955 grade|etc., can be connected to the production|presentation control apparatus 300 now.

The effect control device 300 is provided with a voltage generator 800 (voltage generator). The voltage generator 800 generates 1.05 V, 1.5 V,
It produces an output voltage of 3.3V. Details of the voltage generator 800 will be described later.

The board surface relay board 915 connects the board surface motor driver 44a (part of the board effect device 44), the board surface motor sensor 47a (the effect accessory switch 47), and the board surface decoration LED driver 46a (part of the board decoration device 46). A relay board for transmitting and receiving signals. In addition, the board surface relay board 9
15, a DC power supply (32V, 15V,
12V, 5V) are supplied.

Frame relay board 916 includes frame motor driver 44b (part of frame effect device), effect button switch 25a, frame motor sensor 47b, first frame speaker (upper speaker 19a), second frame speaker (lower speaker 19b), frame It is a relay board for transmitting and receiving signals to and from the decoration LED driver 18a (part of the frame decoration device 18). Also, the frame relay board 916 is supplied with DC power (12 V, 5 V) from the power supply device 400 via the effect control device 300 .

The cooling FAN 45 receives a DC power supply (12V
) is supplied.

The LVDS board 918 is a relay board that relays the effect control device 300 and the display device 41 . The LVDS board 918 is supplied with DC power (32 V, 12 V, 5 V) from the power supply device 400 via the effect control device 300 . Also, the LVDS substrate 918 includes the voltage generator 8
A DC power supply (3.3 V) is supplied from 00 and the DC power supply is output to the display device 41 .

A power generation circuit 919 can be provided on the LVDS substrate 918 . Power generation circuit 9
19 converts the DC power (32V) supplied from the power supply device 400 into DC power (12V) and outputs it to the display device 41 (LED backlight 917). As a result, the power supply generation circuit 919 can be designed according to the standard of the display device 41 to be connected, and even when the display device 41 is replaced, it is not necessary to modify the effect control device 300 simply by replacing the LVDS board 918. Therefore, the display device 41 can be easily replaced.

The ROM board 920 has an image ROM 325 and outputs image information stored in the image ROM 325 to the VDP 312 (video display processor, arithmetic circuit).
A DC power supply (3.3 V) is supplied from the voltage generator 800 to the ROM board 920 .

The effect control device 300 includes a first VDP-RAM 923 (storage means) and a second VDP-R
An AM 924 (storage means) is provided. First VDP-RAM 923 and second VDP-
The RAM 924 is a storage medium that temporarily stores image information (moving and still images) decoded by the VDP 312, and operates when a DC power supply (1.5 V) is supplied from the voltage generator 800. FIG.

VDP312 (general-purpose port 942) which comprises production control device 300 performs transmission and reception of a signal with the exterior by a signal of 3.3V. However, the built-in host CPU that constitutes the VDP 312
(CPU 311, image processing means, VDP core, arithmetic processing means) operate at 1.05 V,
The DRAM I/F 940 connected to the first VDP-RAM 923 (storage means) and the second VDP-RAM 924 (storage means) operates at 1.5V. Therefore, the VDP 312 operates by being supplied with DC power (1.05 V, 1.5 V, 3.3 V) from the voltage generator 800 .

As the input side of the VDP 312, the effect control device 300 includes a level conversion circuit 9 that performs level conversion (5.0 V → 3.3 V) of the signal of the power supply 400 (power failure monitoring signal, reset signal)
21, level conversion of the signal of the game control device 100 (production command) (5.0V → 3.3V)
level conversion circuit 922 for performing level conversion (5.0
V → 3.3 V), level conversion circuit 929 for level conversion (5.0 V → 3.3 V) of signals from effect button switch 25a and frame motor sensor 47b.
is provided.

In addition, as the output side of the VDP 312, the effect control device 300 includes a board relay board 915 (
Level conversion (3
. 3V→5.0V), level conversion circuit 925, frame relay board 916 (frame motor driver 44b, production button switch 25a, frame motor sensor 47b) level conversion (3.3V→5.0V) level conversion circuit 928 to perform level conversion (3.3V→5.
0V) is provided.

Furthermore, for two-way communication of the VDP 312, the production control device 300 includes a board decoration LE
Level shift of signals transmitted bidirectionally by the D driver 46a and the I2C communication method (3.3
V ⇔ 5.0 V), and the level shift (3.3 V ⇔ 5
. 0V) is provided.

Direct current power (15V) from the power supply device 400 is supplied to the effect control device 300, and VD
Amplifier circuit 337 (first amplifier circuit 930) for amplifying audio data output from P312
, a second amplifier circuit 931). The first amplifier circuit 930 outputs the amplified audio data to the first frame speaker (upper speaker 19a), and the second amplifier circuit 931 outputs the amplified audio data to the second frame speaker (lower speaker 19b). do.

The effect control device 300 is provided with a protection circuit 933 that stabilizes the LVDS signal output from the VDP 312 .
LVDS signal (3.3V) is output to .

In addition, the production control device 300 includes a watchdog timer circuit 324 that monitors the operation of the VDP 312, a PROM 321 that stores programs executed by the VDP 312 and various data.
, a FeRAM 323 capable of retaining memory contents even if power is not supplied in the event of a power failure, a volume control switch 335 (input circuit), and the like are provided. Also, the LVDS substrate 918 is provided with a real-time clock circuit 338 connected to the high voltage (5 V) side of the level shift circuit 932 .

VDP312, CPU3 which analyzes the production command which is transmitted from game control control equipment 100
11 (built-in host CPU), RAM 322 (built-in CP
U work memory), CPU I/F for transmitting and receiving data in the CPU 311 and VDP 312
937, HOST CPU I/F 938, VDP 31 for transmitting data in PROM 321 to CPU 311 and for outputting various commands (display list, motor command, lamp command, sound command) obtained by CPU 311 analyzing production commands
2 initialization.

The VDP 312 includes a general-purpose port 942 for transmitting and receiving signals to and from the outside, a CG bus I/F 941 for reading image information from the image ROM 325, a first VDP-RAM 923 and a second VDP-R.
It has a DRAM I/F 940 that transmits and receives image information (moving and still images) to and from the AM 924 .

The VDP 312 has a controller 943 that outputs motor control data based on motor commands and LED control data based on lamp commands. Controller 9
43 generates motor control data based on the motor command and outputs it to board motor driver 44a, board motor sensor 47a, frame motor driver 44b and frame motor sensor 47b in a mutually distinguishable form.

Further, the controller 943 decodes the lamp command based on the lamp decoder 944 to generate LED control data, which is sent to the board decoration LED driver 46a and the frame decoration LE.
They are output to the D driver 18a (a part of the frame decoration device 18) in a mutually identifiable form.

The VDP 312 has a sound ROM 327 that outputs audio data based on sound commands. The sound ROM 327 selects the sound data stored in itself based on the sound command, decodes the sound data based on the sound source LSI 314 (sound decoder), and adjusts the sound quality by the post effector 945 and the volume control switch 335. output to the first frame speaker (upper speaker 19a) and the second frame speaker (lower speaker 19b).

The VDP 312 has an image processing circuit that performs image processing based on the display list. The image processing circuit stores image ROM 325 or VRAM based on the display list.
A preloader circuit 946 that reads out image information from 326 (storage means), and a VRAM 326 (or first VDP-RAM 923, second VDP-RAM 924) that stores the read image information.
and the VRAM 326 (or the second VDP
-RAM 924), a drawing circuit 948 for drawing image information in the frame buffer, a geometry engine 949 for setting the coordinates of the image information, a VRAM 326 (or the first VRAM
DP-RAM 923, second VDP-RAM 924), an index table circuit 950 that allocates storage areas, and a display circuit 951 that displays and outputs frame buffer data stored in VRAM 326 (or first VDP-RAM 923, second VDP-RAM 924). Display A, display B, display C), frame buffer data, etc. are output to the output selection circuit 95
2, and a data transfer circuit 953 for transmitting and receiving data in the image processing circuit.
4 to exchange data with each other.

VDP 312 has address bus 935 and data bus 936 . Address bus 935 includes HOST CPU I/F 938, system control register 939, DRAM I/F
940, CG bus I/F 941, general-purpose port 942, controller 943, sound ROM 32
7. Addresses are transmitted and received among the graphics decoder 947, data transfer circuit 953, preloader circuit 946, display circuit 951, and drawing circuit 948. data bus 936
, HOSTCPUI/F938, DRAMI/F940, VRAM326, CG bus I
/F 941 , controller 943 , sound ROM 327 , graphics decoder 947 , data transfer circuit 953 , preloader circuit 946 , display circuit 951 and drawing circuit 948 transmit and receive data.

In this embodiment, the first VDP-RAM 923 and the second VDP-RAM 924 are DRA
It has a common address bus 959a and data bus 959b that connect to MI/F 940 . The first VDP-RAM 923 can access the upper 8 bits of the image information (16 bits) via the data bus 959b, and the second VDP-RAM 924 can access the data bus 959b.
The lower 8 bits of the image information can be accessed via the .

Here, in the image information (16 bits), one address is associated with moving image (upper 8 bits) data and still image (lower 8 bits) data. Therefore, the video data is the first VD
Still image data is stored in the second VDP-RAM 924 .

As a result, when the display circuit 951 designates one address for reading, the first VDP
Since the moving image data stored in the -RAM 923 and the still image data stored in the second VDP-RAM 924 can be read at the same time, image information (moving image data, still image data) to the display device 41 transfer speed can be improved.

[Decoration control device]
FIG. 75 is a circuit diagram of the decoration control device 750. As shown in FIG. Here, the decoration control device 750 (rendering device) uses the board surface relay board 915 (board surface motor driver 44a) or the frame relay board 91
6 (frame motor driver 44b).

The decoration control device 750 is electrically connected to the effect control device 300 and receives power supply of 32V, 15V, 12V and 5V from the power supply device 400 . Also, the decoration control device 750 receives a serial data signal (SDATA), a serial clock signal (SCLK), a latch signal (LATCH), and an enable signal (ENBL) from the VDP 312 (CPU 311).

A driver 751, a driver 752, and a driver 753 are arranged in the decoration control device 750 (
The number of drivers is arbitrary). The drivers 751 and 752 drive the motors M1 and M2 (first driven parts) (stepping motors (not shown)) that operate the accessory, and the driver 753 drives the solenoid S ( A second driven part (not shown) is driven, and each has the same configuration.

Drivers 751, 752 and 753 each have a VDP 312 (CPU 311) (Fig. 74
), a serial data signal (SDATA), a serial clock signal (SCLK), a latch signal (LATCH), and an enable signal (ENBL) are input. These signals are high
H (5V), Low (0V) are represented by a list of binary values, for example, a serial data signal (
SDATA) is represented by 12 bits.

Drivers 751, 752, 753 have a signal line 754A for transmitting a serial data signal (SDATA), a signal line 754B for transmitting a serial clock signal (SCLK), a signal line 754C for transmitting a latch signal (LATCH), A signal line 754D through which an enable signal (ENBL) is transmitted is connected.

Elements for stabilizing High (5V) and Low (0V), that is, pull-up resistors 755A-755D and Zener diodes 756A are provided on the signal lines 754A-754D.
-756D, Resistors 757A-757D, Capacitors 758A-758D, Buffer 759
A-759D (single Schmidt trigger buffer), resistors 760A-760D are installed.

One end of the pull-up resistors 755A-755D is connected to a 5V terminal (power supply 400 (DC5V)
), and the other end is connected to signal lines 754A-754D. When each signal is HIGH, the voltage of the signal lines 754A-754D is pulled up to 5V.

The Zener diodes 756A-756D have cathodes connected to signal lines 754A-754D and anodes grounded. The Zener diodes 756A-756D have a Zener voltage (Zener breakdown voltage) set to 5V so that the voltage of the signal lines 754A-754D does not exceed 5V when each signal is HIGH.

Resistors 757A-757D are connected to signal lines 754A-7 of pull-up resistors 755A-755D.
54D are interposed in the signal lines 754A-754D at positions downstream of the connection position with 54D.

Capacitors 758A-758D have one end connected to resistor 75 on signal lines 754A-754D.
7A-757D is connected to a position downstream of the signal, and the other end is grounded.

Resistors 757A-757D and capacitors 758A-758D connect drivers 751, 75
It functions as a low-pass filter whose output is 2,753.

Buffers 759A-759D are connected to capacitors 75 on signal lines 754A-754D.
It is interposed at a position downstream of the signal from the connection position of the signal lines 754A to 754D of 8A to 758D, and eliminates the fluctuation of each signal (voltage). Resistors 760A-760D are
The currents (
signal).

Drivers 751, 752, and 753 have, on the input side, a drive voltage input terminal VM, a clamp voltage input terminal VCLAMP, a serial data input terminal SDATAIN, a serial clock input terminal SCLK, a latch signal input terminal LATCH, an enable signal input terminal ENBL, and a reset terminal RESET. have Drivers 751, 752, and 753 have, on the output side, a first output terminal OUT1, a second output terminal OUT2, a third output terminal OUT3, a fourth output terminal OUT4, a serial data output terminal SDATAO, and a ground terminal GND. have Each driver 751, 752, 753 consists of a shift register, a latch circuit, etc.
The serial data from the input terminal SDATAIN is taken in by a latch signal, and the first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 are connected.
can be output from

The signal line 754 A is connected to the serial data input terminal SDATAIN of the driver 751 . The signal line 754B is branched at its tip and connected to the serial clock input terminals SCLK of the drivers 751, 752 and 753, respectively. The signal line 754C is branched at its tip and connected to the latch signal input terminals LATCH of the drivers 751, 752 and 753, respectively. The signal line 754D is branched at its tip and connected to the enable signal input terminals ENBL of the drivers 751, 752 and 753, respectively. Drivers 751, 752, 753
, when the enable signal is High, the first output terminal OUT1 and the second output terminal OUT
2. The output of the third output terminal OUT3 and the fourth output terminal OUT4 is prohibited, and the output is permitted when the output is Low.

A first output terminal OUT1, a second output terminal OUT2, and a third output terminal OUT of the driver 751
3. The fourth output terminal OUT4 is for example a motor M1 (stepping motor (not shown))
), and likewise the first output terminal OUT1, second output terminal OUT2, and
A third output terminal OUT3 and a fourth output terminal OUT4 are connected to another motor M different from the motor M1.
2 (stepping motor (not shown)). A first output terminal OUT1 (other output terminals may be used) of the driver 753 is connected to, for example, a solenoid S (not shown) of a role. Although the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 of the driver 753 are not used, they may be used for driving other solenoids.

Note that the motors M1 and M2 are for driving accessories and the like by rotational force, and the solenoid S is for driving the accessories and the like by reciprocating motion, and their driving modes are different from each other.

A 12V terminal (power supply 4
00 (DC 12V)) is connected to reset terminals RE of drivers 751, 752, and 753.
A 12V terminal (power supply device 400 (DC12V)) is connected to SET through a capacitor 761 . A reset terminal RESET is normally supplied with a ground potential, but a reset signal caused by a voltage rise due to a high-frequency noise signal or the like from a 12V terminal is input. registers, latch circuits, etc.).

A clamp voltage input terminal VCLAMP of the drivers 751 and 752 is connected to a 15V terminal (power supply device 400 (DC15V)) via a Zener diode 762 (backflow prevention means). The Zener diode 762 has an anode side connected to the 15V terminal and a cathode side connected to the clamp voltage input terminal to prevent reverse current flow to the 15V terminal. On the other hand, a 32V terminal (power supply device 400 (DC32V)) is connected to the clamp voltage input terminal of the driver 753 .
is connected.

The serial data output terminal SDATAO of the driver 751 is connected to the serial data input terminal ADATAIN of the driver 752, and the serial data output terminal SD of the driver 752 is connected.
ATAO is connected to the serial data input terminal SDATAIN of the driver 753 .

A serial data signal (SDATA) (e.g. 12 bits) is a serial clock signal (
SCLK) as a trigger, a driver 751 (capable of capturing 4 bits, for example) sequentially captures from the first bit, a driver 752 (capable of capturing 4 bits, for example), and a driver 753 .
(for example, 4-bit fetching is possible), and when the entire serial data signal (SDATA) has been fetched through the drivers 751, 752, and 753, the latch signal (LATCH) (HIGH) is set to the driver 751, the driver 752. , driver 753
are simultaneously input to As a result, the voltage (High or Low) for driving the motor S1 is output from the first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 of the driver 751. output terminal OUT1, second
A voltage (High or Low) for driving the motor S2 is output from the output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4, and the first output terminal OUT1 of the driver 753 is output.
outputs a voltage (High or Low) for driving the solenoid S.

Therefore, in the present embodiment, a plurality of driven units (motors M1, M2, solenoid S) having different driving modes can be simultaneously driven and controlled by one serial data signal (SDATA). It is possible to easily control the driving of the accessory (of a plurality of types).

Here, drivers 751 and 752 are attached to motors M1 and M2 (not shown), respectively. One end of each coil (not shown) for driving the motor M1 is connected to a 15V terminal, and the other end is connected to a first output terminal OUT1, a second output terminal OUT2, and a third output terminal OUT2 of the driver 751 . The output terminal OUT3 and the fourth output terminal OUT4 are connected to different output terminals. Similarly, for four coils (not shown) that drive the motor M2, one end of each coil (not shown) is connected to the 15V terminal, and the other end is connected to the first output terminal OUT1 and the second output terminal OUT2 of the driver 752. , third output terminal OUT3, fourth output terminal O
They are connected to different output terminals in UT4.

Therefore, in the drivers 751 and 752, the first output terminal OUT1 and the second output terminal OU
Each coil is driven when the output of T2, the third output terminal OUT3, and the fourth output terminal OUT4 is 0 V (Low), and the driving of each coil is stopped when the output is 15 V (High).

Similarly, the driver 753 is attached to a solenoid S (not shown), one end of which is connected to the 32V terminal and the other end of which is connected to the first output terminal OUT1 (other output terminals may be used). ing. Therefore, when the output of the first output terminal OUT1 is 0 V (Low), the solenoid S is driven, and when it is 32 V (High), the solenoid S stops being driven.

In this embodiment, drivers 751, 752, and 753 input to drive voltage input terminal VM
is set to a voltage lower than the clamp voltages (V3=15V, 32V) input to the clamp voltage input terminal VCLAMP.

As a result, by supplying power to the motors M1 and M2, the load on the power supply source of the high power consumption clamp voltage (15V DC power supply for outputting 15V DC or 32V DC power supply for outputting 32V DC of the power supply device 400) can be reduced. , drivers 751, 752, 753 and driven objects (motors M1, M2, solenoid S) can be stably operated. By setting the drive voltage (V2) of the drivers 751, 752, and 753 lower than the clamp voltage (V3), the heat generated by the ICs (integrated circuits including shift registers, latch circuits, etc.) forming the drivers 751, 752, and 753 can be reduced. can be reduced. If the load on the power supply source is small, the drive voltage power source for the drivers 751, 752, and 753 may be the same as the clamp voltage power source (15V, 32V).

Further, in this embodiment, the drive voltage (V2=12V) of the drivers 751, 752, and 753 is the voltage of the signal lines 754A to 754D for transmitting signals such as the serial data signal SDATA (
V1=5V). As a result, the power supply source for communication and the power supply source for driving are separated, so that data transmission and operations of the drivers 751, 752, and 753 can be stabilized. From the above, by satisfying the relationship of V3 (clamp voltage)≧V2 (drive voltage)>V1 (data output voltage), power distribution becomes appropriate, and data transmission and driver 75
1, 752, 753, and driven objects (motor M1
, M2, solenoid S) can be stabilized.

Although the serial data output terminal SDATAO of the driver 753 is not used,
Serial data input terminal SDATAI of drivers other than drivers 751, 752 and 753
may be connected to N. In this case, the driver (a plurality of drivers may be serially connected with respect to the signal line for transmitting the serial data signal (SDATA)) is similar to the drivers 751, 752, and 753 in that the serial data signal ( SDATA), a serial clock signal (SCLK), a latch signal (LATCH), and an enable signal (ENBL) are input, and the number of bits of the serial data signal (SDATA) is appropriately designed according to the number of drivers.

[Operation when a power failure occurs in the power supply]
FIG. 76 is a time chart showing the fall of DC32V power, DC15V power, DC12V power, and DC5V power. The power supply device 400 generates a DC voltage of 32V.
A C32V power supply, a DC15V power supply that generates a DC15V DC voltage, a DC12V power supply that generates a DC12V DC voltage, and a DC5V power supply that generates a DC5V DC voltage are provided. The DC32V power supply is, for example, a switching regulator that converts a 24V AC power supply into a 32V DC voltage. can be maintained, after which the output voltage monotonously decreases.

The DC15V power supply, DC12V power supply, and DC5V power supply are DC-DC converters that convert the DC voltage (32V) output from the DC32V power supply to predetermined DC voltages (15V, 12V, 5V). In the power supply device 400, the control signal generator 430 (which may be another component in the power supply device) can set the monitoring voltage in the range of, for example, 17.2V-20V. When it drops, it detects the occurrence of a power failure and changes the power failure monitoring signal.

As shown in FIG. 76, even if the 24V AC power supply is shut down at time t0, DC32
The voltage of the V power supply maintains an output of 32 V with the instantaneous guaranteed period as a guideline, but the voltage starts to drop in the latter half of the instantaneous guaranteed period.

At time t1, when the output voltage of the 32V DC power supply drops below 21V, the control signal generator 430 stops the voltage supply from the 32V DC power supply to the 15V DC power supply (third power supply), thereby supplying the voltage from the 15V DC power supply. also ends, and when the voltage of the 32V DC power supply drops to 16V or less at time t2, the voltage supply from the 12V DC power supply is also terminated by stopping the voltage supply from the 32V DC power supply to the 12V DC power supply (second power supply). t3
When the voltage of the DC32V power supply drops below 10V, the supply of voltage from the DC5V power supply is terminated by stopping the voltage supply from the DC32V power supply to the DC5V power supply (first power supply).

Therefore, when a power failure occurs, first the motors M1 and M2 driven by the DC15V power supply and the solenoid S are stopped (FIG. 75), and then the drivers 751 and 7 driven by the DC12V power supply are stopped.
52 and 753 are stopped, and finally the transmission of the data (the drive source is the DC 5V power supply) input to the drivers 751, 752 and 753 (that is, the operation of the VDP 312) is stopped (FIG. 74).
).

As a result, before the drivers 751, 752, 753 stop driving, the motors M1, M
2 and the solenoid S are stopped, the malfunction of these can be avoided. Further, since the data transmission stops after the driving of the drivers 751, 752, 753 stops, malfunction of the drivers 751, 752, 753 can be avoided. Furthermore, since the transmission of data, that is, the operation of the VDP 312 comes last, it is possible to secure the processing time in the VDP 311 and suppress the occurrence of errors in the VDP 312 .

[Arrangement of electronic components]
FIG. 77 is a circuit diagram showing a connection mode between the VDP 312 and the volume control switch 335 in the production control device 300. As shown in FIG. In the production control device 300, the VDP 312 (general-purpose port 942
) has a rotor (not shown) for volume control, and by rotating this, the volume can be set stepwise. The volume control switch 335 is
For example, V
It can be output to DP312. The volume control switch 335 has a ground terminal GND and output terminals Y0-Y3. The output terminal Y0 outputs the least significant bit of the volume signal, the output terminal Y1 outputs the bit one level higher than the least significant bit of the volume signal, and the output terminal Y2 outputs the bit two levels higher than the lowest level of the volume signal. , and the output terminal Y3 outputs the most significant bit of the volume signal.

Output terminals Y0-Y3 of volume control switch 335 are connected to signal lines 763A-763D, respectively.
are connected to general purpose ports 942 (P0-P3) of VDP 312 by . The signal lines 763A-763D have pull-up resistors 764A-764D and resistors 765A-765.
D, capacitors 766A-766D are connected.

One end of the pull-up resistors 764A-764D is connected to the 3.3V terminal from the voltage generator 800, and the other end is connected to the signal lines 763A-763D. pull-up resistor 764A
-764D is connected to the signal lines 763A-76 when each bit of the volume signal is High.
It raises the 3D voltage to 3.3V. When each output terminal (each bit) of the volume control switch 335 and the corresponding general-purpose port 942 (one of P0 to P3) are electrically connected to the ground terminal GND due to the rotation of the rotor, 0 V (Low) is applied. , and becomes 3.3 V (Low) when not electrically connected to the ground terminal GND.

Resistors 765A-765D are connected to signal lines 763A-763A-763D on signal lines 763A-763D.
63D is interposed at a position downstream in the transmission direction of the volume signal from the connection position with the pull-up resistors 764A to 764D of 63D. Capacitors 766A-766D are connected to signal line 763 at one end.
A-763D is connected to a position downstream of resistors 765A-765D in the transmission direction of the volume signal, and the other end is grounded. Resistors 765A-765D and Capacitor 766A
-766D functions as a low-pass filter for the general purpose port 942 side.

Pull-up resistors 764A-764D, resistors 765A-765D, capacitors 766A-
766D is arranged on the board that constitutes the production control device 300, and it is preferable to mount them aligned along the direction of the current (or the direction of voltage application).

Since these electronic components (resistors and capacitors) do not have polarity, circuit characteristics are basically not affected even if the mounting direction is reversed. However, the signal pattern (wiring pattern) is complicated in the production control device 300, and furthermore, if the mounting method of the electronic parts is arbitrary, the electronic parts and signal lines can be checked while predicting the electronic parts to be checked. difficult to do.

However, by mounting electronic components (pull-up resistor 764A, resistor 765A, capacitor 766C) to one signal line (for example, signal line 763A) in accordance with the direction of the current, it is possible to mount them in the middle of the signal line. It becomes easy to predict the check target from the direction of the electronic component to be checked, and the efficiency of the check work can be improved. For example, it is possible to improve the efficiency of checking work when checking electronic components in order along one signal line (for example, signal line 763A) in the direction of the current.

In addition, electronic components (
For example, by mounting the pull-up resistors 764A to 764D in alignment with the direction of the current, it is possible to easily identify the corresponding electronic components.

Electronic parts (resistors, capacitors) have two connection pins, and on the upper surface of the electronic parts, in addition to product information such as the model number, symbols are attached for convenience. For example, one pin (
"1" (or white circle "○" or black circle "●") is attached to the part adjacent to the root of pin 1), and "2" is attached to the part adjacent to the root of the other pin (pin 2) of the main body marked (or unmarked). Therefore, for example, by mounting the electronic component so that the current flows from pin 1 to pin 2 (pin 1 is on the high voltage side), it is possible to easily predict the target to be checked. In FIG. 77, the 1-pin side of each electronic component is marked with "·".

FIG. 78 is a circuit diagram showing a connection mode between the VDP in the effect control device and the motor sensor or the like. The VDP 312 has a detection signal PUSHSW from the production button switch 25a (push switch) incorporated in the production button 25, and a plurality of motors (not shown, for example, 8) controlled by the decoration control device 750 and the like are set to the initial positions ( Detection signals MSW1-MSW8 are input from the frame motor sensors 47b (eight, for example) for detecting whether or not the frame motor sensor 47b is at the initial rotational position.

The performance button switch 25a (push switch) outputs a High (5V) detection signal PUSHSW when the performance button 25 (FIG. 1) is not pressed, and is grounded to Low (5V) when the performance button 25 is pressed. 0 V) detection signal PUSHSW.

The frame motor sensor 47b outputs a high (5V) detection signal when the motor is at the initial position, and outputs a low (0V) detection signal when the motor is not at the initial position.

The production button switch 25a is connected to the signal line 767A (to which the detection signal PUSHSW is transmitted).
, and the signal line 767 A is connected to the level conversion circuit 771 . Here, level conversion circuit 771 corresponds to level conversion circuit 929 in FIG. The signal line 767A has
A pull-up resistor 768A, a resistor 769A and a capacitor 770A are connected.

The frame motor sensor 47b is connected to signal lines 767B-767I (transmitting detection signals MSW1-MSW8), and the signal lines 767B-767I are connected to a level conversion circuit 771. FIG. Signal lines 767B-767I have pull-up resistors 768B-768I, resistor 76
9B-769I and capacitors 770B-770I are connected.

One end of the pull-up resistors 768A-768I is connected to a 5V terminal (power supply 400 (DC5V)
) and the other end is connected to signal lines 767A-767I. pull-up resistor 76
8A-768I is connected to the signal line 7 when the output of the frame motor sensor 47b is High.
67A-767I is pulled up to 5V.

Resistors 769A-769I are connected to signal lines 767A-767A-767I on signal lines 767A-767I.
It is interposed at a position downstream in the transmission direction of the detection signal from the connection position with the pull-up resistors 768A to 768I of 67I. Capacitors 770A-770I are connected to signal line 767 at one end.
A-767I is connected to a position downstream of the resistors 769A-769I in the transmission direction of the detection signal, and the other end is grounded. Resistors 769A-769I and Capacitor 770A
-770I functions as a low-pass filter for the level conversion circuit 771 side.

The level conversion circuit 771 converts the detection signal transmitted by the signal lines 767A-767I (5V) into the detection signal transmitted by the signal lines 773A-773I (3.3V) and converts it into a VD signal.
Send to general purpose port 942 (ports P4-P12) of P312.

The level conversion circuit 771 has an input terminal A, input terminals D1 to D8, an output terminal P, an output terminal Y
1-Y8, a drive voltage input terminal VCC, and a ground terminal GND.

The input terminal A is a terminal that is connected to the signal line 767A and receives the detection signal PUSHSW. The input terminals D1-D8 are connected to signal lines 767B-767I, and detect signals MSW1-M.
This is the terminal to which SW8 is input.

A signal line 773A connects the output terminal P and the port P4. Signal line 773B-
773I connects the output terminals Y1-Y8 and the ports P5-P12. The output terminal P transmits the detection signal PUSHSW converted to 3.3V to the port P4. The output terminals Y1-Y8 output the detection signals MSW1-MSW8 converted to 3.3V to the port P.
5-P12.

The driving voltage input terminal VCC of the level conversion circuit 771 is the 3.3V terminal (voltage generator 800 (
3.3V), FIG. 74) and is also connected to a capacitor 772 with one end grounded.

As in the case shown in FIG. 77, in FIG. 78, one signal line (eg, signal line 767A)
By aligning the direction of the electronic components (pull-up resistor 768A, resistor 769A) to be mounted to the direction of the current, it becomes easier to predict the check target from the direction of the electronic components mounted in the middle of the signal line. Efficiency of checking work can be improved.

Further, by mounting electronic components (for example, pull-up resistors 768A to 768I) corresponding to each other in a plurality of signal lines (signal lines 767A to 763I) in alignment with the direction of current, Electronic components can be easily identified.

As in the case shown in FIG. 77, in FIG. 78, the 1-pin side of each electronic component is marked with "·". In FIG. 78 as well, by mounting electronic components (resistors, capacitors) so that current flows from pin 1 to pin 2 (pin 1 is on the high voltage side), prediction of the check target can be easily performed. can be done.

However, the capacitors 770A-770I are mounted so that pin 1 is on the ground side. For example, if the appearance of resistors 769A-769I and capacitors 770A-770I is confusing, it is possible to distinguish them by reversing their directions.

[LVDS transmission circuit]
FIG. 79 is a circuit diagram showing a connection mode between the VDP in the production control device 300 and the display device 41. As shown in FIG. As shown in FIG. 74, the VDP 312 (signal conversion circuit 313) is connected to an LVDS transmission circuit that converts frame buffer data (image data) into differential signals according to the LVDS system and outputs the signals to the display device 41 (effect device). It is The differential signal is protected by protection circuit 933 and LV
It is transmitted to the display device 41 via the DS board 918 .

As shown in FIG. 79 (protection circuit 933 and LVDS substrate 918 omitted), VDP 312
(the signal conversion circuit 313) and the display device 41 (connector connected to the display device 41) are connected by signal lines 774A to 774F.

The signal line 774A connects the output terminal TA- of the VDP 312 and the input terminal RxIN of the display device 41.
0-. A signal line 774B connects the output terminal TA+ of the VDP 312 and the input terminal RxIN0+ of the display device 41 .

The signal line 774C connects the output terminal TB- of the VDP 312 and the input terminal RxIN of the display device 41.
1- to connect. A signal line 774D connects the output terminal TB+ of the VDP 312 and the input terminal RxIN1+ of the display device 41 .

The signal line 774E connects the output terminal TC- of the VDP 312 and the input terminal RxIN of the display device 41.
2- to connect. A signal line 774F connects the output terminal TC+ of the VDP 312 and the input terminal RxIN2+ of the display device 41 .

The signal line 774G connects the output terminal TCLK- of the VDP 312 and the input terminal CK of the display device 41.
Connect to IN-. A signal line 774H connects the output terminal TCLK+ of the VDP 312 and the input terminal CKIN+ of the display device 41 .

The signal line 774I connects the output terminal TD- of the VDP 312 and the input terminal RxIN of the display device 41.
3- to connect. A signal line 774J connects the output terminal TD+ of the VDP 312 and the input terminal RxIN3+ of the display device 41 .

The output terminal TA- and the output terminal TA+ output differential signals having phases opposite to each other, and the differential signals are input to the input terminal RxIN0- and the input terminal RxIN0+. The output terminal TB- and the output terminal TB+ output differential signals having phases opposite to each other, and the differential signals are input to the input terminal RxIN1- and the input terminal RxIN1+. The output terminal TC− and the output terminal TC+ output differential signals having phases opposite to each other, and the input terminal RxIN2− and the input terminal RxIN2+
The differential signal is input to .

The output terminal TCLK- and the output terminal TCLK+ output differential signals having phases opposite to each other,
The differential signal is input to the input terminal CKIN- and the input terminal CKIN+. Output terminal TD
The − and output terminals TD+ output differential signals having phases opposite to each other, and the differential signals are input to the input terminals RxIN3− and RxIN3+.

Output terminal TA- (output terminal TA+), output terminal TB- (output terminal TB+), output terminal T
C- (output terminal TC+) and output terminal TD- (output terminal TD+) are serial data signals in which data indicating gradations of colors (red, green, blue) for each pixel of image data displayed on the display device 41 are enumerated. (image data) to the display device 41 . Also, the output terminal TCLK- (output terminal TCLK+) transmits a serial clock signal when the display device 41 takes in the serial data.

A filter 775A is interposed between the signal line 774A and the signal line 774B.
A filter 775B is interposed between C and the signal line 774D, and a signal line 774E and a signal line 774D are connected.
74F is interposed with a filter 775C, signal lines 774G and 774H are interposed with filters 775D, and signal lines 774I and 774J are interposed with filters 775E.
is interposed. Note that the filters 775A-775E are, for example, the LVDS substrate 918
, but may be incorporated in the display device 41 .

Filters 775A-775E, for example, common code choke coils are applied, do not act as inductors for differential signals (differential mode) that are opposite in phase to each other, and do not act as inductors for noise signals (common mode) mixed in the same phase. act as inductors, allowing noise signals to cancel each other out. Therefore, the noise signal mixed at the position before the filters 775A-775E of the signal lines 774A-774J is filtered by the filter 775A-7.
Removed at 75E.

In the display device 41, the difference between the serial data signals input from the input terminal RxIN0- and the input terminal RxIN0+, the difference between the serial data signals input from the input terminal RxIN1- and the input terminal RxIN1+, and the input terminal RxIN2- and the input terminal RxIN2+ By taking the difference between the input serial data signals and the difference between the serial data signals input from the input terminal RxIN3- and the input terminal RxIN3+, each serial data signal is amplified and noise mixed during transmission is removed. . Similarly, in the display device 41, by finding the difference between the serial clock signals input from the input terminal CKIN3- and the input terminal CKIN3+, the serial clock signal is amplified and noise mixed during transmission is removed.

All of the above signals are rated at 0V at Low and 3.3V at High. However, in one of the differential signals, if the signal (Low) becomes lower than 0 V or the signal (High) becomes higher than 3.3 V, one signal (voltage) of the differential signals and the amplitude of the other signal (voltage). In this case, since there is a difference in the rise and fall of the signal between one and the other of the differential signals, the filter 775
The A-775E acts as an inductor to the differential signal, making the differential signal unstable. In this case, even if the display device 41 calculates the difference of the differential signal, the noise cannot be completely removed, and the image data obtained from the difference may become unstable.

Therefore, in this embodiment, as shown in FIG. 79, clamp diode circuits 776A, 776B, and 776C (voltage regulation means) are provided to regulate the upper and lower limits of the voltages for the signal lines 774A-774J. The clamp diode circuits 776A, 776B, 776C are located on the LVDS substrate 918, for example. Clamp diode circuits 776A, 776B
, 776C are a series circuit in which a Zener diode ZD having a Zener voltage of 3.3 V and two diodes D1 and D2 directed in the same direction and connected in series are connected in parallel.

The Zener diode ZD has a cathode side connected to a 3.3V terminal (voltage generator 800 (DC3.
3V), FIG. 74), and the anode side is grounded. The diode D1 has an anode side connected to the cathode side of the diode D2, and a cathode side connected to a 3.3V terminal (voltage generator 8).
00 (DC3.3V)). The diode D2 has its cathode side connected to the anode side of the diode D1 and its anode side grounded.

Connection midpoint M between diode D1 and diode D2 in clamp diode circuit 776A
1 is connected to signal line 774A, connection midpoint M2 is connected to signal line 774B, and connection midpoint M
3 is connected to signal line 774C, and the connection midpoint M4 is connected to signal line 774D.

Connection midpoint M between diode D1 and diode D2 in clamp diode circuit 776B
5 is connected to the signal line 774E, the connection midpoint M6 is connected to the signal line 774F, and the connection midpoint M
7 is connected to the signal line 774G, and the connection midpoint M8 is connected to the signal line 774H.

Connection midpoint M between diode D1 and diode D2 in clamp diode circuit 776C
9 is connected to the signal line 774I, and the connection midpoint M10 is connected to the signal line 774J. On the other hand, the connection midpoint M11 and the connection midpoint M12 are grounded.

In the initial state of clamp diode circuits 776A-776C, Zener diode ZD
The potential difference between the cathode side and the anode side of is maintained at 3.3V, and the voltage at the 3.3V terminal is 3.3
Even if V is exceeded, the potential difference is maintained at 3.3V. Also, Zener diode ZD
, and the potential difference across the series circuit of the diodes D1 and D2 is also fixed at 3.3V.

In this state, a noise signal (current) flows into the connection midpoint M1-M10 and the connection midpoint M1-M
10 becomes higher than 3.3V, when the potential difference between the anode and cathode of the diode D1 reaches the threshold voltage Vf1 (small value) of the diode D1, the diode D
1 is turned on, a further voltage rise at the connection midpoint M1-M10 is suppressed, and as a result, a voltage rise due to noise signals is suppressed.

Similarly, a noise signal (current) flows into the connection midpoints M1-M10, and the connection midpoints M1-M10
becomes lower than 0 V, the diode D2 is turned on when the potential difference between the anode and cathode of the diode D1 reaches the threshold voltage Vf2 (small value) of the diode D2. A further voltage drop at is suppressed, and as a result, a voltage drop due to a noise signal is suppressed.

As described above, the clamp diode circuits 776A to 776C define the upper limit (approximately 3.3 V) and the lower limit (approximately 0 V) of the voltage of the differential signal. A state of opposite phase and the same voltage amplitude is maintained, and the data (image data) obtained by the difference of the differential signals can be stabilized.

As shown in FIG. 74, I2C bus communication is used for mutual data communication between the VDP 312 and the board relay board 915 and frame relay board 916 . In I2C bus communication, when serial data and serial clock are transmitted by differential signals, the clamp diode circuit 776A (776B, 776C: voltage regulation means) of the present embodiment is used.
can be applied. That is, the clamp diode circuit 776A of this embodiment can be applied to a pair of signal lines for transmitting differential signals related to serial data and a pair of signal lines for transmitting differential signals related to serial clock.

[Main processing and production device error monitoring processing]
FIG. 80 is a flow chart showing the main processing of the effect control device 300. As shown in FIG. Figure 81 shows
It is a flowchart which shows the procedure of the production|presentation apparatus error monitoring process performed by the production|presentation control apparatus 300. FIG. The main processing of the production control device 300 of this embodiment is basically the same as the main processing shown in FIG. 23, but the production device error monitoring processing (B
0024) has been added.

As shown in FIG. 81, the effect control device 300 acquires effect device information from the decoration control device 750 (B11001). Here, the effect device information includes, for example, the detection signals MSW1 to MSW8 from the motor sensors (FIG. 78), the decoration control device 750 and the motors M1 and M2 (FIG. 7).
5), the connection state of the cable (connector) that connects the decoration control device 750 and the solenoid S
(Fig. 75) includes information indicating the connection state of the cable (connector).

The effect control device 300 analyzes the effect device information and determines whether or not it is appropriate (B1100
2). Here, whether or not the effect device information is appropriate is, for example, whether or not the accessories operated by the respective motors (8 pieces) based on the detection signals MSW1-MSW8 (FIG. 78) are at predetermined positions (initial positions), It includes whether or not the connection state of the cable is good.

The effect control device 300 ends the effect device error monitoring process if the effect device information is appropriate (the result of B11001 is "Y"). On the other hand, the production device information is not appropriate (B11011
is "N"), an error setting process (B11003) is performed. In the error setting process, settings are made so that an error notification sound is generated and/or error information (for example, displayed as an error code) is displayed on the display device 41 .

[Timer interrupt processing]
FIG. 82 is a flow chart showing the procedure of the movable body control timer interrupt process executed by the effect control device 300 (specifically, the CPU 311 of the VDP 312). Here, the board production device 44 (FIG. 4) is applied as the decoration control device 750, and stepping motors for production in the board production device 44 (electric and movable accessories) are applied as the motors M1 and M2, Control of the performance stepping motor will be described. The effect stepping motor moves the side effect unit 40d as, for example, the board effect device 44 (electric accessory, movable accessory).

The movable body control timer interrupt process (Fig. 82) is the main process of the effect control device 300 (Fig. 80
) is executed at each control basic cycle (interrupt cycle). In this embodiment, the control basic cycle (interrupt cycle) is 1 ms (msec: milliseconds).

Effect control device 300 first, stepping motor for effect (here motor A (M1)
and motor B (M2)), motor A control processing (B20
001) and motor B control processing (B20002). Motor A control processing and motor B
Control processing is similar processing. Note that the movable object control process (B0023 in FIG. 80) is based on the effect set in the variable effect setting process (B1905 in FIG. , to set control data relating to the performance stepping motor capable of operating the movable accessory. Further, when there are more than two performance stepping motors to be controlled, a motor control process similar to the motor A control process and the motor B control process may be added.

Effect control device 300 then combines the output data of motor A and the output data of motor B (B20003), and outputs the combined data to the corresponding port (B20004). As a result, the board surface motor driver 4 for driving and controlling the motor A (M1) and the motor B (M2)
The synthesized data is sent to 4a. Here, "synthesis" means, for example, a process of putting the output data of the motor A into the upper several bits and putting the output data of the motor B into the lower several bits of the data of a plurality of bits. With the above, the movable body control timer interrupt processing ends.

Next, with reference to FIG. 83, the details of the motor A control process (B20001) in the movable body control timer interrupt process (FIG. 82) will be described. FIG. 83 shows the production control device 300
2 is a flowchart showing the procedure of motor A control processing executed by . In the motor A control process, output data of motor A is obtained (set). Note that the motor B control process in which the output data of the motor B is acquired (set) is also executed in the same manner as the motor A control process.

Effect control device 300 first loads the motor control code (B21001). The motor control code is set as control data relating to the performance stepping motor in the movable body control process (B0023 in FIG. 80). The motor control code is information indicating how to control the motor, and includes codes indicating "stop", "CW", "CCW", and the like. "CW" means clockwise rotation of the motor, and "CCW" means counterclockwise rotation of the motor.

Next, the effect control device 300 first determines whether or not the motor control code is a stop code instructing "stop" of the motor (B21002). If the motor control code is a stop code (the result of B21002 is "Y"), off output data is set as output data to the motor (B21003). Then, 0 is set as the initial value of the counter value (count value, count value) that is updated (added) for each movable body control timer interrupt process, and the integer part of the counter value in the previous movable body control timer interrupt process 0 is set as an initial value to the variable N (previous time) indicating the (B21004). After that, the output data (off output data in this case) is saved in the motor output data area (B21011), and the motor A control processing is terminated.
Therefore, the performance stepping motor (here, motor A) is maintained in a stopped state.

On the other hand, when the motor control code is not the stop code (the result of B21002 is "N"), the effect control device 300 sets a constant addition value according to the game state (B21005). As the game state, there is a normal game state, a special game state, a specific game state (general electric support state such as a time saving state and a variable probability state). Next, the counter value is updated by adding the additional value (B21006
). It should be noted that if the counter value is expressed in binary notation and the addition processing is executed by fixed-point arithmetic, the speed will be increased. The process of step B21006 constitutes counter means (or timer means) that changes and updates the counter value (or timer value).

For example, in a specific game state where it is preferable to increase the operating speed of the movable accessory (the speed of the performance stepping motor) in the time shortening variation, etc., the additional value is set to 0.666,
The additional value may be set to 0.5 in the normal game state and the special game state without other time shortening fluctuations. As will be described later, when the value added to the counter value increases, the speed of the performance stepping motor (update speed of output data for motor control) increases, and the movable accessory (
The operating speed of the movable body) is also increased. Also, since the added value is less than 1, the control cycle of the performance stepping motor becomes longer than the control basic cycle (interruption cycle=1 ms), as will be described later.

Next, the production control device 300 acquires the integer part of the counter value by truncating the decimal part of the counter value by a so-called floor function (=floor function), and stores it in the variable N (this time) (N
(this time)←floor (counter value)) (B21007). Note that N (this time) indicates the integer part of the counter value in the current movable body control timer interrupt process currently being executed. and,
The effect control device 300 determines whether or not the integer part N of the counter value has been changed and updated (
B21008). That is, the effect control device 300 determines whether or not the integer part of the counter value has been moved up. Specifically, whether the value of N (this time), which is the integer part of the current timer interrupt, is greater than the value of N (previous time), which is the integer part of the previous timer interrupt, or whether N (
last time).

Effect control device 300, when the integer part N of the counter value is changed and updated (B2100
The result of step 8 is "Y"), and the output data to the performance stepping motor (here, the output data for driving the motor A) is set or updated (B21009). The output data may be updated to the next data by updating the output data pointer indicating the address of the output data in the output data table. Thus, the predetermined condition for setting or updating the output data is that the integer part N of the counter value is changed and updated.

For example, when the integer part N of the counter value changes and is updated, by setting the output data to ON, the reference clock (serial clock SCLK) of the performance stepping motor
etc.) may be generated (off setting if the integer part N of the counter value does not change). Alternatively, by updating the output data, a direct step update (excited phase (excitation phase)
update) may be performed.

And the production control device 300 stores the value of N (this time) in the variable N (previous time) (B21
010). Next, save the acquired output data in the motor output data area (B21011
), the motor A control process ends.

As described above, when the integer part N of the counter value changes, the output data for driving the performance stepping motor may be updated or set, and the reference clock for the performance stepping motor may be generated. In another example, when the integer part N of the counter value changes, the directly excited phase (excitation phase) is updated by updating or setting the output data, and the rotor (rotating shaft) of the performance stepping motor is moved by one step. (ie a predetermined step angle) (step update). Therefore, as the value added to the counter value increases, the speed of the performance stepping motor and, in turn, the operating speed of the movable accessory can be increased.

[Branch of control flow]
In the main processing shown in FIG. 80 and the timer interrupt processing shown in FIG. 82, there are portions where the control flow branches. For example, in the case of the main process, the process branches depending on the result of determination (B0019) as to whether or not it is time to switch frames. Also, in the effect device error monitoring process (B0024, FIG. 81) in the main process, the process branches according to the result of the judgment (B11002) as to whether or not the effect device information is appropriate as described above. It should be noted that the calling of subroutines (individual processes such as effect button input processing, received command check processing, etc.) can be regarded as a kind of branch processing, but steps B0010, B0011, B0012, B0
At 014-B0016 and B0022-B0024, the process branches.

Also, in the received command check process (B0014) (FIG. 24) during the main process,
Determining whether or not the number of received commands is 0 (B1102), determining whether or not copying for the number of received loaded commands has been completed (B1106), and whether or not analysis of commands for the number of received loaded commands has been completed. The processing branches depending on the result of the determination (B1110).

Then, in the received command analysis processing (B1108, FIG. 25) in the received command check processing (B0014, FIG. 24), it is determined whether or not the upper MODE part of the received command is within the normal range (B1202). The processing branches depending on the result of determining whether or not the lower ACTION part is within the normal range (B1203) and determining whether or not the ACTION part with respect to the MODE part is a correct combination (B1204).

Also, for the MODE part, it is determined whether or not it is within the range of the variable command (B1205),
Judgment of whether it is a big hit system command range (B1207), judgment of whether it is a single-shot system command range (B1211), judgment of whether it is a symbol system command range (B1209), look-ahead symbol system command range The process branches according to the results of the determination of whether or not (B1213) and the determination of whether or not it is within the prefetch variation command range (B1215).

Furthermore, for example, for the MODE part in the single-shot command processing (B1212, FIG. 26) in the received command analysis processing (B1108, FIG. 25), it is determined whether or not the model designation command is represented (B1301), the RAM initialization command Determination of whether to represent (B1303), determination of whether to represent a power failure recovery command (B1305), determination of whether to represent a customer waiting demo command (B1307), whether to represent the decoration special figure 1 pending number command Determination of whether or not (B1309), determination of whether or not to represent the decoration special figure 2 pending number command (B1311), determination of whether or not to represent the probability information command (B1313), error / fraudulent system / call command (B
1315), determination of whether to represent a command for effect mode switching (B1317), determination of whether to represent an out ball number command (B1319), whether to represent a count command (large winning mouth count command) determination (B1321), whether or not it is a setting value information command (B1323), whether or not it represents a setting change command (B1325), and whether or not it represents a setting confirmation command (B1327) , Determining whether or not to indicate a symbol stop command (B1
329), and the process branches depending on the result of the judgment (B1330) as to whether or not the command in the MODE section is normal.

In the motor A control process (B20001, FIG. 82) during the movable body control timer interrupt process, it is determined whether or not the motor control code is a stop code instructing to "stop" the motor (B
21002), it is determined whether or not the integer part N of the counter value has been changed and updated (B21008).
) branch depending on the result of the above. Note that calling a subroutine (individual processing such as motor A control processing, motor B control processing, etc.) can be regarded as a type of branch processing.
The process branches at steps B20001 and B20002.

[Pipeline processing and delayed branch processing]
FIG. 84 is a diagram showing the delay branch processing performed by the CPU 311 in the production control device.
(a) shows the case where the delayed branching process is executed, and FIG. 84(b) shows the case where the delayed branching process is not executed. Built-in host CPU (CPU31
1) is a program counter (P
According to the order determined by C), various programs are executed. Also, C
Instructions to be executed by the PU 311 (second CPU) are instruction fetch (IF), instruction interpretation (ID)
, instruction execution (EX), memory access (MA), and register write (WB). By executing different instruction elements of each instruction at the same time, a series of instructions are executed by pipeline processing in which instruction execution, which would otherwise take a plurality of steps in other processing methods, is apparently performed in one step. Furthermore, the CPU 311 performs delayed branch processing based on a delayed branch instruction in response to the above branch of the control flow.

In FIG. 84(a), according to the program counter (PC) of the CPU 311, address N, N+
Instructions associated with addresses 1, N+2, and N+3 are executed in order, and then the instruction associated with address N+4 is not executed, and the instruction associated with address M is executed. Here, the program counter (PC) adds 1 to the retained count value (address) when the CPU 311 performs an instruction fetch (IF) related to the count value (address) of the program counter. It is to be updated.

In FIG. 84(a), the processing proceeds in the order of (1) to (5) below.
(1) The CPU 311 performs an instruction fetch (IF) for the normal instruction (N) associated with the N address held in the program counter (PC), and updates the address of the program counter (PC) to N+1. A normal instruction is any instruction that does not include a branch instruction. Also, the address is the address of the memory (PROM 321, etc.).

(2) The CPU 311 performs the instruction fetch (IF) of the normal instruction (N+1) associated with the N+1 address held in the program counter (PC) and the instruction interpretation (ID) of the normal instruction (N).
to update the address of the program counter (PC) to N+2.

(3) The CPU 311 fetches (IF) the delayed branch instruction (delayed branch establishment: branch to address M) (N+2) associated with address N+2 held in the program counter (PC).
and perform instruction interpretation (ID) of normal instruction (N+1) and instruction execution (EX) of normal instruction (N),
Update the address of the program counter (PC) to address N+3.

(4) The CPU 311 fetches (IF) the normal instruction (delay slot) (N+3) associated with the N+3 address held in the program counter (PC) and the delayed branch instruction (delayed branch establishment: branch to M address) Instruction interpretation (ID) of (N+2), instruction execution (EX) of normal instruction (N+1), and memory access (MA) of normal instruction (N) are performed.

(5) The CPU 311 updates the address of the program counter (PC) to address M by executing the delayed branch instruction (delayed branch taken: branch to address M) (N+2) (EX) and updates the address of the program counter (PC) to address M. Also, the memory access (MA) of the normal instruction (N+1) and the register write (WB) of the normal instruction (N) are performed.

Therefore, when the delayed branch instruction is established, the originally scheduled normal instruction (N+4) is not executed, but the normal instruction (delay slot) (N
+3) is executed. As a result, it is possible to reduce disruption of the pipeline at the time of branching and to execute instruction elements quickly.

On the other hand, as shown in FIG. 84(b), when the delayed branch instruction is not established, the delayed branch instruction (N+
The normal instruction (N+3) and the normal instruction (N+4) after 2) are executed in order.

Here, the normal instruction (branch destination slot) (M) in FIG. 84(a) is, for example, an error/illegal/call setting process (B1316, FIG. 26) caused by a command from the game control device 100.
, error setting processing (B11003, FIG. 81) caused by an error in the control target (decoration control device 750) of the effect control device 300 can be applied. That is, an error occurring outside the CPU 311 can be dealt with by the delayed branch processing, and the error notification processing can be executed efficiently.

In addition, the CPU 111a (1st C
PU) is also a series of commands in the same manner as above (commands for sending commands to the effect control device 300)
can be executed by pipeline processing (and delayed branch processing).

[Exception handling]
FIG. 85 is a diagram showing the procedure of error processing relating to the CPU error of the CPU 311 in the production control device. The CPU 311 detects a CPU error (exception factor) that is an error of the CPU 311 itself.
occurs, the instruction being executed is interrupted and error handling (exception handling) is executed. CPU
Errors include address errors, bus errors, register bank errors, etc. Here, an address error will be described as an example. An address error corresponds to the case of fetching data associated with an inappropriate address where no instruction is originally stored when fetching an instruction (IF). detected.

When an address error occurs, the CPU 311 outputs the instruction (N) in which the address error was detected.
, the instruction (N+1) before the instruction execution (EX) is stopped, and the execution of the instruction by the program counter (PC) is temporarily interrupted to perform error processing including sequence control.

As shown in FIG. 85, an instruction (N
) an address error is detected. In this case, the instruction interpretation (ID
) detects an address error and cancels the instruction (N) and the next instruction (N+1). However, the instruction (N-1), the instruction (N-2), and the instruction (N-3), which are executing instruction elements after the instruction execution (EX) when the address error is detected, continue to proceed.

Here, the CPU 311 is set with an exception processing vector table containing vector addresses (vector table address offsets) of a plurality of error processing (exception service routines) corresponding to exception causes.

Therefore, when the register write (WB) of the instruction (N-1) is completed, the CPU 311
After the address error is detected, an instruction to calculate the vector address (start address: M) for error processing corresponding to the address error is executed by sequence control, and the information in the status register (representing the processing status of various instructions) is executed. information) to the stack of general-purpose registers provided in the CPU 311, and the information (address) in the program register (PC) is executed.
to the stack. Note that the program register to be saved (PC
) is the address (N) associated with the instruction in which the address error was detected. Figure 85
, a series of instructions under the sequence control can be executed by pipeline processing. In the above-described sequence control, the CPU 311 does not perform instruction fetching (IF), and instructions sent from the sequence control side to the CPU 311 can be executed from the stage of instruction interpretation (ID). to the instruction fetch (IF)
can be run from

The CPU 311 executes a jump instruction [M] to jump to the calculated vector address (M).
and the program counter (P
C) writes the vector address (address M). Note that if the instruction to calculate the vector address writes the calculation result to the program counter (PC) as a register, this instruction may be omitted (the instruction itself to calculate the vector address is a jump instruction). )
.

The CPU 311 performs error processing associated with the vector address (address M) (error processing instruction (M), error processing instruction (M+1), . (k: integer). Since there is no delay slot between the jump instruction [M] and the error processing instruction (M), the jump instruction [M] does not correspond to the delayed branch instruction.

If error processing is to be executed by a plurality of instructions, it can be executed by pipeline processing. That is, as shown in FIG. 84, by performing instruction fetching (IF) for the instruction (M) associated with address M, the address of the program counter (PC) is updated to address M+1, and the instruction associated with address M+1 is updated to address M+1. A plurality of instructions are sequentially executed in such a manner that the instruction (M+1) is fetched (IF) and the instruction (M) is decoded (ID), and the last instruction (M+k) of error processing is executed. can do.

Here, in the error processing command, it is possible to incorporate an error setting processing (process similar to the error setting processing (B11003) in FIG. 81) for reporting a CPU error such as an address error in the CPU 311. be. By incorporating the error setting process, it is possible to notify that a CPU error has occurred using the display device 41 or a speaker.

After the last instruction (M+k) of the error processing, the instruction (N) in which the address error was detected is executed. For this reason, as shown in FIG. 85, for example, the second-to-last instruction (
M+k−1) is a delayed branch instruction (program counter return instruction) for jumping (branching) by returning the address of the program counter (PC) to the N address saved in the stack,
The last instruction (M+k) of error processing can be executed as a delay slot (status register restore instruction) that returns status register information (information related to instruction (N), etc.) saved in the stack to the status register. It is also preferable to configure as follows. As a result, the instruction decoding (ID) of the last instruction (M+k) and the instruction fetching (N) of the instruction (N)
IF) becomes possible, and the instruction (N) is executed simultaneously with the instruction execution (EX) of the last instruction (M+k).
and instruction fetching (IF) of instruction (N+1).

Of course, error processing can be executed without pipeline processing, and execution of instruction (N) may be started after completion of error processing (M+k). In this case, the instruction (M
+k−1) may be the status register return instruction, and the instruction (M+k) may be the program counter return instruction.

[Example of error display on the display device]
Error/illegal/call setting processing (B13
16, FIG. 26), the content of error setting processing (B11003, FIG. 81) caused by an error in the control target (decoration control device 750) of the effect control device 300, and the content of the error setting processing related to the CPU error are displayed on the display device. 41.

In the error/illegal/call setting process (B1316, FIG. 26), the fraud occurrence command, fraud cancellation command, state OFF command, state ON command, magnet fraud notification command (magnetic error command), board radio fraud notification command (board radio wave error commands) are identified. Therefore, each error is represented by a 1-bit flag, and these are arranged in the above order from the upper bit.
It can be expressed by a base (or hexadecimal) error code. For example, if it is normal, it is expressed by "0", and if it is abnormal, it is expressed by "1". ) can be displayed. Here, “A” indicates an error code (effect command) transmitted from the game control device 100 .

In the error setting process (B11003, FIG. 81), for example, detection signals MSW1-MSW8
(Fig. 78), whether or not the accessories operated by the respective motors (eight) are at their respective predetermined positions (initial positions), and the connection state of the cables (eight) connecting the decoration control device 750 and the motors. is good or bad. For example, if the accessory operated by the motor associated with MSW1 is not in a predetermined position (initial position) and the cable connecting the motor associated with MSW2 and the decoration control device 750 is not properly connected, bits are arranged in the same manner as above. Then, "B10000
000" (motor) (second display data) and "C01000000" (cable) (second display data). Here, "B" shall indicate a motor error code, and "C" shall indicate a cable error code. Here, in "C", the second cable is determined to be poorly connected. can be judged to be abnormal.

In the error setting process related to the CPU error, it is possible to construct an instruction so that the actually used vector address is displayed as it is on the display device 41 . For example, an address error can be displayed as "H00000024" (hexadecimal) or its lower two digits "24" (hexadecimal). Therefore, it is possible to grasp the content of the CPU error from the displayed vector address. Any error code can be displayed at any position on the display device 41 under the condition that they do not overlap each other.

[Functions and effects of the sixth embodiment]
According to the gaming machine 10 according to the sixth embodiment, an effect device (decoration control device 7
50), and a production control means (production control device 300) capable of controlling the production device (decoration control device 750) in response to a command from the game control means (game control device 100). , production control means (production control device 300) production device (decoration control device 750)
The output voltage of the data (serial data, etc.) to be transmitted to is V1, the drive voltage of the production device (decoration control device 750) is V2, and the clamp voltage of the production device (decoration control device 750) is V3.
, it is characterized by satisfying the relationship of V3≧V2>V1.

As a result, the clamp voltage power supply source (DC15V of the power supply device 400) with high power consumption
By reducing the load on the 15V DC power supply that outputs , and the 32V DC power supply that outputs 32V DC), the production device (decoration control device 750) and the driven objects (motors M1, M2, solenoid S) can be operated stably. can. Further, by lowering the drive voltage (V2) of the effect device (decoration control device 750) than the clamp voltage (V3), the effect device (decoration control device 750)
0) can reduce heat generation of an IC (integrated circuit including a shift register, a latch circuit, etc.). When the load on the power supply source is small, the drive voltage power supply source for the production device (decoration control device 750) is replaced with the clamp voltage power supply source (15V, 32V).
).

In this embodiment, the drive voltage (V2=12V) of the production device (decoration control device 750) is set to the voltage of the signal lines 754A to 754D for transmitting signals such as serial data signals SDATA (
V1=5V), that is, it is higher than the output voltage (V1) of data such as serial data that the production control device 300 (production control means) transmits to the decoration control device 750 (production device).
As a result, since the power supply source for communication and the power supply source for driving are separated, it is possible to stabilize the transmission of data and the operation of the production device (decoration control device 750). From the above, V3 (
By satisfying the relationship of clamp voltage)≧V2 (drive voltage)>V1 (data output voltage),
The power distribution becomes appropriate, and the transmission of data, the driving of the production device (decoration control device 750), and the driving of the driven objects (motors M1, M2, solenoid S) related to the production device (decoration control device 750) are stabilized. can be done.

According to the gaming machine 10 of the sixth embodiment, an effect device (decoration control device 750
), and, in response to a command from the game control means (game control device 100), a production control means (production control device 300) capable of controlling the production device (decoration control device 750), and a production control means (production control device 300) supplies the voltage for outputting the data (serial data, etc.) to be sent to the production device (decoration control device 750), the first power supply (DC5V power supply), and the driving voltage of the production device (decoration control device 750) and a third power supply (DC15V power supply) that supplies the clamp voltage of the production device (decoration control device 750). power supply (DC15V power supply), second power supply (DC
12C power supply) and the first power supply (DC5V power supply) are stopped in this order.

With the above configuration, before the driving of the production device (decoration control device 750) stops, the production device (
Since the driving of the driven parts (motors M1, M2 and solenoid S) of the decoration control device 750) is stopped, these malfunctions can be avoided. In addition, the production device (decoration control device 75
0) stops driving, the data transmission stops, so the effect device (decoration control device 75
0) malfunction can be avoided. Furthermore, since the transmission of data, that is, the operation stop of the production control means (production control device 300 (VDP312)) is the last, the production control means (production control device 300 (VDP312)) ensures the processing time in the production control means (Production control device 300 (VDP 312)) can suppress the occurrence of an internal error. From the above, it is possible to stabilize the operations of the production control means (production control device 300) and the production device (decoration control device 750).

According to the gaming machine 10 of the sixth embodiment, an effect device (decoration control device 750
), and a production control means (production control device 300) capable of controlling the production device (decoration control device 750) in response to a command from the game control means (game control device 100).
In the production device (decoration control device 750), the first driven unit (motor S1, S2)
A first effect device (driver 751, driver 752) that drives the second driven part (
While driving the solenoid S), the first effect device (driver 751, driver 752
) and a second effect device (driver 753) connected to the latter stage, and the effect control means (effect control device 300) transmits serial data to the effect device (decoration control device 750), and the first The effect device (driver 751, driver 752) takes in the latter part of the serial data, drives the first driven parts (motors M1, M2), and transmits the first part of the serial data to the second effect device (driver 753). Then, the second effect device (driver 753) takes in the preceding stage of the serial data and drives the second driven part (solenoid S) to drive the first driven part (motors M1, M2) and the second driven part (motors M1, M2). The driven parts (solenoids S) are characterized by different driving modes.

With the above configuration, a single serial data signal (SDATA) can simultaneously drive and control a plurality of driven parts (motors M1, M2, solenoid S) with different driving modes, so the effect control device 300 can control a plurality of (different clamps It is possible to easily control the driving of the role item (of which a plurality of types are driven by voltage).

In the sixth embodiment, the clamp voltages of the first effect device (drivers 751 and 752) and the second effect device (driver 753) are different from each other. Even if the clamp voltages of the first production device (drivers 751 and 752) and the second production device (driver 753) are different from each other, they can be stably driven.

In the sixth embodiment, the motors M1 and M2 are the first driven parts, and the solenoid S is the second driven part. Thereby, the motors M1 and M2 and the solenoid S can be stably operated in one effect device (decoration control device 750).

In the sixth embodiment, between the supply source (15V terminal (power supply device 400 (DC15V power supply)) of the clamp voltage of the first effect device (drivers 751, 752) and the first effect device (drivers 751, 752) is arranged with backflow prevention means (Zener diode 762). As a result, reverse current flow from the motors M1 and M2, which use large currents, can be prevented.

According to the gaming machine 10 of the sixth embodiment, the effect control means (the effect control device 30
0), the effect control means (effect control device 300) has a signal line capable of transmitting a signal (eg signal line 763A (Fig. 77), signal line 767A (Fig. 78)),
A plurality of electronic components ((pull-up resistor 764A, resistor 765A, capacitor 766A) (FIG. 77),
(Pull-up resistor 768A, resistor 769A) (FIG. 78)) is interposed, and a plurality of electronic components (
(Pull-up resistor 764A, resistor 765A, capacitor 766A) (FIG. 77), (Pull-up resistor 768A, resistor 769A) (FIG. 78)) are signal lines (signal line 763A (FIG. 77)
, signal line 767A (FIG. 78)).

With the above configuration, one signal line (for example, signal line 763A (FIG. 77), signal line 767A
(FIG. 78)) to be mounted on electronic components ((pull-up resistor 764A, resistor 765A, capacitor 766C) (FIG. 77), (pull-up resistor 768A, resistor 769A) (FIG. 78)
) is aligned with the direction of the current, a signal line (for example, the signal line 763A (FIG. 7
7), an electronic component ((pull-up resistor 76
4A, resistor 765A, capacitor 766C) (Fig. 77), (pull-up resistor 768A, resistor 769A) (Fig. 78) makes it easier to predict what to check, improving the efficiency of checking work for electronic components and signal lines. can be made

According to the gaming machine 10 of the sixth embodiment, the effect control means (the effect control device 30
0), the effect control means (effect control device 300) includes a plurality of signal lines capable of transmitting signals (signal lines 763A-763D (FIG. 77), signal lines 767A-767I
(FIG. 78)), and signal lines (signal lines 763A-763D (FIG. 77), signal lines 767A-
767I (FIG. 78)) are interposed with electronic components (eg, resistors 765A-765D (FIG. 77), resistors 769A-769I (FIG. 78)), and electronic components (eg, resistors 765A-765
D (FIG. 77), resistors 769A-769I (FIG. 78) are connected to the signal lines (signal lines 763A-76
3D (FIG. 77), signal lines 767A-767I (FIG. 78)) are mounted in alignment with the direction along the current.

With the above configuration, a plurality of signal lines (signal lines 763A to 763D (FIG. 77), signal line 767
A-767I (FIG. 78)) corresponding electronic components (for example, pull-up resistor 7
64A-764D (FIG. 77), pull-up resistors 768A-768I (FIG. 78),
By mounting them in alignment with the direction of the current, electronic components corresponding to each other (for example,
Identification of pull-up resistors 764A-764D (FIG. 77) and pull-up resistors 768A-768I (FIG. 78) can be easily made.

In the sixth embodiment, the production control means (production control device 300) includes an arithmetic circuit (VDP312) that outputs a signal for controlling the production device, and a signal line (signal lines 763A-763D (FIG. 7
7), an input circuit (volume control switch 335 (FIG. 77), motor sensor or push switch (FIG. 78) for inputting a signal to the arithmetic circuit (VDP 312) via signal lines 767A-767I (FIG. 78) ), and

With the above configuration, the efficiency of checking the electronic parts interposed between the arithmetic circuit (VDP 312) and the input circuit (volume control switch 335 (Fig. 77), motor sensor or push switch (Fig. 78)) is improved. be able to.

The sixth embodiment is characterized in that the electronic component is a resistor or a capacitor.
As a result, it is possible to improve the efficiency of checking work for electronic components that do not have polarity.

In the sixth embodiment, the electronic component (resistor or capacitor) is a component of the same type that has a predetermined terminal (1 pin), and is mounted with the predetermined terminal (1 pin) aligned on the high voltage side or the low voltage side. It is characterized by being This makes it possible to improve the efficiency of electronic component checking work without using a new configuration.

According to the gaming machine 10 of the sixth embodiment, the effect control means (effect control device 300) for outputting the differential signal corresponding to the command from the game control means (game control device 100) to the effect device (display device 41) A pair of signal lines (signal lines 774
A and signal line 774B, signal line 774C and signal line 774D, signal line 774E and signal line 774F, signal line 774G and signal line 774H, signal line 774I and signal line 774J). voltage regulation means (clamp diode circuit 776A
-776C) is arranged.

With the above configuration, voltage regulation means (for example, clamp diode circuits 776A to 776C
) defines the upper limit (3.3 V) and the lower limit (0 V) of the voltage of the differential signal. state is maintained
Data (image data) obtained by the difference of differential signals can be stabilized.

According to the gaming machine 10 of the sixth embodiment, an effect device (decoration control device 750
), and a production control means (production control device 300) capable of controlling the production device (decoration control device 750) in response to a command from the game control means (game control device 100).
, effect control means (effect control device 300) includes a CPU311 that executes pipeline processing that can include delay branch processing by a delay branch instruction, and the CPU311 is the CPU3
11. When a CPU error which is an error of 11 itself occurs, the CPU error is dealt with in the processing of the branch destination by exception processing including branch processing not based on a delayed branch instruction, and the error of the game machine 10 other than the CPU error. It is characterized in that, when a game machine error occurs, the game machine error can be notified in the process of the branch destination by the delayed branch process.

As a result, the delayed branch instruction can reduce pipeline disruption at the time of branching, and can efficiently execute error notification processing. Also, when a CPU error (exception processing) caused by the CPU 311 itself occurs, the CPU error can be dealt with at an early stage by preferentially performing the exception processing over the pipeline processing.

In the sixth embodiment, when a CPU error occurs during execution of a series of instructions in pipeline processing, the CPU 311 controls the instruction being executed (for example, the instruction (N
-1))) is completed, exception handling is executed, and after the exception handling is completed, the next instruction (eg, instruction (N)) after the last executed instruction (eg, instruction (N-1)) in a series of instructions. is characterized by executing As a result, a series of instructions can be reliably executed.

The sixth embodiment is characterized in that the gaming machine error is an error that occurs in the effect device (decoration control device 750). This eliminates the need for the game control device 100 to detect an error that has occurred in the effect device (decoration control device 750), thereby avoiding an increase in the burden on the game control device 100. FIG.

According to the gaming machine 10 of the sixth embodiment, an effect device (decoration control device 750
), and a production control means (production control device 300) capable of controlling the production device (decoration control device 750) in response to a command from the game control means (game control device 100).
In the production control means (production control device 300), in the timer interrupt processing (movable body control timer interrupt processing (FIG. 82)) includes a CPU 311 that executes pipeline processing that can include delay branch processing by a delay branch instruction, When a CPU error, which is an error of the CPU 311 itself, occurs, the CPU 311 handles the CPU error in branch destination processing by exception processing including branch processing not based on a delayed branch instruction, and corrects the gaming machine 10 other than the CPU error. When a gaming machine error, which is an error of (1), occurs, the gaming machine error can be notified in the processing of the branch destination by the delayed branch processing.

As a result, the delayed branch instruction can reduce pipeline disruption at the time of branching, and can efficiently execute error notification processing. Also, when a CPU error (exception processing) caused by the CPU 311 itself occurs, by performing exception processing with priority over pipeline processing, the CPU error can be dealt with at an early stage, and timer interrupt processing (movable body control timer Interrupt processing (FIG. 82)) can be resumed.

In the sixth embodiment, in timer interrupt processing (movable body control timer interrupt processing (FIG. 82)), the CPU 311 executes control of the effect device (decoration control device 750) in branch destination processing by delayed branch processing. characterized by As a result, the delay branch instruction can reduce pipeline disruption at the time of branching, and can efficiently control the effect device (decoration control device 750).

According to the gaming machine of the sixth embodiment, the production device (decoration control device 750) that performs game production, and the production device (decoration control device 750) in response to commands from the game control means (game control device 100) ), the game control means (game control device 100) monitors a game machine error that has occurred in the game machine 10, and controls the performance Equipped with a first CPU (CPU 111a) that instructs means (effect control device 300) to notify the gaming machine error, the effect control means (effect control device 300) is a pipeline that can include delay branch processing by a delay branch instruction A second CPU (CPU
311), and the second CPU (CPU 311), when a CPU error, which is an error of the second CPU itself (CPU 311), occurs, performs exception processing including branch processing not based on a delayed branch instruction, and executes branch destination processing. Dealing with the CPU error, the production device (decoration control device 75
0) and is different from the game machine error, the delay branch processing can notify the effect device error in the processing of the branch destination.

As a result, the delayed branch instruction can reduce disturbance of the pipeline at the time of branching, and can efficiently notify the effect device error. Also, when a CPU error (exception processing) caused by the second CPU (CPU 311) itself occurs, the CPU error can be dealt with at an early stage by prioritizing exception processing over pipeline processing.

In the sixth embodiment, the first CPU (CPU 111a) transmits a first command (effect command) indicating a game machine error to the second CPU (CPU 311), and the second CPU (CPU 311
) is the first display data (error code “A1000
00”), and the second display data (error code “B10000000”, error code “C01
000000”) to the display device 41, and the first display data (error code “A100000”) and the second display data (error code “B10000000”, error code “C01000000”) are sent to the display device 41. It is characterized by being displayed so as to be identifiable from each other.

As a result, a game machine error and an effect device error related to the effect device (decoration control device 750) can be easily identified by a person involved in the game hall.

It should be noted that the present invention is not limited to the embodiments described above, and various modifications and changes are possible within the scope of the technical idea, and it is clear that these are also included in the technical scope of the present invention. is. For example, it is possible to combine multiple embodiments. Also, for example, the present invention can be applied to other types of gaming machines (slot machines, etc.). The scope of the present invention is indicated by the claims, and is intended to include all changes within the scope of the claims and equivalent meanings and contents.

For example, when the above-described embodiment is applied to a slot machine, the game media used in the game are medals (coins) instead of game balls, and the number of prize balls is replaced with the number of medals to be paid out. In the slot machine, the ball payout rate (base) as performance information is the ratio (%) of the number of medals paid out to the number of medals inserted into the slot machine, and the role ratio is
The ratio of the number of medals paid out by various bonuses to the number of medals paid out in a predetermined period (
%).

10 game machine 25 effect button 30 game board 32 game area 36 first start winning opening (first start winning area)
37 normal variable winning device (second starting winning area)
39 Special Variable Winning Device 40 Center Case 41 Display Device 50 Collective Display Device (LED)
70 relay board 100 game control device (main board)
152 performance display device 173a serial port (first serial port)
173b serial port (second serial port)
200 Payout control device 300 Effect control device (sub board)
454 call button 510 parts 750 decoration control device 776A, 776B, 776C clamp diode circuit

Claims (1)

In a gaming machine equipped with game control means capable of executing a game,
The game control means is
program storage means for storing programs;
Arithmetic processing means for performing predetermined arithmetic processing by the program;
an update information storage means capable of storing information updated by the arithmetic processing means;
setting a default address to a stack pointer before executing the instruction stored at the start address of the program storage means;
The program storage means includes
a first storage area in which a first program related to game control is stored;
a second storage area for storing a second program related to other than game control,
In the update information storage means,
a first work area and a first stack area used for work of the first program, and a second work area and a second stack area used for work of the second program ;
The first stack area is provided so as to have as a base point an address which is the default address set in the stack pointer and which is approximately the central value of a plurality of addresses assigned to the update information storage means. , thereafter, the base address of the first stack area is not changed from the default address,
the base address of the second stack area is a second address after the default address, and the second address is set to the stack pointer when the second program is executed;
In the first work area,
a first dedicated area that is read and written by the first program but not read and written by the second program;
a first common area that is at least written by the first program and readable by the second program;
The gaming machine, wherein the first common area is arranged between a plurality of the first dedicated areas.

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