JP6966089B2 - Pachinko machine - Google Patents

Description

The present invention relates to a gaming machine that includes game control means capable of executing a game and can generate a special gaming state that is advantageous to the player when the result of the game is a special result.

In the conventional gaming machine, in addition to outputting a test signal, there is a machine that displays performance information such as a ball output rate and a game (variable display game) on a plurality of LED displays (for example, Patent Document 1). ). The test signal is used for testing the gaming machine and is supplied to the test apparatus. (For example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2018-23552

However, there is a possibility that the development efficiency of the control program of the gaming machine may decrease.

An object of the present invention is to improve the development efficiency of a program used in a gaming machine.

In a typical embodiment of the present invention, in a gaming machine provided with game control means capable of executing a game and capable of generating a special gaming state advantageous to the player when the result of the game is a special result, the above-mentioned The game control means includes a program storage means for storing a program, a calculation processing means for performing a predetermined calculation process by the program, and an update information storage means for storing information updated by the calculation processing means. The program storage means includes a first program storage area, a second program storage area, and an unused area between the first program storage area and the second program storage area. , A first information storage area, a second information storage area, and an unused area between the first information storage area and the second information storage area, and the arithmetic processing means is the first program storage. The performance display output program stored in the area outputs the display data of the performance information related to the game machine stored in the second information storage area, and outputs the test signal stored in the second program storage area. A plurality of general-purpose registers that can be switched and used by outputting the data of the test signal related to the game machine stored in the first information storage area by the program and storing the values when performing the arithmetic processing. By switching a plurality of register groups in the process of outputting the data of the test signal, the values of all the general-purpose registers in the arithmetic processing means are saved in the stack area of the update information storage means. In the process of outputting the display data of the performance information, the values of all the general-purpose registers in the arithmetic processing means are not saved in the stack area of the update information storage means.

According to one embodiment of the present invention, the efficiency of developing a program used in a gaming machine is improved.

It is a perspective view which looked at the game machine from the front side. It is a front view of a game board. It is a block diagram which shows the structural example of the game control system of a game machine. It is a block diagram which shows the structural example of the production control system of a game machine. It is a flowchart which shows the procedure of the first half part of a main process. It is a flowchart which shows the procedure of the latter half part of a main process. It is a flowchart which shows the procedure of a timer interrupt process. It is a flowchart which shows the procedure of the probability setting change / confirmation process. It is a flowchart which shows the procedure of the special figure game processing. It is a flowchart which shows the procedure of the start port switch monitoring process. It is a flowchart which shows the procedure of the special figure start port switch common processing. Special figure It is a flowchart which shows the procedure of ordinary processing. Special FIG. 1 is a flowchart showing a procedure of fluctuation start processing. Special FIG. 2 is a flowchart showing a procedure of fluctuation start processing. It is a flowchart which shows the procedure of the jackpot flag 1 setting process. It is a flowchart which shows the procedure of the jackpot flag 2 setting process. It is a flowchart which shows the procedure of a jackpot determination process. It is a flowchart which shows the procedure of the special figure information setting processing. It is a flowchart which shows the procedure of the variation pattern setting process. It is a flowchart which shows the procedure of 2 byte distribution processing. It is a flowchart which shows the procedure of a sorting process. It is a flowchart which shows the procedure of the fluctuation start information setting processing. It is a flowchart which shows the procedure of a game process. It is a flowchart which shows the procedure of ordinary processing. It is a flowchart which shows the main processing of an effect control device. It is a flowchart which shows the received command check process. It is a flowchart which shows the received command analysis processing. It is a flowchart which shows the one-shot system command processing. It is a flowchart which shows the look-ahead symbol system command processing. It is a flowchart which shows the look-ahead fluctuation system command processing. It is a flowchart which shows the design system command processing. It is a flowchart which shows the variable system command processing. It is a flowchart which shows the variation effect setting process. It is a flowchart which shows the procedure of a hit system command processing. It is a perspective view (a) which looked at the lower plate unit from the diagonally upper right side, and is a perspective view (b) which looked at from the diagonally upper left side. It is a block diagram which shows the structure of the modification of the game control system of a game machine. It is a block diagram which shows the structure of the modification of the production control system of a game machine. This is an example of a screen transition diagram showing the display screen of the display device when the call button is operated in chronological order. This is an example of a screen transition diagram showing the display screen of the display device in chronological order when the operation of the call button is explained and displayed. It is a figure which shows the state in which the detachable part which concerns on 2nd Embodiment is normally attached to a gaming machine. It is a figure which shows the appearance that the detachable part which concerns on 2nd Embodiment is erroneously attached to the gaming machine. It is a figure which shows the state when the error notification is performed in the gaming machine which concerns on 2nd Embodiment. It is a figure which shows the example which displays the notification information which concerns on 2nd Embodiment on the display device which is displaying the out-of-order stop symbol of the special figure variation display game. It is a schematic block diagram which shows the structural example of the gaming machine of 2nd Embodiment schematicly. It is a figure which shows the rotary switch of the part which concerns on 2nd Embodiment. It is a figure which shows the reference table which associates a model designation command with a series ID (series identification information). The configuration of the parallel serial conversion unit when the parallel serial conversion unit is a normal parallel serial conversion IC is shown. A first modification of the component identification substrate is shown. A second modification of the component identification board is shown. It is a figure which shows the ID change mode for changing (adding) the model designation command and series ID executed by the effect control device of 2nd Embodiment. It is a flowchart which shows the procedure of the main process (main program) which concerns on 2nd Embodiment. It is a flowchart which shows the procedure of the part collation processing executed by the effect control device. It is a figure which shows the reference table (FIG. 48 (A)) which associates the model designation command which concerns on 2nd Embodiment with synthetic identification information, and the reference table (FIG. 48 (B)) which shows the classification of a non-conforming model. It is a flowchart which shows the procedure of the modification example of the part collation process executed by an effect control device. It is a block diagram which shows the structural example of the game control system which concerns on 3rd Embodiment. It is a circuit diagram which illustrates the electric circuit around the game microcomputer and each driver IC chip. It is a circuit diagram which illustrates the electric circuit around the IC chip for a game microcomputer and a solenoid driver. It is a circuit diagram which illustrates the electric circuit around the game microcomputer and the connector part. It is a circuit diagram which illustrates the electric circuit (electronic circuit) around the connector part and a serial-parallel conversion circuit on a relay board. It is a flowchart which shows the procedure of the latter half part of the main process which concerns on 3rd Embodiment. It is a flowchart which shows the procedure of the timer interrupt processing which concerns on 3rd Embodiment. It is a flowchart which shows the procedure of output processing. It is a flowchart which shows the procedure of the test firing test signal output processing. It is a flowchart which shows the procedure of the performance display monitor control processing (performance display setting processing). It is a flowchart which shows the procedure of the initial display timer update process. It is a flowchart which shows the procedure of the performance display monitor aggregation processing (performance display editing processing). It is a figure which illustrates the outline of the storage area of ROM and RAM. It is a figure which illustrates the detail of the storage area of ROM. It is a figure which illustrates the detail of the storage area of a RAM. It is a block diagram which shows the internal structure of the CPU which concerns on 3rd Embodiment. This is a program list (No. 1) showing the program structure of the output processing program. It is a program list (No. 2) showing the program structure of the output processing program. It is a program list (No. 3) which shows the program structure of an output processing program. This is a program list showing the program structure of the performance display monitor control program (performance display setting program). This is a program list showing the program structure of the test firing test signal output program. It is a figure which shows the display example of a base value. (A) is a figure which shows the management section which is the measurement section of the base value. (B) is a figure explaining the display mode of the base value. It is a flowchart which shows the procedure of the base error notification processing which concerns on 4th Embodiment. It is a block diagram which shows the effect control device of 5th Embodiment, a substrate connected to this, and the like. It is a circuit diagram in a decorative control device. It is a time chart which shows the fall of DC32V power supply, DC15V power supply, DC12V power supply, DC5V power supply. It is a circuit diagram which shows the connection mode of a VDP and a volume control switch in an effect control device. It is a circuit diagram which shows the connection mode of a VDP in an effect control device, a motor sensor and the like. It is a circuit diagram which shows the connection mode of VDP and a display device in an effect control device. It is a flowchart which shows the main processing of an effect control device. It is a flowchart which shows the procedure of the effect device error monitoring process executed by the effect control device. It is a flowchart which shows the procedure of the movable body control timer interrupt processing executed by an effect control device. It is a flowchart which shows the procedure of a motor A control process. It is a figure which shows the delay branch processing performed by the CPU in an effect control apparatus, FIG. 79 (a) shows the case where the delay branch process is executed, and FIG. 79 (b) shows the case where the delay branch process is not executed. It is a figure which shows the procedure of the error processing which concerns on the CPU error of the CPU in the effect control device.

[First Embodiment]
Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. In the description of the gaming machine, the front, back, left, and right refer to the direction seen by the player during the game.

[Overall view of the gaming machine]
FIG. 1 is a diagram illustrating a gaming machine.

The gaming machine 10 includes an opening / closing frame that is rotatably attached to the frame 11 fixed to the island equipment via a hinge. The opening / closing frame is composed of a front frame 12 (main body frame) and a glass frame 15.

A game board 30 (see FIG. 2) is arranged on the front frame 12, and a glass frame 15 having a cover glass 14 covering the front surface of the game board 30 is attached. The cover glass 14 functions as a game viewing area that makes the game area 32 (see FIG. 2) formed on the game board 30 visible.

The front frame 12 and the glass frame 15 can be opened individually. For example, by opening only the glass frame 15, the game area 32 of the game board 30 can be accessed. Further, by opening the front frame 12 in a state where the glass frame 15 is not opened, the game control device (main board) 100 (see FIG. 3) and the like arranged on the back side of the game board 30 can be accessed. Can be done.

Various frame constituent members are arranged on the edge portion around the cover glass 14 of the glass frame 15.

Decorative devices 18a and 18b capable of producing light emission according to the gaming state are arranged in the upper center and the left side of the glass frame 15. The decoration devices 18a and 18b accommodate lighting members such as LEDs inside, and perform a light emitting effect according to the game state. The lighting members arranged inside the decorative devices 18a and 18b form a part of the frame decorative device 18 (see FIG. 4).

An upper speaker 19a is arranged at the upper right corner portion and the upper left corner portion of the glass frame 15, respectively. Apart from these upper speakers 19a, two lower speakers 19b are provided below the gaming machine 10. The lower speaker 19b is arranged in the lower left corner portion of the glass frame 15 and the lower right corner portion of the front frame 12. The upper speaker 19a and the lower speaker 19b emit sound effects, alarm sounds, notification sounds, and the like.

On the right side of the glass frame 15, a protruding effect unit 13 that extends in the vertical direction of the gaming machine 10 and projects forward (on the player side) is arranged. The protrusion effect unit 13 is an effect device that performs a light emission effect or the like according to the progress state of the game. The lighting member arranged inside the protrusion effect unit 13 also constitutes a part of the frame decoration device 18 (see FIG. 4).

An upper plate unit having an upper plate 21 capable of storing a game ball (game medium) is attached to the lower portion of the glass frame 15. The upper plate 21 is formed in a box shape with an open upper surface. The game balls stored in the upper plate 21 are supplied to the ball launcher (not shown) one by one.

The upper plate unit further includes an effect operation device that receives an input operation from the player, a ball lending operation device that accepts an input operation from the player, and a decoration device 22 that performs a light emission effect or the like according to the game state. ..

The effect operation device is an operation device in which the touch panel 25b is incorporated in the effect button 25, and is provided in the center of the upper part of the upper plate unit so that the player can easily operate the effect button 25.

By operating the effect operation device by the player, it is possible to perform an effect in which the player's operation is intervened in the special figure variation display game (game) displayed on the display device 41 (see FIG. 2). For example, it is possible to select an effect pattern (effect mode) or execute a notice effect that announces the result of the variable display game (game) corresponding to the start memory in advance. The variable display game includes a special figure variable display game, and when it is simply a variable display game, it is referred to as a special figure variable display game in this specification.

Further, the effect pattern may be changed not only during the execution of the variable display game but also by the player operating the effect operation device during the non-execution.

The game state when the variable display game is executed consists of a plurality of game states. The normal gaming state (normal state) is a gaming state in which no special gaming state has occurred. Further, the special game state is, for example, a time saving state as a specific game state, a state in which a special result (for example, a big hit) is likely to occur in a variable display game (probability variation state, a probability fluctuation state), or a big hit state (special game state). ).

Here, the probability change state (specific game state) continues until the next big hit occurs (loop type), continues until a predetermined number of variable display games are executed (number cut type, ST), and There are things that continue until a predetermined probability fall lottery is won (fall lottery type).

Further, it may be possible to always generate the probabilistic state when a big hit occurs without determining whether or not to generate the probabilistic state by the big hit symbol random number, or to provide a winning device or the like provided with a specific area to specify. A probabilistic state may be generated when the game ball passes through the area.

The ball lending operation device is an operation device operated when a player rents a game ball, and is provided on the upper right side of the upper plate unit. The ball lending operation device includes a ball lending button 27, a return button 28, and a balance display unit 26. The ball lending button 27 is a button operated by the player when renting a game ball, and the return button 28 is a button for ejecting a prepaid card or the like from a card unit (not shown) arranged adjacent to the game machine 10. This is a button operated by the player. The balance display unit 26 is a display area for displaying the balance of a prepaid card or the like.

The decoration device 22 is a device that houses a lighting member such as an LED inside and performs a light emitting effect or the like according to a game state, and is provided on the front side portion of the upper plate unit. The lighting member arranged inside the decoration device 22 constitutes a part of the frame decoration device 18 (see FIG. 4).

An operation handle 24 for controlling the operation of the ball launching device (not shown) and a game ball can be stored in the lower part of the front frame 12 below the glass frame 15 provided with the above-mentioned upper plate unit and the like. A lower plate 23 is provided.

The operation handle 24 is located at the lower right of the front frame 12 and below the lower speaker 19b on the right side. When the player rotates the operation handle 24, the ball launcher launches the game ball supplied from the upper plate 21 into the game area 32 of the game board 30. The rate of fire of the game ball launched from the ball launcher is set to increase as the amount of rotation of the operation handle 24 increases. That is, the ball launching device can change the firing force, which is the force (speed) for launching the game ball into the game area, in response to the operation of the operation handle 24 by the player, and the game can be played in various launch modes having different launching forces. Can fire a ball. The launch mode includes a left-handed hit (normal hit) in which the game ball is allowed to flow down on the left side of the game area 32, and a right-handed hit in which the game ball is caused to flow down on the right side of the game area 32.

The lower plate 23 is arranged below the upper plate unit at a predetermined distance from the upper plate unit. The lower plate 23 has a ball punching hole 23a that penetrates the bottom surface of the lower plate 23 in the vertical direction, and an opening / closing operation unit 23b for opening and closing the ball punching hole 23a. When the player operates the opening / closing operation unit 23b to open the ball pulling hole 23a, the game ball stored in the lower plate 23 can be discharged to the outside through the ball pulling hole 23a.

[Game board]
Subsequently, the game board 30 of the game machine 10 will be described with reference to FIG. FIG. 2 is a front view of the gaming board 30 provided in the gaming machine 10.

As shown in FIG. 2, the game board 30 includes a flat plate-shaped game board main body 30a that serves as a mounting base for various members. The game board main body 30a is made of wood or synthetic resin, and a game area 32 surrounded by a guide rail 31 is provided on the front surface of the game board main body 30a. The gaming machine 10 is configured to launch a gaming ball from a ball launching device into a gaming area 32 surrounded by a guide rail 31 to play a game. A windmill, an obstacle nail, or the like is arranged in the game area 32 as a member for changing the flow direction of the game ball, and the launched game ball flows down the game area 32 while changing the rolling direction by these members.

A center case (front component) 40 that forms a window portion that serves as a display area for a variable display game is attached to substantially the center of the game area 32. Behind the window portion formed in the center case 40, a display device 41 as an effect display device (variable display device) that variablely displays (variablely displays) a plurality of identification information is arranged. The display device 41 is provided with, for example, a liquid crystal display, and is arranged so that the displayed contents can be visually recognized from the front side of the game board 30 through the window portion of the center case 40. The display device 41 is not limited to the one provided with a liquid crystal display, and may be provided with a display such as an EL or CRT.

A plurality of variable display areas are provided on the display screen (display unit) of the display device 41, and identification information (special symbol) and a character that directs the variable display game are displayed in each variable display area. In addition, images based on the progress of the game (big hit display, fanfare display, ending display, etc.) are displayed on the display screen.

Further, the center case 40 has an inflow port 40a to the warp passage 40e for guiding the game ball flowing down the game area 32 to the inside of the center case 40, and a stage on which the game ball passing through the warp passage 40e can roll. A portion 40b is provided. Since the stage portion 40b of the center case 40 is arranged above the starting winning opening 36 and the normal variable winning device 37, the game ball rolled on the stage portion 40b is placed in the starting winning opening 36 or the normal variable winning device 37. It is easier to win a prize.

An upper effect unit 40c and a side effect unit 40d are provided on the upper part and the right side of the center case 40, respectively. The upper effect unit 40c and the side effect unit 40d form a part of the board decoration device 46 (see FIG. 4) and the board effect device 44 (see FIG. 4).

A normal symbol start gate (normal symbol start gate) 34 is provided in the game area 32 on the right side of the center case 40. Inside the normal drawing start gate 34, a gate switch (SW) 34a (see FIG. 3) for detecting a game ball that has passed through the normal drawing start gate 34 is provided. When the game ball driven into the game area 32 passes through the normal map start gate 34, the normal map variation display game is executed.

A general winning opening 35 is arranged in the lower left game area 32 of the center case 40, and a general winning opening 35 is also arranged in the lower right game area 32 of the center case 40. The winning of the game ball into the general winning opening 35 is detected by the winning opening switches (SW) 35a to 35n (see FIG. 3) provided in the general winning opening 35.

In the game area 32 below the center case 40, a start winning opening (first starting winning area) 36 that gives a start condition for the special figure variation display game is provided, and a second starting winning opening (second) is directly below the start winning opening (first starting winning area) 36. An ordinary variable winning device 37 provided with a starting winning area) is provided. The normal variable winning device 37 includes a movable member (movable piece) 37b that converts a game ball into a state in which it is easy to flow in by rotating the upper end side in a direction in which the upper end side falls toward the front side. When the movable member 37b is in the closed state, the game ball cannot win the normal variable winning device 37. When the game ball wins the starting winning opening 36 or the normal variable winning device 37, the special figure variable display game is executed as an auxiliary game.

The movable member 37b is a so-called tongue-type ordinary electric accessory, and rotates via the normal electric solenoid 37c (see FIG. 3) when the result of the normal figure variation display game is in a predetermined stop display mode. It opens and changes to an open state (a state in which the game ball is easy to win, which is advantageous for the player), in which the game ball easily flows into the normally variable winning device 37.

The movable member 37b is controlled by the game control device 100, which will be described later. The game control device 100 increases the frequency of occurrence of a winning easy state by shortening the fluctuation time of the normal map variation display game and setting the hit probability of the normal map variation display game to a higher probability than usual, or a normal game state. By making the time for which the easy-to-win state occurs longer than the easy-to-win state that occurs in the above-mentioned specific game state, a time-saving state (general power support state) is generated. In addition, even in the probabilistic state (excluding the latent probabilistic state), the time saving state (normal power support state) occurs in duplicate.

In the game area 32 at the lower right of the normal variable winning device 37, an attacker-type opening / closing door is opened by rotating the upper end side in a direction in which the upper end side falls toward the front side by the large winning opening solenoid 39b (see FIG. 3). A special variable winning device 39 having a 39c is provided. The special variable prize device 39 converts the large prize opening from the closed state (closed state disadvantageous to the player) to the open state (special game state advantageous to the player) according to the result of the special figure variation display game, and wins the large prize. By facilitating the inflow of game balls into the mouth, a predetermined game value (prize ball) is given to the player. In the large winning opening, a count switch 39a (large winning opening switch 39a, see FIG. 3) is provided as a detection means for detecting the game ball that has entered the large winning opening. In addition, a light emitting member that illuminates the large winning opening is arranged in the large winning opening or in the vicinity of the large winning opening.

A specific area 86 (so-called V winning opening) is provided inside the second special variable winning device 39. When a game ball enters the specific area 86 (V winning opening), the probability change state (high probability state, specific game state) after the end of the big hit is determined. The specific area 86 may be opened for a long time so that the game ball can easily pass through only in the case of a probability variation jackpot. The game control device 100 can detect the passage of the game ball to the specific area 86 (V prize) via a sensor (specific area switch 72 described later) or the like, and when the V prize is detected, the game control device 100 shifts to a probable change state after the jackpot ends. In addition to confirming that the operation is to be performed, information (such as a command for passing through a specific area) indicating that a V prize has been won is transmitted to the effect control device 300 described later. Then, the effect control device 300 can notify the V prize on the display device 41 or the like.

When a game ball wins a prize in the general winning opening 35, the starting winning opening 36, the normal variable winning device 37, and the large winning opening of the special variable winning device 39, the payout control device 200 (see FIG. 3) determines the type of winning opening. The number of prize balls corresponding to the above is discharged from the payout device to the upper plate 21. Further, in the game area 32 below the normal variable winning device 37, an out port 30b for collecting game balls that have not won a prize in the winning opening or the like is provided.

Further, a special figure variation display game (special figure 1 variation display game, special figure 2 variation display game) and a normal figure variation display game are executed in the lower right corner of the game board main body 30a outside the game area 32. A batch display device 50 is provided. The batch display device 50 includes display units 51 to 60 that display information such as the current gaming state.

The batch display device 50 includes a first special figure fluctuation display unit 51 (special figure 1 display, lamp D1) and a second special figure fluctuation for a fluctuation display game composed of a 7-segment type display (LED lamp) and the like. The display unit 52 (special figure 2 display, lamp D2), the variable display unit 53 for the normal figure variable display game (normal figure display, lamps D10, D18), and the start (hold) storage number of each variable display game. It has a storage display unit for notification (special figure 1 hold display 54, special figure 2 hold display 55, normal figure hold display 56). Special figure 1 The hold indicator 54 is composed of lamps D11 and D12. The special figure 2 hold indicator 55 is composed of lamps D13 and D14. The normal figure hold indicator 56 is composed of lamps D15 and D16.

Further, the batch display device 50 is provided with a first game status display unit 57 (first game status indicator, lamp) that notifies that it is a right-handed hit (when it should be right-handed) or a left-handed hit (when it should be hit normally). D8), the second game state display unit 58 (second game state indicator, lamp D9) that lights up when a time saving state occurs to notify the occurrence of the time saving state, and the probability state of a big hit when the power of the game machine 10 is turned on is high. The third game status display unit 59 (third game status display, probability status display unit, lamp D17) that displays the status, and the number of rounds at the time of a big hit (the number of times the special variable winning device 39 is opened and closed) are displayed. A round display unit 60 (lamps D3-D7) is provided.

In the special figure 1 display 51 and the special figure 2 display 52, the variation display game is executed by the variation display in which the identification information (for example, the central segment) is repeatedly turned on and off (blinking). The special figure 1 display 51 and the special figure 2 display 52 are not limited to such a segment type display unit, and may be composed of an aggregate of a plurality of LEDs, and when a variable display is executed. In addition, all the LEDs provided as a display turn on all the lights (all LEDs blink at the same time), or cycle lights (one LED turns on and off in a predetermined order at a predetermined time), or a plurality of LEDs. It may be performed by turning on / off (blinking) or circulating lighting by a predetermined number of LEDs among the LEDs. Also in the normal figure display 53, the variable display game is executed by the variable display (blinking) in which the lamps D10 and D18 are repeatedly turned on and off. Further, the normal figure display 53 can be appropriately configured in the same manner as the special figure 1 display 51 and the special figure 2 display 52.

Further, the lamp display device 80 provided on the upper part of the center case 40 includes a lamp display unit (LED) that executes a variable display (blinking) that repeats a lighting display and an extinguishing display as a symbol (fourth special symbol), and each special symbol. It has a lamp display unit (LED) for notifying the start (hold) storage number of the variable display game. The lamp display device 80 is controlled by the effect control device 300 (described later). The lamp display unit (LED) for starting (holding) storage number notification of each special figure fluctuation display game ends the display of the number of holds due to the occurrence of a big hit, but when it is not in the big hit state (reach described later on the display device 41). (Including the case where is occurring), the number of holds is displayed.

Next, the flow of the game in the gaming machine 10, the normal map variation display game, and the special map variation display game will be described in detail.

In the gaming machine 10, a game is played by launching a gaming ball toward the gaming area 32 from a ball launching device (not shown). The launched game ball flows down the game area 32 while changing the rolling direction by obstacle nails, windmills, etc. arranged in various places in the game area 32, and the normal drawing start gate 34, the general winning opening 35, and the starting winning opening. 36, the normal variable winning device 37, or the special variable winning device 39 is won, or the ball flows into the out port 30b provided at the bottom of the game area 32 and is discharged from the game area 32. Then, when a game ball wins a general winning opening 35, a starting winning opening 36, a normal variable winning device 37, or a special variable winning device 39, a number of winning balls corresponding to the type of winning winning opening is dispensed through the payout device. It is discharged to the upper plate 21.

The normal drawing start gate 34 is provided with a gate switch 34a (see FIG. 3) for detecting a game ball that has passed through the normal drawing start gate 34. When the game ball passes through the normal map start gate 34, it is detected by the gate switch 34a, and the normal map variation display game is executed based on the determination result of the hit determination random number value extracted at this time.

When the normal map fluctuation display game cannot be started, for example, when the normal map variable display game has already been played and the normal map variable display game has not ended, or when the result of the normal map variable display game is a hit, it is normal. When the game ball passes through the normal drawing start gate 34 when the variable winning device 37 is converted to the open state, the storage number is added (+1) if the normal drawing start storage number is less than the upper limit number.

The hit judgment random value for determining the hit / miss of the normal figure fluctuation display game is stored in the normal figure start memory, and when the hit judgment random value matches the judgment value, the normal figure fluctuation display is displayed. The game wins and a specific result mode (specific result) is derived.

The normal map variation display game is executed by the normal map display 53 provided in the batch display device 50. The normal figure display 53 is composed of LEDs that indicate a hit when the normal identification information (normal figure) is lit and a deviation when the normal identification information (normal figure) is off, and the normal identification information fluctuates by blinking and displaying this LED. The display is performed, and after a predetermined variation display time has elapsed, the result is displayed by turning on or off the LED.

When the normal figure random value extracted when passing through the normal figure start gate 34 is a hit value, the normal symbol displayed on the normal figure display 53 stops in the hit state and becomes the hit state. At this time, by driving the normal electric solenoid 37c (see FIG. 3), the movable member 37b is converted into an open state for a predetermined time (for example, 0.3 seconds), and the game ball to the normal variable winning device 37 Winning is allowed.

The winning of the game ball to the starting winning opening 36 and the winning of the ordinary variable winning device 37 are detected by the starting opening 1 switch 36a (see FIG. 3) and the starting opening 2 switch 37a (see FIG. 3). The game ball that has won the start winning opening 36 is detected as the start winning ball of the special figure 1 variable display game, and is stored up to a predetermined upper limit, and the game ball that has won the normal variable winning device 37 is special figure 2. It is detected as a winning ball for starting a variable display game, and is stored up to a predetermined upper limit.

When the start winning ball of the special figure fluctuation display game is detected, the jackpot random number value, the jackpot symbol random value, each fluctuation pattern random value, and the like are extracted. These random numbers are stored in the special figure reservation storage area (a part of the RAM) of the game control device 100 as the special figure start winning memory for a predetermined number of times (for example, up to 8 times). The number of special figure start prize memories stored is displayed on the special figure 1 hold display 54 and the special figure 2 hold display 55 for notifying the start prize number of the batch display device 50, and is also displayed on the display screen of the display device 41. Is displayed.

The game control device 100 executes the special figure 1 variation display game on the special figure 1 display 51 based on the winning of the start winning opening 36 or the first start memory. Further, the game control device 100 executes the special figure 2 variable display game on the special figure 2 display 52 based on the winning of the normal variable winning device 37 or the second start memory.

The special figure 1 variable display game (1st special figure variable display game) and the special figure 2 variable display game (2nd special figure variable display game) have identification information (identification information) on the special figure 1 display 51 and the special figure 2 display 52. This is performed by displaying the special symbol (special symbol) in a variable manner and then stopping and displaying the predetermined result mode. Further, the display device 41 executes a decorative special figure variation display game in which a plurality of types of identification information (for example, numbers, symbols, character symbols, etc.) are variablely displayed corresponding to each special figure variation display game.

In the decorative special symbol variation display game on the display device 41, the decorative special symbol (identification information) composed of the above-mentioned numbers and the like is left (first special symbol), right (second special symbol), and middle (third special symbol). ) Is started, the fluctuating symbols are sequentially stopped after a predetermined time, and the result of the special figure fluctuation display game is displayed. Further, in the display device 41, various effects such as the appearance of characters are displayed in order to improve the interest. Further, in the decorative special symbol variation display game, as another decorative special symbol (identification information), the fourth special symbol (blinking) is repeated (blinking) on the lamp display unit (LED) of the lamp display device 80. 4th symbol) fluctuates. The fluctuation display of the lamp display unit is stopped after a predetermined time from the start by "lighting" in the case of a miss and "turning off" in the case of a big hit.

On the contrary, the variable display of the lamp display unit (LED) as the fourth special symbol (fourth symbol) can be stopped by "turning off" in the case of a miss and "turning on" in the case of a big hit. .. In addition, a plurality of LEDs (fourth symbol LEDs) are provided as each lamp display unit, and one of the plurality of LEDs is lit in the case of disconnection, and all the plurality of LEDs are lit in the case of a big hit. It is possible.

When the game ball is won in the starting winning opening 36 or the normal variable winning device 37 at a predetermined timing (when the jackpot random number value at the time of winning is the jackpot value), the special figure 1 display 51 or the special figure 1 display 51 or the special In the display 52 of FIG. 2, a specific result mode (special result mode) is derived from the display symbol as a result of the special figure variation display game, and a big hit state (special game state) is obtained. Correspondingly, the display mode of the display device 41 becomes a special result mode (for example, a state in which numbers such as "7, 7, 7" are aligned).

At this time, the special variable winning device 39 is converted from the closed state to the open state for a predetermined time (for example, 30 seconds) by energizing the large winning opening solenoid 39b (see FIG. 3). That is, the large winning opening provided in the special variable winning device 39 opens wide until a predetermined time or a predetermined number of game balls are won, during which the player is given the privilege of being able to acquire a large number of game balls. NS.

The special figure 1 display 51 and the special figure 2 display 52 may be configured as separate indicators or the same indicator, but the special figure variation display games are not executed at the same time. Is set.

Regarding the decorative special figure variable display game in the display device 41, the special figure 1 variable display game and the special figure 2 variable display game may be executed in different display devices or different display areas, or the same display may be executed. It may be executed in the device or the display area. In this case, the decorative special figure variable display game corresponding to the special figure 1 variable display game and the special figure 2 variable display game is prevented from being executed at the same time. The special figure 2 variable display game is executed with priority over the special figure 1 variable display game, and there is a memory of starting the special figure 1 variable display game and the special figure 2 variable display game. When the figure variation display game can be executed, the special figure 2 variation display game is executed.

In the following description, when the special figure 1 variable display game and the special figure 2 variable display game are not distinguished, they are simply referred to as a special figure variable display game.

Further, although not particularly limited, the starting port 1 switch 36a in the starting winning port 36, the starting port 2 switch 37a in the normal variable winning device 37, the gate switch 34a, the winning port switch 35a, and the count switch 39a. Uses a non-contact magnetic proximity sensor (hereinafter referred to as a proximity switch) which is provided with a coil for magnetic detection and detects a game ball by utilizing the phenomenon that the magnetic field changes when a metal approaches the coil. .. Further, the glass frame opening detection switch 63 provided on the glass frame 15 or the like of the game machine 10 or the front frame opening detection switch 64 (main body frame opening detection switch) provided on the front frame (game frame) 12 or the like is used as a machine. Microswitches with similar contacts can be used.

[Game control device]
FIG. 3 is a block diagram of the game control system of the game machine 10. The game machine 10 includes a game control device 100 (main board), and the game control device 100 is a main control device (main board) that comprehensively controls a game, and is a game microcomputer (hereinafter, a game microcomputer). A data bus 140 that connects a CPU unit 110 having a 111 (referred to as), an input unit 120 having an input port, an output unit 130 having an output port, a driver, and the like, a CPU unit 110, an input unit 120, and an output unit 130. And so on.

The CPU unit 110 includes a gaming microcomputer (CPU) 111 called an amusement chip (IC) and an oscillator such as a crystal oscillator, and generates an operating clock of the CPU, a timer interrupt, and a clock that serves as a reference for a random number generation circuit. It has an oscillator circuit (crystal oscillator) 113 and the like. A predetermined level of DC voltage such as DC32V, DC12V, DC5V generated by the power supply device 400 is supplied to the game control device 100 and electronic components such as a solenoid and a motor driven by the game control device 100 to enable operation. Will be done.

The power supply device 400 includes a normal power supply unit 410 having an ACDC converter that generates a DC voltage of DC32V from a 24V AC power supply, a DC-DC converter that generates a lower level DC voltage such as DC12V, DC5V, etc. from the voltage of DC32V. , A backup power supply unit 420 that supplies a power supply voltage to the internal RAM of the game microcomputer 111 in the event of a power failure, and a power failure monitoring circuit, and a power failure monitoring signal or reset signal that notifies the game control device 100 of the occurrence or recovery of a power failure. It is provided with a control signal generation unit 430 and the like that generate and output a control signal such as.

In the present embodiment, the power supply device 400 is configured separately from the game control device 100, but the backup power supply unit 420 and the control signal generation unit 430 are integrated on a separate board or with the game control device 100, that is, the main unit. It may be configured to be provided on the substrate. Since the game board 30 and the game control device 100 are to be replaced when the model is changed, the backup power supply unit 420 and the control signal generation unit 430 are mounted on a board different from the power supply device 400 or the main board as in the embodiment. By providing it, it is possible to exclude it from the target of replacement and reduce the cost.

The backup power supply unit 420 can be configured by one large-capacity capacitor such as an electrolytic capacitor. The backup power supply is supplied to the game microcomputer 111 (particularly the built-in RAM) of the game control device 100, and the data stored in the RAM is retained even during a power failure or even after the power is cut off. The control signal generation unit 430 monitors the voltage of 32V generated by the normal power supply unit 410, for example, detects the occurrence of a power failure when it drops to 17V or less, changes the power failure monitoring signal, and changes the power failure monitoring signal, and also resets the signal after a predetermined time. Is output. Also, when the power is turned on or when the power is restored, a reset signal is output after a predetermined time has elapsed from that point.

Further, the game control device 100 is provided with a RAM initialization switch 112. When the RAM initialization switch 112 is pressed down and turned on, an initialization switch signal is generated, and based on this, the information stored in the RAM 111c in the gaming microcomputer 111 and the RAM in the payout control device 200 is forced. The process of initializing to is performed. Although not particularly limited, the initialization switch signal is read when the power is turned on, and the power failure monitoring signal is repeatedly read in the main loop of the main program executed by the gaming microcomputer 111. A reset signal is a type of forced interrupt signal that resets the entire control system.

Further, the game control device 100 (main board) includes a setting key switch 93. The setting key switch 93 makes it possible to change the probability set value (set value) according to the setting related to the game condition (game) by turning it on by the rotation operation of the operator or the like. The RAM initialization switch 112 can also be used as a setting value change switch that can change the probability setting value according to the operation of the operator. In the present embodiment, the probability setting value is a setting value for setting a winning probability such as a big hit probability or a small hit probability (only when there is a small hit), but other game conditions (directing, etc.) other than the probability. Can be changed according to the probability setting value. The setting key switch 93 and the RAM initialization switch 112 constitute a setting changing means (setting changing device 42) capable of changing the setting (probability setting value) related to the game condition. In addition to the RAM initialization switch 112, another switch may also serve as the setting value changing switch, or may provide a dedicated setting value changing switch.

The setting key switch 93 and the RAM initialization switch 112 are provided on the game control device 100 inside the game machine 10 and are arranged at positions that cannot be operated (positions that cannot be accessed) unless the front frame 12 (main body frame) is opened. Will be done. That is, a general player cannot access and operate the setting key switch 93 and the RAM initialization switch 112.

As will be described later, when the power of the gaming machine 10 is turned on (power failure recovery, power recovery), the gaming machine 10 sets a probability setting value according to the on / off state of the setting key switch 93 and the RAM initialization switch 112. It is possible to shift to various states such as a changeable setting variable state (setting change state, setting change mode) and a setting confirmation state (setting confirmation mode) in which the probability setting value can be confirmed.

In the present embodiment, the probability setting value is defined in, for example, 6 steps, and the probability setting value 1 (setting 1), the probability setting value 2 (setting 2), the probability setting value 3 (setting 3), and the probability setting value 4 (setting). 4), there are a probability setting value 5 (setting 5) and a probability setting value 6 (setting 6). In general, setting 1 is the most unfavorable setting for the player, and setting 6 is the most advantageous setting for the player. Settings 1 and 2 are low settings, settings 3 and 4 are intermediate settings (intermediate settings), and settings 5 and 6 are high settings.

In the probability setting change process, every time the RAM initialization switch 112 is pressed by the operator, the work setting value (setting) in the work setting value area is set to the setting value 0 (setting 1, probability setting value 1) → Setting value 1 (setting 2, probability setting value 2) → setting value 2 (setting 3, probability setting value 3) → setting value 3 (setting 4, probability setting value 4) → setting value 4 (setting 5, probability setting value 5) ) → Setting value 5 (Setting 6, probability setting value 6) → Setting value 0 (Setting 1) → Setting value 1 (Setting 2) → ... In this way, the RAM initialization switch 112 also functions as a setting value change switch. For convenience of explanation, the work setting values 0 to 5 are provided corresponding to the probability setting values 1 to 6 in the setting change state (setting change mode), but the work setting value and the probability setting value are the same. It may be treated as the same in the numerical range (that is, 0 to 5 or 1 to 6) (the work set value and the probability set value are set to the same numerical value).

Instead of operating the RAM initialization switch 112 (setting value changing switch), the setting key switch 93 may be rotated to a predetermined position to change the probability setting value. Moreover, the probability setting value is not limited to 6 steps. Then, the performance display device 152 in which the display probability setting value corresponding to the selected work setting values 0 to 5 is, for example, a 4-digit 7-segment type (8-segment type including the dot Dp) display. Etc. are displayed.

The gaming microcomputer 111 includes a CPU (central processing unit: microprocessor) 111a, a read-only ROM (read-only memory) 111b, and a RAM (random access memory) 111c that can be read and written at any time.

The ROM 111b non-volatilely stores invariant information (programs, fixed data, determination values of various random numbers, etc.) for game control. The RAM 111c is used as a work area of the CPU 111a and a storage area for various signals and random values during game control. Information on the game (game information) is stored, and the stored information is stored even if a power failure occurs. Is a possible retention and storage means. As the ROM 111b or the RAM 111c, an electrically rewritable non-volatile memory such as EEPROM may be used.

Further, the ROM 111b stores, for example, a variation pattern table for determining a variation pattern (variation mode) that defines the execution time of the special figure variation display game, the effect content, the presence / absence of the occurrence of the reach state, and the like. The variation pattern table is a table for the CPU 111a to refer to the variation pattern random numbers 1 to 3 stored as the start memory to determine the variation pattern. Further, the fluctuation pattern table includes a missed fluctuation pattern table selected when the result is missed, a jackpot fluctuation pattern table selected when the result is a jackpot, and the like. Further, these pattern tables include a table for determining the latter half fluctuation pattern, which is a fluctuation pattern after reaching the reach state (second half fluctuation group table, second half fluctuation pattern selection table, etc.), and fluctuation before reaching the reach state. A table for determining the first half fluctuation pattern, which is a pattern (first half fluctuation group table, first half fluctuation pattern selection table, etc.) is included.

Here, the reach (reach state) has a display device whose display state can be changed, and the display device derives and displays a plurality of display results at different times, and the plurality of display results are predetermined. In the gaming machine 10 in which the gaming state becomes an advantageous gaming state (special gaming state) for the player when the special result mode is adopted, a part of the plurality of display results is already derived and displayed at a stage where the display is not yet derived. A display state in which the displayed display result satisfies the condition of the special result mode. In other words, the reach state is out of the display condition that is the special result mode even when the variable display control of the display device progresses and the display result reaches the stage before the derivation display. Refers to a display mode that does not exist. Further, for example, a state in which variation display is performed by a plurality of variation display areas (so-called full rotation reach) while maintaining a state in which the special result modes are aligned is also included in the reach state. Further, the reach state is a display state at the time when the display control of the display device progresses and reaches the stage before the display result is derived and displayed, and is determined before the display result is derived and displayed. It refers to a display state when at least a part of the display results of a plurality of variable display areas satisfies the condition of the special result mode.

Therefore, for example, the decorative special figure variation display game displayed on the display device corresponding to the special figure variation display game changes a plurality of identification information for a predetermined time in each of the left, middle, and right variation display areas on the display device. After the display, when the variation display is stopped in the order of left, right, and middle to display the result mode, the left and right variation display areas satisfy the conditions for the special result mode (for example,). The state in which the variable display is stopped with the same identification information) is the reach state. In addition, when the fluctuation display of all the fluctuation display areas is temporarily stopped, the condition of the special result mode in any two of the left, middle, and right fluctuation display areas is satisfied (for example, the same identification information). (However, the special result mode is excluded) may be set as the reach state, and the remaining one variable display area may be variable-displayed from the reach state.

The reach state includes a plurality of reach effects, and as a system (type) of reach effects in which the possibility of deriving a special result mode (big hit mode) is different (expectations are different), normal reach (N reach), Special 1 reach (SP1 reach), special 2 reach (SP2 reach), special 3 reach (SP3 reach), and premier reach are set. The expected degree (expected value) of the jackpot of the reach production is increased in the order of no reach <normal reach <special 1 reach <special 2 reach <special 3 reach <premier reach. Further, the reach state is included in the variation display mode at least when the special result mode is derived (when it becomes a big hit) in the special figure variation display game. That is, it may be included in the variation display mode when it is determined that the special result mode is not derived in the special figure variation display game (when it is out of order). Therefore, the state in which the reach state occurs is more likely to be a big hit than the case in which the reach state does not occur.

The degree of expectation of the production (notice) suggests the probability of becoming a big hit when the production is selected, and the selection rate of the production when it is a big hit and the selection rate of the production when it is not a big hit (when it is off). It can be calculated based on the selectivity and the like.

The CPU 111a executes a game control program in the ROM 111b to generate a control signal (command) for the payout control device 200 and the effect control device 300, or generate and output a drive signal for a solenoid or a display device to output the game machine. 10 Control the entire system. Further, although not shown, the gaming microcomputer 111 includes a big hit random number for determining a big hit in a special figure variation display game, a big hit symbol random number for determining a big hit symbol, and a small hit for determining a small hit symbol. Symbol random numbers (only when there is a small hit), fluctuation pattern random numbers for determining the fluctuation pattern in the special figure fluctuation display game (including the execution time of the fluctuation display game in various reach and fluctuation display without reach) A random number generation circuit for generation and an update timing of a timer interrupt signal and a random number generation circuit having a predetermined period (for example, 4 msec (milliseconds)) are given to the CPU 111a based on the oscillation signal (original clock signal) from the oscillation circuit 113. It has a clock generator that generates a clock.

Further, the CPU 111a acquires any one of the fluctuation pattern tables stored in the ROM 111b in the process related to the special figure fluctuation display game. Specifically, the CPU 111a determines the game result (big hit or miss) of the special figure variation display game, the probability state (normal probability state or high probability state) of the special figure variation display game as the current game state, and the start memory number. Based on the above, one of the fluctuation pattern tables is selected and acquired from the plurality of fluctuation pattern tables. Here, the CPU 111a serves as a variation distribution information acquisition means for acquiring any one of the plurality of variation pattern tables stored in the ROM 111b when the special figure variation display game is executed.

The payout control device 200 includes a CPU, ROM, RAM, input interface, output interface, etc., and drives the payout motor 91 of the payout unit in accordance with a prize ball payout command (command or data) from the game control device 100 to drive the prize ball. Control to pay out. Further, the payout control device 200 drives the payout motor 91 of the payout unit based on the ball lending request signal from the card unit 600, and controls for paying out the ball lending.

The input unit 120 of the game control device 100 includes a radio wave sensor 62 (panel radio wave sensor) that detects the emission of radio waves to the game machine, a gate switch 34a of the normal drawing start gate 34, and a start port 1 in the first start winning opening 36. These are connected to the switch 36a, the starting port 2 switch 37a in the second starting winning opening 37 (normal variable winning device), the winning opening switch 35a of the general winning opening 35, and the large winning opening switch 39a of the special variable winning device 39. An interface chip (proximity I / F) 121 is provided in which a negative logic signal such as a high level of 11V and a low level of 7V supplied from the switch is input and converted into a positive logic signal of 0V-5V.

Further, the interface chip (proximity I / F) 121 is connected to the specific area switch 72, the remaining ball discharge port switch 73, and the out ball detection switch 74. The specific area switch 72 detects the passage of the game ball (V winning) into the specific area 86 (V winning opening). The remaining ball discharge port switch 73 detects a game ball that has passed through the remaining ball discharge port that discharges the game ball from the special variable winning device 39. The out-ball detection switch 74 may detect only the game balls that pass through the out port 30b, or may detect all the game balls that have been launched into the game area and finished the game.

The output of the proximity I / F 121 is supplied to the second input port 123, the third input port 124, or the fourth input port 126, and is read into the gaming microcomputer 111 via the data bus 140. Of the outputs of the proximity I / F 121, the detection signals of the gate switch 34a, the start port 1 switch 36a, the start port 2 switch 37a, the winning port switch 35a, and the large winning port switch 39a are input to the third input port 124. ..

Further, among the outputs of the proximity I / F 121, the detection signal of the radio wave sensor 62 and the abnormality detection signal output when an abnormality of the sensor or the switch is detected are input to the second input port 123.

Further, among the outputs of the proximity I / F 121, the detection signal of the specific area switch 72, the remaining ball discharge port switch 73, or the out ball detection switch 74 is input to the fourth input port 126.

Further, the second input port 123 has a detection signal of a magnetic sensor switch 61 for fraud detection provided on the front frame 12 or the like of the game machine 10, and a glass frame opening detection provided on the glass frame 15 or the like of the game machine 10. A signal from the front frame opening detection switch 64 (main body frame opening detection switch) provided on the switch 63, the front frame 12 (main body frame), etc., and a signal from the vibration sensor 65 that detects the vibration of the game machine 10 are input. .. Further, a signal from a call button switch 67 (described later) provided on a glass frame 15 or the like of the gaming machine 10 is also input to the second input port 123.

Further, the second input port 123 takes in the setting key switch signal from the setting key switch 93 and supplies it to the gaming microcomputer 111 via the data bus 140.

Further, among the outputs of the proximity I / F 121, the output to the third input port 124 is also supplied from the game control device 100 to a test firing test device (not shown) via the relay board 70. Further, among the outputs of the proximity I / F 121, the detection signals of the start port 1 switch 36a and the start port 2 switch 37a are configured to be input to the game microcomputer 111 in addition to the third input port 124.

As described above, the proximity I / F 121 has a signal level conversion function. In order to enable such a level conversion function, the proximity I / F 121 is supplied with a voltage of 12V in addition to the voltage such as 5V required for normal IC operation from the power supply device 400. It has become.

The data held by the third input port 124 is read out by asserting the enable signal CE2 (changing to an effective level) by the gaming microcomputer 111 decoding the address assigned to the third input port 124. be able to. The same applies to the second input port 123, the fourth input port 126, and the first input port 122 described later.

Further, the input unit 120 indicates a frame radio wave illegal signal output from the payout control device 200, a payout busy signal, a status signal indicating a payout abnormality, a shoot ball out switch signal indicating a shortage of game balls before payout, and an overflow. The first input port 122 that takes in the overflow switch signal, the touch switch signal based on the input of the touch switch provided on the operation handle 24, and the signal from the RAM initialization switch 112 and supplies them to the gaming microcomputer 111 via the data bus 140. Is provided. The overflow switch signal is a signal output when it is detected that a predetermined amount or more of game balls are stored (full) in the lower plate 23. The frame radio wave invalid signal is a signal output based on the frame radio wave sensor provided on the front frame 12 (main body frame) detecting the radio wave, and the payout busy signal is in a state where the payout control device 200 can accept a command. It is a signal indicating whether or not.

Further, the input unit 120 is provided with a Schmidt buffer 125 for inputting a signal such as a power failure monitoring signal or a reset signal from the power supply device 400 to the gaming microcomputer 111 or the like, and the Schmidt buffer 125 is provided with these input signals. It has a function to remove noise from. The power failure monitoring signal from the power supply device 400 is once input to the first input port 122, and is taken into the gaming microcomputer 111 via the data bus 140. That is, it is treated as a signal equivalent to the signal from the various switches described above. This is because there is a limit to the number of terminals provided on the gaming microcomputer 111 that receive signals from the outside.

On the other hand, the reset signal RST whose noise has been removed by the Schmidt buffer 125 is directly input to the reset terminal provided in the gaming microcomputer 111 and is supplied to each port of the output unit 130. Further, the reset signal RST is output directly to the relay board 70 without going through the output unit 130 to turn off the test firing test signal held in the port (not shown) of the relay board 70 for output to the test firing test apparatus. It is configured as follows.

Further, the reset signal RST may be configured to be output to the test firing test apparatus via the relay board 70. The reset signal RST is not supplied to the ports 122, 123, and 124 of the input unit 120. The data set in each port of the output unit 130 by the gaming microcomputer 111 just before the reset signal RST is input needs to be reset in order to prevent the system from malfunctioning, but each of the input units 120 immediately before the reset signal RST is input. This is because the data read by the game microcomputer 111 from the port is discarded by resetting the game microcomputer 111.

The output unit 130 is provided with a Schmidt buffer 132 arranged on a communication path from the game microcomputer 111 to the effect control device 300 and a communication path from the game microcomputer 111 to the payout control device 200. Data is transmitted from the game control device 100 to the effect control device 300 and the payout control device 200 by serial communication. It should be noted that the one-way communication is such that a signal cannot be input to the game control device 100 from the effect control device 300 side.

Further, the output unit 130 is connected to the data bus 140, and data for notifying the special symbol information of the variable display game to the test firing test device of the accreditation body (not shown), a signal indicating the probability state of the jackpot, and the like are transmitted via the relay board 70. The output buffer 133 is configured to be mountable. The buffer 133 is a component that is not mounted on the game control device (main board) of a pachinko gaming machine as an actual machine (mass production product) installed in a game store. The detection signal of a switch that does not need to be processed, such as a start port switch output from the proximity I / F 121, is supplied to the test firing test apparatus via the relay board 70 without passing through the buffer 133.

On the other hand, a detection signal that cannot be supplied to the test firing test device as it is, such as the magnetic sensor switch 61 and the radio wave sensor 62, is once taken into the game microcomputer 111 and processed into other signals or information, for example, the game machine controls the game. It is supplied from the data bus 140 to the test firing test apparatus via the buffer 133 and the relay board 70 as an error signal indicating that the state cannot be achieved.

The relay board 70 is provided with a port that takes in the signal output from the buffer 133 and supplies it to the test firing test apparatus, a connector that relays and transmits the signal line of the switch detection signal that does not go through the buffer, and the like. There is. A chip enable signal CE output from the gaming microcomputer 111 is also supplied to the port on the relay board 70, and the signal of the port selectively controlled by the signal CE is supplied to the test firing test apparatus.

Further, the output unit 130 includes a solenoid (general electric solenoid) 37c connected to the data bus 140 to open the normal variable winning device 37, a large winning opening solenoid 39b (large winning opening solenoid) to open the special variable winning device 39, and the like. A second output port 134 is provided for outputting open / close data of the lever solenoid 86b that operates the lever to open the specific area 86.

Further, the output unit 130 has a third output port 135 for outputting on / off data of the segment line to which the anode terminal of the LED is connected according to the content to be displayed on the batch display device 50, and the batch display device 50. A fourth output port 136 is provided for outputting on / off data of the digit line to which the cathode terminal of the LED is connected.

Further, the output unit 130 is provided with a fifth output port 137 for outputting information about the gaming machine 10 such as jackpot information to the external information terminal 71. The external information terminal 71 is provided with a photo relay, which can be connected to, for example, an external device (such as an information collection terminal or a game hall internal management device (hall computer)) installed in a game store, and provides information about the game machine 10 to the outside. It can be supplied to the device. Further, a launch permission signal is also output from the fifth output port 137 to the payout control device 200 via the Schmidt buffer 132.

Further, the output unit 130 is a first driver (drive circuit) that generates and outputs a solenoid drive signal by receiving open / close data signals of the general electric current solenoid 37c and the grand prize opening solenoid 39b output from the second output port 134. 138a, the second driver 138b that outputs the on / off drive signal of the segment line on the current supply side of the batch display device 50 output from the third output port 135, and the batch display device 50 output from the fourth output port 136. The third driver 138c that outputs the on / off drive signal of the digit line on the current drawing side, and the fourth driver 138d that outputs the external information signal supplied from the fifth output port 137 to the external device such as the management device to the external information terminal 71. Is provided.

DC32V is supplied from the power supply device 400 as a power supply voltage to the first driver 138a so that a solenoid operating at 32V can be driven. Further, DC12V is supplied to the second driver 138b that drives the segment line of the batch display device 50. Since the third driver 138c for driving the digit wire is for pulling out the digit wire corresponding to the display data with a current, the power supply voltage may be either 12V or 5V.

A dynamic drive system in which a second driver 138b that outputs 12V causes a current to flow into the anode terminal of the LED via a segment wire, and a third driver 138c that outputs a ground potential draws a current from the cathode terminal via a digit wire. The power supply voltage flows through the LEDs sequentially selected in step 2 and the LEDs are turned on. The fourth driver 138d, which outputs the external information signal to the external information terminal 71, supplies the external information signal with a level of 12V, so that DC12V is supplied. The buffer 133, the second output port 134, the first driver 138a, and the like may be provided on the output unit 130 of the game control device 100, that is, on the relay board 70 side instead of the main board.

Further, the output unit 130 is provided with a photocoupler 139 for transmitting information such as an identification code and a program of each gaming machine to an external inspection device 500. The photocoupler 139 is configured so that the gaming microcomputer 111 can communicate with the inspection device 500 by serial communication. Since such data transmission / reception is performed using the serial communication terminal of the gaming microcomputer 111 as in the case of a normal general-purpose microprocessor, ports such as input ports 122, 123, and 124 are not provided.

Further, the output unit 130 receives the serial data (control data, lighting pattern data, character code (character code), etc.) output from the second output port 134, and receives the performance display device 152 (status display device). A driving driver 150 is provided. In the present embodiment, the performance display device 152 is composed of a plurality of (4) 7-segment type (8-segment type including dot Dp) display (LED lamp), and the driver 150 is an LED driver. It is not limited to.

The performance display device 152 is provided on the game control device 100 (main board), but may be provided at another location. For example, the performance display device 152 can display the probability setting value for display and the accessory ratio, the ball ejection rate, and the number of ejected balls as the performance display.

Here, the number of ejected balls is the number of game balls ejected from the game area 32 (also referred to as the number of out balls), the number of game balls that have passed through the winning opening (the number of winning balls), and the number of games that have passed through the out opening 30b. It is the total with the number of spheres. The number of ejected balls can be obtained by counting the signal of the out ball detection switch 74 or the like. In the present embodiment, the winning openings include a general winning opening 35, a starting winning opening 36 (first starting winning opening, starting opening 1), a normal variable winning device 37 (second starting winning opening, starting opening 2), and A special variable winning device 39 (large winning opening) is included.

The payout rate is the ratio (ratio) of the total number of prize balls to the number of ejected balls (or the number of launched balls), and is calculated by (number of acquired balls ÷ number of ejected balls) × 100 (%). That is, the ball output rate is the number of acquired balls (total number of prize balls) per 100 ejected balls.

For example, the bonus ratio is in the jackpot state out of the total number of prize balls (total number of prize balls) obtained by winning a prize in the winning opening during a predetermined period (for example, from the power-on of the gaming machine 10 to the present). It is the ratio (%) (= so-called continuous character ratio) of the number of prize balls (the number of balls acquired by the character) obtained by winning the big prize opening. In addition, the accessory ratio may be the ratio of the number of prize balls (in the big hit state and the small hit state) obtained by winning the big prize opening (= big prize opening ratio) to the total number of prize balls. Or, the ratio of the number of prize balls obtained by winning the large prize opening and the ordinary variable winning device 37 (second starting winning opening) (= the so-called bonus ratio (total bonus ratio) commonly used )) May be used.

[Production control device]
Next, the configuration of the effect control device 300 (sub-board) will be described with reference to FIG. FIG. 4 is a block diagram of the effect control system of the gaming machine 10.

The effect control device 300 is used to display images on the display device 41 according to commands and data from the main control microcomputer (CPU) 311 composed of an amusement chip (IC) and the main control microcomputer 311 like the game microcomputer 111. It is provided with a VDP (Video Display Processor) 312 as a graphic processor that performs image processing, and a sound source LSI 314 that controls sound output in order to reproduce various melody and sound effects from the speaker 19.

The main control microcomputer 311 holds a program ROM 321 consisting of a program executed by the CPU and a PROM (programmable read-only memory) that stores various data, a RAM 322 that provides a work area, and a stored content even if power is not supplied in the event of a power failure. A possible FeRAM 323 and an RTC (real-time clock) 338 that serves as a timekeeping means for generating information indicating the current date and time (year, month, day, day, time, etc.) are connected. A RAM that provides a work area is also provided inside the main control microcomputer 311.

A WDT (watchdog timer) circuit 324 is connected to the main control microcomputer 311. The main control microcomputer 311 analyzes commands from the game microcomputer 111, determines the production content, instructs the VDP 312 of the content of the output video, instructs the sound source LSI 314 of the reproduced sound, lights the decorative lamp, and the motor. And the drive control of the solenoid, the management of the production time, and so on.

The VDP 312 is provided with a RAM 312a that provides a work area and a scaler 312b for enlarging / reducing an image. Further, the VDP 312 has an image ROM 325 in which character images and video data are stored, and an ultra-high-speed VRAM (video RAM) used for developing and processing image data such as characters read from the image ROM 325. ) 326 is connected.

Although not particularly limited, data is transmitted and received between the main control microcomputer 311 and the VDP 312 in a parallel manner. By sending and receiving data in parallel, commands and data can be sent in a shorter time than in the case of serial.

From the VDP 312 to the main control microcomputer 311, a vertical synchronization signal VSYNC for synchronizing the video of the display device 41 with the lighting of the decorative lamps provided on the glass frame 15 and the game board 30, and a synchronization signal for giving data transmission timing. STS is input. The VDP 312 informs the main control microcomputer 311 that it is in a state of waiting for reception of interrupt signals INT0 to n and commands and data from the main control microcomputer 311 in order to notify the processing status such as the end of drawing in VRAM. The wait signal WAIT and the like for this is also input.

The effect control device 300 is provided with a signal conversion circuit 313 that generates a video signal to be transmitted to the display device 41 by an LVDS (small amplitude signal transmission) method. Video data, a horizontal synchronization signal HSYNC, and a vertical synchronization signal VSYNC are input from the VDP 312 to the signal conversion circuit 313, and the video generated by the VDP 312 is transmitted to the display device 41 via the signal conversion circuit 313. Is displayed.

An audio ROM 327 in which audio data is stored is connected to the sound source LSI 314. The main control microcomputer 311 and the sound source LSI 314 are connected via the address / data bus 340. Further, an interrupt signal INT is input from the sound source LSI 314 to the main control microcomputer 311. The effect control device 300 is provided with an amplifier circuit 337 including an audio power amplifier for driving the upper speaker 19a provided on the glass frame 15 and the lower speaker 19b provided on the front frame 12, and the sound source LSI 314. The generated sound is output from the upper speaker 19a and the lower speaker 19b via the amplifier circuit 337.

Further, the effect control device 300 is provided with an interface chip (command I / F) 331 that receives a command transmitted from the game control device 100. The effect control command signal (effect command) is a decorative special figure hold number command, a decorative special figure command, a variation command, a stop information command, etc. transmitted from the game control device 100 to the effect control device 300 via the command I / F331. Receive as. Since the game microcomputer 111 of the game control device 100 operates at DC 5 V and the main control microcomputer 311 of the effect control device 300 operates at DC 3.3 V, the command I / F 331 is provided with a signal level conversion function. There is.

Further, the effect control device 300 includes a board decoration LED control circuit 332 and a glass frame 15 for driving and controlling a board decoration device 46 having an LED (light emitting diode) provided on the game board 30 (including the center case 40). A board effect provided on a frame decoration LED control circuit 333 and a game board 30 (including a center case 40) for driving and controlling a frame decoration device having an LED (light emitting diode) (for example, a frame decoration device 18 or the like). A panel effect movable body control circuit 334 for driving and controlling a device 44 (for example, a movable accessory that enhances the effect of the effect in cooperation with the effect display on the display device 41) is provided. The board decoration device 46 may include the above-mentioned lamp display device 80.

These control circuits 332 to 334 that drive and control lamps, motors, solenoids, and the like are connected to the main control microcomputer 311 via the address / data bus 340. A frame effect movable body control circuit for driving and controlling a frame effect device such as a motor provided on the glass frame 15 may be provided.

Further, the effect control device 300 includes an effect button switch 25a built in the effect button 25 provided on the glass frame 15, a touch panel 25b provided on the surface of the effect button 25, and a motor in the board effect device 44. A function of detecting the on / off state of the effect switch 47 (effect motor switch) for detecting the initial position and inputting a detection signal to the main control microcomputer 311 and a volume control switch provided in the effect control device 300. A switch input circuit 336 that detects the state of 335 and inputs a detection signal to the main control microcomputer 311 is provided.

The normal power supply unit 410 of the power supply device 400 drives a motor or a solenoid in order to supply a desired level of DC voltage to the effect control device 300 having the above-described configuration and the electronic components controlled by the effect control device 300. DC32V, display device 41 consisting of liquid crystal panel, DC12V for driving motors and LEDs, DC5V for driving command I / F331, and DC15V for driving motors, LEDs, and speakers. It is configured to do.

Further, when an LSI operating at a low voltage such as 3.3V or 1.2V is used as the main control microcomputer 311, the DC-DC for generating DC3.3V or DC1.2V based on DC5V is used. A DC converter is provided in the effect control device 300. The DC-DC converter may be provided in the normal power supply unit 410.

The reset signal generated by the control signal generation unit 430 of the power supply device 400 is supplied to the main control microcomputer 311 to put the device in the reset state. Further, in the form of being output from the main control microcomputer 311, the VDP 312 (VDP RESET signal), the sound source LSI 314, the amplifier circuit 337 (SNDRESET signal) for driving the speaker, and the control circuit 332-334 (IOReSET) for driving and controlling the lamp, the motor, etc. It is supplied to the signal) and puts them in the reset state. Further, a cooling FAN 45 for cooling various parts of the gaming machine 10 is connected to the effect control device 300, and the cooling FAN 45 is driven when the power of the effect control device 300 is turned on.

Next, the game control performed in these control circuits will be described. The CPU 111a of the game microcomputer 111 of the game control device 100 extracts a random value for hit determination in the normal figure based on the input of the detection signal of the game ball from the gate switch 34a provided in the normal figure start gate 34, and ROM 111b. Compared with the judgment value stored in, the hit / miss of the normal map variation display game is judged.

Then, after displaying the identification symbol on the normal map display 53 in a predetermined time variation, a normal map variation display game in which the identification symbol is stopped and displayed is displayed. When the result of the normal fluctuation display game is a hit, a special result mode is displayed on the normal figure display 53, the normal electric solenoid 37c is operated, and the movable member 37b of the normal fluctuation winning device 37 is set for a predetermined time (for example). , 0.3 seconds) Control to open as described above. That is, the game control device 100 serves as a conversion control execution means for performing conversion control of the conversion member (movable member 37b). If the result of the normal map variation display game is out of alignment, the normal map display 53 is controlled to display the result mode of the deviation.

Further, the start winning (starting memory) is memorized based on the input of the detection signal of the game ball from the starting opening 1 switch 36a provided in the starting winning opening 36, and the jackpot determination of the special figure 1 variation display game is made based on the starting memory. The random value for use is extracted and compared with the determination value stored in the ROM 111b to determine the hit / miss of the special figure 1 variation display game.

Further, the start memory is memorized based on the input of the detection signal of the game ball from the start port 2 switch 37a provided in the normal variable winning device 37, and the random value for jackpot determination of the special figure 2 variable display game is memorized based on the start memory. Is extracted and compared with the determination value stored in the ROM 111b, and the hit / miss of the special figure 2 variation display game is determined.

Then, the CPU 111a of the game control device 100 outputs a control signal (effect control command) including the determination result of the special figure 1 variation display game and the special figure 2 variation display game to the effect control device 300. Then, the special figure variation display game is displayed on the special figure 1 display 51 and the special figure 2 display 52 after the identification symbol is variablely displayed for a predetermined time and then stopped and displayed. That is, the game control device 100 controls the progress of the variable display game based on the winning of the starting winning area (first starting winning opening 36, normal variable winning device 37) of the game ball flowing down the game area 32. Make.

Further, the effect control device 300 displays the decorative special figure variation display game corresponding to the special figure variation display game on the display device 41 based on the control signal from the game control device 100. Further, the effect control device 300 performs processing such as setting the effect state, outputting sounds from the speakers 19a and 19b, and controlling the light emission of various LEDs based on the control signal from the game control device 100. That is, the effect control device 300 serves as an effect control means for controlling the effect related to the game (variable display game, etc.).

Then, when the result of the special figure variation display game is a hit, the CPU 111a of the game control device 100 displays the special result mode on the special figure 1 display 51 and the special figure 2 display 52, and generates a special game state. Let me. In the process of generating the special game state, the CPU 111a controls, for example, by opening the opening / closing door 39c of the special variable winning device 39 by the large winning opening solenoid 39b to allow the game ball to flow into the special winning opening. ..

Then, either a predetermined number (for example, 10) of game balls wins in the large winning opening, or a predetermined opening time (for example, 27 seconds or 0.05 seconds) elapses from the opening of the large winning opening. One round (R) is to open the big winning opening until the above condition is achieved, and this is continued (repeated) a predetermined number of rounds (for example, 15 times, 11 times or 2 times) control (cycle game). I do. That is, the game control device 100 serves as a large winning opening opening / closing control means for controlling the opening / closing of the large winning opening when the stop result mode becomes the special result mode. Further, when the result of the special figure variation display game is out of alignment, the special figure 1 display 51 and the special figure 2 display 52 are controlled to display the result mode of the deviation.

Further, the game control device 100 can generate a high probability state as a game state after the end of the special game state based on the result mode of the special figure variation display game. The high probability state (probability change state) is a state in which the probability of a hit result in the special figure fluctuation display game is higher than that of the normal probability state. Further, regardless of which of the special figure 1 variable display game and the special figure 2 variable display game results in a high probability state, the special figure 1 variable display game and the special figure 2 variable display game Both are in a high probability state.

Further, the game control device 100 can generate a time saving state (specific game state) as a game state after the end of the special game state, based on the result mode of the special figure variation display game. In the time saving state, the normal fluctuation display game and the normal fluctuation winning device 37 are controlled to be in the time saving operation state, and the normal fluctuation winning device 37 per unit time is controlled as compared with the case where the normal fluctuation winning device 37 is in the normal operating state. Since it is controlled so that the opening time of the game is substantially increased, the game is in the normal power support state. In addition, even in the high probability state (normal probability change state) excluding the latent probability change state, the time saving state is duplicated and the normal electric support is executed.

For example, in the time-reduced state, it is possible to shorten the time so that the execution time (normal figure fluctuation time) of the above-mentioned normal figure fluctuation display game is set to the second fluctuation display time shorter than the normal first fluctuation display time (for example). 10000 msec is 1000 msec). In the time saving state, the execution time of the special figure fluctuation display game (special figure fluctuation time) is also shorter than usual, and the time reduction fluctuation of the special figure fluctuation display game is also executed.

Further, in the time saving state, it is possible to control the normal figure stop time for displaying the result of the normal figure fluctuation display game to be a second stop time (for example, 704 msec) shorter than the first stop time (for example, 1604 msec). Is.

Further, in the time saving state, when the normal fluctuation winning device 37 is opened as a result of the normal fluctuation display game, the opening time (normal power opening time) is the first opening time (for example, 100 msec) in the normal state. It is possible to control the second opening time to be longer (for example, 1352 msec).

Further, in the time saving state, the number of times the normal fluctuation winning device 37 is opened (the number of times the normal electric power is opened) is larger than the number of times the first opening number (for example, 2 times) is obtained with respect to the result of one hit of the normal fluctuation display game. It is possible to set the second opening number of times (for example, 4 times). Further, in the time saving state, the probability of hitting the result of the normal map variation display game (normal figure probability) can be set to a higher probability than the normal probability (low probability) in the normal operating state.

In the time saving state, the normal fluctuation winning device 37 is opened by changing any one or more of the normal fluctuation time, the normal stop time, the number of times the normal power is opened, the normal power opening time, and the normal probability. Try to extend the conversion time longer than usual. As a result, in the time saving state, the winning of the normal variable winning device 37 becomes easier than in the normal gaming state, and the number of executions of the special figure variation display game per unit time can be increased as compared with the normal gaming state. It is also possible to set a plurality of types of time saving states in which different things are changed. Further, it may be set so that the movable member 37b is not opened in the normal operating state (probability of normal drawing is 0). Further, when a hit occurs, either the first open mode or the second open mode may be selected. In this case, the selection probabilities of the first open mode and the second open mode may be different. Further, the high probability state and the time saving state can be generated independently, and both can be generated at the same time, or only one can be generated.

[Transition state when power is turned on]
As described above, the state shifts to four states (modes) depending on the on / off state of the RAM initialization switch 112 and the setting key switch 93 when the power is turned on.

When the RAM initialization switch 112 and the setting key switch 93 are turned on when the power is turned on, the probability setting value (setting value) is changed to a variable setting state (setting change state, setting change mode). (See A1027-A1036 in FIG. 5B and FIG. 6B).

Next, when the setting key switch 93 is turned on but the RAM initialization switch 112 is off when the power is turned on, the state shifts to the setting confirmation state (setting confirmation mode) in which the probability setting value can be confirmed (FIG. FIG. 5B A1031-A1036 and FIG. 6B).

If the setting key switch 93 is off but the RAM initialization switch 112 is on when the power is turned on, the state shifts to the RAM initialization state (RAM clear mode) and the RAM initialization process (RAM clear). The process) is executed to initialize the RAM 111c (see A1042-1044 in FIG. 5B).

If the setting key switch 93 and the RAM initialization switch 112 are off when the power is turned on, the state shifts to the normal power recovery state (normal power recovery mode), and the power is simply recovered.

[Control of game control device]
Hereinafter, control of a gaming machine that performs such a game will be described. First, the control executed by the game microcomputer (game microcomputer) 111 of the game control device 100 will be described. The control process by the game microcomputer 111 mainly includes the main process shown in FIGS. 5A and 5B and the timer interrupt process shown in FIG. 9 performed in a predetermined time cycle (for example, 4 msec).

[Main processing (game control device)]
First, the main process will be described. 5A and 5B are flowcharts showing a procedure of main processing by the game control device 100. The main process is started when the power is turned on. In the flowchart of the process executed by the game control device 100, the code (number) of the step is represented as "A ***".

As shown in FIG. 5A, when the game control device 100 starts the main process, it first executes a process of disabling interrupts (A1001). Further, a stack pointer setting process for setting the stack pointer, which is the start address of the area for saving the value of the register or the like when an interrupt occurs, is executed (A1002).

Subsequently, register bank 0 is designated as the register bank to be used (A1003), and the upper address of the RAM start address is set in a predetermined register (A1004). For example, when the RAM address is in the range of 0000h to 01FFh, 00h is set as the upper address.

Next, the game control device 100 outputs a firing prohibition signal and sets the firing permission signal to the prohibited state (A1005). The launch permission signal is set to a prohibited state when at least one of the game control device 100 and the payout control device 200 outputs a launch prohibition signal, and the launch of the game ball is prohibited. After that, the game control device 100 reads the states of the setting key switch 93 and the RAM initialization switch 112 (A1006). That is, the signals from the setting key switch 93 and the RAM initialization switch 112 are read.

Further, the game control device 100 sets a power supply delay timer (A1007). A program of a slave control means (for example, a payout control device 200 or an effect control device 300) that performs various controls according to instructions from a game control device 100 that serves as a main control means by setting a predetermined initial value in the power delay timer. A waiting time (for example, 3 seconds) for waiting until is normally started is set. As a result, when the power is turned on, the game control device 100 temporarily starts up first and sends a command to the slave control device before the slave control device (for example, the payout control device 200 or the effect control device 300) starts up, and the slave control device Can prevent the command from being missed. That is, when the power is turned on, the game control device 100 delays the start of the main control means (game control device 100) and waits for the start of the slave control devices (payout control device 200, effect control device 300, etc.). It serves as a waiting means for setting the waiting time.

Further, the timing of the power supply delay timer is performed using a storage area (RAM area or register, etc. that is not subject to the validity determination) that is not subject to the validity determination (checksum calculation) of the RAM. As a result, when calculating check data such as a checksum of a RAM area, it is not necessary to exclude a part of the RAM area for calculation, so that it is possible to prevent the control at the time of power-on from becoming complicated.

By reading the states of the setting key switch 93 and the RAM initialization switch 112 before the start of the standby time, the operation of the setting key switch 93 and the RAM initialization switch 112 can be reliably detected. That is, if the states of the setting key switch 93 and the RAM initialization switch 112 are read after the standby time has elapsed, the setting key switch 93 and the RAM initialization switch 112 are operated or the power is turned on after the standby time has elapsed. It is necessary to continue to operate the setting key switch 93 and the RAM initialization switch 112 from the time until the elapse of the standby time. However, by reading the state before the start of the standby time, the operation of the setting key switch 93 and the RAM initialization switch 112 performed at the time of turning on the power cannot be accepted without performing such a troublesome operation. Can be prevented.

When the power delay timer is set (A1007), the game control device 100 executes time counting of the standby time and a process of monitoring the occurrence of a power failure during the standby time (A1008 to A1010).

When the power failure monitoring process is started, the game control device 100 first reads the power failure monitoring signal input from the power supply device 400 via the port and the data bus to determine whether or not a power failure has occurred. (A1008). When a power failure occurs (the result of A1008 is "Y"), the machine waits until the power of the gaming machine is turned off.

When the power failure has not occurred (the result of A1008 is "N"), the game control device 100 updates the power-on delay timer by -1 (A1009), and determines whether or not the value of the timer is 0. (A1010). If the value of the timer is not 0 (the result of A1010 is "N"), that is, if the waiting time has not ended, the process returns to step A1008.

That is, the game control device 100 serves as a power failure monitoring means for monitoring the occurrence of a power failure during a predetermined standby time. As a result, it is possible to deal with a power failure that occurs during the period in which the activation of the game control device 100, which is the main control means, is delayed, and it is possible to appropriately deal with a problem at the time of turning on the power. Note that access to the RAM is not permitted until the end of the standby time, and the stored contents at the time of the previous power cutoff are retained, so backup processing etc. is performed when a power failure occurs here. No need. Therefore, even if a power failure occurs during the standby time, it is not necessary to back up the RAM, and the burden of control can be reduced.

On the other hand, when the value of the timer is 0 (the result of A1010 is "Y"), that is, when the standby time has expired, the game control device 100 has a read / write RWM (read / write) such as a RAM or EEPROM. (Memory) access is permitted (A1011), and off-data is output to all output ports (set to no output) (A1012).

Next, the game control device 100 sets a serial port (a port previously mounted on the game microcomputer 111, which is used for communication with the effect control device 300 and the payout control device 200 in the present embodiment) (A1013). ).

Further, here, the driver 150 for driving the performance display device 152 (state display device) may be initially set. The game control device 100 writes a command including control data corresponding to the contents of the initial setting to the transmission buffer of the second output port 134 (serial communication circuit) and transmits the command to the driver 150. For example, the game control device 100 sets the duty ratio in the initial setting. The duty ratio corresponds to the brightness of each LED (each segment) of the performance display device 152. The game control device 100 sets the number of digits used in the performance display device 152 in the initial setting. In this embodiment, the number of digits used is four.

Next, the game control device 100 activates a CTC (Counter / Timer Circuit) circuit that generates a timer interrupt signal and a random number update trigger signal (CTC) in the game microcomputer 111 (clock generator) (A1014). The CTC circuit is provided in the clock generator in the gaming microcomputer 111. The clock generator has a frequency dividing circuit that divides the oscillation signal (original clock signal) from the oscillation circuit 113, and a timer interrupt signal having a predetermined period (for example, 4 milliseconds) with respect to the CPU 111a based on the divided signal. It also includes a CTC circuit that generates a signal CTC that triggers a random number update to be supplied to the random number generation circuit.

Subsequently, the game control device 100 sets a RAM abnormality flag indicating an abnormality in the RAM (here, RAM111c) (A1015). Here, the flag of the assumption of abnormality is once set in a predetermined register.

Next, the game control device 100 determines whether or not the value of the power failure inspection area 1 in the RWM is normal power failure inspection area check data (A1016). Then, if it is normal (the result of A1016 is "Y"), it is determined whether or not the value of the power failure inspection area 2 in the RWM is the normal power failure inspection area check data (A1017).

Further, if the value of the power failure inspection area 2 is normal (the result of A1017 is “Y”), the game control device 100 calculates a checksum of a predetermined area (for example, a game control work area) in the RWM. The calculation process is executed (A1018), and it is determined whether or not the calculated checksum and the checksum at the time of power failure match (A1019). If the checksums match (the result of A1019 is "Y"), the RAM is normal and the RAM error flag indicating a RAM error is cleared (A1020). After that, the process proceeds to step A1021.

Further, when the game control device 100 determines that the check data in the power failure inspection area is not normal data (the result of A1016 is "N" or the result of A1017 is "N"), the checksums do not match. (The result of A1019 is "N"), the process proceeds to step A1021 without clearing the RAM error flag.

Next, the game control device 100 determines whether or not both the setting key switch 93 and the RAM initialization switch 112 are on (A1021). When both switches are on (the result of A1021 is "Y"), the game control device 100 shifts to the variable setting state (setting change mode), and executes the process during the probability setting change in steps A1027-A1037. ..

When at least one of the setting key switch 93 and the RAM initialization switch 112 is off (the result of A1021 is "N"), the game control device 100 sets a RAM abnormality flag indicating an abnormality in the RAM (here, RAM 111c). It is determined whether or not it has been performed (A1022). When the RAM abnormality flag is not set (the result of A1022 is "N"), it is determined whether or not the probability setting changing flag is set (A1023). When the probability setting changing flag is not set (the result of A1023 is "N"), the process of confirming the probability setting in steps A1031-A1037 (during the setting confirmation state and the setting confirmation mode), in step A1041-144 The RAM initialization process (RAM clear process) or the process at the time of normal power-on (power recovery) in steps A1041, A1045, and A1046 is executed.

The game control device 100 notifies that the game control device 100 (main board, main board) has an abnormality when the probability setting changing flag is set (the result of A1023 is “Y”). An error notification command is transmitted to the effect control device 300 (A1024). The effect control device 300 that has received the command for notifying the main abnormality error notifies that there is an abnormality in the game control device 100.

Subsequently, the game control device 100 uses the driver 150 of the performance display device 152 to display the 7-segment display data (data of the error display of "E1" in FIG. 9C) when the game is stopped on the performance display device 152. Is output to (A1025). Then, the on-data of the security signal for notifying the external device (game hall internal management device (hall computer), information collecting terminal, etc.) of the abnormality is output to the external information terminal 71 (A1026). Here, even when the information regarding the jackpot remains in the RAM 111c, other signals to the external information terminal 71 such as the jackpot signal are maintained in the off state. After that, the processes of steps A1025 and A1026 are repeated to wait, and the setting change operation (both the setting key switch 93 and the RAM initialization switch 112 are turned on) is performed again to wait for the power to be turned on. While the processes of steps A1025 and A1026 are repeated to wait and wait, the interrupt remains disabled (A1001), and the timer interrupt process capable of executing the special figure 1 and 2 game process and the normal figure game process. Since (Fig. 7) cannot be executed, the game (special figure variation display game, normal figure variation display game) cannot be executed.

In this way, if the setting change operation (both the setting key switch 93 and the RAM initialization switch 112 are turned on) is not executed, but the probability setting changing flag is set, there is an abnormality. , A1024-A1026 is executed. For example, when the power is turned off and restarted while the probability setting is being changed (before the setting change is completed), the probability setting changing flag may be set even though the setting change operation has not been executed. be.

On the other hand, even when the RAM abnormality flag is set (the result of A1022 is "Y"), the game control device 100 notifies the game control device 100 (main board) that there is an abnormality in the main abnormality error notification. The command is transmitted to the effect control device 300 (A1024), and the 7-segment display data (data of the error display of "E1" in FIG. 9C) when the game is stopped is output to the driver 150 of the performance display device 152 (A1025). ), The on-data of the security signal is output to the external information terminal 71 in order to notify the external device of the RAM abnormality (A1026). As described above, even when the information about the jackpot remains in the RAM 111c, other signals to the external information terminal 71 such as the jackpot signal are maintained in the off state. After that, the processes of steps A1025 and A1026 are repeated to wait.

When both the setting key switch 93 and the RAM initialization switch 112 are turned on (the result of A1021 is “Y”), the game control device 100 starts the process of changing the probability setting (during the variable setting state). First, it is determined whether or not the RAM abnormality flag is set (A1027). When the RAM error flag is set (the result of A1027 is "Y"), it is unknown whether the probability setting value is correct, so the probability setting value stored in the probability setting value area of the RAM 111c is cleared. After setting the initial value (for example, the minimum setting value "1") (A1028), the probability setting changing flag indicating that the probability setting is being changed is set (A1029). When the RAM abnormality flag is not set (the result of A1027 is "N"), the probability setting changing flag is set without clearing the probability setting value (A1029). Next, the command for which the probability setting is being changed is transmitted to the effect control device 300 (effect control board) (A1030), and the process proceeds to step A1034. The effect control device 300 that has received the command for changing the probability setting notifies the display device 41 or the like that the probability setting is being changed.

In the game control device 100, at least one of the setting key switch 93 and the RAM initialization switch 112 is off (the result of A1021 is "N"), and the RAM abnormality flag is not set (the result of A1022 is "N"). ), And when the probability setting changing flag is not set (the result of A1023 is “N”), it is determined whether or not the setting key switch 93 is on (A1031). When the setting key switch 93 is on (the result of A1031 is "Y"), the RAM initialization switch 112 is off, and the process of confirming the probability setting (during the setting confirmation state) starts, and the probability Set the probability setting checking flag indicating that the setting is being checked (A1032). Then, the command under confirmation of probability setting is transmitted to the effect control device 300 (effect control board) (A1033), and the process proceeds to step A1034. The effect control device 300 that has received the command for changing the probability setting notifies the display device 41 or the like that the probability setting is being confirmed.

After step A1030 or step A1033, the game control device 100 executes the processes of steps A1034 to A1040 as common processes during the probability setting change and the probability setting confirmation.

First, the game control device 100 saves 128 ms (predetermined time) in the security signal control timer area in order to output the security signal during the probability setting change and the probability setting confirmation (A1034). The count of the security signal control timer and the output of the security signal are executed in the probability setting change / confirmation process (FIG. 6B) described later, but remain when the probability setting change or the probability setting confirmation is completed early. The count of the security signal control timer and the output of the security signal are executed by the external information editing process (A1319). The security signal is output for at least 50 ms while the probability setting is being changed and the probability setting is being confirmed.

Next, the game control device 100 permits interrupts (A1035). As a result, the timer interrupt process (FIG. 7) can be executed. Then, it is determined whether or not the setting key switch 93 is off (A1036). When the setting key switch 93 is on (the result of A1036 is "N"), it is determined whether or not a power failure has occurred (A1037). If no power failure has occurred (the result of A1037 is “N”), the process returns to step A1036. On the other hand, when a power failure has occurred (the result of A1037 is "Y"), the process at the time of the power failure in steps A1055-A1061 is executed.

In this way, as long as the setting key switch 93 is on and a power failure does not occur, the probability setting value can be confirmed in the variable setting state (setting change state, setting change mode) or the probability setting value can be confirmed. The setting confirmation status (setting confirmation mode) is continued.

On the other hand, when the setting key switch 93 is off (the result of A1036 is "Y"), the game control device 100 prohibits interrupts (A1038), and issues a command to end the notification to the effect control device 300 (effect control board). (A1039). The effect control device 300 that has received the command to end the notification ends the notification that the probability setting is being confirmed or that the probability setting is being changed.

Next, the game control device 100 determines whether or not the probability setting changing flag is set, that is, whether or not the probability setting is being changed so far (A1040). When the probability setting changing flag is set (the result of A1040 is "Y"), that is, when the probability setting is being changed so far, the RAM initialization process (described later) in steps A1042-A1044 is executed. do. On the other hand, when the probability setting changing flag is not set (the result of A1040 is "N"), that is, when the probability setting is being confirmed so far, when the power is turned on after step A1045 (when the power is restored). Perform the normal processing of.

The game control device 100 determines whether or not the RAM initialization switch 112 is on when the setting key switch 93 is off (the result of A1031 is “N”) (A1041). When the RAM initialization switch 112 is on (the result of A1041 is “Y”), the RAM area other than the probability setting value area for storing the probability setting value is cleared to 0 in the RAM 111c (A1042). That is, the game information stored in the RAM 111c is cleared to 0 except for the probability setting value stored in the probability setting value area. Further, the above-mentioned probability setting changing flag is also cleared here. Further, in addition to the probability setting value area, a configuration that does not clear the stack area and the unused area, a work area related to the performance information and its display (performance display), and a configuration that does not clear the stack area are also possible. .. The performance information is derived based on the number of prize balls obtained by winning, for example, the ball ejection rate, the base value (the ball ejection rate in the normal game state), the accessory ratio, the number of ejected balls, and the like. Is.

Next, the game control device 100 saves the initial value at the time of RAM initialization in the area to be initialized (A1043). Then, the command at the time of RAM initialization is transmitted to the effect control device 300 (effect control board) (A1044), and the process proceeds to step A1047.

On the other hand, the game control device 100 has a normal power supply because both the setting key switch 93 and the RAM initialization switch 112 are off when the RAM initialization switch 112 is off (the result of A1041 is “N”). The process at the time of turning on (when the power is restored) is started, and the power failure recovery process is executed (A1045). For example, the initial value at the time of power failure recovery (power recovery) is saved in the area to be initialized. In addition, the above-mentioned probability setting confirmation flag is also cleared here. Next, a command at the time of power failure recovery corresponding to the processing number prepared for rationally executing the special figure game processing described later is transmitted to the effect control device 300 (effect control board) (A1046), and step A1047. Move to the processing of.

The command at the time of RAM initialization transmitted in the process of step A1044 and the command at the time of recovery from a power failure transmitted in the process of step A1046 include a model designation command indicating the type of the game machine and the hold of special figures 1 and 2. Ornament special figure 1 indicating the number Hold number command and decoration special figure 2 Hold number command, probability information command indicating the presence or absence of a probability state (high probability state or low probability state) or a time saving state, special figure fluctuation in a predetermined production mode It includes a production count information command that indicates the number of times the display game has been executed, and a power failure recovery command that indicates that the power has been turned on.

Further, the command at the time of RAM initialization and the command at the time of power failure recovery include the setting value information command (probability setting value information) indicating the setting value information (setting information) which is the information of the probability setting value (setting value) of the game machine 10. Command) is included. The game control device 100 only needs to transmit the set value information command to the effect control device 300 only once when the power is restored (turned on), and thereafter, the effect control device 300 refers to the set value information stored by itself. You can control the production.

The RAM initialization command also includes a RAM initialization command (RAM clear command). The effect control device 300 that has received the RAM initialization command displays, for example, a customer waiting demo on the display device 41, and notifies the RAM initialization (RAM clear) by the sound of the LED and the speaker of the board decoration device 46 or the like. Do it for a second. Further, the command at the time of power failure recovery includes a screen designation command for designating the display contents of the screen of the display device 41. Note that the screen designation command is a customer waiting demo command for both Special Figures 1 and 2 during normal processing (when neither fluctuating nor hitting), and is a recovery screen command otherwise.

After step A1044 or step A1046, the game control device 100 activates and sets the random number generation circuit (A1047). Specifically, the CPU 111a sets a code (designated value) for activating the random number generation circuit in a predetermined register (CTC update permission register) in the random number generation circuit. In addition, the bit transposition pattern of the hard random number (here, the jackpot random number) generated by the hardware of the random number generation circuit is also set.

The bit transposition pattern is a method of exchanging the extracted random number bits (arrangement before bit transposition in the upper row) when they are exchanged in a predetermined order and stored as different bit arrangements (arrangement after bit transposition in the lower row). It is a pattern that determines.

In the present embodiment, by exchanging the bits of the random number according to the bit transposition pattern, the regularity of the random number can be broken and the confidentiality of the random number can be enhanced. The bit transposition pattern may be a fixed single pattern, or may be selected from a plurality of patterns prepared in advance. In addition, the user may be able to set it arbitrarily.

After that, the game control device 100 extracts the values of predetermined registers (soft random number registers 1 to n) in the random number generation circuit when the power is turned on, and corresponds to various initial value random numbers (big hit symbol random numbers for determining the jackpot symbol). Initial value (big hit symbol initial value random number), small hit symbol random number that determines the small hit symbol (small hit symbol initial value random number) (only when there is a small hit), hit random number that determines the hit of the normal figure Save in a predetermined area of RWM (A1048) as the start value of the initial value (random number of initial value per hit), the initial value of the random number of the fall lottery used in the fall lottery (random number of the initial value of the fall lottery), etc., and allow the interruption (A1049). ). In the random number generation circuit in the CPU 111a used in the present embodiment, the initial value of the soft random number register is configured to change each time the power is turned on. Therefore, this value is used as the start value (initial value) of various initial random numbers. By doing so, the regularity of the random numbers generated by the software can be broken, and it is possible to make it difficult for the player to acquire an illegal random number.

Subsequently, the game control device 100 executes an initial value random number update process for updating the values of various initial value random numbers to break the regularity of the random numbers (A1050). Although not particularly limited, in the present embodiment, the big hit random number, the big hit symbol random number, the hit random number, and the fall lottery random number are configured to be generated by using the random numbers generated in the random number generation circuit. There is. However, the jackpot random number is a so-called "high-speed counter" that is updated based on a clock whose speed is equal to or higher than the operating clock of the CPU, and the jackpot symbol random number, hit random number, and fall lottery random number are timer interrupts that are processing units of the program. It is a "low-speed counter" that is updated based on the CTC output (CTC (CTC2) different from CTC (CTC0) of timer interrupt processing) that has the same cycle as the processing.

In addition, for jackpot symbol random numbers, hit symbol random numbers, and fall lottery random numbers, a so-called "initial value change method" is adopted in which the start value is changed using each initial value random number (generated by software) each time the random number makes a round. ing. It should be noted that each of the random numbers may be a counter-type update by +1 or 1, or a random-type update in which all the values in the range appear separately without duplication until one cycle is completed. That is, the jackpot random number is a random number updated only by the hardware, and the jackpot symbol random number, the hit random number, and the fall lottery random number are random numbers updated by the hardware and software.

Subsequently, the game control device 100 prohibits interrupts (A1051) and executes a performance display editing process for editing the performance information and its display (performance display) (A1052). Here, the performance information (such as the accessory ratio and the ball output rate) may be calculated. Further, when the RAM error flag is set in the register, the work area and the stack area related to the performance information and its display (performance display) may be cleared (if it is not cleared in step A1042). After that, interrupts are permitted (A1053). As a result, the timer interrupt process (FIG. 7) can be executed.

Next, the game control device 100 determines whether or not a power failure has occurred (A1054). If no power failure has occurred (result of A1054 is “N”), the process returns to step A1050. As a result, the process of steps A1050-A1054 is repeated until a power failure occurs.

When a power failure occurs (the result of A1054 is "Y"), the game control device 100 starts processing at the time of a power failure, temporarily disables interrupts (A1055), and outputs off-data to all output ports (A1055). 1056). After that, the power failure inspection area check data 1 is saved in the power failure inspection area 1 (A1057), and the power failure inspection area check data 2 is saved in the power failure inspection area 2 (A1058). Further, a checksum calculation process for calculating the checksum when the power of the RWM is turned off is executed (A1059), and the calculated checksum is saved (A1060). Finally, a process for prohibiting access to the RWM is executed (A1061), and the machine waits until the power of the gaming machine is turned off.

In this way, by saving the check data in the power failure inspection area and calculating the checksum when the power is turned off, it is possible to check whether the information stored in the RWM before the power is cut off is correctly backed up. It can be judged at the time of re-input.

[Timer interrupt processing]
Next, timer interrupt processing will be described. FIG. 6A is a flowchart showing the procedure of timer interrupt processing (interrupt processing program). The timer interrupt process is started by inputting a periodic timer interrupt signal generated by the CTC circuit in the clock generator to the CPU 111a. When a timer interrupt occurs in the gaming microcomputer 111, the timer interrupt processing is started.

When the timer interrupt process is started, the game control device 100 first designates the register bank 1 as the register bank to be used (A1301), and sets the upper address of the RAM start address in the predetermined register (A1302). By switching from register bank 0 used in main processing to register bank 1 at the start of timer interrupt processing, it is equivalent to saving the register used in main processing. When the timer interrupt processing is started, the interrupt is automatically disabled.

Next, the game control device 100 executes input from various sensors and switches, capture of signals, that is, input processing for reading the state of each input port (A1303). Next, based on the probability setting changing flag and the probability setting checking flag, it is determined whether or not the probability setting is being changed or the probability setting is being confirmed (A1304). When the probability setting is being changed or the probability setting is being confirmed (the result of A1304 is "Y"), the probability setting change / confirmation process for changing or confirming the probability setting value is executed (A1305).

The game control device 100 is an actuator such as a solenoid (for example, a large winning opening solenoid 39b) based on the output data set in various processes when the probability setting is not changed or the probability setting is not confirmed (the result of A1304 is “N”). Output processing for performing drive control of the solenoid and drive control of the LED (light emission control) is executed (A1306). When a launch prohibition signal is output in the process of step A1005 in the main process, the launch permission signal is output by performing this output process, and the launch permission signal can be set to the permitted state.

Next, the game control device 100 executes a payout command transmission process (A1307) that outputs commands set in the transmission buffer in various processes to the payout control device 200, and further, random number update process 1 (A1308) and random number update. Process 2 (A1309) is executed. After that, monitoring of whether or not there is a normal signal input from the starting port 1 switch 36a, the starting port 2 switch 37a, the winning port switch 35a, and the large winning port switch 39a, and monitoring of errors (the front frame and the glass frame are opened). The winning opening switch / status monitoring process is executed (A1310).

Next, the game control device 100 determines whether or not abnormal discharge of the game ball is occurring at the large winning opening (A1311). When the abnormal discharge occurring flag is set by the abnormal discharge monitoring process (A1318) described later, it can be determined that the abnormal discharge is occurring. When the abnormal discharge is occurring (the result of A1311 is “Y”), the processes after step A1315 are executed.

When the abnormal discharge is not occurring (the result of A1311 is “N”), the game control device 100 executes the special figure game process for performing the process related to the special figure variation display game (A1312). The details of the special figure game processing will be described later.

Next, the game control device 100 executes a normal map game process that performs a process related to the normal map variation display game (A1313). A segment LED editing process is executed (A1314), which is provided in the gaming machine 10 and drives a segment LED for displaying a special figure variation game and various information related to the game so as to display desired contents (A1314).

Further, the game control device 100 executes a magnet fraud monitoring process of checking the detection signal from the magnetic sensor switch 61 to determine whether or not there is an abnormality (A1315). Further, a radio wave fraud monitoring process (board radio wave fraud monitoring process) for checking the detection signal from the radio wave sensor 62 of the game board and determining whether or not there is an abnormality is executed (A1316).

After that, the game control device 100 executes a vibration fraud monitoring process for monitoring fraud due to vibration based on the input from the vibration sensor 65 (A1317). Next, the abnormal discharge monitoring process for monitoring the abnormal discharge from the large winning opening is executed (A1318). In the abnormal discharge monitoring process, the abnormal discharge of the special variable winning device 39 is based on the inputs from the large winning port switch 39a, the specific area switch 72 (V winning port switch), and the remaining ball discharge port switch 73 of the special variable winning device 39. Is monitored, and when an abnormal discharge occurs, the abnormal discharge occurring flag is set. The game ball that has passed through the large winning opening switch 39a of the special variable winning device 39 is discharged through the specific area switch 72 (V winning opening switch) or the remaining ball ejection port switch 73.

Next, the game control device 100 executes an external information editing process for setting signals to be output to various external devices in the output buffer (A1319). Then, the performance display monitor control process for controlling the display of the performance display device 152 is executed (A1320). After that, the timer interrupt processing is terminated.

When returning the timer interrupt processing, the interrupt disabled state is restored and the register bank specification is automatically restored. However, depending on the CPU used, interrupts are permitted after the external information editing processing. Processing or processing to return the designation of the register bank to register bank 0 may be performed.

[Probability setting change / confirmation process]
Next, the details of the probability setting change / confirmation process (A1305) in the timer interrupt process will be described. FIG. 6B is a flowchart showing the procedure of the probability setting change / confirmation process. In the probability setting change / confirmation process, the probability setting value can be changed or confirmed.

The game control device 100 first determines whether or not the probability set value is within the normal range (A2401). The probability set value here is stored in the probability set value area of the RAM 111c.

When the probability set value is within the normal range (the result of A2401 is “Y”), the game control device 100 sets the probability set value display data corresponding to the probability set value (A2402), and the performance display device 152 Is output via the driver 150 (A2404). When the probability set value is not within the normal range (the result of A2401 is "N"), the extinguishing data is set as the probability set value display data (A2403), and the data is output to the performance display device 152 via the driver 150 (A2404). ).

Here, the probability set value display data is display probability set value data displayed on the performance display device 152, and is stored in the probability set value display data area. In order to prevent confusion among people involved in the hall, if the probability setting values are different but the same jackpot probability (and small hit probability), the display probability setting value is associated with the jackpot probability (and small hit probability). May be the same. That is, the same display probability setting value may mean the same jackpot probability (and small hit probability).

Next, the game control device 100 updates -1 if the security signal control timer is not 0 (A2405). The security signal control timer is 128 ms (predetermined time) set in step A1034. Subsequently, the on-data of the security signal for notifying the external device (game hall internal management device (hall computer) or the like) of the abnormality is output to the external information terminal 71 (A1026). Here, other signals to the external information terminal 71 such as the jackpot signal are maintained in the off state.

After that, the game control device 100 determines whether or not the probability setting changing flag is set (A2407). When the probability setting changing flag is not set (the result of A2407 is "N"), that is, when the probability setting is being confirmed, the probability setting change / confirmation process is terminated without doing anything.

The game control device 100 is the first timer interrupt process after the power is turned on when the probability setting changing flag is set (the result of A2407 is "Y"), that is, when the probability setting is being changed. Whether or not it is determined (A2408). When it is the first timer interrupt process after the power is turned on (the result of A2408 is "Y"), the probability setting change / confirmation process is terminated. This is to prevent a situation in which the probability set value is unintentionally updated when the RAM initialization switch 112 is held down.

The game control device 100 determines whether or not there is an input of the RAM initialization switch 112 when it is not the first timer interrupt process after the power is turned on (the result of A2408 is “N”) (A2409). When there is no input from the RAM initialization switch (the result of A2409 is "N"), the probability setting change / confirmation process ends.

When the game control device 100 receives an input from the RAM initialization switch 112 (the result of A2409 is “Y”), the game control device 100 sets the work set value in the work set value area (in the RAM 111c or the register) in the range of 0 to 5. Along with updating by +1 the probability setting values 1 to 6 in the probability setting value area are updated by +1 according to the work setting value (A2410). As a result, the probability setting value in the probability setting value area is updated by 1 each time the RAM initialization switch 112 is operated. After that, the probability setting change / confirmation process is terminated. In the work setting value area (RAM111c or register) for storing the work setting value when the setting change mode is entered, a value corresponding to the probability setting value read from the probability setting value area (1 from the probability setting value). The subtracted value) may be stored.

In the above, every time the RAM initialization switch 112 is operated, the probability setting value in the probability setting value area is directly updated in response to the update of the work setting value, but the work setting value of the RAM 111c is updated. The probability setting value (work setting value) during the setting change is stored in the area, and when the setting key switch 93 is turned off and the setting change work is completed (the result of A1036 is "Y"), the work setting The value corresponding to the work setting value in the value area may be stored in the probability setting value area for the first time. In this way, when a power failure occurs during the setting change (the result of A1037 is "Y"), the probability setting value used for game control, effect control, etc. (probability setting stored in the probability setting value area) It is possible to prevent the situation where the value) is changed by an unintended value.

[Special game processing]
Next, the details of the special figure game processing (A1312) in the above-mentioned timer interrupt processing will be described. FIG. 7 is a flowchart showing the procedure of the special figure game processing. In the special figure game process, the inputs of the start port 1 switch 36a and the start port 2 switch 37a are monitored, the entire process related to the special figure variation display game is controlled, and the special figure display is set.

First, the game control device 100 executes a start port switch monitoring process for monitoring the winning of the start port 1 switch 36a and the start port 2 switch 37a (A2601). In the start port switch monitoring process, when a game ball wins a prize in the start winning opening 36 and the normal variable winning device 37 forming the second starting winning opening, various random numbers (big hit random numbers, etc.) are extracted and a special figure variation display based on the winning is displayed. Predetermine the game result based on the winning at the stage before the start of the game. The game result pre-judgment is performed. The details of the start port switch monitoring process will be described later.

Next, the game control device 100 executes the large winning opening switch monitoring process (A2602). In the large winning opening switch monitoring process, the detection of the game ball by the count switch 39a provided in the special variable winning device 39 is monitored. The details of the large winning opening switch monitoring process will be described later.

Next, the game control device 100 updates -1 (subtracts only 1) if the special figure game processing timer is not 0 (A2603). The special figure game processing timer is clocked by the interrupt cycle (4 msec) of the timer interrupt processing by updating -1. The minimum value of the special figure game processing timer is set to 0. Next, it is determined whether or not the special figure game processing timer is 0 (A2604). If the special figure game processing timer is not 0 (the result of A2604 is "N"), the process proceeds to step A2619.

The game control device 100 corresponds to the special figure game processing number when the special figure game processing timer is 0 (the result of A2604 is "Y"), that is, when the time is up or the time is already up. The special figure game sequence branch table to be referred to for branching to the process is set in the register (A2605). Further, the branch destination address of the process corresponding to the special figure game process number is acquired by using the special figure game sequence branch table (A2606). Subsequently, a subroutine call is made according to the special figure game processing number, and the game branch processing according to the special figure game processing number is executed (A2607).

When the game processing number is "0" in step A2607, the game control device 100 monitors the variation start of the special figure variation display game, sets the variation start of the special figure variation display game, sets the effect, and sets the effect. The special figure normal processing for setting the information necessary for performing the special figure changing processing is executed (A2608). The details of the special figure normal processing will be described later in FIG.

When the game processing number is "1" in step A2607, the game control device 100 sets the stop display time of the special figure, sets the information necessary for performing the processing during the special figure display, and the like. Figure The processing during fluctuation is executed (A2609). For example, in the special symbol changing process, necessary information such as a symbol stop command indicating the stop of the special symbol and the stop display time corresponding to the stop symbol pattern is set, and the process number "2" related to the special symbol display process is set. Set and save in the special figure game processing number area.

When the game processing number is "2" in step A2607, the game control device 100 sets a fanfare command according to the type of jackpot and sets each jackpot if the game result of the special figure variation display game is a jackpot. The special figure display processing for setting the fanfare time according to the large winning opening opening pattern, setting the information necessary for performing the fanfare / interval processing, and the like is executed (A2610). For example, in the special figure display processing, if the result of the special figure fluctuation display game is a big hit, the necessary information such as the fanfare command and the fanfare time is set, and the processing number "3" related to the fanfare / interval processing is set. Save to the special figure game processing number area. If the result of the special figure variation display game is not a big hit, the process number "0" related to the special figure normal processing is set and saved in the special figure game processing number area.

When the game processing number is "3" in step A2607, the game control device 100 sets the opening time of the large winning opening, updates the number of opening times, and performs processing during opening of the large winning opening. The fanfare / interval processing for setting and the like is executed (A2611). For example, in the fanfare / interval processing, necessary information such as the round command corresponding to the round of the round game to be executed and the opening time of the large winning opening is set, and the processing number "4" related to the processing during the opening of the large winning opening is set. Set and save in the special figure game processing number area.

When the game processing number is "4" in step A2607, the game control device 100 sets an interval command if the jackpot round is not the final round, while setting an ending command if it is the final round. The processing during the opening of the large winning opening is executed (A2612), in which information necessary for processing the remaining balls of the large winning opening is set. For example, in the processing during the opening of the large winning opening, necessary information such as an interval command and an ending command is set, a processing number "5" related to the processing of the remaining balls of the large winning opening is set, and the game is saved in the special figure game processing number area.

When the game processing number is "5" in step A2607, the game control device 100 sets a time for discharging the remaining balls in the big winning opening if the big hit round is the final round. The big winning opening remaining ball processing for setting the information necessary for performing the big hit end processing is executed (A2613). For example, in the processing during the opening of the large winning opening, if it is not the final round, the interval time is saved in the special figure game processing timer area, the processing number "3" related to the fanfare / interval processing is set, and the special figure game processing number area is set. Save. If it is the final round, the ending time is saved in the special figure game processing timer area, the processing number "6" related to the jackpot end processing is set, and the game is saved in the special figure game processing number area.

When the game processing number is "6" in step A2607, the game control device 100 executes a jackpot end process for setting information necessary for executing the special figure normal process (A2614). For example, in the jackpot end processing, the probability state after the jackpot state ends and the normal power support state after the jackpot state ends (the probability state after the jackpot state ends and the normal power support state after the jackpot state ends ( Set necessary information such as (time saving state), set the processing number "0" related to the special figure normal processing, and save it in the special figure game processing number area. The probability fluctuation judgment data includes the number of continuous games (number of time reduction fluctuations, number of electric support) of the probability state (high probability / low probability) after the end of the jackpot state and the normal power support state (time reduction state) after the end of the jackpot state. ) Information is included.

When the processing based on the special figure game processing number is completed, the game control device 100 prepares the special figure 1 fluctuation control table for controlling the fluctuation of the special figure 1 display 51 (A2615), and then the special figure 1 display. The symbol variation control process according to 51 is executed (A2616). Then, after preparing the special figure 2 fluctuation control table for controlling the fluctuation of the special figure 2 display 52 (A2617), the symbol fluctuation control process related to the special figure 2 display 52 is executed (A2618).

[Starting port switch monitoring process]
Next, the details of the start port switch monitoring process (A2601) in the special figure game process will be described. FIG. 8 is a flowchart showing the procedure of the start port switch monitoring process.

First, the game control device 100 prepares a winning monitoring table for the starting winning opening 36 (starting opening 1) (A2701), executes a hard random number acquisition process (A2702), and determines whether or not there is a winning in the starting winning opening 36. (A2703). If there is no winning in the starting winning opening 36 (the result of A2703 is "N"), the processes after step A2709 are executed. On the other hand, when there is a prize in the start winning opening 36 (the result of A2703 is "Y"), it is determined whether or not the special figure time is shortened (during the normal electric support state) (A2704).

When it is determined that the game control device 100 is not in the special time reduction period (during the normal power support state) (the result of A2704 is "N"), the game control device 100 executes the processes after step A2707. On the other hand, when the special figure time is shortened (in the normal electric support state) (the result of A2704 is "Y"), the right-handed instruction notification command is prepared as an effect command (A2705), and the effect command setting process is executed (A2705). A2706). In the effect command setting process, the effect command is written in the serial transmission buffer, and the effect command is transmitted to the effect control device 300.

That is, in the normal electric support state (time saving state), the right-handed instruction notification command is prepared and the effect command setting process is executed regardless of the probability state (high probability state / low probability state) of the variable display game. .. In the case of the present embodiment, it is easier to win a prize in the starting winning opening 36 by hitting the left side, and the normal variable winning device 37 must be hit by the right side to win a prize. In addition, the game ball does not pass through the normal drawing start gate 34 unless it is hit right. Therefore, in the normal power support state (time saving state), right-handed is more advantageous than left-handed, but when there is a prize in the start winning opening 36 during the normal power support state (that is, during the normal power support state). When left-handed), a right-handed instruction notification command is transmitted to the effect control device 300, and the effect control device 300 executes a notification (warning) instructing right-handed by the display device 41 or the like.

Next, the game control device 100 prepares a table for setting the information of the hold by the start winning opening 36 (starting opening 1) (A2707), and then executes the special figure starting opening switch common process (A2708). Then, a winning monitoring table for the second starting winning opening (normal variable winning device 37) is prepared (A2709), a hard random number acquisition process is executed (A2710), and whether or not there is a winning in the second starting winning opening is determined. Judgment (A2711). If there is no winning in the second starting winning opening (the result of A2711 is "N"), the starting opening switch monitoring process is terminated.

On the other hand, in the game control device 100, when there is a prize in the second start winning opening (the result of A2711 is "Y"), whether or not the ordinary electric accessory (ordinary variable winning device 37) is operating. That is, it is determined whether or not the normal variable winning device 37 is activated and the game ball is in the open state in which the winning can be won (A2712). When the normal electric accessory is in operation (the result of A2712 is "Y"), the process proceeds to step A2714.

On the other hand, when the normal electric accessory is not in operation (the result of A2712 is "N"), the game control device 100 determines whether or not a fraudulent electric service is occurring (A2713). When the number of fraudulent prizes to the ordinary variable winning device 37 is equal to or greater than the number of fraudulent occurrence determinations (for example, 5), it is determined that the Fuden fraud is occurring. In the normal variable winning device 37, the game ball cannot be won in the closed state, and the game ball can be won only in the open state. Therefore, if a game ball wins in the closed state, it means that some abnormality or fraud has occurred, and if there is a game ball that wins in such a closed state, the number is counted as the number of fraudulent prizes. Then, when the number of fraudulent winnings counted in this way is equal to or greater than the predetermined number of fraud occurrence determinations (upper limit value), it is determined that fraud has occurred.

The game control device 100 prepares a table for setting information on hold by the second start winning opening (normal variable winning device 37) when the normal electric fraud is not occurring (the result of A2713 is "N") (A2714). , The special figure start port switch common process is executed (A2715), and the start port switch monitoring process is terminated. Further, even when it is determined in A2713 that an illegal operation is occurring (the result of A2713 is "Y"), the start port switch monitoring process is terminated. That is, the second start memory is prevented from being generated any more.

[Special figure start port switch common processing]
Next, the details of the special figure start port switch common process (A2708, A2715) in the start port switch monitoring process will be described. FIG. 9 is a flowchart showing a procedure for common processing of the special drawing start port switch. The special figure start port switch common process is a process that is commonly performed for each input when the start port 1 switch 36a and the start port 2 switch 37a are input.

First, the game control device 100 outputs information regarding the number of winnings to the monitoring target start port switch among the start port 1 switch 36a and the start port 2 switch 37a to the external management device of the game machine 10. The start port signal output number of times is loaded (A2901), the loaded value is updated by +1 (A2902), and it is determined whether or not the output number of times overflows (A2903). If the number of outputs does not overflow (the result of A2903 is "N"), the updated value is saved in the start port signal output count area of the RWM (A2904), and the process proceeds to step A2905. On the other hand, when the number of outputs overflows (the result of A2903 is "Y"), the process proceeds to step A2905. In the present embodiment, a value from "0" to "255" can be stored in the start port signal output frequency region. Then, when the loaded value is "255", the updated value becomes "0" by +1 update, and it is configured to determine that the number of outputs overflows.

Next, in the game control device 100, among the start port 1 switch 36a and the start port 2 switch 37a, whether or not the number of special figure reservations (start memory number) to be updated corresponding to the start port switch to be monitored is less than the upper limit value. (A2905). If the number of special figure reservations to be updated is not less than the upper limit value (the result of A2905 is "N"), the special figure start port switch common processing is terminated. If the number of special figure reservations to be updated is less than the upper limit (the result of A2905 is "Y"), the number of special figure reservations to be updated (special figure 1 hold number or special figure 2 hold number) is updated by +1. Then (A2906), the target start opening winning flag is saved (A2907).

Next, the game control device 100 calculates the address of the start port switch to be monitored and the random number storage area corresponding to the number of reserved special figures (A2908), and stores the jackpot random number prepared in step A2805 in the RWM jackpot random number. Save to the area (A2909). Next, the jackpot symbol random number of the start port switch to be monitored is extracted, prepared (A2910), and saved in the jackpot symbol random number storage area of the RWM (A2911).

Next, the game control device 100 saves the fluctuation pattern random numbers 1 to 3 in the corresponding fluctuation pattern random number storage area of the RWM (A2912), and executes the special figure reservation information determination process (A2913). In the special figure hold information determination process, the look-ahead stop symbol command corresponding to the saved jackpot random number or the stop symbol information based on the jackpot symbol random number, and the first half variation number based on the saved variation pattern random numbers 1 to 3 (number of variation before reach). And the look-ahead fluctuation pattern command corresponding to the latter half fluctuation number (number of fluctuation after reach) is set as an effect command. Then, the start port switch to be monitored and the decorative special figure hold number command corresponding to the special figure hold number are prepared as the effect command (A2914), and the effect command setting process (A2915) is executed to be common to the special figure start port switch. End the process.

Here, the game control device 100 (RAM111c) extracts a predetermined random number based on the inflow of the game ball into the start winning opening 36 and the starting winning area of the normal variable winning device 37, and becomes the execution right of the variable display game. It serves as a start storage means for storing a predetermined number as a start memory up to an upper limit. Further, the start storage means (game control device 100) uses various random value values extracted based on the winning of the game ball to the first start winning opening (starting winning opening 36) as the first starting memory up to a predetermined number. It is stored, and various random value values extracted based on the winning of the game ball to the second starting winning opening (normal variable winning device 37) are stored as the second starting memory up to a predetermined number.

[Special figure normal processing]
Next, the details of the special figure normal processing (A2608) in the special figure game processing will be described. FIG. 10 is a flowchart showing the procedure of the special figure normal processing.

The game control device 100 first determines whether or not the special figure 2 hold number (second start storage number) is 0 (A3201). When the special figure 2 hold number is 0 (the result of A3201 is “Y”), it is determined whether or not the special figure 1 hold number (first start storage number) is 0 (A3206). Then, when the number of reserved special figures 1 is 0 (the result of A3206 is "Y"), it is determined whether or not the customer waiting demo has started (A3211), and when the customer waiting demo has not started (A3211). The result of (A3212) is that the customer waiting demo flag area is set to the customer waiting demo flag area (A3212).

Subsequently, the game control device 100 prepares a customer waiting demo command as an effect command (A3213), performs an effect command setting process (A3214), and proceeds to the process of step A3215. On the other hand, in step A3211, when the customer waiting demo has already started (the result of A3211 is "Y"), "0" related to the special figure normal processing is set as the processing number (A3215), and the special figure game processing number. The processing number is saved in the area (A3216), and the variable symbol determination flag area is cleared (A3217). Then, the flag is saved during the fraud monitoring period in the large winning opening fraud monitoring period flag area (A3218), and the special figure normal processing is terminated.

Further, when the special figure 2 hold number is not 0 (the result of A3201 is "N"), the game control device 100 executes the special figure 2 fluctuation start process (A3202), and the decorative feature corresponding to the special figure 2 hold number. The figure hold number command (decorative special figure 2 hold number command) is prepared as an effect command (A3203), and the effect command setting process is executed (A3204). Then, the process transition setting process during the change of the special figure 2 of the special figure 2 is executed (A3205), and the normal process of the special figure is terminated.

Further, when the special figure 1 hold number is not 0 (the result of A3206 is "N"), the game control device 100 executes the special figure 1 fluctuation start process (A3207), and the decorative feature corresponding to the special figure 1 hold number. The figure hold number command (decorative special figure 1 hold number command) is prepared as an effect command (A3208), and the effect command setting process is executed (A3209). Then, the process transition setting process during the change of the special figure of the special figure 1 is executed (A3210), and the normal process of the special figure is terminated.

In this way, by checking the special figure 2 hold number before the check of the special figure 1 hold number, the special figure 2 fluctuation start process (A3202) is executed when the special figure 2 hold number is not 0. The Rukoto. That is, the special figure 2 variable display game is executed in preference to the special figure 1 variable display game. That is, when the game control device 100 has a second start memory in the second start storage means (game control device 100), the variation display game based on the second start memory is displayed as a variation display based on the first start memory. It is a priority control means that is executed with priority over the game.

[Special Figure 1 Fluctuation Start Processing]
Next, the details of the special figure 1 fluctuation start processing (A3207) in the special figure normal processing will be described. FIG. 11 is a flowchart showing the procedure of the special figure 1 fluctuation start processing. The special figure 1 variation start process is a process performed at the start of the special figure 1 variation display game.

The game control device 100 saves the special figure 1 fluctuation flag indicating the type of the special figure fluctuation display game to be executed (here, special figure 1) in the fluctuation symbol discrimination area (A3401). Subsequently, the jackpot flag 1 setting process for setting the jackpot flag 1 deviation information and the jackpot information for determining whether or not the special figure 1 variable display game is a jackpot is executed (A3402). The details of the jackpot flag 1 setting process will be described later.

Next, the game control device 100 executes the special figure 1 stop symbol setting process related to the setting of the special figure 1 stop symbol (symbol information) related to the special figure 1 variation display game (A3403). In the special figure 1 stop symbol setting process, the stop symbol number at the time of a miss or a big hit and the missed stop symbol pattern or the big hit stop symbol pattern corresponding to the stop symbol number are saved. Then, a decorative special figure command corresponding to the stop symbol pattern is prepared as an effect command, and the effect command setting process is executed. In addition, the number of rounds information (round upper limit value) corresponding to the stop symbol number and the probability fluctuation determination data corresponding to the stop symbol number are acquired and saved.

Further, the game control device 100 executes a special figure information setting process for setting special figure information which is a parameter for setting a fluctuation pattern (A3404).

Subsequently, the game control device 100 prepares a special figure 1 variation pattern setting information table, which is a table in which information for referring to various information regarding the setting of the variation pattern of the special figure 1 variation display game is set (A3405). ).

After that, the game control device 100 executes a variation pattern setting process for setting a variation pattern (variation pattern number), which is a variation mode in the special figure 1 variation display game (A3406). Next, the game control device 100 executes the variation start information setting process (A3407) for setting the variation start information of the special figure 1 variation display game, and ends the special figure 1 variation start process. In the fluctuation start information setting process, the fluctuation time value corresponding to the fluctuation pattern (variation pattern number) is acquired and saved in the special figure game processing timer area. Then, a variation command (MODE, ACTION) corresponding to the variation pattern number is prepared as an effect command, and the effect command setting process is performed. Further, in the fluctuation start information setting process, the number of special figure reservations related to the special figure type (special figure 1 or special figure 2) of the special figure fluctuation display game to be started is updated by -1 (decreased by 1).

[Special figure 2 fluctuation start processing]
Next, the details of the special figure 2 fluctuation start processing (A3202) in the special figure normal processing will be described. FIG. 12 is a flowchart showing the procedure of the special figure 2 fluctuation start processing. The special figure 2 variation start process is a process performed at the start of the special figure 2 variation display game, and is the same process as the process in the special figure 1 variation start process shown in FIG. 11 for the second start memory. It is something to do.

First, the game control device 100 saves the special figure 2 fluctuation flag indicating the type of the special figure fluctuation display game to be executed (here, special figure 2) in the fluctuation symbol discrimination area (A3501). Subsequently, the jackpot flag 2 setting process for setting the jackpot flag 2 deviation information and the jackpot information for determining whether or not the special figure 2 variable display game is a jackpot is executed (A3502).

Next, the game control device 100 executes the special figure 2 stop symbol setting process related to the setting of the special figure 2 stop symbol (symbol information) related to the special figure 2 variation display game (A3503). Further, the special figure information setting process for setting the special figure information which is a parameter for setting the fluctuation pattern is executed (A3504). Subsequently, a special figure 2 variation pattern setting information table, which is a table in which information for referring to various information regarding the setting of the variation pattern of the special figure 2 variation display game is set, is prepared (A3505).

After that, the game control device 100 executes a variation pattern setting process for setting the variation pattern of the special figure 2 variation display game (A3506). Finally, the variation start information setting process for setting the variation start information of the special figure 2 variation display game is executed (A3507), and the special figure 2 variation start process is completed.

[Big hit flag 1 setting process]
Next, the details of the jackpot flag 1 setting process (A3402) in the special figure 1 fluctuation start process will be described. FIG. 13 is a flowchart showing the procedure of the jackpot flag 1 setting process.

The game control device 100 first saves the deviation information in the jackpot flag 1 area (A3601). Next, the jackpot random number is loaded from the special figure 1 jackpot random number storage area (for the number of hold 1) of RWM, prepared (A3602), and the special figure 1 jackpot random number storage area (for the number of hold 1) is cleared to 0. (A3603). The number of hold 1 is an area for storing information (random numbers, etc.) about the special figure start memory in which the digestion order is the earliest (here, the earliest in the special figure 1). After that, a jackpot determination process for determining whether or not the prepared jackpot random number value is a jackpot according to whether or not it matches the jackpot determination value is executed (A3604).

When the determination result of the jackpot determination process (A3604) is a jackpot (the result of A3605 is "Y"), the game control device 100 overwrites the jackpot information in the jackpot flag 1 area in which the loss information is saved in step A3601. Save (A3606) and end the jackpot flag 1 setting process. On the other hand, when the determination result of the jackpot determination process (A3605) is not a jackpot (the result of A3605 is "N"), the jackpot flag 1 setting process is terminated. As described above, in the present embodiment, the result of the special figure 1 variable display game is either "big hit" or "missing".

[Big hit flag 2 setting process]
Next, the details of the jackpot flag 2 setting process (A3502) in the special figure 2 fluctuation start process will be described. FIG. 14 is a flowchart showing the procedure of the jackpot flag 2 setting process. In this process, the same process as the process in the jackpot flag 1 setting process shown in FIG. 13 is performed for the second start memory.

The game control device 100 first saves the deviation information in the jackpot flag 2 area (A3701). Next, the jackpot random number is loaded from the special figure 2 big hit random number storage area (for the number of hold 1) of RWM, prepared (A3702), and the special figure 2 big hit random number storage area (for the number of hold 1) is cleared to 0. (A3703). The number of hold 1 is an area for storing information (random numbers, etc.) about the special figure start memory in which the digestion order is the earliest (here, the earliest in the special figure 2). After that, a jackpot determination process for determining whether or not the prepared jackpot random number value is a jackpot according to whether or not it matches the jackpot determination value is executed (A3704).

When the determination result of the jackpot determination process (A3704) is a jackpot (the result of A3705 is "Y"), the game control device 100 overwrites the jackpot information in the jackpot flag 2 area where the loss information is saved in step A3701. Save (A3706) and end the jackpot flag 2 setting process. On the other hand, when the determination result of the jackpot determination process (A3704) is not a jackpot (the result of A3705 is "N"), the jackpot flag 2 setting process is terminated while saving the information that the jackpot flag 2 is out of alignment. As described above, in the present embodiment, the result of the special figure 2 variable display game is either "big hit" or "missing".

[Big hit judgment process]
Next, the details of the jackpot determination processing (A3605, A3704) in the jackpot flag 1 setting processing, the jackpot flag 2 setting processing, and the like will be described. FIG. 15 is a flowchart showing the procedure of the jackpot determination process. The jackpot determination process is a process common to the jackpot determination process in other processes executed during the timer interrupt process, and is also executed in step A3004 of the special figure hold information determination process.

The game control device 100 first sets a lower limit determination value of the jackpot determination value (A3801), and determines whether or not the value of the target jackpot random number is less than the lower limit determination value (A3802). The big hit means that the big hit random number matches the big hit determination value. The jackpot judgment value is a plurality of consecutive values, and the jackpot random number is equal to or higher than the lower limit judgment value which is the lower limit value of the jackpot judgment value and is equal to or less than the upper limit judgment value which is the upper limit value of the jackpot judgment value. , It is judged to be a big hit.

When the value of the target jackpot random number is less than the lower limit determination value (the result of A3802 is "Y"), the game control device 100 sets a deviation (other than the jackpot) as the determination result (A3807), and ends the jackpot determination process. do.

Further, when the value of the jackpot random number is not less than the lower limit determination value (the result of A3802 is "N"), the game control device 100 determines whether or not the jackpot occurrence probability is in the high probability state (probability variation state). (A3803). Then, in the case of a high probability state (the result of A3803 is "Y"), the upper limit determination value in the high probability is set (A3804). On the other hand, when it is not in the high probability state (the result of A3803 is "N"), the upper limit determination value in the low probability is set (A3805).

When the upper limit determination value of the value of the jackpot random number is set, the game control device 100 determines whether or not the value of the target jackpot random number is larger than the upper limit determination value (A3806). When the value of the jackpot random number is larger than the upper limit determination value (the result of A3806 is "Y"), a deviation (other than the jackpot) is set as the determination result (A3807). On the other hand, when the value of the jackpot random number is not larger than the upper limit determination value (the result of A3806 is "N"), the jackpot is set as the determination result (A3808). When the determination result is set, the jackpot determination process ends.

[Special figure information setting process]
Next, the details of the special figure information setting processing (A3404, A3504) in the special figure 1 fluctuation start processing and the special figure 2 fluctuation start processing will be described. FIG. 16 is a flowchart showing the procedure of the special figure information setting process. In the present embodiment, the probability state (low probability / high probability, with / without time reduction) does not directly affect the distribution of fluctuations, and the effect mode managed by the game control device 100 affects the distribution of fluctuations. As the production mode, one production mode is set from a plurality of production modes according to the probability state, the presence / absence of the time saving state, the progress status of the special figure variation display game, and the like.

First, the game control device 100 sets the first half variation group selection pointer table (A4201) and acquires the first half variation group selection pointer corresponding to the effect mode information (A4202). Next, the first half variable group selection offset table is set (A4203), and the offset data corresponding to the target special figure hold number (special figure 1 hold number or special figure 2 hold number) and the stop symbol pattern is acquired (A4204). ..

Next, the game control device 100 adds the first half variable group selection pointer and the offset data (A4205), and saves the added value in the variable distribution information 1 area (A4206). As a result, the variable distribution information 1 generated based on the type of stopped symbol, the number of holdings, and the effect mode is saved in the variable distribution information 1 area. This fluctuation distribution information 1 is a table pointer for distributing the first half fluctuation (variation mode before the start of reach), and is later used to select a fluctuation group. However, although it depends on the specifications of the model, when the number of holds is large, the fluctuation time is shortened only in the case of outliers. Therefore, in cases other than outliers, the number of holdes does not affect the distribution of fluctuations in the first half as a result. The fluctuation group includes a plurality of fluctuation patterns, and when determining the fluctuation pattern, the fluctuation group is first selected, and then one fluctuation pattern is selected from the fluctuation groups. ing.

Next, the game control device 100 sets the latter half variation group selection pointer table (A4207) and acquires the latter half variation group selection pointer corresponding to the effect mode information (A4208). Next, the latter half variable group selection offset table is set (A4209), and the offset data corresponding to the target special figure hold number and the stop symbol pattern is acquired (A4210).

Next, the game control device 100 adds the latter half variation group selection pointer and the offset data (A4211), saves the added value in the variation distribution information 2 area (A4212), and sets the special figure information. End the process. As a result, the variable distribution information 2 generated based on the type of stopped symbol, the number of holdings, and the effect mode is saved in the variable distribution information 2 area. The fluctuation distribution information 2 is a table pointer for distributing the latter half fluctuation (type of reach (including no reach)), and is later used to select a fluctuation group. However, the reach occurrence rate changes according to the number of holds only in the case of a loss (the reach occurrence rate decreases when the number of holds is large), so in cases other than the loss, the number of holds will be distributed to the latter half fluctuation as a result. Does not affect.

[Variation pattern setting process]
Next, the details of the fluctuation pattern setting processing (A3406, A3506) in the special figure 1 fluctuation start processing and the special drawing 2 fluctuation start processing will be described. FIG. 17 is a flowchart showing the procedure of the fluctuation pattern setting process.

The fluctuation patterns are the first half fluctuation pattern, which is the fluctuation mode from the start of the special figure fluctuation display game to the reach state, and the second half fluctuation pattern, which is the fluctuation mode from the reach state to the end of the special figure fluctuation display game. The latter half fluctuation pattern is set first, and then the first half fluctuation pattern is set.

The game control device 100 first sets a variable group selection address table (A4301), acquires the address of the latter half variable group table corresponding to the variable distribution information 2 (A4302), prepares the address, and prepares the target variable pattern random number. The variation pattern random number 1 is loaded and prepared from the 1 storage area (for the number of reservations 1) (A4303). In the present embodiment, the structure of the latter half variable group table is different between the one for hitting and the one for hitting. Specifically, the hit size is 1 byte size, and the loss size is 2 byte size. Since the rate of occurrence of hits is lower than the rate of occurrence of loss and even one byte is sufficient, the size of hits is one byte from the viewpoint of saving data capacity. Therefore, at the time of hitting, only the lower value of the 2-byte variation pattern random number 1 is used. In addition, the rate of occurrence of loss is higher than the rate of occurrence of hit, and in order to make more diverse effects appear, the size for loss is 2 bytes.

Then, the game control device 100 determines whether the result of the special figure variation display game is out of order (A4304), and if it is out of order (the result of A4304 is “Y”), performs a 2-byte distribution process (A4305). Then, the process proceeds to step A4307. If it is not out of alignment (the result of A4304 is "N"), the sorting process (A4306) is performed, and the process proceeds to the process of step A4307.

Next, the game control device 100 acquires and prepares (A4307) the address of the latter half variation selection table (second half variation pattern selection table) obtained as a result of the distribution, and holds the target variation pattern random number 2 storage area (hold). Load the variation pattern random number 2 from (for equation 1) and prepare it (A4308). Then, the distribution process is executed (A4309), the latter half variable number obtained as a result of the distribution is acquired, and the latter half variable number area is saved (A4310). By this process, the latter half fluctuation pattern is set.

Next, the game control device 100 sets the first half fluctuation group table (A4311), and calculates the table selection pointer based on the fluctuation distribution information 1 and the second half fluctuation number (A4312). Then, the address of the first half variation selection table (first half variation pattern selection table) corresponding to the calculated pointer is acquired and prepared (A4313), and the variation pattern random number is generated from the target variation pattern random number 3 storage area (for the number of hold 1). Load 3 and prepare (A4314). After that, the distribution process (A4315) is performed, the first half variation number obtained as a result of the distribution is acquired, saved in the first half variation number area (A4316), and the variation pattern setting process is completed. By this process, the first half fluctuation pattern is set, and the fluctuation pattern of the special figure fluctuation display game is set. That is, the game control device 100 serves as a variation pattern setting means for setting a variation pattern, which is an execution mode of the game, from a plurality of of them.

[2-byte distribution processing]
Next, the details of the 2-byte distribution process (A4305) in the variation pattern setting process will be described. FIG. 18 is a flowchart showing the procedure of the 2-byte distribution process. The 2-byte distribution process is a process for selecting the latter half variation selection table of the special figure variation display game from the latter half variation group table based on the variation pattern random number 1.

The game control device 100 first checks whether the first data of the selection table (second half variation group table prepared in A4302) is a code without distribution (that is, "0") (A4401). Here, the latter half fluctuation group table stores a predetermined distribution value in association with at least one latter half fluctuation selection table, but the latter half that defines only the latter half fluctuation selection table in which the latter half fluctuation pattern is “no reach”. In the variable group table (for example, some variable group tables when the result is out of order), there is no need for distribution, so the distribution value "0", that is, the code without distribution is specified at the beginning. ..

Then, when the first data in the selection table (second half variation group table) is a code without distribution (the result of A4402 is "Y"), the game control device 100 updates to the address of the data corresponding to the distribution result. Then (A4407), the 2-byte distribution process is completed. On the other hand, when the first data of the selection table (second half variable group table) is not a code without distribution (the result of A4402 is "N"), the first distribution specified in the selection table (second half fluctuation group table) is specified. Get the value (A4403).

Subsequently, a new random number value is calculated by subtracting the distribution value acquired in step A4403 from the random number value (value of fluctuation pattern random number 1) prepared in step A4303 (A4404), and the calculated new random number value is calculated. Is less than "0" (A4405). Then, when the new random number value is not smaller than "0" (the result of A4405 is "N"), after updating to the address of the next distribution value (A4406), the process proceeds to step A4403, which is followed by the process. Subsequent processing is performed. That is, a new disorder is obtained by acquiring the distribution value specified next in the selection table (second half fluctuation group table) (A4403), and then subtracting the distribution value from the random number value determined in the previous step A4405. A numerical value is calculated (A4404), and it is determined whether or not the calculated new random number value is smaller than "0" (A4405).

The above processing is executed until it is determined in step A4405 that the new random number value is smaller than "0" (the result of A4405 is "Y"). As a result, any one of the latter half variable selection tables is selected from at least one latter half variable selection table defined in the selection table (second half variable group table). Then, in step A4405, when it is determined that the new random number value is smaller than "0" (the result of A4405 is "Y"), the data is updated to the address of the data corresponding to the sorted result (A4407), and 2 bytes. The sorting process ends.

[Distribution processing]
Next, the details of the distribution processing (A4306, A4309, A4315) in the fluctuation pattern setting processing will be described. FIG. 19 is a flowchart showing the procedure of the sorting process. In the distribution process, the second half fluctuation pattern of the special figure fluctuation display game is selected from the second half fluctuation selection table (second half fluctuation pattern group) based on the fluctuation pattern random number 2, or the first half fluctuation selection table (first half fluctuation selection table) is selected based on the fluctuation pattern random number 3. This is a process for selecting the first half fluctuation pattern of the special figure fluctuation display game from the first half fluctuation pattern group).

First, the game control device 100 starts with the head data of the target selection table (the second half variation group table prepared in A4302, the second half variation selection table prepared in step A4307, or the first half variation selection table prepared in step A4313). Checks if is an unsorted code (ie "0") (A4501). Here, the second half fluctuation group table, the second half fluctuation selection table, and the first half fluctuation selection table are predetermined in association with at least one second half fluctuation selection table, the second half fluctuation pattern (second half fluctuation number), and the first half fluctuation pattern (first half fluctuation number). In the case of a selection table that stores the distribution value of, but does not need to be distributed, the distribution value "0", that is, the code without distribution is specified at the beginning.

Then, in the game control device 100, when the first data of the target selection table (second half variation group table, second half variation selection table, first half variation selection table) is a code without distribution (the result of A4502 is "Y"), The data address corresponding to the distribution result is updated (A4507), and the distribution process is completed. On the other hand, if the first data of the target selection table (second half fluctuation group table, second half fluctuation selection table, first half fluctuation selection table) is not a code without distribution (the result of A4502 is "N"), the target selection table (second half fluctuation). The first distribution value specified in the group table, the second half fluctuation selection table, and the first half fluctuation selection table) is acquired (A4503).

Subsequently, the game control device 100 subtracts the distribution value acquired in step A4503 from the random number values (values of the fluctuation pattern random number 1, the fluctuation pattern random number 2, and the fluctuation pattern random number 3) prepared in steps A4303, A4308, and A4314. Then, a new random number value is calculated (A4504), and it is determined whether the calculated new random number value is smaller than "0" (A4505). Then, when the new random number value is not smaller than "0" (the result of A4505 is "N"), after updating to the address of the next distribution value (A4506), the process proceeds to step A4503, which is followed by the process. Subsequent processing is performed.

That is, the distribution value specified next in the target selection table (second half fluctuation group table, second half fluctuation selection table, first half fluctuation selection table) is acquired (A4503), and then the randomness determined in the previous step A4505 is acquired. A new random number value is calculated by subtracting the distribution value from the numerical value (A4504), and it is determined whether or not the calculated new random number value is smaller than "0" (A4505). The above processing is executed until it is determined in step A4505 that the new random number value is smaller than "0" (the result of A4505 is "Y"). As a result, at least one second half fluctuation selection table, second half fluctuation pattern (second half fluctuation number), and first half fluctuation pattern (first half) specified in the target selection table (second half fluctuation group table, second half fluctuation selection table, first half fluctuation selection table) One of the latter half fluctuation selection tables, the second half fluctuation pattern (second half fluctuation number), and the first half fluctuation pattern (first half fluctuation number) is selected from the fluctuation number).

Then, when the game control device 100 determines in step A4505 that the new random number value is smaller than "0" (the result of A4505 is "Y"), the game control device 100 updates the address of the data corresponding to the distributed result. (A4507), the sorting process is completed.

[Variation start information setting process]
Next, the details of the fluctuation start information setting processing (A3407, A3507) in the special figure 1 fluctuation start processing and the special drawing 2 fluctuation start processing will be described. FIG. 20 is a flowchart showing the procedure of the fluctuation start information setting process.

The game control device 100 first clears the random number storage area of the target variation pattern random numbers 1 to 3 (A4601). Next, the first half fluctuation time value table is set (A4602), and the first half fluctuation time value corresponding to the first half fluctuation number is acquired (A4603). Further, the latter half fluctuation time value table is set (A4604), and the latter half fluctuation time value corresponding to the latter half fluctuation number is acquired (A4605).

Then, the game control device 100 adds the first half fluctuation time value and the second half fluctuation time value (A4606), and saves the added value in the special figure game processing timer area (A4607). After that, the variation command (MODE) corresponding to the first half variation number is prepared (A4608), the variation command (ACTION) corresponding to the second half variation number is prepared as an effect command (A4609), and the effect command setting process is performed (A4610). ). Next, the number of special symbols held corresponding to the variable symbol discrimination flag is updated by -1 (A4611), and the address of the random number storage area corresponding to the variable symbol discrimination flag is set (A4612). Next, the random number storage area is shifted (A4613), the free area after the shift is cleared (A4614), and the fluctuation start information setting process is completed.

By the above processing, the information regarding the start of the special figure variation display game is set. That is, the game control device 100 serves as a determination means for determining various random value values stored in the start storage means (game control device 100). Further, the game control device 100 serves as a variation pattern determining means capable of determining the variation pattern of the identification information to be executed in the variation display game based on the determination information of the start memory.

Then, the information regarding the start of the special figure variation display game is later transmitted to the effect control device 300, and the effect control device 300 responds to the determined variation pattern based on the reception of the information regarding the start of the special figure variation display game. Decorate special figure variable display Set detailed production contents in the game. Information on the start of these special figure variation display games includes a decorative special figure hold number command including information on the number of start memories (holds), a decorative special figure command including information on a stop symbol, and a variation of the special figure variation display game. A variation command including information about the pattern and a stop information command including information about the extension of the stop time are mentioned, and the commands are transmitted to the effect control device 300 in this order. In particular, by transmitting the decorative special figure command before the variable command, the processing in the effect control device 300 can be efficiently advanced.

[Public map game processing]
Next, the details of the normal map game processing (A1310) in the timer interrupt processing will be described. FIG. 21 is a flowchart showing the procedure of the normal figure game processing. In the normal map game process, the input of the gate switch 34a is monitored, the entire process related to the normal map variation display game is controlled, and the normal map display is set.

First, the game control device 100 executes a gate switch monitoring process for monitoring the input from the gate switch 34a (A7601).

Subsequently, the game control device 100 executes a general electric winning switch monitoring process for monitoring the input from the start port 2 switch 37a (A7602).

Next, the game control device 100 updates -1 (subtracts only 1) if the normal game processing timer is not 0 (A7603). The minimum value of the normal figure game processing timer is set to 0. Then, the game control device 100 determines whether or not the value of the normal figure game processing timer has become 0 (A7604).

When the value of the normal figure game processing timer is 0 (the result of A7604 is "Y"), that is, when the time is up or the time is already up, the game control device 100 is set to the normal figure game processing number. A general-purpose game sequence branch table to be referred to for branching to the corresponding process is set in the register (A7605).

Further, the game control device 100 acquires the branch destination address of the process corresponding to the game process number of the game based on the set table of the game sequence of the game (A7606). Then, a subroutine call is made based on the game processing number of the game, and the game branching process according to the game processing number of the game is executed (A7607).

When the game processing number is "0" in step A7607, the game control device 100 monitors the fluctuation start of the normal map variation display game, sets the fluctuation start of the normal map variation display game, sets the effect, and sets the effect. The normal processing is executed (A7608), in which information necessary for performing the processing during the fluctuation of the normal map is set. The details of the normal processing will be described later in FIG. 22.

Further, when the game processing number is "1" in step A7607, the game control device 100 executes the normal map changing process for setting the information necessary for performing the normal map display processing (the game control device 100). A7609). For example, in the normal map variable processing, in order to shift to the normal map display processing, "2" is set as the game processing number and saved in the normal map game processing number area, and the normal map display time is set to the normal map game. Save to the processing timer area.

Further, in the game control device 100, when the game processing number is "2" in step A7607, if the result of the normal map variation display game is a hit, the normal power according to whether or not the time is shortened. The normal map display processing is executed (A7610), in which the opening time is set, the information necessary for performing the normal drawing per-time processing is set, and the like. For example, in the normal map display process, when the result of the normal map variable display game is a hit, "3" is set as the game process number and the normal map game process number area is set in order to shift to the normal map hit process. On the other hand, in the case of a loss, in order to shift to the normal game processing number, "0" is set as the game processing number and the game is saved in the normal game processing number area.

Further, when the game processing number is "3" in step A7607, the game control device 100 normally continues the processing during the normal drawing or sets the information necessary for performing the normal electric remaining ball processing. The middle process per figure is executed (A7611). For example, in the normal processing per figure, after setting to open the normal variable winning device 37 a predetermined number of times, "4" is set as the game processing number in order to shift to the normal electric remaining ball processing. Save to the normal game processing number area.

Further, when the game processing number is "4" in step A7607, the game control device 100 executes the normal electric remaining ball processing for setting the information necessary for performing the normal drawing end processing (A7612). ). For example, in the Fuden remaining ball processing, in order to shift to the Fuzu hit end processing, "5" is set as the game processing number and saved in the Fuzu game processing number area, and the Fuzu ending time is set to the Fuzu game. Save to the processing timer area.

Further, when the game processing number is "5" in step A7607, the game control device 100 executes the normal drawing end processing for setting the information necessary for performing the normal drawing normal processing (A7608). (A7613). For example, in the normal figure per end process, "0" is set as the game process number and saved in the normal figure game process number area in order to shift to the normal figure normal process.

After that, the game control device 100 prepares a normal map fluctuation control table for controlling the fluctuation of the normal symbol by the normal map display 53 (A7614). After that, the symbol fluctuation control process related to the control of the fluctuation of the normal symbol by the normal symbol display 53 is executed (A7615), and the normal symbol game process is terminated.

On the other hand, the game control device 100 executes the processing after step A7614 when the value of the normal figure game processing timer is not 0 (the result of A7604 is "N"), that is, when the time is not up.

[Usually processing]
Next, the details of the normal drawing normal processing (A7608) in the normal drawing game processing will be described. FIG. 22 is a flowchart showing a procedure for normal processing.

The game control device 100 first determines whether or not the number of reserved figures is 0 (A7901). When the number of holdings of the normal figure is 0 (the result of A7901 is "Y"), the normal process transition setting process 1 of the normal figure is executed (A7923), and the normal process of the normal figure is terminated. In the normal-figure normal processing transition setting process 1, "0" is set as the game processing number and saved in the normal-figure game processing number area in order to shift to the normal-figure normal processing.

Further, when the number of reserved numbers of the normal figure is not 0 (the result of A7901 is "N"), the game control device 100 loads the winning random number from the random number storage area per normal figure of the RWM (for the number of reserved numbers 1), and RWM. The hit symbol random number is loaded from the normal symbol per symbol random number storage area (for the number of hold 1) (A7902). Then, the random number storage area per normal figure (for 1 hold number) and the symbol random number storage area per normal figure (for 1 hold number) are cleared to 0 (A7903). Furthermore, whether or not the probability of winning the result in the normal map fluctuation display game is higher than usual in the normal figure high probability (in the high probability state), that is, whether or not the time is shortened (normal power support state). (A7904). The probability of hitting a normal figure in a high probability is 250/251, and the probability of hitting a normal figure in a low probability is 0/251.

When the game control device 100 is not in the high probability of the normal figure (the result of A7904 is "N"), the game control device 100 sets the low probability lower limit judgment value (251 in this case) which is the lower limit judgment value in the low probability of the normal figure (A7905). , When the high probability of the normal figure is in progress (the result of A7904 is "Y"), the high probability lower limit judgment value (1 in this case) which is the lower limit judgment value in the high probability of the normal figure is set (A7906), and the step A7907 is performed. Move to processing.

The game control device 100 determines whether or not the winning random number is equal to or greater than the upper limit determination value (251 in this case) (A7907). The upper limit judgment value here is common to the high probability of the normal map and the low probability of the normal figure. If the winning random number is equal to or greater than the upper limit determination value (the result of A7907 is "Y"), that is, if it is out of order, the process proceeds to step A7909. When the hit random number is less than the upper limit determination value (the result of A7907 is "N"), it is determined whether or not the hit random number is less than the lower limit determination value (A7908).

The game control device 100 saves the hit flag area when the hit random number is less than the lower limit determination value (the result of A7908 is "Y"), that is, when the hit flag area is missed (A7909). Further, the missing stop symbol number is set as the normal symbol stop symbol number (A7910), the missing symbol information is saved in the normal symbol stop symbol information area (A7911), and the process proceeds to step A7915.

When the hit random number is not less than the lower limit determination value (the result of A7908 is "N"), that is, in the case of hit, the game control device 100 saves the hit information in the hit flag area (A7912) and converts it into the loaded hit symbol random number. The corresponding stop symbol number is set (A7913), the hit stop symbol information corresponding to the hit stop symbol number is saved in the normal symbol stop symbol information area (A7914), and the process proceeds to step A7915. There may be several types of hit stop symbols.

Next, the game control device 100 saves the stop symbol number in the normal symbol stop symbol area (A7915) and saves the stop symbol number in the test signal output data area (A7916). Next, a normal map command corresponding to information related to the normal map variable display game (particularly information on hit / miss of the normal map variable display game) is prepared as an effect command (A7917), and the effect command setting process is executed. (A7918). Then, the random number storage area per normal figure is shifted (A7919), the free area after the shift is cleared to 0 (A7920), and then the number of reserved normal figures is updated by -1 (A7921).

That is, as the oldest normal figure holding number 1 game is executed, the rankings of the normal figure holding numbers 2 to 4 that are held after the normal figure holding number 1 are moved up one by one. By this processing, the value for the number of holdings of the normal figure 2 to the number of holdings of the normal figure 4 in the random number storage area per normal figure is moved from the number of holdings of the normal figure 1 of the random number storage area per the normal figure to the number of holdings of the normal figure 3. Will be done. Then, the value for the number of reserved numbers 4 in the random number storage area per normal figure is cleared, and the number of reserved numbers is decremented by 1.

Next, the game control device 100 executes the process transition setting process during the normal map change (A7922), and ends the normal map normal process. In the normal map fluctuation processing transition setting process, in order to shift to the normal map fluctuation processing, "1" is set as the game processing number and saved in the normal map game processing number area, and the normal map fluctuation time is saved in the normal map fluctuation time. Save to the game processing timer area.

[Control of production control device]
The control (process) executed by the effect control device 300 by the effect control program will be described below.

[Main processing (effect control device)]
First, the details of the main processing executed by the effect control device 300 will be described. FIG. 23 is a flowchart showing the procedure of the main process (main program) executed by the effect control device 300. The main process is executed by the main control microcomputer 311 (directing microcomputer) when the power is turned on to the gaming machine 10. In the flowchart of the process executed by the effect control device 300, the step code (number) is represented as "B ***".

When the execution of the main process is started, the effect control device 300 first disables interrupts (B0001). Next, the initial settings of the CPU 311 and VDP 312 are executed (B0002, B0003), and interrupts are permitted (B0004). When the interrupt is permitted, the command reception interrupt process for receiving the command transmitted from the game control device 100 can be executed.

Next, the effect control device 300 permits the generation of display data to be displayed on the display device 41 or the like (B0005), and sets a random number seed to be used for random number generation (B0006). Then, the initial value at the time of turning on the power is saved in the area to be initialized (B0007).

Subsequently, the effect control device 300 clears the WDT (watchdog timer) (B0008). The WDT is started with the above-mentioned CPU initial setting (B0002) and monitors whether or not the CPU 311 is operating normally. If the WDT is not cleared even after a certain period of time has passed, the WDT time is up and the CPU 311 is reset.

After that, the effect control device 300 executes an RTC reading process for reading time information from the RTC (real-time clock) 338 (B0009).

The RTC reading process may be configured to read the time information from the RTC 338 at a predetermined cycle (for example, every two hours), and it is not necessary to read the time information every time the process shifts to step B0009. The RTC reading process may be executed only once when the power is turned on to the effect control device 300 (that is, the power is turned on to the gaming machine 10) (the position of the RTC reading process may be changed, for example, steps B0003 and B0004). May be executed between). The effect control device 300 sets a time timer (timekeeping means) for measuring the time in the timer area in the RAM, and when the time information is read from the RTC 338 at a predetermined cycle or when the power is turned on, the time is set from the RTC 338 only once. When the information is read, the time timer (timekeeping means) may be adjusted to match the time of RTC338. Then, the effect control device 300 may execute various processes by using the time timer. By doing so, the number of times of processing for reading the time from the RTC 338 can be reduced, and the load on the CPU 311 is reduced.

Next, the effect control device 300 detects the operation signal of the effect button 25 by the player (the signal of the effect button switch 25a or the touch panel 25b), or changes the effect content (setting) according to the detected signal. The effect button input process is executed (B0010). Subsequently, the hall / player setting mode process for accepting operations such as changing the brightness and volume of the LED and the liquid crystal display by the person in charge of the game hall (game store) or the player is executed (B0011). In the hall / player setting mode processing, the player can customize the effect according to the effect points described later.

Next, the effect control device 300 executes an effect point control process for adding or clearing the effect points (B0012). In the effect point control process, the effect points are added by executing the effect or operation for which the effect points are to be added, and at the end of the game so that the effect points can be carried over to the next game. For example, information including information on production points is displayed on the display device 41 as a QR code (registered trademark). For example, the effect control device 300 can display the QR code (registered trademark) on the display device 41 in the hall / player setting mode processing.

Next, the effect control device 300 executes a random number update process for updating a random number such as an effect random number (B0013), analyzes the received command received from the game control device 100, and executes the corresponding received command check process. (B0014). The details of the received command check process will be described later with reference to FIG. 24.

Subsequently, the effect control device 300 executes a customer waiting demo editing process (B0015) that edits and controls the content of the customer waiting demo displayed on the display device 41, and determines the power saving state of the gaming machine 10 waiting for the customer. The power saving control process to be controlled is executed (B0016).

Next, the effect control device 300 updates various data according to the contents to be displayed on the display device (display means) such as the display device 41, or sets the drawing to be displayed on the display device 41 in the display frame buffer. Execute the effect display editing process (B0017). As for the drawing data set at this time, the image of the display device 41 can be updated without any problem as long as the VDP 312 can complete the drawing within the frame period of 1/30 second (about 33.3 msec). Then, the preparation for drawing in the display frame buffer is completed, and the drawing command preparation end setting is executed (B0018).

Subsequently, the effect control device 300 determines whether or not it is the frame switching timing (B0019). If it is not the frame switching timing (the result of B0019 is "N"), the process of B0019 is repeated until the frame switching timing is reached, and if it is the frame switching timing (the result of B0019 is "Y"), the display device 41 is displayed. Instruct screen drawing (B0020). Since the frame period of this embodiment is 1/30 second, the frame is switched when the periodic V blank (image update) is executed twice every 1/60 second (1/2 of the frame period), for example. .. The image may not be updated in 1/60 seconds, and the interval may be further increased.

Further, the effect control device 300 executes a sound control process for controlling the sound output from the speaker 19 (B0021).

Further, the effect control device 300 executes a decoration control process for controlling a decoration device (board decoration device 46, frame decoration device 18) including LEDs and the like (B0022). In the decoration control process, for example, brightness control (light emission control) of a decoration device such as an LED is executed.

Further, the effect control device 300 executes a movable body control process for controlling an effect device (board effect device 44) such as an electric accessory driven by a motor and a solenoid (B0023). In the movable body control process, for example, an accessory operation effect for driving the motor is set.

Then, when the effect control device 300 finishes the process of B0023 described above, the effect control device 300 returns to the process of B0008. After that, the processes from B0008 to B0023 are repeated.

[Receive command check process]
Next, with reference to FIG. 24, the details of the received command check process (B0014) in the above-mentioned main process (FIG. 23) will be described. FIG. 24 is a flowchart showing the procedure of the received command check process executed by the effect control device 300.

First, the effect control device 300 loads the value of the command reception counter in the command reception counter area of the RAM as the number of command receptions in order to check the number of commands received from the game control device 100 (B1101). Then, it is determined whether or not the number of command receptions is 0 (B1102). When the number of commands received is 0, that is, when there is no command received from the game control device 100 (the result of B1102 is "N"), there is no command to analyze, so the received command check process ends.

On the other hand, when the number of command receptions is not 0, that is, when the command is received from the game control device 100 (the result of B1102 is "Y"), the effect control device 300 is a command reception counter in the command reception counter area. After subtracting the value by the number of received commands (B1103), the contents of the received command buffer of the RAM are copied to the command area for analysis (B1104). Here, since the received command buffer is a ring buffer, there is no problem even if the number of command received is subtracted before copying the contents in the buffer to the command area. Also, even if a new command is received during copying, the data will not be overwritten.

Then, the effect control device 300 updates the command read index by +1 in the range of 0 to 31 (adds only 1) (B1105). The receive command buffer is configured to store up to 32 received commands. The received commands are stored in the received command buffer in the order of the command read index 0 to 31, and here, the received commands are read in the index order and copied to the command area for analysis. When the copy to the command area for analysis is completed, the storage area of the received command buffer corresponding to the read command read index is cleared.

The effect control device 300 determines whether or not the copy of the command for the number of received commands loaded in the process of step B1101 is completed (B1106), and if the copy is not completed (the result of B1106 is "N". ”), The processing of steps B1104 to B1106 is repeated.

When the effect control device 300 receives the command transmitted from the game control device 100, the content of the received command is saved in the reception command buffer, and at the same time, the command reception counter value in the command reception counter area is added and updated. Although 32 commands can be stored in the received command buffer, the received commands are analyzed separately in the analysis command area. Then, when the contents of the received command are copied to the command area for analysis, the received command buffer and the command reception counter value are cleared. In this way, by always securing a free area without performing analysis directly in the received command buffer, it is possible to prepare for a large amount of commands received.

Subsequently, when the copy is completed (the result of B1106 is "Y"), the effect control device 300 loads the received command content of the command area for analysis (B1107), and analyzes the content of the received command. The process is executed (B1108). The details of the received command analysis process will be described later with reference to FIG. 25 below. Also, the address of the command area for analysis is updated (B1109). After that, it is determined whether or not the analysis of the command for the number of received commands loaded in the process of step B1101 is completed (B1110), and if the analysis is not completed (the result of B1110 is "N"), the step. The processing of B1107 to B1110 is repeated. When the analysis is completed (the result of B1110 is "Y"), the reception command check process is terminated.

[Received command analysis processing]
Next, with reference to FIG. 25, the details of the received command analysis process (B1108) in the above-mentioned received command check process (FIG. 24) will be described. FIG. 25 is a flowchart showing the procedure of the received command analysis process executed by the effect control device 300.

First, the effect control device 300 separates the upper byte of the received command as a MODE unit and the lower byte as an ACTION unit (ACT unit) (B1201). The command transmitted from the game control device 100 to the effect control device 300 is composed of a MODE unit (MODE command) and an ACTION unit (ACTION command), and is usually continuously transmitted from the MODE unit indicating the type of command. NS. Therefore, the upper and lower ranks of the received command are configured in the order of the MODE section and the ACTION section.

Next, the effect control device 300 determines whether or not the MODE unit is in the normal range (B1202). That is, it is determined whether or not the value (value assigned as the command specification indicating the type) that can be taken by the MODE unit indicating the type of the command. Then, when the MODE unit is in the normal range (the result of B1202 is “Y”), it is similarly determined whether or not the ACTION unit is in the normal range (B1203). That is, it is determined whether or not the value (value assigned as the command specification indicating the content) that can be taken by the ACTION unit indicating the content of the command (specific production instruction, etc.) is determined. Then, when the ACTION section is in the normal range (the result of B1203 is "Y"), the ACTION section for the MODE section determines whether or not the combination is correct (B1204). That is, it is determined whether or not the value of the ACTION section is a value that can be taken by a command of the type specified by the MODE section. Then, if the combination is correct (the result of B1204 is "Y"), the command processing according to the command system is executed in the processing after B1205.

The effect control device 300 first determines whether or not the value of the MODE unit is within the range of the variable command (B1205). The variable command is a command for instructing a variable pattern of a special decorative symbol, for example, a variable command (A3407). Then, when the MODE unit represents a variable command (the result of B1205 is "Y"), the variable command process is executed (B1206), and the received command analysis process is terminated.

When the MODE unit does not represent a variable command (the result of B1205 is "N"), the effect control device 300 then determines whether or not the MODE unit is within the range of the jackpot command (B1207). The jackpot command is a command for commanding an operation (display of a fanfare screen or a round screen, etc.) related to an effect during a jackpot. For example, a fanfare command (A2610) for commanding a fanfare screen or a round screen is commanded. Round command (A2611) for commanding, interval command (A2612) for commanding the interval screen, ending command (A2612) for commanding the ending screen, and the like. Then, when the MODE unit represents a jackpot command (the result of B1207 is "Y"), the jackpot command process is executed (B1208), and the received command analysis process is terminated.

When the MODE unit does not represent a jackpot command (the result of B1207 is "N"), the effect control device 300 then determines whether or not the MODE unit is within the range of the symbol command (B1209). In addition, as a symbol system command, for example, there is a decorative special symbol command (A3403, A3503) corresponding to a stop symbol pattern. Then, when the MODE unit represents a symbol-based command (the result of B1209 is "Y"), the symbol-based command process is executed (B1210), and the received command analysis process is terminated.

When the MODE unit does not represent a symbol-based command (the result of B1209 is "N"), the effect control device 300 then determines whether or not the MODE unit is within the range of a single-shot command (B1211). Then, when the MODE unit represents a single-shot command (the result of B1211 is "Y"), the single-shot command process is executed (B1212), and the received command analysis process is terminated.

When the MODE unit does not represent a single-shot command (the result of B1211 is "N"), the effect control device 300 then determines whether or not the MODE unit is within the range of the look-ahead symbol command (B1213). .. The look-ahead symbol command includes, for example, the look-ahead stop symbol command (A2913). Then, when the MODE unit represents a look-ahead symbol-based command (the result of B1213 is "Y"), the look-ahead symbol-based command process is executed (B1214), and the received command analysis process is terminated.

When the MODE unit does not represent the look-ahead symbol command (the result of B1213 is "N"), the effect control device 300 then determines whether the MODE unit is within the range of the look-ahead variable command (B1215). ). The look-ahead variation command includes, for example, the look-ahead variation pattern command (A2913). Then, when the MODE unit represents a look-ahead variable command (the result of B1215 is "Y"), the look-ahead variable command process is executed (B1216), and the received command analysis process is terminated.

On the other hand, if the MODE unit does not represent a look-ahead variable command (the result of B1215 is "N"), the effect control device 300 may have received an unexpected command (for example, a command used only in the test mode). Since there is a possibility, the received command analysis process is terminated. Further, when the MODE part is not in the normal range (the result of B1202 is "N"), the ACTION part is not in the normal range (the result of B1203 is "N"), or the ACTION part for the MODE part is not the correct combination ( The result of B1204 is "N"), and the received command analysis process is terminated.

[Single-shot command processing]
Next, with reference to FIG. 26, the details of the one-shot command processing (B1212) in the reception command analysis processing (FIG. 25) described above will be described. FIG. 26 is a flowchart showing a procedure of one-shot command processing executed by the effect control device 300.

The effect control device 300 first determines whether or not the MODE unit represents a model designation command indicating the type of the gaming machine (B1301). Then, when the MODE unit represents a model designation command (the result of B1301 is "Y"), the model setting process for setting the type of the gaming machine is executed (B1302), and the single-shot command process is terminated.

When the MODE unit does not represent the model designation command (the result of B1301 is "N"), the effect control device 300 then determines whether or not the MODE unit represents the RAM initialization command (B1303). ). Then, when the MODE unit represents a RAM initialization command (the result of B1303 is "Y"), the RAM initialization setting process for notifying the RAM initialization and the like is executed (B1304), and the single-shot command process is performed. finish.

When the MODE unit does not represent the RAM initialization command (the result of B1303 is "N"), the effect control device 300 then determines whether or not the MODE unit represents the power failure recovery command (B1305). ). Then, when the MODE unit represents a power failure recovery command (the result of B1305 is "Y"), the power failure recovery setting process is executed (B1306), and the single-shot command process is terminated.

If the MODE unit does not represent a power failure recovery command (the result of B1305 is "N"), the effect control device 300 then determines whether or not the MODE unit represents a customer waiting demo command (B1307). .. Then, when the MODE unit represents the customer waiting demo command (the result of B1307 is "Y"), the customer waiting demo setting process is executed (B1308), and the single-shot command process is terminated.

When the MODE section does not represent the customer waiting demo command (the result of B1307 is "N"), the effect control device 300 then determines whether or not the MODE section represents the decorative special figure 1 hold number command. (B1309). Then, when the MODE section represents the decorative special figure 1 hold number command (the result of B1309 is "Y"), the special figure 1 hold information setting process is executed (B1310), and the one-shot command process is terminated.

In the effect control device 300, if the MODE section does not represent the decorative special figure 1 hold number command (the result of B1309 is "N"), then whether or not the MODE section represents the decorative special figure 2 hold number command. (B1311). Then, when the MODE section represents the decorative special figure 2 hold number command (the result of B1311 is "Y"), the special figure 2 hold information setting process is executed (B1312), and the one-shot command process is terminated.

When the MODE unit does not represent the decorative special figure 2 hold number command (the result of B1311 is "N"), the effect control device 300 then determines whether or not the MODE unit represents the probability information command. (B1313). Then, when the MODE unit represents a probability information command (the result of B1313 is "Y"), the probability information setting process is executed (B1314), and the one-shot command process is terminated.

If the MODE unit does not represent a probability information command (the result of B1313 is "N"), the effect control device 300 then determines whether or not the MODE unit represents an error / illegal / calling command. (B1315). Note that the error / illegal system / call commands include, for example, an illegal occurrence command, an illegal release command, a state off command, a state on command, a magnet illegal notification command (magnetic error command), and a panel radio wave illegal notification command (panel radio error command). ), There is a calling command. When the on signal from the call button switch 67 is input, the game control device 100 sets a signal to the external device (particularly the hall computer) by the external information editing process (A1319), and also sets the effect control device 300. You may generate a call command to. As the fraud occurrence command, there is a command indicating the occurrence of a fraudulent prize based on the signals of the start port 1 switch 36a, the start port 2 switch 37a, the winning port switch 35a, and the large winning port switch 39a. The fraud release command is a command indicating the fraud release. In the winning opening switch / status monitoring process (A1310), the occurrence of fraudulent winning and the cancellation of fraud are monitored, and the fraud occurrence command and the fraud release command can be transmitted. As a status on command, a signal is generated from the glass frame opening detection switch 63 (glass frame opening error) and a signal is generated from the front frame opening detection switch 64 (main body frame opening detection switch) (main body frame opening error, front frame). There is a command indicating (open error). In addition, the status off command indicates that no error has occurred. A status on command and a status off command can be transmitted in the winning opening switch / status monitoring process (A1310). When there is a detection (magnet fraud) from the magnetic sensor switch 61, a magnet fraud notification command is transmitted in the magnet fraud monitoring process (A1315). When there is a detection (radio wave fraud) from the radio wave sensor 62, a radio wave fraud notification command is transmitted in the radio wave fraud monitoring process (A1316).

Then, when the MODE section represents an error / illegal / call command (the result of B1315 is "Y"), the error / illegal / call setting process for notifying or canceling the error / illegal / call is performed. Execute (B1316) and end the one-shot command processing. In the error / illegal / call setting process, the display device 41 is set to generate an error / illegal / call notification sound, and to display or cancel the display corresponding to the error / illegal / call command.

In the effect control device 300, when the MODE unit does not represent an error / illegal system / call command (the result of B1315 is "N"), the MODE unit then sends a command for switching the effect mode (special figure display). It is determined whether or not it represents (set by intermediate processing or the like) (B1317). Then, when the MODE unit represents a command for switching the effect mode (the result of B1317 is "Y"), the effect mode switching setting process is executed (B1318), and the single-shot command process is terminated.

When the effect control device 300 does not represent the command for switching the effect mode (the result of B1317 is "N"), then the MODE section represents the out ball number command indicating the number of out balls. Whether or not it is determined (B1319). Then, when the MODE unit represents the out-ball number command (the result of B1319 is "Y"), the out-ball number reception processing is executed (B1320), and the single-shot command processing is terminated.

In the effect control device 300, if the MODE section does not represent the out-ball count command (the result of B1319 is "N"), then whether or not the MODE section represents the count command (large winning opening count command). (B1321). Then, when the MODE unit represents the count command of the large winning opening switch (the result of B1321 is "Y"), the count information setting process is executed (B1322), and the single-shot command process is terminated.

The effect control device 300 determines whether or not the MODE unit represents a set value information command (probability set value information command) when the MODE unit does not represent a count command (the result of B1321 is “N”). (B1323). The set value information command is included in the command at the time of power failure recovery in step A1046 of FIG. 6B and the command at the time of RAM initialization transmitted in the process of step A1044. Then, when the MODE unit represents the set value information command (the result of B1323 is "Y"), the set value reception processing is executed (B1324), and the single-shot command processing is terminated. In the set value reception processing, the set value (probability set value) is stored in a storage unit such as a RAM, and necessary processing is executed.

When the MODE unit does not represent the setting value information command (the result of B1323 is "N"), the effect control device 300 determines whether or not the MODE unit represents the setting change type command (B1325). As a command for changing the setting, for example, there is a command (A1030) for changing the probability setting. Then, when the MODE unit represents a setting change system command (the result of B1325 is "Y"), the setting change system information setting process is executed (B1326), and the single-shot system command process is terminated. In the setting change information setting process, the contents of the setting change command are memorized and the process corresponding to the command is executed. For example, when a command for which the probability setting is being changed is received, in the setting change system information setting process, a setting changing display for notifying the player that the setting is being changed is displayed on the display device 41.

The effect control device 300 determines whether or not the MODE unit represents a setting confirmation command when the MODE unit does not represent a setting change command (the result of B1325 is “N”) (B1327). .. As a command for setting confirmation, for example, there is a command (A1033) for confirming probability setting. Then, when the MODE unit represents a setting confirmation system command (the result of B1327 is "Y"), the setting confirmation system information setting process is executed (B1328), and the single-shot system command process is terminated. In the setting confirmation system information setting process, the contents of the setting confirmation system command are memorized and the process corresponding to the command is executed. For example, when a command during probability setting confirmation is received, in the setting confirmation system information setting process, a setting confirmation display for notifying the player that the setting is being confirmed is displayed on the display device 41.

Next, it is determined whether or not the MODE unit represents the command to stop the symbol (B1329). The symbol stop command includes, for example, a symbol stop command of special figure 1 (decorative special figure 1 stop command) and a symbol stop command of special figure 2 (decorative special figure 2 stop command). Then, when the MODE section represents a command to stop the symbol (the result of B1329 is "Y"), the effect control device 300 then determines whether or not the command of the MODE section is a normal command (". B1330).

When the command of the MODE section is a normal command (the result of B1330 is "Y"), the effect control device 300 sets the stop mode of the corresponding special figure (B1331), and the game is played after all the symbols are stopped. The status flag is set to the normal status (B1332), and the single-shot command processing is terminated. In the process of B1332, as an example, the game state flag is set to the normal state, but depending on the timing when this process is executed, the game state flag is a flag of "changing", "big hit", and "small hit". Is set.

On the other hand, when the MODE section does not represent the symbol stop command (B1329 result is "N"), or when the MODE section command is not normal (B1330 result is "N"), the effect control device. 300 ends the one-shot command processing.

In addition, the effect control device 300 may execute a process for a command not shown in FIG. 26. For example, the effect control device 300 receives a start winning command indicating that the start winning opening 36 and / or the normal variable winning device 37 has won a prize from the game control device 100, and responds to the start winning command from the speaker. It may be set to generate a start winning sound that notifies the player that there is a start winning.

[Look-ahead design command processing]
Next, with reference to FIG. 27, the details of the look-ahead symbol-based command processing (B1214) in the reception command analysis processing (FIG. 25) described above will be described. FIG. 27 is a flowchart showing a procedure of pre-reading symbol-based command processing executed by the effect control device 300.

First, the effect control device 300 determines whether or not the latest hold information is the information of the special figure 1 hold (special figure 1 start memory), for example, the latest received decorative special figure hold number command is the decorative special figure 1 hold number. It is determined whether or not it is a command (B1601). When the latest hold information is the information of special figure 1 hold (the result of B1601 is "Y"), the look-ahead symbol system command (look-ahead stop symbol command) is set to the special figure 1 look-ahead symbol command area corresponding to the number of special figure 1 hold. Save (B1602).

In the effect control device 300, when the latest hold information is not the information of the special figure 1 hold (the result of B1601 is "N"), that is, the latest received decorative special figure hold number command is the decorative special figure 2 hold number command. In this case, the look-ahead symbol system command (look-ahead stop symbol command) is saved in the special figure 2 look-ahead symbol command area corresponding to the special figure 2 hold number (B1603).

After steps B1602 and B1603, the effect control device 300 sets a look-ahead variable command reception wait flag indicating that the read-ahead variable command is waiting to be received (B1604). This is because the look-ahead symbol command and the look-ahead variable command are set, and the game control device 100 transmits the look-ahead variable command following the look-ahead symbol command. After that, the look-ahead symbol command processing is terminated.

[Look-ahead variable command processing]
Next, with reference to FIG. 28, the details of the look-ahead variable command processing (B1216) in the reception command analysis processing (FIG. 25) described above will be described. FIG. 28 is a flowchart showing a procedure of pre-reading variation command processing executed by the effect control device 300.

The effect control device 300 first determines whether or not the read-ahead fluctuation system command (look-ahead fluctuation pattern command) is waiting to be received (B1701). When the above-mentioned read-ahead variable command reception wait flag (B1604) is set, it can be determined that the read-ahead variable command is waiting to be received. If the read-ahead variable command is not waiting to be received (the result of B1701 is "N"), the look-ahead variable command processing is terminated. When the read-ahead variable command reception waiting flag is being waited for (the result of B1701 is "Y"), the look-ahead variable command reception waiting flag is cleared (B1702).

Next, the effect control device 300 (sub-board) sets a look-ahead variation MODE conversion table corresponding to the number of holds of the latest hold information symbol (special figure 1 or special figure 2) (B1703), and sets a look-ahead variation MODE command (B1703). Acquires the sub-internal look-ahead fluctuation command MODE unit corresponding to the MODE unit (B1704). Next, the look-ahead variation ACT conversion table is set (B1705), and the sub-internal look-ahead variation command ACT section corresponding to the look-ahead variation command ACTION section (ACT section) is acquired (B1706).

Next, the effect control device 300 determines whether or not the converted MODE unit and the ACT unit (that is, the sub-internal look-ahead fluctuation command MODE unit and the ACT unit) are both other than 0 (B1707). If the command is normal (valid), it is converted to a command other than 0. When both the converted MODE section and ACT section are other than 0 (the result of B1707 is "Y"), the converted command consisting of the converted MODE section and ACT section corresponds to the latest hold information and the number of holds. Save in the look-ahead fluctuation command area (special figure 1 look-ahead change command area or special figure 2 look-ahead change command area) (B1708). Then, the look-ahead command consistency check process is executed (B1709), and it is determined whether or not the combination of the MODE unit and the ACT unit after conversion is normal (B1710).

It should be noted that the time of the first half fluctuation corresponding to the MODE section changes depending on the number of holds when the hold is changed and the display game is started. Hold changes When starting a display game, if there are no other holds, the first half will be longer, and if a new hold occurs and the number of holds is large, the first half will be shorter. Therefore, even if the time value of the first half fluctuation is changed, the MODE section of the received look-ahead fluctuation command is converted into the sub-internal look-ahead fluctuation command MODE section so that the internal command of the effect control device 300 can be handled in the same way.

Further, since the type of reach is not related to the number of holdings, the latter half fluctuation corresponding to the sub-internal look-ahead fluctuation command ACT section does not depend on the number of holdings. However, since there are different types of reach for the same system, if the effect control device 300 is used as it is without converting the ACT section (value of the latter half fluctuation) of the look-ahead fluctuation system command, the number will increase and it will be difficult to check. .. For example, there are various types of normal reach, such as normal reach-1 stop off and normal reach +1 stop off. Therefore, by converting the ACT unit indicating the reach of the same system into the same sub-pre-reading variation command ACT unit, the number is reduced and the burden of the check processing such as the pre-reading command matching check processing is reduced.

Next, in the effect control device 300, when at least one of the converted MODE unit and ACT unit (that is, the sub-internal look-ahead variation command MODE unit and ACT unit) is 0 (the result of B1707 is "N"), or If the combination of the MODE unit and the ACT unit after conversion is not normal (the result of B1710 is "N"), it is considered that the command after conversion is abnormal, and the look-ahead variable command processing is terminated.

When the combination of the MODE unit and the ACT unit after conversion is normal (the result of B1710 is "Y"), the effect control device 300 loads the hold information (latest hold information) to be read ahead from the look-ahead fluctuation command area. (B1711), a look-ahead lottery process relating to the latest hold look-ahead effect is executed (B1712). The look-ahead effect includes, for example, a continuous advance notice effect (including a chance look-ahead effect), a look-ahead zone effect, and a hold change advance notice. Subsequently, it is determined whether or not the latest hold look-ahead effect (hold change notice, etc.) occurs (B1713). When the latest hold look-ahead effect occurs (the result of B1713 is "Y"), the point information corresponding to the selected look-ahead effect is set (B1714).

Next, the effect control device 300 determines whether or not the pre-reading effect (holding change notice, etc.) that occurs is an effect that immediately starts (B1715). When the generated look-ahead effect is an effect that starts immediately (the result of B1715 is “Y”), the display corresponding to the selected look-ahead effect is set (B1716). If the pre-reading effect that occurs is not an effect that starts immediately (the result of B1715 is "N"), set and save the display corresponding to the pre-reading effect at the time of hold shift (when the hold display is moved or when the number of holds is reduced) (B1717). ). Then, the look-ahead variable command processing is terminated.

On the other hand, in the effect control device 300, when the latest hold look-ahead effect does not occur (the result of B1713 is "N"), or when the generated look-ahead effect does not start immediately (the result of B1715 is "N"). As it is. Ends the look-ahead variable command processing.

[Design command processing]
Next, with reference to FIG. 29, the details of the symbol-based command processing (B1210) in the reception command analysis processing (FIG. 25) described above will be described. FIG. 29 is a flowchart showing a procedure of symbol-based command processing executed by the effect control device 300.

The effect control device 300 sets a special symbol type corresponding to the MODE unit of the received symbol-based command (decorative special figure 1 command or decorative special figure 2 command) (B1801). The special figure type is special figure 1 or special figure 2. Then, the symbol type corresponding to the combination of the MODE unit and the ACTION unit (ACT unit) of the symbol system command is set and saved in a predetermined area such as RAM (B1802). Here, since the distribution ratio of the symbols changes between the special figure 1 and the special figure 2, the symbol type is set by using the table for each MODE. In the present embodiment, the symbol types are the out-of-order symbol, the 4R probability variation jackpot symbol (4R-A1, symbol 1), the 4R normal jackpot symbol (4R-A2, symbol 2), and the 8R probability variation jackpot symbol (8R-A1, symbol 1). It corresponds to a symbol 3), an 8R normal jackpot symbol (8R-A2, symbol 4), a 12R probability variation jackpot symbol (12R-A1, symbol 5), a 12R normal jackpot symbol (12R-A2, symbol 6), and the like.

[Variable command processing]
Next, with reference to FIG. 30, the details of the variable command processing (B1206) in the reception command analysis processing (FIG. 25) described above will be described. FIG. 30 is a flowchart showing a procedure of variable command processing executed by the effect control device 300.

The effect control device 300 determines whether or not the special figure type (special figure 1 or special figure 2) of the received variable system command (variable command) is undetermined (B1901). When the special figure type is undecided (the result of B1901 is "Y"), the variable command processing is terminated. If the special symbol type is not undetermined (the result of B1901 is "N"), the combination of the received variable command and symbol command is checked (B1902), and whether the variable command and symbol type are inconsistent. Is determined (B1903). Here, the inconsistency means that there is a contradiction in the production, such as when a design command of a jackpot symbol is received even though a variable command of an outlier is received. If the variable command and the symbol type are inconsistent (the result of B1903 is "Y"), the variable command processing is terminated.

When the effect control device 300 determines the variation pattern type from the variation command (variation command) when the variation command and the symbol type are not inconsistent (the result of B1903 is "N"), the effect control device 300 determines the variation pattern type from the variation command (variation command) (B1904). A variation effect setting process for setting a certain variation effect is executed (B1905). There are multiple effects for the same variable command. Subsequently, the special figure changing is set in the game state flag indicating the game state (P machine state) (B1906), and if the number of pre-reading effects such as continuous effects is not 0, -1 is updated (B1907).

[Variable effect setting process]
Next, with reference to FIG. 31, the details of the variation effect setting process (B1905) in the variation system command process (FIG. 30) described above will be described. FIG. 31 is a flowchart showing a procedure of the variable effect setting process executed by the effect control device 300.

First, the effect control device 300 determines whether or not the variation pattern type is reachless variation (variation that does not reach the reach state) (B2001). When the fluctuation pattern type is non-reach fluctuation (the result of B2001 is "Y"), the first half notice distribution group corresponding to the number of production points, model code, special figure type, production mode, and setting information (set value). The address table is set (B2002), and the address of the first half advance notice distribution group table corresponding to the MODE part of the variable command (variable command) and the number of reservations of the special figure type is acquired (B2003). In the case of non-reach fluctuation, the fluctuation time is shortened as the number of holds increases, so the address of the table corresponding to the number of holds is acquired.

When the fluctuation pattern type is not reachless fluctuation (the result of B2001 is “N”), that is, when the fluctuation pattern type is reach fluctuation, the effect control device 300 includes the number of production points, the model code, the special figure type, and the effect mode. Set the first half advance notice distribution group address table corresponding to the symbol type and setting information (set value) (B2004), and set the MODE part of the variable command (variable command) and the first half advance notice distribution group table corresponding to the variable pattern type. Get the address (B2005).

After steps B2003 and B2005, the effect control device 300 draws a lottery for advance notices that appear during the first half fluctuation (before reach) (B2006). Next, set the latter half notice distribution group address table corresponding to the number of production points, model code, special figure type, production mode, symbol type, and setting information (set value) (B2007), and ACT the variable command. The address of the second half notice distribution group table corresponding to the department is acquired (B2008), and the notice lottery that appears during the second half fluctuation (during reach) is performed (B2009). After that, the content of the variable effect corresponding to the MODE section and the ACT section of the variable command (variable command) is determined (B2010). In addition, the fluctuation time and main reach contents can be known from the fluctuation command.

Next, the effect control device 300 determines the content of the effect (notice effect) corresponding to the lottery result of the advance notice (B2011). After that, the stop symbol of the decorative special figure variation display game is determined according to the content of the variation effect such as the reach effect and the advance notice effect (B2012). Here, the decoration stop symbol is specifically determined, such as determining the looseness in the case of the out-of-order symbol.

Next, the effect control device 300 sets the display of the variable effect (B2013) and sets the display of the notice effect (B2014). Subsequently, the display setting of the hold reduction corresponding to the special figure type is set, and for example, the display in which the hold display corresponding to the decorative special figure that fluctuates this time is reduced is set (B2015). Subsequently, a voice number that determines the effect mode (sound output mode) by the sound of the speaker and a decoration number that determines the effect mode by the light emission of the decoration device are set (B2016). The decoration device (board decoration device 46, frame decoration device 18) has a plurality of decorative light emitting units (decorative LEDs, etc.) and emits light in a light emitting mode (color, light emitting timing, etc. of each LED) defined by a decoration number. ..

It is also possible to set the voice number and the decoration number based on the setting information (setting value) as well as the effect content. In this way, the player can enjoy inferring the setting information (set value) of the gaming machine 10 from the light emitting mode of the decorative device, that is, the light emitting mode of the decorative light emitting unit (LED).

Next, the effect control device 300 sets the display of the decorative special symbol variation corresponding to the special symbol type (B2017), and the fourth special symbol other than the above-mentioned first to third special symbols that fluctuate in the display device 41. The display setting of the fourth symbol variation regarding (fourth symbol, identification information) is performed (B2018). The fourth symbol variation may be displayed by the lamp display units 1 and 2 (LED) of the lamp display device 80 provided in addition to the display device 41, or may be executed on the display screen of the display device 41. May be good.

[Hit system command processing]
Next, with reference to FIG. 32, the details of the hit command process (B1208) in the above-mentioned received command analysis process (FIG. 25) will be described. FIG. 32 is a flowchart showing a procedure of hit system command processing executed by the effect control device 300.

The effect control device 300 first determines whether or not the MODE unit of the received hit system command represents a fanfare (B2101). If the MODE part of the hit command represents a fanfare (the result of B2101 is "Y"), that is, if the hit command is a big hit fanfare command (or a small hit fanfare command if there is a small hit), the fanfare effect is set. The fanfare effect setting process for this is executed (B2102). The fanfare command includes information on the upper limit of the number of rounds for this big hit. Subsequently, the game state flag indicating the game state (P machine state) of the current game machine 10 is set to during fanfare (B2103), and the hit-type command process is terminated. The upper limit of the number of rounds can also be obtained from the symbol type determined from the symbol command (decorative special symbol command corresponding to the stop symbol pattern).

The effect control device 300 determines whether or not the MODE section of the hit command represents a round when the MODE section of the received hit command does not represent a fanfare (the result of B2101 is "N"). B2104). When the MODE unit represents a round (the result of B2104 is "Y"), that is, when the hit system command is a round command (or a command during which the small hit is open if there is a small hit), the effect control device 300 determines the round effect. The setting process is executed, the game state flag indicating the game state (P machine state) of the current game machine 10 is set during the round (B2105, B2106), and the hit system command process is terminated.

If the MODE section of the received hit command does not represent a round (the result of B2104 is "N"), the effect control device 300 determines whether or not the MODE section of the hit command represents an interval (the result of B2104 is "N"). B2107). When the MODE unit represents an interval (the result of B2107 is "Y"), that is, when the hit system command is an interval command, the effect control device 300 executes the interval effect setting process, and the game of the current gaming machine 10 is executed. The game status flag indicating the status (P machine status) is set during the interval (B2108, B2109), and the hit system command processing is terminated. (In addition, if there is a small hit and the big winning opening is opened only once in the small hit, that is, if the small hit is one round, there is no interval command.)

When the MODE section of the received hit command does not represent the interval (the result of B2107 is "N"), the effect control device 300 determines whether or not the MODE section of the hit command represents the ending (the result of B2107 is "N"). B2110). When the MODE unit represents the ending (the result of B2110 is "Y"), that is, when the hit system command is the ending command (or the small hit end screen command if there is a small hit), the effect control device 300 determines the ending effect. The ending effect setting process for setting is executed, the ending is set in the game state flag indicating the game state (P machine state) of the current game machine 10 (B2111, B2112), and the hit system command process is terminated. ..

If the MODE section of the received hit command does not represent the ending (the result of B2110 is "N"), the effect control device 300 ends the hit command process without executing any process. do.

[Lower plate unit]
The detailed configuration of the lower plate unit 29 will be described with reference to FIG. 33. FIG. 33 shows a perspective view (a) of the lower plate unit 29 viewed from diagonally above right and a perspective view (b) viewed from diagonally above left.

The lower plate unit 29 including the lower plate 23 and the like has a shape conforming to the upper plate unit and is arranged side by side in the vertical direction. The lower plate unit 29 is attached to the front frame 12. The lower plate unit 29 includes a lower plate base 453 on the back side, a left side case portion 456, a central case portion 458, and a right side case portion 460 connected to the lower plate base 453 from the front.

Further, the lower plate unit 29 is provided with a call button 454 for calling a staff member of the game hall (game store) in front of the left side case portion 456. Therefore, the player during the game can easily press (operate) the call button 454 by reaching for the lower plate unit 29 while sitting. Further, the call button 454 is covered with a case member capable of transmitting light, and for example, the character "call" is drawn on the case member. Therefore, the player can easily recognize that the call button 454 is a button (operating means) for calling a staff member of the game hall by visually recognizing the character. The call button 454, that is, below the case member of the call button 454, is provided with an LED (light emitting diode) of the frame decoration device 18 as a light emitting means (not shown).

The on signal (call signal) from the call button switch 67 provided on the call button 454 is input to the game control device 100 (FIG. 3) and sent as external information from the external information terminal board 71 to the data lamp. The data lamp, which is a display device for game information, emits light and is also sent to an external device (particularly a hall computer). Further, the on signal (call signal) from the call button switch 67 input to the game control device 100 is converted into a call command (effect command) corresponding to the on signal and transmitted to the effect control device 300.

By receiving the call command (error / illegal system / call command) in the process of step B1315, the effect control device 300 causes the LED of the call button 454 to emit light (lights or blinks) or cancels the light emission of the LED. You can let it. The effect control device 300 can also display or cancel the display corresponding to the display screen of the display device 41 by receiving the call command.

In front of the central case portion 458, a right decorative portion 466a that decorates the right front side of the lower plate unit 29 is provided. In front of the lower plate 23, a left decorative portion 466b that decorates the left front side of the lower plate unit 29 is provided.

The central case portion 458 has a vertical portion 458a extending substantially in the vertical direction and a horizontal portion 458b extending in the substantially horizontal direction. The lower speaker 19b and the shaft portion 24a of the operation handle 24 are arranged between the vertical portion 458a of the central case portion 458 and the right side case portion 460.

The lower plate unit 29 is roughly divided into a flat portion 29a extending in the left-right direction and a right protruding portion 29b protruding upward on the right side of the flat portion 29a. The flat portion 29a includes a lower plate 23, a left case portion 456, and a lateral portion 458b of the central case portion 458. Above the flat portion 29a, a bottom plate portion (not shown) of the upper plate unit 20 is arranged facing each other. The right protruding portion 29b includes a vertical portion 458a of the central case portion 458, a right case portion 460, a lower speaker 19b, and an operation handle 24.

On the back surface of the lower plate base 453 of the lower plate unit 29, a first entrance 461 and a second entrance 465 of the game ball are provided. A foul ball (falling ball) that was launched from a ball launcher (not shown) but returned without reaching the game area 32 flows into the first entrance 461, and the upper plate 21 is full (not shown). When it becomes full), a game ball (prize ball) from the payout unit may flow in. The game ball pulled out from the upper plate 21 may flow into the second entrance 465. The game ball flows into the lower plate 23 from the exit 463 of the passage 462 through the passage 462 from the first entrance 461 and the second entrance 465. When the lower plate 23 is full, the game balls are stored in the passage 462. A part of the passage 462 may pass through the inside or the lower side of the left side case portion 456 and the central case portion 458 in order to communicate with the first entrance 461 and the second entrance 465. A cover 464, which is a transparent member that covers the passage 462 from above, is provided at the upper end of the passage 462. Since the cover 464 is transparent, the inside of the passage 462 can be visually recognized when the glass frame 15 is opened with respect to the front frame 12.

A plate portion 455 constituting the bottom portion and the front portion of the lower plate 23 is arranged in front of the left side case portion 456 and above the lower case portion 459. The left case portion 456 has an integrally formed upper plate 456a and a front plate 456b, and the front plate 456b constitutes the back plate of the lower plate 23. The front plate 456b (back plate of the lower plate 23) of the left case portion 456 has an inclination so as to be located on the back side toward the lower side, so that the player can play the game ball of the lower plate 23 from the front diagonally above. Is easy to scrape out by hand.

An annular opening 455a and valleys 455b radiating from the opening 455a in four directions are provided at the bottom of the lower dish 23 (that is, the bottom of the dish 455). The game ball that has flowed into the lower plate 23 from the exit 463 of the passage 462 falls into the opening 455a through the easy-to-pass valley portion 455b. The opening 455a is normally closed by the opening / closing member 457, but the opening / closing member 457 is opened by the operation of the opening / closing operation unit 23b. When the opening / closing member 457 is opened, the game ball passes through the opening 455a (ball punching hole 23a) and is discharged to the outside of the game machine 10.

[Modification example of game control device]
Next, the configuration of a modified example of the game control device 100 (main board) will be described with reference to FIG. 34. The game control device 100 may be configured as shown in FIG. FIG. 34 is a block diagram showing a configuration of a modified example of the game control system of the game machine 10. In the following block diagram, the contents overlapping with FIG. 3 will be omitted as appropriate.

In the configuration of the modified example of the game control device 100, as shown in FIG. 34, the third output port 135 of the output unit 130 inputs the contents to be displayed on the batch display device 50 and the call button switch 67 to the second input port 123. The on / off data of the segment line to which the anode terminal of the LED is connected is output according to the signal to be input.

Further, the fourth output port 136 of the output unit 130 outputs on / off data of the digit line to which the cathode terminal of the LED of the batch display device 50 and the call button switch 67 is connected.

Then, the second driver 138b drives the segment line of the call button 454 together with the batch display device 50. Further, the third driver 138c drives the digit line of the call button 454 together with the batch display device 50.

Therefore, according to the configuration of the modified example, the game control device 100 sets the LED of the call button 454 in response to the input from the call button switch 67 without going through the effect control device 300 like the LED of the batch display device 50. It can be made to emit light (lights or blinks).

Using the fourth output port 136 and the fifth output port 137, an external information signal corresponding to the detection signal from the call button switch 67 is output to the external information terminal board 71, and the LED of the call button 454 is turned on. / Off data may be output. Further, the second output port 134 may be used to output open / close data signals of the general electric solenoid 37c, the large winning opening solenoid 39b, and the like, and may output on / off data to the LED of the call button 454. The on-data is output to the LED of the call button 454 by pressing the call button 454 once (odd number of times), and the off-data is output to the LED of the call button 454 by pressing the call button 454 twice (even number of times). You can do it.

Further, when the signal from the call button switch 67 is input to the second input port 123, the data corresponding to the effect control device 300 is also transmitted as a call command (error / illegal system / call command). Therefore, the effect control device 300 can display the display corresponding to the display screen of the display device 41 when the call button 454 is pressed.

[Modification example of production control device]
A configuration of a modified example of the effect control device 300 (sub-board) will be described with reference to FIG. 35. FIG. 35 is a block diagram showing a configuration of a modified example of the effect control system of the gaming machine 10. For example, the game control device 100 (see FIG. 3) can transmit the data corresponding to the effect control device 300 as a call command when the signal from the call button switch 67 is input to the second input port 123. The call command can also include on / off data of the LED of the call button 454.

Then, when the effect control device 300 receives a call command from the game control device 100, the frame decoration LED control circuit 333 that drives and controls the frame decoration device (for example, the frame decoration device 18 or the like) turns on / off the LED of the call button 454. It is possible to output a signal including data. The LED of the call button 454 may be configured as a part of the frame decoration device 18. Further, the call command includes information for turning on the LED of the call button 454 by pressing the call button 454 once (odd number of times), and pressing the call button 454 twice (even number of times) of the call button 454. Information for turning off the LED may be included.

Therefore, the frame decoration device 18 can control the light emission of the LED of the call button 454 together with the LED provided on the glass frame 15.

The signal from the call button switch 67 may be directly input to the main control microcomputer 311 via the switch input circuit 336 of the effect control device 300 together with the effect object SW47 and the like. By sending the signal from the call button switch 67 to the effect control device 300 in this way, the effect control device 300 can directly detect that the call button 454 has been operated without going through the game control device 100. Therefore, the responsiveness (reactivity) to the operation of the call button 454 can be improved. Therefore, since the LED of the call button 454 emits light immediately when the call button 454 is pressed, it is possible to prevent the player from misunderstanding that there is no response (reaction), and the operation of the call button 454 is continuously performed. Can be suppressed.

[Example of screen transition diagram when the call button is operated]
FIG. 36 is an example of a screen transition diagram showing the display screen of the display device 41 when the call button 454 is being operated in chronological order.

As shown in FIG. 36, a light emitting member 180 capable of emitting light in synchronization with the LED of the call button 454 may be provided above the display screen of the display device 41.

The light emitting member 180 is, for example, an LED formed in a ribbon shape and provided above or above the glass frame 15. When the line of sight is directed above the glass frame 15 to see the data lamp, the player can easily see the light emitting member 180. The data lamp may be difficult to see directly from the player during the game (while seated) because it is blocked by the member of the frame decoration device 18 provided above the glass frame 15.

Further, in FIG. 36, the light emitting state of the light emitting member 180 is represented by hatching (diagonal line), and the non-light emitting state is represented without hatching. The light emitting member 180 may be configured as a part of the frame decoration device 18.

FIG. 36A is a display screen of the display device 41 when the fanfare effect 181 is executed as the effect during the big hit. In FIG. 36 (A), the light emitting member 180 is in a non-light emitting state. The fanfare effect 181 is executed at the start of the big hit (immediately after).

Here, when a round game in which the big winning opening is opened in the big hit state (special game state) is started, each time the game ball wins the big winning opening, a predetermined number of prize balls are placed on the upper plate 21 from the payout device. (Game ball) is discharged. The game balls stored in the upper plate 21 can be moved to the lower plate 23 by passing through a ball extraction hole (not shown) and the second entrance 465, but the game balls are stored in the lower plate 23 in a predetermined amount or more. When it is detected that the plate is full, an overflow switch signal is output from the payout control device 200 to the game control device 100 (see FIG. 3).

Then, for example, when the player presses (operates) the call button 454 in order to take out the game balls stored in the upper plate 21 and the lower plate 23 in advance in preparation for the round game started after the fanfare production, the clerk (clerk, The clerk call state for calling the hall staff) is set, and the clerk call display 345 is displayed on the display screen of the display device 41 as shown in FIG. 36 (B).

FIG. 36B is a display screen of the display device 41 when the clerk call display 345 is displayed by the player pressing the call button 454. Further, along with the display of the clerk call display 345, the light emitting member 180 also emits light as shown in FIG. 36 (B). Although not shown, the LED of the call button 454 can also emit light in accordance with the light emission of the light emitting member 180.

On the clerk call display 345, for example, a character display 345a indicating that the clerk is being called and a time display 345b that counts down the time since the clerk is being called are displayed. In addition, in accordance with the countdown of the time display 345b, a gauge display in which the gauge in the square frame changes shortly may be performed.

For example, the character display 345a can display the characters "Calling a staff member."

Further, the time display 345b can display a countdown display from a predetermined time (for example, 30 seconds) toward 0 seconds. The time display 345b may be a count-up display so that the time after the person in charge is being called increases from 0 seconds. By changing the time of the time display 345b in this way, it becomes easier for the player to recognize that the state in which the clerk is being called is maintained. The call state of the clerk may be canceled when the countdown display of the time display 345b becomes 0, that is, when a predetermined time (for example, 30 seconds) elapses. In addition, the calling state of the staff member may be maintained even after the lapse of a predetermined time.

In addition, the balloons and characters (for example, character display 345a and time display 345b) of the staff call display 345 are blinked so that the player can more easily recognize that the state in which the staff is being called is maintained. You may do it.

The light emitting member 180 may be composed of a ribbon-shaped member and a plurality of character (for example, "peka") -shaped members arranged around the ribbon-shaped member, and the character-shaped member is formed together with the ribbon-shaped member. The member may be made to emit light. Further, in accordance with the light emission of the character-shaped member, the upper speaker 19a and the lower speaker 19b emit a sound (voice) corresponding to the character indicated by the character-shaped member, for example, "peka, peka, peka", and the light emitting member. It may be emphasized that 180 is emitting light.

When the game control device 100 receives the overflow switch signal from the payout control device 200, the game control device 100 displays a display prompting the player to take out the game ball stored in the lower plate 23 on the display screen of the display device 41. The command corresponding to the signal is transmitted to the effect control device 300, and the signal corresponding to the overflow switch signal (1 bit on / off) is also included in the external information signal (several bits in total) and transmitted to the external information terminal plate 71. You may.

In this way, when the game control device 100 transmits the signal corresponding to the overflow switch signal to the external information terminal board 71, the game balls are stored (full) in the lower plate 23 in a predetermined amount or more. The clerk can be automatically called without the player pressing the call button 454. Therefore, even a beginner player who is unfamiliar with the game can play the game with peace of mind, and the interest of the game can be improved.

After that, when the player presses the call button 454 again (second press), the clerk call display 345 displayed on the display screen of the display device 41 is hidden as shown in FIG. 36 (C).

FIG. 36C is a display screen of the display device 41 when the player presses the call button 454 again (second press). The light emitting member 180 is also put into a non-light emitting state in accordance with the non-display of the staff call display 345. Further, although not shown, the LED of the call button 454 also does not emit light. By pressing the call button 454 again (second press), the call state of the staff member can also be released (interrupted).

Then, when the player presses the call button 454 again (third press). As shown in FIG. 36 (D), the clerk call display 345 is redisplayed on the display screen of the display device 41, and the light emitting member 180 is put into the light emitting state again. Further, although not shown, the LED of the call button 454 can also be set to emit light.

FIG. 36 (D) is a display screen of the display device 41 when the player presses the call button 454 again (third press). When the clerk call display 345 is redisplayed, the countdown display of the time display 345b is resumed from the time when the clerk's call state is released (interrupted) (for example, from 25 seconds). Therefore, the player can easily understand the total elapsed time from the start of the call. The time display 345b may be reset every time the staff call display 345 is redisplayed, and may be displayed as a countdown from, for example, 30 seconds. According to such an aspect, the player can easily recognize that the call is being made again.

In this way, the player can redisplay the clerk call display 345 by pressing the call button 454 for the second time and then pressing the call button 454 for the third time.

That is, when the number of times the player presses the call button 454 is an odd number (1, 3, 5, ... 2n + 1), the clerk call state is set and the clerk call display 345 is displayed. Further, when the number of times the player presses the call button 454 is an even number (2, 4, 6, ... 2n), the staff call state is canceled and the display of the staff call display 345 is hidden (non-light emission). (Turns off)).

In this way, each time the game control device 100 receives the signal from the call button switch 67, the effect control device 300 can switch the clerk call display 345 to display or hide. Before the player presses the call button 454 (0 times), the clerk call state is released, and as shown in FIG. 36 (A), the clerk call display 345 is not displayed.

The game control device 100 can detect the player pressing the call button 454 not only during the fanfare effect but also during the game (game state). Therefore, the player calls the staff by pressing the call button 454 in the normal game state, the specific game state (time saving state, etc.), and the special game state (during the round game at the time of big hit, during the ending effect, etc.). Can be done. Further, the game control device 100 can notify that the clerk is in the call state via the effect control device 300 in accordance with the call of the clerk. For example, the clerk call display 345 is displayed on the display screen of the display device 41. Etc. can be performed.

[Example of screen transition diagram when displaying the explanation of the operation of the call button]
FIG. 37 is an example of a screen transition diagram showing the display screen of the display device 41 in chronological order when the operation of the call button 454 is explained and displayed. The description that overlaps with the content of FIG. 36 will be omitted as appropriate.

For example, the effect control device 300 explains the operation of the call button 454 as shown in FIG. 37 (B) when the fanfare effect 181 is executed as the effect during the big hit as shown in FIG. 37 (A). The display 182 can be displayed on the display screen of the display device 41.

FIG. 37 (A) is a display screen of the display device 41 when the fanfare effect 181 is executed at the start of the big hit as an effect during the big hit, and FIG. 37 (B) is an explanatory display explaining the operation of the call button 454. This is the display screen of the display device 41 when 182 is displayed.

As shown in FIG. 37B, for example, the explanatory display 182 is composed of characters such as "call button Tips" and "call ON / OFF is switched each time the button is pressed." The explanatory display 182 is not limited to characters, but may be an image such as a figure or a photograph or a moving image.

By performing the explanation display 182 during the fanfare effect 181, the effect control device 300 can teach a player who is unfamiliar with the game how to call a clerk, and can draw attention to calling the clerk. Therefore, even if a round game that can be expected to come out after the fanfare production is started, the player can easily call the staff and take out the game balls stored in the upper plate 21 and the lower plate 23, so that the player can play the game with peace of mind. It becomes possible to improve the interest of the game.

The effect control device 300 can display the explanation display 182 in addition to the fanfare effect 181. For example, the effect control device 300 is in a probabilistic state (high probability state, specific game state) after the game ball enters the specific area 86 (so-called V winning opening) during the round game, SP reach, and after the big hit ends. The explanation display 182 can be displayed at the timing when the ball can be expected to be released, such as when the ball is confirmed, that is, when the result of the variable display game is a special result (big hit) or when the expectation of the special result is high.

Further, the effect control device 300 displays on the explanatory display 182 to explain the operation of the call button 454. For example, how to take out the game ball from the lower plate 23 and the call state of the staff member each time the call button 454 is pressed. Other explanations such as switching, a right-handed instruction, an instruction to insert the game ball into the specific area 86, and the like may be displayed.

After that, when a predetermined time (for example, 10 seconds) elapses, the explanatory display 182 is hidden as shown in FIG. 37 (C). The effect control device 300 may hide the explanatory display 182 by receiving the command corresponding to the detection of the signal from the call button switch 67 or the like.

Further, when a predetermined time (for example, 10 seconds) has elapsed since the explanatory display 182 was hidden, the effect control device 300 displays the explanatory display 182 for alerting, as shown in FIG. 37 (D). You may redisplay it. Therefore, even if the player misses the explanatory display 182 of FIG. 37 (B), the redisplayed explanatory display 182 shown in FIG. 37 (D) can be confirmed, so that the game can be played with peace of mind. It becomes possible to improve the interest of the game.

The redisplayed explanatory display 182 (FIG. 37 (D)) may be displayed smaller than the explanatory display 182 (FIG. 37 (B)) displayed for the first time. By displaying the redisplayed explanatory display 182 smaller than the explanatory display 182 displayed for the first time, the player can easily enjoy the fanfare effect 181 and improve the interest of the game. Further, the redisplayed explanatory display 182 may be displayed so as to be gradually reduced and then erased.

[Action / effect of the first embodiment]
The gaming machine 10 according to the present embodiment has a game control means (game control device 100) capable of executing a game (variable display game, special figure variable display game) and an effect control means (game control device 100) capable of executing a game-related effect. The effect control device 300) is provided, and when the result of the game is a special result (big hit), a special gaming state advantageous to the player can be generated. The gaming machine 10 has a display device 41 capable of displaying a game, an operating means (calling button 454) capable of accepting an operation by a player during the game, and a predetermined signal (calling button switch 67) when the operation is performed. The game control device 100 is provided with a signal output means (game control device 100) capable of outputting the on-signal (call signal), external information) to the outside of the game machine 10 (for example, the external information terminal plate 71). When the operation means accepts the operation, the effect control means can display an operation reception display (character display 345a of the clerk call display 345) indicating that the operation is accepted on the display device 41, and the operation means operates. Each time the operation reception display is received, the operation reception display is displayed or hidden.

According to such a gaming machine 10, every time the operating means receives an operation, the operation acceptance display is displayed or hidden on the display device 41, so that the player is calling a staff member. It becomes easier to confirm whether or not it is. Therefore, the player can easily play the game with peace of mind, and the interest of the game can be improved.

Further, in the game machine 10 according to the present embodiment, the effect control means (effect control device 300) has an operation reception display (character display 345a of the clerk call display 345) and a reception time indicating the time after the operation is received. The display (time display 345b of the staff call display 345) can be displayed on the display device 41, and when a predetermined time (for example, 30 seconds) has elapsed from the reception of the operation, the operation reception display and the reception time display are hidden. do.

According to such a gaming machine 10, it becomes easier for the player to recognize that the state in which the clerk is being called is maintained, and it becomes easier to play the game with peace of mind, so that the interest of the game can be improved. Can be done.

Further, in the gaming machine 10 according to the present embodiment, the effect control means (effect control device 300) displays an operation reception display (character display 345a of the staff call display 345) every time the operation means (call button 454) accepts an operation. An explanatory display 182 for explaining switching to display or non-display can be displayed on the display device 41.

According to such a gaming machine 10, the explanatory display 182 displayed on the display device 41 can teach a player who is unfamiliar with the game how to call a staff member, and can draw attention to calling the staff member. , You will be able to play the game with peace of mind, and you will be able to improve the interest of the game.

Further, in the game machine 10 according to the present embodiment, the operation means (call button 454) can accept the call operation as an operation, and the signal output means (game control device 100) is when the call operation is performed. , The call signal can be output as a predetermined signal (on signal from the call button switch 67, external information).

Similarly, according to such a game machine 10, every time a call operation is received, the operation reception display (character display 345a of the staff call display 345) is displayed or hidden on the display device 41. It becomes easier for the player to check the calling state of the staff, and the interest of the game can be improved.

The gaming machine 10 according to the present embodiment has an operating means (call button 454) capable of accepting an operation by a player during a game (seat in front of the gaming machine 10) and a light emitting means provided at a position overlapping the operating means. (LED of call button 454). When the operation means receives an operation, the effect control means (effect control device 300) causes the light emitting means to emit light in response to the acceptance of the operation.

According to such a game machine 10, when the call button 454 is pressed, the LED of the call button 454 emits light, so that it is easy to understand that the operation has been performed, and the interest of the game can be improved.

[Second Embodiment]
The gaming machine 10 of the second embodiment will be described with reference to FIGS. 38 to 49. The configuration other than that described below may be the same as that of the first embodiment. Further, in the following embodiments, the same reference numerals are used for configurations that perform the same functions as those in the first embodiment, and duplicate descriptions will be omitted as appropriate.

In the second embodiment, the effect control device 300 includes the part identification information (first identification information, unit ID) of the detachable parts (parts, members) 510 and the synthetic identification information corresponding to the model and series of the gaming machine 10. When (composite identification data) does not match, it is notified as an error that there is a mismatch. The synthetic identification information is a combination of model identification information (second identification information, model ID) corresponding to the model of the gaming machine 10 and series identification information (third identification information, series ID) corresponding to the series of the gaming machine 10. It is a value obtained by synthesis.

For example, when the gaming machine 10 is the model A main machine, the effect control device 300 corresponds to the model identification information (second identification information, model ID) corresponding to the model A and the main machine (series of the gaming machine 10). The series identification information (third identification information, series ID) is synthesized, and the value (synthetic identification information) obtained by the synthesis is retained.

[Game machine parts]
FIG. 38 is a diagram showing how the detachable parts 510 according to the second embodiment are normally attached to the gaming machine 10. FIG. 39 is a diagram showing how the detachable parts 510 according to the second embodiment are erroneously attached to the gaming machine 10.

Part 510 is assigned electrically readable part identification information. For example, the part 510 may be a plate-shaped member on which model information (model logo, etc.) of the gaming machine 10 to be attached is displayed, or may be a movable accessory constituting the frame effect device or the board effect device 44. A decorative member having an LED of the frame decoration device 18 or the board decoration device 46 may be used. The part 510 can be attached to the game machine 10 at the game hall because it interferes with the delivery to the game hall (game store), and an unfamiliar staff member may attach the part 510 to the wrong model.

As shown in FIG. 38, for example, no problem occurs when the part 510A for the model A main machine is normally attached to the game board 30 of the model A main machine of the game machine 10. However, for example, when the part 510B for the model A Amadeji machine is attached to the game board 30 of the model A main machine of the game machine 10 as shown in FIG. 39 (A), or as shown in FIG. 39 (B). If the part 510C for the model B main machine is attached to the game board 30 of the model A main machine of the game machine 10, a problem occurs. Therefore, the effect control device 300 uses the speakers 19a and 19b and the display device 41. To notify the error. The Amadeji machine is a model in which the probability of occurrence of a big hit is higher than that of the main machine.

[Error notification mode of the gaming machine 10]
FIG. 40 is a diagram showing a state in which an error notification is performed in the gaming machine 10 according to the second embodiment. As shown in FIG. 40, for example, the effect control device 300 may execute error notification by voice information (voice "It is a unit error") or text notification information 345 (character information, characters "unit error"). can.

The output of the voice information can be stopped by operating the effect button 25. Further, the notification information 345 is displayed with priority over the image related to initialization or the image related to power failure recovery.

FIG. 41 is a diagram showing an example in which the notification information 345 according to the second embodiment is displayed on the display device 41 displaying the out-of-order stop symbol of the special figure variation display game. As shown in FIG. 41, the notification information 345 for notifying the "unit error" is, for example, part identification information different from the synthetic identification information (combined value of the model identification information and the series identification information) of the gaming machine 10 of the model A main machine. As long as the parts 510B and 510C are attached, the information is displayed on the display device 41, and is similarly displayed during the game (during the variable display game).

In the special figure variation display game, the notification information 345 is superimposed on the variation display area 610 (first variation display area) where the variation display of the large symbol is performed, but the variation display area where the variation display of the small symbol is performed. It is not displayed on top of 615 (second variable display area). As a result, even if the notification information 345 (“unit error”) is displayed, the player can confirm the progress and result of the special figure variation display game in the variation display area 615.

[Configuration example of gaming machine 10]
FIG. 42A is a schematic configuration diagram schematically showing a configuration example of the gaming machine 10 of the second embodiment. FIG. 42B is a diagram showing a rotary switch 521 of the part 510 according to the second embodiment.

The game control device 100 transmits a model designation command indicating a series of the game machines 10 to the effect control device 300 when the power of the game machine 10 is turned on (A1044, A1046). The effect control device 300 searches for the series ID (series identification information) from the received model designation command (B1301) using the reference table (FIG. 42C). The reference table (FIG. 42C) is stored in a memory (for example, RAM 322, FeRAM 323, etc.), and associates a model designation command with a series ID (series identification information). Further, the effect control device 300 acquires a model ID stored in advance in a storage unit (FeRAM 323 or the like). If the model designation command also includes model (type) information, the effect control device 300 may select and set the model identification information (model ID) corresponding to the model designation command. .. Then, the effect control device 300 synthesizes the model identification information (model ID) and the series identification information (series ID), and uses the value obtained by the synthesis as the composite identification information (composite identification data) in the memory (RAM 322 or FeRAM 323). Etc.). In the second embodiment, the model designation command as the effect command means the ACTION section among the MODE section and the ACTION section.

The series ID can be obtained by converting the value of an 8-bit model specification command (particularly the lower 2 bits: 2 digits from the least significant bit) by referring to a reference table (Fig. 42C) stored in the memory. can. For example, if the model specification command (ACTION section) is "00000001B" (hexadecimal 01h) and "00000010B" (hexadecimal 02h), the series ID is "0000000000B" (00h) and the model specification command is "000000111B". (03h), the series ID is "00000001B" (01h).

If the model specification command contains both model (type) information and series information, for example, the model ID is the upper 6 bits (6 digits from the most significant bit) of the 8-bit model specification command. It can be grasped from, and can be obtained by masking the lower 2 bits with 0 and replacing it with 0. For example, if the model designation command is "000000101B", the model ID is 000001, and if the model designation command is "00010001B", the model ID is 000100. It should be noted that these 000001 and 000100 are numerical values when they are displayed on the display screen of the display device 41 and visually recognized, and the 8-bit numerical values handled in the CPU 311 are "00000100B" and "00010000B".

The synthetic identification information is synthesized by taking the sum of the model identification information (model ID) and the series identification information (series ID) (composite identification information = model ID + series ID). For example, if the model ID is "00000100B" and the series ID is "00000000000B", the composite identification information is "00000100B" (04h). For example, if the model ID is "00010000B" and the series ID is "00000001B", the synthetic identification information is "00010001B" (11h).

Further, the effect control device 300 compares the held synthetic identification information with the part identification information read from the part 510 (model part 510). The part 510 has an identification board 513 that holds the part identification information. Then, when the part identification information (first identification information) and the synthetic identification information (synthetic identification data) do not match, the effect control device 300 notifies as an error that they do not match.

In the identification board 513 of the part 510, the part identification information is set by one or more wirings 519 (electric wires) to which a predetermined voltage is applied and the rotary switch 521 (rotary SW (ID setting)).

The rotary switch 521 of the part 510 is used for selecting the part identification information (first identification information, unit ID) corresponding to the model and series of the game machine 10. For example, as shown in FIG. 42B, the rotary switch for the upper bit is used. It is composed of 521a and a rotary switch 521b for the lower bits. The two rotary switches 521a and 521b are respectively configured to have 16 positions (steps, dials) in one circuit in hexadecimal (0 to F) display.

For example, the arrow at the position of the rotary switch 521a points to "0", and the arrow at the position of the rotary switch 521b points to "4".

Further, as shown in FIG. 42A, each of the plurality of wirings 519 (plurality of electric wires) becomes a predetermined voltage or ground voltage by the rotary switch 521, and a plurality of (for example, eight) terminals (ports) in the parallel serial conversion unit 516. ) Is connected to a predetermined terminal, and the information of each bit (“1” or “0”) of the part identification information is input.

Although the wiring 519 is pulled up to a predetermined voltage via a pull-up resistor, it is not necessary to provide the pull-up resistor. The power supply (voltage) to the part 510 is supplied from, for example, the effect control device 300 or the power supply device 400 when the part 510 is attached.

In the example of FIG. 42A, the terminal connected to the wiring 519 in which the rotary switch 521 is turned on becomes the ground voltage (bit of the value “0”), and is connected to the wiring 519 in which the rotary switch 521 is turned off. The terminal has a predetermined voltage (a bit having a value of "1").

In this way, by turning on / off the rotary switch 521 in each wiring 519, the predetermined terminal to which the predetermined voltage is input is set to the bit of the value "1", and the terminal to which the predetermined voltage is not input (connected to the ground voltage). The part identification information such as "00000100" can be transmitted via the parallel serial conversion unit 516 with the value "0" as a bit.

That is, the identification board 513 is assigned the part identification information as parallel data (for example, "00000100") by the plurality of wirings 519. The parallel data (for example, “00000100”) assigned to the part identification information is binary data corresponding to the position value of the rotary switches 521a and 521b (for example, hexadecimal “04h”) as shown in FIG. 42B.

Of the 8-bit parallel data (for example, "000000100") assigned to the part identification information, the upper 4 bits (for example, "0000") are the position values of the rotary switch 521a for the upper bits (for example, the value "0" in FIG. 42B). ) Is set.

Further, the lower 4 bits (for example, "0100") of the 8-bit parallel data (for example, "000000100") assigned to the part identification information is the value of the position of the rotary switch 521b for the lower bit (for example, the value "0" in FIG. 42B. 4 ") is set.

The parallel-serial conversion unit 516 converts parts identification information input (parallel data) into serial data, the serial communication (in this case I ^{2 C)} by sending to the effect control device 300.

[Parallel serial converter]
FIG. 43 shows the configuration of the parallel serial conversion unit 516 when the parallel serial conversion unit 516 is a normal parallel serial conversion IC.

The parallel serial conversion unit 516 has a configuration of a normal parallel serial conversion IC including a plurality of D-type flip-flops 516a (D-FF). Parallel-serial conversion unit 516 converts the terminal 0-7 parallel data as part identification information input from (port 0-7) (e.g., "00000100") in the serial data, the serial communication (in this case ^I 2 C (Communication) is transmitted to the effect control device 300 via the connection line SDA (data line). Effect control unit 300 has a master IC300a Niokeru ^{I 2} C communication, and inputs the clock signal for a plurality of D-type flip-flop 516A, the parallel-serial converter 516 via the connection line SCL (timing signal line).

The plurality of D-type flip-flops 516a (D-FF) constitute a shift register in which each bit data of the parallel data moves from right to left in synchronization with the clock signal. The bit data of each D-type flip-flop 516a at a certain clock timing moves to the adjacent D-type flip-flop 516a at the next clock timing. Each bit data of the parallel data is taken into a plurality of D-type flip-flops 516a at a certain clock timing, and is sequentially output as serial data from the leftmost D-type flip-flop 516a. That is, the output of the serial data is completed 8 clocks after the parallel data is captured.

[First modification of the identification board]
FIG. 44A shows a first modification of the identification substrate 513 of the part 510. In the first modification, the parallel serial conversion unit 516 of the identification board 513 is not a normal parallel serial conversion IC, but an input I ² CI / O expander 815 (slave IC). The input I ² CI / O expander 815 inputs the part identification information input from ports 0 to 7 into the master IC 300a of the effect control device 300 as data.

The I ² CI / O expander 815 (slave IC) is connected to the transistor 830 connected to the connection line SDA, the filter 831 connected to the connection line SDA, the driver 832 connected to the connection line SDA, and the connection line SCL. The filter 833, the bus controller 834, and the reset signal generation circuit 839 are provided. Further, the bus monitoring WDT (watchdog timer) 840 for determining whether or not the connection line SDA is occupied by ^{another I 2 CI / O expander 815, and the I 2} CI / O expander 815 itself are connected. It is provided with a self-occupied WDT 841 for determining whether or not the line SDA is occupied.

The connection line SDA is a connection line for transmitting and receiving a data signal between the master IC 300a of the effect control device 300 and the I ² CI / O expander 815 (slave IC), and functions as a data line. The connection line SCL is a connection line for inputting / outputting a clock signal used for data communication in the connection line SDA, and functions as a timing signal line.

The filter 831 is connected to the connection line SDA, removes noise from the data (here, response signal, address data, etc.) input from the connection line SDA, and outputs the noise-removed data to the bus controller 834.

When the driver 832 outputs data (here, part identification information or the like) from the connection line SDA to the master IC 300a, the driver 832 applies a voltage at which the transistor 830 can operate to the transistor 830.

A field effect transistor (FET) is used for the transistor 830 to suppress power consumption, the gate of the transistor 830 is connected to the driver 832, and the drain is a connection line SDA to which a predetermined voltage is applied by a pull-up resistor R. The source is grounded.

When the driver 832 outputs data (part identification information, etc.) to the master IC 300a from the connection line SDA, the transistor 830 can operate at the gate of the transistor 830 in order to pass a current between the drain and the source of the transistor 830. Apply a value voltage. Then, the driver 832 outputs data from the connection line SDA by repeatedly changing the voltage of the connection line SDA from HIGH to LOW.

The filter 833 is connected to the connection line SCL, removes noise from the data input from the connection line SCL, and outputs the noise-removed data to the bus controller 834.

In ^addition, the I 2 CI / O expander 815, it is set a unique address by the address setting terminals A0~A3 provided in the ^I 2 CI / O expander 815 is input to the bus controller 834. Further, ^{the address for resetting the I 2} CI / O expander 815 is also preset.

The unique address (8 bits) of the I ² CI / O expander 815 is composed of a fixed address portion consisting of upper 3 bits and a variable address portion consisting of lower 5 bits. A predetermined value (for example, "110") is preset in the fixed address portion and cannot be changed by the ^{I 2 CI / O expander 815.}

The variable address section includes ^{a 4-bit I 2} CI / O expander address corresponding to the pattern set in the terminals A to A3 of the ^{I 2} CI / O expander 815, and a write request as to whether the data is a read request or not. It is composed of 1-bit R / W identification data indicating whether or not it is. In the input I ² CI / O expander 815, "1" is usually registered in the R / W identification data in response to the read request.

The bus controller 834 determines whether or not the address of the data input from the connection line SDA ^{matches the unique address set in the I 2} CI / O expander 815, and if they match, the connection line. Data (part identification information) is output from the SDA to the master IC 300a. The corresponding wiring 519 of the plurality of wirings 519 is connected to a predetermined port (here, one) among the eight ports 0 to 7 (terminals 0 to 7) in the ^{I 2 CI / O expander 815.} As a result, a predetermined voltage is applied. Therefore, 8-bit part identification information (for example, "00000100") is input to the bus controller 834 as parallel data via the eight ports 0 to 7. A predetermined port to which a predetermined voltage is input corresponds to a bit having a value of "1", and other terminals correspond to a bit having a value "0".

Further, the bus controller 834 determines whether or not the address of the data input from the connection line SDA ^{matches the reset address set in the I 2} CI / O expander 815, and if they match, the bus controller 834 determines whether or not the address is the same as the reset address set in the I 2 CI / O expander 815. The data is taken in as initialization instruction data (initialization command RES), and the I ² CI / O expander 815 is initialized.

Further, after the number of changes of the signal level of the connection line SCL from LOW to HIGH reaches 8 times and the 8th bit data (part identification information) is output by the bus controller 834, the signal level of the connection line SCL is changed from HIGH. When changing to LOW, the master IC 300a outputs a response signal from the connection line SDA to the bus controller 834. Further, it is confirmed that the signal level of the connecting line SCL changes from LOW to HIGH, and when the signal level of the connecting line SCL changes from HIGH to LOW again, the connecting line SDA is opened. That is, the master IC 300a outputs a response signal at the timing when the number of changes of the signal level of the connection line SCL from LOW to HIGH becomes 9 times.

The reset signal generation circuit 839 is ^{connected to a Vcc terminal connected to a connection line Vcc that supplies power to the I 2} CI / O expander 815, and a RESET terminal that receives a reset signal from the outside.

The reset signal generation circuit 839 ^{initially generates a reset signal when the power is turned on to the I 2} CI / O expander 815 and the voltage rises to a predetermined value, and the generated reset signal is input to the bus controller 834. To reset.

Therefore, when the harness is pulled out, the connection line Vcc for supplying power for logic is temporarily disconnected, and when the harness is reinserted, the power supply is restored and the reset signal generation circuit 839 outputs a reset signal. Become. A harness is a bundle of a connection line Vcc for supplying power for logic, a connection line SDA, a connection line SCL, a ground line GND, and the like.

The bus monitoring WDT840 is ^{used to detect that another I 2} CI / O expander 815 occupies the connecting line SDA. The bus monitoring WDT840 is connected to the reset signal generation circuit 839, and when a predetermined time elapses after the connection line SDA is occupied, the bus monitoring WDT840 operates its own reset signal generation circuit 839 to operate the I ² CI / O ex. Initialize the panda 815.

The self-occupied WDT841 is used to detect the occupation of the connecting line SDA by ^{itself (I 2 CI / O expander 815).} When the self-occupied WDT 841 operates continuously for a certain period of time, the self-occupied WDT 841 generates a reset signal in the reset signal generation circuit 839 ^{to initialize the I 2} CI / O expander 815.

[Second modification of the identification board]
FIG. 44B shows a second modification of the identification substrate 513 of the part 510. In the second modification, the parallel serial conversion unit 516 of the identification board 513 is not a normal parallel serial conversion IC, but an output I ² CI / O expander 815 (slave IC). Further, in the second modification, the part 510 is provided with an effect device and can perform an effect. The effect device is, for example, a decorative device such as an LED (light emitting unit), but may be a movable accessory.

The output I ² CI / O expander 815 is based on the effect control data received from the master IC 300a of the effect control device 300, and is based on the output state (here, LED, light emitting unit) of the effect device (LED, light emitting unit) provided in the part 510. Here, the light emitting state) is controlled via ports 0 to 15 on the output side. The I ² CI / O expander 815 uses ^{the unique address (8 bits) of the I 2} CI / O expander 815 as the part identification information and inputs it to the master IC 300a of the effect control device 300.

The output I ² CI / O expander 815 is mounted on the input I ² CI / O expander 815 (Fig. 44A) on the output side of the output setting register 835, the output controller 836, and the I ² CI / O expander 815. Drivers 837 connected to each of the ports 0 to 15 (terminals 0 to 15) and transistors 838A to 838P connected to each of the ports 0 to 15 are added. Therefore, the ^{same configuration as the input I 2} CI / O expander 815 (FIG. 44A) will be omitted as appropriate.

The filter 831 is connected to the connection line SDA, removes noise from the data (here, effect control data, response signal, etc.) input from the connection line SDA, and outputs the noise-removed data to the bus controller 834.

When the driver 832 outputs data (here, part identification information, response signal, etc.) from the connection line SDA to the master IC 300a, the driver 832 applies a voltage at which the transistor 830 can operate to the transistor 830.

When the driver 832 outputs data (part identification information, response signal, etc.) from the connection line SDA, the transistor 830 can operate at the gate of the transistor 830 in order to pass a current through the transistor 830 between the drain and the source. Apply a value voltage. Then, the driver 832 outputs data from the connection line SDA by repeatedly changing the voltage of the connection line SDA from HIGH to LOW.

The bus controller 834 includes a ROM 834a in which the part identification information (first identification information) of the identification board 513 is stored. The bus controller 834 determines whether or not the address of the data input from the connection line SDA matches the unique address (address determined by A3, A2, A1, A0) set in the ^{I 2 CI / O expander 815.} If it is determined and they match, the data (part identification information (first identification information), response signal, etc.) stored in the ROM 834a is output from the connection line SDA to the master IC 300a.

The part identification information output to the master IC 300a is ^{the unique address (8 bits) of the I 2} CI / O expander 815 as described above, or the separately set identification information (first modification) different from the unique address. It is set via a port or stored in a storage unit (memory) as in the example). It is not always necessary to output the parts identification information from the bus controller 834 to the master IC 300a, and when the effect control device 300 receives the response signal from the bus controller 834, the effect control device 300 recognizes the address of the transmitted data as the parts identification information. It may be configured to do so.

Further, the bus controller 834 changes the signal level of the connection line SCL from LOW to HIGH eight times, and after fetching the 8th bit effect control data from the connection line SDA, the signal level of the connection line SCL is changed. When the change from HIGH to LOW, a response signal is output from the connection line SDA to the master IC 300a. Further, it is confirmed that the signal level of the connecting line SCL changes from LOW to HIGH, and when the signal level of the connecting line SCL changes from HIGH to LOW again, the connecting line SDA is opened. That is, the bus controller 834 outputs the response signal at the timing when the number of changes of the signal level of the connection line SCL from LOW to HIGH becomes 9 times.

^{The operation mode of the I 2} CI / O expander 815 and the output state of ports 0 to 15 are set in the output setting register 835. When the bus controller 834 fetches the initialization instruction data from the connection line SDA and the I ² CI / O expander 815 is initialized, the output setting register 835 has a current in all ports 0 to 15. The initial state is set so that it does not flow.

Based on the data set in the output setting register 835, the output controller 836 passes a current through the port driver 837 to the effect device (here, the LED, the light emitting unit) connected to each of the ports 0 to 15 (here, the LED, the light emitting unit). The output state (here, the light emitting state) of the effect device is actually controlled by the output of the lighting data). When the bus controller 834 captures the effect control data from the connection line SDA, this output state is updated to the content specified in the effect control data.

That is, the output setting register 835 is set based on the effect control data received from the master IC 300a, and when the stop condition is received, the output states of the ports 0 to 15 are updated and reflected in the effect device.

When a current is passed through the port, the driver 837 applies a voltage to the transistor so that the transistors 838A to 838P connected to the port through which the current flows can operate.

The gates of the transistors 838A to 838P are connected to the driver 837, the drain is connected to the port terminal connected to the connection line to which the voltage for operating the effector is applied, and the source is grounded.

If the voltage applied to the gate of the transistors 838A to 838P is equal to or higher than the predetermined value for operating the transistor 838, the predetermined voltage applied to the gate from the drive power source is grounded through the drain of the transistor 838. The output state of the effect device (LED in this case) connected to the port terminal can be controlled by flowing a current to the port terminal.

[Model specification command and series ID change (addition) mode]
FIG. 45 is a diagram showing an ID change mode (identification information setting state) for changing (adding) a model designation command and a series ID executed by the effect control device 300 of the second embodiment.

When the effect control device 300 executes the ID change mode (identification information setting state), a table as shown in FIG. 45 is displayed on the display screen of the display device 41, and receivable model designation commands and series. IDs and their correspondences can be changed (added). The ID change mode can be shifted to, for example, the debug mode at the time of development (shipping time). In the ID change mode in the debug mode, the command I / F 331 of the effect control device 300 is connected to the command transmission device instead of the game control device 100, and a dedicated rewrite command is transmitted to the CPU 311 to obtain a series ID or the like. Can be changed (added).

The ID change mode may be changed, for example, by operating the effect button 25 during the hall setting mode (B0011). In this way, when the association between the model designation command of the reference table (FIG. 42C) stored in the memory (for example, RAM 322, FeRAM 323, etc.) and the series ID is cleared (deleted) at the time of carry-in, power failure, or the like. , Can be restored (recreated) at the amusement park (amusement store). Similarly, by enabling the shift to the ID change mode during the hall setting mode, the model designation command of the reference table (FIG. 48) stored in the memory (for example, RAM 322, FeRAM 323, etc.) and the composite identification information can be combined. When the association is cleared (deleted) at the time of delivery, power failure, etc., it can be restored (recreated) at the game hall (game store).

When the ID change mode is executed, for example, as shown in FIG. 45 (A), the model designation command can be changed (added). Then, the developer or the person in charge of the game hall (game store) (game hall manager) operates the effect button switch 25a of the effect button 25, the touch panel 25a, etc. (the cross key or the volume adjustment key may be used). As shown in the table of 45 (A), the model specification command can be changed (added).

For example, the table of FIG. 45A shows that the model of the gaming machine 10 is "RW1" and the model ID is "000001" (the numerical value handled in the CPU 311 is "00000100B" (04h)). Is done. In addition, "Z", "F", "M", "GL", and "SP" are prepared as model designations (so-called specifications) of the gaming machine 10, and "spare 1" and "spare 1" are prepared as spare model designations. "Spare 2" is provided.

Then, for example, when the model designation is "Z", "01h" is set in the model designation command, and the series ID is set to "00" (0000000000B). When the model designation is "GL", "03h" is specified in the model designation command, and the series ID is set to "01" (00000001B). If there is no model specification command or series ID setting, "-" is displayed, but it may be hidden ("").

Further, in FIG. 45 (A), for example, the model designation command of the selected model designation "M" is displayed blinking ("[--]"). Therefore, the developer or the game hall manager who is operating to change (add) the model designation command can easily recognize which model designation command is being selected, and can improve the work efficiency. The selected model specification command is not limited to the blinking display, and the color may be changed (for example, from black to red), or the font may be changed (for example, bold).

Then, as shown in FIG. 45 (B), when an arbitrary model designation command (for example, "00h") is set, the series ID "of the accompaniment (line of model designation" M ") corresponding to the model designation command". "10" is being selected ([10] (00000010B)).

After that, by setting the selected series ID to, for example, "10" and then ending the ID change mode, a reference table for associating the model specification command and the series ID with the model specification command and the series ID change (addition). It can be reflected and stored in (FIG. 42C).

By selecting a model designation command (for example, "01h") or series ID (for example, "00") that has already been set, another model designation command (for example, "02h") or series ID (for example, "11") can be selected. It can also be changed to.

Further, the effect control device 300 has a series ID (third identification information, for example, "00000010B" (on display) to which a model ID (second identification information, for example, "00000100B" (displayed as "000001")) is newly added. Can be stored in memory as information in the reference table (FIG. 48) by synthesizing with "10")) to obtain new synthetic identification information ("00000011B" ("06h" in hexadecimal)). .. For example, in the new composite identification information (“0000001110B”), the upper 6 digits (6 bits) become the model ID (display “000001”) and the lower 2 digits (2 bits) become the series ID (display “10”). )become.

Therefore, when the model designation (spec) of the model A main machine of the gaming machine 10 is changed (for example, the normal middle spec is changed to the light middle spec) and the series ID is changed (for example, "00" to "10"). , The part 510 of the part identification information (“0000001110B”) corresponding to the synthetic identification information newly obtained from the series ID can be attached and used for the production of the game.

Therefore, the model designation (specs) of the gaming machine 10 can be easily and inexpensively changed by replacing some parts (for example, parts 510) with corresponding ones without replacing the entire gaming board 30. Further, since the specifications of the gaming machine 10 can be changed easily and inexpensively, for example, the game hall manager appropriately changes (adjusts) the specifications of the gaming machines 10 lined up in the gaming machine according to the popularity of the gaming machine 10 to become popular. Sales can be improved by increasing the number of gaming machines 10 with certain specifications. In addition, since the number of game machines 10 having popular specifications increases in the game hall, it becomes easier for the player to select the game machine 10, so that the interest of the game can be improved.

In the ID change mode (identification information setting state), in addition to changing (adding) the series ID (third identification information, series identification information) corresponding to the model specification command, the model identification information (third) corresponding to the model specification command. 2 Identification information, model ID) may be changed (added).

[Main processing (effect control device)]
FIG. 46 is a flowchart showing the procedure of the main process (main program) according to the second embodiment. When the power is turned on (restored) to the gaming machine 10, the main processing is executed by the effect control device 300 (main control microcomputer 311).

The main process of the second embodiment is obtained by adding a part collation process (B5000) to the main process of FIG. 23, and since the other processes are the same as those of FIG. 23, the same step numbers are added and described. Is omitted.

In the parts collation process, the parts identification information (first identification information) read from the parts 510 is compared with the synthetic identification information (combined value of the model identification information and the series identification information) corresponding to the model designation command (B1301). If the parts identification information and the composite identification information do not match, an error notification is issued to warn the user. In the present embodiment, the parts collation process (B5000) is executed after the reception command check process (B0014).

The parts collation process (B5000) is first executed when the power of the gaming machine 10 is turned on, and is then repeatedly executed by the loop process from steps B0008 to B0023.

[Part matching process]
Next, the details of the parts collation process (B5000) in the main process (FIG. 46) will be described with reference to FIG. 47. FIG. 47 is a flowchart showing a procedure of the parts collation process executed by the effect control device 300.

First, the effect control device 300 updates -1 if the collation time timer (timekeeping means) is not 0 (B5001). The collation time timer determines the collation timing or collation time interval for reading the part identification information and collating (comparing) with the model identification information. Then, it is determined whether or not the collation time timer is 0 (B5002). When the collation time timer is not 0 (the result of B5002 is "N"), the part collation process is terminated because it is not the collation timing.

On the other hand, when the collation time timer is 0 (the result of B5002 is “Y”), the effect control device 300 reads the part identification information from the part 510 because it is the collation timing (B5003). Then, the parts identification information (first identification information) and the synthetic identification information (combined value of the model identification information (second identification information) and the series identification information (third identification information)) are compared (verified) (B5004). .. The model identification information and the series identification information are set based on the model designation command as information indicating the type (model) and series of the gaming machine in the model setting process (B1302) when the power of the gaming machine 10 is turned on. Has been done. As described above, the effect control device 300 acquires the model ID stored in advance in the storage unit (FeRAM 323, etc.), searches the series ID from the model designation command received when the power is turned on, and performs synthetic identification information. (The sum of the model ID and the series ID) can be obtained.

Further, the effect control device 300 can also acquire (grasp) synthetic identification information from the model designation command received when the power is turned on by referring to the reference table (FIG. 48). In the effect control device 300, a reference table in which a model designation command as shown in FIG. 48, which will be described later, and synthetic identification information are associated with each other is stored in a memory (for example, RAM 322, FeRAM 323, etc.) of the gaming machine. It holds synthetic identification information corresponding to the model and series.

Next, the effect control device 300 determines whether or not the part identification information and the composite identification information match (B5005). When the parts identification information and the synthetic identification information do not match (the result of B5005 is "N"), the error notification notifies that the parts identification information and the synthetic identification information do not match (B5006). That is, it notifies that the part 510 is attached to the wrong model or series that does not conform to (correspond to) the part 510. The effect control device 300 may execute error notification (warning) by generating sounds from the speakers 19a and 19b or displaying characters on the display device 41. Further, here, the effect control device 300 may notify the correct model or series that conforms to (corresponds to) the part 510 together with the error notification by referring to the reference table of FIG. 48. The correct model or series is a model that has the same synthetic identification information as the part identification information of the part 510.

Subsequently, the effect control device 300 sets the initial value of the collation time timer (B5007), and ends the parts collation process. Therefore, the part identification information and the synthetic identification information are periodically compared (verified) each time the time corresponding to the initial value of the collation time timer elapses, starting from the time when the power is turned on. The initial value of the collation time timer is, for example, a time corresponding to several minutes, but is not limited to this.

On the other hand, when the part identification information and the synthetic identification information match (the result of B5005 is "Y"), the effect control device 300 is attached to the correct model in which the part 510 conforms to (corresponds to) the part 510. The initial value of the collation time timer is set (B5007) without notifying the error, and the parts collation process is terminated.

As a modification, the effect control device 300 may hold only the synthetic identification information corresponding to one type of model and series in the memory (for example, RAM 322 or FeRAM 323) instead of the reference table of FIG. 48. Also in this case, the effect control device 300 compares the part identification information read from the parts 510 with the held synthetic identification information, and if the parts identification information and the synthetic identification information do not match, the parts are inconsistent. Notify as an error.

[Reference table]
FIG. 48 is a diagram showing a reference table (FIG. 48 (A)) for associating the model designation command according to the second embodiment with synthetic identification information and a reference table (FIG. 48 (B)) for classifying nonconforming models. be.

As shown in FIG. 48 (A), the memory of the effect control means 300 (RAM 322, FeRAM 323 (FIG. 4), etc.) includes the type of the gaming machine 10 (for example, types AD) and the gaming machine 10 of the type. A table of model specification commands and synthetic identification information corresponding to the model and series is stored.

For example, the type A is associated with a model designation command A corresponding to the model A main machine of the gaming machine 10 and synthetic identification information (for example, "00000100" (hexadecimal "04h")).

Further, the type B is associated with a model designation command B corresponding to the model A Amadeji machine of the gaming machine 10 and synthetic identification information (for example, "000000101" (hexadecimal "05h")).

Type C is associated with a model designation command C corresponding to the model B main machine of the gaming machine 10 and synthetic identification information (for example, "00010000" (hexadecimal "10h")), and type D is associated with the gaming machine. The model designation command D corresponding to the 10 model B Amadeji machines is associated with the composite identification information (for example, "00010001" ("11h" in hexadecimal)).

Therefore, for example, the model of the type A and B gaming machine 10 in which the upper 6 digits of the synthetic identification information is "000001" is the model A, and the model of the type C and D gaming machine 10 in which the upper 6 digits are "000100". The model of is model B. Further, for example, the series of the type A and C gaming machines 10 in which the lower two digits of the synthetic identification information is "00" becomes the main machine, and the series of the type B and D gaming machines 10 in which the lower two digits of the synthetic identification information are "01" are sweet. Become a digital machine.

Then, by executing the parts collation process of FIG. 47 described above, for example, when the parts 510A for the model A main machine are attached to the model A main machine of the gaming machine 10 (FIG. 38), The synthetic identification information (for example, "00000100") and the parts identification information (for example, "00000100") match, and the part 510 is determined to be a standard product suitable for the gaming machine 10, and error notification is not executed. Therefore, driving (light emission) of the frame decoration device 18 (or the board decoration device 46) is permitted.

On the other hand, when the part 510B for the model A Amadeji machine and the part 510C for the model B main machine are attached to the model A main machine of the gaming machine 10 (FIGS. 39 (A) and (B)), The synthetic identification information (for example, "00000100") and the parts identification information (for example, "00000011" or "00010000") do not match, and it is determined that the parts 510 are not compatible with the gaming machine 10, and error notification is executed. Further, along with the error notification, the driving (light emission) of the frame decoration device 18 (or the board decoration device 46) is also prohibited.

In addition to the error notification, the correct series (Amadeji machine) suitable for the part 510B and the correct model (model B) suitable for the part 510C may be notified.

If the part identification information does not match any of the combined identification information of types A to D, it is determined that the part 510 is a non-standard product (non-conforming model, non-conforming product) that is incompatible with the gaming machine 10. NS.

Even if the parts identification information and the synthetic identification information do not match (in the case of a non-conforming model), if the parts identification information matches any of the synthetic identification information of types A to D, the part 510 is referred to as the gaming machine 10. As shown in FIG. 48 (B), it can be determined whether or not the product is a compatible standard product (partially conforming product) by classifying it into the first to third categories of non-conforming models.

For example, in a conventional gaming machine, as a device for providing a gaming machine at a low cost, parts (parts 510) have been changed as a part (model element) of the frame decoration device 18. If the parts (parts 510) are not correct when changed on the spot, it may cause a failure. In addition, the frame decoration device 18 may be used incorrectly.

However, in the gaming machine 10 of the second embodiment, even if an erroneous unit (part 510B or part 510C) is attached, it is not always necessary to prohibit the driving of the frame decoration device 18 (or the board decoration device 46). Further, by allowing a part of the parts 510 to be driven within a range that does not affect the progress of the game, it is possible to reduce the cause of the failure.

Therefore, as shown in FIG. 48 (B), when the part identification information of the parts 510 does not match the synthetic identification information of the gaming machine 10 in the memory (RAM 322, FeRAM 323 (FIG. 4), etc.) of the effect control device 300. , A reference table for error classification for determining and classifying whether or not the part 510 is a standard product (partially conforming product) compatible with the gaming machine 10 is stored.

The part 510, which decorates the game board 30 (FIG. 2), includes an LED and a movable member that can be controlled by the effect control device 300. As shown in FIG. 48 (B), the part 510 can be classified into a part having only an LED and a part having an LED and a movable member according to the corresponding part identification information.

For example, when the upper two digits of the part identification number are "00" or "01", it can be determined that the part 510 has only the LED. Further, when the upper two digits of the part identification information are "10" or "11", it can be determined that the part 510 includes the LED and the movable member.

As shown in FIG. 84 (A), the parts identification information has a form in which the upper two digits can identify the corresponding types A to D of the gaming machine 10, but any other than the upper two digits can be used. The type A to D of the gaming machine 10 may be identified by two digits. In this case, it is possible to determine whether the part 510 includes only the LED or the LED and the movable member by any two digits other than the upper two digits of the part identification information. By comparing a part of the part identification information in this way, the type of the part 510 can be classified.

Specifically, when the part 510 is a non-conforming product, as shown in FIG. 48 (B), it is a compatible standard product and is compatible with the first classification provided only with the LED. Therefore, it can be classified into a second category including an LED and a movable member and a third category which is a nonstandard product.

Regarding the first classification, as long as the part 510 is a compatible standard product, the LED rating of the part 510 corresponds to the gaming machine 10, so that the lighting of the LED can be allowed.

Regarding the second classification, the LED and the movable member of the part 510 can be driven because the rating also corresponds to the gaming machine 10 as long as the part 510 is a standard product. However, if the operation mode of the movable member corresponding to the gaming machine 10 is different due to the difference in the model such as the reciprocating operation and the orbiting operation, the part 510 may be damaged. Therefore, in the second classification, it is necessary to prohibit the driving (movement, rotation, etc.) of the movable member of the part 510 while allowing the driving (light emission) of the LED.

Regarding the third classification, if the parts 510 are incompatible non-standard products, the ratings of the LEDs and movable members may differ from those of the gaming machine 10, and when these are driven, the board on the gaming machine 10 side, etc. Therefore, it is necessary to prohibit the driving of the LED and the movable member of the part 510 regardless of the presence or absence of the LED and the movable member.

When the part 510 is configured as a part of the board decoration device 46, the main control microcomputer 311 may limit only the signal related to the part 510 among the signals transmitted to the board decoration device 46, for example. When the part 510 belongs to the second category, the transmission of the signal related to the LED of the part 510 is permitted and the transmission of the signal related to the movable member is prohibited. For example, when the part 510 belongs to the third category, the part The transmission of signals related to the 510 LED and the movable member may be prohibited.

For example, when the I ² CI / O expander 815 shown in FIG. 44B drives the board decoration device 46, for example, PORT1 is a port for driving the LED of part 510, and PORT2 is a movable member (motor) of part 510. In the case of a port for driving a panda, the output of signals belonging to the addresses of PORT1 and PORT2 may be prohibited.

Further, when the part 510 is configured to be independent of the board decoration device 46, the main control microcomputer 311 allows the transmission of the signal related to the LED of the part 510 when the part 510 belongs to the second category. At the same time, the transmission of the signal related to the movable member may be prohibited, and when the part 510 belongs to the third category, the transmission of the LED related to the LED of the part 510 and the signal related to the movable member may be prohibited.

From the above, the effect control device 300 (main control microcomputer 311) has the part identification information (first identification information) transmitted from the parts 510 and the composite identification information (second identification information and third identification) included in the effect control device 300. Comparing with the information (combined value with information), it is determined whether the part 510 is a conforming model (standard product, conforming product) that conforms to the gaming machine 10 or a non-conforming model (non-standard product, non-conforming product) that does not conform. It can be determined.

If the part 510 is a non-conforming model that does not conform to the gaming machine 10, refer to the table shown in FIG. 48 (B) to see how compatible the parts 510 are with the gaming machine 10 (partially compatible). It is possible to perform error classification to determine and classify whether it is a product).

[Modification example of parts matching process]
FIG. 49 is a flowchart showing a procedure of a modification of the parts collation process executed by the effect control device 300. In the modified example of the parts collation process of FIG. 49, the effect control device 300 changes the drive (light emission) limit by performing error classification of the parts 510.

In the modified example of the parts collation process of FIG. 49, the same process as the parts collation process of FIG. 47 is executed, but after the error notification (B5006) is performed, the error classification process of the part identification information is performed ( B5006b). Further, similarly to FIG. 49, the frame decoration device operation prohibition (B5006a) may be executed between steps B5006 and B5006b in order to prohibit the driving of the frame decoration device 18.

When the effect classification process (B5006b) determines that the part identification information belongs to the first classification, the effect control device 300 allows the LED of the part 510 to be driven (light emitting) (B5006c).

Further, when the effect classification process (B5006b) determines that the part identification information belongs to the second classification, the effect control device 300 allows the LED of the part 510 to be driven (light emission), while the movable member of the part 510 is movable. (B5006d).

Further, when the effect control device 300 determines in the error classification process (B5006b) that the part identification information belongs to the third classification, the effect control device 300 prohibits the driving (light emission) of the LED and the movable member of the part 510 (B5006e). ..

In this way, even if the attached parts 510 are used incorrectly, the drive (light emission) of the parts 510 is restricted by the error classification executed by the effect control device 300 so as not to affect the progress of the game. Since the factors that cause failure can be reduced, it is possible to extend the service life.

[Action / effect of the second embodiment]
The game machine 10 according to the present embodiment has a game control means (game control device 100) capable of executing a game (variable display game, special figure variable display game) and an effect control means (game control device 100) capable of executing a game-related effect. It is provided with an effect control device 300). The gaming machine 10 includes removable parts (parts 510) to which electrically readable first identification information (part identification information, unit ID) is assigned. The effect control means includes a second identification information (model identification information, model ID) corresponding to the model of the gaming machine 10 and a third identification information (series identification information, series ID) corresponding to the series of the gaming machine 10. Is configurable, and when the setting is made, the second identification information and the third identification information are combined, and the value obtained by the synthesis is held as the combined identification information (synthetic identification data), and the part (part). The first identification information of 510) is read and compared with the synthetic identification information, and when the first identification information and the synthetic identification information do not match, it is notified that the first identification information does not match (error notification).

According to such a gaming machine 10, the first identification information (part identification information, unit ID) of the part (part 510) is read and compared with the synthetic identification information (synthetic identification data), and the first identification information and the synthetic identification are obtained. When the information does not match, an error notification is performed to notify that the information does not match. Therefore, when a part that does not correspond to the model or series of the gaming machine 10 is attached, the parts attached to the gaming machine 10 You can quickly and easily judge the mistake

Further, in the gaming machine 10 according to the present embodiment, the effect control means (effect control device 300) can shift to the identification information setting state (ID change mode) in which the setting can be made, and during the identification information setting state, the second The value that can be set as the identification information (model identification information, model ID) or the third identification information (series identification information, series ID) can be changed or added.

According to such a gaming machine 10, by replacing some parts (for example, parts 510) with corresponding ones without replacing the entire gaming board 30, the model designation (specs) of the gaming machine 10 can be performed easily and inexpensively. Can be changed.

[Third Embodiment]
The gaming machine 10 of the third embodiment will be described with reference to FIGS. 50 to 69. The configuration other than that described below may be the same as that of the first embodiment or the second embodiment. Further, in the following embodiments, the same reference numerals are used for configurations that perform the same functions as those of the first embodiment or the second embodiment, and duplicate descriptions will be omitted as appropriate.

[Game control device]
FIG. 50 is a block diagram showing a configuration example of the game control system according to the third embodiment. In FIG. 50, unlike FIG. 3 of the first embodiment, in the game control device 100 (main board, main board), the output port 134-137 does not exist, the electric circuit is simplified, and the number of wires (number of signals) is increased. ) Is reduced, and a sufficient space (place) for arranging electronic parts and the like can be secured. This is because the communication between the gaming microcomputer 111 (CPU111a) and the drivers 138a-138d, 150 and the relay board 70 is performed by serial communication instead of the conventional parallel communication as described below. In the first embodiment, serial communication is performed between the game microcomputer 111 and the effect control device 300, between the game microcomputer 111 and the payout control device 200, and between the game microcomputer 111 and the inspection device 500. It doesn't change.

The data from the serial port 173a (first serial port) of the gaming microcomputer 111 is transmitted to the driver 138a-138d and the driver 150 by serial communication (serial method) via the serial signal line 174a. The data from the serial port 173b (second serial port) of the game microcomputer 111 is transmitted to the relay board 70 by serial communication (serial method) via the serial signal line 174b. In FIG. 3 of the first embodiment, data is transmitted from the gaming microcomputer 111 via the data bus 140 by parallel communication (parallel method). In the present embodiment, the serial communication is a synchronous serial communication, and is performed by, for example, an SPI (serial peripheral interface), but is not limited thereto.

In the present embodiment, the drivers 138c and 138d are each a part of one driver IC chip 156 (integrated circuit chip, electronic component). The drivers 138b and 150 are each a part of one driver IC chip 157 (integrated circuit chip, electronic component). In addition, each driver may be provided as one IC chip.

The game control device 100 (main board) has a connector portion 160 (CN1) for connecting to a relay board 70 that supplies a test firing test signal to the test firing test device, and the relay board 70 is a game control device 100 (main board). It has a connector portion 162 (CN2) for connecting to the substrate). The connector portion 160 and the connector portion 162 are outlets for electric wires such as cables (or harnesses), and are electrically connected to each other by cables or the like. Similar to the buffer 133, the connector portion 160 (CN1) is also a component that is not mounted on the game control device (main board) of the pachinko gaming machine as an actual machine (mass production product) installed in the game store.

[Circuit diagram of game control device]
51 and 52 are circuit diagrams illustrating a part of an electric circuit (electronic circuit) provided in the game control device 100 (main board, main board) according to the third embodiment. The positions of electronic components (IC chips, etc.), elements, terminals, etc. in the circuit diagram may be irrelevant to the positions where they are actually arranged on the substrate. The terminal may be, for example, a pin. In this embodiment, the substrate means a circuit board such as a printed circuit board.

The serial port 173a of the gaming microcomputer 111 includes a terminal A1 for a serial data signal (TXA), a terminal A2 for a serial clock signal (CKA), and a terminal A3 for a chip select signal (SA0) (slave select signal) ( (See FIG. 51). The wiring connected to the terminal A1 is a data line 194 (194a, 194b) for transmitting a serial data signal (TXA), and the wiring connected to the terminal A2 is a clock line for transmitting a serial clock signal (CKA). It becomes 195 (195a, 195b), and the wiring connected to terminals A3 and A4 becomes a chip select line 196 (196a, 196b) for transmitting a chip select signal (SA0, SA1). Since only the serial data is output from the gaming microcomputer 111 (master) by serial communication, the terminal A1 is a terminal for serial data output, and the terminal for serial data input from the slave is omitted. .. The chip select signal is a signal for selecting a slave (IC chip) that enables an input operation or an output operation.

The serial signal line 174a (FIG. 50) from the serial port 173a of the gaming microcomputer 111 transmits at least the data line 194 (signal line) for transmitting the serial data signal (TXA) and the serial clock signal (CKA). It is composed of a clock line 195 (signal line) for the purpose.

The serial port 173b of the gaming microcomputer 111 includes a terminal B1 for a serial data signal (TXB), a terminal B2 for a serial clock signal (CKB), and a terminal B3 for a chip select signal (SB0) (slave select signal) ( See FIG. 52). The wiring connected to the terminal B1 becomes the data line 211 for transmitting the serial data signal (TXB), and the wiring connected to the terminal B2 becomes the clock line 212 for transmitting the serial clock signal (CKB), and the terminal B3 The wiring connected to is a chip select line 218 for transmitting the chip select signal (SB0).

Since only the serial data is output from the gaming microcomputer 111 (master) by serial communication, the terminal B1 is a terminal for serial data output, and the terminal for serial data input from the slave is omitted. .. Further, when serial communication is performed with only one IC chip (slave) by the serial port 173b, the chip select signal and its chip select line 218 can be omitted.

The serial signal line 174b (FIG. 50) from the serial port 173b of the gaming microcomputer 111 transmits at least the data line 211 (signal line) for transmitting the serial data signal (TXB) and the serial clock signal (CKB). It is composed of a clock line 212 (signal line) for the purpose.

[Circuit diagram related to serial communication between the game microcomputer and the driver]
FIG. 51A is a circuit diagram relating to serial communication between the game microcomputer 111 and each driver in the game control device 100, and is an electric circuit (electronic circuit) around the game microcomputer 111 and each driver IC chip. It is a circuit diagram which illustrates. FIG. 51A shows the transmission status of the external information signal from the serial port 173a of the gaming microcomputer 111, the LED drive signal of the batch display device 50, the LED drive signal to the performance display device 152, and the like. The LED drive signal is a signal to the digit line and the segment line of the batch display device 50 or the performance display device 152.

Each of the driver IC chips 156 and 157 is a 16-bit serial-parallel conversion circuit that converts a serial data signal (TXA) from the serial port 173a of the gaming microcomputer 111 into a parallel data signal. The driver IC chips 156 and 157 may be general ones having a shift register and a parallel data latch circuit (data register). The shift register is composed of, for example, a plurality of D-type flip-flops, and the bit data of one D-type flip-flop moves to the adjacent D-type flip-flop in synchronization with the serial clock signal (CKA). The parallel data latch circuit is composed of, for example, a plurality of D-type flip-flops, and latches (holds) and captures (sets) 16-bit data of the shift register at a predetermined latch timing for receiving a latch signal.

The driver IC chips 156 and 157 are cascade-connected (multi-stage connection), and the driver IC chip 156 constitutes the first stage and the driver IC chip 157 constitutes the second stage. The serial data signal (TXA) transmitted from the game microcomputer 111 by the data line 194a is input to the input terminal DIN of the driver IC chip 156, passes through the shift register of the driver IC chip 156, and is transmitted from the output terminal DOUT. It is possible to output. The serial data signal (TXA) output from the output terminal DOUT of the driver IC chip 156 is input to the input terminal DIN of the driver IC chip 157 and passes through the shift register of the driver IC chip 157.

The same serial clock signal (CKA) from the clock line 195a, the same chip select signal (SA0) from the chip select line 196a, and the same reset signal (RESET) from the reset line 197a are parallel to the driver IC chips 156 and 157. It is input to each input terminal SCK, input terminal / CS, and input terminal / RESET. Note that "/" indicates a negative logic terminal. The shift registers of the driver IC chips 156 and 157 operate synchronously with the same serial clock signal (CKA). The parallel data latch circuit of the driver IC chips 156 and 157 takes in the data of the shift register at the timing (latch timing) when the same chip select signal (SA0) is received as the latch signal. The data taken into the parallel data latch circuit of the driver IC chips 156 and 157 is simultaneously output from the parallel output terminals (PA0-PA7, PB0-PB7) as 16-bit parallel data. Therefore, the two driver IC chips 156 and 157 together form a 32-bit serial-parallel conversion circuit, and convert the serial data signal (TXA) into 32-bit parallel data. Further, the driver IC chips 156 and 157 are simultaneously reset (initialized) by the reset signal from the Schmidt buffer 125, and the internal data is cleared.

Of the parallel output terminals of the driver IC chip 156, terminals PA0-PA7 and PB0-PB2 are connected to terminals S17-S7 of the connector portion 181 (CN3), respectively. The terminals S17-S7 of the connector portion 181 (CN3) are connected to the external information terminal 71 by an electric wire such as a cable. Therefore, the signals from the parallel output terminals PA0-PA7 and PB0-PB2 of the driver IC chip 156 are transmitted to the external information terminal 71 as external information AK (external information signal). As described above, the shift register of the driver IC chip 156, the parallel data latch circuit, and the parallel output terminals PA0-PA7 and PB0-PB2 constitute the driver 138d (FIG. 50). Further, of the parallel output terminals of the driver IC chip 156, the terminal PB3 supplies a door signal indicating that the glass frame 15 or the like is open.

For example, the external information AK includes a call signal, an out signal, a security signal, a main prize ball signal, a jackpot 4 signal, a jackpot 3 signal, a jackpot 2 signal, a jackpot 1 signal, a start port signal, and a symbol confirmation count signal. It is a door / frame opening signal. The call signal is a signal for calling a staff member of the amusement park (hall), and the out signal is a signal based on the detection of the out ball detection switch 74. The security signal is a signal transmitted when there is an error or fraud such as magnet fraud or radio wave fraud. The main prize ball signal is a signal generated every time the number of prize balls (planned payout number) generated by winning a prize in the winning opening reaches a predetermined number (10 in this case).

The jackpot 1 signal, jackpot 2 signal, jackpot 3 signal, and jackpot 4 signal may be signals defined by the model as jackpot information, and should be turned on at the start of the jackpot and turned off at the end of the jackpot or the end of the time reduction. Signal. The start port signal is a winning signal of the start port based on the detection of the start port 1 switch 36a and the start port 2 switch 37a, and the symbol confirmation number signal indicates the number of times the special figure variation display game is executed (the number of symbol confirmations). The door / frame opening signal is a signal indicating that the glass frame 15 and the front frame (game frame) 12 are opened by the glass frame opening detection switch 63 and the front frame opening detection switch 64 (main body frame opening detection switch). ..

The security signal, the main prize ball signal, the start port signal, the door / frame opening signal, and the symbol confirmation count signal may be set by the external information editing process (A1319) of the timer interrupt process.

Of the parallel output terminals of the driver IC chip 156, the terminals PB4-PB7 are connected to the terminals L9-L12 of the connector portion 185 (CN4) via the gate driver 183, respectively. The connector portion 185 (CN4) is connected to the batch display device 50 by an electric wire such as a cable. The parallel output terminals PB4-PB7 are electrically connected to the digit wire (LED digit 0-3) to which the cathode terminal of the LED lamp (D1-D18) of the batch display device 50 is connected. As described above, the shift register of the driver IC chip 156, the parallel data latch circuit, and the parallel output terminals PB4-PB7 constitute the driver 138c (FIG. 50).

Since the first special figure fluctuation display unit 51 (lamp D1) and the second special figure fluctuation display unit 52 (lamp D2) of the batch display device 50 are 7-segment type (8-segment type when the dot Dp is inserted) display. , The batch display device 50 can be controlled by regarding it as a 4-digit × 8-segment LED display. In this case, the digit is selected for the digit line (LED digit 0-3).

The gate driver 183 is used for signal amplification and the like, and branches the wiring from terminals PB4-PB7 in two directions. Further, a pull-up resistor R1 is connected to the wiring from the terminals PB4-PB7. The input terminals I3 and I7 of the gate driver 183 are connected to the wiring from the terminal PB4 of the driver IC chip 156, and the input terminals I2 and I5 are connected to the wiring from the terminal PB5 of the driver IC chip 156. I1 and I8 are connected to the wiring from the terminal PB6 of the driver IC chip 156, and the input terminals I4 and I6 are connected to the wiring from the terminal PB7 of the driver IC chip 156. The signals of the input terminals I1-I8 are amplified and output from the output terminals O1-O8. The output terminal O5-O7 related to the digit wire is connected to the terminals L9-L12 of the connector portion 185 (CN4), while the output terminal O1-O4 related to the digit wire is a 4-digit 7-segment type (including the dot Dp). It is connected to the digit line (digit 0-3) of the performance display device 152, which is an 8-segment type LED display. The cost can be reduced by sharing the terminals PB4-PB7 between the digit line (digit 0-3) of the performance display device 152 and the digit line (LED digit 0-3) of the batch display device 50.

Of the parallel output terminals of the driver IC chip 157, the terminals PA0-PA7 are connected to the terminals L1-L8 of the connector portion 185 (CN4) via the resistor R2, respectively. The connector portion 185 (CN4) is connected to the batch display device 50 by an electric wire such as a cable. The parallel output terminals PA0-PA7 are electrically connected to the segment line (LED segment 0-7) to which the anode terminal of the LED lamp of the batch display device 50 is connected. As described above, the shift register of the driver IC chip 157, the parallel data latch circuit, and the parallel output terminals PA0-PA7 constitute the driver 138b (FIG. 50).

A current is passed through the segment wire (LED segment 0-7) of the batch display device 50 to the anode terminal of the LED, and the current is drawn from the cathode terminal that outputs the ground potential via the digit wire (LED digit 0-3). Then, a current flows through the LEDs sequentially selected by the dynamic drive method (dynamic lighting method) to light the LEDs.

Of the parallel output terminals of the driver IC chip 157, terminals PB0-PB7 are segment lines of the performance display device 152, which is a 4-digit 7-segment type (8-segment type including dot Dp) LED display. Electrically connect to (ag, Dp). As described above, the shift register of the driver IC chip 157, the parallel data latch circuit, and the parallel output terminals PB0-PB7 constitute the driver 150 (FIG. 50).

A current is passed through the anode terminal of the LED (light emitting member, segment) via the segment wire (ag, Dp) of the performance display device 152, and the current is passed from the cathode terminal that outputs the ground potential via the digit wire (digit 0-3). By drawing out the current, the current flows through the LEDs sequentially selected by the dynamic drive method and the LEDs are turned on. In this way, the performance display device 152 can display the probability set value, and as the performance display, performance information such as the accessory ratio, the ball ejection rate, the base value (the ball ejection rate in the normal gaming state), and the number of ejected balls. However, in the present embodiment, the base value is displayed in particular. The present embodiment can also be applied when the performance display device 152 displays performance information other than the base value. In addition, among the performance information, the accessory ratio, the ball output rate, and the base value are information related to the number of prize balls.

As described above, the external information signal, the LED drive signal of the batch display device 50 (signal to the digit line and the segment line), and the LED drive signal of the performance display device 152 (the signal to the digit line and the segment line) are for gaming. It is included in the serial data signal (TXA) synthesized by the output process (A1306) and transmitted by the microcomputer 111, and is output as a parallel data signal by the driver IC chips 156 and 157.

FIG. 51B is a circuit diagram relating to serial communication between the game microcomputer 111 and the solenoid driver 138a in the game control device 100, and is an electric circuit (electronic) around the game microcomputer 111 and the IC chip for the solenoid driver. It is a circuit diagram exemplifying the circuit). The status of transmission of the solenoid drive signal from the serial port 173a of the gaming microcomputer 111 is shown.

The IC chips 138a-1 and 138a-2 for the solenoid driver constitute a driver (drive circuit) 138a (FIG. 50) that generates and outputs a solenoid drive signal as a parallel data signal. The IC chip 138a-1 is a general 8-bit serial-parallel conversion circuit having a shift register and a parallel data latch circuit (data register). The IC chip 138a-2 is a Darlington current amplifier that amplifies a current signal from the IC chip 138a-1 by a Darlington connection in which a plurality of transistors are directly connected.

The serial data signal (TXA) transmitted from the gaming microcomputer 111 via the data line 194b is input to the input terminal SI of the IC chip 138a-1 and passes through the shift register of the IC chip 138a-1. The input terminal SCK, input terminal / G, and input terminal / SCLR of the IC chip 138a-1 have a serial clock signal (CKA), a gate signal (GATE) as an enable signal, and a reset signal from the Schmidt buffer 125, respectively. It is input by the clock line 195b, the enable signal line 198b (198), and the reset line 197b. The data line 194b may be branched from the data line 194a (FIG. 61A), and the clock line 195b may be branched from the clock line 195a (FIG. 51A).

The shift register of the IC chip 138a-1 is operated by a serial clock signal (CKA). The parallel data latch circuit of the IC chip 138a-1 takes in the data of the shift register by the chip select signal (SA1) input to the input terminal RCK. The chip select signal (SA1) here functions as a latch signal. The data taken into the parallel data latch circuit of the IC chip 138a-1 is output from the parallel output terminal (QA-QH) as an 8-bit parallel data signal when the gate signal (GATE) is input. The gate signal (GATE) functions as an enable signal that enables the output of the IC chip 138a-1. When the gate signal (GATE) is input to an output circuit such as a three-state buffer, a parallel data signal is output from the parallel output terminal (QA-QH) via an output circuit that enables output operation. Further, the IC chip 138a-1 is reset by the reset signal, and the internal data is cleared.

Of the parallel data signals generated from the serial data signal (TXA) by the IC chip 138a-1, the signal from the parallel output terminal QE is payout control as a launch permission signal for permitting the launch of the game ball by the ball launcher. It is output toward the device 200. The signals from the parallel output terminals QA-QC are output as a large winning opening solenoid drive signal, a lever solenoid drive signal, and a general electric solenoid drive signal, respectively. In other words, the big prize opening solenoid drive signal, lever solenoid drive signal, and general electric solenoid drive signal are transmitted from the gaming microcomputer 111 by being included in the serial data signal (TXA), and are transmitted by the IC chip 138a-1 as a parallel data signal. Is output as. Even if the number of solenoids differs depending on the model of the gaming machine 10, the drive signal for the solenoids is output from the gaming microcomputer 111 (CPU111a) by serial communication, so that the wiring required for parallel communication is required. The number of games can be reduced, and the game control device 100 (game control means) can be easily shared between different models.

Here, the large winning opening solenoid drive signal is a signal for driving the large winning opening solenoid 39b that opens the special variable winning device 39, and the lever solenoid drive signal drives the lever solenoid 86b that opens the specific area 86. The normal electric solenoid drive signal is a signal for driving the general electric solenoid 37c that opens the movable member 37b of the normal fluctuation winning device 37.

The IC chip 138a-2 amplifies the large winning opening solenoid drive signal, the lever solenoid drive signal, and the general electric solenoid drive signal from the parallel output terminals QA-QC of the IC chip 138a-1. The drive signals from the parallel output terminals QA-QC of the IC chip 138a-1 are input to the input terminals J1-J3 of the IC chip 138a-2 via the resistor R4, and are output from the output terminals K1-K3 after amplification. do. The large winning opening solenoid drive signal, lever solenoid drive signal, and general electric solenoid drive signal from the output terminals K1-K3 are not only transmitted to the large winning opening solenoid 39b, lever solenoid 86b, and general electric solenoid 37c, respectively, as well. It is also transmitted to the relay board 70 (FIG. 50).

[Circuit diagram related to serial communication between the game microcomputer and the relay board]
FIG. 52 illustrates a circuit diagram related to serial communication between the game microcomputer 111 and the relay board 70 in the game control device 100 (main board), and also shows the game microcomputer 111 and the connector unit 160 (CN1). It is a circuit diagram which illustrates the peripheral electric circuit (electronic circuit).

As serial signals output from terminals B1-B3 of the serial port 173b of the gaming microcomputer 111, the serial data signal (TXB), the serial clock signal (CKB), and the chip select signal (SB0) are each connected to the connector portion 160 (CN1). ) Serial data signal (TXB) terminal D7 (signal terminal), serial clock signal (CKB) terminal D6 (signal terminal), chip select signal (SB0) terminal D3 (chip select terminal) and buffer 133 Is transmitted via. When serial communication is performed with only one IC chip (slave) by the serial port 173b, the chip select signal and the chip select line 218 to which the chip select signal is transmitted may be omitted in some cases.

The serial data signal (TXB) includes a test firing test signal transmitted to the relay board 70 that is electrically connected to the connector unit 160 (CN1). Unlike the conventional parallel data signal, the test firing test signal for the gaming machine 10 is transmitted as a serial data signal (TXB) from the gaming microcomputer 111 to the relay board 70. The test firing test signal is a signal in which information necessary for the test firing test, such as information on turning on / off of the various switches shown in FIG. 50, is captured by the gaming microcomputer 111 (CPU111a) and collectively transmitted as serial data. Therefore, even if the number of switches differs for each model of the gaming machine 10, the wiring for each switch required for parallel communication can be reduced, and the gaming control device 100 (game control means) is shared between different models. It becomes easy to become.

The serial data signal (TXB) is converted into a parallel data signal on the relay board 70, and then output to a test firing test apparatus for performing a test firing test. Therefore, it becomes easy to standardize the relay board 70 between different models only by preparing the wiring necessary for serial communication in advance on the relay board 70 (relay means).

Examples of the above-mentioned various switches include a gate switch 34a, a start port 1 switch 36a, a start port 2 switch 37a, a winning port switch 35a, a large winning port switch 39a, a specific area switch 72, and a remaining ball discharge port switch 73. The solenoid drive signal as the test firing test signal is transmitted from the driver 138a to the relay board 70 by another route as described above.

In the timer interrupt processing (interrupt processing program, part of the game control program) of FIG. 6A, on / off information (on / off signals) of various switches is input to and captured by the game microcomputer 111 (CPU111a) (input processing (A1303)). , Winning port switch / state monitoring process (A1310)), and then transmission processing as a test firing test signal of serial data (test firing test signal output processing (FIG. 57) described later).

Further, as the test firing test signal transmitted in the test firing test signal output process (FIG. 57), the symbol 1 signal (set in A7916) corresponding to the stop symbol number of the normal figure variation display game and the stop of the special figure 1 variation display game. Regarding the start of fluctuation of the symbol 2 signal (set by A3403) corresponding to the symbol number, the symbol 3 signal (set by A3503) corresponding to the stop symbol number of the special figure 2 variation display game, and the normal symbol (ordinary symbol, ordinary identification information). Regarding the fluctuation signal of normal figure 1 (set by A7922), the fluctuation signal of special figures 1 and 2 (set by A3205 and A3210) regarding the fluctuation start of special figures 1 and 2, and the fluctuation end of special figures 1 and 2. Signal (set by A2609), normal hit signal (set by A7610) regarding the start of hitting the normal figure, special 1 and 2 hit signals related to the start of the big hit of special figures 1 and 2 (set by A2610), right-handed Signals related to instructions or left-handed instructions (on / off of launch position designation signal 1) (set by A2610, A2614, etc.), signals related to opening start and end of opening of the big winning opening (on / off of special electric accessory 1 operating signal) (A2611 , A2613).

Further, as the test firing test signal transmitted in the test firing test signal output process (FIG. 57), a signal relating to the start of operation and the end of normal electric operation of the normal variable winning device 37 (on / off of the signal during operation of the normal electric accessory 1) and high Signals related to the start and end of the stochastic state (special symbol 1 high probability state signal on / off, special symbol 2 high probability state signal on / off), time reduction start and end signals (special symbol 1 variable time shortened state signal on / off, special symbol (2) On / off of the fluctuation time shortened state signal, on / off of the normal symbol 1 high probability state signal, on / off of the normal symbol 1 fluctuation time shortened state signal, etc.), a game machine error state signal indicating the occurrence of an error of the game machine 10, and the like.

Before executing the test firing test signal output process (FIG. 57), the data of each of the above test firing test signals is stored and set in the test signal output data area in the first RAM area (FIG. 63) of the RAM 111c. Has been done.

The test firing test signal for the gaming machine 10 is transmitted to the relay board 70 as a serial data signal (TXB) via the connector unit 160 (CN1).

Further, the gaming microcomputer 111 has a terminal OE to which an enable line 214 (enabled wiring) that enables the operation of the serial-parallel conversion circuit 192 (predetermined circuit) provided on the relay board 70 is connected. The enable signal (OE) output from the terminal OE of the game microcomputer 111 is transmitted to the enable signal terminal D2 (enabled terminal) of the connector unit 160 (CN1) via the buffer 133. The wiring to which the enable signal is transmitted is referred to as the enable line 214. A pull-up resistor R is connected to the enable line 214 before connecting to the buffer 133.

Further, the reset signal (Reset) from the Schmidt buffer 125 is transmitted to the terminal D10 (reset terminal) for the reset signal of the connector unit 160 (CN1) via the buffer 133. The wiring to which the reset signal is transmitted is referred to as the reset line 216 (reset wiring).

In addition, the connector portion 160 (CN1) has grounded grounding terminals D1, D4, D5, D8, D9 and power supply terminals D11, D12 to which a voltage of 5V is supplied.

The buffer 133 is a three-state buffer, and when the input to the / 1G terminal is L level (GND), the logical value (L or H) of the input to the input terminal 1A1-1A4 is used as it is as the output terminal 1Y1-1Y4. When the input to the / 1G terminal is H level, the input terminal 1A1-1A4 and the output terminal 1Y1-1Y4 are in a high impedance state and are electrically disconnected. When the input to the / 2G terminal is L level (GND), the buffer 133 outputs the logical value (L or H) of the input to the input terminal 2A1-2A4 as it is from the output terminal 2Y1-2Y4, and outputs / 2G. When the input to the terminal is H level, the input terminal 2A1-2A4 and the output terminal 2Y1-2Y4 are in a high impedance state and are electrically disconnected. Note that "/" indicates a negative logic terminal.

The buffer 133 is provided as an option to correct the voltage (L level or H level) of the logical value and is provided. When the wiring between the gaming microcomputer 111 and the connector portion 160 (CN1) is short, the buffer 133 is provided. 133 is no longer needed.

In FIG. 52, since the inputs to the / 1G terminal and the / 2G terminal are L level (GND), the signals input to the input terminals 1A1-1A4 and 2A1-2A4 are the output terminals 1Y1-1Y4 and 2Y1-2Y4, respectively. Output from. Therefore, the reset signal (RESET), serial data signal (TXB), serial clock signal (CKB), chip select signal (SB0), and enable signal (OE) are input terminals 1A1, 1A3, 1A2, 1A4 of the buffer 133, respectively. , 2A1 and output from the output terminals 1Y1, 1Y3, 1Y2, 1Y4, 2Y1 toward the connector unit 160 (CN1). Output terminal 1Y1 for reset signal (RESET), output terminal 1Y3 for serial data signal (TXB), output terminal 1Y2 for serial clock signal (CKB), output terminal 1Y4 for chip select signal (SB0), enable signal ( The output terminal 2Y1 for OE) is connected to the terminal D10, the terminal D7, the terminal D6, the terminal D3, and the terminal D2 of the connector portion 160 (CN1) by wiring, respectively.

〔Relay board〕
FIG. 53 is a circuit diagram illustrating a circuit diagram relating to the relay board 70, and also exemplifying an electric circuit (electronic circuit) around the connector portion 162 (CN2) and the serial-parallel conversion circuit 192.

In the present embodiment, the relay board 70 is also a double-sided printed circuit board (double-sided board) like the board (main board) of the game control device 100. In this embodiment, circuit components (electronic components such as ICs and connectors) are arranged on the upper surface of the relay board 70. The circuit components may be arranged on both sides or the lower surface of the relay board 70. In the relay board 70, the wiring of the data line 211, the clock line 212, the enable line 214, the reset line 216, the chip select line 218, and the terminals to which they are connected are on the upper surface (front side, upper layer) and the lower surface (back side, lower layer). Of these, it is placed on the upper surface (or the lower surface). The relay board 70 may be a general multi-layer printed circuit board (multi-layer board). In this case, in the relay board 70, the wiring of the data line 211, the clock line 212, the enable line 214, the reset line 216, the chip select line 218, and the terminals to which they are connected are arranged in the outer layer (top layer, surface layer). The inner two layers (inner layers) become the power supply layer and the ground layer (ground layer, GND layer).

The connector portion 162 (CN2) of the relay board 70 is connected to the connector portion 160 (CN1) of the game control device 100 (main board) by an electric wire such as a cable. The terminals F1-F12 of the connector portion 162 (CN2) correspond to the terminals D1-D12 of the connector portion 160 (CN1) and are electrically connected to each other. The connector portion 162 (CN2) has grounded ground terminals F1, F4, F5, F8, F9 and power supply terminals F11, F12 to which a voltage of 5 V is supplied.

In the present embodiment, in the relay board 70 (double-sided board), the ground terminals F1, F4, F5, F8, and F9 on the upper surface are through holes or penetrate through the ground wires (not shown) existing on the lower surface (back side, lower layer). It is connected by vias and is grounded. The power supply terminals F11 and F12 on the upper surface are connected to the power supply lines (not shown) existing on the lower surface (back side, lower layer) by through holes, through vias, or the like. The grounding wire (not shown) to which these grounding terminals are connected and the power supply line (not shown) to which the power supply terminal is connected may exist on the upper surface (front side, upper layer). When the relay board 70 is a multilayer board, the ground terminals F1, F4, F5, F8, and F9 are connected to the internal ground layer (ground layer, GND layer) by through holes, through vias, or the like. Further, the power supply terminals F11 and F12 are connected to the internal power supply layer by through holes, through vias, or the like.

The serial data signal (TXB), serial clock signal (CKB), chip select signal (SB0), enable signal (OE), and reset signal (RESET) from the connector unit 160 (CN1) are each connected to the connector unit 162 (CN2). The terminals F7, F6, F3, F2, F10 of the above are transmitted to the data line 211, the clock line 212, the chip select line 218, the enable line 214, and the reset line 216.

The serial data signal (TXB), serial clock signal (CKB), chip select signal (SB0), enable signal (OE), and reset signal (RESET) are input to the serial-parallel conversion circuit 192 via the buffer 191. The serial-parallel conversion circuit 192 converts the test-fire test signal (serial data) included in the serial data signal (TXB) into a parallel data signal and outputs the test-fire test signal as parallel data.

The buffer 191 is a three-state buffer like the buffer 133, and corrects and outputs a logical value voltage (L level or H level). The buffer 191 uses the logical value (L or H) of the input to the input terminals NA1-NA8 as it is from the output terminal NY1-NY8 when the inputs to the / 1G terminal and the / 2G terminal are both L level (GND). When the output is made and either the input to the / 1G terminal or the input to the / 2G terminal is H level, the input terminal NA1-NA8 and the output terminal NY1-NY8 are in a high impedance state and are electrically disconnected. Note that "/" indicates a negative logic terminal. In FIG. 53, the inputs to the / 1G terminal and the / 2G terminal are both L level (GND), and the signals of the input terminals NA1-NA8 are output from the output terminals NY1-NY8, respectively.

The reset line 216 and the data line 211 from the connector unit 162 (CN2) are connected to the input terminals NA1 and NA2 of the buffer 191. The reset signal (RESET) of the reset line 216 and the serial data signal (TXB) of the data line 211 are input to the input terminals NA1 and NA2 of the buffer 191, respectively, and directed from the output terminals NY1 and NY2 to the serial parallel conversion circuit 192. And output.

On the other hand, the clock line 212 is bifurcated and connected to the input terminals NA3 and NA4 of the buffer 191. The serial clock signal (CKB) of the clock line 212 is input to the input terminals NA3 and NA4 of the buffer 191 and output from the output terminals NY3 and NY4 as serial clock signals CKB1 and CKB2 toward the serial parallel conversion circuit 192.

The chip select line 218 is bifurcated and connected to the input terminals NA5 and NA6 of the buffer 191. The chip select signal (SB0) of the chip select line 218 is input to the input terminals NA5 and NA6 of the buffer 191 and output from the output terminals NY5 and NY6 as chip select signals SB01 and SB02 toward the serial parallel conversion circuit 192. ..

The enable line 214 is bifurcated and connected to the input terminals NA7 and NA8 of the buffer 191. The enable signal (OE) of the enable line 214 is input to the input terminals NA7 and NA8 of the buffer 191 and output from the output terminals NY7 and NY8 as enable signals OE1 and OE2 toward the serial parallel conversion circuit 192.

Before connecting to the buffer 191, a pull-up resistor R is connected to the data line 211, the clock line 212, the enable line 214, the reset line 216, and the chip select line 218.

The serial-parallel conversion circuit 192 is composed of 10 cascade-connected 8-bit serial-parallel conversion IC chips 192a-192j, and converts a maximum 8 × 10-bit serial data signal (TXB) into a parallel data signal for a test firing test signal. Can be output as. The serial data signal (TXB) sequentially passes through the serial-parallel conversion IC chip 192a-192j.

The five 8-bit serial-parallel conversion IC chips 192a-192e (first group) and the five 8-bit serial-parallel conversion IC chips 192f-192j (second group) have branched serial clock signals CKB1 and CKB2, respectively. , Chip select signals SB01 and SB02, and enable signals OE1 and OE2 are simultaneously input in parallel. Therefore, the serial-parallel conversion IC chip 192a-192e of the first group and the serial-parallel conversion IC chip 192f-192j of the second group operate in synchronization, and at the same time, the parallel data signals (test firing test) are simultaneously performed by the enable signals OE1 and OE2. Signal) is output. Further, a reset signal (RESET) can be simultaneously input to each serial-parallel conversion IC chip 192a-192j in parallel. That is, each serial-parallel conversion IC chip 192a-192j is reset (initialized) at the same time by the reset signal for the serial-parallel conversion circuit 192, and the internal data is cleared.

Each serial-parallel conversion IC chip 192a-192j is a general 8-bit serial-parallel conversion circuit having a shift register and a parallel data latch circuit (data register). The chip select signals SB01 and SB02 (SB0) function as latch signals. The parallel data latch circuit takes in the shift register data by the chip select signals SB01 and SB02. The data taken into the parallel data latch circuit of each serial-parallel conversion IC chip 192a-192j is output as an 8-bit parallel data signal when the enable signal OE (OE1 or OE2) is input. When the enable signal OE is input to an output circuit such as a three-state buffer, a parallel data signal is output via an output circuit that enables output operation.

[Main processing (game control device)]
FIG. 54 is a flowchart showing the procedure of the latter half of the main process according to the third embodiment. The processing other than step A1043a is the same as the main processing (FIG. 5B) of the first embodiment, and the description thereof will be omitted.

The game control device 100 saves the normal base state information in the normal base state determination area (normal base state determination flag area) in step A1043a between steps A1043 and A1044. Here, the normal base state information is a value (for example, 55h = 01010101B) indicating a normal game state in which a base value (ball output rate in the normal game state) can be obtained.

When the RAM is initialized (RAM clear) (the result of A1041 is "Y") or when the variable setting state (setting change mode) is finished (the result of A1040 is "Y"), the RAM initial of step A1042-A1043 Since the conversion process is executed, the gaming state after step A1043 becomes the normal gaming state.

In a special game state (big hit state) or a specific game state (probability change state, time saving state) other than the normal game state, the base state information other than the normal is saved in the normal base state determination area. The non-normal base state information is a value (for example, 00h = 00000000B) indicating a special game state or a specific game state in which a base value (ball output rate in the normal game state) cannot be obtained.

[Timer interrupt processing]
FIG. 55 is a flowchart showing a procedure of timer interrupt processing according to the third embodiment. The processing other than steps A1319a and A1321-A1323 is the same as the timer interrupt processing (FIG. 6A) of the first embodiment, and the description thereof will be omitted.

After step A1319, the game control device 100 saves (PUSH) the information (value) of the flag register 1200 (see FIG. 64), which will be described later, into the stack area of the RAM 111c in step A1319a. The stack area is, for example, a game control stack area described later. Then, the performance display monitor control process (performance display setting process) that controls the display of the performance display device 152 is executed (A1320). The details of the performance display monitor control process (performance display setting process) according to the third embodiment will be described later.

After that, the game control device 100 returns (POP) the information of the saved flag register 1200 from the stack area of the RAM 111c (A1321).

Next, the game control device 100 determines whether or not the initial display setting flag is on (A1322). The initial display setting flag is stored in the initial display setting flag area (FIG. 63) of the RAM 111c, and is set to the ON state as an initial value at the time of RAM initialization, for example, when the gaming machine 10 is powered on (or the power is restored). (A1043). By setting the initial display setting flag to ON, the performance display device 152 executes the initial display for a predetermined period (for example, about 5000 ms) immediately before the start of the display of the performance display (performance information) after the power is turned on. The initial display is executed in the initial display timer update process (FIG. 59) described later, and is for confirming the operation of all segments of each digit of the performance display device 152.

When the initial display setting flag is on (the result of A1322 is “Y”), the game control device 100 clears the initial display setting flag (A1323) and ends the timer interrupt process. When the initial display setting flag is off (the result of A1322 is "N"), the timer interrupt processing is terminated as it is. As a result, the initial display setting flag is set to the off state at the end of the first timer interrupt process after the power of the gaming machine 10 is turned on (or the power is restored). That is, only immediately after the power is turned on, the initial display setting flag is set to ON, and the initial display is executed only once by the performance display device 152.

[Output processing]
Next, the details of the output processing (A1306) in the above-mentioned timer interrupt processing will be described. FIG. 56 is a flowchart showing a procedure of output processing according to the third embodiment.

The game control program includes a main program corresponding to the main processing (FIGS. 5 and 54) and an interrupt processing program corresponding to the timer interrupt processing. The output processing program, which is a subroutine of the interrupt processing program and corresponds to the output processing, becomes a part of the game control program stored (stored) in the first ROM area (FIG. 62) of the ROM 111b.

First, the game control device 100 outputs off-data to the port that outputs the data of the segments (ag, Dp, LED segment 0-7) of the performance display device 152 and the batch display device (LED) 50, and resets the data ( A1501). In this embodiment, this port is a serial port 173a capable of outputting data to the driver IC chip 157.

The off-data of the segment of the performance display device 152 is output to the segment lines (ag, Dp) of the performance display device 152 via the parallel output terminals PB0-PB7 of the driver IC chip 157 of FIG. 51A. The off-data of the segment of the batch display device (LED) 50 is output to the segment line (LED segment 0-7) of the batch display device (LED) 50 via the parallel output terminals PA0-PA7 of the driver IC chip 157. NS.

Next, the game control device 100 acquires digit output data as output data of the LED digit line corresponding to the value of the digit counter (A1502). For example, the digit output data is "1110000B", "11010000B", "10110000B", and "01110000B" with respect to the current digit counter values 0 to 3. Next, the digit output data of the acquired digit line and the external information data are combined (A1503), and the combined data is output to the digit / external information output port (A1504). In this embodiment, the digit / external information output port is the serial port 173a.

As shown in FIG. 51A, the digit output data is transmitted to the digit line (LED digit 0-3) of the batch display device 50 and the performance display device 152 via the shared parallel output terminals PB4-PB7 of the driver IC chip 156. It is output to the digit line (digit 0-3) of. The digit output data here is for turning off the digits (lighting digits, display digits) selected before updating the digit counter value by +1 in step A1506 described later with the segment off data. The external information data here corresponds to a door signal, a door / frame opening signal, a symbol confirmation count signal, and a start port signal, and is via the parallel output terminal PB0-PB3 of the driver IC chip 156, the external information terminal 71, etc. Is output to.

Subsequently, the game control device 100 synthesizes and outputs various output data of external information to be output to the external information port (A1505). In this embodiment, the external information port is the serial port 173a.

As shown in FIG. 51A, various output data of the external information here correspond to a jackpot 1 signal, a jackpot 2 signal, a jackpot 3 signal, a jackpot 4 signal, a main prize ball signal, a security signal, an out signal, and a call signal. It is output to the external information terminal 71 via the parallel output terminals PA0-PA7 of the driver IC chip 156.

As described above, the driver IC chips 156 and 157 simultaneously output data from the parallel output terminals (PA0-PA7, PB0-PB7) at the timing when the same chip select signal (SA0) is received. This results in a 32-bit serial-parallel conversion circuit, which converts the serial data signal (TXA) into 32-bit parallel data.

Therefore, the segment off data, digit output data, and external information data (starting port signal, symbol confirmation count signal, door / frame opening signal, door signal, call signal, etc.) of the batch display device (LED) 50 and the performance display device 152, The out signal, security signal, main prize ball signal, jackpot 4 signal, jackpot 3 signal, jackpot 2 signal, jackpot 1 signal) are continuously output as a 32-bit serial data signal (TXA) from the serial port 173a. .. Therefore, steps A1501-A1505 (the same applies to steps A1508-A1514 described later) are continuous and integrated processes.

After that, the game control device 100 sets the value of the digit counter for sequentially scanning the digit lines (LED digit 0-3, digit 0-3) of the batch display device (LED) 50 and the performance display device 152 to 0 to 3. Update +1 in the range (A1506). If it is "3", the updated value becomes "0" by updating +1.

As described above, the digit line (LED digit 0-3) of the batch display device 50 and the digit line (digit 0-3) of the performance display device 152 are shared parallel output terminals of the driver IC chip 156. It is driven by a common drive signal from PB4-PB7. Then, when the value of the digit counter is 0 indicating 0 digits, the LED digit 0 and digit 0 are used, and when the value of the digit counter is 1 indicating 1 digit, the LED digit 1 and digit 1 are used, and the digit counter value is 2. In the case of 2 indicating a digit, the LED digit 2 and the digit 2 output a voltage (ground potential) that draws a current from the segment line when the value of the digit counter is 3 indicating a 3 digit. .. Therefore, by updating the value of the digit counter, both the 8-segment LED (8 LEDs associated with one digit) of the batch display device (LED) 50 and the digit of the performance display device 152 are sequentially selected. .. Then, in the dynamic drive method (dynamic lighting method), the LEDs of the sequentially selected digits (lighting digit, display digit) are energized and turned on.

Next, the game control device 100 determines whether or not the initial display setting flag is on (A1507). When the initial display setting flag is on (the result of A1507 is “Y”), the process proceeds to step A1515. On the other hand, when the initial display setting flag is off (the result of A1507 is "N"), as the performance display output processing, the output data (display data) of the digits corresponding to the updated digit counter of the performance display device 152 is input. , The 0th to 3rd digit output data area is loaded from the corresponding one and output to the digit output port (A1508), and the process proceeds to step A1509.

That is, if the digit counter is 0, the output data is loaded from the 0th digit output data area, if the digit counter is 1, the output data is loaded from the 1st digit output data area, and if the digit counter is 2, 2 The output data is loaded from the digit output data area, and if the digit counter is 3, the output data is loaded from the third digit output data area and output to the digit output port. As a result, the display data is sequentially displayed at high speed on the 0 to 3 digits (digits 0 to 3) of the performance display device 152 by updating the digit counter, and the performance of the performance information can be displayed.

The 0th to 3rd digit output data areas of the performance display are in the area external work area in the second RAM area (FIG. 63) of the RAM 111c. The 0th to 3rd digit output data areas are collectively referred to as performance display data areas.

In this embodiment, the digit output port is the serial port 173a. The digit output data is on / off data of all segments of one digit, and is segment lines (ag, Dp) of the performance display device 152 via the parallel output terminals PB0-PB7 of the driver IC chip 157. Is output to. For example, the output data of digits (Dp, g, f, e, d, c, b, a) is "00111111B" (1 is on, 0 is off) to display the numerical value of "0" in this digit. ), And to display the numerical value of "3", it becomes "01001111B".

Next, the game control device 100 loads the output data of the segment line (LED segment 0-7) of the batch display device (LED) 50 from the segment area corresponding to the updated digit counter value (A1509). The loaded data is output to the segment output port (A1510). The segment area is in the game control work area of the RAM 111c (see FIG. 63). In the present embodiment, the port for segment output is the serial port 173a.

Subsequently, the game control device 100 acquires digit output data as output data of the LED digit line corresponding to the updated digit counter value (A1511), and the acquired digit of the digit line, as in the case of A1502-A1504. The output data and the external information data are combined (A1512), and the combined data is output to the digit / external information output port (A1513). In this embodiment, the digit / external information output port is the serial port 173a. For example, the digit output data is "11100000B", "11010000B", "10110000B", and "01110000B" for each of the digit counter values 0 to 3 updated by A1506.

Next, the game control device 100 synthesizes and outputs various output data of the external information to be output to the external information port in the same manner as the A1505 (A1514). In this embodiment, the external information port is the serial port 173a.

After that, the game control device 100 synthesizes the solenoid drive signal data to be output to the solenoid signal output port (A1515). Here, each solenoid drive signal data is output via the parallel output terminal QA-QC of the IC chip 138a-1 for the solenoid driver of FIG. 51B. It is the data of the drive signal.

Subsequently, the game control device 100 further synthesizes the combined data and the output data of the launch permission (A1516), and finally outputs the synthesized data to the solenoid signal / launch permission signal output port (A1517). In the present embodiment, the solenoid signal / emission permission signal output port (solenoid signal output port and emission permission signal output port) is a serial port 173a capable of outputting data to the driver 138a-1.

After that, the game control device 100 saves (PUSH) the information (value) of the flag register 1200 (see FIG. 64), which will be described later, into the stack area of the RAM 111c (A1518). In the present embodiment, the stack area here is a game control stack area described later.

Next, the game control device 100 executes the test firing test signal output process (A1519). In the test firing test signal output processing, the data to be transmitted to each test terminal output port on the relay board 70 that outputs the test firing test signal to the test firing test device is loaded and synthesized, and the combined data is combined with the test signal output port. Output. Each test terminal output port on the relay board 70 is each serial-parallel conversion IC chip 192a-192j of FIG. 53. In the present embodiment, the test signal output port is a serial port 173b capable of outputting data to the relay board 70 and thus the serial parallel conversion circuit 192, not the serial port 173a. That is, the serial port 173b (second serial port), which is an output port used in the test firing test signal output processing, is an output port used in the processing of A1501, A1504, A1505, A1508, A1510, A1513, A1514, and A1517. It is different from a certain serial port 173a (first serial port).

In this way, the test firing test signal (serial data signal) to be transmitted to the relay board 70 (relay means) is output from the serial port 173b different from the serial port 173a. Therefore, even if the parts related to the test firing test (for example, the buffer 133 and the connector portion 160 as described above) are not mounted at the time of mass production (other than the test firing test), the drivers 138a-138d, 150 are connected to the serial port 173a. It does not affect the control of the external information terminal 71, the batch display device 50, the solenoids 39b, 37c, 86b, the performance display device 152, etc., which are connected via (drive means).

After that, the game control device 100 returns (POP) the information of the saved flag register 1200 from the stack area of the RAM 111c (A1520).

[Test firing test signal output processing]
Next, the details of the test firing test signal output processing (A1519) in the above-mentioned output processing will be described. FIG. 57 is a flowchart showing the procedure of the test firing test signal output processing. The test firing test signal output program corresponding to the test firing test signal output processing is a subroutine called by a call instruction (CALL instruction) from the output processing program. The test firing test signal output program itself is stored (stored) in the second ROM area (FIG. 62) of the ROM 111b, and is not stored (stored) in the first ROM area of the ROM 111b.

The game control device 100 first saves the stack pointer in the stack pointer storage area (FIG. 63) (A1701). The stack pointer storage area is located at the last address in the area external work area (second work area) provided in the second RAM area (FIG. 63) of the RAM 111c, and the area of the address after that address is used. Separate as a stack area for external use. After that, the initial value for outside the area, that is, the start address of the stack area for outside area (FIG. 63) is set in the stack pointer (A1702).

Then, the game control device 100 saves (PUSH) the information (values) of all the registers of the CPU 111a to the stack area for external use (FIG. 63) (A1703). Here, all the registers are the general-purpose registers of register bank 0 (WA, BC, DE, HL, IX, IY) and the general-purpose registers of register bank 1 (WA, BC, DE, HL, IX, IY) (see FIG. 64). ).

In this way, before outputting the test firing test signal data in the following steps A1704-A1709, the register information (value) included in the CPU 111a (arithmetic processing means) is saved in the stack area of the RAM 111c (update information storage means). Let me. The register of the CPU 111a may be affected by noise or the like from a device outside the gaming machine such as the relay board 70 or the test firing test device during output of the test firing test signal data, but the register information is saved in the stack area. And protect it. It is not necessary to protect the register information before the performance display output processing (A1508) for outputting the display data of the performance information, which is not related to the device outside the gaming machine, and the register of the CPU 111a Information (value) is not saved in the stack area, and the amount of data to be saved can be reduced.

Next, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 1 that outputs the test firing test signal to the test firing test device, and synthesizes the combined data to the serial port 173b as the test signal output port. Output (A1704). The test terminal output port 1 corresponds to the 8-bit serial-parallel conversion IC chip 192f of the relay board 70. The test firing test signal output from the test terminal output port 1 to the test firing test device is only the symbol 1 signal indicating the stop symbol number of the normal diagram variation display game. The data of each test firing test signal to be loaded is stored and set in the test signal output data area in the first RAM area (FIG. 63) of the RAM 111c.

Next, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 2 that outputs the test firing test signal to the test firing test device, and synthesizes the combined data to the serial port 173b as the test signal output port. Output (A1705). The test terminal output port 2 corresponds to the 8-bit serial-parallel conversion IC chip 192e of the relay board 70. The test firing test signal output from the test terminal output port 2 to the test firing test device is a symbol 3 signal corresponding to the stop symbol number of the special figure 2 fluctuation display game and a special figure 2 changing signal, and these signals are combined. NS. It should be noted that the symbol 3 signal and the special figure 2 changing signal are defined by different bits in the 8-bit data and do not interfere with each other.

Subsequently, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 3 that outputs the test firing test signal to the test firing test device, and synthesizes the combined data to the serial port 173b as the test signal output port. Output (A1706). The test terminal output port 3 corresponds to the 8-bit serial-parallel conversion IC chip 192d of the relay board 70. The test firing test signal output from the test terminal output port 3 to the test firing test device is a symbol 2 signal corresponding to the stop symbol number of the special figure 1 fluctuation display game and a special figure 1 changing signal, and these signals are combined. NS. It should be noted that the symbol 2 signal and the special figure 1 changing signal are defined by different bits in the 8-bit data and do not interfere with each other.

After that, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 4 that outputs the test firing test signal to the test firing test device, and outputs the synthesized data to the serial port 173b as the test signal output port. (A1707). The test terminal output port 4 corresponds to the 8-bit serial-parallel conversion IC chip 192c of the relay board 70. The test firing test signals output from the test terminal output port 4 to the test firing test device are the normal symbol 1 fluctuating signal, the normal symbol 1 high probability state signal (normal 1 high accuracy), and the special symbol indicating the time reduction of the special diagram 1. 1 The fluctuation time shortened state signal and the special symbol 2 fluctuation time shortened state signal indicating the time reduction of the special figure 2 are combined. It should be noted that these signals are defined by different bits in the 8-bit data and do not interfere with each other.

Next, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 5 that outputs the test firing test signal to the test firing test device, and synthesizes the combined data to the serial port 173b as the test signal output port. Output (A1708). The test terminal output port 5 corresponds to the 8-bit serial-parallel conversion IC chip 192b of the relay board 70. The test firing test signal output from the test terminal output port 5 to the test firing test device includes a normal hit signal regarding the start of hitting in the normal drawing, a normal electric accessory 1 operating signal regarding the start of operation of the normal variable winning device 37, and a normal electric accessory 1 operating signal. The special 1 small hit signal regarding the start of the small hit of the special figure 1 (when the small hit of the special figure 1 exists), the special 1 hit signal regarding the start of the big hit of the special figure 1, and the start of the small hit of the special figure 2. Special 2 small hit signal (when there is a small hit in special figure 2), special 2 hit signal regarding the start of the big hit in special figure 2, and a signal regarding the start of opening of the large winning opening of the special variable winning device 39 (special) An electric accessory 1 operating signal) and a signal relating to the start of opening the large winning opening of another special variable winning device (when it exists other than the special variable winning device 39) (special electric accessory 2 operating signal). , These signals are combined. It should be noted that these signals are defined by different bits in the 8-bit data and do not interfere with each other.

Subsequently, the game control device 100 loads and synthesizes the data to be transmitted to the test terminal output port 6 that outputs the test firing test signal to the test firing test device, and synthesizes the combined data to the serial port 173a as the test signal output port. Output (A1709). The test terminal output port 6 corresponds to the 8-bit serial-parallel conversion IC chip 192a of the relay board 70. The test firing test signal output from the test terminal output port 6 to the test firing test device is a signal indicating either a right-handed or left-handed instruction (launch position designation signal 1) and a game indicating the occurrence of an error in the game machine 10. The machine error status signal, the condition 1 valid signal, the accessory 1 valid signal, the condition device operating signal indicating the occurrence of V winning, and the special variable winning device operating continuously (continuous operation of the accessory). It is a signal during operation of the accessory shown, and these signals are combined. It should be noted that these signals are defined by different bits in the 8-bit data and do not interfere with each other.

At the end of step A1709, the chip select signals SB01 and SB02 and the enable signals OE1 and OE2 are simultaneously input to the serial-parallel conversion circuit 192 of the relay board 70 in parallel. Therefore, the 8-bit serial-parallel conversion IC chip 192f-192a of the serial-parallel conversion circuit 192 simultaneously outputs a test firing test signal (parallel data signal). Since the test firing test signal (serial data signal) is not transmitted to the unused 8-bit serial-parallel conversion IC chip 192g-192j, zero 8-bit data "zero 8-bit data" is transmitted from each 8-bit serial-parallel conversion IC chip 192g-192j. "00000000B" is output as a parallel data signal.

Next, the game control device 100 returns (POP) the information (values) of all the registers of the CPU 111a from the stack area for external use (FIG. 63) (A1710). Then, the value of the stack pointer storage area (FIG. 63) is loaded into the stack pointer (A1711), and the output process is terminated.

In each step of A1704-A1709, the game control device 100 transmits to each of the test terminal output ports 1 to 6 (8-bit serial parallel conversion IC chip 192f-192a) that outputs the test firing test signal to the test firing test device. The data to be used is loaded and combined, and the combined data is output to the serial port 173a as a test signal output port. When the 8-bit serial-parallel conversion IC chip 192g-192j is also used, the data to be transmitted to each of the test terminal output ports 7 to 10 (8-bit serial-parallel conversion IC chip 192j-192g) is loaded and synthesized. , Outputs the synthesized data to the serial port 173a.

[Performance display monitor control processing (performance display setting processing)]
Next, the details of the performance display monitor control process (performance display setting process) (A1320) in the above-mentioned timer interrupt process will be described. FIG. 58 is a flowchart showing the procedure of the performance display monitor control process.

The performance display monitor control program (performance display setting program) corresponding to the performance display monitor control processing is a subroutine called by a call instruction (CALL instruction) from the interrupt processing program. The performance display monitor control program itself, including its subroutines (programs for processing A1904, A1905, A1907, etc.), is stored (stored) in the second ROM area (FIG. 62) of the ROM 111b, and is stored (stored) in the first ROM of the ROM 111b. Not stored (stored) in the area.

The game control device 100 first saves the stack pointer in the stack pointer storage area (FIG. 63) (A1901). The stack pointer storage area is located at the last address in the area external work area (second work area) provided in the second RAM area (FIG. 63) of the RAM 111c, and the area of the address after that address is used. Area Separate as an external stack area (performance display stack area, etc.). After that, the initial value for performance display control, that is, the start address of the stack area for outside the area (stack area for performance display, etc.) (FIG. 63) is set in the stack pointer (A1902).

Next, the game control device 100 saves (PUSH) the information (values) of all the registers of the CPU 111a to the stack area for outside the area (FIG. 63). Here, all the registers are the general-purpose registers of register bank 0 (WA, BC, DE, HL, IX, IY) and the general-purpose registers of register bank 1 (WA, BC, DE, HL, IX, IY) (see FIG. 64). ) (A1903). The treatment of A1901-A1903 is the same as that of A1701-A1703.

After that, the game control device 100 executes a second work RAM check process for checking (inspecting) the area external work area (second work area) in the second RAM area (FIG. 63) of the RAM 111c (A1904). .. In the second work RAM check process, the work area outside the area (second work area) is checked, and if there is an abnormality, the control area of the work area outside the area is cleared to 0, and an initial value other than 0 is required. Set the initial value. The stack pointer storage area and the external stack area are not cleared.

Subsequently, the game control device 100 executes the initial display timer update process (FIG. 59) that executes the control related to the initial display described above (A1905).

After that, the game control device 100 transfers the switch detection information (SW detection information) of the game control work area (first work area) in the first RAM area (FIG. 63) of the RAM 111c into the second RAM area. The process of copying to the work area for external use (second work area) in is executed (A1906). In this process, the switch detection information (rising edge) of the switch that has changed to the detection state (on state) is copied to the signals of the input ports 122, 123, 124, 126.

At the time of copying, the switch detection information of the switch that is not related to the calculation of the base value (the ball output rate in the normal game state) is deleted. The switch that is not related to the calculation of the base value is basically a switch or a sensor (gate switch 34a, radio wave sensor 62, front frame open detection switch 64, etc.) that does not have a prize ball even if it is detected, but out ball detection. The switch 74 is excluded because it is involved in the calculation of the base value. That is, in the present embodiment, among the start port 1 switch 36a, the start port 2 switch 37a, the winning port switch 35a, the large winning port switch 39a, and the out ball detection switch 74, there is a change to the detection state (on state). Copy the switch detection information (rising edge) of the switch.

By copying the above, in the process related to the update of the display content of the performance display (display content update process of the performance display monitor control process, performance display monitor aggregation process), the area external work area (second work) in the second RAM area. Since it is only necessary to access the area), it becomes easy to create and understand the programs related to the performance display (performance display monitor control program and performance display monitor aggregation program described later).

Next, the game control device 100 executes the display content update process (A1907). In the display content update process, the display mode displayed on the performance display device 152 is managed, and the performance information (base value in the present embodiment) calculated by the performance display monitor aggregation process (performance display edit process, A1052 of the main process) is used. Based on this, the output data (display data) of the digits of the performance display device 152 is set in the 0th to 3rd digit output data areas. The 0th to 3rd digit output data areas are in the area external work area (second work area) provided in the second RAM area (FIG. 63) of the RAM 111c.

Subsequently, the game control device 100 returns (POP) the information (values) of all the registers of the CPU 111a from the stack area for external use (FIG. 63) (A1908). Then, the value of the stack pointer storage area (FIG. 63) is loaded into the stack pointer (A1909), and the performance display monitor control process is terminated.

[Initial display timer update process]
Next, the details of the initial display timer update process (A1905) in the above-mentioned performance display monitor control process (performance display setting process) will be described. FIG. 59 is a flowchart showing the procedure of the initial display timer update process.

The game control device 100 first determines whether or not the initial display setting flag is on (A2001). When the initial display setting flag is off (the result of A2001 is "N"), the process proceeds to step A2005.

When the initial display setting flag is on (the result of A2001 is "Y"), the game control device 100 saves the timer initial value (for example, equivalent to about 5000 ms) in the initial display timer area (A2002), and the blinking control timer. The timer initial value (for example, corresponding to about 300 ms) is saved in the area (A2003), and the initial value is saved in the blinking control pointer area (A2004).

The initial display timer area, the blinking control timer area, and the blinking control pointer area are provided in the area external work area (second work area) in the second RAM area (FIG. 63) of the RAM 111c.

Next, the game control device 100 determines whether or not the initial display timer is 0 (A2005). When the initial display timer is not 0 (the result of A2005 is "N"), the initial display timer is updated by -1 (A2006). When the initial display timer is 0 (the result of A2005 is "Y"), that is, when the initial display timer has timed up or has already timed up, the initial display timer update process ends.

In the above-mentioned display content update process (A1907), when the blinking control timer in the blinking control timer area is updated and the blinking control timer is typed up, the blinking control pointer in the blinking control pointer area is updated. The blinking control pointer alternately indicates the data in the lit state and the data in the off state. As a result, immediately after the power of the gaming machine 10 is turned on, the initial display is executed for a predetermined period (for example, about 5000 ms) by blinking all the segments (all LEDs, all light emitting members) of each digit of the performance display device 152. The blinking cycle is twice the initial value of the timer in the blinking control timer area (for example, about 300 ms × 2), and the number of times of repeating blinking is 5000/600 ≈8 times. With such an initial display, it is possible to confirm whether or not all the segments of each digit of the performance display device 152 operate normally when the power is turned on.

[Performance display monitor aggregation processing (performance display editing processing)]
Next, as an example of the performance display editing process (A1052) in the above-mentioned main process (FIG. 54), the performance display monitor aggregation process will be described. FIG. 60 is a flowchart showing the procedure of the performance display monitor aggregation process (performance display editing process).

The performance display monitor totaling program (performance display editing program) corresponding to the performance display monitor totaling process is a subroutine called by a call instruction (CALL instruction) from the main program. The performance display monitor aggregation program itself, including its subroutines (programs for processing A2204, A2209, etc.), is stored (stored) in the second ROM area (FIG. 62) of the ROM 111b, and is stored in the first ROM area of the ROM 111b. Not stored (remembered).

Similar to A1901-A1904, the game control device 100 first saves the stack pointer in the stack pointer storage area (A2201), and then stores the initial value for performance display control, that is, the stack area for outside the area (A2201) in the stack pointer. The start address of the performance display stack area, etc.) is set (A2202), the information (values) of all the registers of the CPU 111a are saved in the stack area for outside the area (PUSH) (A2203), and the information (value) is stored in the second RAM area of the RAM 111c. A second work RAM check process for checking (inspecting) a certain area external work area (second work area) is executed (A2204).

Next, the game control device 100 determines whether or not the management section is currently switched (A2205). The management section is a measurement section defined for the number of out balls (number of discharged balls) in a predetermined range, and a plurality of management sections are continuously provided (see FIG. 69). The number of out balls here is the total number of out balls, which is the number of out balls in all game states. The total gaming state includes not only the normal gaming state but also a gaming state other than the normal gaming state (special gaming state, specific gaming state, etc.).

In the present embodiment, as the management section which is the measurement section of the base value, the section A (0 ≦ X < 300), section B (300 ≦ X <60300), section C (60300 ≦ X <120300), section D (120300 ≦ X <180300), section E (180300 ≦ X <240300), ... (See FIG. 69). The switching of the management section is a boundary between adjacent management sections, and in the present embodiment, the total number of out balls from power-on = 300, 60300, 120300, 180300, and the like.

The range (width) of the section A is 300, and the range (width) of the other sections is 60,000. Therefore, when the total out count SOUT, which indicates the count value of the total number of out balls in each management section, reaches a predetermined value (300 in section A, 60,000 in other sections), the game shifts to the adjacent management section and switches. ..

Then, when the management section is switched (the result of A2205 is “Y”), the game control device 100 executes the initial setting at the time of section switching (A2206), and shifts to the process of step A2210. As the initial setting at the time of section switching, the total out counter SOUT, the normal out counter TOUT, and the normal prize ball number counter NSHO are cleared, and the final base value (or the latest base value) of each management section is used as the base of the adjacent management section. Shift (move) to the value storage area. The final base value (or latest base value) of the current management section and the management section one, two or three times before is stored in the base value storage areas 0 to 3 in the area external work area in the second RAM area. Will be done.

Here, the total out counter SOUT indicates a count value obtained by counting (counting) the number of out balls in all game states in each management section, whereas the normal out counter TOUT is a normal game in each management section. The count value which counted the number of out balls (the number of ejected balls) in the state is shown. The normal prize ball counter NSHO indicates a count value obtained by counting the total number of prize balls (acquired balls) in the normal game state within each management section.

In the present embodiment, the out ball is a game ball discharged from the game area 32, that is, a game ball launched into the game area 32 and finished the game, and is detected by the out ball detection switch 74. Then, when the game control device 100 receives a detection input from the out-ball detection switch 74, the game control device 100 updates the counter values of the total out-counter SOUT and the normal out-counter TOUT by +1 as described later (adds only 1). ).

On the other hand, the game control device 100 determines whether or not any of the switches to be monitored has been detected (input) when the management section is not switched (the result of A2205 is “N”) (A2207). In the present embodiment, the switches to be monitored are each winning switch in which a prize ball is generated by detection, and an out ball detection switch 74. In the present embodiment, the winning switch is a starting port 1 switch 36a, a starting port 2 switch 37a, a winning port switch 35a, and a large winning port switch 39a.

Then, the game control device 100 performs a division task process for calculating the base value when there is no detection (input) in any of the switches to be monitored (the result of A2207 is "N"). Execute (A2208). In the division task processing, (counter value of the normal prize ball counter NSHO) ÷ (counter value of the normal out counter TOUT) × 100 (%) is calculated as the base value which is the payout rate in the normal game state. In this calculation, the first decimal place is rounded off.

On the other hand, the game control device 100 corresponds to the detection (input from the switch) of the switch to be monitored when there is a detection (input) in any of the switches to be monitored (the result of A2207 is "Y"). The prize ball addition determination process for performing various processes is executed (A2209).

When any of the winning switches is detected in the prize ball addition determination process, the game control device 100 counts the number of prize balls paid out in response to the detection of the winning switch by the normal prize ball counter NSHO. Add to the value. For example, starting winning opening 36 (starting opening 1 switch 36a), normal variable winning device 37 (starting opening 2 switch 37a), general winning opening 35 (winning opening switch 35a), special variable winning device 39 (large winning opening switch 39a). The number of prize balls is 4, 1, 3, and 10 for each of the above.

Further, when the out ball detection switch 74 detects the prize ball addition determination process, the game control device 100 updates the counter values of the total out counter SOUT and the normal out counter TOUT by +1 (adds only 1). ).

In the prize ball addition determination process, the game control device 100 determines whether or not the detection (input) is valid in calculating the base value. Except for the period during which the detection is valid, the game control device 100 invalidates the detection even if the switch to be monitored has a detection. The valid period is a period in which the payout rate is treated as a base value (also referred to as a normal base), that is, a period in a normal gaming state. In addition, when a large winning opening fraud to the special variable winning device 39 or a general electric fraud to the normal variable winning device 37 is detected in the winning opening switch / status monitoring process (A1310 in FIG. 55), game control is performed. The device 100 invalidates the detection of the large winning opening switch 39a or the starting opening 2 switch 37a, which is the target switch.

Further, in the prize ball addition determination process, a process corresponding to the detection of one switch is performed in one process. Then, the detection information (input information) of the switch that has performed the processing corresponding to the detection is cleared. Therefore, if a plurality of switches to be monitored are detected (input) in a very short period of time, the processing corresponding to the detection of the previous one switch is performed and the detection information of the switch is cleared. However, the process corresponding to the detection of one switch later is performed in the next prize ball addition determination process (in the next performance display monitor aggregation process), and the detection information of the switch is maintained until then. In this way, unprocessed detection information is maintained.

After that, the game control device 100 returns (POP) the information (values) of all the registers of the CPU 111a from the stack area for external use (A2210), similarly to A1908-A1909. Then, the value of the stack pointer storage area is loaded into the stack pointer (A2211), and the performance display monitor aggregation process is completed.

[ROM and RAM storage area]
The storage areas of the ROM 111b and the RAM 111c of the game control device 100 will be described with reference to FIGS. 61 to 63. FIG. 61 is a diagram illustrating an outline of storage areas of ROM 111b and RAM 111c. FIG. 62 is a diagram illustrating the details of the storage area of the ROM 111b. FIG. 63 is a diagram illustrating the details of the storage area of the RAM 111c. For the sake of clarity, in FIGS. 61 to 63, the width of each region is drawn not in proportion to the width of the actual address.

In the game control device 100, the CPU 111a constitutes an arithmetic processing means for performing a predetermined arithmetic processing by a program, the ROM 111b constitutes a program storage means for storing a program, and the RAM 111c is an information updated by the arithmetic processing means ( It constitutes an update information storage means that can store (calculation results, etc.).

As shown in FIG. 61, the ROM 111b (program storage means) has a first ROM area (first program storage area) at addresses 8000h to 9ADBh and a second ROM area (second program storage area) at addresses 9C10h to A1F2h. And an unused area (addresses 9ADCh to 9C0Fh, first unused ROM area) between the first ROM area and the second ROM area. The first ROM area and the second ROM area are located in the address space (or memory space) so as to sandwich the unused area of addresses 9ADCh to 9C0Fh.

If the game control program is illegally modified, the size of the game control program may increase, but due to the existence of the unused area (first unused ROM area), the game control of the first ROM area is used. Unauthorized modification of the program becomes difficult. Note that the addresses of all unused areas may store predetermined numerical values that are not used in control. Further, the CPU 111a may be reset when the unused area (first unused ROM area) is used.

Further, after the second ROM area, there is an unused area (second unused ROM area) of addresses A1F3h to BF1Fh, and after that, addresses BF20h to store hardware (HW) parameters, vector tables, and the like. There is a program management area for BFFFh. The second ROM area and the program management area are located in the address space so as to sandwich the unused areas of the addresses A1F3h to BF1Fh.

The RAM 111c (update information storage means) includes a first RAM area (first information storage area) at addresses 0000h to 012Fh, a second RAM area (second information storage area) at addresses 01B0h to 01FFh, and a first. It includes an unused area (addresses 0130h to 01AFh, first unused RAM area) between the RAM area and the second RAM area. The first RAM area and the second RAM area are located in the address space (or memory space) so as to sandwich the unused area of addresses 0130h to 01AFh. Further, after the second RAM area, there is an unused area (second unused RAM area) having addresses 0200h to 03FFh.

An unused area is not provided after the second RAM area, the last address of the second RAM area is matched with the last address of the RAM 111c, and the second RAM area is provided in the areas of addresses 03B0h to 03FFh. Configuration is also possible.

As shown in FIG. 62, in the first ROM area, the addresses 8000h to 8BA8h are game control program areas in which the game control program is stored, and the addresses 8BA9h to 8FFFh are unused areas (third unused ROM area). , Addresses 9000h to 9ADBh serve as a game control data area in which game control data used by the game control program is stored. It is also possible to configure a configuration in which an unused area (third unused ROM area) is not provided between the game control program area and the game control data area. Various tables, data, and the like are stored in the game control data area.

The first ROM area is an area in which the game control program and the game control data are stored. Note that the game control program concept may include game control data. A game control program is a program (a collection of codes or instructions) for controlling a game. The game control program includes a main processing program corresponding to the main processing (FIG. 5) and its subroutine program, and an interrupt processing program corresponding to the timer interrupt processing and its subroutine program, excluding the program outside the predetermined area.

As described above, in each process in the timer interrupt process (for example, special figure 1 stop symbol setting process, special figure 2 stop symbol setting process, normal figure normal process, etc.), the test firing test signal for setting the test firing test signal data. The setting process (for example, A3403, A3503, A7916, etc.) is included. Therefore, the game control program includes a test firing test signal setting program (test firing test signal setting code) corresponding to the test firing test signal setting process. By executing the test firing test signal setting program (test firing test signal setting code), the CPU 111a stores the data of each test firing test signal (described above) in the test signal output data area in the first RAM area of the RAM 111c before output. , (Corresponding to # 1 in FIG. 61).

Further, the game control program includes a performance display output program (performance display output code) corresponding to the performance display output process (A1508) of the output process (FIG. 56). Therefore, the performance display output program is also stored in the first ROM area. By executing the performance display output program, the CPU 111a is display data of performance information related to the game machine, and display data (output data) stored in the 0th to 3rd digit output data areas of the second RAM area. Is loaded (referenced, acquired) into a register and output (corresponding to # 4 in FIG. 61). As a result, the performance of the performance information is displayed on the 0 to 3 digits (digits 0 to 3) of the performance display device 152. In the present embodiment, the performance information is a base value, but the accessory ratio and the number of ejected balls (the number of out balls) may be displayed as other performance information.

Further, the game control program includes a set value change program (set value change code) corresponding to the process of step A2410 of the probability setting change / confirmation process (FIG. 6B). Therefore, the set value change program is also stored in the first ROM area. By executing the setting value change program, the CPU 111a updates the probability setting value in the probability setting value area of the first RAM area (first information storage area), and sets the updated probability setting value in the probability setting value area. Store and set (corresponding to # 1 in FIG. 61).

The second ROM area is an area in which a program outside the area other than the game control program in the first ROM area is stored, and is outside the first ROM area. The concept of the out-of-area program may include data used by the out-of-area program (such as performance display data). The out-of-area programs include a performance display monitor control program (performance display setting program) and its subroutine program corresponding to the performance display monitor control process, and a performance display monitor aggregation program (performance display editing program) corresponding to the performance display monitor aggregation processing. The program of the subroutine, the test firing test signal output program corresponding to the test firing test signal output processing, and the program of the subroutine are included.

By executing the performance display monitor control program (performance display setting program), the CPU 111a has the 0th to 3rd digits of the second RAM area based on the performance information (base value) calculated by the performance display monitor aggregation program. Display data (output data) is stored and set in the output data area (performance display data area) (corresponding to # 3 in FIG. 61).

By executing the performance display monitor aggregation program (performance display editing program), the CPU 111a adds the number of prize balls for each prize switch when any of the prize switches is detected, and updates the normal prize ball counter NSHO. , When the out ball detection switch 74 detects, the normal out counter TOUT is updated by +1 and the performance information (base value) is calculated based on the counter values of the normal prize ball count counter NSHO and the normal out counter TOUT. do. Further, according to the performance display monitor aggregation program, the CPU 111a updates the total out counter SOUT by +1 when the out ball detection switch 74 detects it, and switches each management section based on the counter value of the total out counter SOUT. It is managed, and the performance information (base value) is calculated by counting the normal prize ball counter NSHO and the normal out counter TOUT for each management section.

By executing the test firing test signal output program, the CPU 111a loads (references, acquires) the data of each test firing test signal set in the test signal output data area in the first RAM area into the register and serializes it as serial data. Output to port 173b (corresponding to # 2 in FIG. 61).

As described above, as the out-of-area program, the test firing test signal output program is stored in the second ROM area (second program storage area), and is stored in the first ROM area (first program storage area) to the unused area. It is separated via (first unused ROM area). That is, the test firing test signal output program is placed in a second ROM area that is different from the first ROM area in which the game control programs such as the test firing test signal setting program and the performance display output program are stored. Therefore, the part corresponding to the test firing test signal output program can be easily understood, and can be reused for other gaming machines (shared with other gaming machines), and the development efficiency of the program used in the gaming machine 10 can be improved. .. Since the algorithm of the test firing test signal output program, which only outputs the test firing test signal, is the same regardless of the model of the gaming machine, the same algorithm can be used in common, and different models can be reused. It's easy.

However, since the test firing test signal differs depending on the game machine model, such as the type and number of winning openings, and whether or not there is a time saving state or a probability change state, the test firing test signal data is set. The test firing test signal setting program differs depending on the model of the gaming machine, and it is difficult to reuse it between different models. Further, the display data of the performance information and the display data of the variable display game are output substantially simultaneously for each digit of the performance display device 152 and the batch display device 50, which are LED indicators, and the display data of the performance information is output in the output processing program. The performance display output program (corresponding to A1508) that outputs the information is integrated with the segment output program (corresponding to A1509 and A1510) that outputs the display data of the variable display game. It is difficult to reuse. Therefore, if the test firing test signal setting program or the performance display output program and the test firing test signal output program are mixed in the storage area of the ROM 111b, it becomes difficult to understand the part corresponding to the test firing test signal output program that is easy to reuse. There was a possibility that the development efficiency of the control program of the machine would decrease.

Also, as with the test firing test signal output program, the performance display monitor control program (performance display setting program) and the performance display monitor tabulation program (performance display editing program) have the same algorithm regardless of the model of the gaming machine. The same thing can be used in common, and it is easy to reuse even different models. Therefore, the performance display monitor control program and the performance display monitor aggregation program are stored in the second ROM area (second program storage area), and are stored in the first ROM area (first program storage area) to the unused area (the first program storage area). It is separated via the first unused ROM area). That is, the performance display monitor control program and the performance display monitor aggregation program are located in a place different from the first ROM area in which the game control programs such as the test firing test signal setting program and the performance display output program are stored. Placed in the ROM area. Therefore, the part corresponding to the performance display monitor control program and the performance display monitor aggregation program can be easily understood and can be reused for other gaming machines (shared with other gaming machines), and the program used in the gaming machine 10. Development efficiency can be improved.

As shown in FIG. 63, in the first RAM area, the addresses 0000h to 00F6h serve as the game control work area (first work area), and the addresses 00F7h to 012Fh serve as the game control stack area.

The start address (address 0000h) of the game control work area has a probability setting value area for storing the probability setting value, followed by a power failure inspection area 1 (address 0001h). Since the address of the probability setting value area is the start address of the RAM 111c and the start address of the first RAM area, the probability setting value area in the RAM clear processing (RAM initialization processing) in steps A1042 and A1043 of FIG. 54. When clearing (initializing) at least a part of the RAM 111c or the first RAM area except for, it is no longer necessary to set the area before the probability setting value area as the target of the RAM clear processing (RAM initialization processing). , RAM clear processing (RAM initialization processing) becomes easy.

Further, there is a power failure inspection area 2 (address 00F5h) immediately before the end of the game control work area, and a checksum area (address 00F6h) for storing a checksum at the end of the game control work area.

Further, between the power failure inspection area 1 and the power failure inspection area 2 of the first RAM area, a probability setting mode flag area (address 0002h), a normal base state determination area (address 0004h), and an initial display setting flag area (address 0005h) ) Exists. In the probability setting mode flag area, the probability setting changing flag or the probability setting confirming flag is stored. In the normal base state determination area, the normal base state information is set if it is a normal game state, and the normal base state information is not set if it is a game state other than the normal game state (special game state, specific game state, etc.). The initial display setting flag is stored in the initial display setting flag area.

In addition, between the power failure inspection area 1 and the power failure inspection area 2 of the first RAM area, there are various areas for storing information necessary for game control, such as a test signal output data area and a fluctuation pattern random number area. .. The test signal output data areas may not be provided collectively, but may be scattered at positions according to the type of the test firing test signal (symbol 1 signal, normal figure 1 changing signal, firing position designation signal 1, etc.). ..

As shown in FIG. 63, in the second RAM area, the addresses 01B0h to 01D0h serve as the area external work area, and the addresses 01D2h to 01FFh serve as the area external stack area. The work area outside the area (second work area) is a work area other than the work area for game control (first work area), and the stack area outside the area is a stack area other than the stack area for game control. The area external stack area includes a performance display stack area and the like used in connection with the performance display.

In the area external work area, a normal prize ball number counter area (addresses 01B0h, 01B1h), a normal outcounter area (addresses 01B2h, 01B3h), and a total outcounter area (addresses 01B4h, 01B5h) are provided in this order from the beginning. The normal prize ball counter area, the normal out counter area, and the total out counter area are 2-byte areas in which the count values of the normal prize ball counter NSHO, the normal out counter TOUT, and the total out counter SOUT are stored, respectively. These 2-byte counters can count from 0 to 65535.

Since the range (width) of the management section is 60,000 or 300 with respect to the total out count SOUT, the normal out counter TOUT and the total out counter SOUT do not overflow within the management section (the maximum value 65535 is not reached). .. Further, since the base value is typically 30 (%), the normal prize ball counter NSHO does not overflow within the management section (the maximum value of 65535 is not reached). That is, by providing the management section, the 2-byte normal out counter TOUT, the total out counter SOUT, and the normal prize ball number counter NSHO do not overflow (the maximum value 65535 is not reached), so that the performance information such as the base value can be accurately obtained. Can be calculated.

Further, in the area external work area, a 2-byte stack pointer storage area (addresses 01D0h, 01D1h) that separates the area external work area and the area external stack area is finally provided. A 0th to 3rd digit output data area (performance display data area) of the performance display is provided between the counter area and the stack pointer storage area.

In this way, the data related to the performance information related to the number of prize balls or the number of out balls (normal out counter TOUT, total out counter SOUT, counter value of the normal prize ball number counter NSHO) and the performance display data (0th digit). By storing the third digit output data, digit output data) in the second RAM area that can be distinguished from the first RAM area by the unused area, a program related to performance information or performance display (performance display output program, Performance display monitor control program, performance display monitor aggregation program) will be easier to develop and the program will be easier to understand.

In the present embodiment, the game control device 100 has at least a part (for example, a first information storage area) of the first RAM area (first information storage area) when a predetermined condition is satisfied when the power is turned on (power restoration). The RAM area other than the probability set value area) is initialized, but the second RAM area (second information storage area) is not initialized. Here, the predetermined condition is that the result of step A1040 or A1041 in FIG. 54 is "Y". For example, in order to execute the RAM initialization process (RAM clear process), the RAM initialization switch 112 is set. It is turned on. As a result, even if the RAM initialization switch 112 is turned on and the power is turned on (power restoration) due to fraud during the opening (opening) of the amusement park, the information used for calculating the performance information (base value) can be obtained. The stored counter area (addresses 01B0h to 01B5h) and the 0th to 3rd digit output data areas of the performance display are neither cleared nor initialized, and the continuity of the display of the performance information (base value) can be maintained. In the present embodiment, the information used for calculating the performance information (base value) is at least the counter value of the normal prize ball counter NSHO (information on the number of prize balls) and the counter value of the normal out counter TOUT.

[CPU configuration]
FIG. 64 is a block diagram showing an internal configuration of the CPU 111a of the gaming microcomputer 111 according to the third embodiment. In the third embodiment, the CPU 111a is shown as the CPU core 102. The CPU core 102 is configured as a Z80-based CPU.

The CPU core 102 (CPU111a) shown in FIG. 64 has a width of 8 bits each, W register 1201A, A register 1202A, B register 1204A, C register 1205A, D register 1207A, E register 1208A, H register 1210A, and L register. It is equipped with a 1211A.

These general-purpose registers can also be used as a WA register 1203A (pair register, register pair) having a width of 16 bits by combining the W register 1201A and the A register 1202A. Similarly, BC register 1206A (pair register, register pair) which is a combination of B register 1204A and C register 1205A, DE register 1209A (pair register, register pair) which is a combination of D register 1207A and E register 1208A, and H register 1210A. It is also possible to use the HL register 1212A (pair register, register pair) which is a combination of the L register 1211A and the L register 1211A.

Further, the CPU core 102 (CPU111a) includes an IX register 1231a and an IY register 1232a, each having a width of 16 bits. The IX register 1231a and the IY register 1232a are used as indexes when the instruction interpretation execution circuit 1242 accesses data. Further, the IY register 1232a can be used as a start address designation register for setting the start address of the RAM 111c (update information storage means) in the address space (or memory space).

These general-purpose registers form one general-purpose register group (register group of register bank 0) 1220A. On the other hand, the CPU core 102 includes another general-purpose register group (register group of register bank 1) 1220B having the same (or similar) configuration as the general-purpose register included in the register group 1220A of register bank 0.

The register group 1220B of the register bank 1 includes W registers 1201B to L registers 1211B having the same functions as the W registers 1201A to L registers 1211A of the register bank 0. Similar to the register bank 0, these registers can also be used as 16-bit registers as WA registers 1203B to HL registers 1212B. Further, the register group 1220B of the register bank 1 includes an IX register 1231b and an IY register 1232b having the same functions as the IX register 1231a and the IY register 1232a.

Further, the CPU core 102 includes a flag register 1200 having a width of 8 bits.

The flag register 1200 stores the calculation result using the register. Further, the register bank selector (RBS), which is a bit of the flag register 1200, selects which of the two general-purpose register groups 1220A and 1220B is used as the calculation target.

Each register belonging to the register group selected by the register bank selector (RBS) is used for calculation by the instruction interpretation execution circuit 1242. On the other hand, each register belonging to the unselected register group holds the value until the value of the register bank selector (RBS) is changed and becomes a selection target.

Further, the CPU core 102 includes a DP register 1230. The DP register 1230 can be used, for example, to store the start address of the game control data area of the ROM 111b in the address space (or memory space).

Further, the CPU core 102 includes an SP register 1233 that functions as a stack pointer and a PC register 1234 that functions as a program counter, each having a width of 16 bits.

The stack pointer 1233 indicates the position of the area when storing (or retrieving) data in the stack area. The program counter 1234 indicates an address in which an instruction executed by the instruction interpretation execution circuit 1242 is stored.

The instruction interpretation execution circuit 1242 executes a program (game control program or out-of-area program) and performs arithmetic processing using each register inside the CPU core 102. Specifically, the ROM 111b reads the data stored at the address indicated by the program counter 1234, regards the read data as a code, and executes an instruction corresponding to the code. The instruction interpretation execution circuit 1242 interprets and executes instructions included in a predetermined instruction set.

Therefore, in the present embodiment, the CPU core 102 (CPU111a) itself is illustrated as the arithmetic processing means, but inside the CPU core 102, the instruction interpretation execution circuit 1242 plays a main role in fulfilling the function of the arithmetic processing means. There is. The RAM 111c serves as an update information storage means for storing information updated by the arithmetic processing means (CPU 111a, CPU core 102), and can store and retain the stored information even if a power failure occurs due to the backup power supply. It is a means of holding and storing.

The instruction interpretation execution circuit 1242 is connected to the ROM 111b, RAM 111c, and other circuits outside the CPU core 102 via the access circuit 1243, the address bus 721, and the data bus 722 in response to the program instructions. , Data may be exchanged. The address bus 721 is composed of 16-bit signal lines, and the CPU core 102 outputs the address specified in the address bus 721 and stores the address specified via the data bus 722 (addresses of ROM 111b, RAM 111c, etc.). Input / output data.

Further, the instruction interpretation execution circuit 1242 stores the address in which the next instruction is stored in the program counter 1234 each time the instruction of the ROM 111b is executed one by one. By repeating the execution of the instruction and the update of the program counter 1234 in this way, the game control program is sequentially executed. When the interrupt signal from the interrupt control circuit 724 provided in the gaming microcomputer 111 is received, the value of the program counter 1234 is switched to the value of the preset interrupt processing address.

Data is transferred to and from each register provided in the instruction interpretation execution circuit 1242 and the CPU core 102 by the internal bus 1235.

The initial value setting circuit 1241 is a circuit for setting initial values in hardware in each register provided in the CPU core 102.

When the built-in reset circuit 1240 receives the reset signal from the security circuit 725 provided in the gaming microcomputer 111, the built-in reset circuit 1240 activates the initial value setting circuit 1241 and sets the initial value in each register provided in the CPU core 102. The instruction interpretation execution circuit 1242 is activated.

[Program list]
65-67 shows the program structure of the output processing program and the performance display monitor control program (performance display setting program, test firing test signal output program) executed by the CPU 111a (CPU core 102) of the game control device 100 according to the third embodiment. 65-67 shows the program structure as an example, and can be modified by deleting or adding code as appropriate. Each program list is an 8-bit microprocessor. It is a list of instructions (source code) in the assembly language corresponding to Z80, and has a one-to-one correspondence with machine language instructions (machine code) stored in ROM 111b, except for pseudo instructions (instructions for the assembler). Is also included in the instruction set that can be interpreted and executed by the instruction interpretation execution circuit 1242 as a machine language instruction.

From the left side, the description of one line in each program list is "line number", "address in ROM111b", "machine language data of code (machine language instruction)", "assembly language code", It consists of "comments" attached for convenience of explanation. The "assembly language code" is divided into a "mnemonic" indicating the operation content (operation content) and an "operand" to be instructed. The instructions in the program list are basically executed from the top to the bottom of the program list in the order of line numbers (from small to large) unless there is an instruction to call a subroutine or a jump instruction (branch instruction).

[Output processing program]
65A-65C is a program list showing the program structure of the output processing program.

Line number 2924 indicates the label of the output processing program as a subroutine.

In line number 2931, the value of the IY register is cleared and set to 0 as the start address of the RAM 111c by exclusive-ORing the values of the IY registers (code "XOR IY, IY").

In line number 2934, the value of the A register is cleared and set to 0 as the extinguishing data of the performance display by exclusive-ORing the values of the A registers (code "XOR A, A").

At line number 2935, the value 0 of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (that is, the transmission / reception buffer register having a numerical number corresponding to the label C_SPIBUFA0) (code OUT (C_SPIBUFA0), A). As a result, the digit corresponding to the current digit counter of the performance display device 152 is turned off.

At line number 2938, the value 0 of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (that is, the transmission / reception buffer register of the numerical value corresponding to the label C_SPIBUFA0) (code OUT (C_SPIBUFA0), A). ). As a result, the digit corresponding to the current digit counter of the batch display device 50 is turned off. The processing of line number 2934, line number 2935, and line number 2938 corresponds to the processing of step A1501 of the output processing (FIG. 56).

At line number 2941, the numerical value corresponding to the start address of the table D_DIGTBL is loaded into the HL register (codes LD HL, D_DIGTBL).

At line number 2942, the numerical value (0 to 3) of the digit counter (address R_DIGCNT + 00H) is loaded into the A register (code LDA, (IY + R_DIGCNT + 00H)). Here, the value of the IY register is 0.

At line number 2943, the subroutine V_GET_BYTE is called to acquire the digit output data corresponding to the numerical value of the digit counter R_DIGCNT in the A register based on the table D_DIGTBL (code CALLV V_GET_BYTE). The process of line number 2943 corresponds to the process of step A1502 of the output process.

At line number 2945, the door signal, door / frame opening signal, symbol confirmation count signal, and start port signal data are loaded into the HL register as external information data from the 2-byte external information data area (address R_INFBF2 + 00H) (code LD HL). , (IY + R_INFBF2 + 00H)). The data of the door signal and the door / frame opening signal are loaded into the H register, and the data of the symbol confirmation count signal and the start port signal are loaded into the L register.

At line number 2946, the symbol confirmation count signal of the L register, the start port signal data, and the digit output data of the A register are combined and stored in the A register (codes OR A, L).

At line number 2947, the data of the door signal of the H register, the data of the door / frame opening signal, and the data of the A register are further combined and stored in the A register (codes OR A, H). As a result, digit output data and external information data (door signal, door / frame opening signal, symbol confirmation count signal, start port signal data) are combined with the A register. The process of line number 2945-line number 2497 corresponds to the process of step A1503 of the output process.

At line number 2948, the composite data of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (code OUT (C_SPIBUFA0), A). As a result, the combined data of the digit output data and the external information data is output to the serial port 173a. The process of line number 2948 corresponds to the process of A1504 of the output process.

At line number 2950, the composite data of the A register is loaded into the B register (codes LD B, A). The value of the B register is later saved in the stack area.

In line number 2953, the main prize ball signal, security signal, out signal, and call signal data are loaded into the WA register as external information data from the 2-byte external information data area (address R_INFBF1 + 00H) (code LD WA, (IY + R_INFBF1 + 00H). )). The security signal, out signal, and main prize ball signal data are loaded into the A register, and the call signal data is loaded into the W register.

At line number 2954, data of 1 jackpot signal, 2 jackpot signals, 3 jackpot signals, and 4 jackpot signals is loaded into the HL register as external information data from the 2-byte external information data area (address R_INFBF1 + 02H) (code LD HL, (IY + R_INFBF1 + 02H)). One jackpot signal and four jackpot signals are loaded into the L register, and two jackpot signals and three jackpot signals are loaded into the H register.

In line numbers 2955 to 2957, the values of the A register, the W register, the L register, and the H register are combined and stored in the A register (code OR A, W; code OR A, L; code OR A, H). ). As a result, various output data of external information (1 jackpot signal, 2 jackpot signals, 3 jackpot signals, 4 jackpot signals, main prize ball signal, security signal, out signal, call signal data) are combined and stored in the A register. Will be done.

At line number 2958, the composite data of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (code OUT (C_SPIBUFA0), A). The processing of line numbers 2953 to 2958 corresponds to the processing of A1505 of the output processing.

At line number 2962, the composite data of the A register is loaded into the C register (codes LD B, A). The value of the C register is later saved in the stack area (codes LD C, A).

At line number 2963, the value of the BC register is saved in the stack area (code PUSH BC). As a result, the composite data of the digit output data and the external information data and the composite data of the various output data of the external information are saved in the stack area, and can be restored later and used.

At line number 2971, the digit counter address R_DIGCNT + 00H is loaded into the E register (codes LD E, R_DIGCNT + 00H).

At line number 2972, the value of C_DIG_MAX is loaded into the B register (code LD B, C_DIG_MAX). C_DIG_MAX is a value obtained by adding 1 to the digit counter upper limit value of 3, which is 4 in the present embodiment.

At line number 2973, the subroutine V_INC_BYTE is called, the value of the digit counter (address R_DIGCNT + 00H) is updated by +1 unless it becomes C_DIG_MAX and stored in the A register. Stored in the A register (code CALLV V_INC_BYTE). The processing of line numbers 2971 to 2973 corresponds to the processing of A1506 of the output processing.

In line number 2976, the start address (R_EDVBF1 + 00H) of the performance display data area (0th to 3rd digit output data area) is stored in the HL register (code LD HL, R_EDVBF1 + 00H).

At line number 2977, the updated digit counter value currently stored in the A register is loaded into the B register (codes LD B, A).

At line number 2978, the subroutine V_GET_BYTE is called, and the numerical value stored in the address obtained by adding the value of the A register to the HL register is stored in the A register (code CALLV V_GET_BYTE). As a result, the output data (display data) of the digits corresponding to the updated digit counter is loaded from the corresponding one of the 0th to 3rd digit output data areas and stored in the A register.

At line number 2896, the value of the A register (digit output data) is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (code OUT (C_SPIBUFA0), A). The processing of line numbers 2976 to 2896 becomes a performance display output program and corresponds to the processing of A1508 of the output processing.

In line number 2899, the start address (R_SEGBF + 00H) of the segment area is stored in the HL register (code LD HL, R_SEGBF + 00H).

At line number 2990, the updated digit counter value currently stored in the B register is loaded into the A register (codes LD A, B).

At line number 2991, the subroutine V_GET_BYTE is called, and the numerical value stored in the address obtained by adding the value of the A register to the HL register is stored in the A register (code CALLV V_GET_BYTE). As a result, the data of the segment area corresponding to the updated digit counter is stored in the A register. The processing of line numbers 2899 to 2991 corresponds to the processing of A1509 of the output processing.

At line number 2999, the data of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (code OUT (C_SPIBUFA0), A). As a result, the output data of the segment line (LED segment 0-7) of the batch display device (LED) 50 is output from the segment area corresponding to the updated digit counter. The process of line number 2999 corresponds to the process of A1510 of the output process.

At line number 3002, the numerical value corresponding to the start address of table D_DIGTBL is loaded into the HL register (codes LD HL, D_DIGTBL).

Line number 3003 loads the updated digit counter value currently stored in the B register into the A register (codes LD A, B).

At line number 3004, the subroutine V_GET_BYTE is called to acquire the digit output data corresponding to the value of the A register (the value of the updated digit counter) in the A register based on the table D_DIGTBL (code CALLV V_GET_BYTE). The processing of line numbers 3002 to 3004 corresponds to the processing of A1511 of the output processing.

At line number 3005, the value saved in the stack area is returned to the BC register (code POP BC). As a result, the composite data of the digit output data and the external information data is stored in the B register, and the composite data of various output data of the external information is stored in the C register.

In line number 3006, the value of the upper 4 bits of the B register is set to zero by masking with 00000111B and stored in the B register (code AND B, 00000111B). As a result, the external information data is acquired in the B register.

At line number 3007, the digit output data corresponding to the updated digit counter value of the A register and the external information data of the B register are combined and stored in the A register (codes OR A and B). The processing of line numbers 3002 to 3007 corresponds to the processing of A1512 of the output processing.

At line number 3008, the composite data of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (code OUT (C_SPIBUFA0), A). As a result, the combined data of the digit output data and the external information data after updating the digit counter is output to the serial port 173a. The process of line number 3008 corresponds to the process of A1513 of the output process.

In line number 3011, the composite data of various output data of the external information currently stored in the C register is stored in the A register (codes LD A, C).

At line number 3012, the composite data of the A register is output to the transmission / reception buffer register C_SPIBUFA0 corresponding to the serial port 173a (code OUT (C_SPIBUFA0), A). The processing of line numbers 3011 to 3012 corresponds to the processing of A1514 of the output processing.

In line number 3019, the value of the A register is cleared and set to 0 by exclusive-ORing the values of the A registers (codes XOR A, A).

At line number 3024, the data of the general electric solenoid drive signal stored in the address (R_FSOLBF + 00H) is added to and stored in the A register, which is currently a value of 0 (code ORA, (IY + R_FSOLBF + 00H)). Here, the value of the IY register is 0.

In line number 3025, the data of the general electric solenoid drive signal of the A register and the data of the large winning opening solenoid drive signal stored in the address (R_TSOLBF + 00H) are combined and stored in the A register (code ORA, (IY + R_TSOLBF + 00H). )).

At line number 3026, the data in the A register and the data of the lever solenoid drive signal stored in the address (R_LSOLBF + 00H) are combined and stored in the A register (code ORA, (IY + R_LSOLBF + 00H)). As a result, the solenoid drive signal data output to the solenoid signal output port is synthesized. The processing of line numbers 3019 to 3026 corresponds to the processing of A1515 of the output processing.

At line number 3027, the composite data of the A register and the output data C_SHOT_OK of the launch permission are combined and stored in the A register (codes OR A, C_SHOT_OK). The process of line number 3027 corresponds to the process of A1516 of the output process.

At line number 3030, the final composite data of the A register is output to the transmission / reception buffer register C_SPIBUFA1 corresponding to the serial port 173a (code OUT (C_SPIBUFA1), A). The process of line number 3030 corresponds to the process of A1517 of the output process.

At line number 3035, the information (value) of the flag register 1200 is saved in the game control stack area (code PUSH PSW). The process of line number 3035 corresponds to the process of A1518 of the output process.

At line number 3036, the test firing test signal output program is called as a subroutine P_SOUTPUT (code CALL P_SOUTPUT). The process of line number 3036 corresponds to the process of A1519 of the output process. The output processing program including the performance display output program and the like is stored in the first ROM area, but the test firing test signal output program itself is stored in the second ROM area.

At line number 3037, the saved flag register 1200 information is returned (POP) from the game control stack area (code POP PSW). The process of line number 3037 corresponds to the process of A1520 of the output process.

At line number 3039, the output processing program as a subroutine is terminated and the program returns to the interrupt processing program (code RET).

[Performance display monitor control program (performance display setting program)]
FIG. 66 is a program list showing the program structure of the performance display monitor control program (performance display setting program). The performance display monitor control program (performance display setting program) is stored in the second ROM area as an out-of-area program.

Line number 9522 indicates the label of the performance display monitor control program as a subroutine. (Code P_SHYMT :).

In line number 9532, the value of the stack pointer SP is stored in the stack pointer storage area of the address (R_ESTCKPT + 00H) (code LD (R_ESTCKPT + 00H), SP). The process of line number 9532 corresponds to the process of A1901 of the performance display monitor control process.

At line number 9533, the start address of the stack area for external use (such as the stack area for performance display) is loaded into the stack pointer (code LD SP, C_S_STKTOP). The process of line number 9533 corresponds to the process of A1902 of the performance display monitor control process.

At line number 9534, the register bank selector (RBS) is set to 0 and register bank 0 is selected (code LD RBS, 0).

At line number 9535, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is saved in the stack area for external use (codes PUSH WA, BC, DE, HL, IX, IY).

At line number 9536, 1 is set in the register bank selector (RBS) and register bank 1 is selected (code LD RBS, 1).

At line number 9537, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 1 is saved in the stack area for external use (codes PUSH WA, BC, DE, HL, IX, IY). The processing of line numbers 9534 to 9537 corresponds to the processing of A1903 of the performance display monitor control processing.

At line number 9540, the subroutine P_RWMCCK of the second work RAM check process is called (code CALL P_RWMCCK). The process of line number 9540 corresponds to the process of A1904 of the performance display monitor control process.

Line number 9541 calls the subroutine P_INITTM_PRC of the initial display timer update process (code CALL P_INITTTM_PRC). The process of line number 9541 corresponds to the process of A1905 of the performance display monitor control process.

At line number 9544, the start address of the switch-related address table (D_TBL_SWINF1) is loaded into the HL register (code LD HL, D_TBL_SWINF1).

At line number 9546, the label P_SHYMT_10 is assigned to a predetermined address (9C2B) in ROM 111b (code P_SHYMT_10 :).

At line number 9547, the address value stored in the address in the HL register (initially the start address of the switch-related address table) is loaded into the DE register (code LD DE, (HL +)). "HL +" means that the address in the HL register is updated to the next address after loading.

Line number 9548 branches (jumps) to the processing of label P_SHYMT_20 when the end code 0000H is loaded in the DE register (codes JR Z, P_SHYMT_20).

At line number 9551, the current switch detection information stored in the address value (for example, 005Bh) stored in the DE register is loaded into the A register (code LDA, (DE)). The switch detection information this time is stored in the game control work area (first work area) in the first RAM area.

In line number 9552, the logical product of the mask value stored in the address in the current HL register and the current switch detection information of the A register is taken, and it is not related to the calculation of the base value from the current switch detection information. The switch detection information of the switch is erased (code AND A, (HL +)). Then, the value of the HL register is updated by +1.

At line number 9553, the address value (for example, 01CAh) stored in the address in the current HL register is loaded into the DE register (code LD DE, (HL +)). It should be noted that this address value is in the area external work area (second work area) in the second RAM area, and the previous switch detection information is stored. Then, the value of the HL register is updated by +1.

At line number 9554, the logical sum of the previous switch detection information stored in the address value (for example, 01CAh) stored in the DE register and the current switch detection information in the A register is taken and stored in the A register (code). OR A, (DE)). As for the previous switch detection information, the detection information (bit) of the switch that has been processed for detection in the prize ball addition determination process (A2209) is cleared, but the switch that has not been processed for detection is not performed. The detection information (bit value 1) of is maintained. Therefore, the detection information of the unprocessed switch including the current switch detection information is stored in the A register.

At line number 9555, the value of the A register is loaded into the address value (for example, 01CAh) stored in the DE register (code LD (DE), A). As a result, the current switch detection information of the game control work area (first work area) is an area in the second RAM area in the form of erasing the switch detection information of the switch that is not related to the calculation of the base value. It is copied to the external work area (second work area, for example, address 01CAh). The copied switch detection information this time is treated as the previous switch detection information in the next execution of the performance display monitor control program.

At line number 9556, a branch (jump) is performed so as to return to the processing of label P_SHYMT_10 (code JR P_SHYMT_10). Therefore, the processes from line number 9546 to line number 9556 are repeated until the end code 0000H is detected, and the switch detection information of the necessary switch is copied to the work area for external use. The processes from line number 9546 to line number 9556 correspond to the process of A1906 of the performance display monitor control process.

At line number 9559, the label P_SHYMT_10 is assigned to a predetermined address (9C39) in the ROM (code P_SHYMT_20 :).

At line number 9560, the subroutine P_DSPSHM of the display content update process is called (code CALL P_DSPSHM). The output data (display data) of the digits of the performance display device 152 is set in the 0th to 3rd digit output data areas. The process of line number 9560 corresponds to the process of A1907 of the performance display monitor control process.

At line number 9563, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of the register bank 1 is returned from the stack area for external use (codes POP WA, BC, DE, HL, IX, IY).

At line number 9564, the register bank selector (RBS) is set to 0 and register bank 0 is selected (code LD RBS, 0).

At line number 9565, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is returned from the stack area for external use (codes POP WA, BC, DE, HL, IX, IY). The processing of line numbers 9563 to 9565 corresponds to the processing of A1908 of the performance display monitor control processing.

At line number 9567, the value of the stack pointer storage area is loaded into the stack pointer (code LD SP, (R_ESTCKPT + 00H)). The process of line number 9567 corresponds to the process of A1909 of the performance display monitor control process.

Line number 9569 ends the performance display monitor control program as a subroutine and returns to the interrupt processing program (code RET).

[Performance display monitor control program (performance display setting program)]
FIG. 67 is a program list showing the program structure of the test firing test signal output program. The test firing test signal output program is stored in the second ROM area as an out-of-area program.

Line number 10538 indicates the label of the test firing test signal output program as a subroutine. (Code P_SOUTPUT :).

At line number 10540, the value of the stack pointer SP is stored in the stack pointer storage area of the address (R_ESTCKPT + 00H) (code LD (R_ESTCKPT + 00H), SP). The processing of line number 10540 corresponds to the processing of A1701 of the test firing test signal output processing.

At line number 10541, the start address of the stack area for external use (stack area for performance display) is loaded into the stack pointer (code LD SP, C_S_STKTOP). The process of line number 10541 corresponds to the process of A1702 of the test firing test signal output process.

At line number 10542, 0 is set in the register bank selector (RBS) and register bank 0 is selected (code LD RBS, 0).

At line number 10543, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is saved in the stack area for external use (codes PUSH WA, BC, DE, HL, IX, IY).

At line number 10544, 1 is set in the register bank selector (RBS) and register bank 1 is selected (code LD RBS, 1).

At line number 10545, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of the register bank 1 is saved in the stack area for external use (codes PUSH WA, BC, DE, HL, IX, IY). The processing of line numbers 10542 to 10545 corresponds to the processing of A1703 of the test firing test signal output processing.

At line number 10550, the value of the A register is cleared and set to 0 as 0 clear data of the test firing test signal by exclusive-ORing the values of the A registers (codes XOR A, A).

At line number 10551, 0 clear data of the test firing test signal is output to the transmission buffer register C_SPIBUFB corresponding to the serial port 173b (that is, the transmission / reception buffer register having a numerical value corresponding to the label C_SPIBUFB) (code OUT (C_SPIBUFB), A). ).

At line number 10558, the start address of the address table D_SKNDAT2 is loaded into the HL register (codes LD HL, D_SKNDAT2). The address table D_SKNDAT2 defines the address of the test signal output data area in which each test firing test signal is stored.

At line number 10559, the subroutine P_SNK_OUT is called, the address value of the HL register is updated by +1 a predetermined number of times, the data stored in the address value is sequentially synthesized, and the synthesized data is output to the serial port 173b (code). CALL P_SNK_OUT). Here, the data to be transmitted to the test terminal output port 1 is combined and output. The process of line number 10559 corresponds to the process of A1704 of the test firing test signal output process.

At line number 10560, the subroutine P_SNK_OUT is called to synthesize the data to be transmitted to the test terminal output port 2 and output the synthesized data to serial port 173b (code CALL P_SNK_OUT) in the same manner as line number 10559. The processing of line number 10560 corresponds to the processing of A1705 of the test firing test signal output processing.

At line number 10561, the subroutine P_SNK_OUT is called, and similarly to line number 10559, the data to be transmitted to the test terminal output port 3 is synthesized, and the synthesized data is output to the serial port 173b (code CALL P_SNK_OUT). The process of line number 10561 corresponds to the process of A1706 of the test firing test signal output process.

At line number 10562, the subroutine P_SNK_OUT is called to synthesize the data to be transmitted to the test terminal output port 4 and output the synthesized data to serial port 173b (code CALL P_SNK_OUT) in the same manner as line number 10559. The process of line number 10562 corresponds to the process of A1707 of the test firing test signal output process.

At line number 10563, the subroutine P_SNK_OUT is called to synthesize the data to be transmitted to the test terminal output port 5 and output the synthesized data to serial port 173b (code CALL P_SNK_OUT) in the same manner as line number 10559. The process of line number 10563 corresponds to the process of A1708 of the test firing test signal output process.

At line number 10564, the subroutine P_SNK_OUT is called, the data to be transmitted to the test terminal output port 6 is synthesized, and the combined data is output to the serial port 173b (code CALL P_SNK_OUT). The process of line number 10564 corresponds to the process of A1709 of the test firing test signal output process.

At line number 10569, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of the register bank 1 is returned from the stack area for external use (codes POP WA, BC, DE, HL, IX, IY).

At line number 10570, the register bank selector (RBS) is set to 0 and register bank 0 is selected (code LD RBS, 0).

At line number 10571, the information (value) of the WA register, BC register, DE register, HL register, IX register, and IY register of register bank 0 is returned from the stack area for external use (codes POP WA, BC, DE, HL, IX, IY). The processing of line numbers 10569 to 10571 corresponds to the processing of A1710 of the test firing test signal output processing.

At line number 10573, the value of the stack pointer storage area is loaded into the stack pointer (code LD SP, (R_ESTCKPT + 00H)). The process of line number 10573 corresponds to the process of A1711 of the test firing test signal output process.

At line number 10575, the test firing test signal output program as a subroutine is terminated, and the program returns to the output processing program (in the interrupt processing program) (code RET).

[Display mode of base value]
A display mode of the base value displayed as performance information on the performance display device 152 will be described with reference to FIGS. 68 and 69.

FIG. 68 is set by the performance display monitor control process (performance display setting process) (FIG. 58) and the performance display monitor aggregation process (performance display editing process) (FIG. 60) described above, and is set by the performance display output process (A1508 of FIG. 56). It is a figure which shows the display example of the base value which is output and displays the display data by).

As shown in FIG. 68, the base value is displayed cyclically by switching the type every 5 seconds (predetermined period). For example, the type of base value displayed is the real-time value being measured (that is, the latest base value (final base value) of the management section currently being measured) → the base value measured throughout the previous management section (that is, the base value measured throughout the previous management section. That is, the final base value of the management section one time before) → the base value measured throughout the management section two times before (that is, the final base value of the management section two times before) → measured throughout the management section three times before The base value is switched (that is, the final base value of the management section three times before) → the real-time value during measurement → ...

As described above, the real-time value during the measurement of the base value is stored in the base value storage area 0. The base value measured over the entire management section 1, 2, and 3 times before is stored in the base value storage areas 1, 2, and 3. Then, when the management section is switched, it is shifted (moved) to the adjacent base value storage area and stored (A2206 in FIG. 60).

Here, the digit 0 and the digit 1 correspond to an identification segment (identification segment) that identifies and indicates the type of the base value. Digits 2 and 3 correspond to ratio segments (ratio segments, numerical segments) that indicate the base value as a ratio (%). When the power is turned on, the above-mentioned initial display (blinking of all segments of all digits) is displayed in digits 0 to 3.

The identification segment (digit 0 and digit 1) is displayed as "bL." Corresponding to the real-time value during measurement of the base value, and corresponds to the base value measured throughout the entire management section immediately before. , "B1." Is displayed and corresponds to the base value measured throughout the entire management section two times before, and "b2." Is displayed and corresponds to the base value measured throughout the entire management section three times before. , "B3." Is displayed.

The ratio segment (digits 2 and 3) is displayed as "99." when the base value after rounding is 100 or more, and is displayed as "00" when the counter value of the normal out counter TOUT is 0. indicate.

FIG. 69A shows a management section which is a measurement section of the base value. In the management section, every time the total number of out balls increases by 300 or 60,000, the power is turned on when the game hall (game store) opens (at the time of opening), and then section A → section B → section C → section D → section E. → ... to switch. As described above, even if the RAM is cleared (RAM initialization) due to fraud, the normal prize ball counter NSHO, the normal out counter TOUT, and the total out counter SOUT are continuously counted without being cleared. Therefore, each management section (sections A to E) may not be changed, and the performance information (base value) may not be suddenly changed.

FIG. 69 (B) shows the real-time value (bL.) During the measurement of the base value and the base value (b1. To b3. It is a figure explaining the display mode of).

Regarding the real-time value (bL.), The identification segment (digit 0 and digit 1) is displayed by blinking "bL." In the section A, and in the section after the section B, when the normal out counter TOUT is 0 to 5999. "BL." Is blinked and displayed, and "bL." Is normally displayed by lighting when the out counter is 6000 or more. As a result, "bL." Is blinked and displayed while the real-time value is not stable. Regarding the real-time value (bL.), The ratio segment (digit 2 and digit 3) is displayed as "---" even if the real-time value is calculated (measured) in the section A, and the real-time calculated as it is in the section after the section B. Display the value. In section A, the real-time value is not stable and is not displayed.

Regarding the base value (b1.) Measured throughout the entire management section one time before, the identification segment (digit 0 and digit 1) is displayed by blinking "b1." In sections A and B, and the section after section C. Then, "b1." Is lit and displayed. Regarding the base value (b1.), The ratio segment (digits 2 and 3) is displayed as “−−” in the intervals A and B, and the final base values (digits B to D) in the intervals C to E, respectively. The final value of the real-time value) is displayed as it is.

Regarding the base value (b2.) Measured throughout the entire management section two times before, the identification segment (digit 0 and digit 1) is displayed by blinking "b2." In the sections A to C, and the section after the section D. Then, "b2." Is lit and displayed. Regarding the base value (b2.), The ratio segment (digits 2 and 3) is displayed as "---" in the intervals A to C, and in the intervals D and E, the final base values (real time) of the intervals B and C, respectively. The final value of the value) is displayed as it is.

Regarding the base value (b3.) Measured over the entire management section three times before, the identification segment (digit 0 and digit 1) is displayed by blinking "b3." In the sections A to D, and the section after the section E. Then, "b3." Is lit and displayed. Regarding the base value (b3.), The ratio segment (digits 2 and 3) is displayed as “−−” in the sections A to D, and the final base value of the section B is displayed as it is in the section E, respectively.

[Action / effect of the third embodiment]
The game machine 10 according to the third embodiment includes a game control means (for example, a game control device 100) capable of executing a game (variable display game), and is advantageous to the player when the result of the game is a special result. A special gaming state can be generated. The game control means includes a program storage means (for example, ROM111b) that stores a program, an arithmetic processing means (for example, CPU111a) that performs predetermined arithmetic processing by the program, and update information storage that can store information updated by the arithmetic processing means. A means (for example, RAM 111c) is provided. The program storage means is not between the first program storage area (for example, the first ROM area), the second program storage area (for example, the second ROM area), and the first program storage area and the second program storage area. It includes a used area (for example, a first unused ROM area). The arithmetic processing means (for example, CPU 111a) sets the data of the test signal (for example, the test firing test signal) related to the game machine by the test signal setting program stored in the first program storage area, and sets the data in the second program storage area. The test signal data is output by the test signal output program stored in.

According to such a game machine 10, the test signal output program has a second program storage area that can be recognized as a location different from the first program storage area (for example, the first ROM area) in which the test signal setting program is stored. It is placed in (for example, a second ROM area). Therefore, the part corresponding to the test signal output program can be easily understood and can be reused for other gaming machines (shared with other gaming machines), and the development efficiency of the program used in the gaming machine 10 can be improved.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means outputs the test signal data as serial data. Therefore, in the game control means (for example, the game control device 100), the number of wires (number of signals) and the number of terminals (number of pins) of the connector are reduced, and a sufficient space (place) for arranging electronic parts and the like can be secured, and the cost is reduced. It also leads to reduction. When outputting test signal data as parallel data, it is necessary to provide wiring and terminals according to the type of data to be transmitted, so the number of wirings (number of signals) and the number of connector terminals (number of pins) are different. growing.

In the gaming machine 10 according to the third embodiment, the update information storage means (for example, RAM 111c) includes a first information storage area (for example, a first RAM area) and a second information storage area (for example, a second RAM area). , An unused area (for example, a first unused RAM area) between the first information storage area and the second information storage area. The arithmetic processing means (for example, CPU 111a) is stored in the second information storage area (for example, the second RAM area) by the performance display output program stored in the first program storage area (for example, the first ROM area). The test signal output program that outputs the display data of the performance information related to the game machine and stores it in the second program storage area (for example, the second ROM area) causes the first information storage area (for example, the first RAM area). ), The data of the test signal related to the game machine is output.

According to such a gaming machine 10, the part corresponding to the test signal output program becomes easy to understand and can be reused for other gaming machines (shared with other gaming machines), and the program used in the gaming machine 10 Development efficiency can be improved. Further, since the display data of the performance information and the data of the test signal are stored in different areas (first information storage area, second information storage area) that can be distinguished by the unused area, the handling of these data becomes easy. , Performance display output program and test signal output program will be easier to develop and understand.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means (for example, CPU 111a) sets the value of the register provided in the arithmetic processing means into the stack area of the update information storage means before outputting the data of the test signal. Before saving and outputting the display data of the performance information, the value of the register provided in the arithmetic processing means is not saved in the stack area of the update information storage means.

According to such a gaming machine 10, the register of the arithmetic processing means (for example, CPU 111a) may be affected by a device outside the gaming machine such as the relay board 70 or the testing firing test device during the output of the test firing test signal data. However, the register value can be saved in the stack area to protect it before the test signal data is output. Before outputting the display data of the performance information that is not related to the device outside the gaming machine, the register value is not saved in the stack area, and the amount of data to be saved can be reduced.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means outputs the performance information display data and the test signal data as serial data from different output ports. Therefore, even if the parts related to the test firing test are not mounted at the time of mass production (other than the test firing test), the output of the display data of the performance information is not affected.

Further, the gaming machine 10 according to the third embodiment includes a setting changing means (for example, a setting changing device 42) capable of changing a setting value (probability setting value) according to a setting related to the game, and the arithmetic processing means is the first. The set value is set in the first information storage area (for example, the first RAM area) by the set value changing program stored in the program storage area (for example, the first ROM area). Therefore, by executing the setting value changing program, the arithmetic processing means updates the probability setting value in the probability setting value area, and stores and sets the updated probability setting value in the probability setting value area of the first information storage area. be able to.

Further, in the gaming machine 10 according to the third embodiment, the arithmetic processing means initializes at least a part of the first information storage area under predetermined conditions when the power is turned on, but the second information storage area is used. Does not initialize. Therefore, even if the update information storage means (for example, RAM111c) is initialized due to fraud during the opening (opening) of the amusement park, the second information storage area is neither cleared nor initialized, and the performance is improved. The continuity (continuity) of the display data of the information (for example, the base value) can be maintained, and the person who confirms the performance information does not feel uncomfortable.

[Fourth Embodiment]
The gaming machine 10 of the fourth embodiment will be described with reference to FIG. 70. The configuration other than that described below may be the same as that of the first embodiment. Further, in the following embodiments, the same reference numerals are used for configurations that perform the same functions as those in the first embodiment, and duplicate descriptions will be omitted as appropriate.

The base value shown in the fourth embodiment is a performance value (performance information) of the gaming machine 10, and is a ball ejection rate in a normal gaming state. Further, in general, a set value (fixed value) is set for each gaming machine as the base value. In the fourth embodiment, an example in which the set value (design base value) of the gaming machine 10 is stored in the ROM 111b (FIG. 3) of the gaming microcomputer 111 is shown. Further, the CPU 111a (FIG. 3) of the gaming microcomputer 111 acquires a base value (measurement base value) in actual shooting by calculating the ball ejection rate (base calculation). As described above, the ball output rate is calculated by (number of acquired balls ÷ number of ejected balls) × 100 (%).

[Base error notification processing]
First, the base error notification process will be described. FIG. 70 is a flowchart showing a procedure of base error notification processing by the game control device 100. The base error notification process may be executed as a part of the performance display editing process (A1052 in FIG. 5B). Alternatively, it may be executed between steps A1318 and A1319 of the timer interrupt process (FIG. 6A).

As shown in FIG. 70, when the game control device 100 starts the base error notification process, it first determines whether or not the number of out balls is equal to or greater than the specified number (A10101). The number of out balls (number of ejected balls) can be obtained by counting the signal of the out ball detection switch 74 (FIG. 3). Further, the acquired out-ball number is stored in the out-ball number area (for example, the area in the RAM 111c (FIG. 3) of the gaming microcomputer 111). The specified number is 60,000. The specified number does not have to be constant, and may be changed depending on the situation (for example, the time from when the power of the gaming machine 10 is turned on or the gaming state).

When the number of out balls is less than the specified number (the result of A10101 is "N"), the determination of whether or not the number of out balls is equal to or more than the specified number is repeated (A10101). On the other hand, when the number of out balls is equal to or greater than the specified number (the result of A10101 is "Y"), the game control device 100 acquires the design base value stored in the ROM 111b (FIG. 3) of the game microcomputer 111. (A10102). The out-ball number region for storing the out-ball number is cleared to zero when the specified number is reached (that is, when the result of A10101 becomes "Y").

Next, the game control device 100 acquires a base value (measurement base value) in actual shooting by calculating the ball output rate (base calculation) (A10103). The base value (measurement base value) is calculated as a performance value (performance information) in the performance display editing process (A1052). Next, the game control device 100 calculates a difference (absolute value) between the acquired measurement base value and the design base value acquired from the ROM 111b (FIG. 3) of the game microcomputer 111 (A10104). Specifically, (measurement base value)-(design base value) is calculated, and the absolute value of the calculation result value is obtained.

Next, the game control device 100 determines whether or not the difference (absolute value) between the measurement base value and the design base value is within the range of 0 to 10% of the design base value (A10105). That is, the ratio of the difference (absolute value) between the measurement base value and the design base value to the design base value is calculated. Specifically, {(difference between measurement base value and design base value (absolute value)) ÷ (design base value)} × 100 (%) is calculated. Then, it is determined whether or not the calculation result is within the range of 0 to 10% of the design base value.

When the difference (absolute value) between the measurement base value and the design base value is within the range of 0 to 10% of the design base value (the result of A10105 is "Y"), the base error notification process is terminated. In this way, when the degree of deviation between the measurement base value and the design base value is small, the game machine 10 is fraudulent, the game machine 10 is out of order, or the state of the obstacle nail of the game machine 10 is the same as at the time of shipment. Since it is considered that there is little possibility that they are different, the base error notification process is terminated without performing the base error notification.

On the other hand, when the difference (absolute value) between the measurement base value and the design base value exceeds 10% of the design base value (the result of A10105 is "N"), the game control device 100 sets the measurement base value. It is determined whether or not the difference (absolute value) from the design base value is 21% or more of the design base value (A10106). When the difference (absolute value) between the measurement base value and the design base value is 21% or more of the design base value (the result of A10106 is "Y"), the game control device 100 sets a strong error flag in a predetermined register. Is set (A10107).

When the strong error flag is set in this way, the game control device 100 outputs data for displaying the strong error to the driver 150 of the performance display device 152, and further, an external device (information collecting terminal or game hall). The on-data of the strong error signal for notifying the internal management device (hall computer) or the like of the strong error is output to the external information terminal 71.

For example, when the strong error flag is set, the on-data of the strong error signal is saved in the external information output data area by the external information editing process (A1319 in FIG. 6A) and notified to the external device. For example, strong error notification information that is notified to an external device (information collection terminal, amusement park internal management device (hall computer), etc.) installed in a game store, and that the measurement base value and the design base value are significantly different from the external device. Is output by voice or image display. The output of this strong error notification information enables hall personnel and the like to quickly determine whether the gaming machine 10 is fraudulent or malfunctioning.

Alternatively, when the strong error flag is set, the performance display monitor control process (A1320 in FIG. 6A) outputs data for displaying the strong error to the driver 150, and the strong error is notified by the performance display device 152. (Is displayed. In this way, in the performance display device 152, the strong error notification information indicating that the measurement base value and the design base value are significantly different is notified (displayed), so that the hall personnel and the like can promptly detect the fraud or failure of the gaming machine 10. It becomes possible to judge.

On the other hand, when the difference (absolute value) between the measurement base value and the design base value is less than 21% of the design base value (that is, more than 10% but less than 21%) (the result of A10106 is "N"). The game control device 100 sets a weak error flag in a predetermined register (A10108).

When the weak error flag is set in this way, the game control device 100 outputs data for displaying the weak error to the driver 150 of the performance display device 152, and further, an external device (information collecting terminal or game hall). The on-data of the weak error signal for notifying the internal management device (hall computer) or the like of the weak error is output to the external information terminal 71.

For example, when the weak error flag is set, the on-data of the weak error signal is saved in the external information output data area by the external information editing process (A1319 in FIG. 6A) and notified to the external device. For example, an external device installed in a game store (information collection terminal, amusement park internal management device (hall computer), etc.) is notified, and the external device notifies a weak error that the measurement base value and the design base value are slightly different. Information is output by voice or image display. The output of this weak error notification information enables hall personnel and the like to quickly determine that the gaming machine 10 is fraudulent or malfunctioning, or that the state of the obstacle nail of the gaming machine 10 is different from that at the time of shipment.

Alternatively, when the weak error flag is set, the performance display monitor control process (A1320 in FIG. 6A) outputs data for displaying the weak error to the driver 150, and the weak error is notified by the performance display device 152. (Is displayed. In this way, in the performance display device 152, the weak error notification information indicating that the measurement base value and the design base value are slightly different is notified (displayed), so that the hall personnel and the like are illicitly or malfunctioning the gaming machine 10. Alternatively, it is possible to quickly determine that the state of the obstacle nail of the gaming machine 10 is different from that at the time of shipment.

The mode of notification of the strong error notification information and the weak error notification information is different. For example, when the performance display device 152 is a 4-digit 7-segment type display as described above, the strong error notification information is prominently displayed as "EEEE" using 4 digits, and the weak error notification information is displayed. May be displayed as "---" so as not to stand out. Further, for example, in an external device, the strong error notification information may be notified by a loud voice from the speaker or a large image display on the monitor, and the weak error notification information may be notified by a small voice or a small image display on the monitor. ..

[Action / effect of the fourth embodiment]
The gaming machine 10 according to the fourth embodiment can execute a game (general figure variation display game, special figure variation display game), and is advantageous to the player when the result of the game is a special result (big hit). It is a gaming machine capable of generating a special gaming state (big hit state). Further, the gaming machine 10 includes a performance value measuring means (game control device 100 (particularly, a gaming microcomputer CPU 111a)) for measuring the performance value (base value (ball ejection rate in a normal gaming state)) of the gaming machine 10 and its measurement. A calculation means (game control device 100 (particularly, game control device 100 (particularly)) for calculating the difference (difference (absolute value) between the measurement base value and the design base value) between the performance value (measurement base value) and the predetermined design value (design base value). An error notification means (game control device) that notifies an error (weak error, strong error) when the ratio of the game microcomputer CPU111a)) and the difference to a predetermined design value is larger than a predetermined value (for example, 10%). 100 (particularly, a game microcomputer CPU 111a) and the like).

According to such a gaming machine 10, the performance value (base value) of the gaming machine 10 is measured, and the difference between the measured performance value (measurement base value) and a predetermined design value (design base value) is calculated. However, when the ratio of the difference to the predetermined design value is larger than the predetermined value (for example, 10%) (and less than 21%), a weak error can be notified, so that the gaming machine 10 is illegal. It is possible to quickly detect an error, a failure, or a state of the obstacle nail of the gaming machine 10 that is different from that at the time of shipment.

Further, according to such a gaming machine 10, the performance value (base value) of the gaming machine 10 is measured, and the difference between the measured performance value (measurement base value) and a predetermined design value (design base value). Is calculated, and when the ratio of the difference to the predetermined design value is equal to or greater than the predetermined value (for example, 21%), a strong error can be notified, so that fraud or failure of the gaming machine 10 can be quickly detected. Can be done.

Further, in the gaming machine 10 according to the fourth embodiment, when the number of ejected gaming balls ejected from the gaming area reaches a specified number, the calculation means (game control device 100) calculates the difference and notifies the error. The means (game control device 100, etc.) can notify the error. Therefore, the difference is not always calculated and the error is not notified, and the load on the calculation means and the error notification means is reduced.

[Fifth Embodiment]
A fifth embodiment will be described with reference to FIGS. 71 to 82. The configurations other than those described below may be the same as those of the first to fourth embodiments.

[Production control device of the fifth embodiment]
FIG. 71 is a block diagram showing an effect control device 300 constituting the gaming machine 10 of the fifth embodiment, a substrate connected to the effect control device 300, and the like. As shown in FIG. 71, the game machine 10 of the present embodiment includes a power supply device 400, a game control device 100 (game control means, not shown), and an effect control device 300 (effect control means). The board surface relay board 915, the frame relay board 916, the cooling fan 45, the LVDS board 918, the ROM board 920, and the like are connected via a harness and a connector (CN).

The effect control device 300 is connected to the power supply device 400, and a DC power supply (32V, 15V, 12V, 5V), a power failure monitoring signal (5V), and a reset signal (5V) are input. Further, an analysis port 955 or the like can be connected to the effect control device 300.

The effect control device 300 is provided with a voltage generation unit 800 (voltage generation means). The voltage generation unit 800 generates output voltages of 1.05V, 1.5V, and 3.3V from the DC power supply (5V) from the power supply device 400. The details of the voltage generation unit 800 will be described later.

The board surface relay board 915 is connected to the board surface motor driver 44a (a part of the board surface effect device 44), the board surface motor sensor 47a (directing accessory switch 47), and the board surface decoration LED driver 46a (a part of the board surface decoration device 46). It is a relay board for transmitting and receiving signals. Further, DC power (32V, 15V, 12V, 5V) is supplied from the power supply device 400 to the board surface relay board 915 via the effect control device 300.

The frame relay board 916 includes a frame motor driver 44b (a part of the frame effect device), an effect button switch 25a, a frame motor sensor 47b, a first frame speaker (upper speaker 19a), a second frame speaker (lower speaker 19b), and a frame. It is a relay board for transmitting and receiving signals to and from the decorative LED driver 18a (a part of the frame decoration device 18). Further, a DC power supply (12V, 5V) is supplied from the power supply device 400 to the frame relay board 916 via the effect control device 300.

The cooling FAN 45 operates by supplying a DC power supply (12V) from the power supply device 400 via the effect control device 300.

The LVDS board 918 is a relay board that relays the effect control device 300 and the display device 41. A DC power supply (32V, 12V, 5V) is supplied from the power supply device 400 to the LVDS board 918 via the effect control device 300. Further, a DC power supply (3.3V) is supplied from the voltage generation unit 800 to the LVDS board 918, and the DC power supply is output to the display device 41.

A power generation circuit 919 can be provided on the LVDS board 918. The power supply generation circuit 919 converts the DC power supply (32V) supplied from the power supply device 400 into a DC power supply (12V) and outputs it to the display device 41 (LED backlight 917). As a result, the power generation circuit 919 can be designed according to the standard of the display device 41 to be connected, and even when the display device 41 is replaced, it is necessary to modify the effect control device 300 simply by replacing the LVDS board 918. Therefore, the display device 41 can be easily replaced accordingly.

The ROM board 920 includes an image ROM 325 and outputs image information stored in the image ROM 325 to a VDP 312 (video display processor, arithmetic circuit). A DC power supply (3.3V) is supplied to the ROM board 920 from the voltage generation unit 800.

The effect control device 300 is provided with a first VDP-RAM 923 (storage means) and a second VDP-RAM 924 (storage means). The first VDP-RAM 923 and the second VDP-RAM 924 are storage media for temporarily storing image information (moving images, still images) decoded by VDP 312, and a DC power supply (1.5 V) is supplied from the voltage generator 800. It works by.

The VDP 312 (general-purpose port 942) constituting the effect control device 300 transmits and receives a signal to and from the outside by using a 3.3 V signal. However, the built-in host CPU (CPU311, image processing means, VDP core, arithmetic processing means) constituting the VDP 312 operates at 1.05 V and becomes the first VDP-RAM 923 (storage means) and the second VDP-RAM 924 (storage means). The connected DRAMI / F940 operates at 1.5V. Therefore, the VDP 312 operates by supplying a DC power supply (1.05V, 1.5V, 3.3V) from the voltage generation unit 800.

As the input side of the VDP 312, the effect control device 300 includes a level conversion circuit 921 that performs signal level conversion (5.0V → 3.3V) of the power supply device 400 (power failure monitoring signal, reset signal), and a game control device 100 (game control device 100). Level conversion circuit 922 that performs signal level conversion (5.0V → 3.3V) of the production command), level conversion circuit 926 that performs level conversion (5.0V → 3.3V) of the signal from the board motor sensor 47a, A level conversion circuit 929 that performs level conversion (5.0V → 3.3V) of signals from the effect button switch 25a and the frame motor sensor 47b is provided.

Further, as the output side of the VDP 312, the effect control device 300 performs level conversion (3.3V → 5.0V) of a signal transmitted to the board surface relay board 915 (board surface motor driver 44a, board surface motor sensor 47a). A level conversion circuit 928 and an LVDS board 918 that perform level conversion (3.3V → 5.0V) of a signal transmitted to the circuit 925 and the frame relay board 916 (frame motor driver 44b, effect button switch 25a, frame motor sensor 47b). A level conversion circuit 934 that performs level conversion (3.3V → 5.0V) of a signal transmitted to the display device 41 (LED backlight 917) via the display device 41 (LED backlight 917) is provided.

Further, for the bidirectional communication of the VDP 312, the effect control device 300 has a level shift circuit (3.3V⇔5.0V) for level shifting (3.3V⇔5.0V) of the signal transmitted in both directions by the board decoration LED driver 46a and the I2C communication method. The 927, the frame decoration LED driver 18a (frame decoration device 18), and the level shift circuit 932 for level shifting (3.3V⇔5.0V) of the signal transmitted in both directions by the I2C communication method are provided.

The effect control device 300 is provided with an amplifier circuit 337 (first amplifier circuit 930, second amplifier circuit 931) in which a DC power supply (15V) from the power supply device 400 is supplied and the audio data output from the VDP 312 is amplified. ing. The first amplifier circuit 930 outputs the amplified audio data to the first frame speaker (upper speaker 19a), and the second amplifier circuit 931 outputs the amplified audio data to the second frame speaker (lower speaker 19b). do.

The effect control device 300 is provided with a protection circuit 933 that stabilizes the LVDS signal output from the VDP 312, and the protection circuit 933 outputs the LVDS signal (3.3V) to the display device 41 via the LVDS board 918. ..

The effect control device 300 includes a watchdog timer circuit 324 that monitors the operation of the VDP 312, a PROM 321 that stores programs executed by the VDP 312 and various data, and a FeRAM 323 that can retain the stored contents even if power is not supplied in the event of a power failure. A volume control switch 335 (input circuit) and the like are provided. Further, the LVDS board 918 is provided with a real-time clock circuit 338 connected to the high voltage (5V) side of the level shift circuit 932.

The VDP 312 has a CPU 311 (built-in host CPU) that analyzes production commands transmitted from the game control device 100, a RAM 322 (built-in CPU work memory) that provides a work area for the CPU 311 and a CPU I / that sends and receives data in the CPU 311 and the VDP 312. Initialize the HOSTCPUI / F938 and VDP312 that transmit the data in F937 and PROM321 to the CPU311 and output various commands (display list, motor command, lamp command, sound command) obtained by the CPU311 analyzing the production command. It has a system control register 939.

The VDP 312 transmits and receives image information (moving images, still images) between a general-purpose port 942 that transmits and receives signals to and from the outside, a CG bus I / F 941 that reads image information from an image ROM 325, and a first VDP-RAM 923 and a second VDP-RAM 924. Has a DRAM I / F 940 to perform.

The VDP 312 has a controller 943 that outputs motor control data based on a motor command and outputs LED control data based on a lamp command. The controller 943 generates motor control data based on the motor command, and outputs the data to the board motor driver 44a, the board motor sensor 47a, the frame motor driver 44b, and the frame motor sensor 47b in a form that can be distinguished from each other.

Further, the controller 943 decodes the lamp command based on the lamp decoder 944 to generate LED control data, and identifies them to the board decoration LED driver 46a and the frame decoration LED driver 18a (a part of the frame decoration device 18). Output in a form that can be done.

The VDP 312 has a sound ROM 327 that outputs voice data based on a sound command. The sound ROM 327 selects the voice data stored by itself based on the sound command, decodes the voice data based on the sound source LSI 314 (sound decoder), and adjusts the sound quality by the post-effector 945 and the volume control switch 335. The sound is output to the first frame speaker (upper speaker 19a) and the second frame speaker (lower speaker 19b).

The VDP 312 includes an image processing circuit that performs image processing based on a display list. The image processing circuit decodes the read image information into the VRAM 326 (or the first VDP-RAM 923, the second VDP-RAM 924) and the preloader circuit 946 that reads the image information from the image ROM 325 or the VRAM 326 (storage means) based on the display list. A graphics decoder 947, a drawing circuit 948 that draws image information in the frame buffer on the VRAM 326 (or the second VDP-RAM 924), a geometry engine 949 that sets the coordinates of the image information, and a VRAM 326 (or the first VDP-). The index table circuit 950 that allocates the storage area in the RAM 923 and the second VDP-RAM 924) and the display circuit 951 (display A) that displays and outputs the frame buffer data and the like stored in the VRAM 326 (or the first VDP-RAM 923 and the second VDP-RAM 924). , Display B, Display C), a signal conversion circuit 313 that outputs frame buffer data and the like to the display device 41 via the output selection circuit 952, and other data transfer that transmits and receives data in the image processing circuit. It has a circuit 953 and a circuit 953, which transmits and receives data to and from each other through a bus 954.

The VDP 312 has an address bus 935 and a data bus 936. The address bus 935 includes a HOSTCPUI / F938, a system control register 939, a DRAMI / F940, a CG bus I / F941, a general-purpose port 942, a controller 943, a sound ROM 327, a graphics decoder 947, a data transfer circuit 953, a preloader circuit 946, and a display circuit. Addresses are transmitted and received between 951 and the drawing circuit 948. The data bus 936 is located between the HOSTCPUI / F938, DRAMI / F940, VRAM326, CG bus I / F941, controller 943, sound ROM327, graphics decoder 947, data transfer circuit 953, preloader circuit 946, display circuit 951, and drawing circuit 948. Data is sent and received at.

In this embodiment, the first VDP-RAM 923 and the second VDP-RAM 924 have a common address bus 959a and data bus 959b connected to the DRAMI / F940. The first VDP-RAM 923 can access the upper 8 bits of the image information (16 bits) via the data bus 959b, and the second VDP-RAM 924 can access the lower 8 bits of the image information via the data bus 959b. It is composed.

Here, in the image information (16 bits), the moving image (upper 8 bits) data and the still image (lower 8 bits) data are associated with one address. Therefore, the moving image data is stored in the first VDP-RAM 923, and the still image data is stored in the second VDP-RAM 924.

As a result, when the display circuit 951 specifies one address for reading, the moving image data stored in the first VDP-RAM 923 and the still image data stored in the second VDP-RAM 924 can be read out at the same time. Therefore, the transfer speed of image information (moving image data, still image data) to the display device 41 can be improved.

[Decoration control device]
FIG. 72 is a circuit diagram of the decorative control device 750. Here, the decorative control device 750 (effect device) corresponds to the board surface relay board 915 (board surface motor driver 44a) or the frame relay board 916 (frame motor driver 44b).

The decoration control device 750 is electrically connected to the effect control device 300 and receives power of 32V, 15V, 12V, and 5V from the power supply device 400. Further, a serial data signal (SDATA), a serial clock signal (SCLK), a latch signal (LATCH), and an enable signal (ENBL) are input from the VDP 312 (CPU311) to the decoration control device 750.

A driver 751, a driver 752, and a driver 753 are arranged in the decoration control device 750 (the number of drivers is arbitrary). The drivers 751 and 752 drive the motors M1 and M2 (first driven portion) (stepping motor (not shown)) for operating the accessory, and the driver 753 is a solenoid S (not shown) for operating the accessory. The second driven portion (not shown) is driven, but each has the same configuration.

A serial data signal (SDATA), a serial clock signal (SCLK), a latch signal (LATCH), and an enable signal (ENBL) are input to the drivers 751, 752, 753 from VDP312 (CPU311) (FIG. 71), respectively. These signals are represented by a binary sequence of High (5V) and Low (0V). For example, a serial data signal (SDATA) is represented by 12 bits.

The drivers 751, 752, 753 have a signal line 754A for transmitting a serial data signal (SDATA), a signal line 754B for transmitting a serial clock signal (SCLK), and a signal line 754C for transmitting a latch signal (LATCH). The signal line 754D to which the enable signal (ENBL) is transmitted is connected.

The signal lines 754A-754D have elements for stabilizing High (5V) and Low (0V), that is, pull-up resistors 755A-755D, Zener diodes 756A-756D, resistors 757A-757D, capacitors 758A-758D, and buffers. A 759A-759D (single Schmitt trigger buffer) and a resistor 760A-760D are attached.

One end of the pull-up resistor 755A-755D is connected to the 5V terminal (power supply unit 400 (DC5V)), the other end is connected to the signal line 754A-754D, and the voltage of the signal line 754A-754D when each signal is HIGH. Is raised to 5V.

The Zener diode 756A-756D has the cathode side connected to the signal line 754A-754D and the anode side grounded. As the Zener diode 756A-756D, a Zener diode (Zener breakdown voltage) set to 5V is applied so that the voltage of the signal lines 754A-754D does not exceed 5V when each signal is HIGH.

The resistors 757A-757D are interposed in the signal line 754A-754D at a position downstream of the signal connection position of the pull-up resistor 755A-755D with the signal line 754A-754D.

One end of the capacitor 758A-758D is connected to the signal line 754A-754D at a position downstream of the resistor 757A-757D, and the other end is grounded.

The resistor 757A-757D and the capacitor 758A-758D function as a low-pass filter whose output destination is the driver 751, 752, 753.

The buffer 759A-759D is interposed in the signal line 754A-754D at a position downstream of the connection position of the capacitor 758A-758D with the signal line 754A-754D to eliminate the fluctuation of each signal (voltage). It is a thing. The resistors 760A-760D are interposed in the signal line 754A-754D at a position downstream of the position where the buffer 759A-759D is interposed, and transmit the current (signal) input to the driver 751, 752, 753. It is something to adjust.

The drivers 751, 752, 753 have a drive voltage input terminal VM, a clamp voltage input terminal VCLAMP, a serial data input terminal SDATAIN, a serial clock input terminal SCLK, a latch signal input terminal LATCH, an enable signal input terminal ENBL, and a reset terminal RESET as input sides. Has. Further, the drivers 751, 752, 753 have a first output terminal OUT1, a second output terminal OUT2, a third output terminal OUT3, a fourth output terminal OUT4, a serial data output terminal SDATAO, and a ground terminal GND as output sides. Has. Each driver 751, 752, 753 includes a shift register, a latch circuit, etc., and takes in serial data from the input terminal SDATAIN by a latch signal, so that the first output terminal OUT1, the second output terminal OUT2, and the third output terminal OUT3, It can be output from the fourth output terminal OUT4.

The signal line 754A is connected to the serial data input terminal SDATAIN of the driver 751. The signal line 754B is branched at the tip and connected to the serial clock input terminal SCLK of the driver 751, 752, 753, respectively. The signal line 754C is branched at the tip and connected to the latch signal input terminal LATCH of the driver 751, 752, 753, respectively. The signal line 754D is branched at the tip and connected to the enable signal input terminal ENBL of the driver 751, 752, 753, respectively. In the drivers 751, 752, 753, when the enable signal is High, the output of the first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 is prohibited, and when the enable signal is Low, the output is prohibited. Permissible.

The first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 of the driver 751 are connected to, for example, the accessory motor M1 (stepping motor (not shown)), and similarly, the driver 752. The first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 are connected to another motor M2 (stepping motor (not shown)) different from the motor M1. The first output terminal OUT1 (which may be another output terminal) of the driver 753 is connected to, for example, the solenoid S (not shown) of the accessory. Although the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 of the driver 753 are unused, they may be used for driving other solenoids.

The motors M1 and M2 drive the accessory or the like by a rotational force, and the solenoid S drives the accessory or the like by a reciprocating motion, and the driving modes are different from each other.

A 12V terminal (power supply device 400 (DC12V)) is connected to the drive voltage input terminal VM of the driver 751, 752, 753, and a 12V terminal (power supply device) is connected to the reset terminal RESET of the driver 751, 752, 753 via a capacitor 761. 400 (DC12V)) is connected. Normally, the ground potential is supplied to the reset terminal RESET, but a reset signal due to a voltage rise due to a high-frequency noise signal from the 12V terminal is input, and the reset signal is a component (shift) inside the driver 751, 752, 753. Initialize the register, latch circuit, etc.).

A 15V terminal (power supply device 400 (DC15V)) is connected to the clamp voltage input terminals VCLAMP of the drivers 751 and 752 via a Zener diode 762 (backflow prevention means). The Zener diode 762 has an anode side connected to a 15V terminal and a cathode side connected to a clamp voltage input terminal to prevent backflow of current to the 15V terminal. On the other hand, a 32V terminal (power supply device 400 (DC32V)) is connected to the clamp voltage input terminal of the driver 753.

The serial data output terminal SDATAO of the driver 751 is connected to the serial data input terminal ADATAIN of the driver 752, and the serial data output terminal SDATAO of the driver 752 is connected to the serial data input terminal SDATAIN of the driver 753.

The serial data signal (SDATA) (for example, 12 bits) is taken into the driver 751 (for example, 4 bits can be taken in) in order from the first bit by using the serial clock signal (SCLK) as a trigger, and the driver 752 (for example, 4 bits can be taken in) and the driver. When the entire serial data signal (SDATA) is sent to 753 (for example, 4-bit can be captured) and captured over the driver 751, the driver 752, and the driver 753, the latch signal (LATCH) (HIGH) is the driver 751 and the driver. It is input to 752 and driver 753 at the same time. As a result, the voltage (High or Low) for driving the motor S1 is output from the first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 of the driver 751, and the first of the driver 752. The voltage (High or Low) for driving the motor S2 is output from the output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4, and the solenoid S is driven from the first output terminal OUT1 of the driver 753. The voltage (High or Low) to be output is output.

Therefore, in the present embodiment, a plurality of driven units (motors M1, M2, solenoid S) having different drive modes can be simultaneously driven and controlled by one serial data signal (SDATA), so that the effect control device 300 can perform a plurality of (motors M1, M2, solenoid S). It is possible to easily control the drive of a plurality of types of accessories.

Here, the drivers 751 and 752 are attached to the motors M1 and M2 (not shown), respectively. Regarding the four coils (not shown) that drive the motor M1, one end of each coil (not shown) is connected to the 15V terminal, and the other end is the first output terminal OUT1, the second output terminal OUT2, and the third of the driver 751. The output terminals OUT3 and the fourth output terminal OUT4 are connected to different output terminals. Similarly, for the four coils (not shown) that drive the motor M2, one end of each coil (not shown) is connected to the 15V terminal, and the other ends are the first output terminal OUT1 and the second output terminal OUT2 of the driver 752. , The third output terminal OUT3 and the fourth output terminal OUT4 are connected to different output terminals.

Therefore, in the drivers 751 and 752, each coil is driven when the outputs of the first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT4 are 0V (Low), and each is 15V. At (High), the drive of each coil is stopped.

Similarly, the driver 753 is attached to the solenoid S (not shown), but one end of the solenoid S is connected to the 32V terminal and the other end is connected to the first output terminal OUT1 (may be another output terminal). ing. Therefore, the solenoid S is driven when the output of the first output terminal OUT1 is 0V (Low), and the driving of the solenoid S is stopped when the output of the first output terminal OUT1 is 32V (High).

In this embodiment, the drive voltage (V2 = 12V) of the drivers 751, 752, 753 input to the drive voltage input terminal VM is larger than the clamp voltage (V3 = 15V, 32V) input to the clamp voltage input terminal VCLAMP. It is set to a low voltage.

This reduces the burden on the power supply source (DC15V power supply that outputs DC15V of the power supply device 400 and DC32V power supply that outputs DC32V) of the clamp voltage that supplies power to the motors M1 and M2 and has high power consumption. , Drivers 751, 752, 753 and driven objects (motors M1, M2, solenoid S) can be operated stably. Further, by lowering the drive voltage (V2) of the drivers 751, 752, 753 to be lower than the clamp voltage (V3), heat is generated from the ICs (integrated circuits including shift registers, latch circuits, etc.) constituting the drivers 751, 752, 753. Can be reduced. When the burden on the power supply source is small, the power supply source of the drive voltage of the driver 751, 752, 753 may be the same as the power supply source of the clamp voltage (15V, 32V).

Further, in the present embodiment, the drive voltage (V2 = 12V) of the drivers 751, 752, 753 is made higher than the voltage (V1 = 5V) of the signal lines 754A-754D for transmitting signals such as the serial data signal SDATA. .. As a result, the power supply source for communication and the power supply source for driving are separated, so that data transmission and the operation of the drivers 751, 752, 753 can be stabilized. From the above, by satisfying the relationship of V3 (clamp voltage) ≥ V2 (drive voltage)> V1 (data output voltage), the power distribution becomes appropriate, data transmission, driver 751, 752, 753 drive, driver 751 , 752,75 can stabilize the drive of the driven object (motors M1, M2, solenoid S).

Although the serial data output terminal SDATAO of the driver 753 is not used, it may be connected to the serial data input terminal SDATAIN of a driver other than the driver 751, 752, 753. In this case, the serial data signal (may be a mode in which a plurality of drivers are connected in series with respect to the signal line for transmitting the serial data signal (SDATA)) is the same as the driver 751, 752, 753. The SDATA), serial clock signal (SCLK), latch signal (LATCH), and enable signal (ENBL) are input, and the number of bits of the serial data signal (SDATA) is appropriately designed according to the number of drivers.

[Operation when a power failure occurs]
FIG. 73 is a time chart showing the falling edges of the DC32V power supply, the DC15V power supply, the DC12V power supply, and the DC5V power supply. The power supply device 400 includes a DC32V power supply that generates a DC voltage of DC32V, a DC15V power supply that generates a DC voltage of DC15V, a DC12V power supply that generates a DC voltage of DC12V, and a DC5V power supply that generates a DC voltage of DC5V. Be prepared. The DC32V power supply is, for example, a switching regulator that converts a 24V AC power supply into a 32V DC voltage. Is maintained, and then the output voltage is configured to decrease monotonically.

The DC15V power supply, the DC12V power supply, and the DC5V power supply are DC-DC converters that convert the DC voltage (32V) output from the DC32V power supply into a predetermined DC voltage (15V, 12V, 5V), respectively. In the power supply device 400, the control signal generation unit 430 (which may be another component in the power supply device) can set the monitoring voltage in the range of 17.2V-20V, for example, and the voltage of the DC32V power supply becomes equal to or lower than the monitoring voltage. When it goes down, the occurrence of a power failure is detected and the power failure monitoring signal is changed.

As shown in FIG. 73, even if the 24V AC power supply shuts down at time t0, the voltage of the DC32V power supply maintains the output of 32V with the instantaneous power guarantee period as a guide, but in the latter half of the instantaneous power guarantee period. The voltage begins to drop.

The control signal generation unit 430 supplies the voltage from the DC15V power supply by stopping the supply of the voltage from the DC32V power supply to the DC15V power supply (third power supply) when the output voltage of the DC32V power supply drops to 21V or less at time t1. When the voltage of the DC32V power supply drops to 16V or less at time t2, the voltage supply from the DC12V power supply is also finished by stopping the voltage supply from the DC32V power supply to the DC12V power supply (second power supply). When the voltage of the DC32V power supply drops to 10V or less at t3, the supply of the voltage from the DC5V power supply is also terminated by stopping the supply of the voltage from the DC32V power supply to the DC5V power supply (first power supply).

Therefore, when a power failure occurs, the driving of the motors M1 and M2 and the solenoid S driven by the DC15V power supply is stopped first (FIG. 72), then the driving of the drivers 751, 752, 753 driven by the DC12V power supply is stopped, and finally. The transmission (that is, the operation of the VDP 312) of the data (driven by the DC5V power supply) input to the drivers 751, 752, 753 is stopped (FIG. 71).

As a result, the driving of the motors M1, M2 and the solenoid S is stopped before the driving of the drivers 751, 752, 753 is stopped, so that these malfunctions can be avoided. Further, since the data transmission is stopped after the driving of the drivers 751, 752, 753 is stopped, the malfunction of the drivers 751, 752, 753 can be avoided. Further, since the data transmission, that is, the operation of the VDP 312 is the last, the processing time in the VDP 311 can be secured and the occurrence of an error in the VDP 312 can be suppressed.

[Arrangement of electronic components]
FIG. 74 is a circuit diagram showing a connection mode between the VDP 312 and the volume control switch 335 in the effect control device 300. In the effect control device 300, the volume control switch 335 connected to the VDP 312 (general-purpose port 942) is provided with a volume control rotor (not shown), and the volume can be set stepwise by rotating the rotor (not shown). .. The volume control switch 335 can convert, for example, a 4-bit (volume can be set in 16 or 10 steps) volume signal and output it to the VDP 312. The volume control switch 335 includes a ground terminal GND and output terminals Y0-Y3. The output terminal Y0 outputs the least significant bit of the volume signal, the output terminal Y1 outputs a bit one step higher than the lowest bit of the volume signal, and the output terminal Y2 outputs a bit two steps higher than the lowest significant bit of the volume signal. Bit is output, and the output terminal Y3 outputs the most significant bit of the volume signal.

The output terminals Y0-Y3 of the volume control switch 335 are connected to the general-purpose port 942 (P0-P3) of the VDP 312 by signal lines 763A-763D, respectively. A pull-up resistor 764A-764D, a resistor 765A-765D, and a capacitor 766A-766D are connected to the signal line 763A-763D.

One end of the pull-up resistor 764A-764D is connected to the 3.3V terminal from the voltage generator 800, and the other end is connected to the signal line 763A-763D. The pull-up resistor 764A-764D raises the voltage of the signal line 763A-763D to 3.3V when each bit of the volume signal is High. Each output terminal (each bit) of the volume control switch 335 and the corresponding general-purpose port 942 (one of P0-P3) are 0V (Low) when electrically connected to the ground terminal GND by the rotation of the rotor. When it is not electrically connected to the ground terminal GND, it becomes 3.3V (Low).

The resistors 765A-765D are interposed in the signal lines 763A-763D at a position downstream of the connection position of the signal lines 763A-763D with the pull-up resistors 764A-764D in the transmission direction of the volume signal. One end of the capacitor 766A-766D is connected to the signal line 763A-763D at a position downstream of the resistor 765A-765D in the transmission direction of the volume signal, and the other end is grounded. The resistors 765A-765D and the capacitors 766A-766D function as low-pass filters for the general purpose port 942 side.

The pull-up resistors 764A-764D, resistors 765A-765D, and capacitors 766A-766D are arranged on the substrate constituting the effect control device 300, but they are aligned along the direction of the current (or the direction in which the voltage is applied). It is preferable to mount it.

Since these electronic components (resistors, capacitors) do not have polarity, the circuit characteristics are basically not affected even if the mounting direction is reversed. However, in the effect control device 300, the signal pattern (wiring pattern) is complicated, and if the mounting method of the electronic component is also arbitrary, the electronic component and the signal line can be checked while predicting the electronic component to be checked. It becomes difficult to do.

However, it is mounted in the middle of the signal line by mounting the electronic components (pull-up resistor 764A, resistor 765A, capacitor 766C) mounted on one signal line (for example, signal line 763A) according to the direction of the current. It becomes easier to predict the check target from the orientation of the electronic component to be checked, and the efficiency of the check work can be improved. For example, when electronic components are sequentially checked in the direction of current along one signal line (for example, signal line 763A), the efficiency of the checking operation can be improved.

Further, in a plurality of signal lines (signal lines 763A-763D), electronic components (for example, pull-up resistors 764A-764D) corresponding to each other are mounted so as to be aligned with each other in the direction of the current so as to correspond to each other. It is possible to easily identify the electronic component to be used.

Electronic components (resistors, capacitors) have two connection pins, but the upper surface of the electronic component has a code for convenience in addition to product information such as the model number. For example, one pin (one pin of the main body of the electronic component) ( "1" (or white circle "○" or black circle "●") is attached to the part adjacent to the root of pin 1), and "2" is attached to the part adjacent to the root of the other pin (pin 2) of the main body. Attached (or unmarked). Therefore, for example, by mounting the electronic component so that the current flows from pin 1 to pin 2 (pin 1 is on the high voltage side), it is possible to easily predict the check target. In FIG. 74, “•” is attached to the pin 1 side of each electronic component.

FIG. 75 is a circuit diagram showing a connection mode between the VDP in the effect control device and the motor sensor and the like. In the VDP 312, the detection signal PUSHSW from the effect button switch 25a (push switch) incorporated in the effect button 25 and a plurality of motors (not shown, for example, eight) controlled by the decoration control device 750 or the like are respectively set in the initial positions (not shown). The detection signals MSW1-MSW8 from the frame motor sensors 47b (for example, eight) that detect whether or not they are in the initial rotation position) are input.

The effect button switch 25a (push switch) outputs a high (5V) detection signal PUSHSW when the effect button 25 (FIG. 1) is not pressed, and is grounded when the effect button 25 is pressed. 0V) detection signal PUSHSW is transmitted.

The frame motor sensor 47b outputs a High (5V) detection signal when the motor is in the initial position, and outputs a Low (0V) detection signal when the motor is not in the initial position.

The effect button switch 25a is connected to the signal line 767A (the detection signal PUSHSW is transmitted), and the signal line 767A is connected to the level conversion circuit 771. Here, the level conversion circuit 771 corresponds to the level conversion circuit 929 of FIG. 71. A pull-up resistor 768A, a resistor 769A, and a capacitor 770A are connected to the signal line 767A.

The frame motor sensor 47b is connected to the signal line 767B-767I (transmits the detection signal MSW1-MSW8), and the signal line 767B-767I is connected to the level conversion circuit 771. A pull-up resistor 768B-768I, a resistor 769B-769I, and a capacitor 770B-770I are connected to the signal line 767B-767I.

One end of the pull-up resistor 768A-768I is connected to a 5V terminal (power supply unit 400 (DC5V)), and the other end is connected to a signal line 767A-767I. The pull-up resistor 768A-768I raises the voltage of the signal line 767A-767I to 5V when the output of the frame motor sensor 47b is High.

The resistors 769A-769I are interposed in the signal lines 767A-767I at a position downstream of the connection position of the signal lines 767A-767I with the pull-up resistors 768A-768I in the detection signal transmission direction. One end of the capacitor 770A-770I is connected to the signal line 767A-767I at a position downstream of the resistor 769A-769I in the transmission direction of the detection signal, and the other end is grounded. The resistors 769A-769I and the capacitors 770A-770I function as low-pass filters for the level conversion circuit 771 side.

The level conversion circuit 771 converts the detection signal transmitted by the signal line 767A-767I (5V) into the detection signal transmitted by the signal line 773A-773I (3.3V), and converts the detection signal transmitted by the signal line 773A-773I (3.3V) into the general-purpose port 942 (port P4) of the VDP 312. -Send to P12).

The level conversion circuit 771 includes an input terminal A, an input terminal D1-D8, an output terminal P, an output terminal Y1-Y8, a drive voltage input terminal VCS, and a ground terminal GND.

The input terminal A is a terminal connected to the signal line 767A and to which the detection signal PUSHSW is input. The input terminals D1-D8 are terminals connected to the signal lines 767B-767I and to which the detection signals MSW1-MSW8 are input.

The signal line 773A connects the output terminal P and the port P4. The signal lines 773B-773I connect the output terminals Y1-Y8 and the ports P5-P12. The output terminal P transmits the detection signal PUSHSW converted to 3.3 V to the port P4. The output terminals Y1-Y8 transmit the detection signal MSW1-MSW8 converted to 3.3V to the ports P5-P12.

The drive voltage input terminal VCS of the level conversion circuit 771 is connected to a 3.3V terminal (voltage generation unit 800 (3.3V), FIG. 71), and is also connected to a capacitor 772 whose one end is grounded.

Similar to the case shown in FIG. 74, in FIG. 75, the electronic components (pull-up resistor 768A, resistor 769A) to be mounted on one signal line (for example, signal line 767A) are mounted according to the direction of the current. This makes it easier to predict the check target from the orientation of the electronic component mounted in the middle of the signal line, and the efficiency of the check work can be improved.

Further, in a plurality of signal lines (signal lines 767A-763I), electronic components (for example, pull-up resistors 768A-768I) corresponding to each other are mounted so as to be aligned with each other in the direction of the current so that they correspond to each other. Electronic components can be easily identified.

Similar to the case shown in FIG. 74, in FIG. 75, “•” is attached to the pin 1 side of each electronic component. Also in FIG. 75, by mounting electronic components (resistors, capacitors) so that the current flows from pin 1 to pin 2 (pin 1 is on the high voltage side), it is possible to easily predict the check target. Can be done.

However, in the capacitors 770A-770I, one pin is mounted so as to be on the ground side. For example, if the appearances of the resistors 769A-769I and the capacitors 770A-770I are confusing, it is possible to distinguish them by reversing their orientations.

[LVDS transmission circuit]
FIG. 76 is a circuit diagram showing a connection mode between the VDP in the effect control device 300 and the display device 41. As shown in FIG. 71, the VDP 312 (signal conversion circuit 313) is connected to an LVDS transmission circuit that converts frame buffer data (image data) into a differential signal related to the LVDS method and outputs it to the display device 41 (effect device). Has been done. The differential signal is transmitted to the display device 41 via the protection circuit 933 and the LVDS board 918.

As shown in FIG. 76 (protection circuit 933 and LVDS board 918 are omitted), the VDP 312 (signal conversion circuit 313) and the display device 41 (connector connected to the display device 41) are connected by signal lines 774A-774F. ..

The signal line 774A connects the output terminal TA-of the VDP 312 and the input terminal RxIN0-of the display device 41. The signal line 774B connects the output terminal TA + of the VDP 312 and the input terminal RxIN0 + of the display device 41.

The signal line 774C connects the output terminal TB− of the VDP 312 and the input terminal RxIN1- of the display device 41. The signal line 774D connects the output terminal TB + of the VDP 312 and the input terminal RxIN1 + of the display device 41.

The signal line 774E connects the output terminal TC− of the VDP 312 and the input terminal RxIN2- of the display device 41. The signal line 774F connects the output terminal TC + of the VDP 312 and the input terminal RxIN2 + of the display device 41.

The signal line 774G connects the output terminal TCLK- of the VDP 312 and the input terminal CKIN- of the display device 41. The signal line 774H connects the output terminal TCLK + of the VDP 312 and the input terminal CKIN + of the display device 41.

The signal line 774I connects the output terminal TD− of the VDP 312 and the input terminal RxIN3- of the display device 41. The signal line 774J connects the output terminal TD + of the VDP 312 and the input terminal RxIN3 + of the display device 41.

The output terminal TA− and the output terminal TA + output differential signals having opposite phases to each other, and the differential signals are input to the input terminal RxIN0− and the input terminal RxIN0 +. The output terminal TB− and the output terminal TB + output differential signals having opposite phases to each other, and the differential signals are input to the input terminal RxIN1- and the input terminal RxIN1 +. The output terminal TC− and the output terminal TC + output differential signals having opposite phases to each other, and the differential signals are input to the input terminal RxIN2- and the input terminal RxIN2 +.

The output terminal TCLK- and the output terminal TCLK + output differential signals having opposite phases to each other, and the differential signals are input to the input terminal CKIN- and the input terminal CKIN +. The output terminal TD− and the output terminal TD + output differential signals having opposite phases to each other, and the differential signals are input to the input terminal RxIN3- and the input terminal RxIN3 +.

The output terminal TA- (output terminal TA +), output terminal TB- (output terminal TB +), output terminal TC- (output terminal TC +), and output terminal TD- (output terminal TD +) are the image data to be displayed on the display device 41. A serial data signal (image data) enumerating data indicating the gradation of colors (red, green, blue) for each pixel is transmitted to the display device 41. Further, the output terminal TCLK- (output terminal TCLK +) transmits a serial clock signal when the display device 41 captures the serial data.

A filter 775A is interposed in the signal line 774A and the signal line 774B, a filter 775B is interposed in the signal line 774C and the signal line 774D, and a filter 775C is interposed in the signal line 774E and the signal line 774F. A filter 775D is interposed in the signal line 774G and the signal line 774H, and a filter 775E is interposed in the signal line 774I and the signal line 774J. The filters 775A-775E are arranged on the LVDS substrate 918, for example, but may be incorporated in the display device 41.

The filters 775A-775E, for example, to which a common cord choke coil is applied, do not act as an inductor for differential signals (differential mode) that are opposite to each other, but for noise signals (common mode) that are mixed in the same phase. Can act as inductors and cancel noise signals from each other. Therefore, the noise signal mixed in at a position in front of the filter 775A-775E of the signal line 774A-774J is removed by the filter 775A-775E.

In the display device 41, the difference of the serial data signal input from the input terminal RxIN0- and the input terminal RxIN0 +, the difference of the serial data signal input from the input terminal RxIN1- and the input terminal RxIN1 +, from the input terminal RxIN2- and the input terminal RxIN2 +. By taking the difference between the input serial data signals and the difference between the serial data signals input from the input terminal RxIN3- and the input terminal RxIN3 +, each serial data signal is amplified and noise mixed in during transmission is removed. .. Similarly, the display device 41 amplifies the serial clock signal and removes noise mixed in during transmission by taking the difference between the serial clock signals input from the input terminal CKIN3- and the input terminal CKIN3 +.

All of the above signals are rated at 0V at Low and 3.3V at High. However, when the signal (Low) becomes lower than 0V or the signal (High) becomes higher than 3.3V in one of the differential signals, the signal (voltage) of one of the differential signals occurs. There will be a difference between the amplitude of the signal and the amplitude of the other signal (voltage). In this case, since there is a difference between the rising edge and the falling edge of the signal on one side and the other side of the differential signal, the filters 775A-775E act as an inductor on the differential signal, and the differential signal becomes unstable. In this case, the noise cannot be completely removed even if the difference is taken on the display device 41 side for the differential signal, and the image data obtained by the difference may become unstable.

Therefore, in the present embodiment, as shown in FIG. 76, clamp diode circuits 776A, 776B, 776C (voltage defining means) for defining the upper limit and the lower limit of the voltage for the signal lines 774A-774J are provided. The clamp diode circuits 776A, 776B, 776C are arranged on, for example, the LVDS substrate 918. In the clamp diode circuits 776A, 776B, and 776C, four Zener diodes ZD having a Zener voltage of 3.3 V and four series circuits in which two diodes D1 and D2 are connected in series in the same direction are connected in parallel. Is.

The Zener diode ZD has a cathode side connected to a 3.3V terminal (voltage generation unit 800 (DC 3.3V), FIG. 71), and the anode side is grounded. The anode side of the diode D1 is connected to the cathode side of the diode D2, and the cathode side is connected to the 3.3V terminal (voltage generation unit 800 (DC 3.3V)). The cathode side of the diode D2 is connected to the anode side of the diode D1, and the anode side is grounded.

The connection midpoint M1 between the diode D1 and the diode D2 in the clamp diode circuit 776A is connected to the signal line 774A, the connection midpoint M2 is connected to the signal line 774B, and the connection midpoint M3 is connected to the signal line 774C. The midpoint M4 is connected to the signal line 774D.

The connection midpoint M5 between the diode D1 and the diode D2 in the clamp diode circuit 776B is connected to the signal line 774E, the connection midpoint M6 is connected to the signal line 774F, and the connection midpoint M7 is connected to the signal line 774G. The midpoint M8 is connected to the signal line 774H.

The connection midpoint M9 between the diode D1 and the diode D2 in the clamp diode circuit 776C is connected to the signal line 774I, and the connection midpoint M10 is connected to the signal line 774J. On the other hand, the connection midpoint M11 and the connection midpoint M12 are grounded.

In the initial state of the clamp diode circuit 776A-776C, the potential difference between the cathode side and the anode side of the Zener diode ZD is maintained at 3.3V, and even if the voltage of the 3.3V terminal exceeds 3.3V, the potential difference is 3. It is maintained at 3V. Further, it is connected in parallel to the Zener diode ZD, and the potential difference between both ends of the series circuit related to the diode D1 and the diode D2 is also fixed at 3.3V.

In this state, when the noise signal (current) flows into the connection midpoint M1-M10 and the voltage of the connection midpoint M1-M10 becomes higher than 3.3V, the potential difference between the anode and the cathode of the diode D1 becomes large. When the threshold voltage Vf1 (small value) of the diode D1 is reached, the diode D1 is turned on, so that further voltage rise at the connection midpoint M1-M10 is suppressed, and as a result, the voltage rise due to the noise signal is suppressed. ..

Similarly, when a noise signal (current) flows into the connection midpoint M1-M10 and the voltage at the connection midpoint M1-M10 becomes lower than 0V, the potential difference between the anode and cathode of the diode D1 is that of the diode D2. When the threshold voltage Vf2 (small value) is reached, the diode D2 is turned on, so that further voltage drop at the connection midpoint M1-M10 is suppressed, and as a result, the voltage drop due to the noise signal is suppressed.

As described above, since the upper limit (about 3.3V) and the lower limit (about 0V) of the voltage of the differential signal are defined by the clamp diode circuit 776A-776C, one of the differential signals and the other of the differential signals are mutually exclusive. A state of opposite phase and having the same voltage amplitude is maintained, and the data (image data) obtained by the difference of the differential signal can be stabilized.

As shown in FIG. 71, I2C bus communication is used in which data communication is performed between the VDP 312 and the board surface relay board 915 and the frame relay board 9916. Then, in the case of transmitting serial data and serial clock by differential signals in I2C bus communication, the clamp diode circuit 776A (776B, 776C: voltage regulating means) of the present embodiment can be applied. That is, the clamp diode circuit 776A of the present embodiment can be applied to a pair of signal lines that transmit a differential signal related to serial data and a pair of signal lines that transmit a differential signal related to a serial clock.

[Main processing and effect device error monitoring processing]
FIG. 77 is a flowchart showing the main processing of the effect control device 300. FIG. 78 is a flowchart showing a procedure of the effect device error monitoring process executed by the effect control device 300. The main process of the effect control device 300 of the present embodiment is basically the same as the main process shown in FIG. 23, but the effect device error monitoring process (B0024) is added after the movable body control process (B0023).

As shown in FIG. 78, the effect control device 300 acquires the effect device information from the decoration control device 750 (B11001). Here, the effect device information includes, for example, the detection signal MSW1-MSW8 (FIG. 75) from the motor sensor, the connection state of the cable (connector) connecting the decoration control device 750 and the motors M1 and M2 (FIG. 72), and the connection state of the cable (connector). , Information indicating the connection state of the cable (connector) connecting the decorative control device 750 and the solenoid S (FIG. 72) is included.

The effect control device 300 analyzes the effect device information and determines whether or not this is appropriate (B11002). Here, whether or not the effect device information is appropriate is, for example, whether or not the accessories operating by each motor (8 pieces) are at predetermined positions (initial positions) based on the detection signals MSW1-MSW8 (FIG. 75). Whether or not the connection state of the cable is good or not is included.

If the effect device information is appropriate (the result of B11001 is "Y"), the effect control device 300 ends the effect device error monitoring process. On the other hand, if the effect device information is not appropriate (the result of B11011 is "N"), the error setting process (B11003) is performed. In the error setting process, it is set so that an error notification sound is generated and / or error information (for example, displayed by an error code) is displayed on the display device 41.

[Timer interrupt processing]
FIG. 79 is a flowchart showing the procedure of the movable body control timer interrupt processing executed by the effect control device 300 (specifically, the CPU 311 of the VDP 312). Here, the board effect device 44 (FIG. 4) is applied as the decoration control device 750, and the effect stepping motor in the board effect device 44 (electric accessory, movable accessory) is applied as the motors M1 and M2. The control of the stepping motor for production will be described. The effect stepping motor moves the side effect unit 40d as a board effect device 44 (electric accessory, movable accessory), for example.

The movable body control timer interrupt process (FIG. 79) is executed for each control basic cycle (interrupt cycle) as one of the timer interrupt processes for the main process (FIG. 77) of the effect control device 300. In this embodiment, the basic control period (interrupt period) is 1 ms (msec: millisecond).

First, the effect control device 300 has a motor A control process (B20001) and a motor B control process (B20002) based on control data related to the effect stepping motors (here, motor A (M1) and motor B (M2)). ) Is executed. The motor A control process and the motor B control process are similar processes. The movable body control process (B0023 in FIG. 77) is an operation mode of the movable accessory (board effect device 44, movable body) based on the effect set by the variable effect setting process (B1905 in FIG. 31) or the like. , Set the control data related to the stepping motor for production that can operate the movable accessory. Further, when the number of stepping motors for effect to be controlled is more than two, the same motor control process as the motor A control process and the motor B control process may be added.

Next, the effect control device 300 synthesizes the output data of the motor A and the output data of the motor B (B20003), and outputs the combined data to the corresponding port (B20004). As a result, the combined data is sent to the board motor driver 44a that drives and controls the motor A (M1) and the motor B (M2). Here, "composite" means, for example, a process in which the output data of the motor A is put in the upper few bits of the data of a plurality of bits and the output data of the motor B is put in the lower few bits. As described above, the movable body control timer interrupt processing is completed.

Next, the details of the motor A control process (B20001) in the movable body control timer interrupt process (FIG. 79) will be described with reference to FIG. 80. FIG. 80 is a flowchart showing a procedure of the motor A control process executed by the effect control device 300. In the motor A control process, the output data of the motor A is acquired (set). The motor B control process for acquiring (setting) the output data of the motor B is also executed in the same manner as the motor A control process.

The effect control device 300 first loads the motor control code (B21001). The motor control code is set as control data related to the effect stepping motor in the movable body control process (B0023 in FIG. 77). The motor control code is information indicating how to control the motor, and there are codes indicating "stop", "CW", "CCW" and the like. In addition, "CW" means the rotation of the motor in the clockwise direction, and "CCW" means the rotation of the motor in the counterclockwise direction.

Next, the effect control device 300 first determines whether or not the motor control code is a stop code instructing "stop" of the motor (B21002). When the motor control code is a stop code (the result of B21002 is "Y"), the off output data is set as the output data to the motor (B21003). Then, 0 is set as the initial value of the counter value (count value, count value) updated (added) for each movable body control timer interrupt process, and the integer part of the counter value in the previous movable body control timer interrupt process is set. 0 is set as an initial value in the variable N (previous time) indicating (B21004). After that, the output data (here, off output data) is saved in the motor output data area (B21011), and the motor A control process is terminated. Therefore, the effect stepping motor (here, motor A) is maintained in the stopped state.

On the other hand, when the motor control code is not a stop code (the result of B21002 is "N"), the effect control device 300 sets a constant addition value according to the gaming state (B21005). As the game state, there are a normal game state, a special game state, and a specific game state (a normal electric support state such as a time saving state and a probability change state). Next, the added value is added to the counter value and updated (B21006). If the counter value is expressed in binary notation and the addition process is executed by fixed-point arithmetic, the speed becomes high. The process of step B2106 constitutes a counter means (or timer means) that changes and updates the counter value (or timer value).

For example, in a specific gaming state in which it is preferable to increase the operating speed of the movable accessory (speed of the stepping motor for production) in the time reduction fluctuation, the addition value is set to 0.666, and other time reduction fluctuations can be made. The addition value may be set to 0.5 in the normal gaming state or the special gaming state. As will be described later, when the value added to the counter value becomes large, the speed of the stepping motor for production (the speed of updating the output data for motor control) increases, and the operating speed of the movable accessory (movable body) also increases. become. Further, since the added value is less than 1, the control cycle of the effect stepping motor becomes larger than the control basic cycle (interrupt cycle = 1 ms) as described later.

Next, the effect control device 300 truncates the fractional part of the counter value by the so-called floor function (= floor function), acquires the integer part of the counter value, and stores it in the variable N (this time) (N (this time) ← floor). (Counter value)) (B21007). Note that N (this time) indicates an integer part of the counter value in the current moving body control timer interrupt processing currently being executed. Then, the effect control device 300 determines whether or not the integer part N of the counter value has been changed and updated (B21008). That is, the effect control device 300 determines whether or not the integer part of the counter value has been carried up. Specifically, whether or not the value of N (this time), which is the integer part of the current timer interrupt, is larger than the value of N (previous), which is the integer part of the previous timer interrupt, or is different from N (previous). Judge whether or not.

When the integer part N of the counter value is changed and updated (the result of B21008 is "Y"), the effect control device 300 is output data to the effect stepping motor (here, output data for driving the motor A). ) Is set or updated (B21009). The output data may be updated to the next data by updating the output data pointer indicating the address of the output data in the output data table. In this way, changing and updating the integer part N of the counter value is a predetermined condition for setting or updating the output data.

For example, when the integer part N of the counter value is changed and updated, the reference clock (serial clock SCLK, etc.) of the effect stepping motor may be generated by turning on the output data (counter). Off if the integer part N of the value does not change). Alternatively, the step update (update of the excited phase (excited phase)) may be performed directly by updating the output data.

Then, the effect control device 300 stores the value of N (this time) in the variable N (previous time) (B21010). Next, the acquired output data is saved in the motor output data area (B21011), and the motor A control process is terminated.

As described above, when the integer part N of the counter value changes, the output data for driving the effect stepping motor may be updated or set, and the reference clock of the effect stepping motor may be generated. In another example, when the integer part N of the counter value changes, the phase that is directly excited (excited phase) is updated by updating or setting the output data, and the rotor (rotating shaft) of the stepping motor for effect is stepped by one step. It may be rotated by (that is, a predetermined step angle) (step update). Therefore, the larger the addition value with respect to the counter value, the faster the speed of the stepping motor for production, and by extension, the operating speed of the movable accessory.

[Branch of control flow]
In the main process shown in FIG. 77 and the timer interrupt process shown in FIG. 79, there is a portion where the control flow branches. For example, in the case of the main process, the process branches according to the result of the determination (B0019) whether or not it is the frame switching timing. Further, in the effect device error monitoring process (B0024, FIG. 78) during the main process, the process branches according to the result of the determination (B11002) as to whether or not the effect device information is appropriate as described above. It should be noted that the calling of the subroutine (individual processing such as the effect button input processing and the reception command check processing) can be regarded as a kind of branch processing, but the processing is performed in steps B0010, B0011, B0012, B0014-B0016, and B0022-B0024. Branches.

Further, in the received command check process (B0014) (FIG. 24) during the main process, it is determined whether or not the number of command receptions is 0 (B1102), and whether or not the copying for the number of loaded command receptions is completed (? B1106), the processing branches according to the result of the determination (B1110) whether or not the analysis of the command corresponding to the number of received commands is completed.

Then, in the received command analysis process (B1108, FIG. 25) during the received command check process (B0014, FIG. 24), it is determined whether or not the upper MODE portion of the received command is within the normal range (B1202), and the received command The processing branches according to the results of the determination of whether or not the lower ACTION section is in the normal range (B1203) and the determination of whether or not the ACTION section for the MODE section is the correct combination (B1204).

Further, regarding the MODE section, it is determined whether or not it is in the variable command range (B1205), whether or not it is in the jackpot command range (B1207), and whether or not it is in the single-shot command range (B1211). , Judgment of whether or not it is in the symbol system command range (B1209), judgment of whether or not it is in the look-ahead symbol system command range (B1213), and judgment of whether or not it is in the look-ahead variable system command range (B1215) The processing branches accordingly.

Further, for example, with respect to the MODE section in the one-shot command processing (B1212, FIG. 26) in the received command analysis processing (B1108, FIG. 25), it is determined whether or not to represent the model designation command (B1301), and the RAM initialization command. (B1303), whether or not to represent a power failure recovery command (B1305), whether or not to represent a customer waiting demo command (B1307), and whether or not to represent the decorative special figure 1 hold number command Judgment of whether or not (B1309), Judgment of whether or not to represent the decorative special figure 2 hold number command (B1311), judgment of whether or not to represent the probability information command (B1313), and the error / illegal system / call command are shown. Judgment as to whether or not to represent (B1315), judgment as to whether or not to represent a command for switching the production mode (B1317), judgment as to whether or not to represent an out-ball count command (B1319), a count command (large winning opening count command) ) (B1321), whether it is a setting value information command (B1323), whether it represents a setting change command (B1325), and whether it represents a setting confirmation command. The process branches according to the results of the determination (B1327), the determination of whether or not to represent the symbol stop command (B1329), and the determination of whether or not the command of the MODE section is normal (B1330).

In the motor A control process (B20001, FIG. 79) during the movable body control timer interrupt process (FIG. 78), it is determined whether or not the motor control code is a stop code indicating "stop" of the motor (B21002). The processing branches according to the result of the determination (B21008) as to whether or not the integer part N of the counter value has been changed and updated. It should be noted that the calling of the subroutine (individual processing such as motor A control processing and motor B control processing) can be regarded as a kind of branch processing, but the processing branches in steps B20001 and B20002.

[Pipeline processing and delayed branch processing]
FIG. 81 is a diagram showing a delayed branching process performed by the CPU 311 in the effect control device. FIG. 81A shows a case where the delayed branching process is executed, and FIG. 81B shows a case where the delayed branching process is not executed. show. The built-in host CPU (CPU311) constituting the VDP 312 of the effect control device 300 takes out the instructions or data built in the PROM 321 or the like in the order determined by the program counter (PC) and executes various programs. Further, the instruction executed by the CPU 311 (second CPU) is divided into instruction elements such as instruction capture (IF), instruction interpretation (ID), instruction execution (EX), memory access (MA), and register write (WB). Then, by executing different instruction elements of each instruction at the same time, a series of instructions are executed by pipeline processing which apparently takes a plurality of steps to execute the instruction in another processing method. Further, the CPU 311 performs a delayed branching process based on the delayed branching instruction in response to the branching of the control flow.

In FIG. 81 (a), the instructions associated with N, N + 1, N + 2, and N + 3 are executed in order according to the program counter (PC) of the CPU 311, and then the instructions associated with N + 4 are not executed and M is executed. Indicates the case where the instruction associated with the address is executed. Here, when the CPU 311 fetches an instruction (IF) related to the count value (address) of the program counter, the program counter (PC) adds 1 to the held count value (address) to obtain the count value (address). It is to be updated.

In FIG. 81 (a), the processing proceeds in the following order (1) to (5).
(1) The CPU 311 takes in the instruction (IF) of the normal instruction (N) associated with the N address held in the program counter (PC), and updates the address of the program counter (PC) to the N + 1 address. The normal instruction is an arbitrary instruction that does not include a branch instruction. The address is an address of a memory (PROM321 or the like).

(2) The CPU 311 performs instruction capture (IF) of the normal instruction (N + 1) associated with the N + 1 address held in the program counter (PC) and instruction interpretation (ID) of the normal instruction (N), and the program counter (PC). Update the address of PC) to N + 2.

(3) The CPU 311 receives an instruction capture (IF) of a delayed branch instruction (delayed branch establishment: branch to M address) (N + 2) associated with the N + 2 address held in the program counter (PC) and a normal instruction (N + 1). The instruction interpretation (ID) and the instruction execution (EX) of the normal instruction (N) are performed, and the address of the program counter (PC) is updated to N + 3.

(4) The CPU 311 receives an instruction capture (IF) of a normal instruction (delay slot) (N + 3) associated with the N + 3 address held in the program counter (PC) and a delayed branch instruction (delay branch establishment: branch to the M address). The instruction interpretation (ID) of (N + 2), the instruction execution (EX) of the normal instruction (N + 1), and the memory access (MA) of the normal instruction (N) are performed.

(5) The CPU 311 updates the address of the program counter (PC) to the M address by the instruction execution (EX) of the delayed branch instruction (delayed branch establishment: branch to the M address) (N + 2), and is associated with the M address. The instruction capture (IF) of the normal instruction (branch destination slot) (M) is performed, and the memory access (MA) of the normal instruction (N + 1) and the register write (WB) of the normal instruction (N) are performed.

Therefore, when the delayed branch instruction is established, the originally scheduled normal instruction (N + 4) is not executed, but the normal instruction (delay slot) (N + 3) next to the delayed branch instruction (N + 2) is Will be executed. As a result, it is possible to reduce the disturbance of the pipeline at the time of branching and execute the instruction element quickly.

On the other hand, as shown in FIG. 81B, when the delayed branch instruction is not established, the normal instruction (N + 3) and the normal instruction (N + 4) after the delayed branch instruction (N + 2) are executed in order.

Here, the normal command (branch destination slot) (M) of FIG. 81A is, for example, an error / illegal / call setting process (B1316, FIG. 26) caused by a command from the game control device 100, and an effect control device. The error setting process (B11003, FIG. 78) caused by the error of the control target (decorative control device 750) of 300 can be applied. That is, an error generated outside the CPU 311 can be dealt with by a delayed branching process, and the error notification process can be efficiently executed.

The CPU 111a (first CPU) of the game microcomputer 111 constituting the game control device 100 also performs pipeline processing (and delay branch processing) of a series of commands (commands for transmitting commands to the effect control device 300) in the same manner as described above. Is feasible.

[Exception handling]
FIG. 82 is a diagram showing an error processing procedure related to a CPU error of the CPU 311 in the effect control device. When a CPU error (exception factor), which is an error of the CPU 311 itself, occurs, the CPU 311 interrupts the instruction being executed and executes error processing (exception processing). CPU errors include address errors, bus errors, register bank errors, etc., but here, address errors will be described as an example. An address error corresponds to the case of fetching data associated with an inappropriate address such that the instruction is not originally stored at the time of instruction capture (IF), and when the data is interpreted (ID). Detected.

When an address error occurs, the CPU 311 stops the instruction (N) in which the address error is detected and the instruction (N + 1) before the instruction execution (EX), and temporarily suspends the execution of the instruction by the program counter (PC). Performs error handling, including sequence control.

As shown in FIG. 82, consider a case where an address error is detected in the instruction (N) associated with the N address of the program counter (PC). In this case, an address error is detected by the instruction interpretation (ID) of the instruction (N), and the instruction (N) and the next instruction (N + 1) are canceled. However, the progress of the instruction (N-1), the instruction (N-2), and the instruction (N-3) that are executing the instruction elements after the instruction execution (EX) at the time of detecting the address error is continued.

Here, the CPU 311 is set with an exception handling vector table that includes vector addresses (vector table address offsets) of a plurality of error handling (exception service routines) corresponding to the exception factors.

Therefore, when the register write (WB) of the instruction (N-1) is completed, the CPU 311 detects the address error and then uses sequence control to determine the vector address (start address: M) of the error processing corresponding to the address error. The instruction to be calculated is executed, the instruction to save the information in the status register (information indicating the processing status of various instructions) to the stack of the general-purpose register provided in the CPU 311 is executed, and the information (address) in the program register (PC) is executed. Is executed on the stack. The information (address) of the program register (PC) to be saved is the address (N) related to the instruction in which the address error is detected. As shown in FIG. 82, the series of instructions by the sequence control can be executed by pipeline processing. In the above sequence control, the CPU 311 does not perform instruction capture (IF), and the instruction transmitted from the sequence control side to the CPU 311 can be executed from the instruction interpretation (ID) stage, as shown in FIG. 82. In addition, it may be executed from the instruction capture (IF).

The CPU 311 executes a jump instruction [M] that jumps to the calculated vector address (M), and at the last instruction element (PC (WB)) of the instruction, the program counter (PC) is set to the vector address (address M). To write. When the calculation result is written to the program counter (PC) as a register in the instruction for calculating the vector address, the instruction here may be omitted (the instruction itself for calculating the vector address becomes a jump instruction). ).

The CPU311 has error processing (error processing instruction (M), error processing instruction (M + 1), ..., Error processing instruction (M + k-1), error processing instruction (M + k)) associated with the vector address (address M). Start (k: integer). Since there is no delay slot between the jump instruction [M] and the error processing instruction (M), the jump instruction [M] does not correspond to the delayed branch instruction.

When error processing is executed by a plurality of instructions, it can be executed by pipeline processing. That is, as shown in FIG. 81, by performing the instruction capture (IF) for the instruction (M) associated with the M address, the address of the program counter (PC) is updated to the M + 1 address, and the instruction associated with the M + 1 address. A plurality of instructions are sequentially executed in such a manner that the instruction (IF) of (M + 1) is fetched (IF) and the instruction (ID) of the instruction (M) is decoded (ID), and the instruction (M + k) at the end of error processing is executed. can do.

Here, it is also possible to incorporate an error setting process (the same process as in FIG. 78: error setting process (B11003)) for notifying a CPU error such as an address error in the CPU 311 into the error processing instruction. be. By incorporating the error setting process, it is possible to notify that a CPU error has occurred using the display device 41 or the speaker.

After the last instruction (M + k) of error processing, the instruction (N) in which an address error is detected is executed. Therefore, as shown in FIG. 82, for example, the penultimate instruction (M + k-1) of error processing is returned to the N address where the address of the program counter (PC) is saved in the stack, and a jump (branch) is performed. Delayed branch instruction (program counter return instruction) to be used, the last instruction (M + k) of error processing is returned to the status register, and the status register information (information related to instruction (N), etc.) saved in the stack is returned to the status register. It is also preferable to configure it so that it can be executed as a slot (status register return instruction). As a result, the instruction (N) can be fetched (IF) at the same time as the instruction decoding (ID) of the last instruction (M + k), and the instruction (N) can be taken at the same time as the instruction execution (EX) of the last instruction (M + k). Instruction decoding (ID) and instruction (N + 1) instruction capture (IF) can be performed.

Of course, the error processing can be executed regardless of the pipeline processing, and the execution of the instruction (N) may be started after the error processing (M + k) is completed. In this case, the instruction (M + k-1) may be used as the status register return instruction, and the instruction (M + k) may be used as the program counter return instruction.

[Error display example on display device]
The content of the error / illegal / call setting process (B1316, FIG. 26) caused by the command from the game control device 100, and the error setting process (B11003, B11003,) caused by the error of the control target (decorative control device 750) of the effect control device 300. The contents of FIG. 78) and the contents of the error setting process related to the CPU error can be displayed on the display device 41.

In the error / illegal / call setting process (B1316, FIG. 26), the fraud occurrence command, the fraud release command, the status off command, the status on command, the magnet fraud notification command (magnetic error command), and the panel radio wave fraud notification command (board radio wave error) The command) has been identified. Therefore, each error can be represented by a 1-bit flag, and these can be represented by a binary (or hexadecimal) error code arranged from the upper bit in the above order. For example, if it is normal, it is expressed by "0", if it is abnormal, it is expressed as "1", and if it is identified that there is an abnormality only in the illegal occurrence command, the error code is "A1000000" (first display data). ) Can be displayed. Here, "A" indicates that it is an error code (effect command) transmitted from the game control device 100.

In the error setting process (B11003, FIG. 78), for example, whether or not the accessories operating by the motors (8 pieces) related to the detection signals MSW1-MSW8 (FIG. 75) are at predetermined positions (initial positions) is decorated. It is identified whether or not the connection state of the cables (8 cables) connecting the control device 750 and the motor is good. For example, if the accessory operating by the motor related to MSW1 is not in a predetermined position (initial position) and the cable connecting the motor related to MSW2 and the decoration control device 750 is poorly connected, the bits are arranged in the same manner as described above. Then, it can be displayed as "B10000000" (motor) (second display data) and "C01000000" (cable) (second display data). Here, "B" indicates a motor error code, and "C" indicates a cable error code. Here, in "C", the second cable is determined to be poorly connected, so even if the accessory operated by the motor indicated by the second from the left of "B" is determined to be "0" (normal), it is actually Can be judged to be abnormal.

In the error setting process related to the CPU error, it is also possible to construct an instruction so that the vector address actually used is displayed as it is on the display device 41. For example, in the case of an address error, it can be displayed as "H0000242" (hexadecimal) or its lower two digits "24" (hexadecimal). Therefore, it is possible to grasp the content of the CPU error from the displayed vector address. Any error code can be displayed at an arbitrary position on the display device 41 under the condition that they do not overlap each other.

[Action / effect of the fifth embodiment]
According to the game machine 10 according to the fifth embodiment, the effect device (decoration control device 750) for producing the game and the effect device (decoration control) in response to commands from the game control means (game control device 100). In the game machine 10 including an effect control means (effect control device 300) capable of controlling the device 750), data (serial data) transmitted by the effect control means (effect control device 300) to the effect device (decorative control device 750). Etc.), the output voltage of the effect device (decorative control device 750) is V2, and the clamp voltage of the effect device (decorative control device 750) is V3. It is characterized by.

As a result, the load on the power supply source of the clamp voltage having high power consumption (DC15V power supply that outputs DC15V of the power supply device 400 and DC32V power supply that outputs DC32V) is reduced, so that the effect device (decorative control device 750) and the cover are covered. Driven objects (motors M1, M2, solenoid S) can be operated stably. Further, an integrated circuit including an IC (shift register, latch circuit, etc.) constituting the effect device (decoration control device 750) by lowering the drive voltage (V2) of the effect device (decoration control device 750) to be lower than the clamp voltage (V3). ) Can be reduced. When the burden on the power supply source is small, the power supply source of the drive voltage of the effect device (decorative control device 750) may be the same as the power supply source (15V, 32V) of the clamp voltage.

Further, in the present embodiment, the drive voltage (V2 = 12V) of the effect device (decorative control device 750) is set to the voltage (V1 = 5 V) of the signal line 754A-754D for transmitting a signal such as the serial data signal SDATA, that is, the effect control. The output voltage (V1) of data such as serial data transmitted by the device 300 (effect control means) to the decoration control device 750 (effect device) is higher than the output voltage (V1). As a result, the power supply source for communication and the power supply source for driving are separated, so that data transmission and operation of the effect device (decorative control device 750) can be stabilized. From the above, by satisfying the relationship of V3 (clamp voltage) ≥ V2 (drive voltage)> V1 (data output voltage), the power distribution becomes appropriate, data transmission, drive of the directing device (decorative control device 750), It is possible to stabilize the drive of the driven object (motors M1, M2, solenoid S) related to the effect device (decorative control device 750).

According to the game machine 10 of the fifth embodiment, the effect device (decoration control device 750) for producing the game and the effect device (decoration control device 100) in response to commands from the game control means (game control device 100). A voltage for outputting an effect control means (effect control device 300) capable of controlling 750) and data (serial data or the like) transmitted by the effect control means (effect control device 300) to the effect device (decoration control device 750). The first power supply (DC5V power supply) for supplying the effect device (DC5V power supply), the second power supply (DC12V power supply) for supplying the driving voltage of the effect device (decorative control device 750), and the clamp voltage of the effect device (decorative control device 750) are supplied. In the gaming machine 10 including a third power supply (DC15V power supply), the third power supply (DC15V power supply), the second power supply (DC12C power supply), and the first power supply (DC5V power supply) are in this order when a power failure occurs. It is characterized by stopping the supply of voltage.

With the above configuration, the drive of the driven unit (motors M1, M2 and solenoid S) of the effect device (decoration control device 750) is stopped before the drive of the effect device (decoration control device 750) is stopped, so that these malfunctions occur. Can be avoided. Further, since the data transmission is stopped after the drive of the effect device (decoration control device 750) is stopped, the malfunction of the effect device (decoration control device 750) can be avoided. Further, since the transmission of data, that is, the operation stop of the effect control means (effect control device 300 (VDP312)) is the last, the effect control means secures the processing time in the effect control means (effect control device 300 (VDP312)). It is possible to suppress the occurrence of an error in the effect control device 300 (VDP312). From the above, it is possible to stabilize the operation of the effect control means (effect control device 300) and the effect device (decoration control device 750).

According to the game machine 10 of the fifth embodiment, the production device (decoration control device 750) for producing the game and the production device (decoration control device 100) in response to commands from the game control means (game control device 100). In the game machine 10 including an effect control means (effect control device 300) capable of controlling 750), the effect device (decorative control device 750) drives a first driven unit (motors S1 and S2). A second effect that drives the first effect device (driver 751, driver 752) and the second driven unit (solenoid S) and is connected to the subsequent stage of the first effect device (driver 751, driver 752). The effect control means (effect control device 300) includes the device (driver 753), and the effect control means (effect control device 300) transmits serial data to the effect device (decoration control device 750), and the first effect device (driver 751, driver 752) is used. The second stage of the serial data is taken in to drive the first driven unit (motors M1 and M2), and the first stage of the serial data is transmitted to the second production device (driver 753) to drive the second production device (driver 753). Takes in the previous stage of serial data to drive the second driven unit (solenoid S), and the first driven unit (motors M1 and M2) and the second driven unit (solenoid S) are driven modes. Are different from each other.

With the above configuration, a plurality of driven units (motors M1, M2, solenoid S) having different drive modes can be simultaneously driven and controlled by one serial data signal (SDATA), so that the effect control device 300 can perform a plurality of (different clamps). It is possible to easily control the drive of (plural types of) accessories that drive the voltage.

In the fifth embodiment, the first effect device (drivers 751, 752) and the second effect device (driver 753) are characterized in that the clamp voltages are different from each other. Even if the clamp voltages of the first effect device (drivers 751, 752) and the second effect device (driver 753) are different from each other, they can be stably driven.

In the fifth embodiment, the first driven unit is the motors M1 and M2, and the second driven unit is the solenoid S. As a result, the motors M1 and M2 and the solenoid S can be stably operated in one effect device (decorative control device 750).

In the fifth embodiment, between the clamp voltage supply source (15V terminal (power supply device 400 (DC15V power supply))) of the first effect device (driver 751, 752) and the first effect device (driver 751, 752). A backflow prevention means (Zener diode 762) is arranged in the. This makes it possible to prevent backflow of current from the motors M1 and M2 that use a large current.

According to the game machine 10 of the fifth embodiment, the effect control means (effect control device 300) for controlling the effect device (decorative control device 750) in response to a command from the game control means (game control device 100) is provided. In the game machine 10, the effect control means (effect control device 300) includes a signal line (for example, signal line 763A (FIG. 74) and signal line 767A (FIG. 75)) capable of transmitting a signal, and includes a signal line (for example, a signal). A plurality of electronic components ((pull-up resistor 764A, resistor 765A, capacitor 766A) (FIG. 74), (pull-up resistor 768A, resistor 769A)) (FIG. 75)) is interposed, and a plurality of electronic components ((pull-up resistor 764A, resistor 765A, capacitor 766A) (FIG. 74), (pull-up resistor 768A, resistor 769A) (FIG. 75)) are signal lines (signals). The line 763A (FIG. 74) and the signal line 767A (FIG. 75) are mounted so as to be aligned in the direction along the current.

With the above configuration, electronic components ((pull-up resistor 764A, resistor 765A, capacitor 766C)) (FIG. 74) are mounted on one signal line (for example, signal line 763A (FIG. 74), signal line 767A (FIG. 75)). ), (Pull-up resistor 768A, resistor 769A) (Fig. 75)) by mounting the signal line (for example, signal line 763A (Fig. 74), signal line 767A (Fig. 75)). It becomes easier to predict the check target from the orientation of the electronic components ((pull-up resistor 764A, resistor 765A, capacitor 766C) (Fig. 74), (pull-up resistor 768A, resistor 769A) (Fig. 75)) mounted in the middle of. , The efficiency of checking work of electronic parts and signal lines can be improved.

According to the game machine 10 of the fifth embodiment, the effect control means (effect control device 300) for controlling the effect device (decorative control device 750) in response to a command from the game control means (game control device 100) is provided. In the game machine 10, the effect control means (effect control device 300) includes a plurality of signal lines (signal lines 763A-763D (FIG. 74) and signal lines 767A-767I (FIG. 75)) capable of transmitting signals, and signals. Electronic components (for example, resistors 765A-765D (FIG. 74) and resistors 769A-769I (FIG. 75)) are interposed in the lines (signal lines 763A-763D (FIG. 74) and signal lines 767A-767I (FIG. 75)). Electronic components (eg, resistors 765A-765D (FIG. 74), resistors 769A-769I (FIG. 75)) are signal lines (signal lines 763A-763D (FIG. 74), signal lines 767A-767I (FIG. 75)). It is characterized in that it is mounted so as to be aligned in the direction along the current in.

With the above configuration, electronic components (for example, pull-up resistors 764A-764D (FIG. 74), pull-up resistors 764A-764D (FIG. 74), which correspond to each other in a plurality of signal lines (signal line 763A-763D (FIG. 74), signal line 767A-767I (FIG. 75)), pull. By mounting the up resistors 768A-768I (FIG. 75) in the same direction along the direction of the current, the electronic components corresponding to each other (for example, the pull-up resistors 764A-764D (FIG. 74), pull-ups). The resistors 768A-768I (FIG. 75) can be easily identified.

In the fifth embodiment, the effect control means (effect control device 300) includes an arithmetic circuit (VDP312) that outputs a signal for controlling the effect device, and a signal line (signal line 763A-763D (FIG. 74), signal line 767A-. It is provided with an input circuit (volume control switch 335 (FIG. 74), motor sensor or push switch (FIG. 75)) for inputting a signal toward the arithmetic circuit (VDP312) via 767I (FIG. 75)). It is a feature.

With the above configuration, the efficiency of checking the electronic components interposed between the arithmetic circuit (VDP312) and the input circuit (volume control switch 335 (FIG. 74), motor sensor or push switch (FIG. 75)) is improved. be able to.

In a fifth embodiment, the electronic component is a resistor or a capacitor. As a result, it is possible to improve the efficiency of checking work of electronic components having no polarity.

In the fifth embodiment, the electronic component (resistor or capacitor) is a component of the same type having a predetermined terminal (1 pin), and the predetermined terminal (1 pin) is aligned on the high voltage side or the low voltage side and mounted. It is characterized by being done. As a result, it is possible to improve the efficiency of checking work of electronic components without using a new configuration.

According to the game machine 10 of the fifth embodiment, the effect control means (effect control device 300) that outputs a differential signal corresponding to a command from the game control means (game control device 100) to the effect device (display device 41). A pair of signal lines (signal line 774A and signal line 774B, signal line 774C and signal line 774D, signal line 774E and signal line 774F, signal line 774G and signal line 774H, The signal line 774I and the signal line 774J) are provided with voltage regulating means (clamp diode circuit 776A-776C) for defining the upper limit and the lower limit of the voltage of the differential signal.

With the above configuration, the voltage regulating means (for example, the clamp diode circuit 776A-776C) defines the upper limit (3.3V) and the lower limit (0V) of the voltage of the differential signal, so that one of the differential signals and the differential signal The other of the two is in opposite phase to each other and the state of having the same voltage amplitude is maintained, and the data (image data) obtained by the difference of the differential signals can be stabilized.

According to the game machine 10 of the fifth embodiment, the effect device (decoration control device 750) for producing the game and the effect device (decoration control device 100) in response to commands from the game control means (game control device 100). In the game machine 10 including an effect control means (effect control device 300) capable of controlling 750), the effect control means (effect control device 300) performs pipeline processing capable of including a delay branch process by a delay branch command. The CPU 311 includes a CPU 311 to execute, and when a CPU error that is an error of the CPU 311 itself occurs, the CPU 311 deals with the CPU error in the processing of the branch destination by exception processing including branch processing that does not depend on the delayed branch instruction, and the CPU error. When a game machine error, which is an error of the game machine 10 other than the above, occurs, the game machine error can be notified by the processing of the branch destination by the delayed branch processing.

As a result, the delayed branch instruction can reduce the disturbance of the pipeline at the time of branching and efficiently execute the error notification process. Further, when a CPU error (exception processing) caused by the CPU 311 itself occurs, the CPU error can be dealt with at an early stage by giving priority to the exception processing over the pipeline processing.

In the fifth embodiment, when a CPU error occurs during execution of a series of instructions in pipeline processing, the CPU 311 is after the end of the executing instruction (for example, instruction (N-1)) in the series of instructions. Exception processing is executed, and after the exception processing is completed, the instruction (for example, instruction (N)) following the last instruction (for example, instruction (N-1)) of the series of instructions is executed. do. As a result, a series of instructions can be reliably executed.

In the fifth embodiment, the gaming machine error is an error generated in the effect device (decorative control device 750). As a result, it is not necessary for the game control device 100 to detect an error that has occurred in the effect device (decorative control device 750), so that it is possible to avoid an increase in the burden on the game control device 100.

According to the game machine 10 of the fifth embodiment, the effect device (decoration control device 750) for producing the game and the effect device (decoration control device 100) in response to commands from the game control means (game control device 100). In the game machine 10 including an effect control means (effect control device 300) capable of controlling 750), the effect control means (effect control device 300) is a timer interrupt process (movable body control timer interrupt process (FIG. 79)). The CPU 311 includes a CPU 311 that executes a pipeline process that can include a delayed branch process by a delayed branch instruction, and the CPU 311 is an exception including a branch process that does not depend on the delayed branch instruction when a CPU error that is an error of the CPU 311 itself occurs. By processing, the CPU error is dealt with in the processing of the branch destination, and when a game machine error that is an error of the game machine 10 other than the CPU error occurs, the game machine error is detected in the processing of the branch destination by the delayed branch processing. It is characterized in that it can be notified.

As a result, the delayed branch instruction can reduce the disturbance of the pipeline at the time of branching and efficiently execute the error notification process. When a CPU error (exception processing) caused by the CPU 311 itself occurs, the exception processing is prioritized over the pipeline processing to deal with the CPU error at an early stage and timer interrupt processing (movable body control timer). Interrupt processing (FIG. 79)) can be resumed.

In the fifth embodiment, the CPU 311 executes the control of the effect device (decorative control device 750) at the branch destination process by the delayed branch process in the timer interrupt process (movable body control timer interrupt process (FIG. 79)). It is characterized by. As a result, the delay branch instruction can reduce the disturbance of the pipeline at the time of branching and efficiently control the effect device (decorative control device 750).

According to the game machine of the fifth embodiment, the effect device (decoration control device 750) for producing the game and the effect device (decoration control device 750) corresponding to the command from the game control means (game control device 100). In the game machine 10 including the effect control means (effect control device 300) capable of controlling), the game control means (game control device 100) monitors the game machine error generated in the game machine 10 and controls the effect. A pipeline that includes a first CPU (CPU111a) that commands means (effect control device 300) to notify the gaming machine error, and the effect control means (effect control device 300) can include delay branch processing by a delay branch command. A second CPU (CPU311) that executes processing is provided, and when a CPU error that is an error of the second CPU itself (CPU311) occurs, the second CPU (CPU311) is subjected to exception processing including branch processing that does not depend on a delayed branch instruction. , The CPU error is dealt with in the processing of the branch destination, and when an error related to the effect device (decorative control device 750) occurs and an effect device error different from the game machine error occurs, the branch destination is branched by the delayed branch process. It is characterized in that the effect device error can be notified by the process of.

As a result, the delay branch instruction can reduce the disturbance of the pipeline at the time of branching, and efficiently notify the effect device error. Further, when a CPU error (exception processing) caused by the second CPU (CPU311) itself occurs, the CPU error can be dealt with at an early stage by giving priority to the exception processing over the pipeline processing.

In the fifth embodiment, the first CPU (CPU111a) transmits a first command (effect command) indicating a game machine error to the second CPU (CPU311), and the second CPU (CPU311) sends the first command (effect command). The corresponding first display data (error code "A1000000") and the second display data (error code "B10000000", error code "C01000000" indicating that an effect device error related to the effect device (decorative control device 750) has occurred. ") Is executed, and the first display data (error code" A1000000 ") and the second display data (error code" B10000000 ", error code" C01000000 ") are transmitted to the display device 41. It is characterized in that it is displayed in an identifiable manner.

As a result, the game machine error and the effect device error related to the effect device (decorative control device 750) can be easily identified by those involved in the game hall.

The present invention is not limited to the embodiments described above, and various modifications and changes can be made within the scope of the technical idea, and it is clear that these are also included in the technical scope of the present invention. Is. For example, it is possible to combine a plurality of embodiments. Further, for example, the present invention can be applied to other types of gaming machines (slot machines, etc.). The scope of the present invention is indicated by the claims and is intended to include all modifications within the meaning and content equivalent to the claims.

For example, when the above embodiment is applied to a slot machine, the game medium used for the game is a medal (coin) instead of the game ball, and the number of prize balls is replaced with the number of medals paid out. Then, in the slot machine, the payout rate (base) as performance information is the ratio (%) of the number of medals to be paid out to the number of medals inserted into the slot machine, and the accessory ratio is the number of medals paid out in a predetermined period. Of these, the ratio (%) of the number of medals paid out by various bonuses.

10 Pachinko machine 25 Direction button 30 Gaming board 32 Gaming area 36 1st start winning opening (1st starting winning area)
37 Ordinary variable winning device (second starting winning area)
39 Special variable prize device 40 Center case 41 Display device 50 Collective display device (LED)
70 Relay board 100 Game control device (main board)
152 Performance display device 173a serial port (first serial port)
173b serial port (second serial port)
200 Payout control device 300 Production control device (sub-board)
454 Call button 510 Parts 750 Ornamental control device 776A, 776B, 776C Clamp diode circuit

Claims (1)

In a gaming machine provided with a game control means capable of executing a game and capable of generating a special gaming state advantageous to the player when the result of the game is a special result.
The game control means
Program storage means for storing programs and
An arithmetic processing means that performs a predetermined arithmetic processing by the program, and
An update information storage means capable of storing information updated by the arithmetic processing means is provided.
The program storage means includes a first program storage area, a second program storage area, and an unused area between the first program storage area and the second program storage area.
The updated information storage means includes a first information storage area, a second information storage area, and an unused area between the first information storage area and the second information storage area.
The arithmetic processing means
The performance display output program stored in the first program storage area outputs display data of performance information related to the gaming machine stored in the second information storage area.
The test signal output program stored in the second program storage area outputs the data of the test signal related to the game machine stored in the first information storage area .
It is composed of general-purpose registers that can store values when performing the arithmetic processing, and includes a plurality of registers that can be switched and used.
In the process of outputting the data of the test signal, by switching a plurality of register groups, the values of all the general-purpose registers in the arithmetic processing means are saved in the stack area of the update information storage means.
A gaming machine characterized in that in a process of outputting display data of performance information, the values of all general-purpose registers in the arithmetic processing means are not saved in the stack area of the update information storage means.

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