JP7214033B1 - SiC device manufacturing method - Google Patents

Abstract

Kind Code: A1 An object of the present invention is to provide a method for manufacturing a SiC device that is easy to process during laser processing. A SiC device manufacturing method according to the present embodiment includes a step of manufacturing a SiC device using a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC substrate. The SiC substrate has a difference of 2 mΩ·cm or less between the maximum resistivity and the minimum resistivity among the resistivities of the plurality of first measurement points and the two second measurement points. The plurality of first measurement points are located in an area inside the boundary 5 mm inside from the outer peripheral edge, and are separated from the center and the center in the [11-20] direction or [-1-120] direction by 10 mm. including measurement points of The two second measurement points are located 1 mm inside from the outer peripheral edge, in the [11-20] direction from the center and in the [-1-120] direction from the center, respectively. The SiC substrate includes portions other than the high nitrogen concentration region called facets. [Selection drawing] Fig. 1

Description

The present invention relates to a method for manufacturing SiC devices.

Silicon carbide (SiC) has a dielectric breakdown field one order of magnitude larger and a bandgap three times larger than silicon (Si). In addition, silicon carbide (SiC) has properties such as a thermal conductivity that is about three times as high as that of silicon (Si). Therefore, silicon carbide (SiC) is expected to be applied to power devices, high-frequency devices, high-temperature operation devices, and the like. Therefore, in recent years, SiC epitaxial wafers have come to be used for such semiconductor devices.

A SiC epitaxial wafer is obtained by laminating a SiC epitaxial layer on the surface of a SiC substrate. Hereinafter, the substrate before lamination of the SiC epitaxial layer is referred to as the SiC substrate, and the substrate after lamination of the SiC epitaxial layer is referred to as the SiC epitaxial wafer. A SiC substrate is cut from a SiC ingot.

Patent Literatures 1 and 2 describe that the doping amount of the SiC substrate is made uniform to improve the uniformity of resistivity of the SiC substrate in order to reduce variations in device characteristics. In Patent Document 1, SiC single crystal is grown so as not to form a facet region, thereby increasing the uniformity of the doping amount to the SiC substrate. Conversely, Patent Document 2 improves the uniformity of the doping amount to the SiC substrate by faceting the entire measurable region of the substrate. Further, Patent Document 3 describes a method for manufacturing a SiC single crystal ingot having a uniform volume resistivity in a region 5 mm inward from the edge of the wafer.

Japanese Patent No. 5260606 Japanese Patent No. 5453899 Japanese Patent No. 4926556

In recent years, laser processing of SiC single crystals has been carried out. For example, the SiC single crystal can be split by cracking the SiC single crystal with a laser. For example, laser processing is used when cutting a SiC substrate from an SiC ingot, when cutting a thinner substrate from the SiC substrate, and when chipping the SiC substrate. Laser processing has the advantage of less cutting loss than processing using a wire saw, but may result in rough cut surfaces or unexpected cracks.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a SiC substrate and an SiC ingot that are easy to process during laser processing.

The inventors have found that the ease of processing the outer peripheral edge of the SiC substrate, which is outside the device acquisition area, greatly contributes to the success rate of processing. Until now, as in Patent Documents 1 to 3, in order to reduce the variation in device characteristics, the resistivity distribution within the device acquisition region has been controlled. No distribution control is performed. The outside of the device acquisition area is, for example, an area up to 5 mm from the outer edge of the SiC substrate, an area up to 3 mm, and the like.

For example, as described in Patent Documents 1 and 2, it is not possible to sufficiently reduce the variation in dopant concentration between the inner region and the outer region during crystal growth by sublimation only by controlling the position of the facet. Resistivity distribution outside the device acquisition area cannot be homogenized. This is because the growth conditions are not controlled even outside the device acquisition region. Even if the conditions are optimized to make the dopant concentration uniform within the device acquisition region, the growth conditions at the outermost periphery of the growth surface are fundamentally different from those at the inner periphery, resulting in non-uniform growth conditions. is not given, uniformity including outside the device acquisition area cannot be achieved.
In order to solve the above problems, the present invention provides the following means.

(1) The SiC substrate according to the first aspect is in a region inside the boundary 5 mm inside from the outer peripheral edge, and 10 mm in the [11-20] direction or [-1-120] direction from the center and the center A plurality of first measurement points including a plurality of measurement points separated from each other, and 1 mm inside from the outer peripheral edge, in each of the [11-20] direction from the center and the [-1-120] direction from the center. When the resistivity is measured at two measuring points, the difference between the maximum resistivity and the minimum resistivity among the resistivities of the plurality of first measuring points and the two second measuring points is 2 mΩ· cm or less.

(2) In the SiC substrate according to the above aspect, even if the difference between the maximum resistivity and the minimum resistivity among the resistivities of the plurality of first measurement points and the two second measurement points is 1 mΩ cm or less. good.

(3) In the SiC substrate according to the above aspect, the difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points and the two second measurement points is 0.5 mΩ cm. It can be below.

(4) In the SiC substrate according to the above aspect, in the region inside the boundary 5 mm inside from the outer peripheral edge, from each of the plurality of first measurement points in the [1-100] direction or [-1100] direction A plurality of third measurement points separated by 10 mm each, and two fourth measurement points located 1 mm inside from the outer peripheral edge in the [1-100] direction from the center and in the [-1100] direction from the center. When the rate is further measured, the maximum resistivity among the respective resistivities of the plurality of first measurement points, the two second measurement points, the plurality of third measurement points, and the two fourth measurement points The difference from the minimum resistivity may be 2 mΩ·cm or less.

(5) In the SiC substrate according to the above aspect, the difference between the maximum resistivity and the minimum resistivity at two arbitrary measurement points may be 2 mΩ·cm or less.

(6) The SiC substrate according to the above aspect may have a diameter of 149 mm or more.

(7) The SiC substrate according to the above aspect may have a diameter of 199 mm or more.

(8) In the SiC substrate according to the above aspect, the resistivity at the plurality of first measurement points and the two second measurement points may be 20 mΩ·cm or more.

(9) In the SiC substrate according to the above aspect, the resistivity at the plurality of first measurement points and the two second measurement points may be 23 mΩ·cm or more.

(10) In the SiC substrate according to the aspect described above, the resistivity at the plurality of first measurement points and the two second measurement points may be 20 mΩ·cm or less.

(11) In the SiC substrate according to the above aspect, the resistivity at the plurality of first measurement points and the two second measurement points may be 17 mΩ·cm or less.

(12) In the SiC ingot according to the second aspect, the SiC substrate is cut and the resistivity of the cut surface is measured. A plurality of first measurement points including a plurality of measurement points separated by 10 mm in the [11-20] direction or [-1-120] direction from the center, 1 mm inside from the outer peripheral edge, and the [11-20] direction from the center The difference between the maximum resistivity and the minimum resistivity of each of the two second measurement points in the [-1-120] direction from the center is 2 mΩ·cm or less.

The SiC substrate and SiC ingot according to the above aspect are easy to process during laser processing.

1 is a plan view of a SiC substrate according to this embodiment; FIG. It is a figure which shows the relationship between a 2nd measurement point and a measurement spot. 4 is a graph showing the relationship between the resistivity of a SiC substrate and the laser power required to crack the SiC substrate. FIG. 4 is a plan view of another example of the SiC substrate according to this embodiment; 1 is a schematic diagram for explaining a sublimation method, which is an example of a SiC ingot manufacturing apparatus; FIG.

Hereinafter, the SiC substrate and the like according to the present embodiment will be described in detail with appropriate reference to the drawings. In the drawings used in the following description, characteristic parts may be enlarged for the sake of convenience in order to make it easier to understand the characteristics of this embodiment, and the dimensional ratios of each component may differ from the actual ones. There is The materials, dimensions, and the like exemplified in the following description are examples, and the present invention is not limited to them, and can be modified as appropriate without changing the gist of the invention.

FIG. 1 is a plan view of a SiC substrate 10 according to this embodiment. SiC substrate 10 is made of, for example, n-type SiC. The polytype of SiC substrate 10 is not particularly limited and may be any of 2H, 3C, 4H and 6H. The SiC substrate 10 is, for example, 4H-SiC.

The planar view shape of SiC substrate 10 is substantially circular. SiC substrate 10 may have an orientation flat OF or a notch for determining the direction of the crystal axis. The diameter of SiC substrate 10 is, for example, 149 mm or more, preferably 199 mm or more. The larger the diameter of the SiC substrate 10, the more difficult it is to stably cut it by laser processing.

In the SiC substrate 10 according to the present embodiment, the difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points 1 and the two second measurement points 2 is 2 mΩ cm or less. .

All first measurement points 1 are within the first region 5 . The first measurement point 1 includes a center 1A and a plurality of measurement points 1B separated by 10 mm from the center 1A in the [11-20] direction or the [-1-120] direction. A distance L between the center 1A and the adjacent measurement point 1B is 10 mm. The distance L between adjacent measurement points 1B is also 10 mm. The first region 5 is a region within the boundary 7 5 mm inward from the outer peripheral edge 8 of the SiC substrate 10 . The first measurement point 1 is not placed on the boundary 7. The first area 5 is within the effective area for chipping. Chips cut from the first region 5 can be used for devices.

All of the second measurement points 2 are within the second region 6 . The second measurement points 2 are two points located 1 mm inside from the outer peripheral edge 8 in the [11-20] direction from the center 1A and in the [-1-120] direction from the center 1A. The second area 6 is an area outside the boundary 7 and 5 mm inside from the outer peripheral edge 8 . The second area 6 is outside the effective area for chipping. The second region 6 is in the vicinity of the outer peripheral edge 8, and various parameters are likely to vary. Therefore, chips cut out from the second region 6 are generally not used for devices. The second area 6 is also called an edge exclusion area.

Resistivity can be measured by the eddy current method. The eddy current method is a non-contact resistance measurement method. Resistivity can be measured, for example, with a manual non-contact resistance meter manufactured by Napson. A measurement spot diameter of a device using an eddy current method is generally 5 mm or more and 15 mm or less.

When measuring the first measurement point 1, the first measurement point 1 is arranged at the center of the measurement spot. When measuring the second measurement point 2 , the measurement spot should not protrude from the SiC substrate 10 .

FIG. 2 is a diagram showing the relationship between the second measurement point 2 and the measurement spot Sp. The second measuring point 2 is located 1 mm inside from the outer peripheral edge 8 . When the center of the measurement spot Sp is arranged at the center of the second measurement point 2 , a portion of the measurement spot Sp having a diameter of 5 mm or more and 15 mm or less is exposed outside the SiC substrate 10 . In this case, accurate measurement cannot be performed. Therefore, the measurement spot Sp is shifted inward so that a part of the measurement spot Sp does not protrude from the SiC substrate 10 within a range that satisfies the condition that the second measurement point 2 is within the measurement spot Sp. The resistivity measurement at the second measurement point 2 requires processing such as shifting the measurement spot Sp, and is generally not measured.

If the difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points 1 and the two second measurement points 2 is 2 mΩ cm or less, the cut surface cut by laser processing It is possible to suppress the surface roughness from becoming rough and the occurrence of unexpected cracks. Here, the cutting of the SiC substrate 10 corresponds to chipping of the SiC substrate 10 and cutting out thinner substrates from the SiC substrate 10 .

FIG. 3 is a graph showing the relationship between the resistivity of the SiC substrate 10 and the laser power required to crack the SiC substrate 10 . As shown in FIG. 3, the lower the resistivity of the SiC substrate 10, the higher the laser power required to crack. As shown in FIG. 3, if the difference between the maximum resistivity and the minimum resistivity among the resistivities of the plurality of first measurement points 1 and the two second measurement points 2 is 2 mΩ cm or less, it is constant can be uniformly cracked over the entire surface of the SiC substrate 10 with a laser output of . Since the laser output does not fluctuate during cutting, it is possible to suppress the surface roughness of the cut surface from becoming rough and the occurrence of unexpected cracks.

The difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points 1 and the two second measurement points 2 is preferably 1 mΩ cm or less, and 0.5 mΩ cm or less. is more preferable. The smaller the difference between the maximum resistivity and the minimum resistivity, the less likely a problem will occur on the cut surface, and the higher the success rate of laser processing.

Further, as shown in FIG. 3, the higher the resistivity of the SiC substrate 10, the smaller the laser power required to create a crack. Therefore, the resistivity of the plurality of first measurement points 1 and the two second measurement points 2 is preferably 20 mΩ·cm or more, more preferably 23 mΩ·cm or more.

From the device point of view, the lower the resistivity of the SiC substrate 10, the lower the resistance during device operation, leading to a reduction in power consumption. Therefore, the resistivity of the plurality of first measurement points 1 and the two second measurement points 2 is preferably 20 mΩ·cm or less, more preferably 17 mΩ·cm or less. As described above, in this case, it is necessary to increase the laser output for cutting, which increases the load from the viewpoint of cutting.

FIG. 4 is a plan view of another example of the SiC substrate 10 according to this embodiment. The SiC substrate 10 according to the present embodiment has the maximum resistance among the respective resistivities of the plurality of first measurement points 1, the two second measurement points 2, the plurality of third measurement points 3, and the two fourth measurement points 4. The difference between the modulus and the minimum resistivity may be 2 mΩ·cm or less. Among these resistivities, the difference between the maximum resistivity and the minimum resistivity is preferably 1 mΩ·cm or less, more preferably 0.5 mΩ·cm or less.

All the third measurement points 3 are within the first region 5 . The third measurement points 3 are points separated from each of the plurality of first measurement points 1 by 10 mm in the [1-100] direction or the [-1100] direction. The distance between the first measurement point 1 and the adjacent third measurement point 3 is 10 mm. The distance between adjacent third measurement points 3 is also 10 mm. All fourth measurement points 4 are within the second region 6 . The fourth measurement points 4 are two points located 1 mm inside from the outer peripheral edge 8, in the [1-100] direction from the center 1A and in the [-1100] direction from the center 1A.

When measuring the resistivity at the third measurement point 3, the third measurement point 3 is arranged at the center of the measurement spot. When measuring the resistivity at the fourth measurement point 4, similarly to the measurement at the second measurement point 2, the measurement spot Sp is measured so as not to protrude from the SiC substrate 10. FIG.

In the SiC substrate 10 according to the present embodiment, the difference between the maximum resistivity and the minimum resistivity at any two measurement points is preferably 2 mΩ·cm or less, more preferably 1 mΩ·cm or less. , 0.5 mΩ·cm or less.

Next, an example of a method for manufacturing the SiC substrate 10 according to this embodiment will be described. SiC substrate 10 is obtained by slicing a SiC ingot. A SiC ingot is obtained, for example, by a sublimation method. The SiC substrate 10 according to the present embodiment can be manufactured by controlling the growth conditions of the SiC ingot.

FIG. 5 is a schematic diagram for explaining a sublimation method, which is an example of the SiC ingot manufacturing apparatus 30. As shown in FIG. In FIG. 5, the direction orthogonal to the surface of the base 32 is the z-direction, one direction orthogonal to the z-direction is the x-direction, and the z-direction and the direction orthogonal to the x-direction are the y-direction.

In the sublimation method, a seed crystal 33 made of SiC single crystal is placed on a pedestal 32 placed in a crucible 31 made of graphite, and the crucible 31 is heated to generate a sublimation gas sublimated from the raw material powder 34 in the crucible 31 as a seed crystal. 33 to grow the seed crystal 33 into a larger SiC ingot 35 . The seed crystal 33 is, for example, a SiC single crystal having an offset angle of 4 degrees with respect to the [11-20] direction, and is placed on the pedestal 32 with the C plane as the growth plane. The heating of the crucible 31 is performed by a coil 36, for example. A heat insulating material, for example, may be arranged around the crucible 31 .

Also, a taper member 37 that expands in diameter from the pedestal 32 toward the inner wall of the crucible 31 may be arranged inside the crucible 31 . By using the taper member 37, the diameter of the growing single crystal can be increased. By performing crystal growth while expanding the diameter, a high nitrogen concentration region called a facet can be arranged outside the effective region when SiC substrate 10 is obtained from SiC ingot 35 .

The growth shape of the outer periphery of the SiC ingot 35 in the xy direction is likely to be disturbed. This is because it is susceptible to disturbance from other members such as the crucible 31 . The growth rate and growth surface temperature are likely to be non-uniform at the xy-direction outer periphery of the SiC ingot 35 . Here, the state of the outer peripheral portion of the SiC ingot 35 differs depending on the growth conditions of the SiC ingot 35 . Therefore, in the SiC substrate 10 according to the present embodiment, the process of manufacturing the SiC ingot 35, cutting the SiC substrate 10, measuring the SiC substrate 10, and feeding back the measurement results is repeated multiple times to change the growth conditions of the SiC ingot 35. It can be made by What is measured when feeding back is the resistivity of the SiC substrate 10, and the second measuring point 2, which is 1 mm inside from the outer peripheral edge 8, is always measured, which was hardly measured in the conventional art.

For example, in the SiC substrate 10 cut from the SiC ingot 35 produced under certain conditions, if the resistivity at the second measurement point 2 is higher than the resistivity at the first measurement point 1, the growth conditions are changed based on the result. .

For example, the amount of dopant supplied to the outer peripheral portion is made higher than the amount of dopant supplied to the inner peripheral portion. For example, by providing a dopant gas flow path in the crucible 31 and adjusting the gas permeability of the crucible 31, the amount of dopant supplied to the outer peripheral portion can be made higher than the amount of dopant supplied to the inner peripheral portion. Further, for example, by providing an opening in the taper member 37 or adjusting the thickness of the taper member 37, the amount of dopant supplied to the outer peripheral portion can be adjusted.

Further, for example, the C/Si ratio of the sublimation gas supplied to the outer peripheral portion may be lower than the C/Si ratio of the sublimation gas supplied to the inner peripheral portion. The C/Si ratio is the abundance ratio of Si gas and C gas. For example, by changing the heating temperature of the raw material powder 34 between the outer circumference and the inner side, the C/Si ratio of the sublimation gas can be changed depending on the location. For example, the higher the heating temperature, the richer the carbon and the higher the C/Si ratio.

Further, for example, the temperature of the outer peripheral portion of the crystal growth surface of the SiC ingot 35 may be lower than the temperature of the inner peripheral portion. The temperature of the crystal growth surface can be changed by, for example, installing a heater on the pedestal 32 or installing a heat insulating material.

On the other hand, in the SiC substrate 10 cut out from the SiC ingot 35 produced under certain conditions, when the resistivity at the second measurement point 2 is lower than the resistivity at the first measurement point 1, in the direction opposite to the above, Change growing conditions. Specifically, the amount of dopant supplied to the outer peripheral portion is made lower than the amount of dopant supplied to the inner peripheral portion, and the C/Si ratio of the sublimation gas supplied to the outer peripheral portion is set to C of the sublimation gas supplied to the inner peripheral portion. /Si ratio, the temperature of the outer peripheral portion of the crystal growth surface of the SiC ingot 35 is made higher than the temperature of the inner peripheral portion.

In this way, the crystal growth conditions of the SiC ingot 35 are determined by repeating the crystal growth of the SiC ingot 35 a plurality of times and feeding back each result. Then, SiC substrate 10 according to the present embodiment can be manufactured by manufacturing SiC ingot 35 under the determined growth conditions and cutting SiC ingot 35 .

In the SiC substrate 10 according to the present embodiment, the difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points 1 and the two second measurement points 2 is 2 mΩ cm or less. . Therefore, the SiC substrate 10 can be laser-processed with a constant laser output. Since the laser output does not fluctuate during cutting, it is possible to suppress the surface roughness of the cut surface from becoming rough and the occurrence of unexpected cracks.

Although the case of laser processing the SiC substrate 10 has been exemplified so far, the same applies to the case of laser processing the SiC ingot 35 . For example, cutting the SiC substrate 10 from the SiC ingot 35 corresponds to laser processing the SiC ingot 35 . The state of SiC ingot 35 is obtained by cutting SiC substrate 10 from SiC ingot 35 and evaluating it. The state of SiC ingot 35 is determined by evaluating the cut surface of SiC substrate 10 cut out. Where the cutting plane is to be taken depends on the type of substrate to be acquired, but for example, it is a plane tilted 4° from the (0001) plane with respect to the [11-20] direction. The target thickness of the SiC substrate is, for example, 400 μm.

When the SiC ingot 35 is laser-processed, the SiC substrate 10 is cut and the cut surface is evaluated. and the minimum resistivity is preferably 2 mΩ·cm or less. This can be confirmed by measuring the resistivity of the cut surface. When the resistivity of the cut surface is measured, the difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points and the two second measurement points is 2 mΩ cm or less. If so, the cut portion satisfies the above conditions, and it is possible to suppress the surface roughness of the cut surface from becoming rough and the occurrence of unexpected cracks during laser processing.

The difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points 1 and the two second measurement points 2 on the cut surface is more preferably 1 mΩ·cm or less, and 0.2 mΩ·cm or less. It is more preferably 5 mΩ·cm or less.

In addition, the difference between the maximum resistivity and the minimum resistivity among the respective resistivities of the plurality of first measurement points 1, the two second measurement points 2, the plurality of third measurement points, and the two fourth measurement points on the cut surface is preferably 2 mΩ·cm or less, more preferably 1 mΩ·cm or less, and even more preferably 0.5 mΩ·cm or less.

The difference in resistivity between any two points on the cut surface is preferably 2 mΩ·cm or less, more preferably 1 mΩ·cm or less, and even more preferably 0.5 mΩ·cm or less.

Moreover, the resistivity of the SiC ingot 35 at the cut surface is preferably 20 mΩ·cm or more, more preferably 23 mΩ·cm or more. Moreover, the resistivity of the SiC ingot 35 at the cut surface may be 20 mΩ·cm or less, or may be 17 mΩ·cm or less.

Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to specific embodiments, and various can be transformed or changed.

Reference Signs List 1 first measurement point, 1A center, 1B measurement point, 2 second measurement point, 3 third measurement point, 4 fourth measurement point, 5 first area, 6 second area, 7 Boundary 8 Peripheral edge Sp Measuring spot 30 Manufacturing apparatus 31 Crucible 32 Pedestal 33 Seed crystal 34 Raw material powder 35 SiC ingot 36 Coil 37 Taper member

Claims (5)

A step of fabricating a SiC device using a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC substrate;
The SiC substrate is
A plurality of first measurement points located in an area 5 mm inside the boundary from the outer peripheral edge and separated from the center and the center by 10 mm in the [11-20] direction or [-1-120] direction. a measuring point;
When measuring the resistivity at two second measurement points in the [11-20] direction from the center and in the [-1-120] direction from the center, 1 mm inside from the outer peripheral edge,
The difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points and the two second measurement points is 2 mΩ cm or less,
The method of manufacturing a SiC device, wherein the SiC substrate includes a portion called a facet other than the high nitrogen concentration region. A step of fabricating a SiC device using a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC substrate;
The SiC substrate is
A plurality of first measurement points located in an area 5 mm inside the boundary from the outer peripheral edge and separated from the center and the center by 10 mm in the [11-20] direction or [-1-120] direction. a measuring point;
When measuring the resistivity at two second measurement points in the [11-20] direction from the center and in the [-1-120] direction from the center, 1 mm inside from the outer peripheral edge,
The difference between the maximum resistivity and the minimum resistivity of each of the plurality of first measurement points and the two second measurement points is 1 mΩ cm or less,
The SiC device manufacturing method, wherein the SiC substrate has a diameter of 149 mm or more. 3. The method of manufacturing a SiC device according to claim 1, wherein said SiC device is a power device. 3. The method of manufacturing a SiC device according to claim 1, wherein said SiC device is a high frequency device. 3. The method of manufacturing a SiC device according to claim 1, wherein said SiC device is a high temperature operation device.

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