JP7202869B2 - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- JP7202869B2 JP7202869B2 JP2018230523A JP2018230523A JP7202869B2 JP 7202869 B2 JP7202869 B2 JP 7202869B2 JP 2018230523 A JP2018230523 A JP 2018230523A JP 2018230523 A JP2018230523 A JP 2018230523A JP 7202869 B2 JP7202869 B2 JP 7202869B2
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- General Physics & Mathematics (AREA)
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Description
[構成]
まず、図1~図4を参照して、実施の形態1に係る半導体装置の構成について説明する。
続いて、図5~図7を参照しながら、実施の形態1に係る半導体装置1の製造方法について説明する。
以上説明したように、実施の形態1に係る半導体装置1は、実装基板10と、実装基板10の主面150に配置される、複数の配線電極20のうち共通の半導体素子80に接続されている2つの配線電極20のうちの一方である第1配線電極、他方である第2配線電極、及び、当該第1配線電極と当該第2配線電極との間に配置される挿入部材100と、当該第1配線電極及び当該第2配線電極に対し、第1電気接続部材50と第2電気接続部材60とを介してフリップチップ接続され、且つ、上面視において挿入部材100と少なくとも一部が重なる半導体素子80と、半導体素子80と実装基板10との間に配置される樹脂40とを備える。樹脂40に対する挿入部材100の濡れ性は、樹脂40に対する実装基板10の濡れ性よりも高い。また、樹脂40は、半導体素子80と挿入部材100とに接して配置される。
続いて、実施の形態1に係る半導体装置の変形例について説明する。なお、以下で説明する変形例においては、実施の形態1に係る半導体装置が備える各構成要素との差異点を中心に説明し、同一の構成要素については、説明を簡略化又は省略する場合がある。
図8は、実施の形態1の変形例1に係る半導体装置1aを示す部分拡大断面図である。図9は、実施の形態1の変形例1に係る半導体装置1aを示す部分拡大斜視図である。なお、図8に示す断面図は、図3に示す断面図と同じ断面の拡大図を模式的に示すものである。また、図9に示す部分拡大斜視図においては、実装基板10、隣り合う2つの配線電極20、及び、挿入部材101を図示しており、半導体素子80、樹脂40等の構成要素の一部を説明のために省略して図示している。
図10は、実施の形態1の変形例2に係る半導体装置1bを示す部分拡大斜視図である。なお、図10に示す部分拡大斜視図においては、実装基板10、隣り合う2つの配線電極20、及び、挿入部材102を図示しており、半導体素子80、樹脂40等の構成要素の一部を説明のために省略して図示している。
図11は、実施の形態1の変形例3に係る半導体装置1cを示す部分拡大断面図である。なお、図11に示す断面図は、図3に示す断面図と同じ断面の拡大図を模式的に示すものである。
図12は、実施の形態1の変形例4に係る半導体装置1dを示す上面図である。図13は、図12のXIII-XIII線における、実施の形態1の変形例4に係る半導体装置1dを示す断面図である。
続いて、実施の形態2に係る半導体装置について説明する。なお、実施の形態2に係る半導体装置の説明においては、実施の形態1に係る半導体装置1との差異点を中心に説明し、実施の形態1に係る半導体装置1と同様の構成については同様の符号を付し、説明を省略する場合がある。
図14は、実施の形態2に係る半導体装置2を示す上面図である。図15は、実施の形態2に係る半導体装置1が備える挿入部材103を説明するための上面図である。なお、図15では、半導体装置2が備える波長変換部材30及び樹脂40の図示を省略している。
続いて、実施の形態2に係る半導体装置2の製造方法について説明する。なお、実施の形態2に係る半導体装置2の製造方法は、樹脂40を充填する工程(図5に示すステップS106)以外は実施の形態1に係る半導体装置1の製造方法と実質的に同様であるため、説明を省略又は簡略化する場合がある。
以上説明したように、実施の形態2に係る半導体装置2は、実施の形態1に係る半導体装置1と同様に、実装基板10と、実装基板10の主面150に配置される、第1配線電極、第2配線電極、及び、第1配線電極と第2配線電極との間に配置される挿入部材103と、第1配線電極及び第2配線電極に対し、第1電気接続部材50と第2電気接続部材60とを介してフリップチップ接続され、且つ、上面視において挿入部材103と少なくとも一部が重なる半導体素子80と、半導体素子80と実装基板10との間に充填される樹脂40とを備える。樹脂40に対する挿入部材103の濡れ性は、樹脂40に対する実装基板10の濡れ性よりも高い。また、樹脂40は、半導体素子80と挿入部材103とに接して充填される。実施の形態2に係る半導体装置2が備える挿入部材103は、上面視において、半導体素子80の外側に位置する延伸部120を有する。
続いて、実施の形態2に係る半導体装置の変形例について説明する。なお、以下で説明する変形例においては、実施の形態2に係る半導体装置が備える各構成要素との差異点を中心に説明し、同一の構成要素については、説明を簡略化又は省略する場合がある。また、以下で説明する変形例1~3は、それぞれ実施の形態2に係る半導体装置2と挿入部材の上面視形状のみが異なる。そのため、変形例1~3を説明するための図である図18~図20においては、変形例1~3に係る挿入部材を部分的に拡大して示しており、実施の形態2に係る半導体装置2が備える各構成要素の一部を省略して示している。また、図18~図20、及び、図23においては、半導体素子80を、半導体素子80が位置する場所に破線で模式的に示している。
図18は、実施の形態2の変形例1に係る半導体装置2aが備える挿入部材104を示す部分拡大上面図である。
図19は、実施の形態2の変形例2に係る半導体装置2bが備える挿入部材105を示す部分拡大上面図である。
図20は、実施の形態2の変形例3に係る半導体装置2cが備える挿入部材106を示す部分拡大上面図である。
図21は、実施の形態2の変形例4に係る半導体装置2dを示す上面図である。図22は、図21のXXII-XXII線における、実施の形態2の変形例4に係る半導体装置2dを示す断面図である。図23は、実施の形態2の変形例4に係る半導体装置2dが備える挿入部材107を説明するための上面図である。なお、図23では、半導体装置2dが備える波長変換部材30及び樹脂40の図示を省略している。
以上、本開示の実施の形態及び変形例に係る半導体装置及び半導体装置の製造方法について、各実施の形態及び変形例に基づいて説明したが、本開示は、これらの実施の形態及び変形例に限定されるものではない。本開示の趣旨を逸脱しない限り、当業者が思いつく各種変形を各実施の形態及び変形例に施したもの、又は、異なる実施の形態における構成要素を組み合わせて構築される形態も、一つ又は複数の態様の範囲内に含まれてもよい。
10 実装基板
20 配線電極
21 配線電極(第1配線電極)
22 配線電極(第2配線電極)
30 波長変換部材
40 樹脂
50、51 第1電気接続部材
60、61 第2電気接続部材
70 保護素子
80 半導体素子
81、82 パッド電極
90 ダム材
100、101、102、103、104、105、106、107 挿入部材
110 凹凸部
111 凸部
112 凹部
120、121、122、123、124 延伸部
130、131、132、133 幅広部
140 隙間部
150 主面
160 間挿部
180 接続部
200、201、202、203、204、205、206、207 滴下位置
Claims (10)
- 実装基板と、
前記実装基板の主面に配置される、第1配線電極、第2配線電極、及び、前記第1配線電極と前記第2配線電極との間に配置される挿入部材と、
前記第1配線電極及び前記第2配線電極に対し、第1電気接続部材と第2電気接続部材とを介してフリップチップ接続され、且つ、上面視において前記挿入部材と少なくとも一部が重なる半導体素子と、
前記半導体素子と前記実装基板との間に配置される樹脂とを備え、
前記樹脂に対する前記挿入部材の濡れ性は、前記樹脂に対する前記実装基板の濡れ性よりも高く、
前記樹脂は、前記半導体素子と前記挿入部材とに接して配置され、
前記挿入部材は、長尺であり、且つ、前記半導体素子と対向する面に、前記半導体素子に向かって突出する凸部を1以上有する凹凸部を有し、
前記凸部は、前記挿入部材の長手方向に沿って延在している
半導体装置。 - 上面視において、前記挿入部材は、前記半導体素子の外側に位置する延伸部を有する
請求項1に記載の半導体装置。 - 実装基板と、
前記実装基板の主面に配置される、第1配線電極、第2配線電極、及び、前記第1配線電極と前記第2配線電極との間に配置される挿入部材と、
前記第1配線電極及び前記第2配線電極に対し、第1電気接続部材と第2電気接続部材とを介してフリップチップ接続され、且つ、上面視において前記挿入部材と少なくとも一部が重なる半導体素子と、
前記半導体素子と前記実装基板との間に配置される樹脂とを備え、
前記樹脂に対する前記挿入部材の濡れ性は、前記樹脂に対する前記実装基板の濡れ性よりも高く、
前記樹脂は、前記半導体素子と前記挿入部材とに接して配置され、
上面視において、前記挿入部材は、前記半導体素子の外側に位置する延伸部を有する
半導体装置。 - 前記挿入部材は、長尺であり、且つ、前記半導体素子と対向する面に、前記半導体素子に向かって突出する凸部を1以上有する凹凸部を有し、
前記凸部は、前記挿入部材の長手方向に沿って延在している
請求項3に記載の半導体装置。 - 前記延伸部は、上面視において、前記第1配線電極と前記第2配線電極との離間距離よりも大きな幅の幅広部を有する
請求項2~4のいずれか1項に記載の半導体装置。 - 前記挿入部材は、前記第1配線電極及び第2配線電極と離間して配置される
請求項1~5のいずれか1項に記載の半導体装置。 - 前記第1配線電極、前記第2配線電極及び前記挿入部材は、同一の材料からなる
請求項6に記載の半導体装置。 - 前記実装基板の主面は、AlN、Al2O3、BeO、SiC、SiO2、及び、SiNから選ばれる1つで形成されており、
前記挿入部材の表面は、Au、Al、及び、Cuから選ばれる1つで形成されており、
前記樹脂は、シリコーン樹脂、及び、エポキシ樹脂から選ばれる少なくとも1つを含む
請求項1~7のいずれか1項に記載の半導体装置。 - 実装基板の主面上に、第1配線電極、第2配線電極、及び、前記第1配線電極と前記第2配線電極との間に配置される挿入部材を形成する工程と、
上面視において、前記挿入部材と少なくとも一部が重なるように、前記第1配線電極及び前記第2配線電極に対し、半導体素子を、第1電気接続部材と第2電気接続部材とを介してフリップチップ接続する工程と、
前記実装基板と、前記実装基板にフリップチップ接続された前記半導体素子との間に、前記挿入部材に沿って樹脂を充填する工程とを備え、
上面視において、前記挿入部材は、前記半導体素子の外側に位置する延伸部を有し、
前記樹脂を充填する工程において、前記樹脂を前記延伸部に滴下する
半導体装置の製造方法。 - 前記延伸部は、上面視において、前記第1配線電極と前記第2配線電極との離間距離よりも大きな幅の幅広部を有し、
前記樹脂を充填する工程において、前記樹脂を前記幅広部に滴下する
請求項9に記載の半導体装置の製造方法。
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001352013A (ja) | 2000-06-07 | 2001-12-21 | Nec Corp | 半導体装置とその製造方法 |
JP2007134540A (ja) | 2005-11-11 | 2007-05-31 | Murata Mfg Co Ltd | 半導体装置およびその製造方法 |
JP2008004674A (ja) | 2006-06-21 | 2008-01-10 | Fujitsu Ltd | 半導体素子及び回路基板からなる半導体装置 |
US20080277802A1 (en) | 2007-05-10 | 2008-11-13 | Siliconware Precision Industries Co., Ltd. | Flip-chip semiconductor package and package substrate applicable thereto |
JP2015188053A (ja) | 2014-03-12 | 2015-10-29 | 豊田合成株式会社 | 発光装置及びその製造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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US20080277802A1 (en) | 2007-05-10 | 2008-11-13 | Siliconware Precision Industries Co., Ltd. | Flip-chip semiconductor package and package substrate applicable thereto |
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