JP7138218B2 - Bonding wafer structure and manufacturing method thereof - Google Patents

Description

FIELD OF THE DISCLOSURE The present disclosure relates to semiconductor bonding technology, and more particularly to a bonded wafer structure and method of manufacturing the same.

Epitaxy refers to the technique of growing new crystals on a wafer to form semiconductor layers. Epitaxy is widely used in the manufacture of radio frequency (RF) devices or power supplies because films formed by epitaxial processing have advantages such as high purity and good thickness control.

However, in popular epitaxially grown wafers or ingots, epitaxial structures adjacent to the seed crystal are usually discarded due to defects and high stress, and only relatively good epitaxial structures are maintained. As a result, unnecessary costs increase.

The present disclosure provides a bonding wafer structure that reduces costs and allows the use of low quality silicon carbide wafers in the substrate for bonding.

The present disclosure also provides a method of manufacturing a bonded wafer structure, wherein the bonded wafer structure is manufactured for epitaxial processing of radio frequency devices or power supplies.

A bonded wafer structure of the present disclosure comprises a support substrate, a bonding layer, and a silicon carbide layer. A bonding layer is formed on the surface of the support substrate, and the silicon carbide layer is bonded to the bonding layer. The carbon face of the silicon carbide layer directly contacts the bonding layer. The silicon carbide layer has a basal plane dislocation (BPD) of 1000 ea/cm ² to 20000 ea/cm ² , a total thickness variation greater than the support substrate total thickness variation (TTV), and a diameter equal to or less than the support substrate diameter. The bonded wafer structure has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm.

In one embodiment of the present disclosure, the bonding layer has a softening point of 50° C. to 200° C., a thickness of less than 100 μm, and a uniformity of less than 10%.

In one embodiment of the present disclosure, the support substrate has a TTV less than 3 μm, a bow less than 20 μm, a warp less than 40 μm, and a Young's modulus greater than 160 GPa.

In one embodiment of the present disclosure, the support substrate has a single-layer or multi-layer structure, and the bonding layer has a single-layer or multi-layer structure.

In one embodiment of the present disclosure, the silicon carbide layer and supporting substrate have a concentricity of less than 1 mm.

In one embodiment of the present disclosure, the bonded wafer structure further comprises an epitaxial silicon carbide substrate bonded to the silicon side of the silicon carbide layer. The epitaxial silicon carbide substrate has a BPD that is less than the BPD of the silicon carbide layer and has a stress that is less than the stress of the silicon carbide layer.

In one embodiment of the present disclosure, the bonded wafer structure further comprises an ion implanted region formed within the epitaxial silicon carbide substrate. The ion-implanted region is located within about 1 μm from the bonding surface of the epitaxial silicon carbide substrate and the silicon carbide layer.

In one embodiment of the present disclosure, the silicon carbide layer has a thickness of less than 500 μm and the bonding wafer structure has a thickness of less than 2000 μm.

A method of manufacturing a bonded wafer structure of the present disclosure includes the following. A bonding layer is formed by coating the surface of the supporting substrate. Bonding the carbon face of the silicon carbide layer to the bonding layer. The silicon carbide layer has a TTV greater than that of the support substrate, a diameter equal to or less than the diameter of the support substrate, and a BPD of 1000 ea/cm ² to 20000 ea/cm ² . The silicon carbide layer before bonding has a bow greater than 75 μm and a warp greater than 150 μm. Next, the silicon surface of the silicon carbide layer is ground to reduce the thickness of the silicon carbide layer. After grinding, the silicon side of the silicon carbide layer is polished to obtain a bonded wafer structure. The bonded wafer structure has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm.

In another embodiment of the present disclosure, a method of bonding a carbon face of a silicon carbide layer onto a bonding layer includes the following. Align the plane of the support substrate with the plane of the silicon carbide layer.

In another embodiment of the present disclosure, the load for bonding the carbon side of the silicon carbide layer onto the bonding layer is 8 kgf to 10 kgf.

In another embodiment of the present disclosure, after bonding the carbon side of the silicon carbide layer onto the bonding layer, further comprising removing residue of the bonding layer and cleaning the support substrate.

In another embodiment of the present disclosure, the thickness of the silicon carbide layer reduced by grinding is 5 μm to 12 μm.

In another embodiment of the present disclosure, the silicon carbide layer before bonding and the bonded wafer structure after grinding have a bow change (Δbow) greater than 80 μm and a warp change (Δwarp) greater than 160 μm.

In another embodiment of the present disclosure, a method of applying the coating and forming the bonding layer includes the following. Wax is spin-coated onto the surface of the support substrate at a temperature of 110°C to 130°C.

Another embodiment of the present disclosure may further include the following. Before grinding the silicon side of the silicon carbide layer, the TTV of the supporting substrate, the bonding layer and the silicon carbide layer which are bonded together are measured. If the measured TTV is less than 10 μm, perform the following steps. If the measured TTV is greater than or equal to 10 μm, it may include: The bonding layer and the silicon carbide layer are removed, and then the surface of the support substrate is coated to form the bonding layer again.

In another embodiment of the present disclosure, polishing includes coarse polishing and fine polishing.

Based on the above, the bonded wafer structure of the present disclosure has a three-layer structure in which a low quality (high stress) silicon carbide layer is provided to replace a portion of an existing support substrate. This silicon carbide layer is a waste product that is removed after epitaxial growth. The use of the silicon carbide layer in the bonding structure not only reduces the material cost and waste cost of the supporting substrate, but also allows the silicon carbide layer to be directly bonded to the epitaxial silicon carbide substrate, thus improving the yield of wafer bonding. can be made The bonded wafer structure of the present disclosure is suitable for application in power supply or radio frequency (RF) device manufacturing processes.

In order to make the above description more specific, embodiments will be described in detail below together with the accompanying drawings.

1 is a schematic cross-sectional view of a bonding wafer structure according to a first embodiment of the present disclosure; FIG.

FIG. 4 is a schematic cross-sectional view of another bonding wafer structure according to the first embodiment of the present disclosure;

FIG. 4 is a manufacturing flow chart of a bonding wafer structure according to a second embodiment of the present disclosure; FIG.

It is a schematic three-dimensional view about step S302 of 2nd Embodiment.

Exemplary embodiments of the present disclosure are generally described below with reference to the drawings, but the present disclosure can be embodied in various ways and are limited to the embodiments disclosed herein not what it should be. For clarity, dimensions and thicknesses of regions, portions and layers are not drawn to scale. In order to facilitate understanding of the present disclosure, identical components are given the same reference numerals hereinafter.

1 is a schematic cross-sectional view of a bonding wafer structure according to a first embodiment of the present disclosure; FIG.

Referring to FIG. 1, the bonding wafer structure 100 of the first embodiment basically comprises a supporting substrate 102, a bonding layer 104, and a silicon carbide layer 106. As shown in FIG. The support substrate 102 is a substrate made of a strong material that has high rigidity and is not easily deformed, bent, or broken during processing. Examples of strong materials are materials with a Young's modulus greater than 160 GPa, preferably materials with a Young's modulus greater than 180 GPa. In one embodiment, support substrate 102 has a total thickness variation (TTV) of, for example, less than 3 μm, preferably less than 1 μm. Support substrate 102 has a bow of, for example, less than 20 μm, preferably less than 15 μm. Support substrate 102 has a warp of, for example, less than 40 μm, preferably less than 30 μm. For example, support substrate 102 is a silicon substrate, a sapphire substrate, a ceramic substrate, or a combination thereof. In other words, the support substrate 102 may have a single-layer or multi-layer structure. A bonding layer 104 is formed on the surface of the support substrate 102 . The bonding layer 104 has a softening point of, for example, 50°C to 200°C, preferably 80°C to 150°C. By setting the softening point of the bonding layer 104 within the above range, the support substrate 102 and the silicon carbide layer 106 can be easily separated from each other thereafter simply by a high temperature method. The bonding layer 104 has a thickness of, for example, less than 100 μm, preferably between 10 μm and 20 μm. Bonding layer 104 has a uniformity of, for example, less than 10%, preferably less than 5%. For example, the bonding layer 104 material may be wax or a fixing adhesive. Considering the need to adjust and align the support substrate 102 and the silicon carbide layer 106 in bonding, wax having relatively high fluidity is preferably used as the material of the bonding layer 104 . However, the disclosure is not limited to this case. When the support substrate 102 and the silicon carbide layer 106 are precisely aligned, a fixing adhesive such as a UV glue may be used as the material for the bonding layer 104 . Also, the bonding layer 104 may have a single-layer or multi-layer structure.

Referring again to FIG. 1 , silicon carbide layer 106 is bonded to bonding layer 104 , that is, silicon carbide layer 106 is fixed onto support substrate 102 via bonding layer 104 . Carbon surface 106 a of silicon carbide layer 106 is in direct contact with bonding layer 104 . Silicon surface 106b of silicon carbide layer 106 is exposed and may be used for subsequent bonding with another epitaxy substrate (not shown). The silicon carbide layer 106 has basal plane dislocations (BPD) of 1000 ea/cm ² to 20000 ea/cm ² , such as 4000 ea/cm ² to 10000 ea/cm ² . Silicon carbide layer 106 has a TTV greater than the total thickness variation (TTV) of support substrate 102 . Silicon carbide layer 106 has a diameter equal to or less than the diameter of support substrate 102 . For example, silicon carbide layer 106 before bonding has a TTV of less than 10 μm, preferably less than 5 μm. However, the silicon carbide layer 106 before bonding, for example, has a bow greater than 75 μm or greater than 100 μm and a warp greater than 150 μm or greater than 200 μm. The reason the pre-bonded silicon carbide layer 106 is relatively large in both bow and warp is that it employs a highly stressed silicon carbide wafer adjacent to the seed crystal. However, since the bonded wafer structure 100 after bonding has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm, the bonded wafer structure 100 can be used for epitaxial processing for power supply line frequency (RF) devices. can be done. In one embodiment, the bonding wafer structure 100 can have a TTV of less than 3 μm, a bow of less than 20 μm, and a warp of less than 40 μm. In the present embodiment, silicon carbide layer 106 has a thickness of, for example, less than 500 μm, preferably less than 400 μm. The bonding wafer structure 100 has a thickness of, for example, less than 2000 μm, preferably less than 1000 μm. Also, the concentricity of the silicon carbide layer 106 and the support substrate 102 is, for example, less than 1 mm, preferably less than 0.5 mm.

FIG. 2 is a schematic cross-sectional view of another bonding wafer structure according to the first embodiment of the present disclosure; Reference numbers that are the same as those in FIG. 1 indicate the same or similar elements, and the same or similar elements can be understood by referring to the description of FIG. 1, and redundant description is omitted.

In FIG. 2, bonded wafer structure 200 may comprise epitaxial silicon carbide substrate 202 bonded to silicon surface 106 b of silicon carbide layer 106 . Epitaxial silicon carbide substrate 202 has a BPD lower than the BPD of silicon carbide layer 106 and a stress lower than the stress of silicon carbide layer 106 . Ion-implanted regions 204 (ie, regions indicated by dashed lines) may also be formed in the epitaxial silicon carbide substrate 202 . Ion-implanted region 204 is adjacent bonding surface 206 between epitaxial silicon carbide substrate 202 and silicon carbide layer 106 . In one embodiment, the distance s between the implanted region 204 and the bonding surface 206 is, for example, within 1 μm. The epitaxial silicon carbide substrate 202 and the silicon carbide layer 106 can then be easily separated from each other from the ion implanted regions 204 because the implanted regions 204 create relatively fragile structures within the epitaxial silicon carbide substrate 202 .

FIG. 3 is a flow chart for fabricating a bonded wafer structure according to a second embodiment of the present disclosure.

Referring to FIG. 3, first, a step S300 of coating and forming a bonding layer on the surface of the supporting substrate is performed. The bonding layer has a softening point of, for example, 50°C to 200°C, preferably 80°C to 150°C. If wax is used as the bonding layer material, the liquid wax may be spin-coated onto the surface of the support substrate at a temperature of 110°C to 130°C. The supporting substrate has a Young's modulus of e.g. greater than 160 GPa, preferably greater than 180 GPa, a TTV of e.g. less than 3 μm, preferably less than 1 μm, a bow of e.g. , preferably with a warp of less than 30 μm. The support substrate is, for example, a silicon substrate, a sapphire substrate, a ceramic substrate, or a combination thereof. Also, the support substrate may have a single-layer or multi-layer structure. The bonding layer has a thickness of, for example, less than 100 μm, preferably 10 μm to 20 μm, and a uniformity of, for example, less than 10%, preferably less than 5%.

Next, step S302 of bonding the carbon face of the silicon carbide layer onto the bonding layer is performed. The silicon carbide layer has a TTV that is greater than the TTV of the supporting substrate. The silicon carbide layer has a diameter equal to or less than the diameter of the support substrate. The silicon carbide layer has a BPD of 1000 ea/cm ² to 20000 ea/cm ² , such as 4000 ea/cm ² to 10000 ea/cm ² . The silicon carbide layer has a thickness of, for example, less than 500 μm, preferably less than 400 μm. The silicon carbide layer before bonding has a TTV less than 10 μm, preferably less than 5 μm, but a bow greater than 75 μm, such as greater than 100 μm, and a warp greater than 150 μm, such as greater than 200 μm. In this embodiment, a method of bonding the silicon carbide layer is as shown in FIG. The plane 102a of the support substrate 102 is aligned with the plane 106c of the silicon carbide layer 106, thereby reducing chipping that occurs in the plane during subsequent processing. For clarity, the bonding layer is omitted in FIG. The bonding load is, for example, greater than 8 kgf, preferably 8 kgf to 10 kgf. After step S302, the concentricity between the silicon carbide layer and the support substrate is, for example, less than 1 mm, preferably less than 0.5 mm.

Subsequently, in order to reduce the thickness of the silicon carbide layer, step S304 of grinding the silicon surface of the silicon carbide layer is performed. The thickness of the silicon carbide layer reduced by grinding is, for example, 5 μm to 12 μm, preferably 8 μm to 12 μm. Therefore, the silicon surface has a TTV of less than 5 μm, preferably less than 1 μm, and the wafer after grinding has a relatively flat and relatively good overall shape.

Next, in order to obtain a bonding wafer structure, a step S306 of polishing the silicon surface of the ground silicon carbide layer is performed. Polishing includes coarse polishing and fine polishing. The silicon surface therefore has a geometric TTV of less than 2 μm, preferably less than 1 μm. In one embodiment, the roughness Ra after coarse and fine polishing is:

1. After rough polishing, a haze of 4.67 and an Ra of 0.1 nm to 0.19 nm are obtained.

2. A haze of 4.16 to 4.19 and an Ra of 0.13 nm to 0.062 nm are obtained after fine polishing.

After step S306, the bonding wafer structure has a TTV of less than 10 μm (eg, less than 3 μm), a bow of less than 30 μm (eg, less than 20 μm), and a warp of less than 60 μm (eg, less than 40 μm). . In other words, the silicon carbide layer before bonding and the bonded wafer structure after polishing have a variation in bow (Δbow) of more than 45 μm, preferably 80 μm. The silicon carbide layer before bonding and the bonded wafer structure after polishing have a change in warp (Δwarp) of more than 90 μm, preferably 160 μm. The bonding wafer structure, for example, has a thickness of less than 2000 μm, preferably less than 1000 μm.

Also after step S302, step S308 is first performed to remove the residue of the bonding layer and clean the support substrate.

Considering the yield of subsequent epitaxial processing, step S310 of measuring the TTV of the support substrate, bonding layer and silicon carbide layer bonded together may be performed before step S304. Subsequently, in step S312, if the TTV is less than 10 μm, the following step S304 is performed. Alternatively, if the TTV is 10 μm or more, first step S314 is performed in which the bonding layer and the silicon carbide layer are removed. The process then returns to step S300 and coating is performed to form another bonding layer on the surface of the original supporting substrate. Step S310 may be performed after step S302 or step S308.

Below is a description of some experiments for verifying the effects of the present disclosure. However, the present disclosure is not limited to the following.

Analysis method

1. Thickness: Wafer thickness was measured by a non-contact instrument (MX-203/FRT/ADE7000).

2. TTV: Bow and Warp. Measurements were made with a non-contact instrument.

3. BPD: Measurements were made by automated optical inspection (AOI) and density was calculated.

(Experimental example 1)

Step 1) Spin coat the wax on the surface of the silicon carbide layer and the silicon substrate at room temperature (thickness is not limited, depends on the fixture in this process) and heat the resulting product to 120°C. Placed on plate and heated for 60 seconds.

Step 2) The silicon carbide layer and the silicon substrate were bonded together so that the plane of the silicon substrate was aligned with the plane of the silicon carbide layer, and left for 60 seconds while applying a load greater than 8 kgf. The silicon carbide layer had a BPD of approximately 4048 ea/cm ² .

Step 3) The silicon surface of the silicon carbide layer was ground to approximately 5 μm.

Step 4) The silicon surface of the ground silicon carbide layer was polished at 35°C to 60°C. By setting the temperature within this range, wafer edge peeling can be prevented and a sufficient removal amount can be ensured. The amount removed by polishing was about 1 μm, and a bonded wafer structure was obtained.

The planar properties of the silicon substrate and the silicon carbide layer alone (before bonding) were measured, and the results are shown in Table 1 below. The entire structure was then measured for planar properties after each of steps 2, 3 and 4 and the results are shown in Table 1 below.

(Experimental example 2)

A bonded wafer structure was prepared in a manner similar to Example 1, except that the silicon carbide layer had a BPD of about 4002 ea/cm ² . The structure at each stage was then measured for planar properties and the results are shown in Table 1 below.

(Experimental example 3)

A bonded wafer structure was prepared in a manner similar to Example 1, except that the silicon carbide layer had a BPD of about 3957 ea/cm ² . The structure at each stage was then measured for planar properties and the results are shown in Table 1 below.

As can be seen from the above table, the silicon carbide layer alone before bonding had relatively large both bow and warp (greater than 100 and greater than 200, respectively). In Examples 1-3, bow and warp were significantly reduced (less than about 20 and about 40, respectively) after step 2 bonding. Therefore, the bonded wafer structure can be used for epitaxial processing of power devices or radio frequency (RF) devices.

In summary, in the bonded wafer structure of the present disclosure, a low quality (high stress) silicon carbide layer is used to replace a portion of an existing support substrate and is directly bonded to an epitaxial silicon carbide substrate. Also, in the bonded wafer structure after the above bonding process, the support substrate and the poor silicon carbide layer can be separated from each other simply by a high temperature method, which allows reuse of the support substrate. Therefore, not only the material cost of the support substrate but also the cost of discarding the low-quality SiC epitaxial wafer can be reduced. Furthermore, in the present disclosure, the bonded wafer structure with high flatness facilitates the bonding process, improves the yield of wafer bonding, and is suitable for epitaxial processing applications in power supply devices or radio frequency devices.

It will be apparent to those skilled in the art that various adaptations and modifications can be made to the structures of the disclosed embodiments without departing from the scope of this disclosure. In view of the above, the present disclosure is intended to cover applications and modifications that come within the scope of the claims and their equivalents.

The bonded wafer structure and manufacturing method thereof according to the present invention may be applied to epitaxial processing of power supply devices or radio frequency devices.

100, 200 bonding wafer structure 102 support substrate 104 bonding layer 106 silicon carbide layer 106a carbon face 106b silicon face 106c, 102a plane 202 epitaxial silicon carbide substrate 204 ion implantation region 206 bonding face S distance S300, S302, S304, S306, S308, S310, S312, S314 steps

Claims (17)

a support substrate;
a bonding layer formed on the surface of the support substrate;
a silicon carbide layer bonded to the bonding layer;
A bonding wafer structure comprising:
the carbon surface of the silicon carbide layer is in direct contact with the bonding layer;
the silicon carbide layer has basal plane dislocations (BPD) of 1000 ea/cm ² to 20000 ea/cm ² ;
The silicon carbide layer has a total thickness variation larger than a total thickness variation (TTV) of the support substrate,
The silicon carbide layer has a diameter equal to or smaller than the diameter of the support substrate,
The bonding wafer structure has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm.
A bonding wafer structure characterized by: the silicon carbide layer has a thickness of less than 500 μm,
the bonding wafer structure has a thickness of less than 2000 μm;
2. The bonding wafer structure of claim 1, wherein: The bonding wafer structure of claim 1, wherein the bonding layer has a softening point of 50°C to 200°C, a thickness of less than 100 µm, and a uniformity of less than 10%. 2. The bonding wafer structure of claim 1, wherein the support substrate has TTV less than 3 [mu]m, bow less than 20 [mu]m, warp less than 40 [mu]m, Young's modulus greater than 160 GPa. The support substrate has a single-layer or multi-layer structure,
The bonding layer has a single-layer or multi-layer structure,
2. The bonding wafer structure of claim 1, wherein: 2. The bonding wafer structure of claim 1, wherein said silicon carbide layer and said support substrate have a concentricity of less than 1 mm. further comprising an epitaxial silicon carbide substrate bonded to the silicon side of the silicon carbide layer;
the epitaxy silicon carbide substrate has a BPD that is smaller than the BPD of the silicon carbide layer;
wherein the epitaxy silicon carbide substrate has a stress less than that of the silicon carbide layer;
2. The bonding wafer structure of claim 1, wherein: further comprising an ion-implanted region formed within the epitaxial silicon carbide substrate;
The ion-implanted region is located within 1 μm from a bonding surface between the epitaxial silicon carbide substrate and the silicon carbide layer,
8. The bonding wafer structure of claim 7, wherein: Coating the surface of the support substrate to form a bonding layer;
bonding a carbon face of a silicon carbide layer to the bonding layer, wherein the silicon carbide layer has a TTV greater than the TTV of the support substrate, and the silicon carbide layer has a diameter less than or equal to the diameter of the support substrate; wherein said silicon carbide layer has a BPD of 1000 ea/cm ² to 20000 ea/cm ² , said silicon carbide layer prior to bonding has a bow greater than 75 μm and a warp greater than 150 μm, said bonding the carbon face of the silicon carbide layer to the bonding layer;
grinding the silicon surface of the silicon carbide layer to reduce the thickness of the silicon carbide layer;
polishing the silicon side of the silicon carbide layer after the grinding to obtain a bonding wafer structure, the bonding wafer structure having a TTV of less than 10 μm and a bow of less than 30 μm; polishing the silicon side of the silicon carbide layer after the grinding having a warp of less than 60 μm;
A method of manufacturing a bonding wafer structure, characterized by: 10. The method of claim 9, wherein bonding the carbon side of the silicon carbide layer onto the bonding layer comprises aligning a plane of the support substrate with a plane of the silicon carbide layer. method of fabricating a bonded wafer structure of . 10. The method for manufacturing a bonding wafer structure according to claim 9, wherein the load for bonding the carbon surface of the silicon carbide layer onto the bonding layer is 8 kgf to 10 kgf. 10. The method of claim 9, further comprising removing residue of the bonding layer and cleaning the support substrate after bonding the carbon side of the silicon carbide layer onto the bonding layer. method of fabricating a bonded wafer structure of . 10. The method for manufacturing a bonding wafer structure according to claim 9, wherein the thickness of said silicon carbide layer after being reduced by said grinding is between 5 [mu]m and 12 [mu]m. The silicon carbide layer before bonding and the bonding wafer structure after grinding have a bow change (Δbow) greater than 80 μm and a warp change (Δwarp) greater than 160 μm. Item 10. A method of manufacturing a bonding wafer structure according to item 9. 10. The bonding of claim 9, wherein the coating to form the bonding layer comprises spin-coating wax onto the surface of the support substrate at a temperature of 110[deg.]C to 130[deg.]C. A method for manufacturing a wafer structure. Before grinding the silicon surface of the silicon carbide layer,
measuring the TTV of the support substrate, the bonding layer, and the silicon carbide layer bonded together;
responsive to the measured TTV being less than 10 μm, performing subsequent steps, or responsive to the measured TTV being greater than or equal to 10 μm, removing the bonding layer and the silicon carbide layer; Coating the surface of the support substrate and forming a bonding layer again.
10. The method of manufacturing a bonding wafer structure as claimed in claim 9, wherein: 10. The method of manufacturing a bonding wafer structure according to claim 9, wherein said polishing includes coarse polishing and fine polishing.

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