JP7126082B2 - Crystalline oxide semiconductor film and semiconductor device - Google Patents

Description

The present invention relates to a crystalline oxide semiconductor film useful for semiconductor devices, and a semiconductor device and system using the crystalline semiconductor oxide film.

Semiconductor devices using gallium oxide (Ga ₂ O ₃ ), which has a large bandgap, are attracting attention as next-generation switching elements that can achieve high withstand voltage, low loss, and high heat resistance, and are being applied to power semiconductor devices such as inverters. Application is expected. Moreover, due to its wide bandgap, it is also expected to be applied to light-receiving and emitting devices such as LEDs and sensors. According to Non-Patent Document 1, the gallium oxide can control the bandgap by mixing indium and aluminum individually or in combination, and constitutes an extremely attractive material system as an InAlGaO-based semiconductor. . Here, the InAlGaO-based semiconductor indicates _{InXAlYGaZO3 (} 0≦ _X ≦2, 0≦ _Y ≦2, 0≦Z≦2, X+Y+Z=1.5 to 2.5), and gallium oxide. It can be viewed from a bird's-eye view as the same material system that is included.

Patent Document 1 describes a highly crystalline conductive α-Ga ₂ O ₃ thin film doped with Sn on a c-plane sapphire substrate. The thin film described in Patent Document 1 is a highly crystalline α-Ga ₂ O ₃ thin film with a rocking curve half-value width of about 60 arcsec in the X-ray diffraction method, but cannot maintain sufficient pressure resistance. Moreover, the electrical resistivity is 3800 mΩcm or more, and the semiconductor characteristics are not satisfactory, so that it is still difficult to use it for semiconductor devices.

Further, Patent Document 2 describes a Ge-doped α-Ga ₂ O ₃ film on a c-plane sapphire substrate, and the α-Ga ₂ O ₃ film has better electrical properties than the thin film described in Patent Document 1. A thin film was obtained, but the electrical resistivity was about 190 mΩcm, which was still unsatisfactory for use in semiconductor devices.

In Non-Patent Document 2, a Sn-doped α-Ga ₂ O ₃ film is formed on a c-plane sapphire substrate and then annealed to form an annealing buffer layer. -The mobility is improved by forming a Ga ₂ O ₃ film. In addition, it was also found that the doping of Sn improves the surface roughness and crystallinity of the α-Ga ₂ O ₃ thin film and improves the mobility because Sn exerts a surfactant-like effect. However, there is a problem of high resistance or insulation due to annealing treatment, and there are still problems to be solved in using it for semiconductor devices. In addition, the obtained film still has many dislocations and is strongly affected by dislocation scattering, which poses a problem of impairing the electrical properties. Furthermore, there is also the problem of many cracks, and an industrially useful α-Ga ₂ O ₃ film has been longed for. Non-Patent Document 3 describes that when a Sn-doped α-Ga ₂ O ₃ film is formed on a c-plane sapphire substrate without using an annealing buffer layer, the resistivity is about 200 mΩcm. there is

JP 2013-028480 A JP 2015-228495 A

Kentaro Kaneko, "Growth and Physical Properties of Gallium Oxide Mixed Crystal Thin Films with Corundum Structure", Doctoral Dissertation, Kyoto University, March 2013 Kazuaki Akaiwa, "Electrical Property Control and Device Application of Gallium Oxide Semiconductors with Corundum Structure", Doctoral Dissertation, Kyoto University, March 2016 Chikoidze, E., et al. “Electrical, optical, and magnetic properties of Sn doped α―Ga2O3 thin films.”, Journal of Applied Physics 120.2 (2016): 025109.

An object of the present invention is to provide a crystalline oxide semiconductor film with excellent electrical characteristics.

As a result of intensive studies aimed at achieving the above object, the inventors of the present invention have surprisingly found that film formation using the mist CVD method under specific conditions does not require high resistance treatment or insulation treatment. In addition, even when the half-value width is, for example, 100 arcsec or more, a low-resistance crystalline oxide semiconductor film can be obtained, and the obtained crystalline oxide semiconductor film has reduced cracks. The inventors have found that the crystalline oxide semiconductor film can solve the above-described conventional problems at once.
Moreover, after obtaining the above knowledge, the inventors of the present invention completed the present invention through further studies.

Specifically, the present invention relates to the following inventions.
[1] A crystalline oxide semiconductor film containing as a main component a crystalline oxide semiconductor having a corundum structure and further containing a dopant, wherein the resistivity is 50 mΩcm or less. .
[2] The crystalline oxide semiconductor film according to [1], wherein the resistivity is 5 mΩcm or less.
[3] The crystalline oxide semiconductor film according to [1] or [2] above, wherein the main surface is an a-plane, an m-plane, or an r-plane.
[4] The crystalline oxide semiconductor film according to any one of [1] to [3], wherein the main surface is an a-plane or an m-plane.
[5] The crystalline oxide semiconductor film according to any one of [1] to [4], wherein the dopant is tin, germanium or silicon.
[6] The crystalline oxide semiconductor film according to any one of [1] to [5], wherein the dopant is tin.
[7] The crystalline oxide semiconductor film according to any one of [1] to [6], which has a mobility of 30 cm ² /Vs or more.
[8] The crystalline oxide semiconductor film according to [7] above, which has a carrier density of 1.0×10 ¹⁸ /cm ³ or more.
[9] The crystalline oxide semiconductor film according to any one of [1] to [8], wherein the crystalline oxide semiconductor contains gallium, indium, or aluminum.
[10] The crystalline oxide semiconductor film according to any one of [1] to [9], wherein the crystalline oxide semiconductor contains at least gallium.
[11] A semiconductor device including at least a semiconductor layer and an electrode, wherein the crystalline oxide semiconductor film according to any one of [1] to [10] is used as the semiconductor layer.
[12] A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device according to [11].

The crystalline oxide semiconductor film of the present invention has excellent electrical properties.

1 is a schematic configuration diagram of a film forming apparatus (mist CVD apparatus) used in Examples. FIG. It is a figure which shows typically a suitable example of a Schottky barrier diode (SBD). 1 is a diagram schematically showing a preferred example of a high electron mobility transistor (HEMT); FIG. 1 is a diagram schematically showing a preferred example of a metal oxide semiconductor field effect transistor (MOSFET); FIG. 1 is a diagram schematically showing a preferred example of a junction field effect transistor (JFET); FIG. 1 is a diagram schematically showing a preferred example of an insulated gate bipolar transistor (IGBT); FIG. It is a figure which shows typically a suitable example of a light emitting element (LED). It is a figure which shows typically a suitable example of a light emitting element (LED). 1 is a diagram schematically showing a preferred example of a power supply system; FIG. 1 is a diagram schematically showing a preferred example of a system device; FIG. FIG. 2 is a diagram schematically showing a preferred example of a power supply circuit diagram of a power supply device;

A crystalline oxide semiconductor film of the present invention contains a crystalline oxide semiconductor having a corundum structure as a main component and further contains a dopant, and is characterized by having a resistivity of 50 mΩcm or less. and In the present invention, the resistivity is preferably 10 mΩcm or less, more preferably 5 mΩcm or less. Further, the mobility of the crystalline oxide semiconductor film is preferably 30 cm ² /Vs or higher, more preferably 40 cm ² /Vs or higher, and most preferably 50 cm ² /Vs or higher. The mobility refers to the mobility obtained by Hall effect measurement. In the present invention, it is also preferable that the crystalline oxide semiconductor film has a carrier density of 1.0×10 ¹⁸ /cm ³ or more. The carrier density refers to the carrier density in the semiconductor film obtained by Hall effect measurement. In the present invention, the main surface of the crystalline oxide semiconductor film is preferably an a-plane, an m-plane, or an r-plane. It is more preferable because it can be improved. In the present invention, the crystalline oxide semiconductor preferably contains indium, gallium or aluminum, more preferably contains an InAlGaO-based semiconductor, and most preferably contains at least gallium. Note that when the crystalline oxide semiconductor is, for example, α-Ga ₂ O ₃ , the “main component” means α-Ga ₂ O at a ratio of 0.5 or more to the atomic ratio of gallium in the metal element in the film. If ₃ is included, that's fine. In the present invention, the atomic ratio of gallium in the metal elements in the film is preferably 0.7 or more, more preferably 0.8 or more. Further, the thickness of the crystalline oxide semiconductor film is not particularly limited, and may be 1 μm or less or 1 μm or more. Further, the shape and the like of the crystalline oxide semiconductor film are not particularly limited, and may be quadrangular (including square and rectangular), circular (including semicircular), and polygonal. may be The surface area of the crystalline oxide semiconductor film is not particularly limited, and is preferably 3 mm square or more, more preferably 5 mm square or more, and most preferably 50 mm or more in diameter. In the present invention, the crystalline oxide semiconductor film preferably has no cracks in the central 3 mm square region, and more preferably has no cracks in the central 5 mm square region, when the film surface is observed with an optical microscope. It is most preferable to have no cracks in the central 9.5 mm square area. Further, the crystalline oxide semiconductor film may be a single crystal film or a polycrystalline film, but is preferably a single crystal film.

Although the crystalline oxide semiconductor film contains a dopant, the dopant is not particularly limited and may be a known one. Examples of the dopant include n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, niobium, or lead, or p-type dopants. In the present invention, the dopant is preferably tin, germanium, or silicon, more preferably tin or germanium, and most preferably tin. The content of the dopant in the composition of the crystalline oxide semiconductor film is preferably 0.00001 atomic % or more, more preferably 0.00001 atomic % to 20 atomic %, and more preferably 0.0001 atomic %. Most preferred is ˜3 atomic %. With such a preferable range, the electrical characteristics of the crystalline oxide semiconductor film can be further improved.

In addition, the crystalline oxide semiconductor film preferably has a rocking curve half width of 100 arcsec or more, more preferably 300 arcsec or more, according to an X-ray diffraction method. Although the upper limit of the half-value width is not particularly limited, it is preferably 1300 arcsec, more preferably 1100 arcsec. With such a preferable half-value width, the mobility of the obtained crystalline oxide semiconductor film can be improved.
The above-mentioned "half width" means a value obtained by measuring the rocking curve half width by XRD (X-ray diffraction). In this case, the rocking curve measurement is performed on the plane of symmetry as the orientation of the measurement plane. More specifically, for example, when the low-index plane defined above is the c-plane, the diffraction peak from 006, the m-plane, the diffraction peak from 030, and the a-plane, the diffraction peak from 110 and the diffraction peak from 024 in the case of the r-plane, respectively.

Preferred methods for manufacturing the crystalline oxide semiconductor film are described below, but the present invention is not limited to these preferred methods.

As a preferred method for producing the crystalline oxide semiconductor film, for example, using a mist CVD apparatus as shown in FIG. Alternatively, a crystalline oxide semiconductor film is formed on a crystalline substrate by transporting droplets into a film formation chamber with a carrier gas (transporting step), and then thermally reacting the mist or droplets in the film formation chamber. (Film-forming step) In the method, using a crystal substrate having a corundum structure whose main surface is an a-plane or an m-plane, or using a crystal substrate having a buffer layer formed thereon and having an off-angle. and the like, in the present invention, a crystal substrate having a corundum structure whose main surface is an a-plane or an m-plane, and a crystal substrate on which a buffer layer is formed is used to improve the mobility is more improved, which is preferable. Note that the buffer layer may or may not contain a dopant.

(crystal substrate)
The crystal substrate is not particularly limited as long as it is a substrate having a corundum structure on all or part of the main surface, but a substrate having a corundum structure on all or part of the main surface on the side of the crystal growth surface and more preferably a substrate having a corundum structure on the entire main surface on the crystal growth surface side. In the present invention, the main surface is preferably an a-plane, an m-plane or an r-plane. preferable. Further, the crystal substrate may have an off-angle, and examples of the off-angle include an off-angle of 0.2° to 12.0°. Preferably the angle is between 0.2° and 6.0°, more preferably between 0.5° and 4.0° and most preferably between 0.5° and 3.0°. Here, the off-angle indicates the smaller accuracy of the angle formed by the normal vector of the main surface (surface) of the semiconductor thin film and the normal vector of the low-index surface. In the present invention, the normal vector of the main surface (surface) of the semiconductor thin film and the crystal plane (eg, c plane, a plane, m plane, r plane) defined in FIG. 1 of SEMI M65-0306 are used. The angle formed by the line vector is compared, and the plane with the smallest angle is called the low-index plane. In the present invention, when the crystal substrate has an off-angle, it is preferable that the principal plane is the m-plane. The shape of the substrate is not particularly limited as long as it has a plate shape and serves as a support for the crystalline oxide semiconductor film. The substrate may be an insulator substrate, a semiconductor substrate, or a conductive substrate, but the substrate is preferably an insulator substrate and has a metal film on its surface. A substrate is also preferred. The shape of the substrate is not particularly limited. , octagon, octagon, etc.), and various shapes can be suitably used. In the present invention, the shape of the film formed on the substrate can be set by making the shape of the substrate preferable. Further, in the present invention, a large-sized substrate can be used, and by using such a large-sized substrate, the area of the crystalline oxide semiconductor film can be increased. The substrate material of the crystal substrate is not particularly limited as long as it does not interfere with the object of the present invention, and may be a known material. The substrate material having the corundum structure, for example, preferably α-Al ₂ O ₃ (sapphire substrate) or α-Ga ₂ O ₃ , a-plane sapphire substrate, m-plane sapphire substrate, r-plane sapphire substrate and A more suitable example is an α-gallium oxide substrate (a-plane, m-plane or r-plane).

Examples of the buffer layer containing no dopant include α-Fe ₂ O ₃ , α-Ga ₂ O ₃ , α-Al ₂ O ₃ and mixed crystals thereof. In the present invention, the buffer layer is preferably α-Ga ₂ O ₃ . The stacking means of the buffer layer is not particularly limited, and may be a known stacking means, and may be the same as the deposition means of the crystalline oxide semiconductor film.

(Atomization/dropletization process)
The atomization/dropletization step atomizes or dropletizes the raw material solution. The atomization means or dropletization means for the raw material solution is not particularly limited as long as it can atomize or dropletize the raw material solution, and may be a known means, but in the present invention, ultrasonic waves are used. The atomizing means or dropletizing means used are preferred. The mist or droplets obtained using ultrasonic waves have an initial velocity of zero and are preferable because they float in the air. Since it is a possible mist, there is no damage due to collision energy, so it is very suitable. The droplet size is not particularly limited, and may be droplets of several millimeters, preferably 50 μm or less, more preferably 0.1 to 10 μm.

(raw material solution)
The raw material solution is not particularly limited as long as it is a solution from which the crystalline oxide semiconductor can be obtained by mist CVD and contains the dopant. Examples of the raw material solution include aqueous solutions of organometallic complexes of metals (eg, acetylacetonate complexes, etc.) and halides (eg, fluorides, chlorides, bromides, iodides, etc.). Any metal can be used as long as it can form a semiconductor, and examples of such metals include gallium, indium, aluminum, and iron. In the present invention, the metal preferably contains at least gallium, indium or aluminum, and more preferably contains at least gallium. The metal content in the raw material solution is not particularly limited as long as it does not hinder the object of the present invention, but is preferably 0.001 mol% to 50 mol%, more preferably 0.01 mol% to 50 mol%. is.

Moreover, the raw material solution usually contains a dopant. By including a dopant in the raw material solution, the conductivity of the crystalline oxide semiconductor film can be easily controlled without ion implantation or the like and without destroying the crystal structure. Examples of the dopant include n-type dopants such as tin, germanium, silicon or lead when the metal contains at least gallium. In the present invention, the dopant is preferably tin, germanium, or silicon, more preferably tin or germanium, and most preferably tin. The dopant concentration may generally be about 1×10 ¹⁶ /cm ³ to 1×10 ²² /cm ³ , or the dopant concentration may be set to a low concentration of, for example, about 1×10 ¹⁷ /cm ³ or less. or the dopant may be contained at a high concentration of about 1×10 ²⁰ /cm ³ or more. In the present invention, the dopant concentration is preferably 1×10 ¹⁸ /cm ³ or more.

The solvent of the raw material solution is not particularly limited, and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In the present invention, the solvent preferably contains water, more preferably water or a mixed solvent of water and alcohol, and most preferably water. More specific examples of the water include pure water, ultrapure water, tap water, well water, mineral spring water, mineral water, hot spring water, spring water, fresh water, and seawater. Ultrapure water is preferred.

(Conveyance process)
In the transporting step, the mist or the droplets are transported into the film forming chamber using a carrier gas. The carrier gas is not particularly limited as long as it does not interfere with the object of the present invention, and examples thereof include oxygen, ozone, inert gases such as nitrogen and argon, and reducing gases such as hydrogen gas and forming gas. Examples include inert gases such as oxygen, ozone, nitrogen and argon. In addition, although one type of carrier gas may be used, two or more types may be used, and a diluted gas with a reduced flow rate (for example, a 10-fold diluted gas, etc.) may be further used as a second carrier gas. good too. In addition, the carrier gas may be supplied at two or more locations instead of at one location. Although the flow rate of the carrier gas is not particularly limited, it is preferably 0.01 to 20 L/min, more preferably 1 to 10 L/min. In the case of diluent gas, the flow rate of diluent gas is preferably 0.001 to 2 L/min, more preferably 0.1 to 1 L/min.

(Film formation process)
In the film forming step, a crystalline oxide semiconductor film is formed on the substrate by thermally reacting the mist or droplets in the film forming chamber. The thermal reaction is not particularly limited as long as the mist or liquid droplets react with heat, and the reaction conditions and the like are not particularly limited as long as the objects of the present invention are not hindered. In this step, the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent, preferably at a temperature that is not too high (for example, 1000° C.), more preferably 650° C. or less, most preferably from 400° C. to 650° C. preferable. In addition, the thermal reaction may be carried out under vacuum, under a non-oxygen atmosphere, under a reducing gas atmosphere, or under an oxygen atmosphere, as long as the object of the present invention is not hindered. The reaction may be carried out under reduced pressure or under reduced pressure, but in the present invention, it is preferably carried out under atmospheric pressure. Note that the film thickness can be set by adjusting the film formation time.

The crystalline oxide semiconductor film obtained as described above not only has low resistance, but also has excellent electrical characteristics and reduced cracks, and is industrially useful. Such a crystalline oxide semiconductor film can be suitably used for semiconductor devices and the like, and is particularly useful for power devices. For example, the crystalline oxide semiconductor film is used for an n-type semiconductor layer (including an n+ type semiconductor layer and an n− type semiconductor layer) of the semiconductor device. Further, in the present invention, the crystalline oxide semiconductor film may be used as it is, or may be applied to a semiconductor device or the like after using known means such as peeling from the substrate or the like.

In addition, the semiconductor device is classified into a horizontal device in which electrodes are formed on one side of a semiconductor layer (horizontal device) and a vertical device in which electrodes are formed on both front and back sides of a semiconductor layer (vertical device). In the present invention, it can be suitably used for both horizontal and vertical devices, but it is particularly preferable to use it for vertical devices. Examples of the semiconductor device include Schottky barrier diodes (SBD), metal semiconductor field effect transistors (MESFET), high electron mobility transistors (HEMT), metal oxide semiconductor field effect transistors (MOSFET), static induction transistors ( SIT), junction field effect transistor (JFET), insulated gate bipolar transistor (IGBT) or light emitting diode (LED).

Preferred examples of applying the crystalline oxide semiconductor film of the present invention to an n-type semiconductor layer (n+ type semiconductor, n− semiconductor layer, etc.) will be described below with reference to the drawings. is not limited to the example of In the semiconductor devices exemplified below, other layers (for example, an insulator layer, a semi-insulator layer, a conductor layer, a semiconductor layer, a buffer layer, or other intermediate layers, etc.), etc., as long as the object of the present invention is not hindered. It may be included, or a buffer layer (buffer layer) and the like may be omitted as appropriate.

FIG. 2 shows an example of a Schottky barrier diode (SBD) according to the invention. The SBD of FIG. 2 includes an n− type semiconductor layer 101a, an n+ type semiconductor layer 101b, a Schottky electrode 105a and an ohmic electrode 105b.

The materials of the Schottky electrode and the ohmic electrode may be known electrode materials. Examples of the electrode materials include Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Metals such as Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd or Ag or alloys thereof, tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO ), metal oxide conductive films such as indium zinc oxide (IZO), organic conductive compounds such as polyaniline, polythiophene or polypyrrole, or mixtures and laminates thereof.

Schottky electrodes and ohmic electrodes can be formed by known means such as vacuum deposition or sputtering. More specifically, for example, when a Schottky electrode is formed using two kinds of metals, a first metal and a second metal, a layer made of the first metal and a layer made of the second metal are formed. This can be done by stacking layers and patterning the layer made of the first metal and the layer made of the second metal using a photolithography technique.

When a reverse bias is applied to the SBD of FIG. 2, a depletion layer (not shown) spreads in the n-type semiconductor layer 101a, resulting in a high withstand voltage SBD. Further, when a forward bias is applied, electrons flow from the ohmic electrode 105b to the Schottky electrode 105a. Thus, the SBD using the above semiconductor structure is excellent for high withstand voltage and large current, has a high switching speed, and is excellent in withstand voltage and reliability.

(HEMT)
FIG. 3 shows an example of a high electron mobility transistor (HEMT) according to the invention. The HEMT of FIG. 3 includes a wide bandgap n-type semiconductor layer 121a, a narrow bandgap n-type semiconductor layer 121b, an n + -type semiconductor layer 121c, a semi-insulator layer 124, a buffer layer 128, a gate electrode 125a, a source electrode 125b and It has a drain electrode 125c.

(MOSFET)
FIG. 4 shows an example in which the semiconductor device of the present invention is a MOSFET. The MOSFET in FIG. 4 is a trench MOSFET, and includes an n− type semiconductor layer 131a, n+ type semiconductor layers 131b and 131c, a gate insulating film 134, a gate electrode 135a, a source electrode 135b and a drain electrode 135c.

(JFET)
FIG. 5 includes an n− type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p type semiconductor layer 142, a gate electrode 145a, a source electrode 145b and a drain electrode 145c. A preferred example of a junction field effect transistor (JFET) is shown.

(IGBT)
FIG. 6 shows an insulator comprising an n-type semiconductor layer 151, an n− type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b and a collector electrode 155c. A preferred example of a gated bipolar transistor (IGBT) is shown.

(LED)
FIG. 7 shows an example in which the semiconductor device of the present invention is a light emitting diode (LED). The semiconductor light-emitting device of FIG. 7 has an n-type semiconductor layer 161 on a second electrode 165b, and a light-emitting layer 163 is laminated on the n-type semiconductor layer 161. As shown in FIG. A p-type semiconductor layer 162 is laminated on the light emitting layer 163 . A translucent electrode 167 that transmits light generated by the light-emitting layer 163 is provided on the p-type semiconductor layer 162 , and a first electrode 165 a is laminated on the translucent electrode 167 . The semiconductor light emitting device of FIG. 7 may be covered with a protective layer except for the electrode portion.

Examples of materials for the translucent electrode include conductive materials of oxides containing indium (In) or titanium (Ti). More specific examples include In ₂ O ₃ , ZnO, SnO ₂ , Ga ₂ O ₃ , TiO ₂ , CeO ₂ , mixed crystals of two or more of these, or doped materials thereof. A translucent electrode can be formed by providing these materials by known means such as sputtering. Moreover, after forming the translucent electrode, thermal annealing may be performed for the purpose of making the translucent electrode transparent.

According to the semiconductor light emitting device of FIG. 7, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and a current flows through the p-type semiconductor layer 162, the light emitting layer 163 and the n-type semiconductor layer 161 through both. Thus, the light emitting layer 163 emits light.

Materials for the first electrode 165a and the second electrode 165b include, for example, Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Metals such as Hf, W, Ir, Zn, In, Pd, Nd or Ag, or alloys thereof, tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), zinc indium oxide (IZO), etc. Metal oxide conductive films, organic conductive compounds such as polyaniline, polythiophene or polypyrrole, or mixtures thereof. The electrode film-forming method is not particularly limited, and includes a wet method such as a printing method, a spray method, and a coating method, a physical method such as a vacuum deposition method, a sputtering method, an ion plating method, a CVD method, and a plasma CVD method. It can be formed on the substrate according to a method appropriately selected from chemical methods such as a method, etc. in consideration of suitability with the material.

Note that another mode of the light-emitting element is shown in FIG. In the light emitting device of FIG. 8, an n-type semiconductor layer 161 is stacked on a substrate 169, and the p-type semiconductor layer 162, the light emitting layer 163, and the n-type semiconductor layer 161 are exposed by partially cutting out the n-type semiconductor layer 161. A second electrode 165b is stacked on part of the semiconductor layer exposed surface of the layer 161 .

The semiconductor device is used, for example, in a system using a power supply device. The power supply device can be manufactured by connecting the semiconductor device to a wiring pattern or the like using known means. FIG. 9 shows an example of a power supply system. FIG. 9 configures a power supply system using a plurality of power supplies and control circuits. The power supply system can be used in a system device in combination with an electronic circuit, as shown in FIG. FIG. 11 shows an example of a power supply circuit diagram of the power supply. FIG. 11 shows a power supply circuit of a power supply device consisting of a power circuit and a control circuit. DC voltage is switched at a high frequency by an inverter (configured with MOSFETs A to D), converted to AC, and then isolated and transformed by a transformer. , rectification by rectification MOSFETs (A to B), smoothing by DCL (smoothing coils L1, L2) and capacitors, and output of DC voltage. At this time, the voltage comparator compares the output voltage with the reference voltage, and the PWM control circuit controls the inverter and the rectifying MOSFET so as to obtain a desired output voltage.

EXAMPLES Examples of the present invention will be described below, but the present invention is not limited to these.

(Example 1)
1. Film Forming Apparatus A mist CVD apparatus used in this example will be described with reference to FIG. The mist CVD apparatus 19 includes a susceptor 21 on which a substrate 20 is placed, carrier gas supply means 22a for supplying carrier gas, and a flow control valve 23a for adjusting the flow rate of the carrier gas sent out from the carrier gas supply means 22a. , a carrier gas (dilution) supply means 22b for supplying a carrier gas (dilution), a flow control valve 23b for adjusting the flow rate of the carrier gas sent from the carrier gas (dilution) supply means 22b, and a raw material solution 24a. a container 25 containing water 25a; an ultrasonic oscillator 26 attached to the bottom surface of the container 25; and a heater 28 installed in the The susceptor 21 is made of quartz, and the surface on which the substrate 20 is placed is inclined from the horizontal plane. By making both the supply pipe 27 and the susceptor 21, which are the film forming chambers, out of quartz, the film formed on the substrate 20 is prevented from being contaminated with impurities originating from the apparatus.

2. Preparation of raw material solution Gallium acetylacetonate and tin (II) chloride were mixed in ultrapure water to adjust the aqueous solution so that the atomic ratio of tin to gallium was 1:0.002 and gallium was 0.05 mol/L. At this time, 1.5% by volume of hydrochloric acid was added, and this was used as the raw material solution 24a.

3. Preparing for film formation 2 above. The raw material solution 24 a obtained in 1. was accommodated in the mist generation source 24 . Next, as the substrate 20, an m-plane sapphire substrate having an α-Ga ₂ O ₃ film (non-doped) laminated as a buffer layer on the surface is placed on the susceptor 21, and the heater 28 is operated to form a film forming chamber 27. The temperature inside was raised to 460°C. Next, the flow control valves 23a and 23b are opened to supply the carrier gas from the carrier gas supply means 22a and 22b, which are carrier gas sources, into the film forming chamber 27, and the atmosphere of the film forming chamber 27 is sufficiently filled with the carrier gas. After the replacement, the carrier gas flow rate was adjusted to 1.0 L/min, and the carrier gas (diluted) flow rate was adjusted to 0.5 L/min. Nitrogen was used as a carrier gas.

4. Semiconductor Film Formation Next, the ultrasonic oscillator 26 was oscillated at 2.4 MHz, and the vibration was propagated through the water 25a to the raw material solution 24a, thereby micronizing the raw material solution 24a to generate raw material microparticles. The raw material fine particles were introduced into the film forming chamber 27 by the carrier gas, and the mist reacted in the supply pipe 27 at 460° C. under atmospheric pressure to form a semiconductor film on the substrate 20 . The film thickness was 2.5 μm, and the film formation time was 360 minutes.

(Examples 2 to 4)
A crystalline oxide semiconductor film was obtained in the same manner as in Example 1, except that an m-plane sapphire substrate having an off-angle was used as the substrate. The off angle was 0.5° in Example 2, 2.0° in Example 3, and 3.0° in Example 4. The film thicknesses of the obtained crystalline oxide semiconductor films were 3.0 μm in Example 2, 2.9 μm in Example 3, and 3.3 μm in Example 4, respectively.

(Example 5)
In order to confirm reproducibility, a crystalline oxide semiconductor film was obtained in the same manner as in Example 4. The thickness of the obtained crystalline oxide semiconductor film was 3.4 μm. The reproducibility was confirmed by the following test examples. As is clear from Table 1, good reproducibility was confirmed. In addition, it can be seen from the film thickness that the reproducibility is good.

(Example 6)
As a raw material solution, gallium bromide and tin bromide are mixed with ultrapure water, and the aqueous solution is adjusted so that the atomic ratio of tin to gallium is 1:0.08 and gallium is 0.1 mol/L. An aqueous solution containing 10% by volume of hydrobromic acid is used, and instead of an m-plane sapphire substrate having an α-Ga ₂ O ₃ film (non-doped) laminated as a buffer layer on the surface, the surface A crystalline oxide semiconductor film was obtained in the same manner as in Example 1, except that an a-plane sapphire substrate on which no buffer layer was laminated was used, and the film formation time was set to 10 minutes.

(Example 7)
Except for using an a-plane sapphire substrate having an α-Ga ₂ O ₃ film (non-doped) laminated as a buffer layer on the surface instead of the a-plane sapphire substrate having no buffer layer laminated on the surface as the substrate. A crystalline oxide semiconductor film was obtained in the same manner as in Example 6. The thickness of the obtained crystalline oxide semiconductor film was 0.3 μm.

(Example 8)
In order to confirm reproducibility, a crystalline oxide semiconductor film was obtained in the same manner as in Example 7. The thickness of the obtained crystalline oxide semiconductor film was 0.3 μm. The reproducibility was confirmed by the following test examples. As is clear from Table 1, good reproducibility was confirmed. In addition, it can be seen from the film thickness that the reproducibility is good.

(Example 9)
Instead of the m-plane sapphire substrate having an α-Ga ₂ O ₃ film (non-doped) laminated as a buffer layer on the surface, an α-Ga ₂ O ₃ film (Sn-doped) was laminated on the surface as a buffer layer. A crystalline oxide semiconductor film was obtained in the same manner as in Example 1, except that an a-plane sapphire substrate with a crystalline structure was used and the film formation time was set to 180 minutes.

(Example 10)
Except for using an a-plane sapphire substrate on which no buffer layer is laminated on the surface instead of the a-plane sapphire substrate on which the α-Ga ₂ O ₃ film (Sn-doped) is laminated as a buffer layer on the surface. obtained a crystalline oxide semiconductor film in the same manner as in Example 9. The thickness of the obtained crystalline oxide semiconductor film was 0.9 μm.

(Example 11)
As a raw material solution, gallium bromide and germanium oxide are mixed in ultrapure water, and the raw material solution is adjusted so that the atomic ratio of germanium to gallium is 1:0.01 and gallium is 0.1 mol/L. A crystalline oxide semiconductor film was obtained in the same manner as in Example 6, except that an aqueous solution containing 20% by volume of hydrobromic acid was used, and the film formation time was set to 30 minutes. .

(Example 12)
A crystalline oxide semiconductor film was obtained in the same manner as in Example 3, except that the film formation time was 720 minutes. The thickness of the obtained crystalline oxide semiconductor film was 3.8 μm.

(Example 13)
Using an r-plane sapphire substrate having an α-Ga ₂ O ₃ film (non-doped) laminated as a buffer layer on its surface instead of an a-plane sapphire substrate having no buffer layer laminated on its surface, and A crystalline oxide semiconductor film was obtained in the same manner as in Example 6, except that the film formation time was 300 minutes. The thickness of the obtained crystalline oxide semiconductor film was 5.0 μm.

(Comparative example 1)
A crystalline oxide semiconductor film was obtained in the same manner as in Example 1, except that a c-plane sapphire substrate was used as the substrate instead of the m-plane sapphire substrate.
(Comparative example 2)
Gallium bromide and germanium oxide _were mixed in ultrapure water to adjust the raw material solution so that the atomic ratio of germanium to gallium was ₁ :005; A crystalline oxide semiconductor film was obtained in the same manner as in Example 6, except that a c-plane sapphire substrate was used instead of the m-plane sapphire substrate on which the film (non-doped) was laminated.
(Comparative Example 3)
Gallium bromide and tin bromide were mixed in ultrapure water to adjust the raw material solution so that the atomic ratio of tin to gallium was 1:0.005; A crystalline oxide semiconductor film was obtained in the same manner as in Example 6, except that a c-plane sapphire substrate was used instead of the m-plane sapphire substrate on which the ₂ O ₃ film (non-doped) was laminated.

(Test example 1)
The phases of the crystalline oxide semiconductor films obtained in Examples 1 to 13 and Comparative Examples 1 to 3 were identified using an X-ray diffractometer. Identification was performed by performing a 2θ/ω scan at an angle of 15 to 95 degrees using an XRD diffractometer. The measurement was performed using CuKα rays. As a result, the crystalline oxide semiconductor films obtained in Examples 1 to 5 and Example 12 were all m-plane α-Ga ₂ O ₃ . The films obtained in Examples 6 to 11 were all a-plane α-Ga ₂ O ₃ , and the film obtained in Example 13 was r-plane α-Ga ₂ O ₃ . The films obtained in Comparative Examples 1 to 3 were all c-plane α-Ga ₂ O ₃ . The crystalline oxide semiconductor films obtained in Examples 1, 2, and 4 have a temperature of about 65 degrees, the films obtained in Examples 7 to 11 have a temperature of about 36 degrees, and the film obtained in Comparative Example 1 has a temperature of 40 degrees. Tables 1 to 3 show the results of measuring the rocking curve half-value widths at the 2θ/ω scan peak positions in the vicinity.

(Test example 2)
Hall effect measurement was performed on the crystalline oxide semiconductor films obtained in Examples 1 to 13 and Comparative Examples 1 to 3 by the van der Pauw method. Tables 1 to 3 show carrier densities, mobilities, and resistivities of the crystalline oxide semiconductor films obtained in Examples 1 to 13 and Comparative Examples 1 to 3. As can be seen from Table 1, the crystalline oxide semiconductor film of the present invention has excellent electrical characteristics, particularly low resistance.

(Test example 3)
The film surfaces of the crystalline oxide semiconductor films obtained in Examples 1 to 13 and Comparative Examples 1 to 3 were observed with an optical microscope. Observation results are shown in Tables 1 to 3, where ○ indicates that no cracks were observed in the central 3 mm square area of the film surface, and x indicates that cracks were observed in the central 3 mm square area. Tables 1 to 3 show that cracks are reduced in the crystalline oxide semiconductor films of the present invention.

(Example 14)
A crystalline oxide semiconductor film was obtained in the same manner as in Example 6, except that bisacetylacetonate silicon diisocyanate was used as the dopant raw material. As a result, it was found that the performance was equivalent to that of the crystalline oxide semiconductor film obtained in Example 1.

The crystalline oxide semiconductor film of the present invention can be used in various fields such as semiconductor devices (e.g., compound semiconductor electronic devices), electronic components/electrical equipment components, optical/electrophotographic related devices, and industrial members. It is useful for semiconductor devices and the like.

Reference Signs List 19 mist CVD device 20 substrate 21 susceptor 22a carrier gas supply means 22b carrier gas (dilution) supply means 23a flow control valve 23b flow control valve 24 mist generation source 24a raw material solution 25 container 25a water 26 ultrasonic vibrator 27 supply pipe 28 heater 29 exhaust port 101a n− type semiconductor layer 101b n+ type semiconductor layer 102 p type semiconductor layer 103 semi-insulator layer 104 insulator layer 105a Schottky electrode 105b ohmic electrode 121a wide bandgap n type semiconductor layer 121b narrow bandgap n type semiconductor layer 121c n + type semiconductor layer 123 p-type semiconductor layer 124 semi-insulator layer 125a gate electrode 125b source electrode 125c drain electrode 128 buffer layer 131a n− type semiconductor layer 131b first n + type semiconductor layer 131c second n + type Semiconductor layer 132 p-type semiconductor layer 134 gate insulating film 135a gate electrode 135b source electrode 135c drain electrode 141a n− type semiconductor layer 141b first n+ type semiconductor layer 141c second n+ type semiconductor layer 142 p-type semiconductor layer 145a gate electrode 145b source electrode 145c drain electrode 151 n-type semiconductor layer 151a n− type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 gate insulating film 155a gate electrode 155b emitter electrode 155c collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 light-emitting layer 165a first electrode 165b second electrode 167 translucent electrode 169 substrate

Claims (9)

A crystalline oxide semiconductor film containing a crystalline oxide semiconductor having a corundum structure as a main component and further containing a dopant, wherein the atomic ratio of gallium in the metal element in the crystalline oxide semiconductor film is 0.8. In the above, the main surface is an a-plane or an m _- plane _, and the forbidden band width of the crystalline oxide semiconductor is equal to or equal to the forbidden band width of Ga ₂ O ₃ A crystalline oxide semiconductor film having a resistivity of 10 mΩcm or less. 2. The crystalline oxide semiconductor film according to claim 1, wherein said resistivity is 5 mΩcm or less. 3. The crystalline oxide semiconductor film according to claim 1, wherein said dopant is tin, germanium or silicon. 4. The crystalline oxide semiconductor film according to claim 1, wherein said dopant is tin. 5. The crystalline oxide semiconductor film according to claim 1, having a mobility of 30 cm ² /Vs or more. 6. The crystalline oxide semiconductor film according to claim 5, which has a carrier density of 1.0×10 ¹⁸ /cm ³ or more. 7. The crystalline oxide semiconductor film according to claim 1, wherein said crystalline oxide semiconductor further contains indium or aluminum. A semiconductor device comprising at least a semiconductor layer and an electrode, wherein the crystalline oxide semiconductor film according to any one of claims 1 to 7 is used as the semiconductor layer. A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device according to claim 8 .

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