JP7102699B2 - Through Silicon Via Substrate and Its Manufacturing Method - Google Patents

Description

The present disclosure relates to a through silicon via substrate and a method for manufacturing the through silicon via substrate.

In recent years, integrated circuits have become finer and more complicated as the performance of integrated circuits has improved. Connection terminals are arranged in the integrated circuit, and power supplies and logic signals necessary for circuit operation are input from, for example, an external device via the connection terminals. When connecting integrated circuits with different pitches of connection terminals, an interposer serving as an intermediary board for converting the pitch size of the connection terminals is used. In the interposer, different integrated circuits are mounted on the wiring arranged on one surface of the substrate and the wiring arranged on the other surface. The wirings arranged on both sides of the interposer substrate are connected by through electrodes penetrating the substrate.

As interposers, TSV (Through-Silicon Via), which is a through electrode substrate using a silicon substrate, and TGV (Through-Glass Via), which is a through electrode substrate using a glass substrate, have been developed (for example, Patent Document 1). ). Through electrodes are formed of metal conductors to fill through holes that penetrate these substrates.

In the interposer, the adhesion of the through electrode to the inner surface of the through hole is very important. If the adhesion of the through electrode to the inner surface of the through hole is weak, the through electrode is easily detached from the through hole, and it becomes impossible to secure the electrical connection between the wirings arranged on both sides of the substrate. Patent Document 2 describes a configuration in which an adhesion layer is arranged between the inner surface of the through hole and the through electrode in order to avoid this problem.

Japanese Unexamined Patent Publication No. 2013-10347 Japanese Unexamined Patent Publication No. 2016-63114

On the other hand, as one of the applications of the interposer, since the base material can withstand high temperatures, it is expected to be applied to a device in which a thin film transistor (TFT) is formed in a subsequent process. However, if high-temperature heat treatment is performed after forming the through electrode substrate, the substrate may be destroyed due to the difference in the coefficient of thermal expansion between the through electrode (for example, copper or the like) and the substrate (for example, glass or the like).

An object of the present disclosure is to provide a highly reliable through electrode substrate and a method for manufacturing the same in view of the above circumstances.

The through electrode substrate according to an embodiment of the present disclosure is arranged on a substrate provided with a through hole penetrating a first surface and a second surface facing the first surface, and a part of an inner surface surface of the through hole. It has an adhesion layer to be formed and a through electrode that is in contact with the adhesion layer and fills the through hole.

The adhesion layer may be arranged on the first surface side or the second surface side of the inner surface surface.

The adhesion layer is arranged on the first surface side of the inner surface, and the through hole has a diameter of the first opening end on the first surface smaller than the diameter of the second opening end on the second surface. You may.

The through hole has a diameter smaller than the diameter of the first opening end and the diameter of the second opening end between the first opening end on the first surface and the second opening end on the second surface. You may.

The adhesion layer may be arranged in a range of 12% or more and 50% or less of the height of the inner side surface.

The penetrating electrode is copper, and the adhesion layer may be either zinc oxide, titanium, indium tin oxide, or zinc indium oxide.

In the semiconductor device according to the embodiment of the present disclosure, the through electrode substrate, the first integrated circuit connected to one end of the through electrode of the through electrode substrate, and one end of the through electrode of the through electrode substrate are It has a second integrated circuit connected to the other end on the opposite side.

In the method for manufacturing a through electrode substrate according to an embodiment of the present disclosure, a through hole is formed in the substrate so as to penetrate the first surface and the second surface facing the first surface, and one of the inner surfaces of the through hole. This includes forming a close contact layer on the portion, contacting the close contact layer, and forming a through electrode that fills the through hole.

The close contact layer may be formed on the first surface side or the second surface side of the inner surface surface by a sputtering method.

The adhesion layer is formed on the first surface side of the inner surface, and the through hole has a diameter of the first opening end on the first surface smaller than the diameter of the second opening end on the second surface. It may be formed.

The through hole is formed so that the diameter between the first opening end on the first surface and the second opening end on the second surface is smaller than the diameter of the first opening end and the diameter of the second opening end. You may.

The adhesion layer may be formed in a range of 12% or more and 50% or less of the height of the inner side surface.

Forming the through electrode forms a first conductor layer on the inner surface of the through hole and on the close contact layer, and forms a second conductor layer on the first conductor layer so as to fill the through hole. You may.

It is (A) top view, (B) sectional view, (C) bottom view which shows the structure of the through electrode substrate which concerns on one Embodiment of this disclosure. It is sectional drawing for demonstrating the manufacturing method of the through silicon via substrate which concerns on one Embodiment of this disclosure. It is sectional drawing for demonstrating the thermal stress applied to the through silicon via substrate which concerns on one Embodiment of this disclosure, and the thermal stress applied to the conventional through silicon via substrate. It is (A) top view, (B) sectional view, (C) bottom view which shows the structure of the through electrode substrate which concerns on one Embodiment of this disclosure. It is (A) top view, (B) sectional view, (C) bottom view which shows the structure of the through electrode substrate which concerns on one Embodiment of this disclosure. It is (A) top view, (B) sectional view, (C) bottom view which shows the structure of the through electrode substrate which concerns on one Embodiment of this disclosure. It is sectional drawing which shows the modification of the through silicon via substrate which concerns on one Embodiment of this disclosure. It is sectional drawing which shows the structure of the through silicon via substrate which concerns on one Embodiment of this disclosure. It is a figure which shows the semiconductor device which concerns on one Embodiment of this disclosure. It is a figure which shows the semiconductor device which concerns on one Embodiment of this disclosure. It is a figure which shows the semiconductor device which concerns on one Embodiment of this disclosure.

Hereinafter, the contents of the present disclosure will be described with reference to the drawings and the like. However, this disclosure includes many different aspects and is not construed as being limited to the content of the disclosures exemplified below. In order to clarify the explanation, the drawings may schematically represent the width, thickness, shape, etc. of each part as compared with the actual embodiment, but this is just an example, and the contents of the present disclosure are not necessarily the same. It is not limited. Further, in the present disclosure, when a certain element described in a certain drawing and a certain element described in another drawing have the same or corresponding relationship, a code or a number described as the same code is followed by a. , B and the like are added, and the repeated description may be omitted as appropriate. Furthermore, the letters "1st" and "2nd" for each element are convenient signs used to distinguish each element, and have no further meaning unless otherwise specified. ..

In the present disclosure, when a member or region is "above" another member or region, this is not limited to the case where it is directly above the other member or region, unless otherwise specified. Including the case where it is above. That is, it also includes the case where another component is included between the member or region above the other member or region. Similarly, if one member or region is "below" another member or region, this is not only directly below the other member or region, but also of the other member or region, unless otherwise specified. Including the case where it is below. That is, it also includes the case where another component is included between the member or region below the other member or region.

<Background to this disclosure>
In the through electrode substrate, by arranging the adhesion layer between the inner surface of the through hole and the through electrode, the adhesiveness between the substrate and the through electrode is improved. On the other hand, a penetrating electrode substrate having such a configuration has a difference in thermal expansion coefficient when the penetrating electrode (for example, copper or the like) and the substrate (for example, glass or the like) are thermally expanded or contracted by heat treatment in a later process. May cause substrate destruction.

As a result of diligent examination of the above-mentioned events, the present discloser increases the stress due to thermal expansion and contraction applied to the substrate depending on the area and position of the adhesion layer arranged between the inner surface of the through hole and the through electrode, and this thermal stress. Was found to be caused by the destruction of the substrate. As a result of investigating the conditions under which the adhesiveness between the substrate and the through electrode can be maintained and the substrate destruction during the heat treatment can be suppressed, the present application has been disclosed.

<First Embodiment>
[Construction of through silicon via substrate]
FIG. 1 is a top view of (A), a cross-sectional view of (B) AA', and a bottom view of (C) showing a configuration of a through electrode substrate according to an embodiment of the present disclosure. As shown in FIGS. 1A to 1C, the through electrode substrate 100 has a substrate 102, an adhesion layer 104, and a through electrode 106.

The substrate 102 is provided with a through hole 112 penetrating the first surface 102s1 and the second surface 102s2 facing the first surface. In the present embodiment, the through hole 112 is a circular hole and is substantially perpendicular to the first surface 102s1 and the second surface 102s2 of the substrate 102. That is, the angle θ formed by the first surface 102s1 (or the second surface 102s2) of the substrate 102 and the inner surface of the through hole 112 is substantially vertical. The diameter d1 of the first opening end on the first surface 102s1 of the through hole 112 and the diameter d2 of the second opening end on the second surface 102s2 of the through hole 112 are substantially the same.

The adhesion layer 104 is arranged on a part of the inner surface of the through hole 112. In the present embodiment, the adhesion layer 104 is arranged on the first surface 102s1 side (first opening end side) of the through hole 112. The contact layer 104 is cylindrical so as to be in contact with the inner surface of the through hole 112. That is, the adhesion layer 104 is formed so as to cover the first surface 102s1 side (first opening end side) of the inner side surface of the through hole 112. However, the present invention is not limited to this, and the adhesion layer 104 may be arranged on the second surface 102s2 side (second opening end side) of the through hole 112, and is between the first opening end and the second opening end of the through hole 112. May be placed in. The adhesion layer 104 may have any shape, may be non-uniform, or may be discontinuous as long as it is in contact with the inner surface of the through hole 112. For example, the cylinder may be cut diagonally or may be discontinuous in circumference.

In other words, a part of the inner surface of the through hole 112 has a region where the adhesion layer 104 is not arranged. In the present embodiment, the adhesion layer 104 is not arranged on the second surface 102s2 side (second opening end side) of the through hole 112. However, the present invention is not limited to this, and it is sufficient that there is a region where the adhesion layer 104 is not arranged at one end of the through hole 112.

A through electrode 106 is arranged inside the through hole 112. In the present embodiment, the through electrode 106 has a substantially cylindrical shape, and the diameter on the first surface 102s1 side and the diameter on the second surface 102s2 side are substantially the same. The through electrode 106 fills the through hole 112 from the first surface 102s1 side (first opening end) to the second surface 102s2 side (second opening end). Further, the end portion of the through electrode 106 may extend over the first surface 102s1 and the second surface 102s2 of the substrate 102. The through electrode 106 plays a role of electrically connecting the wiring on the first surface 102s1 side and the wiring on the second surface 102s2 side.

The through electrode 106 is arranged so as to be in contact with the inner side surface of the close contact layer 104 on the first surface 102s1 side (first opening end side) of the through hole 112. The through electrode 106 is arranged so as to be in contact with the inner side surface of the through hole 112 on the second surface 102s2 side (second opening end side) of the through hole 112. However, the via silicon via 106 is not limited to this, and is in direct contact with the adhesion layer 104 in the region where the adhesion layer 104 is arranged and directly in contact with the substrate 102 in the region where the adhesion layer 104 is not arranged on the inner surface of the through hole 112. In other words, the adhesion layer 104 is interposed between the substrate 102 and the through silicon via 106.

In the region where the adhesion layer 104 is arranged on the inner surface of the through hole 112, the through electrode 106 strongly adheres to the substrate 102 via the adhesion layer 104. On the other hand, in the region where the adhesion layer 104 is not arranged on the inner surface of the through hole 112, the through electrode 106 weakly adheres to the substrate 102. By having a region in which the adhesion layer 104 is arranged in a part of the through hole 112, the through electrode 106 can improve the adhesiveness with the substrate 102 and suppress the through electrode 106 from falling out of the through hole 112. can do. By having a region where the adhesion layer 104 is not arranged at one end of the through hole 112, stress due to thermal expansion / contraction of the through electrode 106 and the substrate 102 can be dispersed in the direction of one end of the through hole 112, and the substrate during heat treatment can be dispersed. Destruction can be suppressed.

The region on the inner surface of the through hole 112 where the adhesion layer 104 is arranged is the height of the inner surface of the through hole 112 (depth of the through hole 112, the inner surface of the substrate 102 from the first surface 102s1 to the second surface 102s2). It is preferable that the distance is 20% or more and 50% or less. In other words, the region on the inner surface of the through hole 112 where the adhesion layer 104 is not arranged is preferably located in a range of 50% or more and 80% or less of the height of the inner surface of the through hole 112. By locating the region where the adhesion layer 104 is arranged in a range of 20% or more of the height of the inner surface of the through hole 112, the adhesiveness between the substrate 102 and the through electrode 106 can be improved, and the through electrode 106 can be improved. Can be prevented from falling out of the through hole 112. By locating the region where the adhesion layer 104 is not arranged within a range of 50% or more of the height of the inner surface of the through hole 112, the thermal stress received by the substrate can be suppressed, and the substrate breakage during heat treatment can be suppressed. be able to.

A glass substrate can be used as the substrate 102. In addition to the glass substrate, an insulating substrate such as a quartz substrate, a sapphire substrate, or a resin substrate, a silicon substrate, a silicon carbide substrate, or a semiconductor substrate such as a compound semiconductor substrate can be used. The material used for the substrate is not particularly limited, and any material having a coefficient of thermal expansion in the range of 0.5 × 10 ^-6 [/ K] or more and 16.8 × 10 ^-6 [/ K] or less may be used. Further, these may be laminated. The thickness of the substrate 102 is not particularly limited, and for example, a substrate having a thickness in the range of 300 μm or more and 700 μm or less can be used. The thickness of the substrate 102 is more preferably in the range of 400 μm or more and 500 μm or less. If the thickness of the substrate 102 is less than 300 μm, the deflection of the substrate becomes large. As a result, handling in the manufacturing process becomes difficult, and the substrate warps due to the internal stress of the thin film or the like formed on the substrate. Further, when the thickness of the substrate 102 is thicker than 700 μm, the step of forming the through hole becomes long. As a result, the manufacturing process becomes longer and the manufacturing cost also rises.

The diameter d1 of the first opening end and the diameter d2 of the second opening end are preferably in the range of 50 μm or more and 160 μm or less. That is, the aspect ratio of the through hole 112 is preferably in the range of 1.8 or more and 10 or less. Here, the aspect ratio of the through hole 112 is defined as the depth of the through hole 112 (thickness of the substrate 102) with respect to the diameter d1 (or the diameter d2 of the second opening end) of the first opening end of the through hole 112. When the aspect ratio of the through hole 112 is larger than 10, when the seed layer 106'described later is formed, the seed layer 106'is used on the inner surface of the through hole 112 by a sputtering method over the entire depth of the through hole 112. Becomes difficult to form. When the aspect ratio of the through hole 112 is less than 1.8, the process of forming the through hole becomes long. As a result, the manufacturing process becomes longer and the manufacturing cost also rises.

For the adhesion layer 104, a material having good adhesion to the substrate 102 can be used. For example, titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or alloys thereof can be used. .. In addition to inorganic oxides such as indium tin oxide (ITO), zinc oxide (IZO), zinc oxide (ZnO), and tin oxide (SnO ₂₎ , organic substances such as silane coupling agents can also be used. In particular, when the through electrode 106 contains copper (Cu), a material that suppresses the diffusion of Cu can be used for the adhesion layer 104, for example, titanium nitride (TiN), molybdenum nitride (MoN), and tantalum nitride (TaN). ) Etc. may be used. Here, the thickness of the adhesion layer 104 is not particularly limited. For example, it can be appropriately selected in the range of 5 nm or more and 300 nm or less.

For the through electrode 106, a conductive material having good adhesion to the adhesion layer 104 and high electrical conductivity can be used. For example, metals such as copper (Cu), gold (Au), silver (Ag), platinum (Pt), iron (Fe), tin (Sn), zinc (Zn), nickel (Ni), chromium (Cr) or It can be selected from alloys using these. Through electrodes 106 are arranged so as to fill the inside of the through holes 112. That is, no void or the like is formed inside the through hole 112, and the space inside the through hole 112 is filled with the close contact layer 104 and the through electrode 106.

As described above, the through electrode substrate 100 according to the present embodiment has a region in which the adhesion layer 104 is arranged in a part of the through hole 112. By arranging the close contact layer 104 in a part between the substrate 102 and the through electrode 106, the through electrode 106 can improve the adhesiveness with the substrate 102, and the through electrode 106 falls off from the through hole 112. Can be suppressed. The through electrode substrate 100 according to the present embodiment has a region in which the adhesion layer 104 is not arranged at one end of the through hole 112, so that the stress due to thermal expansion and contraction of the through electrode 106 and the substrate 102 is applied to the one end direction of the through hole 112. It is possible to disperse in the substrate and suppress substrate breakage during heat treatment. Therefore, a highly reliable through electrode substrate can be obtained.

[Manufacturing method of through silicon via substrate]
Next, a method for manufacturing the through silicon via substrate according to the embodiment of the present disclosure will be described in detail with reference to FIG. FIG. 2 is a cross-sectional view for explaining a method of manufacturing a through electrode substrate according to an embodiment of the present disclosure.

FIG. 2A is a diagram showing a method of forming a through hole 112 in the substrate 102. The substrate 102 has a first surface 102s1 and a second surface 102s2 facing the first surface. At least one through hole 112 penetrating the first surface 102s1 to the second surface 102s2 is formed on the substrate 102. For the formation of the through hole 112, a corresponding mask is formed, and dry etching processing such as RIE (Reactive Ion Etching) and DRIE (Deep Reactive Ion Etching), sandblasting, and laser processing are performed. Etc. can be used. Here, the angle θ formed by the first surface 102s1 (or the second surface 102s2) of the substrate 102 and the inner surface of the through hole 112 is substantially vertical. Further, the diameter d1 of the first opening end on the first surface 102s1 of the through hole 112 and the diameter d2 of the second opening end on the second surface 102s2 of the through hole 112 are substantially the same.

FIG. 2B is a diagram showing a method of forming the adhesion layer 104 in the through hole 112. The adhesion layer 104 is formed from the first surface 102s1 side of the substrate 102 along the inner surface of the through hole 112 by the PVD method (vacuum deposition method or sputtering method). In the present embodiment, the adhesion layer 104 is formed by sputtering or depositing material particles from a direction substantially perpendicular to the substrate 102 toward the first opening end of the through hole 112. Therefore, the adhesion layer 104 is continuously formed in the vicinity of the opening end so as to cover the first surface 102s1 side and the first surface 102s1 of the inner surface of the through hole 112. However, the adhesion layer 104 may be formed by sputtering or vapor-depositing material particles from one direction having an angle with respect to the substrate 102 toward the first opening end of the through hole 112. In this case, the adhesion layer 104 is formed on a part of the inner surface of the through hole 112 on the first surface 102s1 side and on the first surface 102s1. Further, as shown in the figure, the thickness of the adhesion layer 104 may change in the depth direction of the through hole 112. That is, the adhesion layer 104 may be formed so as to become thinner from the first opening end to the second opening end of the through hole 112. The adhesion layer 104 is formed in a region located in a range of 20% or more and 50% or less of the height of the inner surface of the through hole 112. The thickness of the adhesion layer 104 has a thickness of 5 nm or more and 300 nm or less, for example, 50 nm.

2 (C) to 2 (E) are views showing a method of forming the through electrode 106 in the through hole 112. As shown in FIG. 2C, first, a seed layer (first conductor layer) 106'is formed in the through hole 112. The seed layer 106'is formed in contact with the adhesion layer 104 and the substrate 102 by a PVD method (vacuum deposition method or sputtering method) or an electroless plating method. In the case of the PVD method, the seed layer 106'is formed from the respective surface sides of the first surface 102s1 and the second surface 102s2 along the inner surface of the through hole 112, the first surface 102s1, and the second surface 102s2. In the case of the electroless plating method, the seed layer 106'is in contact with the plating solution by, for example, bringing a plating solution containing at least copper ions into contact with the inner side surface of the through hole 112, the first surface 102s1 and the second surface 102s2. A plating layer is grown in the area. The plating solution may contain, for example, a copper compound such as copper sulfate to provide copper ions, as well as additives such as formaldehyde and sodium hydroxide.

However, the present invention is not limited to this, and the first surface 102s1 and the second surface 102s2 of the substrate 102 may be protected in advance with a resist or the like so that the seed layer 106'is not formed. In this case, the seed layer 106'is formed on the adhesion layer 104 formed on the inner surface of the through hole 112 and the inner surface of the through hole 112. By performing such a process, it is possible to prevent an extra metal conductor from being formed on the first surface 102s1 and the second surface 102s2 of the substrate 102.

As shown in FIG. 2D, the through hole 112 is then filled with a plating layer (second conductor layer). The plating layer is grown inside the through hole 112 by an electrolytic plating method in which an electric current is supplied through the seed layer 106'.

As shown in FIG. 2E, through silicon via 106 is removed by removing excess metal conductors (seed layer 106'and plating layer) formed on the first surface 102s1 and the second surface 102s2 of the substrate 102. To form. As a method for removing the excess metal conductor (seed layer 106'and the plating layer), a dry etching method, a wet etching method, or chemical mechanical polishing (CMP) can be used. The metal conductor (seed layer 106'and the plating layer) is removed so as to expose the first surface 102s1 and the second surface 102s2 of the substrate 102. In the present embodiment, both ends of the through electrode 106 on the first surface 102s1 side and the second surface 102s2 side are formed so as to be flush with the first surface 102s1 and the second surface 102s2. However, the present invention is not limited to this, and both ends of the through electrode 106 may be formed to have a concave shape with respect to the first surface 102s1 and the second surface 102s2, or may be formed to have a convex shape. At this time, the wiring layer may be formed on the first surface 102s1 and the second surface 102s2 in the same process as the formation of the through electrode 106.

The substrate 102 may be provided with a plurality of through electrodes 106. In this case, the plurality of through electrodes 106 are preferably arranged at intervals of 100 μm or more. The through electrodes 106 provided on the substrate 102 are electrically connected to the wirings arranged on the first surface 102s1 side and the second surface 102s2 side of the substrate 102, which will be described later, and are electrically connected to the first surface 102s1 side and the second surface 102s2 side of the substrate 102. A conductive path is formed between the 102s2 side and the side.

As described above, according to the method for manufacturing the through electrode substrate 100 according to the present embodiment, the adhesion layer 104 can be formed in a part of the through holes 112. By forming the adhesion layer 104 in a part between the substrate 102 and the through electrode 106, the through electrode 106 can improve the adhesiveness with the substrate 102, and the through electrode 106 falls off from the through hole 112. Can be suppressed. In the through electrode substrate 100 according to the present embodiment, since the adhesion layer 104 is not formed at one end of the through hole 112, the stress due to thermal expansion and contraction of the through electrode 106 and the substrate 102 is dispersed in the direction of one end of the through hole 112. It is possible to suppress substrate breakage during heat treatment. Therefore, a highly reliable through electrode substrate can be obtained.

[Thermal stress on the through silicon via substrate]
Next, with reference to FIG. 3, the thermal stress applied to the through silicon via substrate according to the embodiment of the present disclosure and the thermal stress applied to the conventional through silicon via substrate will be described in detail. FIG. 3A is a cross-sectional view for explaining the thermal stress applied to the through silicon via substrate according to the embodiment of the present disclosure. FIG. 3B is a cross-sectional view for explaining the thermal stress applied to the conventional through silicon via substrate.

As shown in FIG. 3A, the through electrode substrate 100 according to the present embodiment has a region on the second surface 102s2 side (second opening end side) of the through hole 112 where the adhesion layer 104 is not arranged. By not interposing the adhesion layer 104 between the substrate 102 and the through electrode 106 in the region where the adhesion layer 104 is not arranged, the through electrode 106 and the substrate 102 are partially and weakly adhered to each other. Since the coefficient of thermal expansion of the through electrode 106 and the substrate 102 are different, the through electrode substrate 100 receives stress due to thermal expansion and contraction of the through electrode 106 and the substrate 102 by heat treatment. The through electrode substrate 100 according to the present embodiment can disperse thermal stress in the direction of the second surface 102s2 (second opening end) of the through hole 112 in which the through electrode 106 and the substrate 102 are weakly adhered to each other, and is heat-treated. Substrate destruction at times can be suppressed. Therefore, a highly reliable through electrode substrate can be obtained.

As shown in FIG. 3B, in the conventional through electrode substrate 100a, the adhesion layer 104a is arranged on the entire inner surface of the through hole 112a. By interposing the adhesion layer 104a between the substrate 102a and the through electrode 106a, the through electrode 106a and the substrate 102a are strongly adhered to each other on the entire inner surface of the through hole 112a. In the conventional through electrode substrate 100a, stress during heat treatment is applied to the entire inner surface of the through hole 112a. As a result, the conventional through silicon via substrate 100a may be destroyed by the heat treatment. In particular, the substrate 102a having a lower rigidity may be cracked or broken.

<Second Embodiment>
[Construction of through silicon via substrate]
FIG. 4 is a top view (A), a cross-sectional view (B) BB', and a bottom view (C) showing the configuration of the through silicon via substrate according to the embodiment of the present disclosure. As shown in FIGS. 4A to 4C, the through electrode substrate 100b has a substrate 102b, an adhesion layer 104b, and a through electrode 106b. Since the through electrode substrate 100b according to the present embodiment is the same as the through electrode substrate 100 according to the first embodiment except that the through electrode 106b has a truncated cone shape, the through electrode substrate 100b according to the first embodiment is described here. A part different from the substrate 100 will be described.

The substrate 102b is provided with a through hole 112b that penetrates the first surface 102bs1 and the second surface 102bs2 facing the first surface. In the present embodiment, the through hole 112b is a circular hole, and the angle θ formed by the first surface 102bs1 of the substrate 102b and the inner surface of the through hole 112b is an acute angle. The angle θ formed by the first surface 102bs1 of the substrate 102b and the inner surface of the through hole 112b is preferably in the range of 80 ° or more and less than 90 °. Therefore, the diameter d1b of the first opening end on the first surface 102bs1 of the through hole 112b is smaller than the diameter d2b of the second opening end on the second surface 102bs2 of the through hole 112b. When the angle θ formed by the first surface 102bs1 of the substrate 102b and the inner surface of the through hole 112b is less than 80 °, it becomes difficult to form a fine pattern on the through electrode substrate 100b.

An adhesion layer 104b is arranged on a part of the inner surface of the through hole 112b. In the present embodiment, the adhesion layer 104b is arranged on the first surface 102bs1 side (first opening end side) of the through hole 112b. The adhesion layer 104b is formed so as to cover the first surface 102bs1 side (first opening end side) of the inner surface of the through hole 112b so as to be in contact with the inner surface of the through hole 112b. However, the present invention is not limited to this, and the adhesion layer 104b may be arranged between the first opening end and the second opening end of the through hole 112b. The contact layer 104b may have any shape, may be non-uniform, or may be discontinuous as long as it is in contact with the inner surface of the through hole 112b. For example, the inner side surface of the through hole 112b may be cut diagonally, or may be discontinuous in the circumference.

In other words, a part of the inner surface of the through hole 112b has a region where the adhesion layer 104b is not arranged. In the present embodiment, the adhesion layer 104b is not arranged on the second surface 102bs2 side (second opening end side) of the through hole 112b.

A through electrode 106b is arranged inside the through hole 112b. In the present embodiment, the through electrode 106b has a substantially truncated cone shape, and the diameter on the first surface 102bs1 side is smaller than the diameter on the second surface 102bs2 side. The through electrode 106b fills the through hole 112b from the first surface 102bs1 side (first opening end) to the second surface 102bs2 side (second opening end). Further, the end portion of the through electrode 106b may extend over the first surface 102bs1 and the second surface 102bs2 of the substrate 102b. The through electrode 106b plays a role of electrically connecting the wiring on the first surface 102bs1 side and the wiring on the second surface 102bs2 side.

The through electrode 106b is arranged so as to be in contact with the inner side surface of the close contact layer 104b on the first surface 102bs1 side (first opening end side) of the through hole 112b. The through electrode 106b is arranged so as to be in contact with the inner side surface of the through hole 112b on the second surface 102bs2 side (second opening end side) of the through hole 112b. However, the via silicon via 106b is not limited to this, and is in direct contact with the adhesion layer 104b in the region where the adhesion layer 104b is arranged and directly in contact with the substrate 102b in the region where the adhesion layer 104b is not arranged on the inner surface of the through hole 112b. In other words, the adhesion layer 104b is interposed between the substrate 102b and the through silicon via 106b.

In the region where the adhesion layer 104b is arranged on the inner surface of the through hole 112b, the through electrode 106b strongly adheres to the substrate 102b via the adhesion layer 104b. On the other hand, in the region where the adhesion layer 104b is not arranged on the inner surface of the through hole 112b, the through electrode 106b is weakly adhered to the substrate 102b. By having a region in which the adhesion layer 104b is arranged in a part of the through hole 112b, the through electrode 106b can improve the adhesiveness with the substrate 102b and suppress the through electrode 106b from falling out from the through hole 112b. can do. By having a region where the adhesion layer 104b is not arranged on the second surface 102bs2 side (second opening end side) of the through hole 112b having a large diameter, the stress due to thermal expansion / contraction of the through electrode 106b and the substrate 102b is applied to the through hole 112b. It is possible to disperse in the direction of the second surface 102bs2 (second opening end) of the above, and it is possible to further suppress substrate destruction during heat treatment.

The region on the inner surface of the through hole 112b where the adhesion layer 104b is arranged is preferably located in a range of 12% or more and less than 50% of the height of the inner surface of the through hole 112b. In other words, the region on the inner surface of the through hole 112b where the adhesion layer 104b is not arranged is preferably located in a range of 50% or more and 88% or less of the height of the inner surface of the through hole 112b. By locating the region where the adhesion layer 104b is arranged in a range of 12% or more of the height of the inner surface of the through hole 112b, the adhesiveness between the substrate 102b and the through electrode 106b can be improved, and the through electrode 106b can be improved. Can be prevented from falling out of the through hole 112b. By locating the region where the adhesion layer 104b is not arranged within a range of 50% or more of the height of the inner surface of the through hole 112b, the thermal stress received by the substrate can be suppressed, and the substrate breakage during heat treatment can be suppressed. be able to.

As described above, the through electrode substrate 100b according to the present embodiment has a region in which the adhesion layer 104b is arranged in a part of the through hole 112b. By arranging the close contact layer 104b in a part between the substrate 102b and the through electrode 106b, the through electrode 106b can improve the adhesiveness with the substrate 102b, and the through electrode 106b falls off from the through hole 112b. Can be suppressed. The through electrode substrate 100b according to the present embodiment has a region on the second surface 102bs2 side (second opening end side) of the through hole 112b having a large diameter, so that the through electrode 106b and the substrate 102b are not arranged. The stress due to thermal expansion and contraction can be dispersed in the direction of the second surface 102bs2 (second opening end) of the through hole 112b, and substrate destruction during heat treatment can be further suppressed. Therefore, a highly reliable through electrode substrate can be obtained.

[Manufacturing method of through silicon via substrate]
The method for manufacturing the through silicon via substrate 100b according to the embodiment of the present disclosure is the penetration according to the first embodiment, except that the diameter d1b of the first opening end of the through hole 112b is formed to be smaller than the diameter d2b of the second opening end. The method is the same as that for manufacturing the electrode substrate 100, and the description thereof is omitted here.

<Third Embodiment>
[Construction of through silicon via substrate]
5A and 5B are a top view of (A), a cross-sectional view of (B) CC', and a bottom view of (C) showing the configuration of the through silicon via substrate according to the embodiment of the present disclosure. As shown in FIGS. 5A to 5C, the through electrode substrate 100c has a substrate 102c, an adhesion layer 104c, and a through electrode 106c. The through electrode substrate 100c according to the present embodiment is the same as the through electrode substrate 100 according to the first embodiment, except that the through electrode 106c has a diameter smaller than both ends between the first surface 102cs1 side and the second surface 102cs2 side. Therefore, here, a portion different from the through electrode substrate 100 according to the first embodiment will be described.

The substrate 102c is provided with a through hole 112c that penetrates the first surface 102cs1 and the second surface 102cs2 facing the first surface. In the present embodiment, the through hole 112c is a circular hole, and the inner side surface is a rotating hyperboloid. The angle θ formed by the first surface 102cs1 (or the second surface 102cs2) of the substrate 102c and the tangent line of the inner surface of the through hole 112c is an obtuse angle. The angle θ formed by the first surface 102cs1 of the substrate 102c and the inner surface of the through hole 112c is preferably in the range of 105 ° or less, which is larger than 90 °. When the angle θ formed by the first surface 102cs1 of the c substrate 102c and the inner surface of the through hole 112c is larger than 105 °, it becomes difficult to form a fine pattern on the through electrode substrate 100c. The diameter d1c of the first opening end on the first surface 102cs1 of the through hole 112c and the diameter d2c of the second opening end on the second surface 102cs2 of the through hole 112c are substantially the same. Further, the through hole 112c has a diameter d1c of the first opening end and a diameter d3c smaller than the diameter d2c of the second opening end between the first opening end and the second opening end. The through hole 112c has a diameter d1c of the first opening end and a diameter d3c smaller than the diameter d2c of the second opening end between the first opening end and the second opening end, so that the through electrode 106c falls off from the through hole 112c. Can be suppressed.

A close contact layer 104c is arranged on a part of the inner surface of the through hole 112c. In the present embodiment, the adhesion layer 104c is arranged on the first surface 102cs1 side (first opening end side) of the through hole 112c. The adhesion layer 104c is formed so as to cover the first surface 102cs1 side (first opening end side) of the inner side surface of the through hole 112c so as to be in contact with the inner side surface of the through hole 112c. However, the present invention is not limited to this, and the adhesion layer 104c may be arranged on the second surface 102cs2 side (second opening end side) of the through hole 112c, and as will be described later, the first opening end and the second opening end of the through hole 112c. It may be placed between the open ends. The contact layer 104c may have any shape, may be non-uniform, or may be discontinuous as long as it is in contact with the inner surface of the through hole 112c. For example, the inner side surface of the through hole 112c may be cut diagonally, or may be discontinuous in the circumference.

In other words, a part of the inner surface of the through hole 112c has a region where the adhesion layer 104c is not arranged. In the present embodiment, the adhesion layer 104c is not arranged on the second surface 102cs2 side (second opening end side) of the through hole 112c. However, the present invention is not limited to this, and it is sufficient that there is a region where the adhesion layer 104c is not arranged at one end of the through hole 112c.

A through electrode 106c is arranged inside the through hole 112c. In the present embodiment, the diameter of the through electrode 106c on the first surface 102cs1 side and the diameter on the second surface 102cs2 side are substantially the same. Further, the through electrode 106c has a diameter smaller than both ends between the first surface 102cs1 side and the second surface 102cs2 side. The through electrode 106c fills the through hole 112c from the first surface 102cs1 side (first opening end) to the second surface 102cs2 side (second opening end). Further, the end portion of the through electrode 106c may extend over the first surface 102cs1 and the second surface 102cs2 of the substrate 102c. The through electrode 106c plays a role of electrically connecting the wiring on the first surface 102cs1 side and the wiring on the second surface 102cs2 side.

The through electrode 106c is arranged so as to be in contact with the inner side surface of the close contact layer 104c on the first surface 102cs1 side (first opening end side) of the through hole 112c. The through electrode 106c is arranged so as to be in contact with the inner side surface of the through hole 112c on the second surface 102cs2 side (second opening end side) of the through hole 112c. However, the via silicon via 106c is not limited to this, and is in direct contact with the adhesion layer 104c in the region where the adhesion layer 104c is arranged and directly in contact with the substrate 102c in the region where the adhesion layer 104c is not arranged on the inner surface of the through hole 112c. In other words, the adhesion layer 104c is interposed between the substrate 102c and the through silicon via 106c.

In the region where the adhesion layer 104c is arranged on the inner surface of the through hole 112c, the through electrode 106c strongly adheres to the substrate 102c via the adhesion layer 104c. On the other hand, in the region where the adhesion layer 104c is not arranged on the inner surface of the through hole 112c, the through electrode 106c is weakly adhered to the substrate 102c. By having a region in which the adhesion layer 104c is arranged in a part of the through hole 112c, the through electrode 106c can improve the adhesiveness with the substrate 102c and suppress the through electrode 106c from falling out from the through hole 112c. can do. By having a region where the adhesion layer 104c is not arranged at one end of the through hole 112c, the stress due to thermal expansion and contraction of the through electrode 106c and the substrate 102c can be dispersed in the direction of one end of the through hole 112c, and the substrate during heat treatment can be dispersed. Destruction can be suppressed.

The region where the adhesion layer 104c is arranged on the inner surface of the through hole 112c is preferably located in a range of 16% or more and 50% or less of the height of the inner surface of the through hole 112c. In other words, the region on the inner surface of the through hole 112c where the adhesion layer 104c is not arranged is preferably located in a range of 50% or more and 84% or less of the height of the inner surface of the through hole 112c. By locating the region where the adhesion layer 104c is arranged in a range of 16% or more of the height of the inner surface of the through hole 112c, the adhesiveness between the substrate 102c and the through electrode 106c can be improved, and the through electrode 106c can be improved. Can be prevented from falling out of the through hole 112c. By locating the region where the adhesion layer 104c is not arranged within a range of 50% or more of the height of the inner surface of the through hole 112c, the thermal stress received by the substrate can be suppressed, and the substrate breakage during heat treatment can be suppressed. be able to.

As described above, the through electrode substrate 100c according to the present embodiment has a region in which the adhesion layer 104c is arranged in a part of the through hole 112c. By arranging the close contact layer 104c in a part between the substrate 102c and the through electrode 106c, the through electrode 106c can further improve the adhesiveness with the substrate 102c, and the through electrode 106c falls off from the through hole 112c. It can be suppressed more. The through electrode substrate 100c according to the present embodiment has a region in which the adhesion layer 104c is not arranged at one end of the through hole 112c, so that the stress due to thermal expansion / contraction of the through electrode 106c and the substrate 102c is applied to the one end direction of the through hole 112c. It is possible to disperse in the substrate and suppress substrate breakage during heat treatment. Therefore, a highly reliable through electrode substrate can be obtained.

[Manufacturing method of through silicon via substrate]
In the method for manufacturing the through electrode substrate 100c according to the embodiment of the present disclosure, the diameter d3c between the first opening end and the second opening end of the through hole 112c is set to the diameter d1c of the first opening end and the diameter d1c of the second opening end. The method is the same as that of the through silicon via substrate 100 according to the first embodiment except that the diameter is smaller than d2c, and the description thereof is omitted here.

<Fourth Embodiment>
[Construction of through silicon via substrate]
6A and 6B are a top view of (A), a cross-sectional view of (B) DD', and a bottom view of (C) showing the configuration of the through silicon via substrate according to the embodiment of the present disclosure. As shown in FIGS. 5A to 5C, the through electrode substrate 100d has a substrate 102d, an adhesion layer 104d, and a through electrode 106d. The through electrode substrate 100d according to the present embodiment is the same as the through electrode substrate 100c according to the third embodiment, except that the diameter of the through electrode 106d on the first surface 102ds1 side is smaller than the diameter on the second surface 102ds2 side. Here, a portion different from the through silicon via substrate 100c according to the third embodiment will be described.

The substrate 102d is provided with a through hole 112d penetrating the first surface 102ds1 and the second surface 102ds2 facing the first surface. In the present embodiment, the through hole 112d is a circular hole, and the inner side surface is a rotating hyperboloid. The angle θ1 formed by the tangent line of the first surface 102ds1 of the substrate 102d and the inner surface of the first surface 102ds1 side of the through hole 112d is an obtuse angle. The angle θ2 formed by the tangent line of the second surface 102ds2 of the substrate 102d and the inner surface of the second surface 102ds2 side of the through hole 112d is an obtuse angle. The angle θ1 formed by the tangent line of the first surface 102ds1 and the inner surface of the first surface 102ds1 side of the through hole 112d is smaller than the angle θ2 formed by the tangent line of the second surface 102ds2 and the inner surface of the second surface 102ds2 side of the through hole 112d. Alternatively, they may be the same (θ1 ≦ θ2). The angle θ1 formed by the first surface 102ds1 of the substrate 102d and the inner surface of the through hole 112d is preferably in the range of 105 ° or less, which is larger than 90 °. The angle θ2 formed by the second surface 102ds2 of the substrate 102d and the inner surface of the through hole 112d is preferably in the range of more than 90 ° and 110 ° or less. When θ1 and θ2 are larger than 110 °, it becomes difficult to form a fine pattern on the through silicon via substrate 100d. The diameter d1d of the first opening end on the first surface 102ds1 of the through hole 112d is smaller than the diameter d2d of the second opening end on the second surface 102ds2 of the through hole 112d. Further, the through hole 112d has a diameter d1d of the first opening end and a diameter d3d smaller than the diameter d2d of the second opening end between the first opening end and the second opening end. The through hole 112d has a diameter d1d of the first opening end and a diameter d3d smaller than the diameter d2d of the second opening end between the first opening end and the second opening end, so that the through electrode 106d falls off from the through hole 112d. Can be suppressed.

A close contact layer 104d is arranged on a part of the inner surface of the through hole 112d. In the present embodiment, the adhesion layer 104d is arranged on the first surface 102ds1 side (first opening end side) of the through hole 112d. The adhesion layer 104d is formed so as to cover the first surface 102ds1 side (first opening end side) of the inner side surface of the through hole 112d so as to be in contact with the inner side surface of the through hole 112d. However, the present invention is not limited to this, and the adhesion layer 104d may be arranged between the first opening end and the second opening end of the through hole 112d as described later. The contact layer 104d may have any shape, may be non-uniform, or may be discontinuous as long as it is in contact with the inner surface of the through hole 112d. For example, the inner side surface of the through hole 112d may be cut diagonally, or may be discontinuous in the circumference.

In other words, a part of the inner surface of the through hole 112d has a region where the adhesion layer 104d is not arranged. In the present embodiment, the adhesion layer 104d is not arranged on the second surface 102ds2 side (second opening end side) of the through hole 112d.

A through electrode 106d is arranged inside the through hole 112d. In the present embodiment, the diameter of the through electrode 106d on the first surface 102ds1 side is smaller than the diameter on the second surface 102ds2 side. Further, the through electrode 106d has a diameter smaller than both ends between the first surface 102ds1 side and the second surface 102ds2 side. The through electrode 106d fills the through hole 112d from the first surface 102ds1 side (first opening end) to the second surface 102ds2 side (second opening end). Further, the end portion of the through electrode 106d may extend over the first surface 102ds1 and the second surface 102ds2 of the substrate 102d. The through electrode 106d plays a role of electrically connecting the wiring on the first surface 102ds1 side and the wiring on the second surface 102ds2 side.

The through electrode 106d is arranged so as to be in contact with the inner side surface of the close contact layer 104d on the first surface 102ds1 side (first opening end side) of the through hole 112d. The through electrode 106d is arranged so as to be in contact with the inner side surface of the through hole 112d on the second surface 102ds2 side (second opening end side) of the through hole 112d. However, the via silicon via 106d is not limited to this, and is in direct contact with the adhesion layer 104d in the region where the adhesion layer 104d is arranged and directly in contact with the substrate 102d in the region where the adhesion layer 104d is not arranged on the inner surface of the through hole 112d. In other words, the adhesion layer 104d is interposed between the substrate 102d and the through silicon via 106d.

In the region where the adhesion layer 104d is arranged on the inner surface of the through hole 112d, the through electrode 106d strongly adheres to the substrate 102d via the adhesion layer 104d. On the other hand, in the region where the adhesion layer 104d is not arranged on the inner surface of the through hole 112d, the through electrode 106d adheres weakly to the substrate 102d. By having a region in which the adhesion layer 104d is arranged in a part of the through hole 112d, the through electrode 106d can improve the adhesiveness with the substrate 102d and suppress the through electrode 106d from falling out from the through hole 112d. can do. By having a region where the adhesion layer 104d is not arranged on the second surface 102ds2 side (second opening end side) of the through hole 112d having a large diameter, the stress due to thermal expansion / contraction of the through electrode 106d and the substrate 102d is applied to the through hole 112d. It can be dispersed depending on the direction of one end of the substrate, and the destruction of the substrate during the heat treatment can be further suppressed.

The region where the adhesion layer 104d is arranged on the inner surface of the through hole 112d is preferably located in a range of 24% or more and 50% or less of the height of the inner surface of the through hole 112d. In other words, the region on the inner surface of the through hole 112d where the adhesion layer 104d is not arranged is preferably located in a range of 50% or more and 76% or less of the height of the inner surface of the through hole 112d. By locating the region where the adhesion layer 104d is arranged in a range of 24% or more of the height of the inner surface of the through hole 112d, the adhesiveness between the substrate 102d and the through electrode 106d can be improved, and the through electrode 106d can be improved. Can be prevented from falling out of the through hole 112d. By locating the region where the adhesion layer 104d is not arranged within a range of 76% or more of the height of the inner surface of the through hole 112d, the thermal stress received by the substrate can be suppressed, and the substrate breakage during heat treatment can be suppressed. be able to.

As described above, the through electrode substrate 100d according to the present embodiment has a region in which the adhesion layer 104d is arranged in a part of the through hole 112d. By arranging the close contact layer 104d in a part between the substrate 102d and the through electrode 106d, the through electrode 106d can further improve the adhesiveness with the substrate 102d, and the through electrode 106d falls off from the through hole 112d. It can be suppressed more. The through electrode substrate 100d according to the present embodiment has a region on the second surface 102ds2 side (second opening end side) of the through hole 112d having a large diameter in which the adhesion layer 104d is not arranged. The stress due to thermal expansion and contraction can be dispersed in the direction of the second surface 102ds2 (second opening end) of the through hole 112d, and substrate destruction during heat treatment can be further suppressed. Therefore, a highly reliable through electrode substrate can be obtained.

[Manufacturing method of through silicon via substrate]
The method for manufacturing the through silicon via substrate 100d according to the embodiment of the present disclosure is the penetration according to the third embodiment, except that the diameter d1d of the first opening end of the through hole 112d is formed to be smaller than the diameter d2d of the second opening end. The method is the same as that for manufacturing the electrode substrate 100c, and the description thereof is omitted here.

<Modification example 1>
[Construction of through silicon via substrate]
7 (A) to 7 (C) are cross-sectional views showing a modified example of the through silicon via substrate according to the embodiment of the present disclosure. FIG. 7A is a cross-sectional view showing a modified example of the through silicon via substrate according to the second embodiment of the present disclosure. FIG. 7B is a cross-sectional view showing a modified example of the through silicon via substrate according to the third embodiment of the present disclosure. FIG. 7C is a cross-sectional view showing a modified example of the through silicon via substrate according to the fourth embodiment of the present disclosure. Here, the through electrode substrates 100e, 100f, and 100 g according to this modification are referred to as the through electrode substrate 100 unless otherwise specified. Similarly, the substrates 102e, 102f, 102g, the adhesion layers 104e, 104f, 104g, and the through electrodes 106e, 106f, 106g are the substrate 102, the adhesion layer 104, and the through electrodes 106.

As shown in FIGS. 7A to 7C, the through electrode substrate 100 has a substrate 102, an adhesion layer 104, and a through electrode 106. In the through electrode substrate 100 according to the present modification, the through electrodes according to the second to fourth embodiments are provided, except that the adhesion layer 104 is arranged between the first opening end and the second opening end of the through hole 112. Since it is the same as the substrate, the different parts will be described here.

As shown in FIGS. 7A to 7C, in the through electrode substrate 100 according to the present modification, the adhesion layer 104 is arranged between the first opening end and the second opening end of the through hole 112. The adhesion layer 104 is formed so as to cover a part of the inner surface of the through hole 112 so as to be in contact with the inner surface of the through hole 112. However, the adhesion layer 104 may have any shape, may be non-uniform, or may be discontinuous as long as it is in contact with the inner surface of the through hole 112. For example, the inner side surface of the through hole 112 may be cut diagonally, or may be discontinuous in the circumference. In other words, the adhesion layer 104 is not arranged at both ends of the inner side surface (first opening end and second opening end) of the through hole 112.

A through electrode 106 is arranged inside the through hole 112. The through electrode 106 fills the through hole 112 from the first surface 102s1 side (first opening end) to the second surface 102s2 side (second opening end). The through electrode 106 is arranged so as to be in contact with the inner side surface of the adhesion layer 104 between the first surface 102s1 side (first opening end) and the second surface 102s2 side (second opening end) of the through hole 112. Through electrodes 106 are arranged so as to be in contact with the inner side surface of the through hole 112 on the first surface 102s1 side (first opening end) and the second surface 102s2 side (second opening end) of the through hole 112. However, the via silicon via 106 is not limited to this, and is in direct contact with the adhesion layer 104 in the region where the adhesion layer 104 is arranged and directly in contact with the substrate 102 in the region where the adhesion layer 104 is not arranged on the inner surface of the through hole 112. In other words, the adhesion layer 104 is interposed between the substrate 102 and the through silicon via 106.

In the region where the adhesion layer 104 is arranged on the inner surface of the through hole 112, the through electrode 106 strongly adheres to the substrate 102 via the adhesion layer 104. On the other hand, in the region where the adhesion layer 104 is not arranged on the inner surface of the through hole 112, the through electrode 106 weakly adheres to the substrate 102. By having a region in which the adhesion layer 104 is arranged in a part of the through hole 112, the through electrode 106 can improve the adhesiveness with the substrate 102 and suppress the through electrode 106 from falling out of the through hole 112. can do. By having a region where the adhesion layer 104 is not arranged at both ends of the through hole 112, stress due to thermal expansion / contraction of the through electrode 106 and the substrate 102 can be further dispersed in the direction of both ends of the through hole 112, and during heat treatment. Substrate destruction can be further suppressed. Therefore, a highly reliable through electrode substrate can be obtained.

[Manufacturing method of through silicon via substrate]
The method for manufacturing the through electrode substrate 100d according to the embodiment of the present disclosure is the second to fourth embodiments, except that the adhesion layer 104 is formed between the first opening end and the second opening end of the through hole 112. This is the same as the method for manufacturing the through electrode substrate according to the embodiment, and the description thereof is omitted here.

<Fifth Embodiment>
[Construction of through silicon via substrate]
FIG. 8 is a cross-sectional view showing the configuration of the through silicon via substrate according to the embodiment of the present disclosure. As shown in FIG. 8, the through electrode substrate 100h has a substrate 102h, an adhesion layer 104h, a through electrode 106h, and a multilayer wiring structure 110h and 210h. The through electrode substrate 100h according to the present embodiment is the same as the through electrode substrate according to the first embodiment except that the multilayer wiring structures 110h and 210h are included on the first surface 102hs1 and the second surface 102hs2 of the substrate 102h. Therefore, the differences will be explained here.

As shown in FIG. 8, the through electrode substrate 100h according to the present embodiment includes the multilayer wiring structure 110h on the first surface 102hs1 of the substrate 102h and the multilayer wiring structure 210h on the second surface 102hs2 of the substrate 102h. .. The multilayer wiring structure 110h includes a first wiring 108h and a first insulating layer 118h. The first wiring 108h is interposed between the substrate 102h and the first insulating layer 118h. One end of the first wiring 108h is electrically connected to one end on the first surface 102hs1 side of the through electrode 106h. Further, the first wiring 108h is, for example, a wiring arranged on the outer substrate or the upper layer side through an opening 128h provided in the first insulating layer 118h at the other end opposite to one end of the first wiring 108h. It may be electrically connected. In the present embodiment, one first wiring 108h is arranged, but the present invention is not limited to this configuration, and a plurality of first wirings 108h may be included. Further, the multilayer wiring structure 110h refers to a structure in which one wiring layer (first wiring 108h) and one insulating layer (first insulating layer 118h) are laminated on the first surface 102hs1 of the substrate 102h. However, the structure is not limited to this, and for example, a plurality of wiring layers and insulating layers may be repeatedly laminated, or elements such as transistors may be arranged.

The multilayer wiring structure 210h includes a second wiring 208h and a second insulating layer 218h. The second wiring 208h is interposed between the substrate 102h and the second insulating layer 218h. One end of the second wiring 208h is electrically connected to one end on the second surface 102hs2 side of the through electrode 106h. Further, the second wiring 208h is, for example, a wiring arranged on the outer substrate or the upper layer side through the opening 228h provided in the second insulating layer 218h at the other end opposite to one end of the second wiring 208h. It may be electrically connected. In the present embodiment, one second wiring 208h is arranged, but the present invention is not limited to this configuration, and a plurality of second wirings 208h may be included. Further, the multilayer wiring structure 210h refers to a structure in which one wiring layer (second wiring 208h) and one insulating layer (second insulating layer 218h) are laminated on the second surface 102hs2 of the substrate 102h. However, the structure is not limited to this, and for example, a plurality of wiring layers and insulating layers may be repeatedly laminated, or elements such as transistors may be arranged.

<Sixth Embodiment>
[Structure of semiconductor device]
In the sixth embodiment, the semiconductor device manufactured by using the through electrode substrates shown in the first to fifth embodiments will be described. In the following description, a semiconductor device for connecting each integrated circuit using the through silicon via substrate according to the first to fifth embodiments as an interposer will be described. In the present embodiment, the integrated circuit means a semiconductor chip, a circuit board on which the semiconductor chip is mounted, or the like.

FIG. 9 is a cross-sectional view showing a semiconductor device using the through electrode substrate according to the embodiment of the present disclosure. The semiconductor device 1000 is connected to a circuit board 1400 in which three through electrode substrates 1310, 1320, and 1330 are laminated and, for example, a semiconductor element such as a DRAM is formed. The through silicon via substrate 1310 has a connection terminal 1511 and a connection terminal 1512. The through silicon via substrate 1320 has a connection terminal 1521 and a connection terminal 1522. The through silicon via substrate 1330 has a connection terminal 1532. The connection terminals 1511 and 1521 correspond to the second wiring 208h exposed in the opening 228h provided in the second insulating layer 218h shown in FIG. 8, for example. The connection terminals 1512, 1522, and 1532 correspond to the first wiring 108h exposed in the opening 128h provided in the first insulating layer 118h shown in FIG. 8, for example.

The materials of the through silicon via substrates 1310, 1320, and 1330 may be different. The connection terminal 1512 is connected to the connection terminal 1500 of the circuit board 1400 by a bump 1610. The connection terminal 1511 is connected to the connection terminal 1522 by a bump 1620. The connection terminal 1521 is connected to the connection terminal 1532 by a bump 1630. As the bumps 1610, 1620, 1630, for example, metals such as indium, copper, and gold are used.

The number of laminated through electrode substrates is not limited to three, and may be two or four or more. The connection between the through silicon via substrates facing each other is not limited to the connection via bumps, and other bonding techniques such as eutectic bonding may be used. As another connection method, the through silicon via substrates facing each other may be adhered to each other by applying and firing polyimide, epoxy resin, or the like.

FIG. 10 is a cross-sectional view showing another example of the semiconductor device using the through electrode substrate according to the embodiment of the present disclosure. In the semiconductor device 1000 shown in FIG. 10, semiconductor chips 1410 and 1420 such as a MEMS device, a CPU, and a memory, and a through electrode substrate 1300 are laminated and connected to a circuit board 1400.

A through electrode substrate 1300 is arranged between the semiconductor chip 1410 and the semiconductor chip 1420. The semiconductor chip 1410 and the through silicon via substrate 1300 are connected by bumps 1640. It is connected to the semiconductor chip 1420 through silicon via substrate 1300 by a bump 1650. A semiconductor chip 1410 is placed on the circuit board 1400, and the circuit board 1400 and the semiconductor chip 1420 are connected by a wire 1700. In this example, the through silicon via substrate 1300 plays a role of connecting a plurality of semiconductor chips having different functions, and a multifunctional semiconductor device is realized. For example, by using the semiconductor chip 1410 as a 3-axis acceleration sensor and the semiconductor chip 1420 as a 2-axis magnetic sensor, a 5-axis motion sensor can be realized by one module.

When the semiconductor chip is a sensor such as a MEMS device, the sensing result may be output as an analog signal. In this case, a low-pass filter, an amplifier, or the like may be formed on the semiconductor chip or the through silicon via substrate 1300.

FIG. 11 is a cross-sectional view showing still another example of the semiconductor device using the through electrode substrate according to the embodiment of the present disclosure. The above two examples (FIGS. 9 and 10) were three-dimensional implementations, but the example shown in FIG. 11 is an example applied to the combined implementation of two dimensions and three dimensions (sometimes referred to as 2.5 dimensions). ). In the example shown in FIG. 11, six through electrode substrates 1310, 1320, 1330, 1340, 1350, and 1360 are laminated on the circuit board 1400. However, not only all the through electrode substrates are laminated, but they are also arranged side by side in the in-plane direction of the substrate. The material of each of these through silicon via substrates may be different.

In FIG. 11, through electrode substrates 1310 and 1350 are connected on the circuit board 1400, through electrode substrates 1320 and 1340 are connected on the through electrode substrate 1310, and through electrode substrates 1330 are connected on the through electrode substrate 1320. A through silicon via 1360 is connected on the electrode substrate 1350. As shown in FIG. 11, these through silicon via substrates can be used as an interposer for connecting a plurality of semiconductor chips, and can be mounted in combination with two dimensions and three dimensions. The through silicon via substrates 1330, 1340, 1360 and the like may be replaced with semiconductor chips.

The present disclosure is not limited to the above embodiment, and can be appropriately modified without departing from the spirit.

100: Through Silicon Via Substrate, 102: Substrate, 102s1: First Surface, 102s2: Second Surface, 104: Adhesion Layer, 106: Through Electrode, 112: Through Hole, 1000: Semiconductor Device

Claims (15)

A through hole is provided that penetrates the first surface and the second surface facing the first surface, and the diameter of the first opening end on the first surface is smaller than the diameter of the second opening end on the second surface. With the board
An adhesion layer arranged on a part of the inner surface of the through hole,
A through electrode that is in contact with the adhesion layer, is in contact with the substrate on the second surface side of the inner surface, and fills the through hole.
Through electrode substrate having. The through silicon via substrate according to claim 1, wherein the adhesion layer is arranged on the first surface side of the inner surface surface. The through electrode substrate according to claim 2, wherein the angle θ formed by the inner surface of the through hole and the first surface is less than 90 °. The through electrode substrate according to claim 3 , wherein the angle θ formed by the inner surface of the through hole and the first surface is 80 ° or more. The through electrode substrate according to any one of claims 1 to 4, wherein the adhesion layer is arranged in a range of 12% or more and 50% or less of the height of the inner side surface. The through electrode substrate according to any one of claims 1 to 5, wherein the through electrode is in contact with the substrate within a range of 50% or more and 88% or less of the height of the inner surface surface. The penetrating electrode substrate according to any one of claims 1 to 6, wherein the penetrating electrode is copper, and the adhesion layer is any one of zinc oxide, titanium, indium tin oxide, and zinc oxide. The through silicon via substrate according to any one of claims 1 to 7.
A first integrated circuit connected to one end of the through electrode of the through electrode substrate,
A second integrated circuit connected to the other end of the through electrode substrate on the opposite side of the through electrode.
A semiconductor device. A through hole that penetrates the first surface and the second surface facing the first surface through the substrate, and the diameter of the first opening end on the first surface is smaller than the diameter of the second opening end on the second surface. Form and
A close contact layer is formed on a part of the inner surface of the through hole.
To form a through electrode that is in contact with the adhesion layer and is in contact with the substrate on the second surface side of the inner surface to fill the through hole.
A method for manufacturing a through silicon via substrate including. The method for manufacturing a through electrode substrate according to claim 9, wherein the adhesion layer is formed on the first surface side of the inner surface surface by a sputtering method. The method for manufacturing a through electrode substrate according to claim 10, wherein the angle θ formed by the inner surface of the through hole and the first surface is less than 90 °. The method for manufacturing a through electrode substrate according to claim 11 , wherein the angle θ formed by the inner surface of the through hole and the first surface is 80 ° or more. The method for manufacturing a through electrode substrate according to any one of claims 9 to 12, wherein the adhesion layer is formed in a range of 12% or more and 50% or less of the height of the inner side surface. The method for manufacturing a through electrode substrate according to any one of claims 9 to 13, wherein the through electrode is formed so as to be in contact with the substrate within a range of 50% or more and 88% or less of the height of the inner surface surface. Forming the through electrode
A first conductor layer is formed on the inner surface of the through hole and on the close contact layer.
The method for manufacturing a through electrode substrate according to any one of claims 9 to 14, wherein a second conductor layer is formed on the first conductor layer so as to fill the through holes.

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