JP7082506B2 - Thermally conductive inorganic substrates and semiconductor devices - Google Patents

Description

The present invention relates to a thermally conductive inorganic substrate and a semiconductor device.

Semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors) and power MOSFETs (Metal Oxide Semiconductor Transform Transistors) generate heat when driven by an electric current. In recent years, semiconductor devices used for motor drive and the like tend to use a current having a high current density, and heat generation in the semiconductor device tends to increase.

In order to promote heat dissipation of the semiconductor element, the semiconductor element is usually mounted on a thermally conductive inorganic substrate having a large thermal conductivity such as a metal substrate via a bonding material such as solder. As a mechanism for removing heat from a semiconductor element, a mechanism in which a semiconductor element and a radiator such as a heat sink are thermally connected via a heat conductive inorganic substrate, or a heat conductive inorganic substrate itself on which a semiconductor element is mounted is the atmosphere. A mechanism that directly dissipates heat is known.

By the way, since the thermally conductive inorganic substrate that promotes heat dissipation of the semiconductor element is formed of a material having a large thermal conductivity such as metal, the thermal expansion rate is generally larger than that of the semiconductor element. Further, when the semiconductor element is mounted on the thermally conductive inorganic substrate, the periphery of the mounting region of the semiconductor element is heated to a high temperature in order to melt the bonding material such as solder. Therefore, after the semiconductor element is mounted on the heat conductive inorganic substrate, the heat expansion rate of the semiconductor element and the heat expansion rate of the heat conductive inorganic substrate are different from each other, so that the semiconductor element and the heat conductive inorganic substrate are different from each other. Residual stress is likely to occur between the substrate and the substrate.

The residual stress generated between the semiconductor device and the thermally conductive inorganic substrate causes the semiconductor device to warp. When the semiconductor element is warped, the amount of warpage of the semiconductor element changes due to heat generated when the semiconductor element is driven by an electric current. In particular, when a compound semiconductor, specifically SiC (silicon carbide) or GaN (gallium nitride) is used as the material of the semiconductor element, the semiconductor element can be operated at a high temperature, so that the semiconductor due to heat generation can be operated. The deformation of the element becomes more remarkable. If the semiconductor element is repeatedly deformed, there is a concern that the semiconductor element may be damaged.

Therefore, a thermally conductive inorganic substrate has been proposed for the purpose of relaxing the stress generated by the heat generation of the semiconductor element (Patent Document 1). In the heat conductive inorganic substrate (base plate) of Patent Document 1, a recess (the outer peripheral portion of the recess) is formed along the outer peripheral edge of the mounting region of the semiconductor element, and the bonding material filled in the recess is formed. It is said to relieve the stress generated in semiconductor devices.

Since the thermally conductive inorganic substrate of Patent Document 1 has a configuration in which a recess is formed in advance along the outer peripheral edge of the mounting region of the semiconductor element, it is necessary to determine the shape of the mounting region in advance. That is, the shape of the semiconductor element to be mounted is defined by the recess formed in advance.

Japanese Unexamined Patent Publication No. 2015-128154

The present invention has been made based on the above circumstances, and provides a thermally conductive inorganic substrate and a semiconductor device capable of suppressing stress generated in a semiconductor element and relatively freely defining a mounting region of the semiconductor element. The purpose is to do.

The invention made to solve the above problems is a thermally conductive inorganic substrate having a region for mounting a semiconductor element on at least one surface and mounting the semiconductor element in this mounting region via a bonding material. Therefore, the mounting area has a recess in which the opening area gradually decreases from the surface side toward the depth direction.

Since the thermally conductive inorganic substrate has a recess in the mounting region of the semiconductor element in which the opening area gradually decreases from the surface side toward the depth direction, the bonding material is placed in the recess when the semiconductor element is mounted. Filled. Since the concave portion filled with the joint material is formed wider on the opening side than on the bottom side, the joint material in the concave portion can be deformed relatively easily. Therefore, when the semiconductor element is mounted in the mounting region, the stress generated due to the difference between the thermal expansion rate of the semiconductor element and the thermal expansion rate of the thermally conductive inorganic substrate is filled in the concave portion. It is alleviated by the deformation of the joint material. That is, the heat conductive inorganic substrate can suppress the stress generated in the semiconductor element by the joining material filled in the recess. Further, since the thermally conductive inorganic substrate has a recess inside the outer peripheral edge of the mounting region of the semiconductor element, the mounting region of the semiconductor element is relatively free under the condition that it is larger than the opening shape of the recess. Can be specified in.

It is preferable that the concave portion has one or more tapered portions on the inner peripheral surface that gradually reduce the opening width of the concave portion from the surface side toward the depth direction. As a result, the deformation of the joining material filled in the recess is appropriately promoted, so that the stress generated in the semiconductor element is efficiently suppressed.

The opening width of the concave portion on the surface of the mounting region is preferably 1 mm or more and 10 mm or less. When the opening width of the recess is within the above range, the stress relaxing action of the joining material filled in the recess and the thermal conductivity from the semiconductor element to the thermally conductive inorganic substrate are adjusted in an appropriate balance.

The depth of the recess is preferably 0.05 mm or more and 0.5 mm or less. When the depth of the recess is within the above range, the stress relaxing action of the joining material filled in the recess and the thermal conductivity from the semiconductor element to the thermally conductive inorganic substrate are adjusted in an appropriate balance.

Another invention made to solve the above-mentioned problems is a semiconductor device provided with the above-mentioned heat conductive inorganic substrate and the above-mentioned semiconductor element, and the above-mentioned semiconductor element is mounted in the above-mentioned mounting region.

Since the semiconductor device includes the above-mentioned thermally conductive inorganic substrate, the stress generated in the semiconductor element by the bonding material filled in the recesses of the thermally conductive inorganic substrate can be suppressed. Further, in the semiconductor device, the mounting region of the semiconductor element can be relatively freely defined under the condition that the shape is larger than the opening shape of the recess of the heat conductive inorganic substrate.

The thermally conductive inorganic substrate and the semiconductor device of the present invention can suppress the stress generated in the semiconductor element and can relatively freely define the mounting region of the semiconductor element.

It is a schematic perspective view partially showing the vicinity of the mounting area of the heat conductive inorganic substrate of one embodiment of the present invention. FIG. 3 is a cross-sectional view taken along the line AA of the thermally conductive inorganic substrate of FIG. It is a schematic sectional drawing partially showing the vicinity of the mounting area of the semiconductor device of one Embodiment of this invention.

Hereinafter, embodiments of the thermally conductive inorganic substrate and the semiconductor device according to the present invention will be described in detail with reference to the drawings.

[Thermal conductive inorganic substrate]
The thermally conductive inorganic substrate 1 of FIG. 1 has a mounting region 2 for mounting a semiconductor element on the surface, and the semiconductor element is mounted in the mounting region 2 via a bonding material. Further, the heat conductive inorganic substrate 1 has a recess 3 in the mounting region 2 in which the opening area gradually decreases from the surface side toward the depth direction. The mounting region 2 may be present on at least one surface of the heat conductive inorganic substrate 1, and may be present on both sides of the heat conductive inorganic substrate 1, for example.

The heat conductive inorganic substrate 1 is a member that discharges heat received from a semiconductor element mounted on the surface mounting region 2 to the outside, and is not particularly limited, but is formed, for example, in a substantially rectangular plate shape in a plan view. There is. The heat conductive inorganic substrate 1 is, for example, a lead frame in which a semiconductor element is mounted via a bonding material such as solder paste and electrically connected to an external wiring, a heat sink that discharges heat received from the semiconductor element to the outside, or a heat sink. It can be arranged between the semiconductor element and the heat sink and can be a heat dissipation plate or the like that transfers heat from the semiconductor element to the heat sink. The material of the heat conductive inorganic substrate 1 is not particularly limited, but is of heat conductive, for example, copper, aluminum, an alloy of copper and aluminum, or a material in which copper is directly bonded to a ceramic by the Direct Copper Bond (DCB) method. Higher materials can be used. The thermally conductive inorganic substrate 1 is formed by, for example, press working, and the size, shape, and thickness of the thermally conductive inorganic substrate 1 are appropriately selected depending on the type of semiconductor element to be mounted, the purpose of use, and the like.

As the semiconductor element mounted in the mounting region 2, for example, a known semiconductor element such as a transistor such as an IGBT or a power MOSFET, a diode, or an IC can be adopted. The semiconductor element is not particularly limited, but for example, the linear thermal expansion coefficient is 3 ppm / K or more and 5 ppm / K or less, the Young's modulus is 100 GPa or more and 500 GPa or less, the width along the surface of the mounting region 2 is 2 mm or more and 20 mm or less, and the thickness is When it is 0.05 mm or more and 0.3 mm or less, it is preferable from the viewpoint of suppressing the stress generated in the semiconductor element.

The bonding material for bonding the heat conductive inorganic substrate 1 and the semiconductor element is introduced between the heat conductive inorganic substrate 1 and the semiconductor element when the semiconductor element is mounted on the heat conductive inorganic substrate 1, so that the bonding layer is formed. To form. As the material of the bonding material, for example, a lead-free solder made of an alloy of tin, silver and copper, silver brazing, silver paste and the like, which have a relatively low softening temperature and are soft, are used. When these materials are used as the material of the joining material, the joining material plays a role of a cushioning material against the stress generated between the heat conductive inorganic substrate 1 and the semiconductor element.

<Mounting area>
The mounting region 2 is a substantially flat region that partitions a part of the surface of the thermally conductive inorganic substrate 1, and a semiconductor element is mounted in this region via a joining material. The mounting region 2 has a shape equal to the shape of the bottom region of the semiconductor element in a plan view, and in FIG. 1, the outer peripheral edge thereof is shown by a substantially rectangular virtual line. When a semiconductor element is mounted on the thermally conductive inorganic substrate 1, a bonding material such as solder is introduced into the mounting region 2, and the semiconductor element is mounted on the mounting region 2 via the bonding material.

(Recess)
The thermally conductive inorganic substrate 1 has a recess 3 whose opening area is smaller than the area of the mounting region 2 inside the outer peripheral edge of the mounting region 2. The recess 3 is formed substantially in the center of the mounting region 2, has a substantially square opening in a plan view, and the opening area gradually decreases from the surface side toward the depth direction, and has a substantially square plane at the bottom. It has a shape. The recess 3 is not particularly limited, but can be formed by, for example, pressing using a mold, cutting, etching, or the like.

As shown in FIGS. 1 and 2, the recess 3 has three (three-stage) tapered portions on the inner peripheral surface that gradually reduce the opening width of the recess 3 from the surface side toward the depth direction. Here, the opening width of the recess 3 indicates the width of the opening of the recess 3 in the direction parallel to the surface of the mounting region 2. The tapered portion has an inclined surface that descends toward the bottom of the recess 3, is continuous at the same depth, and is formed in a substantially square annular shape in a plan view along the inner peripheral surface of the recess 3. Further, a substantially square annular plane parallel to the surface of the mounting region 2 is formed between the two tapered portions. The recess 3 is not particularly limited to having three tapered portions on the inner peripheral surface, and may have one or more tapered portions on the inner peripheral surface.

The lower limit of the intersection angle between the surface of the tapered portion and the surface of the mounting region 2 is preferably 15 degrees, more preferably 20 degrees, and even more preferably 25 degrees. On the other hand, as the upper limit of the crossing angle, 85 degrees is preferable, 80 degrees is more preferable, and 60 degrees is further preferable. If the crossing angle does not reach the lower limit, the amount of the joining material filled in the recess 3 becomes small, and the joining material filled in the recess 3 may not sufficiently serve as a cushioning material. On the contrary, when the crossing angle exceeds the upper limit, the thickness of the joining material filled in the recess 3 suddenly changes, which hinders the smooth deformation of the joining material, and the joining material sufficiently serves as a cushioning material. There is a risk that it will not be fulfilled.

As the lower limit of the opening width of the recess 3 on the surface of the mounting region 2, 1 mm is preferable, 1.5 mm is more preferable, and 2 mm is further preferable. On the other hand, as the upper limit of the opening width, 10 mm is preferable, 8 mm is more preferable, and 7 mm is further preferable. If the opening width does not reach the lower limit, the amount of the joining material filled in the recess 3 becomes small, and the joining material filled in the recess 3 may not sufficiently serve as a cushioning material. On the contrary, when the opening width exceeds the upper limit, the amount of the bonding material filled in the recess 3 increases, and the thermal conductivity from the semiconductor element to the thermally conductive inorganic substrate 1 may decrease. Further, since the adhesion between the thermally conductive inorganic substrate 1 and the semiconductor element in the center of the recess 3 is lowered, the deformation of the semiconductor element on the recess 3 may not be prevented.

The lower limit of the depth of the recess 3 is preferably 0.05 mm, more preferably 0.1 mm, and even more preferably 0.15 mm. On the other hand, as the upper limit of the depth of the recess 3, 0.5 mm is preferable, 0.4 mm is more preferable, and 0.3 mm is further preferable. Here, the depth of the recess 3 indicates the depth from the surface of the mounting region 2 to the bottom of the recess 3. If the depth of the recess 3 is less than the above lower limit, the amount of the joining material filled in the recess 3 is small, and the joining material filled in the recess 3 may not sufficiently serve as a cushioning material. On the contrary, when the depth of the recess 3 exceeds the above upper limit, the amount of the bonding material filled in the recess 3 increases, and the thermal conductivity from the semiconductor element to the thermally conductive inorganic substrate 1 may decrease. Further, since the adhesion between the thermally conductive inorganic substrate 1 and the semiconductor element in the center of the recess 3 is lowered, the deformation of the semiconductor element on the recess 3 may not be prevented.

[Semiconductor device]
The semiconductor device of FIG. 3 includes the above-mentioned thermally conductive inorganic substrate 1 and the semiconductor element 4, and the semiconductor element 4 is mounted in the mounting region 2 of the thermally conductive inorganic substrate 1. Although the mounting region 2 is not shown in FIG. 3, as described above, the mounting region 2 has the same shape as the bottom region of the semiconductor element in a plan view.

The semiconductor element 4 is mounted in the mounting region 2 via a bonding layer 5 formed of a bonding material. The bonding material is filled tightly between the mounting region 2 including the inside of the recess 3 and the semiconductor element 4, and the bonding layer 5 overlaps with at least the mounting region 2 in a plan view.

The thickness of the bonding layer 5 formed between the surface of the mounting region 2 and the bottom of the semiconductor element 4 is not particularly limited because the optimum thickness varies depending on the size of the semiconductor element 4, the amount of heat generated, and the like. However, from the viewpoint of thermal conductivity, the lower limit of the thickness of the bonding layer 5 is preferably 10 μm and more preferably 20 μm, while the upper limit of the thickness of the bonding layer 5 is preferably 200 μm and more preferably 150 μm. preferable.

(advantage)
Since the heat conductive inorganic substrate 1 has a recess 3 in the mounting region 2 of the semiconductor element in which the opening area gradually decreases from the surface side toward the depth direction, the semiconductor element is mounted in the mounting region 2. At that time, the stress generated due to the difference between the thermal expansion rate of the semiconductor element and the thermal expansion rate of the thermally conductive inorganic substrate 1 is alleviated by the deformation of the bonding material filled in the recess 3. That is, the heat conductive inorganic substrate 1 can suppress the stress generated in the semiconductor element by the joining material filled in the recess 3. Further, since the thermally conductive inorganic substrate 1 has the recess 3 inside the mounting region 2 of the semiconductor element, the mounting region 2 of the semiconductor element is compared under the condition that the concave shape is larger than the opening shape of the recess 3. Can be freely defined.

Further, since the heat conductive inorganic substrate 1 has one or more tapered portions on the inner peripheral surface of the recess 3 that gradually reduces the opening width of the recess 3 from the surface side toward the depth direction, the recess 3 has a tapered portion. Deformation of the bonded material to be filled is appropriately promoted, and the stress generated in the semiconductor element is efficiently suppressed.

Further, in the heat conductive inorganic substrate 1, the opening width of the recess 3 on the surface of the mounting region 2 is 1 mm or more and 10 mm or less, and the depth of the recess 3 is 0.05 mm or more and 0.5 mm or less. The stress relaxing action of the bonding material filled in 3 and the thermal conductivity from the semiconductor element to the thermally conductive inorganic substrate 1 are adjusted in an appropriate balance.

Further, since the semiconductor device includes the thermally conductive inorganic substrate 1, the stress generated in the semiconductor element 4 can be suppressed by the bonding material (bonding layer 5) filled in the recess 3 of the thermally conductive inorganic substrate 1. Further, the semiconductor device can relatively freely define the mounting region 2 of the semiconductor element 4 under the condition that the shape of the recess 3 of the thermally conductive inorganic substrate 1 is larger than the opening shape.

[Other embodiments]
The thermally conductive inorganic substrate and semiconductor device of the present invention are not limited to the above embodiments.

In the above embodiment, the concave portion 3 having a substantially square opening in a plan view has been described, but the shape of the opening is not limited to the substantially square shape, and for example, the shape of the opening is a substantially rectangular shape, a substantially circular shape, or a substantially elliptical shape. You may.

Further, in the above embodiment, the recess 3 having one or more substantially rectangular annular tapered portions on the inner peripheral surface has been described, but the shape of the tapered portion is not limited to a shape similar to the shape of the opening of the recess 3. .. The shape of the tapered portion may be a shape that does not resemble the shape of the opening of the recess 3, for example, may be a rectangular annular shape, or may not be a perfect annular shape.

Hereinafter, the present invention will be described in more detail by way of examples, but the present invention is not limited to these examples.

Simulation calculations were performed on the above-mentioned semiconductor device model to analyze the stress generated in the semiconductor device. The simulation calculation was performed under the following conditions using the mechanism analysis simulator software "MemsONE" (manufactured by Mizuho Information & Research Institute, Ltd.). The following values are all values at 25 ° C.

[No. 1 semiconductor device]
Thermally conductive inorganic substrate 1 Material: Copper, Thickness: 2 mm, Density: 8930 kg / m ³ , Young's modulus 129.84 GPa, Poisson's ratio: 0.343, Thermal conductivity: 398 W / (m · K), Specific heat: 386 J / (Kg ・ K), linear expansion coefficient: 17ppm / K
Mounting area 2 Area: 4.5 mm x 6.5 mm
Recessed portion 3 Surface side opening: 4 mm x 4 mm, bottom flat surface: 2 mm x 2 mm, square annular tapered portion: 4 mm x 4 mm (outer peripheral edge), 3 mm x 3 mm (outer peripheral edge), 2 mm x 2 mm (inner peripheral edge), surface Depth from to each plane: 0.05 mm, 0.1 mm, 0.2 mm (bottom)
Semiconductor element 4 Bottom region: 4.5 mm x 6.5 mm, thickness: 0.2 mm, density: 2340 kg / m ³ , Young's modulus 112.78 GPa, Poisson's ratio: 0.22, thermal conductivity: 148 W / (m · K) ), Specific heat: 713J / (kg · K), Linear expansion coefficient: 4ppm / K
Bonding layer 5 Material: Tin, silver and copper alloy, thickness from the surface of the mounting area 2 to the bottom of the semiconductor element 4: 0.05 mm, density: 7400 kg / m ³ , Young's modulus 31 GPa, Poisson ratio: 0. 4. Thermal conductivity: 55W / (m · K), specific heat: 234J / (kg · K), coefficient of linear expansion: 21ppm / K, 0.2% proof stress: 27MPa

Further, as a comparative example, No. 1 having no recess 3 is used. Simulation calculations were also performed for the semiconductor device of 2. No. The semiconductor device of No. 2 is No. 1 except that the thermally conductive inorganic substrate 1 does not have the recess 3. The conditions are the same as those of the semiconductor device of 1.

In the simulation calculation, the amount of warpage of the semiconductor element 4 when the semiconductor element 4 was mounted in the mounting region 2 at the junction temperature of 200 ° C. and then cooled to 25 ° C. was calculated. Table 1 shows the calculation results regarding the relationship between the distance (mm) from the center and the amount of warpage (μm) when the center position (center) of the semiconductor element 4 is used as a reference.

As shown in Table 1, No. The semiconductor device of No. 1 has a distance from the center in the range of 0.5 mm to 1.5 mm and 2.5 mm. It was confirmed that the amount of warpage of the semiconductor element 4 was smaller than that of the semiconductor device of 2. As a result, No. If the thermally conductive inorganic substrate 1 has the recess 3 as in the semiconductor device of 1, it can be said that the amount of warpage of the semiconductor element 4 is reduced.

Further, when the calculation is executed for the maximum stress applied to the semiconductor element 4, No. In the semiconductor device of No. 2, the maximum stress was 261.7 MPa, whereas No. 2 was used. In the semiconductor device of No. 1, the maximum stress was 242.5 MPa, and No. It was confirmed that the semiconductor device of No. 1 can reduce the maximum stress by about 7%. Therefore, if the thermally conductive inorganic substrate 1 has the recess 3, it can be said that the maximum stress applied to the semiconductor element 4 is also reduced.

The thermally conductive inorganic substrate and the semiconductor device of the present invention can suppress the stress generated in the semiconductor element and can relatively freely define the mounting region of the semiconductor element.

1 Thermally conductive inorganic substrate 2 Mounting area 3 Recess 4 Semiconductor element 5 Bonding layer

Claims (4)

A thermally conductive inorganic substrate having a region for mounting a semiconductor element on at least one surface and mounting the semiconductor element in this mounting region via a bonding material.
The mounting area has a recess in which the opening area gradually decreases from the surface side toward the depth direction.
A heat-conducting inorganic substrate having a plurality of tapered portions on the inner peripheral surface of the concave portion, which gradually reduces the opening width of the concave portion from the surface side toward the depth direction . The heat conductive inorganic substrate according to claim 1, wherein the opening width of the concave portion on the surface of the mounting region is 1 mm or more and 10 mm or less. The heat conductive inorganic substrate according to claim 1 or 2, wherein the depth of the recess is 0.05 mm or more and 0.5 mm or less. The thermally conductive inorganic substrate according to any one of claims 1 to 3 ,
Equipped with semiconductor elements,
A semiconductor device that mounts the semiconductor element in the mounting area.

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