JP7046098B2 - リネーム・レジスタ復旧に基づくレジスタ・コンテキスト復元 - Google Patents
リネーム・レジスタ復旧に基づくレジスタ・コンテキスト復元 Download PDFInfo
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- JP7046098B2 JP7046098B2 JP2019556276A JP2019556276A JP7046098B2 JP 7046098 B2 JP7046098 B2 JP 7046098B2 JP 2019556276 A JP2019556276 A JP 2019556276A JP 2019556276 A JP2019556276 A JP 2019556276A JP 7046098 B2 JP7046098 B2 JP 7046098B2
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- Prior art keywords
- snapshot
- register
- registers
- restore
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30058—Conditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/490,013 | 2017-04-18 | ||
| US15/490,013 US10838733B2 (en) | 2017-04-18 | 2017-04-18 | Register context restoration based on rename register recovery |
| PCT/IB2018/051646 WO2018193321A1 (en) | 2017-04-18 | 2018-03-13 | Register context restoration based on rename register recovery |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2020518895A JP2020518895A (ja) | 2020-06-25 |
| JP2020518895A5 JP2020518895A5 (enExample) | 2020-08-06 |
| JP7046098B2 true JP7046098B2 (ja) | 2022-04-01 |
Family
ID=63790045
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019556276A Active JP7046098B2 (ja) | 2017-04-18 | 2018-03-13 | リネーム・レジスタ復旧に基づくレジスタ・コンテキスト復元 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10838733B2 (enExample) |
| JP (1) | JP7046098B2 (enExample) |
| CN (1) | CN110520837B (enExample) |
| DE (1) | DE112018000848T5 (enExample) |
| GB (1) | GB2575412B (enExample) |
| WO (1) | WO2018193321A1 (enExample) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10740108B2 (en) | 2017-04-18 | 2020-08-11 | International Business Machines Corporation | Management of store queue based on restoration operation |
| US10545766B2 (en) | 2017-04-18 | 2020-01-28 | International Business Machines Corporation | Register restoration using transactional memory register snapshots |
| US10489382B2 (en) | 2017-04-18 | 2019-11-26 | International Business Machines Corporation | Register restoration invalidation based on a context switch |
| US10552164B2 (en) | 2017-04-18 | 2020-02-04 | International Business Machines Corporation | Sharing snapshots between restoration and recovery |
| US10564977B2 (en) | 2017-04-18 | 2020-02-18 | International Business Machines Corporation | Selective register allocation |
| US10540184B2 (en) | 2017-04-18 | 2020-01-21 | International Business Machines Corporation | Coalescing store instructions for restoration |
| US10782979B2 (en) | 2017-04-18 | 2020-09-22 | International Business Machines Corporation | Restoring saved architected registers and suppressing verification of registers to be restored |
| US10572265B2 (en) | 2017-04-18 | 2020-02-25 | International Business Machines Corporation | Selecting register restoration or register reloading |
| US10963261B2 (en) | 2017-04-18 | 2021-03-30 | International Business Machines Corporation | Sharing snapshots across save requests |
| US10649785B2 (en) | 2017-04-18 | 2020-05-12 | International Business Machines Corporation | Tracking changes to memory via check and recovery |
| US11010192B2 (en) | 2017-04-18 | 2021-05-18 | International Business Machines Corporation | Register restoration using recovery buffers |
| US11372970B2 (en) * | 2019-03-12 | 2022-06-28 | Hewlett Packard Enterprise Development Lp | Multi-dimensional attestation |
| CN111159002B (zh) * | 2019-12-31 | 2023-04-28 | 山东有人物联网股份有限公司 | 一种基于分组的数据边缘采集方法、边缘采集设备及系统 |
| CN111552511B (zh) * | 2020-05-14 | 2023-06-16 | 山东省计算中心(国家超级计算济南中心) | 一种VxWorks系统物联网固件解包恢复文件名的方法 |
| US11249757B1 (en) * | 2020-08-14 | 2022-02-15 | International Business Machines Corporation | Handling and fusing load instructions in a processor |
| CN114489791B (zh) * | 2021-01-27 | 2023-03-24 | 沐曦集成电路(上海)有限公司 | 处理器装置及其指令执行方法、计算设备 |
| CN114741237B (zh) * | 2022-04-20 | 2024-11-01 | Oppo广东移动通信有限公司 | 一种任务切换方法、装置、设备及存储介质 |
| CN115437691B (zh) * | 2022-11-09 | 2023-01-31 | 进迭时空(杭州)科技有限公司 | 一种针对risc-v矢量与浮点寄存器的物理寄存器堆分配装置 |
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| US20130179665A1 (en) | 2012-01-06 | 2013-07-11 | Imagination Technologies, Ltd. | Restoring a register renaming map |
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- 2018-03-13 CN CN201880025664.XA patent/CN110520837B/zh active Active
- 2018-03-13 DE DE112018000848.7T patent/DE112018000848T5/de active Pending
- 2018-03-13 JP JP2019556276A patent/JP7046098B2/ja active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| US20180300157A1 (en) | 2018-10-18 |
| GB2575412B (en) | 2021-10-20 |
| JP2020518895A (ja) | 2020-06-25 |
| CN110520837A (zh) | 2019-11-29 |
| CN110520837B (zh) | 2023-06-23 |
| GB201916132D0 (en) | 2019-12-18 |
| GB2575412A (en) | 2020-01-08 |
| DE112018000848T5 (de) | 2019-11-07 |
| US10838733B2 (en) | 2020-11-17 |
| WO2018193321A1 (en) | 2018-10-25 |
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