JP7005303B2 - Communication equipment, packet generators and their control methods - Google Patents

Description

The present invention relates to a communication device that executes communication protocol processing, a packet generation device, and a control method thereof.

In recent years, there has been an increasing need to view high-resolution video (8K / 4K) via a network using a multifunctional terminal called a smart device, which is rapidly increasing, and along with this, data traffic on the network has increased. There is. Further, with the increase in network speed such as 10 Gbps communication by Ethernet (registered trademark) and 5 G communication of mobile communication, the load on the CPU of communication protocol processing such as TCP / UDP / IP is increasing. In order to realize these high-speed data communications, measures have been proposed to reduce the communication protocol processing load of the CPU.

In order to transmit data in the communication protocol processing, it is necessary to generate a communication packet to which a communication header and a communication footer are added. Improving the efficiency of the process of generating this communication packet is indispensable for high-speed data communication. Patent Document 1 describes a packet generation method in which a long packet passed from a main system is stored in a transmission buffer, divided into a predetermined size or less, header information is analyzed, and a short packet is generated from the long packet.

JP-A-2007-266759

In the transmission packet generation method of Patent Document 1, a process of temporarily storing a long packet passed from the main system in a transmission buffer is performed. Generally, when storing data in a buffer, it is not always possible to store the data to be transmitted in one buffer. In other words, not all the data can be stored in a continuous area. Further, the size of the buffer is not always unique depending on the implementation of the system and the operating status of the system, and there are some that switch the size of the buffer to be secured according to the situation. In the communication packet generation method of Patent Document 1, in order to transmit transmission data stored in a plurality of buffers having different sizes to the outside, transmission processing must be performed for the number of buffers, and the overhead of transmission processing is increased. There is a problem of getting bigger.

The present invention has been made in view of the above problems, and provides a packet generation device, a communication device, and a control method thereof for switching a communication packet generation method according to a storage status of transmission data in a buffer. The purpose.

The packet generator according to one aspect of the present invention is
A packet generator equipped with a packet generation system.
Based on the determination process of determining whether the entire transmission target data can be stored in one transmission buffer in the local memory deployed in the packet generation system, the transmission target data is regarded as one transmission data , or the transmission target data is described. A determination means for determining to generate a plurality of transmission data, each of which does not exceed a predetermined length, from the transmission target data .
As the packet generation modes, a first mode for generating one or more packets whose payload length does not exceed the predetermined length from the one transmission data, and a number not exceeding the number of the transmission data from the plurality of transmission data. A second mode for generating a packet of, and a generation means having .
When operating in the first mode, the generation means generates a packet from the transmission data based on the predetermined length, and when operating in the second mode, the transmission means based on the coupling relationship of the transmission data. Generate a packet from the data .

According to the present invention, the method of generating a communication packet is switched according to the storage status of the transmission data in the buffer.

The functional block diagram of the communication apparatus according to an embodiment. The flowchart which shows the transmission operation of the communication apparatus in embodiment. The flowchart which shows the mode selection process of the header processing part in embodiment. The flowchart which shows the processing of the 1st mode of the header processing part in an embodiment. The flowchart which shows the processing of the 2nd mode of the header processing part in embodiment. A flowchart showing the process of setting from the generation of setting information to the register section. The figure explaining the derivation of the transmission data from the transmission target data, and the generation of a packet.

Hereinafter, an example of an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram showing an internal configuration of a communication device 100 according to an embodiment in units of functional blocks. The communication device 100 includes a main CPU 102, a main memory 103, and a subsystem 104 that executes communication protocol processing. The functional blocks (102 to 104) in the communication device 100 are connected to each other via the system bus 101.

The main CPU 102 controls the entire communication device 100 and executes application software. Data, programs, etc. required for executing the application software are stored in the main memory 103. The main CPU 102 reads and writes data and programs to the main memory 103 via the system bus 101 as necessary. The main memory 103 is a memory that can be shared and used by each functional block in the communication device, and is composed of a semiconductor memory such as, for example, a DRAM (Dynamic Random Access Memory). The memory area of the main memory 103 is divided into an area for storing a program, an application buffer area used by application software, and the like.

The subsystem 104 as a packet generation device includes a sub CPU 106, a local memory 107, a DMA controller 108, a communication interface 109, and a header processing unit 110. These functional blocks (106, 107, 108, 109, 110) are interconnected by a local bus 105. The local bus 105 is communicably connected to the system bus 101. The subsystem 104 is a subsystem that executes packet generation and communication protocol processing in the communication device 100. The subsystem 104 specializes in communication protocol processing such as TCP / IP protocol, and is responsible for a part of data transfer processing via an external device and a network. The subsystem 104 is equipped with hardware dedicated to communication protocol processing and executes high-speed communication protocol processing on behalf of the main CPU 102. The TCP / IP protocol is an example shown for explanation, and other communication protocols may be applied.

The sub CPU 106 executes the communication protocol process. Specifically, the sub CPU 106 performs each communication protocol process (transmission sequence control, congestion control, communication error control, etc.) of IPv4 (IP version 4), IPv6 (IP version 6), UDP, and TCP. Further, the sub CPU 106 may be configured by one processor, may be a multiprocessor configuration by a plurality of processors, or may be configured to include a processor and hardware for accelerating some functions.

The local memory 107 is a memory that can be used by the sub CPU 106, and is composed of, for example, a semiconductor memory represented by a SRAM (Static Random Access Memory). Further, the local memory 107 can also be accessed from the main CPU 102 via the system bus 101 and the local bus 105. The local memory 107 stores transmission / reception data and various setting information required for executing communication protocol processing. Reading and writing of data to the local memory 107 is performed via the local bus 105.

The DMA controller 108 executes data transfer from the source side to the destination side according to the contents described in the descriptor. The descriptor includes address information on the source side as a data transfer source, address information on the destination side as a data transfer destination, information on the transfer size of the data transfer, and the like. Further, the descriptor has an area for describing the presence / absence of the descriptor to be executed next and the address information of the descriptor, and the transfer using a plurality of descriptors can be performed by the one-time transfer start instruction to the DMA controller 108.

A functional block (for example, a sub CPU 106) that becomes a master for the local bus 105 writes a descriptor to the local memory 107, and then notifies the DMA controller 108 of a DMA transfer start instruction. As a method of notifying the DMA transfer start instruction, the address information of the local memory 107 storing the first descriptor may be set in the DMA controller 108.

The DMA controller 108 will be described in more detail. The DMA controller 108 includes a DMA transfer unit 181 and a checksum calculator 182. Upon receiving the notification of the DMA transfer start instruction, the DMA transfer unit 181 of the DMA controller 108 performs a DMA transfer between the main memory 103 and the local memory 107 or between the internal memory 113 and the local memory 107 according to the above-mentioned descriptor. Execute. The DMA transfer unit 181 also executes a DMA transfer process between the internal memory 113 and the communication interface and between the local memory 107 and the communication interface. The checksum calculator 182 has a calculation function for calculating the one's complement sum in 16-bit units for the data transferred by DMA. The DMA transfer unit 181 has a function of adding the calculation result of the checksum calculator 182 to the end of the transferred data and performing DMA transfer, or a function of outputting only the calculation result of the checksum calculator 182. Further, this calculation function can calculate one complement sum by designating a plurality of calculation areas. Execution of these arithmetic functions in the checksum arithmetic unit 182 may be instructed by a descriptor or may be instructed by a register in the DMA controller.

The communication interface 109 is an interface with a network 111 as represented by a LAN (Local Area Network), and is responsible for communication control between a physical layer (PHY layer) and a data link layer (MAC layer) in communication. .. The communication interface 109 has a buffer memory (not shown) for temporarily storing transmission / reception information. Input / output of transmission / reception information to / from this buffer memory is performed by DMA transfer of the DMA controller 108. The communication interface 109 may have a built-in DMA controller and may use the DMA controller. In that case, it is desirable that the transfer can be performed by using a plurality of descriptors with one transfer start instruction as in the case of the DMA controller 108. This is because the data (payload) to be transmitted and its header are not always stored in the continuous area, so that the communication speed is so high that the data and the header can be efficiently read from multiple areas. Because it is easy.

The header processing unit 110 includes a core unit 112 and an internal memory 113, and executes a communication header generation process in the communication protocol process. The header processing unit 110 is a functional block that executes the communication header generation process in the communication protocol process executed by the sub CPU 106 on behalf of the user. The register unit 191 in the core unit 112 has an input function for inputting setting information for controlling the header processing unit 110 and an output function for displaying status information for confirming the state in the header processing unit 110. Further, the register unit 191 not only displays the status information but also has a function of notifying the status information to the outside by using an interrupt signal.

The communication header generation unit 192 in the core unit 112 generates a communication header according to the setting information input to the register unit 191 and stores it in the internal memory 113. The setting information input to the register unit 191 includes header information that serves as a template (hereinafter, template header) and editing information for generating a communication header. The internal memory 113 is accessible from the core unit 112 and the sub CPU 106, and is composed of, for example, a semiconductor memory represented by a SRAM (Static Random Access Memory). The internal memory 113 stores the communication header generated by the core unit 112.

Further, the header processing unit 110 has a function of becoming a master for the local bus 105, and can control the DMA controller 108. The DMA transfer setting by the header processing unit 110 is performed as follows. That is, the header processing unit 110 generates a descriptor describing the contents of the DMA transfer and stores it in the internal memory 113. Then, the header processing unit 110 sets the address information of the internal memory 113 in which the descriptor is stored and the information related to various transfers in the DMA controller 108. As a result, the DMA controller 108 executes the DMA transfer according to the descriptor stored in the internal memory 113. Further, the header processing unit 110 has a function of switching between the first mode and the second mode according to the setting information set in the register unit 191. The details of the setting information, the first mode and the second mode will be described later.

Next, the communication operation of the communication device 100 shown in FIG. 1 will be described. FIG. 2 is a flowchart showing the operation of the communication device 100 when connecting to an external device via the network 111 and transmitting a communication packet to the external device. In the following, an example in which the TCP / IP protocol is used as the communication protocol used when the communication device 100 transfers data to and from an external device will be described, but a communication protocol other than the TCP / IP protocol may be used. Needless to say.

Step S201 indicates the start of this flowchart. When the communication device 100 enters a communication state with an external device via the network 111, that is, when communication with the external device is established, the process shown by the flowchart shown in the figure starts. In step S202, the sub CPU 106 determines whether or not the communication packet to be transmitted to the external device is ready to be generated by the communication protocol process executed by the sub CPU 106. For example, when the sub CPU 106 receives an instruction (transmission instruction) for transmitting a communication packet from the application software executed by the main CPU 102 to an external device, it is determined that the communication packet is ready to be generated. If it is determined that the communication packet to be transmitted to the external device is ready to be generated, the process proceeds to step S203, and if not, the process maintains the current state.

In step S203, the sub CPU 106 transfers the transmission target data from the main memory 103 to the local memory 107 of the subsystem 104 in order to execute transmission to the external device according to the communication protocol. Here, the transmission target data is DMA-transferred from the main memory 103 to the local memory 107 based on the transmission instruction received in step S202. The sub CPU 106 uses the DMA controller 108 to perform this DMA transfer. For the DMA transfer setting, the sub CPU 106 generates a descriptor describing the contents of the DMA transfer and saves it in the local memory 107. Then, the sub CPU 106 sets the address information of the local memory 107 in which the descriptor is stored in the DMA controller 108, so that the DMA transfer is executed. The process of step S203 ends when the DMA transfer is completed.

At the time of DMA transfer, it is not always possible to store the entire transmission target data of the main memory 103 in one transmission buffer (one memory space having consecutive addresses in the local memory 107). This is because the amount of the transmit buffer that can be secured depends on the operating status of the subsystem, that is, the freeness of the local memory 107. Further, the larger the transmission data, the smaller the probability that it can be stored in one transmission buffer. This is because it is necessary to secure a continuous area of memory to take a large transmission buffer. When the received packet is stored in the reception process, or when the transmission buffer is secured for transmission to other communication partners, there is a high possibility that the memory cannot be secured in the continuous area. If the transmission target data does not fit in one transmission buffer even if the transmission buffer is taken as large as possible, the sub CPU 106 generates a descriptor so that the transmission target data is divided into a plurality of transmission buffers and the data is stored. , Perform data transfer. Here, the sub CPU 106 determines whether to generate a communication packet using the first mode or the second mode based on whether the transmission target data can be stored in one transmission buffer.

When the transfer processing of the transmission data in step S203 is completed, in step S204, the sub CPU 106 instructs the header processing unit 110 to start the header generation processing. Then, in step S205, the sub CPU 106 waits for the completion of the header generation processing by the header processing unit 110. The instruction to start the header generation process in step S204 is given by the sub CPU 106 setting the setting information in the register unit 191. Hereinafter, the setting process of the setting information by the sub CPU 106 will be described with reference to the flowchart of FIG.

FIG. 6 is a flowchart showing a process of generating setting information by the sub CPU 106. First, in step S601, the sub CPU 106 calculates the number of packets to be generated based on the length of the transmission target data transferred in step S202 (hereinafter, transmission data length) and the packet size of the packets to be generated. In steps S602 to S610, the sub CPU 106 determines the transmission data used for packet generation derived from the transmission target data based on the storage state of the transmission target data in the local memory 107. In step S602, the sub CPU 106 determines whether or not the entire transmission target data is stored in one transmission buffer (memory area of continuous addresses) of the local memory 107. When the entire transmission target data is stored in one transmission buffer, in step S603, the sub CPU 106 determines the entire transmission target data as one transmission data.

On the other hand, when it is determined in step S602 that the transmission target data is divided and stored in the plurality of transmission buffers, in steps S604 to S610, the sub CPU 106 determines a plurality of transmission data from the transmission target data. In this case, the transmission target data is provided for packet generation as transmission data equal to or greater than the number of transmission buffers. First, in step S604, the sub CPU 106 selects the first transmission buffer. In step S605, the sub CPU 106 determines whether or not the data (partial data of the transmission target data) stored in the selected transmission buffer is equal to or smaller than the segment size of the packet to be transmitted. If it is determined that the data is equal to or smaller than the segment size, in step S606, the sub CPU 106 determines the data stored in the selected transmission buffer as one transmission data. If it is determined that the data is not the segment size or less, in step S607, the sub CPU 106 divides the data stored in the selected transmission buffer into the data having the segment size or less, and determines each of them as the transmission data.

In step S608, the sub CPU 106 generates data binding information indicating whether or not to combine adjacent transmission data based on the determined transmission data size and the packet segment size. The details of the data combination information according to this embodiment will be described later. Next, in step S609, the sub CPU 106 determines whether or not the above processing has been performed for all the transmission buffers. If it is determined that there is an unprocessed transmission buffer, the sub CPU 106 selects the next transmission buffer in step S610 and executes the processing from step S605. If it is determined in step S609 that there is no unprocessed transmission buffer, the process proceeds to step S611. In step S611, the sub CPU 106 modifies the number of packets set in step S601 based on the data binding information generated in step S608. In this way, the configuration of the transmission data for transmitting the transmission target data is determined based on the storage state of the transmission target data in the local memory 107.

In step S612, the sub CPU 106 inputs (sets) the setting information to the register unit 191 of the header processing unit 110. The setting information includes information such as the number of packets, template header information, the start address of transmission data in the local memory 107, the length of transmission data, the number of transmission data, and the initial sequence number. When it is determined to process the transmission target data as a plurality of transmission data, the setting information includes the start address and the length of each transmission data. Further, the header processing unit 110 may have a specification in which the start address of the generated communication header is fixed, or may be a specification managed by the sub CPU 106. Both the former and the latter need to be implemented or instructed to generate a communication header in the area of the internal memory 113. The latter merit is that when the next communication header is generated before the communication header generated by the header processing unit 110 is transmitted to the outside, the generated and untransmitted communication header is not overwritten. It is possible to give instructions.

Since the size of the local memory 107 is determined at the time of mounting, it is necessary to consider the upper limit of the total length of the template header in advance for both the former specification and the latter specification. At that time, in the case of TCP or IPv6, it is necessary to consider the option setting. In particular, IPv6 does not have an upper limit for options, so it is necessary to pay attention to how far it corresponds.

As described above, if the transmission target data can be stored in one transmission buffer in the local memory 107, the number of transmission data is 1. Further, if the transmission target data is divided and stored in a plurality of transmission buffers, the number of transmission data is equal to or greater than the number of divisions. When the number of transmission data is 1, the sub CPU 106 needs to specify (include in the setting information) the division length for dividing the transmission data by the header processing unit 110. This division length may be the same as or shorter than the maximum segment size (Max Segment Size, hereinafter MSS) in TCP. However, at least, it is necessary that the number of packets to be generated, the transmission data length, and the division length are consistent. That is, the calculated value of the product of the number of packets to be generated and the division length must be equal to or smaller than the transmission data length. Further, when the division length is larger than the transmission data length, the number of packets to be generated needs to be 1.

Further, the header processing unit 110 has a function of generating a communication header for a packet obtained by combining a plurality of transmission data when a plurality of transmission data are input. If the number of transmission data is input to 4, the sub CPU 106 can instruct the combination of transmission data so as to generate a packet corresponding to any number of packets from 1 to 4. However, it is not possible to generate more packets than the number of input transmission data. The upper limit of the number of transmission data to be combined may be equal to or less than the number of transmission data that can be input to the header processing unit 110 at one time, and is implementation-dependent. The upper limit of the number of transmission data may be calculated from the transmission window size value of the TCP protocol and the MSS value. For example, if the transmission window size is 64 kilobytes (65536 bytes) and the MSS is 1460 bytes, it is desirable to implement so that a maximum of 45 packets can be generated by one instruction. When inputting a plurality of transmission data, it is the sub CPU 106 that manages the total length of the final packet. Therefore, the sub CPU 106 needs to set the combination in the header processing unit 110 so as to comply with the protocol to be used. To the last, the header processing unit 110 manages whether or not to combine the input data. Details of the functions related to the combination of transmitted data will be described later.

Further, in step S607 described above, a plurality of transmission data are determined from one transmission buffer. That is, it may be necessary to generate more packets than there are transmit buffers. In this way, when generating a number of packets exceeding the number of transmission buffers from the transmission target data stored in the plurality of transmission buffers, devise the setting information input to the register unit 191 of the header processing unit 110. There is a need. More specifically, it is necessary to devise the number of transmission data included in the setting information and the address and length of the transmission data. For example, a case where three packets are generated from transmission data in two transmission buffers will be described.

FIG. 7 is a diagram showing how transmission data and packets are generated from transmission target data. As shown in FIG. 7A, the two transmission buffers are the A buffer and the B buffer, respectively. The start address of the transmission data stored in the A buffer is 0x1000, the transmission data length is 2000 bytes, the start address of the transmission data stored in the B buffer is 0x2000, and the transmission data length is 1000 bytes. If the MSS at the time of transmitting a packet is 1000 bytes, it is possible to generate two packets by using the transmission data of the buffer A and one packet by using the transmission data of the buffer B. Therefore, the sub CPU 106 inputs the setting information indicating the following contents to the register unit 191.
-The start address of the transmission data is 0x1000, 0x13E8 (offset from 0x1000 to 1000 bytes), 0x2000.
-Transmission data length is 1000 bytes each.
-The number of transmitted data is 3, and the number of packets to be generated is 3.

With this setting, as shown in FIG. 7A, it is possible to generate three packets from two transmission data with one processing instruction. When the header processing unit 110 can accept only one transmission data, the above example always requires two processing instructions. On the other hand, the present embodiment has an advantage that the transmission data divided into a plurality of parts can be packetized at once. As a result, it is possible to reduce the overhead related to a plurality of processes. Further, FIG. 7A shows an example of data combination information indicating whether or not to combine with adjacent transmission data. The data combination information of the present embodiment indicates the necessity of combination with the next transmission data. The data combination information in FIG. 7A is "1" for all transmission data, indicating that the combination with the next transmission data is not performed.

Further, as described above, it is possible to generate a number of packets smaller than the number of transmission buffers by instructing the combination by the data combination information. For example, in the above example, if the MSS is 1500, as shown in FIG. 7B, the sub CPU 106 sets the following information in the register unit 191 to generate two packets from the three transmission data. can do.
-Starting addresses are 0x1000, 0x15DC (offset from 0x1000 to 1500 bytes), 0x2000.
・ Transmission data lengths are 1500 bytes, 500 bytes, and 1000 bytes, respectively.
-Data combination information (instruction to combine the second and third transmission data).
-The number of transmitted data is 3, and the number of packets to be generated is 2.

As the data combination information, "0" is added to the transmission data to be combined with the next transmission data. FIG. 7B shows that 500 bytes of transmission data are combined with the next transmission data (1000 bytes). In the above, the set value is determined based on the MSS, but it is not necessary to use the MSS as a reference. Further, the number of transmitted data may be 3 and the number of generated packets may be 3 without combining the data (the address and the data length of the transmitted data remain the same).

In the above, the size of the transmission data is used as a criterion for determining whether or not to combine the transmission data, but the present invention is not limited to this. For example, whether the communication interface is full-duplex or half-duplex may be used as a criterion for determining whether to combine transmission data. In the case of half-duplex, the network utilization efficiency increases as the transmission data length that can be transmitted in one transmission increases, so it is better to combine the transmission data. In addition, it may be determined whether or not to combine transmission data in consideration of the performance of the communication partner. The better the performance of the communication partner, the faster the packet processing speed, so even if the number of small packets increases, packet loss will occur. The probability of occurrence is low, and the risk of a decrease in communication speed is low. On the other hand, when the header processing unit 110 includes the join processing, the processing load increases by that amount, and the processing speed slows down. Therefore, if there is no problem with the performance of the communication partner, it is not necessary to combine the transmission data. The performance of the communication partner may be obtained by inquiring to the communication partner using an established communication connection.

In step S205, the sub CPU 106 determines whether or not the processing started by the header processing unit 110 is completed. As a method for determining the completion of processing, for example, there is reception of an interrupt signal from the header processing unit 110, polling of the status register of the header processing unit 110, and the like. Waiting for an interrupt signal to be received has the advantage of improving the parallelism of processing because other processing can be performed while waiting for an interrupt. When the sub CPU 106 detects the end of the processing of the header processing unit 110, the sub CPU 106 advances the processing to step S206. The header processing unit 110 performs processing according to the setting information set in the register unit 191. As a result, when the end notification is performed, the same number of communication headers as the specified number of packets are generated on the internal memory 113.

In step S206, the sub CPU 106 transfers the transmission data stored in the local memory 107 and the communication header stored in the internal memory 113 to the communication interface 109, and transmits the communication packet. Since the sub CPU 106 issues a header generation instruction (including a combination of transmission data) to the header processing unit 110, it is possible to identify the generated header and the payload portion corresponding to the header. Therefore, the sub CPU 106 can identify the communication packet even if the header and the payload portion are not stored in the continuous memory area. When transferring the header and the transmission data to the communication interface 109, the DMA controller 108 may be used, or the DMA controller provided in the communication interface 109 may be used. The sub CPU 106 makes a set of a descriptor of the header portion and a descriptor of the payload portion for one packet, prepares descriptors for the number of packets to be transmitted, and then transmits the descriptors to the communication interface 109.

When the transmission of the communication packet to the communication interface 109 in step S206 is completed, in step S207, the sub CPU 106 determines whether or not a factor for terminating the communication state between the communication device 100 and the external device has occurred. If there is no factor for terminating the communication state with the external device, the sub CPU 106 returns the process to step S202 and repeats the above process. When it is determined that a factor for terminating the communication state with the external device has occurred, the sub CPU 106 advances the process to step S208. For example, there are the following cases as factors for terminating the communication state with the external device.
-When the application software running on the main CPU 102 detects an instruction to terminate the connection between the communication device and the external device by an operation from the user or the like.
-When the communication interface 109 detects that the communication line is disconnected due to the user disconnecting the network cable from the communication device.
-When a communication packet including a notification to disconnect the communication line is received from an external device that is the communication partner.

In step S208, the sub CPU 106 performs a process of terminating the communication state between the communication device 100 and the external device. More specifically, the communication line with the external device is disconnected according to the communication protocol processing carried by the sub CPU 106. Then, the sub CPU 106 deletes the related information temporarily stored in the local memory 107 or the internal memory 113 of the header processing unit 110. After that, when the notification of the completion of disconnection of the communication line is transmitted from the sub CPU 106 to the main CPU 102, the application software displays to the user or the like that the communication line has been disconnected. After that, this process ends (step S209).

As described above, by appropriately operating the header processing unit 110, it is possible to efficiently generate packets.

FIG. 3 is a flowchart showing a process of determining the operation mode of the header processing unit 110 in the embodiment. In the present embodiment, the operation mode determination process shown in FIG. 3 is started when the header processing unit 110 receives an instruction (step S204) to start the process from the sub CPU 106 (step S301). The header processing unit 110 switches between the first mode and the second mode according to the number of transmission data determined by the sub CPU 106 (determined by the process of FIG. 6).

In step S302, the header processing unit 110 determines whether or not the number of transmission data set in the register unit 191 is 1. If it is determined that the number of transmitted data is 1, in step S303, the header processing unit 110 operates in the first mode of generating one or more packets that do not exceed a predetermined length from one transmitted data. .. In the present embodiment, the predetermined length is a divided length, and MSS can be used. In the first mode, the sequence number and payload length of the communication header are calculated using the split length. The details of the first mode will be described with reference to FIG. Then, the process proceeds to S305 and ends. On the other hand, if it is determined in step S302 that the number of transmitted data is other than 1 (plural), the process proceeds to step S304. In step S304, the header processing unit 110 operates in the second mode of generating a number of packets not exceeding the number of transmitted data from a plurality of transmitted data. In the second mode, the sequence number and payload length of the communication header are calculated using the data binding information. The details of the second mode will be described with reference to FIG. Then, the process proceeds to S305 and ends.

In parallel with the processing shown in the flowchart of FIG. 3, the header processing unit 110 generates a copy of the template header input by the sub CPU 106 in the internal memory 113. Of course, there is no problem even if the process shown in FIG. 3 is performed before or after the copy of the template header is completed. The number of copies of the template header is equal to the number of packets set in the register unit 191. Modification of each part of the communication header may be performed at the same time as this copy, or may be performed by overwriting after copying.

FIG. 4 is a flowchart showing a process of calculating the payload length and the sequence number of each packet in the first mode, which is executed in step S303. The copy of the template header does not have to be completed, but if both the calculation and the header modification are performed at the same time, the header copy of the corresponding part must be completed at least. If not done at the same time, it is necessary to save the calculation result in the temporary storage area. It is assumed that the sequence number [i] shown in the figure represents the value of the sequence number of the i-th packet, and the sequence number of the first packet is represented by the sequence number [0]. Further, the payload length [i] shown in the figure represents the payload length of the i-th packet, and the payload length of the first packet is represented by the payload length [0].

In step S402, the communication header generation unit 192 initializes the variable i (i = 0). Next, in step S403, the communication header generation unit 192 determines whether or not the processing is for the first packet. If it is determined that the processing is for the first packet, the processing proceeds to step S405, and if not, the processing proceeds to step S404. The variable i may be used as this criterion. That is, when i = 0, it is determined that the processing is for the first packet, and when i ≠ 0, it is determined that the processing is not for the first packet.

In step S404, the communication header generation unit 192 calculates the sequence number described in the header of the i (≠ 0) th packet. The sequence number [i] is the sum of the total payload lengths of the packets (i-1st packet) up to that point from the initial sequence number set in the register unit 191 (setting information). For example, in the case of calculation for the third packet, the sum of the payload length of the first packet and the payload length of the second packet is the "sum of the payload lengths of the packets so far". When the calculation is completed, the process proceeds to step S406.

In step S405, the communication header generation unit 192 calculates the sequence number described in the header of the i-th packet as in step S404. Since i = 0 when the process reaches step S405, the initial sequence number set in the register unit 191 is used for the sequence number [i]. When the calculation is completed, the process proceeds to step S406.

In step S406, the communication header generation unit 192 determines whether or not the processing is for the last packet. This determination can be made, for example, by comparing the value of the variable i with the number of packets set in the register unit 191. If it is determined that the processing is not for the last packet, in step S407, the communication header generation unit 192 calculates the payload length of the i-th packet. The payload length is the same as the division length set in the register unit 191. When the calculation is completed, in step S408, the communication header generation unit 192 adds 1 to the variable i. After that, the communication header generation unit 192 returns the process to step S403 and calculates the sequence number and payload length of the next packet.

If it is determined in step S406 that the process is for the last packet, in step S409, the communication header generation unit 192 calculates the payload length of the i-th packet. In step S409, the payload length [i] is a value obtained by subtracting the product of the divided length and the value obtained by subtracting 1 from the number of packets from the transmission data length set in the register unit 191. That is, the remaining transmission data length is calculated by subtracting the payload portion of the packet up to that point from the transmission data length, and that value becomes the payload length of the last packet. When the calculation is completed, this process ends (step S410). The flowchart of FIG. 4 is the processing of the first mode, and the number of transmission data input to the header processing unit 110 is one. Therefore, a number is not explicitly added to the transmission data length described in the flowchart.

As described above, in the first mode, it is possible to calculate the sequence number and the payload length of each packet from one transmission data.

FIG. 5 is a flowchart showing a process of calculating the payload length and the sequence number of each packet in the second mode, which is executed in step S304. As in the process of the first mode (FIG. 4), the copy of the template header does not have to be completed, but when both the calculation and the header correction are performed at the same time, the header copy of the corresponding part is at least. Must be finished. If not done at the same time, it is necessary to save the calculation result in the temporary storage area. The sequence number [i] and the payload length [i] shown in FIG. 5 are the same as those described in FIG. Further, the transmission data length [k] represents the length of the kth transmission data input to the header processing unit 110, and the length of the first transmission data is represented by the transmission data length [0].

In step S502, the communication header generation unit 192 of the header processing unit 110 initializes the variable i, the variable k, and the variable tmp. When the initialization is completed, in step S503, the communication header generation unit 192 adds the value of the transmission data length [k] to the tpm. Next, in step S504, the communication header generation unit 192 adds 1 to the variable k. Next, in step S505, the communication header generation unit 192 determines whether or not to combine the k-1st transmission data with the next transmission data (kth transmission data). If it is determined to be combined, the process returns to step S503, and if it is determined not to be combined, the process proceeds to step S506.

Data combination information indicating the necessity of data combination is used for determining whether or not to combine the next transmission data (adjacent transmission data). As described above with reference to FIG. 7B, the data combination information of the present embodiment is 1-bit information for one transmission data. When the data binding information is 0 value, it indicates that it is combined with the next transmission data, and when the data binding information is 1 value, it indicates that it is not combined with the next transmission data. For example, if the number of transmitted data is three and the data binding information is 0, 1, 1 from the first transmitted data, the first and second transmitted data are combined to generate a packet, and the third is It means that a packet is generated only from the transmitted data. The number of generated packets to be input to the register of the header processing unit 110 and the sum of the data combination information (0 + 1 + 1 = 2 in this example) must be input so as to be equal. A dedicated register may be prepared for inputting data binding information, but since only one bit of information is used for one transmission data, a specific field in another register area may be used. For example, if the maximum transmission data that can be handled by the header processing unit 110 is 64 kilobytes (the maximum window size of general TCP), only 16 bits are used at the maximum. If one register is composed of 32 bits, there is an unused bit area, and it is possible to utilize such a bit area.

In step S506, the communication header generation unit 192 sets the payload length (payload length [i]) of the i-th packet to the value of tp calculated in step S503. Next, in step S507, the communication header generation unit 192 initializes the variable tmp to 0. Subsequently, in step S508, the communication header generation unit 192 determines whether or not the processing up to the immediately preceding is the processing for the first packet. This determination can be made, for example, by whether or not i is 0.

When it is determined in step S508 that the processing is not for the first packet (when i ≠ 0), in step S509, the communication header generation unit 192 uses the sequence number (sequence number [i]) described in the header of the i-th packet. ]) Is calculated. The sequence number [i] is the sum of the initial sequence number set in the register and the total payload lengths of the packets up to that point. After that, the process proceeds to step S511. On the other hand, when it is determined that the processing is for the first packet (when i = 0), the communication header generation unit 192 is set in the register unit 191 (setting information) as the sequence number [i] in step S510. Set the initial sequence number. After that, the process proceeds to step S511.

In step S511, the communication header generation unit 192 adds 1 to the variable i. Then, in step S512, the communication header generation unit 192 branches the processing depending on whether or not the immediately preceding processing is the processing for the last packet. If it is determined that the process is for the last packet, this process ends (step S513). On the other hand, when it is determined that the immediately preceding process is not the process for the last packet, the communication header generation unit 192 returns the process to step S503 and repeats the above process. This determination can be made, for example, by comparing the value of the variable i with the number of packets set in the register unit 191.

As described above, in the second mode, it is possible to calculate the sequence number and the payload length of each packet from a plurality of transmission data.

Although the calculation method of the sequence number and the payload length of each packet is shown by the flowcharts of FIGS. 4 and 5, it is necessary to modify other areas in order to complete the header of each packet after copying the template header. ..

The Length field of the IP header can be calculated from the payload length calculated in the sequence of FIGS. 4 and 5 and the length of the template header input to the header processing unit 110. Since the Identity field of the IP header needs to be an independent value for each IP packet, it may be automatically prepared by the header processing unit 110 or may be input to the register from the sub CPU 106. The checksum of the IP header can be calculated from the information of the template header, the calculated payload length, the length of the template header, and the Identity. If the template header is copied while performing the sum calculation of the IP header area, the checksum of the IP header can be calculated more effectively.

Regarding the checksum of the TCP header, the DMA controller 108 is made to continuously read the communication header part of the communication packet and the payload part of the communication packet, calculate the one's complement sum for every 16 bits, and calculate the checksum value. Since the DMA controller 108 can calculate the complement sum from a plurality of regions, the calculation in consideration of the pseudo header is possible. The header processing unit 110 controls the DMA controller 108 in consideration of these in order to perform the checksum calculation of the TCP header. Further, the calculated checksum value is controlled so as to be written in a predetermined place in the communication header of the original communication packet.

(Other examples)
The present invention supplies a program that realizes one or more functions of the above-described embodiment to a system or device via a network or storage medium, and one or more processors in the computer of the system or device reads and executes the program. It can also be realized by the processing to be performed. It can also be realized by a circuit (for example, ASIC) that realizes one or more functions.

100: Communication device, 101: System bus, 102: Main CPU, 103: Main memory, 104: Subsystem, 105: Local bus, 106: Sub CPU, 107: Local memory, 108: DMA controller, 110: Header processing unit

Claims (15)

A packet generator equipped with a packet generation system.
Based on the determination process of determining whether the entire transmission target data can be stored in one transmission buffer in the local memory deployed in the packet generation system, the transmission target data is regarded as one transmission data , or the transmission target data is described. A determination means for determining to generate a plurality of transmission data, each of which does not exceed a predetermined length, from the transmission target data .
As the packet generation modes, a first mode for generating one or more packets whose payload length does not exceed the predetermined length from the one transmission data, and a number not exceeding the number of the transmission data from the plurality of transmission data. A second mode for generating a packet of, and a generation means having .
When operating in the first mode, the generation means generates a packet from the transmission data based on the predetermined length, and when operating in the second mode, the transmission means based on the coupling relationship of the transmission data. A packet generator characterized by generating packets from data . The packet according to claim 1, wherein the generation means divides the transmission data into the predetermined lengths and generates a packet for each of the divided transmission data when operating in the first mode. Generator. The packet generation device according to claim 1, wherein the generation means calculates the payload length and the sequence number of the generated packet by using the predetermined length when operating in the first mode. .. The packet according to any one of claims 1 to 3, wherein the first mode is executed when the entire transmission target data is stored in one transmission buffer of the local memory. Generator. The packet generator according to any one of claims 1 to 4, wherein the predetermined length is a maximum segment size determined by a communication protocol. The determination means determines whether or not it is necessary to combine adjacent transmission data in a sequence constituting the transmission target data for the plurality of transmission data separately stored in a plurality of transmission buffers provided in the local memory. Generates the data binding information to be instructed and
The generation means according to any one of claims 1 to 5, wherein when operating in the second mode, the transmission data is combined according to the data combination information to generate a packet. Packet generator. The packet generation device according to claim 6 , wherein the data combination information is 1-bit information for one transmission data. The determination means generates data binding information so as to combine the transmission data when the transmission data is combined with the next transmission data and the size of the combined transmission data does not exceed the predetermined length . The packet generator according to claim 6 or 7 . One of claims 6 to 8 , wherein the determination means determines whether or not to combine the transmission data with the adjacent transmission data based on the performance of the communication partner in the generation of the data combination information. The packet generator described in the section. 5. The generation means is characterized in that, when operating in the second mode, the size of the transmission data used for generating the packet is used to calculate the payload length and the sequence number of the packet. 9. The packet generator according to any one of 9. In the local memory, one transmission buffer is composed of a memory space having consecutive addresses, and when the transmission target data is divided and stored in a plurality of transmission buffers , the generation means is equal to or more than the number of the plurality of transmission buffers. The packet generation device according to any one of claims 1 to 10 , wherein the plurality of transmission data composed of the transmission data of the above are generated. When the transmission target data is separately stored in a plurality of transmission buffers and the data having a size exceeding the predetermined length is stored in one transmission buffer, the generation means obtains the predetermined length from the data. The packet generation device according to claim 11 , wherein two or more transmission data not exceeding the above are generated . The packet generator according to any one of claims 1 to 12 .
A processing means for generating the transmission target data by executing a predetermined application, and
A transfer means for transferring the transmission target data to the transmission buffer provided by the local memory, and
A communication device comprising: a transmission means for transmitting the transmission target data by transmitting a packet generated by the packet generation device. It is a control method of a packet generator equipped with a packet generator.
Based on the determination process of determining whether the entire transmission target data can be stored in the transmission buffer of one of the local memories deployed in the packet generation system, the transmission target data is regarded as one transmission data , or the transmission is performed. A decision process that determines to generate multiple transmission data, each of which does not exceed a predetermined length, from the target data .
As the packet generation modes, a first mode for generating one or more packets whose payload length does not exceed the predetermined length from the one transmission data, and a number not exceeding the number of the transmission data from the plurality of transmission data. It has a second mode of generating a packet of, and a generation process having.
In the generation step, when operating in the first mode, a packet is generated from the transmission data based on the predetermined length, and when operating in the second mode, the transmission is based on the coupling relationship of the transmission data. A method for controlling a packet generator, which comprises generating a packet from data . The first generation step of generating the data to be transmitted by executing a predetermined application, and
The transfer step of transferring the transmission target data to the transmission buffer provided by the local memory, and
Based on the determination process of determining whether the entire transmission target data can be stored in one transmission buffer of the local memory, the transmission target data is regarded as one transmission data , or each is predetermined from the transmission target data. The decision-making process that determines to generate multiple transmission data that does not exceed the length, and
A first mode for generating one or more packets whose payload length does not exceed the predetermined length from the one transmission data, and a first mode for generating a number of packets not exceeding the number of the transmission data from the plurality of transmission data. The second generation step to execute the second mode and
A transmission step of transmitting the packet generated in the second generation step is provided .
In the second generation step, when operating in the first mode, a packet is generated from the transmission data based on the predetermined length, and when operating in the second mode, the coupling relationship of the transmission data is used. A method for controlling a communication device, which comprises generating a packet from the transmission data .

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