WO2022151475A1

WO2022151475A1 - Message buffering method, memory allocator, and message forwarding system

Info

Publication number: WO2022151475A1
Application number: PCT/CN2021/072495
Authority: WO
Inventors: 曹雷; 曲吉亮; 王心力; 敬勇
Original assignee: 华为技术有限公司
Priority date: 2021-01-18
Filing date: 2021-01-18
Publication date: 2022-07-21
Also published as: CN115176453A

Abstract

The present application relates to the technical field of communications, and provides a message buffering method, a memory allocator, and a message forwarding system, being capable of saving a memory resource. The method comprises: a memory allocator receives a target message from a modulator-demodulator, and then the memory allocator stores the target message in a data packet buffer region of a first memory chip, wherein the first memory chip further comprises a first data structure; the first data structure comprises a first field and a second field; the first field indicates that the target message is not fragmented; the second field carries a second data structure; the second field is a field carrying fragmentation information in a state where the target message is fragmented; the second data structure at least indicates a first address of the data packet buffer region; and the first memory chip is provided by a memory.

Description

Message caching method, memory allocator and message forwarding system

technical field

The present application relates to the field of communication technologies, and in particular, to a message caching method, a memory allocator, and a message forwarding system.

Background technique

When a message is transmitted through a transfer control protocol/internet protocol (TCP/IP) stack, the message is usually transmitted using a socket buffer (SKB) structure. The SKB structure includes a message field management data structure (sk_buff), a message sharing information data structure (skb_shared_info), and a packet buffer (packet buffer). The message field management data structure stores message management information. The message sharing information data structure stores the fragmentation information of the message. The packet buffer is used to store the packet content.

However, if the packet is directly forwarded by hardware without going through the TCP/IP protocol stack, the packet does not need to be fragmented. If the SKB structure is still used to transmit the message, many fields in the message sharing information data structure (such as the fields that carry fragmentation information) are not required, but memory still needs to be allocated for the above "unnecessary fields", resulting in memory resources. waste.

SUMMARY OF THE INVENTION

The embodiments of the present application provide a message caching method, a memory allocator, and a message forwarding system, which can save memory resources.

In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:

In a first aspect, an embodiment of the present application provides a message buffering method, and the execution body of the method may be a memory allocator of a message forwarding system, or may be a chip applied to a memory allocator of a message forwarding system. The message forwarding system also includes a modem and memory. The method includes: the memory allocator receives the target message from the modem. Then, the memory allocator stores the target message in the data packet buffer area of the first memory slice. Wherein, the first memory slice further includes a first data structure. The first data structure includes a first field and a second field, the first field indicates that the target message is not fragmented, the second field carries the second data structure, and the second field carries fragmentation information in the fragmented state of the target message field, the second data structure at least indicates the first address of the data packet buffer area. The first memory slice is provided by the memory.

In the message caching method provided by the embodiment of the present application, the first memory slice is used to store the target message that is not fragmented and processed. Since the second field is a field that carries fragmentation information when the first field indicates packet fragmentation, the second field is also a field that carries the second data structure when the first field indicates that the target packet is not fragmented. field. That is to say, when the target packet is not fragmented, there is no fragmentation information, and the second field is used to carry the second data structure. The first address does not need to separately apply for a memory slice for the second data structure, thereby saving memory resources.

In a possible design, the position of the first data structure in the first memory slice includes one of the following items: before the data packet buffer area, or after the data packet buffer area. That is, the position of the first data structure in the first memory slice can be flexibly set.

In a possible design, the storage space spaced between the data packet buffer and the first data structure is greater than or equal to a preset value. The unit of the preset value may be bits, bytes, or the like. The default value can be any number of bytes from 50 to 100 bytes, or a certain number of bits to support the subsequent evolution of the first data structure. For example, when a new field is added to the first data structure, the new field It can be stored in the above-mentioned "storage space spaced between the data packet buffer area and the first data structure".

In a possible design, the packet caching method according to the embodiment of the present application further includes: the memory allocator receives the first indication information from the network interface card NIC. The first indication information indicates that the target message has been forwarded, and the message forwarding system further includes a NIC. Then, the memory allocator releases the first memory slice according to the first indication information.

That is to say, after the target message is forwarded, the memory allocator can also recover the first memory slice according to the first indication information to store other messages, thereby improving the utilization rate of memory resources.

In a possible design, the message caching method according to the embodiment of the present application further includes: the memory allocator receives the second indication information from the central processing unit CPU. The second indication information indicates that the first data structure is restored to the message sharing information data structure, the CPU is used to apply for the target memory slice, the target memory slice is used to store the message field management data structure, and the message field management data structure at least indicates the data The first address of the packet buffer area. The packet forwarding system also includes the CPU. Then, the memory allocator deletes the second data structure according to the second indication information.

That is to say, the memory allocator can also delete the second data structure according to the second indication information, so that the first data structure is restored to the message sharing information data structure to store the fragmented message.

In a possible design, the message buffering method according to the embodiment of the present application further includes: the memory allocator receives third indication information from the CPU. The third indication information indicates the release of the first memory slice, the CPU is used to apply for the target memory slice, the target memory slice is determined based on the socket cache SKB structure, and the SKB structure is used to store the information stored in the first memory slice, and the message The forwarding system also includes a CPU. Then, the memory allocator releases the first memory slice according to the third indication information.

That is to say, if the target memory slice applied by the CPU is a memory slice of the SKB structure, the memory allocator can also release the first memory slice, so that the recovered memory slice can store other messages, thereby improving the utilization of memory resources.

In a second aspect, an embodiment of the present application provides a message buffering device, where the message buffering device is located in a message forwarding system. The message forwarding system also includes a modem and memory. The message buffering device includes: a communication unit and a processing unit. Among them, the communication unit is used to receive the target message from the modem. The processing unit is used to store the target message in the data packet buffer area of the first memory slice, wherein the first memory slice further includes a first data structure; the first data structure includes a first field and a second field, and the first field Indicates that the target message is not fragmented, the second field carries a second data structure, the second field is a field that carries fragmentation information in a fragmented state of the target message, and the second data structure at least indicates the first address of the data packet buffer; The first memory slice is provided by the memory.

In a possible design, the position of the first data structure in the first memory slice includes one of the following items: before the data packet buffer area, or after the data packet buffer area.

In a possible design, the storage space spaced between the data packet buffer and the first data structure is greater than or equal to a preset value.

In a possible design, the communication unit is further configured to receive the first indication information from the network interface card NIC. The first indication information indicates that the target message has been forwarded, and the message forwarding system further includes a NIC. The processing unit is further configured to release the first memory slice according to the first indication information.

In a possible design, the communication unit is further configured to receive the second indication information from the central processing unit CPU. The second indication information indicates that the first data structure is restored to the message sharing information data structure, the CPU is used to apply for the target memory slice, the target memory slice is used to store the message field management data structure, and the message field management data structure at least indicates the data The first address of the packet buffer area. The packet forwarding system also includes the CPU. The processing unit is further configured to delete the second data structure according to the second indication information.

In a possible design, the communication unit is further configured to receive third indication information from the CPU. The third indication information indicates the release of the first memory slice, the CPU is used to apply for the target memory slice, the target memory slice is determined based on the socket cache SKB structure, and the SKB structure is used to store the information stored in the first memory slice, and the message The forwarding system also includes a CPU. The processing unit is further configured to release the first memory slice according to the third indication information.

In a third aspect, an embodiment of the present application provides a message buffering device, including a processor and an interface circuit, where the processor is configured to communicate with other devices through the interface circuit, and execute the reporting of the first aspect or any one of the first aspect. Text caching method. The processor includes one or more.

In a fourth aspect, an embodiment of the present application provides a message buffering device, including a processor that is connected to a memory and used to call a program stored in the memory to execute the first aspect or any one of the first aspects. Text caching method. The memory may be located within the message buffering device, or may be located outside the message buffering device. And the processor includes one or more.

In a fifth aspect, an embodiment of the present application provides a message caching device, including at least one processor and at least one memory, where the at least one processor is configured to execute the first aspect or the message caching method of any one of the first aspects.

In a sixth aspect, an embodiment of the present application provides a memory allocator, which is applied to a message forwarding system. The message forwarding system also includes a modem and memory. The memory allocator is used to receive destination messages from the modem. The memory allocator is further configured to store the target message in the data packet buffer area of the first memory slice, wherein the first memory slice further includes a first data structure; the first data structure includes a first field and a second field, the first The field indicates that the target packet is not fragmented, the second field carries the second data structure, the second field is the field that carries fragmentation information in the fragmented state of the target packet, and the second data structure at least indicates the first address of the packet buffer area ; The first memory slice is provided by the memory.

In a possible design, the memory allocator is further configured to receive first indication information from the network interface card NIC, where the first indication information indicates that the target message has been forwarded, and the message forwarding system further includes the NIC. The memory allocator is further configured to release the first memory slice according to the first indication information.

In a possible design, the memory allocator is further configured to receive second indication information from the central processing unit CPU, wherein the second indication information indicates that the first data structure is restored to the message sharing information data structure, and the CPU is used to apply for The target memory slice is used to store the message field management data structure, and the message field management data structure at least indicates the first address of the data packet buffer area; the message forwarding system further includes a CPU. The memory allocator is further configured to delete the second data structure according to the second indication information.

In a possible design, the memory allocator is further configured to receive third indication information from the CPU, where the third indication information indicates to release the first memory slice, the CPU is used to apply for the target memory slice, and the target memory slice is based on The socket cache is determined by the SKB structure; the SKB structure is used to store the information stored in the first memory slice; the message forwarding system further includes a CPU. The memory allocator is further configured to release the first memory slice according to the third indication information.

In a seventh aspect, embodiments of the present application provide a computer-readable storage medium, where instructions are stored in the computer-readable storage medium, and when the computer-readable storage medium runs on a computer, the computer can execute the first aspect or any one of the first aspects. A message caching method.

In an eighth aspect, the embodiments of the present application provide a computer program product including instructions, which, when running on a computer, enables the computer to execute the first aspect or the message caching method of any one of the first aspects.

In a ninth aspect, an embodiment of the present application provides a circuit system, where the circuit system includes a processing circuit, and the processing circuit is configured to execute the message caching method according to any one of the first aspect or the first aspect.

In a tenth aspect, an embodiment of the present application provides a chip, where the chip includes a logic circuit and an input and output interface. The input and output interfaces are used for communication with modules other than the chip. For example, the chip may be a chip that implements the function of the memory allocator in the first aspect or any possible design of the first aspect. The input and output interfaces input target packets. The logic circuit is used to run a computer program or instructions to implement the message buffering method in the first aspect or any possible design of the first aspect.

In an eleventh aspect, an embodiment of the present application provides a message forwarding system, where the system includes a modem, a memory allocator, and a memory. Among them, the memory allocator is used to receive the target message from the modem. The memory allocator is also used for storing the target message in the data packet buffer area of the first memory slice. The first memory slice further includes a first data structure, the first data structure includes a first field and a second field, the first field indicates that the target message is not fragmented, the second field carries the second data structure, and the second field is A field carrying fragmentation information in the target packet fragmentation state, the second data structure at least indicates the first address of the data packet buffer area, and the first memory fragment is provided by the memory.

Wherein, for the technical effect brought by any one of the design methods in the second aspect to the eleventh aspect, reference may be made to the technical effect brought by the different design methods in the first aspect, which will not be repeated here.

Description of drawings

1 is a schematic diagram of a socket cache SKB structure provided by an embodiment of the present application;

FIG. 2 is a schematic diagram of a message forwarding process according to an embodiment of the present application;

3a is a schematic diagram of the hardware architecture of a message forwarding system provided by an embodiment of the present application;

3b is a schematic diagram of the hardware architecture of still another message forwarding system provided by an embodiment of the application;

FIG. 4 is a schematic structural diagram of a memory chip according to an embodiment of the present application;

FIG. 5 is a schematic flowchart of a message caching method provided by an embodiment of the present application;

FIG. 6 is a schematic diagram of a process of packet buffering provided by an embodiment of the present application;

FIG. 7 is a schematic diagram of a message forwarding process according to an embodiment of the present application;

FIG. 8 is a schematic diagram of still another packet forwarding process provided by an embodiment of the present application;

FIG. 9 is a schematic structural diagram of a message buffering apparatus provided by an embodiment of the present application.

Detailed ways

The terms "first" and "second" in the description and drawings of the present application are used to distinguish different objects, or to distinguish different processing of the same object, rather than to describe a specific order of the objects. Furthermore, references to the terms "comprising" and "having" in the description of this application, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes other unlisted steps or units, or optionally also Include other steps or units inherent to these processes, methods, products or devices. It should be noted that, in the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations, or illustrations. Any embodiments or designs described in the embodiments of the present application as "exemplary" or "such as" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present the related concepts in a specific manner.

First, the technical terms involved in the embodiments of the present application are introduced:

1. Packet Fragmentation

After a packet is fragmented and divided into several segments, each segment is called a packet fragment. Exemplarily, in the case that the packet is directly forwarded by hardware without being transmitted through the TCP/IP protocol stack, the packet does not need to be fragmented.

2, the buffer (buffer)

The buffer area is the storage space for buffering packets. The cache area may be a storage space in a network interface card (NIC), or may be a storage space divided in other memories in the device where the network interface card is located, and is used to implement the function of buffering messages.

3. Socket buffer (SKB) structure

The SKB structure is a data structure in the transfer control protocol/internet protocol (TCP/IP) stack. An SKB structure includes a message field management data structure (sk_buff), a message shared information data structure (skb_shared_info), and a data packet buffer area (packet buff), as shown in Figure 1. The introduction of each part in the SKB structure is as follows:

3-1. The message field management data structure is the main data structure, and the size is usually 512 bytes. The fields in the message field management data structure can be, for example, but not limited to, the following fields:

First, after (next) data structure pointer field. The latter data structure pointer field indicates the address of the next message field management data structure of the current message field management data structure.

Second, the front (prev) data structure pointer field. Wherein, the previous data structure pointer field indicates the address of the previous message field management data structure of the current message field management data structure.

Third, the head (head) field. The header field is used to store the first address of the data packet buffer area.

Fourth, the tail (tail) field. Among them, the tail field is used to store the tail address of the actually stored packet content in the data packet buffer area.

Fifth, the end (end) field. The end field is used to store the end address of the data packet buffer area.

It should be noted that the header field, trailer field and end field occupy about 13 bytes. The message field management data structure also indicates the first address of the MAC header information, the first address of the IP header information, and the first address of the TCP header information.

3-2. The data packet buffer area is used to store the content of the message. Among them, the size of the packet buffer is determined based on the data volume of the packet content.

First, a media access control (media access control, MAC) header field. The MAC header information field is used to store control information of the MAC layer.

Second, an internet protocol (IP) header field. The IP header information field is used to store information such as a protocol version (version) number and an Internet header length (IHL).

Third, the transfer control protocol (TCP) header field. The TCP header information field is used to store information such as the source port number and the destination port number.

Fourth, the payload part. Among them, the payload part is used to store the content of the message.

3-3. The message sharing information data structure stores the fragmentation information of the message, and the size is usually 360 bytes. The introduction of the message sharing information data structure is as follows:

First, the fragmentation status indication field. The fragmentation status indication field indicates the fragmentation status of the packet.

Second, the fragmentation information field. The fragmentation information field carries fragmentation information of the packet.

Exemplarily, when the packet is fragmented, the fragmentation status indication field indicates that the packet in the data packet buffer is a fragmented packet, and the fragmentation information field carries fragmentation information of the packet.

Optionally, when the memory allocator is implemented as a memory allocate accelerator (MAA), the SKB structure further includes a MAA headroom, as shown in FIG. 1 . Among them, the MAA header space is used to store the information of the MAA.

Referring to Figure 2, after the modem (modem) receives the message, the modem applies for a memory chip to use the buffered message. Then, the modem sends the buffered message to the central processing unit to realize the local forwarding of the message. The specific process is shown by the dotted arrow in FIG. 2 . Alternatively, the modem sends buffered messages to other devices through a universal serial bus (USB) interface, so as to realize the transmission of messages between different devices. The specific process is shown by the solid arrows in FIG. 2 . Among them, the packets transmitted in Fig. 2 all adopt the SKB structure. The size of the packet buffer in the SKB structure can be 1024KB or 2048KB. In the case that the peak value of the data processed by the modem is 8.1Gbps, and the data amount included in each message is 1.5KB, the modem needs at least more than 50,000 message fields to manage the data structure.

With the introduction of a forwarding engine, most packets are forwarded to the network interface card through the forwarding engine, and then transmitted to other devices through the network medium. That is to say, in the process of packet forwarding, the packet does not pass through the Linux operating system and the TCP/IP protocol stack in the central processing unit, and the packet does not need to be fragmented. Therefore, in the case of using the SKB structure to transmit unfragmented packets, some fields in the packet sharing information data structure (such as fields carrying fragmentation information) are unnecessary, resulting in "waste of memory resources".

In view of this, an embodiment of the present application provides a message caching method, and the message caching method of the embodiment of the present application is applicable to various devices, such as mobile phones, tablet computers, desktops, laptops, super mobile personal computers ( Ultra-mobile personal computer, UMPC), handheld computer, netbook, personal digital assistant (personal digital assistant, PDA), server, network equipment, etc.

Referring to FIG. 3a, FIG. 3a is a schematic diagram of a hardware architecture of a message forwarding system 300 according to an embodiment of the present application. For ease of illustration, FIG. 3a only shows the main components of the message forwarding system 300 . The message forwarding system 300 may include a memory 301 and a memory allocator 302 . There is a communication connection between the memory 301 and the memory allocator 302 .

Among them, the memory 301 is mainly used to provide local memory, such as a memory slice for storing messages. Exemplarily, the memory 301 may be a read-only memory (read only memory, ROM) or a random access memory (random access memory, RAM). The RAM may be synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), or the like.

The memory allocator 302 manages local memory mainly by running or executing software programs and/or application modules. For example, after the modem receives the message, the memory allocator 302 determines the memory slice in which to store the message. For another example, after the network interface card forwards the message, the memory allocator 302 reclaims the memory slice that stores the message. Illustratively, memory allocator 302 may be implemented as a MAA.

It should be noted that, the above-mentioned memory 301 and memory allocator 302 may be separate devices, or may be combined. For example, in the case where the memory allocator 302 is included in the memory 301, the software program and/or application module for managing the local memory may run in the memory 301 to implement the function of managing the local memory. In the embodiments of the present application, "the memory 301 and the memory allocator 302 are separate devices" are used as an example for introduction.

Optionally, as a possible implementation form, in the case that the message forwarding system 300 forwards a message, FIG. 3b shows another schematic diagram of the hardware architecture of the message forwarding system 300 according to the embodiment of the present application. The message forwarding system 300 further includes a forwarding engine 303 , a network interface card 304 , a modem 305 , a central processing unit 306 and a bus 307 .

The forwarding engine 303 is mainly used for forwarding packets. For example, the forwarding engine 303 forwards the packet to the network interface card 304, so as to realize the transmission of the packet between devices. Alternatively, the forwarding engine 303 forwards the message to the central processing unit 306, so as to realize the transmission of the message inside the device. Exemplarily, the forwarding engine 303 may be implemented as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or a network processor (NP).

The network interface card 304 is mainly used to convert the transmitted message into a format that can be recognized by other devices in the network, and then transmit the message to the corresponding device through the network medium. Among them, the network interface card can also be described as a network card, a network interface controller (network interface controller, NIC), and the like.

The modem 305 is mainly used for sending and receiving various messages. Exemplarily, the modem 305 may be a modem that supports long term evolution (LTE) and new radio (NR) communication standards.

The central processing unit 306 is mainly used to run the operating system layer and the application layer in the software layer. The operating system layer includes operating system program codes and protocol stacks. The operating system may be a Linux operating system. A protocol stack refers to a collection of program codes that are divided according to different levels involved in a communication protocol and that process data at the corresponding level. The protocol stack may be a TCP/IP protocol stack. The data structure handled by the TCP/IP protocol stack is the SKB structure. The application layer includes at least one application.

The bus 306 is mainly used to connect the memory 301 , the memory allocator 302 , the forwarding engine 303 , the network interface card 304 , the modem 305 and the central processing unit 306 . The bus 306 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus or the like. The bus 306 can be divided into an address bus, a data bus, a control bus, and the like. For ease of presentation, only one thick line is used in FIG. 3b, but it does not mean that there is only one bus or one type of bus.

It can be understood that the above-mentioned hardware architectures shown in FIG. 3a and FIG. 3b are only for illustrating the technical solutions of the embodiments of the present application more clearly, and do not constitute a limitation to the technical solutions provided by the embodiments of the present application. Those of ordinary skill in the art know that with the evolution of the hardware architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

The packet caching method provided by the embodiment of the present application is specifically described below.

It should be noted that the names of the messages between the elements or the names of the parameters in the messages in the following embodiments of the present application are just an example, and other names may also be used in the specific implementation, which are described here in a unified manner, and will not be repeated below. .

The embodiment of the present application provides a message caching method, and the method uses a first memory slice to store an unfragmented target message. Wherein, the first memory slice includes a data packet buffer area, a first data structure and a second data structure. The packet buffer is used to carry the target packet. The first data structure includes a first field and a second field, the first field indicates that the target packet is not fragmented, and the second field carries the second data structure. The second data structure at least indicates the first address of the data packet buffer in the first memory slice. The first field can be described as a "fragmentation status indication field", the second field can be described as a "fragmentation information field", and the second field is a field that carries fragmentation information when the first field indicates packet fragmentation ,As shown in Figure 1. The second field is also a field that carries the second data structure when the first field indicates that the target packet is not fragmented, as shown in FIG. 4 . That is, when the target packet is not fragmented, there is no fragmentation information. The second field is used to carry the second data structure, and no memory chips are applied for the second data structure, so as to save memory resources. The second data structure may be a message field management data structure. For details, please refer to the introduction in the "SKB structure" section, which will not be repeated here.

Exemplarily, the packet buffering method according to the embodiment of the present application is applied in the packet forwarding process. Referring to Figure 5, the method includes the following steps:

S501. The modem receives the target message.

Exemplarily, the modem receives the target message from the access network device. In the case where the modem and the access network device support the LTE communication standard, the target message received by the modem is a message that satisfies the LTE message format. In the case where the modem and the access network device support the NR communication standard, the target message received by the modem is a message that satisfies the NR message format.

S502, the modem sends a target message to the memory allocator. Accordingly, the memory allocator receives the target message from the modem.

The target message is the message received in S501.

S503, the memory allocator determines the first memory slice.

Wherein, the first memory slice includes a data packet buffer area, a first data structure and a second data structure. The first data structure includes a first field and a second field, the first field indicates the fragmentation state of the packet in the data packet buffer, and the second field is used to carry the second data structure, as shown in FIG. 4 . The second field is a field that carries fragmentation information in the packet fragmentation state. The number of the second field may be one or more.

The location of the first data structure in the first memory slice is described as follows: the location of the first data structure in the first memory slice can be flexibly set. Exemplarily, the location of the first data structure in the first memory slice includes one of the following items: before the data packet buffer area (not shown in FIG. 4 and FIG. 6 ), or after the data packet buffer area. Certainly, the first data structure may also be located in other locations of the first memory slice, which is not limited in this embodiment of the present application. In addition, the storage space occupied by the data packet buffer area and the storage space occupied by the first data structure may be continuous or discontinuous. For example, the storage space between the data packet buffer area and the first data structure is greater than or equal to a preset value to support the subsequent evolution of the first data structure. For example, when a new field is added to the first data structure, the new field It can be stored in the above-mentioned "storage space spaced between the data packet buffer area and the first data structure". The unit of the preset value may be bits, bytes, or the like. The preset value may be any number of bytes from 50 to 100 bytes, or may be a certain number of bits.

Exemplarily, referring to FIG. 6 , the memory allocator determines the first memory slice in the local memory of the memory according to the message format of the target message and the data size of the target message. The size of the data packet buffer in the first memory slice may be 1024KB.

S504, the memory allocator fills the first memory slice with the target message.

Exemplarily, referring to the blocks filled with diagonal lines in the memory 301 in FIG. 7 , the memory allocation uses the target message to fill the data packet buffer area of the first memory slice. The first field of the first memory slice indicates that the target packet is not fragmented. The second field carries a second data structure, and the second data structure at least indicates the first address of the data packet buffer area in the first memory slice. In addition, the second data structure also indicates the first address of the header information of the message, such as the first address of the MAC header information, the first address of the IP header information and the first address of the TCP header information, as shown in the memory 301 of FIG. 7 , filled with slashes shown in the box.

S505, the memory allocator sends the first address of the header information to the forwarding engine. Correspondingly, the forwarding engine receives the first address of the header information from the memory allocator.

The header information may be, for example, but not limited to, MAC header information, IP header information, and TCP header information. The first address of the header information may be indicated by the second data structure. For details, please refer to the relevant introduction in the "SKB structure" section, which will not be repeated here.

S506: The forwarding engine determines the forwarding direction of the target packet according to the header information carried on the first address of the header information.

Exemplarily, the forwarding engine reads the header information carried on the first address of the header information, for example, reads the MAC header information, and determines the forwarding direction of the target packet according to the MAC header information. If the target packet is a packet sent to other devices, the forwarding engine determines that the forwarding direction is the port of the network interface card, such as a gigabit media access control (gigabit media access control, GMAC) port, and the forwarding engine executes S507. If the target packet is a packet sent to the device, the forwarding engine determines that the forwarding direction is the central processing unit, and the forwarding engine executes S511.

As a possible example, the situation of "using the network interface card to forward the target message" is shown in the dotted box of "Example 1" in Figure 5 and Figure 7, and the introduction of each step is as follows:

S507a, the forwarding engine sends the first address of the header information to the network interface card. Correspondingly, the network interface card receives the first address of the header information from the forwarding engine.

For the introduction of the first address of the header information, reference may be made to the relevant description of S505, which will not be repeated here.

S507b, the network interface card obtains the target packet according to the first address of the header information.

Exemplarily, the network interface card determines the storage address of the header information and the storage address of the data content according to the first address of the header information. The network interface card reads the header information of the target message from the storage address of the header information, and reads the data content of the target message from the storage address of the data content. In this way, the network interface card acquires the target packet to be forwarded.

S508, the network interface card sends the target message to the target device through the network medium. Correspondingly, the target device receives the target packet from the network interface card through the network medium.

The target device is the device corresponding to the destination address of the target packet.

Optionally, after the network interface card executes S508, in order to further improve the repeated utilization of memory resources, this embodiment of the present application further includes S509 and S510:

S509, the network interface card sends indication information 1 to the memory allocator. Accordingly, the memory allocator receives indication information 1 from the network interface card.

The indication information 1 indicates that the target packet has been forwarded.

S510, the memory allocator releases the first memory slice according to the indication information 1.

Exemplarily, the memory allocator deletes the information stored in the first memory slice according to the instruction information 1, and reclaims the first memory slice, so that the reclaimed memory resource stores other messages, so as to realize the management of the memory resource by the memory allocator. Wherein, the first memory slice after the deletion of the target message is shown as a box without diagonal lines in the memory 301 in FIG. 7 .

As another possible example, the situation of "forwarding the target message to the central processing unit of the device" is shown in the dotted box in "Example 2" in Figure 5 and Figure 8, and the steps are described as follows:

S511. The forwarding engine sends a request message to the central processing unit. Correspondingly, the central processor receives the request message from the forwarding engine.

The request message requests the target memory slice, so that the information stored in the first memory slice satisfies the SKB structure.

Optionally, the request message can also carry the first address of the header information, so that after the CPU applies for the target memory slice, according to the first address of the header information, copy the target message or part of the information of the target message to use the SKB structure to store. target message. For the introduction of the SKB structure, reference may be made to the relevant description of FIG. 1 , which will not be repeated here.

S512, the central processing unit determines the target memory slice according to the request message.

For example, as a first possible example, since the first memory slice includes a data packet buffer area, a first field and a second field, the central processing unit may determine that the target memory slice is the second memory slice. Wherein, the second memory slice is used to store the message field management data structure, and does not store the data packet buffer area and the message sharing information data structure. The message field management data structure is used to store the information of the second data structure. That is to say, the target memory slice that satisfies the SKB structure is composed of two memory slices, that is, the data packet buffer area and the message sharing information data structure are distributed in the first memory slice, and the message field management data structure is distributed in the second memory slice. piece.

For another example, as a second possible example, the central processing unit may determine that the target memory slice is the third memory slice. The third memory slice includes a data packet buffer area, a message field management data structure, and a message sharing information data structure. The message field management data structure is used to store information of the second data structure. That is to say, the target memory slice that satisfies the SKB structure is a memory slice, that is, the third memory slice.

S513, the central processing unit fills the target memory slice with target information.

For example, as a first possible example, when the target memory slice is implemented as a second memory slice, the target information is information stored in the second data structure. In this case, the central processor reads the information stored in the second data structure (or the second field) in the first memory slice according to the header information carried in the request message, and then stores the information in the second memory slice.

For another example, as a second possible example, when the target memory slice is implemented as a third memory slice, the target information is the information stored in the first memory slice. In this case, the central processor reads the information stored in the first memory chip according to the header information carried in the request message, and then stores the information in the third memory chip. For example, the information stored in the data packet buffer area of the first memory slice is copied to the data packet buffer area of the third memory slice, and the first data structure is restored to the message sharing information data structure, which is stored in the third memory slice, and the second data structure The stored information is copied to the message field management data structure of the third memory slice.

In this way, in the case where the central processor continues to use the TCP/IP protocol stack, the SKB structure can still be used to receive and process the message, and there is no need to adapt the data structure of the first memory slice. In the case of "the forwarding engine forwards the target message to the central processing unit of the device", in order to further improve the repeated utilization of memory resources, the embodiment of the present application further includes S514 and S515:

S514, the central processing unit sends instruction information 2 to the memory allocator. Correspondingly, the memory allocator receives the instruction information 2 from the central processing unit.

For example, in the above-mentioned first possible example, after the central processing unit copies the information stored in the second data structure to the second memory slice, the central processing unit sends indication information 2 to the memory allocator. The indication information 2 indicates that the first data structure is restored to the message sharing information data structure.

For another example, in the above-mentioned second possible example, after the central processing unit copies the information of the first memory slice to the third memory slice, the central processing unit sends the indication information 2 to the memory allocator. The indication information 2 indicates to release the first memory slice.

S515, the memory allocator processes the first memory slice according to the indication information 2.

Exemplarily, in the above-mentioned first possible example, the memory allocator deletes the second data structure according to the indication information 2, so that the second field carries the fragmentation information. In this case, the first data structure is implemented as a message sharing information data structure.

Exemplarily, in the second possible example above, the memory allocator releases the first memory slice according to the indication information 2, that is, deletes the information stored in the first memory slice, thereby reclaiming the first memory slice, so that the reclaimed memory The resource stores other target messages, so as to realize the management of memory resources by the memory allocator. Wherein, the data packet buffer area after the deletion of the target message is shown as a block without diagonal lines in the memory 301 in FIG. 8 .

In the message caching method provided by the embodiment of the present application, the first memory slice is used to store the unfragmented target message. Since the second field is a field that carries fragmentation information when the first field indicates packet fragmentation, the second field is also a field that carries the second data structure when the first field indicates that the target packet is not fragmented. field. That is to say, when the target packet is not fragmented, there is no fragmentation information, and the second field is used to carry the second data structure. The first address does not need to separately apply for a memory slice for the second data structure, thereby saving memory resources.

The foregoing mainly introduces the solutions provided by the embodiments of the present application from the perspective of interaction between various devices. Correspondingly, an embodiment of the present application further provides a message buffering device, and the message buffering device may be the memory allocator in the above method embodiments, or a component that can be used for the memory allocator. It can be understood that, in order to realize the above-mentioned functions, the message buffering apparatus includes corresponding hardware structures and/or software modules for executing each function. Those skilled in the art should easily realize that the present application can be implemented in hardware or a combination of hardware and computer software with the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein. Whether a function is performed by hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

FIG. 9 shows a schematic block diagram of a packet buffering apparatus provided in an embodiment of the present application. The message buffering apparatus 900 may exist in the form of software, or may be a device, or a component in a device (such as a chip system). The message buffering device 900 includes: a communication unit 901 and a processing unit 902 .

The communication unit 901 is an interface circuit of the message buffer device 900, and is used for receiving signals from or sending signals to other devices. For example, when the message buffering device 900 is implemented in the form of a chip, the communication unit 901 is an interface circuit used by the chip to receive signals from other chips or devices, or an interface circuit used by the chip to send signals to other chips or devices Interface Circuit.

The communication unit 901 may include a communication unit for communicating with the memory and a communication unit for communicating with other devices, and these communication units may be integrated together or independently implemented.

When the message buffering apparatus 900 is used to implement the function of "memory resource management", exemplarily, the communication unit 901 may be used to support the message buffering apparatus 900 to perform S502, S509, and S514 in FIG. 5, and/or be used for Additional procedures for the protocol described herein. The processing unit 902 may be configured to support the message buffering apparatus 900 to perform S503, S504, S510, S515 in FIG. 5, and/or other processes for the solutions described herein.

Optionally, the processing apparatus 900 may further include a storage unit for storing program codes and data of the processing apparatus 900, and the data may include but not limited to original data or intermediate data.

The processing unit 902 may be a processor or a controller, for example, a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various exemplary logical blocks, modules and circuits described in connection with this disclosure. A processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

The storage unit may be a memory. The memory may be the above-mentioned memory providing the first memory chip, or may be different from the above-mentioned memory providing the first memory chip.

When the processing unit 902 in the message buffer device 900 is implemented as a memory allocator, the storage unit in the message buffer device 900 is implemented as a memory, and the communication unit 901 in the message buffer device 900 is implemented as a communication interface, the embodiment of the present application The involved message forwarding system may be as shown in Fig. 3a or as shown in Fig. 3b.

Those of ordinary skill in the art can understand that: in the above-mentioned embodiments, all or part of them may be implemented by software, hardware, firmware or any combination thereof. When implemented in software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer may be a general purpose computer, special purpose computer, computer network, or other programmable device. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be downloaded from a website site, computer, server, or data center Transmission to another website site, computer, server, or data center by wire (eg, coaxial cable, optical fiber, digital subscriber line, DSL) or wireless (eg, infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that a computer can access, or a data storage device such as a server, a data center, or the like that includes an integration of one or more available media. The available media may be magnetic media (eg, floppy disk, hard disk, magnetic tape), optical media (eg, digital video disc (DVD)), or semiconductor media (eg, solid state disk (SSD)) )Wait.

In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical or other forms.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network devices. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each functional unit may exist independently, or two or more units may be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware, or can be implemented in the form of hardware plus software functional units.

From the description of the above embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software plus necessary general-purpose hardware, and of course hardware can also be used, but in many cases the former is a better implementation manner . Based on this understanding, the technical solutions of the present application can be embodied in the form of software products in essence, or the parts that make contributions to the prior art. The computer software products are stored in a readable storage medium, such as a floppy disk of a computer. , a hard disk or an optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application.

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and changes or substitutions within the technical scope disclosed in the present application should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

A message buffering method, characterized in that it is applied to a memory allocator of a message forwarding system; the message forwarding system further comprises a modem and a memory; the method comprises:

the memory allocator receives the target message from the modem;

The memory allocator stores the target message in the data packet buffer area of the first memory slice, wherein the first memory slice further includes a first data structure; the first data structure includes a first field and a first data structure. Two fields, the first field indicates that the target packet is not fragmented, the second field carries the second data structure, and the second field carries fragmentation information in the fragmented state of the target packet field, the second data structure at least indicates the first address of the data packet buffer area; the first memory slice is provided by the memory.
The method according to claim 1, wherein the position of the first data structure in the first memory slice comprises one of the following:

before the data packet buffer, or after the data packet buffer.
The method according to claim 1 or 2, wherein a storage space spaced between the data packet buffer and the first data structure is greater than or equal to a preset value.
The method according to any one of claims 1 to 3, wherein the method further comprises:

The memory allocator receives first indication information from a network interface card NIC, wherein the first indication information indicates that the target message has been forwarded, and the message forwarding system further includes the NIC;

The memory allocator releases the first memory slice according to the first indication information.
The method according to any one of claims 1 to 3, wherein the method further comprises:

The memory allocator receives second indication information from the central processing unit CPU, wherein the second indication information indicates that the first data structure is restored to a message sharing information data structure, and the CPU is used to apply for a target memory slice , the target memory slice is used to store the message field management data structure, and the message field management data structure at least indicates the first address of the data packet buffer area; the message forwarding system also includes the CPU;

The memory allocator deletes the second data structure according to the second indication information.
The method according to any one of claims 1 to 3, wherein the method further comprises:

The memory allocator receives third indication information from the CPU, wherein the third indication information indicates to release the first memory slice, the CPU is used to apply for a target memory slice, and the target memory slice is based on a socket The word cache SKB structure is determined; the SKB structure is used to store the information stored in the first memory chip; the message forwarding system also includes the CPU;

The memory allocator releases the first memory slice according to the third indication information.
A memory allocator, characterized in that it is applied to a message forwarding system; the message forwarding system further comprises a modem and a memory;

the memory allocator for receiving the target message from the modem;

The memory allocator is further configured to store the target message in the data packet buffer area of the first memory slice, wherein the first memory slice further includes a first data structure; the first data structure includes a first data structure. A field and a second field, the first field indicates that the target packet is not fragmented, the second field carries a second data structure, and the second field is carried in the fragmented state of the target packet A field of fragmentation information, the second data structure at least indicates the first address of the data packet buffer area; the first memory fragment is provided by the memory.
The memory allocator according to claim 7, wherein the position of the first data structure in the first memory slice includes one of the following:

before the data packet buffer, or after the data packet buffer.
The memory allocator according to claim 7 or 8, wherein a storage space spaced between the data packet buffer and the first data structure is greater than or equal to a preset value.
The memory allocator according to any one of claims 7 to 9, wherein,

The memory allocator is further configured to receive first indication information from a network interface card NIC, wherein the first indication information indicates that the target message has been forwarded, and the message forwarding system further includes the NIC;

The memory allocator is further configured to release the first memory slice according to the first indication information.
The memory allocator according to any one of claims 7 to 9, wherein,

The memory allocator is further configured to receive second indication information from the central processing unit CPU, wherein the second indication information indicates that the first data structure is restored to the message sharing information data structure, and the CPU is used for Applying for a target memory slice, the target memory slice is used to store a message field management data structure, and the message field management data structure at least indicates the first address of the data packet buffer area; the message forwarding system further includes the CPU;

The memory allocator is further configured to delete the second data structure according to the second indication information.
The memory allocator according to any one of claims 7 to 9, wherein,

The memory allocator is further configured to receive third indication information from the CPU, wherein the third indication information indicates to release the first memory slice, the CPU is used to apply for a target memory slice, and the target memory slice is determined based on the socket cache SKB structure; the SKB structure is used to store the information stored in the first memory chip; the message forwarding system also includes the CPU;

The memory allocator is further configured to release the first memory slice according to the third indication information.
A message forwarding system, comprising a modem, a memory allocator and a memory;

the memory allocator for receiving the target message from the modem;

The memory allocator is further configured to store the target message in the data packet buffer area of the first memory slice, wherein the first memory slice further includes a first data structure; the first data structure includes a first data structure. A field and a second field, the first field indicates that the target packet is not fragmented, the second field carries a second data structure, and the second field is carried in the fragmented state of the target packet A field of fragmentation information, the second data structure at least indicates the first address of the data packet buffer area; the first memory fragment is provided by the memory.
The message forwarding system according to claim 13, wherein the position of the first data structure in the first memory slice includes one of the following:

before the data packet buffer, or after the data packet buffer.
The message forwarding system according to claim 13 or 14, characterized in that, a storage space spaced between the data packet buffer and the first data structure is greater than or equal to a preset value.
The message forwarding system according to any one of claims 13 to 15, wherein,

The memory allocator is further configured to receive first indication information from a network interface card NIC, wherein the first indication information indicates that the target message has been forwarded, and the message forwarding system further includes the NIC;

The memory allocator is further configured to release the first memory slice according to the first indication information.
The message forwarding system according to any one of claims 13 to 15, wherein,

The memory allocator is further configured to receive second indication information from the central processing unit CPU, wherein the second indication information indicates that the first data structure is restored to the message sharing information data structure, and the CPU is used for Applying for a target memory slice, the target memory slice is used to store a message field management data structure, and the message field management data structure at least indicates the first address of the data packet buffer area; the message forwarding system further includes the CPU;

The memory allocator is further configured to delete the second data structure according to the second indication information.
The message forwarding system according to any one of claims 13 to 15, wherein,

The memory allocator is further configured to receive third indication information from the CPU, wherein the third indication information indicates to release the first memory slice, the CPU is used to apply for a target memory slice, and the target memory slice is determined based on the socket cache SKB structure; the SKB structure is used to store the information stored in the first memory chip; the message forwarding system also includes the CPU;

The memory allocator is further configured to release the first memory slice according to the third indication information.