WO2024037296A1

WO2024037296A1 - Protocol family-based quic data transmission method and device

Info

Publication number: WO2024037296A1
Application number: PCT/CN2023/109099
Authority: WO
Inventors: 陈建
Original assignee: 上海哔哩哔哩科技有限公司
Priority date: 2022-08-17
Filing date: 2023-07-25
Publication date: 2024-02-22
Also published as: CN115396528A

Abstract

The present invention provides a protocol family-based QUIC data transmission method and device. The protocol family-based QUIC data transmission method comprises: creating a QUIC data processing thread, a protocol family socket corresponding to the QUIC data processing thread, and a shared memory; forming a QUIC data processing path loop according to the shared memory and the protocol family socket; and transmitting QUIC data according to the QUIC data processing thread and the QUIC data processing path loop.

Description

QUIC data transmission method and device based on protocol suite

Cross-references to related applications

This application claims priority to the Chinese patent application filed with the China Patent Office on August 17, 2022, with application number 2022109883828 and titled "QUIC data transmission method and device based on protocol family", the entire content of which is incorporated herein by reference. Applying.

Technical field

The present disclosure relates to the field of Internet technology, and in particular to a QUIC data transmission method based on a protocol suite. The present disclosure also relates to a QUIC data transmission device based on the protocol suite, a computing device, and a computer-readable storage medium.

Background technique

With the development of computer technology, network data transmission has always attracted attention from academia and industry. Currently, in the Internet field, the network data transmission protocol architecture based on TCP protocol has always been in the mainstream position. However, with the evolution of technology and Application scenarios are gradually enriching, and some new network transmission protocols have emerged, including the QUIC protocol. The QUIC protocol is a low-latency Internet transport layer protocol based on the UDP protocol (User Data Packet Protocol). It is a connectionless transmission protocol.

Compared with TCP, the QUIC protocol improves the efficiency of network transmission and meets the application needs of more scenarios. It can handle more connections and achieve lower delays, etc. However, servers that use the QUIC protocol to communicate often bring problems. More performance overhead will consume machine computing resources to a greater extent, leading to increased costs, thus reducing the use of the QUIC protocol in larger-scale production scenarios.

Contents of the invention

In view of this, embodiments of the present disclosure provide a QUIC data transmission method based on the protocol suite. The present disclosure also relates to a QUIC data transmission device based on the protocol suite, a computing device, and a computer-readable storage medium, so as to solve the problem of high resource overhead existing in the prior art.

According to a first aspect of an embodiment of the present disclosure, a QUIC data transmission method based on a protocol suite is provided, including:

Create the QUIC data processing thread, the protocol family socket and shared memory corresponding to the QUIC data processing thread;

A QUIC data processing path ring is formed based on shared memory and protocol family sockets;

QUIC data is transmitted according to the QUIC data processing thread and QUIC data processing path ring.

According to a second aspect of the embodiment of the present disclosure, a protocol family-based QUIC data transmission method is provided. Transmission devices, including:

The creation module is configured to create a QUIC data processing thread, the protocol family socket and shared memory corresponding to the QUIC data processing thread;

The component module is configured to form a QUIC data processing path ring based on shared memory and protocol family sockets;

The transmission module is configured to transmit QUIC data according to the QUIC data processing thread and the QUIC data processing path ring.

According to a third aspect of an embodiment of the present disclosure, a computing device is provided, including a memory, a processor, and computer instructions stored in the memory and executable on the processor. When the processor executes the computer instructions, the desired Describe the steps of the QUIC data transmission method based on the protocol suite.

According to a fourth aspect of the embodiment of the present disclosure, a non-volatile computer-readable storage medium is provided, which stores computer instructions. When the computer instructions are executed by a processor, the QUIC data transmission method based on the protocol family is implemented. step.

According to a fifth aspect of an embodiment of the present disclosure, a computer program product is provided, the computer program product including a computing program stored on the above-mentioned non-volatile computer-readable storage medium.

The QUIC data transmission method based on the protocol family provided by this disclosure creates a QUIC data processing thread, a protocol family socket and shared memory corresponding to the QUIC data processing thread; a QUIC data processing path ring is formed based on the shared memory and the protocol family socket; ;Transmit QUIC data according to the QUIC data processing thread and QUIC data processing path ring. By constructing a QUIC data processing path ring, a ring buffer for processing QUIC data is generated, and the QUIC protocol stack and AF_XDP-based network data transmission are combined. There is no need to send QUIC data to the Linux kernel network protocol stack, thus reducing the CPU load of the terminal. , improving data transmission efficiency.

Figure overview

Figure 1 is a flow chart of a QUIC data transmission method based on a protocol suite provided by an embodiment of the present disclosure;

Figure 2 is an architectural schematic diagram of the QUIC data transmission method based on the protocol suite provided by an embodiment of the present disclosure;

Figure 3 is a processing flow chart of a protocol family-based QUIC data transmission method applied to the scenario of receiving data packets provided by an embodiment of the present disclosure;

Figure 4 is a processing flow chart of a protocol family-based QUIC data transmission method applied to the scenario of sending data packets provided by an embodiment of the present disclosure;

Figure 5 is a diagram of a QUIC data transmission device based on the protocol suite provided by an embodiment of the present disclosure. Structural diagram; and

FIG. 6 is a structural block diagram of a computing device provided by an embodiment of the present disclosure.

Preferred embodiments of the present disclosure

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, the present disclosure can be implemented in many other ways different from those described here. Those skilled in the art can make similar generalizations without violating the connotation of the present disclosure. Therefore, the present disclosure is not limited by the specific implementation disclosed below.

The terminology used in one or more embodiments of the present disclosure is for the purpose of describing particular embodiments only and is not intended to limit the one or more embodiments of the present disclosure. As used in one or more embodiments of this disclosure and the appended claims, the singular forms "a," "" and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that the term "and/or" as used in one or more embodiments of the present disclosure refers to and includes any and all possible combinations of one or more of the associated listed items.

It should be understood that although the terms first, second, etc. may be used to describe various information in one or more embodiments of the present disclosure, the information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of one or more embodiments of the present disclosure, the first may also be referred to as the second, and similarly, the second may also be referred to as the first. Depending on the context, the word "if" as used herein may be interpreted as "when" or "when" or "in response to determining."

First, noun terms involved in one or more embodiments of the present disclosure are explained.

UDP: User Datagram Protocol, a connectionless transport protocol.

QUIC: A low-latency Internet transport layer protocol based on UDP.

eBPF: An extended version of the Berkeley Packet Filter, a user-written program that can run in the Linux kernel.

XDP: Fast Data Path is an eBPF hook in the Linux network processing process. It can mount the eBPF program and process the network data packets when they arrive at the network card driver layer.

AF_XDP: AF_XDP is a set of protocol suites designed for high-performance data processing based on XDP.

QUIC (Quick UDP Internet Connection) is a set of transmission protocols based on UDP, which implements reliable UDP transmission. The purpose is to ensure reliability while reducing network delay, because UDP is a simple transmission protocol, and based on UDP, you can get rid of TCP transmission confirmation. , retransmission slow start and other factors, only one RTT (Round-Trip Time) delay is needed to establish a reliable and secure connection. QUIC is freely used by the client based on UDP, as long as there is a server that can connect.

The implementation of the QUIC protocol requires a lot of interaction between the user layer, user space and system kernel space, which leads to an increase in system load. In addition, a large number of encryption and reliability delivery processes when the QUIC protocol is running also increases the load on the CPU. Therefore, most servers currently implementing the QUIC protocol suffer from excessive CPU load.

In practical applications, by analyzing the performance of the QUIC protocol, we found that QUIC has the following problems:

1. Password-related algorithms have high overhead: For small data packets, the RAS algorithm (asymmetric encryption algorithm) accounts for a high proportion of calculations. For large data packets, symmetric encryption and decryption will also occupy about 15% of the system overhead. .

2. The overhead of sending and receiving UDP packets is high: Especially for large file downloads, SendMsg accounts for a high proportion, which may reach more than 35%-40%.

3. The protocol stack has high overhead: mainly affected by the protocol stack implementation, such as ACK processing, MTU detection and packet size, memory management and copying, etc.

The full name of eBPF is "Extended Berkeley Packet Filter". It is a program written by users that can be run in the Linux kernel. One of the hooks of the eBPF program in the network processing flow in the kernel code is XDP. In other words, XDP can be used in the network Data packets are processed when they arrive at the network card driver layer. AF_XDP is a new protocol family implemented based on XDP, which can achieve fast and efficient data reception and transmission.

Based on this, in the present disclosure, a QUIC data transmission method based on the protocol family is provided. The disclosure also relates to a QUIC data transmission device based on the protocol family, a computing device, and a computer-readable storage medium. In the following implementation Each example is explained in detail.

Figure 1 shows a flow chart of a QUIC data transmission method based on the protocol suite provided according to an embodiment of the present application, which specifically includes the following steps:

Step 102: Create a QUIC data processing thread, the protocol family socket and shared memory corresponding to the QUIC data processing thread.

Among them, the QUIC data processing thread specifically refers to the thread used to process QUIC data. The QUIC data processing thread usually includes a QUIC data packet receiving module, a QUIC core protocol stack, and a QUIC data packet sending module. The QUIC data packet receiving module is used to receive QUIC data packets and send the data packets to the QUIC core protocol stack for processing. When the QUIC data packet needs to be sent out, the QUIC core protocol stack generates a UDP message, which is generated by the QUIC data packet. The sending module sends it out. In actual applications, the number of QUIC data processing threads can be one, two or more.

Correspondingly, each QUIC data thread corresponds to a protocol family socket (AF_XDP Socket). AF_XDP Socket is created by the basic socket() system call and includes 2 ring buffers (ring): RX ring (receiving ring) and TX ring (transmitting ring). Rx ring and TX ring are responsible for receiving and sending socket data packets respectively, and are registered and allocated sizes by setsockopts XDP_RX_RING and XDP_TX_RING respectively.

The Rx ring and TX ring descriptors point to a data cache called UMEM in memory, which is the shared memory. The Rx ring and TX ring can share the same UMEM so that packets do not need to be copied between the Rx ring and TX ring.

Shared memory (UMEM) consists of many chunks of the same size. The descriptor in the ring refers to the data frame by referencing the address of the data frame, and this address is the offset in the entire UMEM memory domain. There are also two rings in UMEM, namely the Fill ring and the Completion ring. The application uses the Fill ring to send the address to the kernel to fill it with data packets. Once the data packet is received, these data frames The reference will appear in the RX ring. The Completion ring contains the address of the data frame that has been transferred by the kernel and can be used by user space.

The QUIC data transmission method based on the protocol family provided by this disclosure applies AF_XDP technology to the data transmission process in the QUIC server and combines the AF_XDP technology to improve the transmission efficiency of QUIC data packets and reduce the CPU load.

In actual applications, the server that deploys QUIC data processing threads usually adopts a multi-threaded architecture, that is, multiple QUIC data processing threads are set up in one server. Since it is used to process the transmission task of QUIC data, it needs to use To the network card, the settings of the QUIC data processing thread are related to the network card. Specifically, create the QUIC data processing thread, the protocol family socket and shared memory corresponding to the QUIC data processing thread, including:

Determine the number of network card hardware queues in the network card;

Create a corresponding number of QUIC data processing threads based on the number of network card hardware queues;

Create protocol family sockets and shared memory corresponding to each QUIC data processing thread.

Among them, the network card hardware queue is a technology used to solve the problem of network IO service quality. As the bandwidth of network IO continues to increase, a single-core CPU cannot fully meet the needs of the network card. Through the support of multi-queue network card drivers, each Queues are bound to different cores through interrupts to meet the needs of the network card.

In practical applications, the number of QUIC data processing threads is usually determined based on the total number of network card hardware queues. For example, if there are 8 network card hardware queues, 8 QUIC data processing threads can be set; if the number of network card hardware queues is 4 , you can set up 4 QUIC data processing thread.

After creating a corresponding number of QUIC data processing threads based on the number of network card hardware queues, create a shared memory and protocol family socket for each QUIC data processing thread. Take for example that there are two QUIC data processing threads, namely QUIC thread 1 and QUIC thread 2. Create corresponding UMEM1 and AF_XDP socket 1 for QUIC thread 1, and create corresponding UMEM2 and AF_XDP socket 2 for QUIC thread 2. .

It should be noted that since UMEM is a shared memory, in actual applications, each QUIC thread can use the same UMEM, different QUIC threads can use different UMEM, or several QUIC threads can use one For the same UMEM, the number of shared memories is not limited in this disclosure, and the actual reference shall prevail. In this disclosure, it is necessary to ensure that there is a one-to-one correspondence between the QUIC data processing thread and the protocol family socket.

In a specific implementation provided by the present disclosure, taking the number of network card hardware queues as 8 as an example, 8 QUIC data processing threads are created, and corresponding protocol family sockets are created for each QUIC data processing thread, for a total of 8 AF_XDP, divides 8 shared memories at the same time, and allocates one shared memory to each QUIC data processing thread, for a total of 8 UMEMs.

In another specific implementation provided by the present disclosure, taking the number of network card hardware queues as 8 as an example, 8 QUIC data processing threads are created, and corresponding protocol family sockets are created for each QUIC data processing thread, for a total of 8 AF_XDP, 1 shared memory is divided at the same time, 8 QUIC data processing threads share this 1 UMEM, a total of 1 UMEM.

In another specific implementation provided by the present disclosure, taking the number of network card hardware queues as 8 as an example, 8 QUIC data processing threads are created, and corresponding protocol family sockets are created for each QUIC data processing thread, for a total of 8 AF_XDP is divided into 2 shared memories, and every 4 QUIC data processing threads share 1 UMEM, for a total of 2 UMEMs.

Step 104: Form a QUIC data processing path ring based on shared memory and protocol family sockets.

Among them, the QUIC data processing path ring specifically refers to the ring used to process QUIC data. In practical applications, QUIC data transmission processing includes two categories, one is to receive QUIC data, and the other is to send QUIC data. Receiving and sending are two different QUIC data processing paths.

Specifically, the QUIC data processing path ring is composed of shared memory and protocol family sockets, including:

Obtain the filling ring and completion ring in the shared memory, and obtain the receiving ring and sending ring in the protocol family socket. The filling ring is used to receive the position offset information of the QUIC received data expected to be saved in the shared memory, and the completion ring It is used to receive the position offset information in the shared memory after the QUIC sent data is successfully sent. The receiving ring is used to receive the position offset information of the QUIC received data in the shared memory. The sending ring is used to receive the position offset information of QUIC sending data in the shared memory;

The QUIC data receiving path ring is formed according to the filling ring and the receiving ring, and the QUIC data transmitting path ring is formed according to the completion ring and the sending ring.

Among them, the filling ring and completion ring in the shared memory specifically refer to the Fill ring (filling ring) and Completion ring (completion ring) in UMEM; the receiving ring and sending ring in the protocol family socket specifically refer to the AF_XDP Socket. RX ring (receiving ring) and TX ring (transmitting ring). Fill ring, completion ring, receive ring and send ring are all ring buffers, which are a data structure used to represent a fixed-size, end-to-end buffer, suitable for caching data streams. The characteristic of a circular buffer is that when one data element is used, the remaining data elements do not need to move their storage locations.

The filling ring is used to receive the position offset information of the QUIC received data that is expected to be saved in the shared memory. The completion ring is used to receive the position offset information in the shared memory after the QUIC sent data is successfully sent. The receiving ring is used to receive the QUIC received data. The position offset information in the shared memory, the sending ring is used to receive the position offset information of the QUIC sent data in the shared memory.

In practical applications, the Fill ring (filling ring) and the RX ring (receiving ring) form the QUIC data receiving path ring for receiving QUIC data; the Completion ring (completion ring) and the TX ring (transmitting ring) form the QUIC data receiving path ring for sending QUIC data transmission path ring for QUIC data.

The QUIC data receiving path ring is used to receive QUIC data. When QUIC data arrives, the QUIC data can be received into the QUIC core protocol stack through this path.

The QUIC data sending path ring is used to send QUIC data. When QUIC data is generated through the QUIC core protocol stack, the QUIC data is sent to the network through this path.

Step 106: Transmit QUIC data according to the QUIC data processing thread and QUIC data processing path ring.

After constructing the above-mentioned QUIC data processing path, the architecture provided by the embodiment of the present disclosure is completed, and QUIC data can be transmitted through the QUIC data processing thread and QUIC data processing path ring.

Referring to Figure 2, Figure 2 shows a schematic architectural diagram of a QUIC data transmission method based on a protocol suite provided by an embodiment of the present disclosure. The schematic diagram uses two QUIC data processing threads as an example for explanation.

In this implementation, if the number of network card queues in the network card is 2, a corresponding QUIC data processing thread is created for each network card queue, namely thread 1 and thread 2. Each thread includes a QUIC data packet receiving module. , QUIC core protocol stack, QUIC data packet sending module. At the same time, a corresponding UMEM and XDP Socket are created for each thread. There are RX ring and TX ring set in XDP Socket, and Fill ring and Completion ring set in UMEM.

Taking thread 1 as an example, Fill ring (filling ring) and RX ring (receiving ring) form a QUIC data receiving path ring for receiving QUIC data. Among them, the QUIC data receiving path ring is the receiving rule of QUIC data; Completion ring( The completion ring) and the TX ring (transmission ring) form the QUIC data transmission path ring used to send QUIC data, in which the QUIC data reception path ring is the transmission rule of QUIC data.

After the QUIC data receiving path ring and the QUIC data sending path ring are generated, QUIC data can be received and QUIC data can be sent out according to these two path rings.

The transmission of QUIC data according to the QUIC data processing thread and QUIC data processing path ring will be further explained below by receiving QUIC data and sending QUIC data respectively.

The following will explain how to receive QUIC data according to the QUIC data processing thread and the QUIC data receiving path ring when receiving QUIC data through Embodiment 1.

It should be noted that in the embodiments provided by the present disclosure, QUIC data needs to be processed. QUIC data specifically refers to the data required for QUIC services. In practical applications, there are many types of data received by the terminal. This implementation The data that the example needs to target is QUIC data, so the QUIC data needs to be filtered out in advance.

Based on this, before receiving the QUIC data according to the QUIC data processing thread and the QUIC data receiving path ring, the method also includes:

Receive data to be processed;

Determine whether the data to be processed is QUIC received data;

If so, redirect the QUIC receive data to the QUIC data receive path ring;

If not, the data to be processed is transmitted to the kernel protocol stack.

Among them, the data to be processed specifically refers to the data received by the terminal. In actual applications, all data will be received by the network card and then assigned to the network card queue. The XDP program is an eBPF hook that can be received at the network card driver layer. The data to be processed is obtained before the network card driver distributes the data to be processed to the kernel protocol stack, and determines whether the data to be processed is QUIC received data. Among them, the QUIC received data refers to the data required by the above QUIC service. , after judgment, if it is determined that the data to be processed is QUIC received data, the QUIC received data will be redirected to the QUIC data receiving loop path, and the data transmission process of the method provided by this disclosure will be executed; if it is determined that the data to be processed is not QUIC When the data required by the service is served, the data to be processed is normally transmitted to the CPU core protocol stack for processing, which will not be described again here.

Next, how to determine whether the data to be processed is QUIC data will be further explained. Specifically, determining whether the data to be processed is QUIC received data includes:

Parse the data to be processed and obtain the data service port carried in the data to be processed;

Determine whether the data service port is the service port corresponding to the QUIC data processing thread.

In actual applications, each data to be processed arriving at the terminal network card from the network will include data header information. The data header information will carry the service port corresponding to the data to be processed. Multiple devices will be deployed in the terminal. Data service ports, such as port 3306, port 1433, port 1521, port 80, etc. Each port corresponds to a different business service. Similarly, the QUIC service will also have a corresponding service port in the terminal. For example, in this disclosure Make sure that the service port used by the QUIC data processing thread corresponding to the QUIC service is port A, then all data sent to port A is QUIC received data.

Therefore, after obtaining the data to be processed, the data header of the data to be processed needs to be parsed to obtain the data service port carried in the data to be processed. The data service port specifically refers to the service port in the terminal to which the data to be processed needs to be sent. , after obtaining the data service port, just determine whether the data service port matches the service port corresponding to the QUIC data processing thread. If the data service port matches the service port corresponding to the QUIC data processing thread, it means that the data to be processed is QUIC Receive data, otherwise, the data to be processed is not QUIC received data.

In the specific implementation provided by this disclosure, taking the service port corresponding to the QUIC service as the A port as an example, if the data service port carried in the data to be processed is the A port, it means that the data to be processed is QUIC receiving data; If the data service port carried in the processed data is port B, it means that the data to be processed is not QUIC received data.

After determining which data QUIC receives data, the method provided by this disclosure is used to receive QUIC received data. Specifically, QUIC data is received according to the QUIC data processing thread and QUIC data receiving path ring, including R1-R4:

R1. Fill the first address descriptor into the filling ring based on the QUIC data processing thread, where the first address descriptor is the address offset information of the shared memory.

After determining the QUIC reception data, the QUIC reception data needs to be redirected to the QUIC data reception path ring. Specifically, the QUIC data packet receiving module in the QUIC data processing thread needs to put the first address descriptor of the packet to be received into the Fill ring in UMEM. The first address descriptor is specifically the address of the data frame in UMEM. offset information. The first address descriptor is specifically an offset in the entire UMEM memory domain, and the first address descriptor is used to instruct the system into which data frame in UMEM to store the QUIC received data. In this process, the QUIC thread is the producer of the Fill ring. What is saved in the Fill ring is the location information where the QUIC thread expects QUIC to receive the data to be saved.

In this embodiment, the QUIC data packet receiving module in the QUIC data processing thread puts the first address descriptor a that is to receive the QUIC received data into the Fill ring in advance.

R2. Write the QUIC received data to the shared memory according to the first address descriptor.

When redirecting QUIC receive data to the QUIC data receive path ring, specifically it means that the QUIC receive data needs to be redirected to the pre-allocated UMEM. Which location in the UMEM should be written specifically? It needs to be determined based on the first address descriptor, that is, the QUIC received data is written into the data frame in UMEM according to the first address descriptor in the Fill ring. In actual applications, the kernel driver consumes the Fill ring, obtains the first address descriptor in the Fill ring, collects QUIC data, and writes the QUIC data into UMEM according to the first address descriptor. . In this process, the kernel driver is the consumer of the Fill ring.

In this embodiment, the kernel driver writes the QUIC received data into the data frame corresponding to the first address descriptor a in the shared memory based on the first address descriptor a.

R3. When the writing of the QUIC received data is completed, write the data memory address of the QUIC received data in the shared memory to the receiving ring.

When the operation of writing the QUIC received data into the shared memory is completed, the reference of the corresponding data frame will be written to the RX ring, which stores the actual data memory address of the QUIC received data in the shared memory. It should be noted that the size occupied by QUIC received data may occupy one or more data frames in UMEM, which will be recorded in the RX ring. In actual applications, this step of operation is also performed by the kernel driver. That is, after the kernel driver completely writes the QUIC data into UMEM, it will write the data memory address in UMEM into the RX ring for The QUIC thread reads the data memory address. It should be noted that when the kernel driver writes QUIC data to UMEM and completes it, the data memory address of the QUIC data in UMEM will be written to the RX ring, and the first address in the Fill ring will be described. symbol is deleted. During this process, the kernel driver is the producer of the RX ring.

In this embodiment, the starting position of QUIC received data is a, which occupies 4 data frames, and the ending position is b. After the QUIC data is written into UMEM, the kernel driver writes the QUIC received data into the data memory corresponding to Addresses a-b are written to the RX ring. Used to determine the actual location of QUIC received data in UMEM.

R4. Based on the QUIC data processing thread, read the data memory address in the receiving ring, and read the QUIC receiving data from the shared memory according to the data memory address.

When the kernel driver writes the data memory address to the RX ring, the QUIC data processing thread can read the QUIC reception data from the shared memory according to the data memory address. The specific QUIC data packet reception module in the QUIC data processing thread Read the data memory address in the RX ring through the calling method provided by libbpf. And obtain the QUIC reception data from the shared memory according to the data memory address. It should be noted that at this time the QUIC data processing thread is the consumer of the RX ring. When the QUIC data processing thread reads the data memory address from the RX ring, the data memory address will be deleted from the RX ring. After receiving the QUIC received data, the QUIC data processing thread decapsulates the QUIC received data according to the Ethernet layer, IP layer, and UDP layer, and passes it to the QUIC core protocol stack for further processing. During this process, the QUIC data processing thread is the consumer of the RX ring.

At this point, the processing flow of QUIC receiving data is completed. Through the method provided by this disclosure, when the QUIC received data arrives at the terminal, the QUIC data is redirected to the QUIC data receiving path ring for data reception processing. There is no need to pass the QUIC received data through the Linux kernel network protocol stack, which effectively reduces the CPU load of the terminal. , improving data transmission efficiency.

The following will explain how to send QUIC data according to the QUIC data processing thread and the QUIC data sending path ring when sending QUIC data through Embodiment 2.

Specifically, QUIC data is sent according to the QUIC data processing thread and QUIC data sending path ring, including S1-S4:

S1. Generate QUIC sending data based on the QUIC data processing thread.

When the QUIC service needs to send QUIC data, it needs to generate QUIC sending data in the QUIC data processing thread. Further, the QUIC data is generated by the QUIC core protocol stack, and the QUIC data is encapsulated through the UDP layer, IP layer, and Ethernet layer. Generate QUIC send data.

S2. Write the QUIC send data to the shared memory, and write the second address descriptor of the QUIC send data in the shared memory to the sending ring.

The QUIC data processing thread writes the QUIC transmission data into UMEM. After the writing is completed, the second address descriptor of the QUIC transmission data in UMEM is written into the TX ring. During this process, the QUIC data processing thread is the producer of the TX ring. The second address descriptor specifically refers to the position offset information of the QUIC sent data in the shared memory.

S3. Read the second address descriptor in the sending ring, read and send the QUIC sending data according to the second address descriptor.

The kernel driver reads the second address descriptor in the TX ring, calls sendto to notify the network card driver to read the QUIC send data according to the address descriptor, and the network card driver reads the QUIC send data packet in UMEM according to the address descriptor, and sends the QUIC Send data to the network. During this process, the kernel driver is the consumer of the TX ring.

S4. When the QUIC transmission data is completed, write the second address descriptor to the completion ring.

After the kernel driver has sent all the QUIC send data to the network, it has completed sending the QUIC send data and needs to write back the second address descriptor to the Completion ring for marking. It is recognized that the QUIC send data has been sent. During this process, the kernel driver is the producer of the Completion ring.

Afterwards, the QUIC data processing thread can read the address descriptor in the Completion ring and know that the QUIC data has been sent. During this process, the QUIC data processing thread is the consumer of the Completion ring.

At this point, the processing flow of QUIC sending data is completed. Through the method provided by this disclosure, when sending data, the QUIC protocol encapsulates and generates QUIC sending data packets according to the protocol stack hierarchy, and cooperates with the kernel driver to send the QUIC sending data packets to the network card driver, and sends QUIC through the network card When data is sent to the network, there is also no need to send QUIC data through the Linux kernel network protocol stack, which effectively reduces the CPU load of the terminal and improves data transmission efficiency.

The QUIC data transmission method based on the protocol family provided by the embodiment of the present disclosure creates a QUIC data processing thread, a protocol family socket and shared memory corresponding to the QUIC data processing thread; a QUIC data processing path is formed based on the shared memory and the protocol family socket Ring; transmits QUIC data according to the QUIC data processing thread and QUIC data processing path ring. By building a QUIC data processing path ring, a ring buffer for processing QUIC data is generated, and the QUIC protocol stack and AF_XDP-based network data transmission are combined. There is no need to send QUIC data to the Linux kernel network protocol stack, thus reducing the CPU load of the terminal. , improving data transmission efficiency.

The QUIC data transmission method based on the protocol family will be further described below with reference to Figure 3, taking the application of the QUIC data transmission method based on the protocol family provided by the present disclosure in the scenario of receiving data packets as an example. Among them, Figure 3 shows a processing flow chart of a QUIC data transmission method based on the protocol suite applied to the scenario of receiving data packets provided by an embodiment of the present disclosure, which specifically includes the following steps:

Step 302: Receive data to be processed.

In this embodiment, the network card queue receives the data to be processed, and the XDP program obtains the data to be processed before the network card driver distributes the data to be processed to the kernel protocol stack.

Step 304: Parse the data to be processed and obtain the data service port carried in the data to be processed.

In this embodiment, the kernel driver parses the data to be processed and obtains that the data service port carried in the data to be processed is 443.

Step 306: Determine whether the data service port is the service port corresponding to the QUIC service. If not, execute step 308. If yes, execute step 310.

In this embodiment, the kernel driver determines whether port 443 is the service port corresponding to the QUIC service. If so, the operation of step 310 is performed. If not, the operation of step 308 is performed.

Step 308: Pass the data to be processed to the kernel protocol stack.

In this embodiment, if the data to be processed is not data corresponding to the QUIC service, the data Passed to the kernel protocol stack through normal processing.

Step 310: Redirect the data to be processed to the QUIC data receiving path ring.

In this embodiment, if the data to be processed is data corresponding to the QUIC service, the kernel driver redirects the data to be processed to the pre-established QUIC data receiving path ring.

Step 312: Control the RX ring and Fill ring to collect the data to be processed, and store the data to be processed in UMEM.

In this embodiment, the data packet receiving module in the QUIC thread stores the packet receiving address in UMEM used to receive the data to be processed in the Fill ring in advance, and the kernel driver notifies the network card driver to collect the data to be processed through system calls such as poll. operation, the kernel driver stores the data to be processed into the packet receiving address in UMEM. When the data to be processed is completely received into UMEM, the kernel driver will write the memory address of the data to be processed into the RX ring.

Step 314: The QUIC data packet receiving module reads the data to be processed from UMEM.

In this embodiment, the data packet receiving module reads the memory address in the RX ring through the calling method provided by libbpf, and reads the data to be processed into the QUIC thread.

Step 316: Decapsulate the data to be processed, and pass the decapsulated data to the QUIC core protocol stack.

In this embodiment, the data packet receiving module decapsulates the data to be processed according to the Ethernet layer, IP layer, and UDP layer, and transfers the data obtained after decapsulation to the QUIC core protocol stack for further processing.

Through the method provided by this disclosure, when the QUIC received data arrives at the terminal, the QUIC data is redirected to the QUIC data receiving path ring for data reception processing. There is no need to pass the QUIC received data through the Linux kernel network protocol stack, which effectively reduces the CPU load of the terminal. , improving data transmission efficiency.

The QUIC data transmission method based on the protocol family will be further described below with reference to Figure 4, taking the application of the QUIC data transmission method based on the protocol family provided by the present disclosure in the scenario of sending data packets as an example. Among them, Figure 4 shows a processing flow chart of a QUIC data transmission method based on the protocol suite applied to the scenario of sending data packets provided by an embodiment of the present disclosure, which specifically includes the following steps:

Step 402: The QUIC core protocol stack generates QUIC data packets.

In this embodiment, when the QUIC service wants to send data, a QUIC data packet is generated through the QUIC core protocol stack.

Step 404: Encapsulate the QUIC data packet to generate data to be sent.

In this embodiment, the QUIC service passes QUIC data packets through the UDP layer, IP layer, and Ethernet The layer encapsulates the data and obtains the data to be sent.

Step 406: Write the data to be sent into UMEM, and write the address descriptor of the data to be sent in UMEM into the TX ring.

In this embodiment, the data packet sending module in the QUIC thread writes the data to be sent into UMEM. After the writing is completed, the address descriptor of the data to be sent in UMEM is written into the TX ring.

Step 408: Read the address descriptor in the TX ring, and publish the data to be sent to the network based on the address descriptor.

In this embodiment, the kernel driver reads the address descriptor in the TX ring, calls sendto to notify the network card driver to read the data to be sent based on the address descriptor, and the network card driver reads the data to be sent in UMEM based on the address descriptor. data and sends the data to be sent to the network.

Step 410: After the data to be sent is sent, write the address descriptor to the Completion ring.

In this embodiment, after detecting that the data to be sent has been sent, the kernel driver writes the address descriptor into the Completion ring to identify that the data to be sent has been sent. When the QUIC data processing thread reads that the address descriptor exists in the Completion ring, it can know that the data to be sent has been sent successfully.

Through the method provided by this disclosure, when sending data, the QUIC protocol encapsulates and generates QUIC sending data packets according to the protocol stack hierarchy, and cooperates with the kernel driver to send the QUIC sending data packets to the network card driver, and sends QUIC through the network card When data is sent to the network, there is also no need to send QUIC data through the Linux kernel network protocol stack, which effectively reduces the CPU load of the terminal and improves data transmission efficiency.

Corresponding to the above embodiment of the QUIC data transmission method based on the protocol family, the present disclosure also provides an embodiment of the QUIC data transmission device based on the protocol family. Figure 5 shows a QUIC data transmission device based on the protocol family provided by an embodiment of the present disclosure. Structural diagram of data transmission device. As shown in Figure 5, the device includes:

The creation module 502 is configured to create a QUIC data processing thread, a protocol family socket and shared memory corresponding to the QUIC data processing thread;

The composition module 504 is configured to form a QUIC data processing path ring based on shared memory and protocol family sockets;

The transmission module 506 is configured to transmit QUIC data according to the QUIC data processing thread and the QUIC data processing path ring.

Optionally, the creation module 502 is further configured as:

Determine the number of network card hardware queues in the network card;

Optionally, component module 504 is further configured as:

Obtain the filling ring and completion ring in the shared memory, and obtain the receiving ring and sending ring in the protocol family socket. The filling ring is used to receive the position offset information of the QUIC received data expected to be saved in the shared memory, and the completion ring It is used to receive the position offset information of the QUIC sent data in the shared memory after it is successfully sent. The receiving ring is used to receive the position offset information of the QUIC received data in the shared memory. The sending ring is used to receive the position offset information of the QUIC sent data in the shared memory. Position offset information;

Optionally, the transmission module 506 includes:

The receiving unit is configured to receive QUIC data according to the QUIC data processing thread and the QUIC data receiving path ring, where the QUIC data receiving path ring is the receiving rule of QUIC data;

The sending unit is configured to send QUIC data according to the QUIC data processing thread and the QUIC data sending path ring, where the QUIC data receiving path ring is the sending rule of QUIC data.

Optionally, the receiving unit is also configured to:

Receive data to be processed;

Determine whether the data to be processed is QUIC received data;

If so, redirect the QUIC receive data to the QUIC data receive path ring;

If not, the data to be processed is transmitted to the kernel protocol stack.

Optionally, the receiving unit is further configured as:

Fill the first address descriptor into the filling ring based on the QUIC data processing thread, where the first address descriptor is the address offset information of the shared memory;

Write the QUIC received data to the shared memory according to the first address descriptor;

When the writing of QUIC receiving data is completed, write the data memory address of the QUIC receiving data in the shared memory to the receiving ring;

Based on the QUIC data processing thread, the data memory address in the receiving ring is read and processed according to the data content. The storage address reads QUIC receive data from shared memory.

Optionally, the sending unit is further configured as:

Generate QUIC sending data based on the QUIC data processing thread;

Write the QUIC send data to the shared memory, and write the second address descriptor of the QUIC send data in the shared memory to the send ring;

Read the second address descriptor in the sending ring, read and send QUIC sending data according to the second address descriptor;

When the QUIC transmission data transmission is completed, the second address descriptor is written to the completion ring.

The QUIC data transmission device based on the protocol family provided by the embodiment of the present disclosure creates a QUIC data processing thread, a protocol family socket and a shared memory corresponding to the QUIC data processing thread; a QUIC data processing path is formed based on the shared memory and the protocol family socket Ring; transmits QUIC data according to the QUIC data processing thread and QUIC data processing path ring. By constructing a QUIC data processing path ring, a ring buffer for processing QUIC data is generated, and the QUIC protocol stack and AF_XDP-based network data transmission are combined. There is no need to send QUIC data to the Linux kernel network protocol stack, thus reducing the CPU load of the terminal. , improving data transmission efficiency.

The above is a schematic solution of a QUIC data transmission device based on the protocol suite in this embodiment. It should be noted that the technical solution of the protocol family-based QUIC data transmission device belongs to the same concept as the above-mentioned technical solution of the protocol family-based QUIC data transmission method. The technical solution of the protocol family-based QUIC data transmission device is not described in detail. For details, please refer to the description of the technical solution of the QUIC data transmission method based on the protocol suite mentioned above.

FIG. 6 shows a structural block diagram of a computing device 600 according to an embodiment of the present disclosure. Components of the computing device 600 include, but are not limited to, memory 610 and processor 620 . The processor 620 and the memory 610 are connected through a bus 630, and the database 650 is used to save data.

Computing device 600 also includes an access device 640 that enables computing device 600 to communicate via one or more networks 660 . Examples of these networks include the Public Switched Telephone Network (PSTN), a local area network (LAN), a wide area network (WAN), a personal area network (PAN), or a combination of communications networks such as the Internet. Access device 640 may include one or more of any type of network interface (eg, a network interface card (NIC)), wired or wireless, such as an IEEE 802.11 Wireless Local Area Network (WLAN) wireless interface, a Worldwide Interconnection for Microwave Access (WLAN) Wi-MAX) interface, Ethernet interface, Universal Serial Bus (USB) interface, cellular network interface, Bluetooth interface, Near Field Communication (NFC) interface, etc.

In one embodiment of the present disclosure, the above-mentioned components of the computing device 600 and other components not shown in FIG. 6 may also be connected to each other, such as through a bus. It should be understood that the calculation shown in Figure 6 The device structure block diagram is for illustrative purposes only and does not limit the scope of the present disclosure. Those skilled in the art can add or replace other components as needed.

Computing device 600 may be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (e.g., tablet computer, personal digital assistant, laptop computer, notebook computer, netbook, etc.), a mobile telephone (e.g., smartphone ), a wearable computing device (e.g., smart watch, smart glasses, etc.) or other type of mobile device, or a stationary computing device such as a desktop computer or PC. Computing device 600 may also be a mobile or stationary server.

When the processor 620 executes the computer instructions, the steps of the QUIC data transmission method based on the protocol suite are implemented.

The above is a schematic solution of a computing device in this embodiment. It should be noted that the technical solution of the computing device and the above-mentioned technical solution of the QUIC data transmission method based on the protocol family belong to the same concept. For details that are not described in detail in the technical solution of the computing device, please refer to the above-mentioned QUIC protocol family-based method. Description of technical solutions for data transmission methods.

An embodiment of the present disclosure also provides a non-volatile computer-readable storage medium, which stores computer instructions. When the computer instructions are executed by a processor, the steps of the QUIC data transmission method based on the protocol suite are implemented.

The above is a schematic solution of a computer-readable storage medium in this embodiment. It should be noted that the technical solution of the storage medium belongs to the same concept as the technical solution of the QUIC data transmission method based on the protocol family mentioned above. For details that are not described in detail in the technical solution of the storage medium, please refer to the QUIC protocol family-based method mentioned above. Description of technical solutions for data transmission methods.

The foregoing describes specific embodiments of the present disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desired results. Additionally, the processes depicted in the figures do not necessarily require the specific order shown, or sequential order, to achieve desirable results. Multitasking and parallel processing are also possible or may be advantageous in certain implementations.

Computer instructions include computer program code, which can be in the form of source code, object code, executable file or some intermediate form. Computer-readable media may include: any entity or device capable of carrying computer program code, recording media, USB flash drives, mobile hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM, Read-Only Memory), random access Memory (RAM, Random Access Memory), electrical carrier signals, telecommunications signals, and software distribution media, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include Electrical carrier signals and telecommunications signals.

It should be noted that for the convenience of description, each of the foregoing method embodiments is expressed as a series of action combinations. However, those skilled in the art should know that the present disclosure is not limited by the described action sequence. Because in accordance with the present disclosure, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily necessary for the present disclosure.

In the above embodiments, each embodiment is described with its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

The preferred embodiments of the present disclosure disclosed above are only used to help explain the present disclosure. The alternative embodiments are not exhaustive in all their details, nor do they limit the invention to the specific implementation thereof. Obviously, many modifications and variations are possible in light of this disclosure. These embodiments are selected and described in detail in order to better explain the principles and practical applications of the disclosure, so that those skilled in the art can better understand and utilize the disclosure. This disclosure is limited only by the claims and their full scope and equivalents.

Claims

A QUIC data transmission method based on the protocol family, which is characterized by including:

Create a QUIC data processing thread, the protocol family socket and shared memory corresponding to the QUIC data processing thread;

A QUIC data processing path ring is formed according to the shared memory and the protocol family socket;

QUIC data is loop-transmitted according to the QUIC data processing thread and the QUIC data processing path.
The method of claim 1, wherein said creating a QUIC data processing thread, a protocol family socket and shared memory corresponding to the QUIC data processing thread further includes:

Determine the number of network card hardware queues in the network card;

Create a corresponding number of QUIC data processing threads based on the number of network card hardware queues;

Create protocol family sockets and shared memory corresponding to each QUIC data processing thread.
The method of claim 1, wherein the QUIC data processing path loop is composed of the shared memory and the protocol family socket, further comprising:

Obtain the filling ring and completion ring in the shared memory, and obtain the receiving ring and sending ring in the protocol family socket, wherein the filling ring is used to receive QUIC reception data and is expected to be saved in the shared memory The position offset information, the completion ring is used to receive the position offset information in the shared memory after the QUIC sending data is successfully sent, and the receiving ring is used to receive the position offset of the QUIC receiving data in the shared memory. Shift information, the sending ring is used to receive the position offset information of QUIC sending data in the shared memory;

The filling ring and the receiving ring form a QUIC data receiving path ring, and the completion ring and the sending ring form a QUIC data transmitting path ring.
The method of claim 3, wherein the ring-transmitting QUIC data according to the QUIC data processing thread and the QUIC data processing path further includes:

Receive QUIC data according to the QUIC data processing thread and the QUIC data receiving path ring, wherein the QUIC data receiving path ring is a receiving rule for QUIC data;

QUIC data is sent according to the QUIC data processing thread and the QUIC data sending path ring, where the QUIC data receiving path ring is a sending rule for QUIC data.
The method of claim 4, wherein before receiving QUIC data according to the QUIC data processing thread and the QUIC data receiving path ring, the method further includes:

Receive data to be processed;

Determine whether the data to be processed is QUIC received data;

If so, redirect the QUIC receive data to the QUIC data receive path ring;

If not, the data to be processed is transmitted to the kernel protocol stack.
The method of claim 5, wherein determining whether the data to be processed is QUIC received data further includes:

Parse the data to be processed and obtain the data service port carried in the data to be processed;

Determine whether the data service port is the service port corresponding to the QUIC data processing thread.
The method of claim 4, wherein receiving QUIC data according to the QUIC data processing thread and the QUIC data receiving path ring further includes:

Fill the first address descriptor into the filling ring based on the QUIC data processing thread, where the first address descriptor is the address offset information of the shared memory;

Write the QUIC received data to the shared memory according to the first address descriptor;

When the writing of the QUIC received data is completed, write the data memory address of the QUIC received data in the shared memory to the receiving ring;

The QUIC data processing thread reads the data memory address in the receiving ring based on the QUIC data processing thread, and reads the QUIC receiving data from the shared memory based on the data memory address.
The method of claim 4, wherein sending QUIC data according to the QUIC data processing thread and the QUIC data sending path ring further includes:

Generate QUIC transmission data based on the QUIC data processing thread;

Write the QUIC transmission data to the shared memory, and write the second address descriptor of the QUIC transmission data in the shared memory to the transmission ring;

Read the second address descriptor in the transmission ring, read and send the QUIC transmission data according to the second address descriptor;

When the QUIC transmission data transmission is completed, the second address descriptor is written to the completion ring.
A QUIC data transmission device based on the protocol suite, which is characterized by including:

A creation module configured to create a QUIC data processing thread, a protocol family socket and shared memory corresponding to the QUIC data processing thread;

A component module configured to form a QUIC data processing path ring according to the shared memory and the protocol family socket;

A transmission module configured to transmit QUIC data according to the QUIC data processing thread and the QUIC data processing path loop.
A computing device, including a memory, a processor, and computer instructions stored in the memory and executable on the processor, characterized in that when the processor executes the computer instructions, it implements any one of claims 1-8. Describe the steps of the method.
A non-volatile computer-readable storage medium that stores computer instructions, characterized in that when the computer instructions are executed by a processor, the steps of the method described in any one of claims 1-8 are implemented.
A computer program product including a computer program stored on a non-volatile computer-readable storage medium, the computer program including program instructions that when executed by the processor implement the rights The steps of the method described in any one of claims 1-8.