JP7000370B2 - Magnetic storage device - Google Patents

Description

Embodiments of the present invention relate to magnetic storage devices.

There is a magnetic storage device using a magnetic layer. Stable operation is desired in the magnetic storage device.

Japanese Patent No. 6280195

The embodiment provides a magnetic storage device capable of stable and normal writing operation.

According to the embodiment, the magnetic storage device includes a memory unit and a control unit. The memory unit includes a conductive layer, a first memory cell, and a first circuit. The conductive layer includes a first portion, a second portion, a third portion between the first portion and the second portion, a fourth portion between the first portion and the third portion, and the above. Includes a fifth portion between the third portion and the second portion. The first memory cell includes a first junction and a second junction. The first junction is provided between the first magnetic layer and the fourth portion and the first magnetic layer in the first direction intersecting the second direction from the first portion to the second portion. It includes a first counter-magnetic layer and a first non-magnetic layer provided between the first magnetic layer and the first counter-magnetic layer. The second junction includes a second magnetic layer, a second opposed magnetic layer provided between the fifth portion and the second magnetic layer in the first direction, the second magnetic layer, and the second magnetic layer. Includes a second non-magnetic layer provided between the opposed magnetic layers. The first circuit is electrically connected to the first magnetic layer and the second magnetic layer. The control unit is electrically connected to the conductive layer and the first circuit. When writing the first information to the first memory cell, the control unit performs a first operation, a second operation after the first operation, and a third operation after the second operation. In the first operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the first conductive layer current from the second portion to the first portion to the conductive layer. The second polarity opposite to the first polarity when the potential of the second magnetic layer is based on the potential of the first portion while making the first polarity when the potential of the first portion is used as a reference. Let me. In the second operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the second conductive layer current from the first portion to the second portion to the conductive layer. The potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference. In the third operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the third conductive layer current from the second portion to the first portion to the conductive layer. The potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference.

FIG. 1 is a schematic perspective view illustrating the magnetic storage device according to the first embodiment. 2 (a) and 2 (c) are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment. 3A and 3B are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment. 4 (a) and 4 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment. 5 (a) and 5 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment. FIG. 6 is a circuit diagram illustrating the magnetic storage device according to the first embodiment. 7 (a) to 7 (c) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment. 8 (a) to 8 (c) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment. 9 (a) and 9 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment. 10 (a) and 10 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment. 11 (a) to 11 (c) are schematic views illustrating the magnetic storage device of the first reference example.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes between the parts, etc. are not always the same as the actual ones. Even if the same part is represented, the dimensions and ratios may be different from each other depending on the drawing.
In the present specification and each figure, the same elements as those described above with respect to the above-mentioned figures are designated by the same reference numerals, and detailed description thereof will be omitted as appropriate.

(First Embodiment)
FIG. 1 is a schematic perspective view illustrating the magnetic storage device according to the first embodiment.
As shown in FIG. 1, the magnetic storage device 110 according to the embodiment includes a memory unit MP and a control unit 70. The memory unit MP includes, for example, a conductive layer 21, a first memory cell MC1, and a first circuit 31. The memory unit MP may further include a second memory cell MC2 and a second circuit 32. In the embodiment, a plurality of memory cells may be provided. The number of multiple memory cells is arbitrary. A circuit is provided corresponding to each of the plurality of memory cells.

The conductive layer 21 includes, for example, first to fifth portions 21a to 21e. The third portion 21c is between the first portion 21a and the second portion 21b. The fourth portion 21d is between the first portion 21a and the third portion 21c. The fifth portion 21e is between the third portion 21c and the second portion 21b.

The first memory cell MC1 includes a first junction SB1 and a second junction SB2.

The first bonded SB1 includes a first magnetic layer 11, a first opposed magnetic layer 11c, and a first non-magnetic layer 11n. The first opposed magnetic layer 11c is provided between the fourth portion 21d and the first magnetic layer 11 in the first direction. The first direction intersects the second direction from the first portion 21a to the second portion 21b.

The first direction is the Z-axis direction. One direction perpendicular to the Z-axis direction is defined as the X-axis direction. The direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction. The second direction is, for example, the X-axis direction.

The first non-magnetic layer 11n is provided between the first magnetic layer 11 and the first opposed magnetic layer 11c.

The second bonded SB2 includes a second magnetic layer 12, a second opposed magnetic layer 12c, and a second non-magnetic layer 12n. The second opposed magnetic layer 12c is provided between the fifth portion 21e and the second magnetic layer 12 in the first direction (Z-axis direction). The second non-magnetic layer 12n is provided between the second magnetic layer 12 and the second opposed magnetic layer 12c.

The first circuit 31 is electrically connected to the first magnetic layer 11 and the second magnetic layer 12. The control unit 70 is electrically connected to the conductive layer 21 and the first circuit 31.

As described above, the memory unit MP may further include the second memory cell MC2 and the second circuit 32. In this case, the conductive layer 21 further includes a sixth portion 21f, a seventh portion 21g, an eighth portion 21h, and a ninth portion 21i. For example, between the first portion 21a and the sixth portion 21f, the fourth portion 21d, the third portion 21c, and the fifth portion 21e are provided in this order. The second portion 21b is between the fifth portion 21e and the sixth portion 21f. The seventh portion 21g is between the second portion 21b and the sixth portion 21f. The eighth portion 21h is between the second portion 21b and the seventh portion 21g. The ninth portion 21i is between the seventh portion 21g and the sixth portion 21f.

The second memory cell MC2 includes a third junction SB3 and a fourth junction SB4. The third bonded SB3 includes a third magnetic layer 13, a third opposed magnetic layer 13c, and a third non-magnetic layer 13n. The third opposed magnetic layer 13c is provided between the eighth portion 21h and the third magnetic layer 13 in the first direction (Z-axis direction). The third non-magnetic layer 13n is provided between the third magnetic layer 13 and the third opposed magnetic layer 13c.

The fourth bonded SB4 includes a fourth magnetic layer 14, a fourth opposed magnetic layer 14c, and a fourth non-magnetic layer 14n. The fourth opposed magnetic layer 14c is provided between the ninth portion 21i and the fourth magnetic layer 14 in the first direction (Z-axis direction). The fourth non-magnetic layer 14n is provided between the fourth magnetic layer 14 and the fourth opposed magnetic layer 14c.

The second circuit 32 is electrically connected to the third magnetic layer 13 and the fourth magnetic layer 14. The control unit 70 is electrically connected to the second circuit 32.

For example, a part of the conductive layer 21 (for example, the first part 21a) and the control unit 70 are electrically connected by the wiring 70c. An element such as a switch 70s may be provided on the wiring 70c. For example, another part of the conductive layer 21 (for example, the sixth part 21f) and the control unit 70 are electrically connected by the wiring 70d. The switch 70s may be provided on the wiring 70d. An element such as a switch (not shown in FIG. 1) may be provided on the wiring 70c or the wiring 70d.

For example, the first circuit 31 and the control unit 70 are electrically connected by the wiring 70a. An element such as a switch (not shown in FIG. 1) may be provided on the wiring 70a. The second circuit 32 and the control unit 70 are electrically connected by the wiring 70b. An element such as a switch (not shown in FIG. 1) may be provided on the wiring 70b.

The control unit 70 may include, for example, a drive circuit 75. The control unit 70 may include a detection circuit 76. The detection circuit 76 includes, for example, a sense amplifier.

For example, a current is supplied from the control unit 70 to the conductive layer 21. This current controls the magnetization of the first opposed magnetic layer 11c in one direction. For example, a current flowing in the direction from the second portion 21b to the first portion 21a flows through the conductive layer 21. The magnetization of the first opposed magnetic layer 11c is controlled in another direction by the current in the direction from the first portion 21a to the second portion 21b. The change in the direction of magnetization due to the current flowing through the conductive layer 21 is based on, for example, spin-orbit interaction.

The electrical resistance of the junction changes depending on the direction of magnetization of the first opposed magnetic layer 11c. For example, in the first junction SB1, the electrical resistance corresponds to the electrical resistance of the current path between the first magnetic layer 11 and the counter magnetic layer 11c. For example, a current flowing in the direction from the first portion 21a to the second portion 21b flows through the conductive layer 21.
In this actual mode, the case where the conductive layer current is passed in the direction from the second portion 21b to the first portion 21a to write the memory is set to "0", and the case where the conductive layer current is passed in the opposite direction to write the memory is "0". 1 ". However, the case where the conductive layer current is passed in the direction from the second portion 21b to the first portion 21a to write the memory is defined as "1", and the case where the conductive layer current is passed in the opposite direction and the memory is written is defined as "0". It doesn't matter.

In this way, the direction of magnetization of the first opposed magnetic layer 11c can be changed. On the other hand, for example, the direction of magnetization of the first magnetic layer 11 does not substantially change. The angle between the direction of magnetization of the first opposed magnetic layer 11c and the direction of magnetization of the first magnetic layer 11 changes according to the change in the direction of magnetization of the first opposed magnetic layer 11c. The electrical resistance of the first junction SB1 changes according to this change in angle. The change in electrical resistance is based on the magnetoresistive effect of, for example, a ferromagnetic tunnel junction (MTJ) or a giant magnetoresistive effect element (GMR element).

The current Isw of the conductive layer 21 in which the magnetization of the first opposed magnetic layer 11c is inverted changes according to the voltage (or current) between the first magnetic layer 11 and the conductive layer 21 (for example, the third portion 21c). For example, when the potential of the first magnetic layer 11 is negative when the potential of the conductive layer 21 is used as a reference, even if the current flowing through the conductive layer 21 is small, the magnetization of the first opposed magnetic layer 11c is reversed. On the other hand, for example, when the potential of the first magnetic layer 11 is positive when the potential of the conductive layer 21 is used as a reference, the magnetization of the first opposed magnetic layer 11c is generated unless the current flowing through the conductive layer 21 is increased. Does not flip. By controlling the potential of the first magnetic layer 11 in this way, the current Isw of the conductive layer 21 in which the magnetization of the first opposed magnetic layer 11c is inverted can be controlled. The change in the current Isw of the magnetization reversal is based on, for example, the voltage-controlled magnetic anisotropy effect. For example, when a plurality of joints are provided on the conductive layer 21, the electrical resistance of any of the joints included in the plurality of joints can be changed.

The operation of changing the electric resistance is included in the information storage operation (writing operation). By detecting the value (electrical resistance, current or voltage) corresponding to the electric resistance, the stored information is read out (reading operation).

11 (a) to 11 (c) are schematic views illustrating the magnetic storage device of the first reference example. In the first reference example, one junction (for example, the first junction SB1) corresponds to one memo cell. As shown in FIGS. 11 (a) to 11 (c), in the first reference example, the conductive layer 21 is provided with a plurality of bonds. Unlike the present embodiment, the first reference example does not have the first circuit 31 and the second circuit 32. In the first reference example, when a current in one direction flows through the conductive layer 21, the potentials of the plurality of junctions are controlled, and information is written to the desired junction (memory cell). In this case, depending on the voltage applied to the junction, a current in the direction from the junction to the conductive layer 21 (junction current) or a current in the direction from the conductive layer 21 to the junction (junction current) flows. Therefore, the "total current" of the current supplied from the control unit 70 to the conductive layer 21 and the above-mentioned junction current flows through the conductive layer 21. Since the direction of the junction current changes depending on the information to be stored, the "total current" flowing through the conductive layer 21 changes according to the information to be stored. Therefore, in the first reference example, there is a problem that the operation (writing operation) may fail.

As shown in FIG. 2A, in the first operation OP1, the control unit 70 supplies the first conductive layer current Ic1 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. 31 is made to supply a current to the first magnetic layer 11 and to supply a current to the second magnetic layer 12. By controlling the current supplied to the first magnetic layer and the current supplied to the second magnetic layer 12 so that the directions are opposite and the absolute values are substantially the same, the current i21 flowing through the conductive layer 21 fluctuates. Is suppressed, and stable and normal writing operation is realized.

On the other hand, in the present embodiment, one memory cell includes two junctions. For example, the first memory cell MC1 includes a first junction SB1 and a second junction SB2. The direction of the current flowing through the first junction SB1 is reversed from the direction of the current flowing through the second junction SB2. Fluctuations in the "total current" flowing in the conductive layer 21 caused by the current flowing in the junction (junction current) are suppressed. In the embodiment, stable and normal writing operation can be obtained. In the embodiment, it is possible to provide a magnetic storage device capable of stable and normal writing operation.

For example, even when the current flowing through the junction (first junction SB1 and second junction SB2, etc.) is large, it is possible to suppress fluctuations in the current flowing through the conductive layer 21 due to this current. Therefore, the resistance of joining can be lowered. By lowering the resistance of the junction, for example, high-speed read operation becomes possible.

Hereinafter, one example of the operation of the magnetic storage device 110 according to the embodiment will be described.
2 (a) and 2 (c) are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment.
These figures illustrate an operation (write operation) of storing information in one memory cell (first memory cell MC1).

The control unit 70 executes the first operation OP1, the second operation OP2, and the third operation OP3 when writing the first information to the first memory cell MC1. The second operation OP2 is performed after the first operation OP1. The third operation OP3 is performed after the second operation OP2. These operations correspond to one write operation. The first information is, for example, "00". In the present embodiment, one direction corresponds to "0" and the other direction corresponds to "1" with respect to the direction of magnetization of the opposing magnetic layer. Regarding the direction of magnetization, one direction may correspond to "1" and the other direction may correspond to "0". For example, the first information may be set to "11". The following shows an example in which the first information is set to "00".

As shown in FIG. 2A, in the first operation OP1, the control unit 70 supplies the first conductive layer current Ic1 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. The first magnetic layer 11 is supplied with the first junction current Im01, and the second magnetic layer 12 is supplied with the second junction current Im02. The potential of the first magnetic layer 11 is the first polarity when the potential of the first portion 21a is used as a reference. The potential of the second magnetic layer 12 is the second polarity when the potential of the first portion 21a is used as a reference. The second polarity is the opposite of the first polarity.

The first polarity is either positive or negative. The second polarity is the other of positive and negative. In the following, the first polarity is positive and the second polarity is negative. However, the first polarity may be negative and the second polarity may be positive.

For example, in the first operation OP1, for example, "0" is written in the second junction SB2. On the other hand, the first junction SB1 maintains the state before the first operation OP1.

As shown in FIG. 2B, in the second operation OP2, the control unit 70 supplies the second conductive layer current Ic2 from the first portion 21a to the second portion 21b to the conductive layer 21, while supplying the first circuit. In 31, the potential of the first magnetic layer 11 is made to have the second polarity (negative), and the potential of the second magnetic layer 12 is made to have the first polarity (positive).

For example, in the second operation OP2, "1" is written in the first junction SB1. In the second operation OP2, the second junction SB2 maintains the state before the second operation OP2 (“0” in this example).

As shown in FIG. 2C, in the third operation OP3, the control unit 70 supplies the third conductive layer current Ic3 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. In 31, the potential of the first magnetic layer 11 is made to have the second polarity (negative), and the potential of the second magnetic layer 12 is made to have the first polarity (positive).

For example, in the third operation OP3, "0" is written in the first junction SB1. In the third operation OP3, the second junction SB2 maintains the state before the third operation OP3 (“0” in this example).

In this way, "00" is written in the first memory cell MC1 in an arbitrary storage state by the first to third operations OP1 to OP3.

As shown in FIGS. 2A to 2C, in each of the first to third operations OP1 to OP3, the junction current ip1 flows through the first junction SB1 and the junction current ip2 flows through the second junction SB2. .. In each of the first to third operations OP1 to OP3, the direction of the junction current ip2 is opposite to the direction of the junction current ip1. Therefore, in the current i21 flowing through the conductive layer 21, the difference between before and after passing through the first memory cell MC1 becomes small. For example, if the absolute value of the junction current ip1 and the absolute value of the junction current ip2 are substantially the same, the fluctuation of the current i21 flowing through the conductive layer 21 is suppressed. Therefore, for example, when "00" is written, the fluctuation of the current i21 flowing through the conductive layer 21 is suppressed.

Such an operation of the first memory cell MC1 is applied to another memory cell (for example, the second memory cell MC2). In each of the plurality of memory cells, the direction of the junction current ip2 is reversed from the orientation of the junction current ip1. As a result, even when a plurality of memory cells are provided, fluctuations in the current i21 flowing through the conductive layer 21 can be suppressed.

As shown in FIG. 2A, when the first conductive layer current Ic1 is supplied, it flows from the second portion 21b to the third portion 21c and flows from the third portion 21c to the first portion 21a. As shown in FIG. 2B, the second conductive layer current Ic2 flows from the first portion 21a to the third portion 21c and from the third portion 21c to the second portion 21b. As shown in FIG. 2 (c), the third conductive layer current Ic3 flows from the second portion 21b to the third portion 21c, and flows from the third portion 21c to the first portion 21a.

The first to third conductive layer currents Ic1 to Ic3 are supplied to the conductive layer 21 from, for example, a current source. The current source is included in the control unit 70, for example.

As shown in FIG. 2A, in the first operation OP1, the first junction current Im01 flows through the first junction SB1 and the second junction current Im02 flows through the second junction SB2. The directions of these currents are opposite to each other. For example, when the direction of the first junction current Im01 is from the first circuit 31 to the first junction SB1, the orientation of the second junction current Im02 is from the second junction SB2 to the first circuit 31. Become.

When the positive and negative of the first polarity and the second polarity are opposite, the direction of the current is opposite. For example, in the first operation OP1, when the direction of the first junction current Im01 is the direction from the first circuit 31 to the first junction SB1, the direction of the second junction current Im02 is from the second junction SB2 to the first. The orientation towards the circuit 31.

As shown in FIG. 2B, in the second operation OP2, the third junction current Im03 flows through the first junction SB1 and the fourth junction current Im04 flows through the second junction SB2. The direction of the third junction current Im03 is opposite to that of the first junction current Im01. The direction of the fourth junction current Im04 is opposite to the direction of the second junction current Im02.

As shown in FIG. 2C, in the third operation OP3, the fifth junction current Im05 flows through the first junction SB1 and the sixth junction current Im06 flows through the second junction SB2. The direction of the fifth junction current Im05 is opposite to the direction of the first junction current Im01. The direction of the sixth junction current Im06 is opposite to the direction of the second junction current Im02.

The directions of the first to sixth junction currents Im01 to 06 in the first operation OP1 to OP3 may be all opposite directions.

Such first to sixth junction currents Im01 to Im06 are supplied from, for example, the first circuit 31. The first circuit 31 includes, for example, a current source (eg, a constant current source). A substantially constant current of the first to sixth junction currents Im01 to Im06 and the like is supplied from the current source to the first junction SB1 and the second junction SB2 (see FIGS. 2A to 2C).

In the first operation OP1, it is preferable that the absolute value of the first junction current Im01 is substantially the same as the absolute value of the second junction current Im02. For example, in the first operation OP1, the absolute value of the first junction current Im01 is 0.7 times or more and 1.3 times or less the absolute value of the second junction current Im02.

In the second operation OP2, for example, the absolute value of the third junction current Im03 is preferably 0.7 times or more and 1.3 times or less the absolute value of the fourth junction current Im04.

In the third operation OP3, for example, the absolute value of the fifth junction current Im05 is preferably 0.7 times or more and 1.3 times or less the absolute value of the sixth junction current Im06.

Since the absolute value of the current is substantially the same, the fluctuation of the current i21 flowing through the conductive layer 21 can be effectively suppressed.

Hereinafter, an example of the operation when another information is written to the first memory cell MC1 will be described.

3A and 3B are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment.
These figures illustrate an operation (write operation) of storing "01" in the first memory cell MC1.

As shown in FIGS. 3A and 3B, the control unit 70 performs the fourth operation OP4 and the fifth operation OP5 when writing the second information to the first memory cell MC1. The second information corresponds to "01". The fifth operation OP5 is performed after the fourth operation OP4.

As shown in FIG. 3A, in the fourth operation OP4, the control unit 70 supplies the fourth conductive layer current Ic4 from the first portion 21a to the second portion 21b to the conductive layer 21, while supplying the first circuit. In 31, the potential of the first magnetic layer 11 is made to have the first polarity, and the potential of the second magnetic layer 12 is made to have the second polarity.

In the fourth operation OP4, the second junction SB2 is written to "0". In the fourth operation OP4, the first junction SB1 maintains the state before the fourth operation OP4.

As shown in FIG. 3B, in the fifth operation OP5, the control unit 70 supplies the fifth conductive layer current Ic5 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. In 31, the potential of the first magnetic layer 11 is made to have the second polarity, and the potential of the second magnetic layer 12 is made to have the first polarity.

In the fifth operation OP5, the first junction SB1 is written to "0". In the fifth operation OP5, the second junction SB2 maintains the state before the fifth operation OP5.

By such a fourth operation OP4 and a fifth operation OP5, the first memory cell MC1 is written in the second information of "01".

As shown in FIG. 3A, in the fourth operation OP4, the 7th junction current Im07 flows through the 1st junction SB1 and the 8th junction current Im08 flows through the 2nd junction SB2. The orientation of the seventh junction current Im07 is the same as the orientation of the first junction current Im01. The direction of the eighth junction current Im08 is the same as the direction of the second junction current Im02.

As shown in FIG. 3B, in the fifth operation OP5, the ninth junction current Im09 flows through the first junction SB1 and the tenth junction current Im10 flows through the second junction SB2. The direction of the ninth junction current Im09 is opposite to the direction of the first junction current Im01. The direction of the tenth junction current Im10 is opposite to that of the second junction current Im02.

In the fourth operation OP4, the direction of the seventh junction current Im07 is opposite to the direction of the eighth junction current Im08. In the fifth operation OP5, the direction of the ninth junction current Im09 is opposite to the direction of the tenth junction current Im10. In each of the fourth operation OP4 and the fifth operation OP5, the fluctuation of the current i21 flowing through the conductive layer 21 can be suppressed.

The operation (writing operation) for storing the second information of "01" in the first memory cell MC1 may further include the operations exemplified below in addition to the above-mentioned fourth operation OP4 and fifth operation OP5.

4 (a) and 4 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment.
These operations are performed, for example, before the fourth operation OP4. For example, when the operation corresponding to the above-mentioned first operation OP1 is performed in the second memory cell MC2, the operation exemplified in FIG. 4A or FIG. 4B in the first memory cell MC1. The operation illustrated in 1 may be carried out.

As shown in FIG. 4A, in one example, the control unit 70 supplies the first conductive layer current Ic1 from the second portion 21b to the first portion 21a to the conductive layer 21, and the first circuit 31. In addition, the potential of the first magnetic layer 11 is made to have the first polarity (for example, positive), while the potential of the second magnetic layer 12 is made to have the second polarity (for example, negative).

As shown in FIG. 4B, in another example, the control unit 70 supplies the second conductive layer current Ic2 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit 31. In addition, the potential of the second magnetic layer 12 is made to be the first polarity while the potential of the first magnetic layer 11 is made to be the second polarity.

Before the fourth operation OP4 (see FIG. 3A) is performed on the first memory cell MC1, the operation exemplified in FIG. 4A or the fourth operation (b) is performed in the first memory cell MC1. An exemplary operation may be performed. For example, when the operation illustrated in FIG. 4A or the operation exemplified in the fourth (b) is performed in the first memory cell MC1, another memory cell (for example, the second memory cell MC2, etc.) ), The operation corresponding to the first operation OP1 may be performed.

Hereinafter, an example of the operation when another information is written to the first memory cell MC1 will be described.

5 (a) and 5 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the first embodiment.
These figures illustrate an operation (write operation) of storing "10" in the first memory cell MC1.

As shown in FIGS. 5A and 5B, the control unit 70 performs the sixth operation OP6 and the seventh operation OP7 when writing the third information to the first memory cell MC1. The third information is, for example, "10". The seventh operation OP7 is performed after the sixth operation OP6.

As shown in FIG. 5A, in the sixth operation OP6, the control unit 70 supplies the sixth conductive layer current Ic6 from the first portion 21a to the second portion 21b to the conductive layer 21, while supplying the first circuit. In 31, the potential of the first magnetic layer 11 is made to have the second polarity (for example, negative), and the potential of the second magnetic layer 12 is made to have the first polarity (for example, positive).

By the sixth operation OP6, the first junction SB1 is written in "1". In the sixth operation OP6, the second junction SB2 maintains the state before the sixth operation OP6.

As shown in FIG. 5B, in the seventh operation OP7, the control unit 70 supplies the seventh conductive layer current Ic7 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. The potential of the first magnetic layer 11 is made to have the first polarity (for example, positive), and the potential of the second magnetic layer 12 is made to have the second polarity (for example, negative).

The second junction SB2 is written to "0" by the seventh operation OP7. In the seventh operation OP7, the first junction SB1 maintains the state before the seventh operation OP7.

By such the sixth operation OP6 and the seventh operation OP7, the third information of "10" is written in the first memory cell MC1.

As shown in FIG. 5A, in the sixth operation OP6, the 11th junction current Im11 flows through the 1st junction SB1 and the 12th junction current Im12 flows through the 2nd junction SB2. The direction of the eleventh junction current Im11 is opposite to the direction of the first junction current Im01. The direction of the twelfth junction current Im12 is opposite to the direction of the second junction current Im02.

As shown in FIG. 5B, in the seventh operation OP7, the 13th junction current Im13 flows through the 1st junction SB1 and the 14th junction current Im14 flows through the 2nd junction SB2. The orientation of the thirteenth junction current Im13 is the same as the orientation of the first junction current Im01. The direction of the 14th junction current Im14 is the same as the orientation of the second junction current Im02.

In the sixth operation OP6, the direction of the eleventh junction current Im11 is opposite to the direction of the twelfth junction current Im12. In the seventh operation OP7, the direction of the 13th junction current Im13 is opposite to the orientation of the 14th junction current Im14. The direction of the current flowing through the first junction SB1 is opposite to the direction of the current flowing through the second junction SB2. As a result, fluctuations in the current i21 flowing through the conductive layer 21 can be suppressed.

Prior to the sixth operation OP6, the operation illustrated in FIG. 4A or the operation illustrated in the fourth (b) may be performed in the first memory cell MC1.

As described above, for example, in the first memory cell MC1, information of three values including "00", "01" and "10" is stored. In the first memory cell MC1, the information of "11" does not have to be stored.

Hereinafter, an example of the control unit 70 and the first circuit 31 will be described.
FIG. 6 is a circuit diagram illustrating the magnetic storage device according to the first embodiment.
As shown in FIG. 6, the current source Cs1 of the control unit 70 is electrically connected to the conductive layer 21. A current is supplied to the conductive layer 21 from the current source Cs1.

The first circuit 31 includes a first switch SW1 and a second switch SW2. The first switch SW1 is electrically connected to the first magnetic layer 11. The second switch SW2 is electrically connected to the second magnetic layer 12. In this example, the first switch SW1 is electrically connected to the first magnetic layer 11 via the transistor Tr1. The second switch SW2 is electrically connected to the second magnetic layer 12 via the transistor Tr2. The gate of the transistor Tr1 and the gate of the transistor Tr2 are controlled by the word line WL.

The first switch SW1 includes, for example, a first transistor T1 and a second transistor T2. For example, the first transistor T1 is an n-channel MOSFET, and the second transistor T2 is a p-channel MOSFET. The first drain D1 of the first transistor T1 is connected to the second drain D2 of the second transistor T2.

The first source S1 of the first transistor T1 is connected to the fifth drain D5 of the fifth transistor T5. The fifth source S5 of the fifth transistor T5 is connected to the first potential line LP1. The first potential line LP1 is grounded, for example.

The second source S2 of the second transistor T2 is connected to the sixth drain D6 of the sixth transistor T6. The sixth source S6 of the sixth transistor T6 is connected to the second potential line LP2. The second potential line LP2 is a high potential line. The potential of the second potential line LP2 is higher than the potential of the first potential line LP1.

The second switch SW2 includes, for example, a third transistor T3 and a fourth transistor T3. The third transistor T3 is an n-channel MOSFET, and the fourth transistor T4 is a p-channel MOSFET. The third drain D3 of the third transistor T3 is connected to the fourth drain D4 of the fourth transistor T4.

The third source S3 of the third transistor T3 is connected to the fifth drain D5 of the fifth transistor T1. The fourth source S4 of the fourth transistor T4 is connected to the sixth drain D6 of the sixth transistor T6.

The first gate G1 of the first transistor T1 and the second gate G2 of the second transistor T2 are connected to the first wiring Ls1. The first wiring Ls1 is connected to the input of the first inverter In1, and the output of the first inverter is connected to the third gate G3 of the third transistor and the fourth gate G4 of the fourth transistor.

The first wiring Ls1 can be set to high potential VH or low potential VL.

The voltage of the fifth gate G5 of the fifth transistor T5 is controlled by the control circuit 71b. The voltage of the sixth gate G6 of the sixth transistor T6 is controlled by the control circuit 71a. The control circuits 71a and 71b are current mirror circuits, and the current flowing into the memory cell and the current flowing out of the memory cell are substantially the same. In FIG. 9, the current flowing from the circuit 31 to the second junction SB2 and the current flowing from the first junction SB1 to the circuit 31 are substantially the same. If the current flowing into the memory cell and the current flowing out of the memory cell are substantially the same, a circuit other than the current mirror circuit shown in FIG. 9 may be used.

Such a circuit similar to the first circuit 31 is also applied to the second circuit 32. For example, the second circuit 32 includes a third switch SW3 and a fourth switch SW4. The gate of the MOSFET used in the third switch SW3 is connected to the second wiring Ls2. The second wiring Ls2 is connected to the input of the inverter In2, and the gate of the MOSFET used in the fourth switch SW4 is connected to the output of the second inverter In2. The first wiring Ls1 and the second wiring Ls2 are, for example, bit wires.

For example, in the first circuit 31, the following operation is performed.
When the first switch SW1 electrically connects the first magnetic layer 11 to the first potential line LP1, the second switch SW2 electrically connects the second magnetic layer 12 to the second potential line LP2. When the first switch SW1 electrically connects the first magnetic layer 11 to the second potential line LP2, the second switch SW2 electrically connects the second magnetic layer 12 to the first potential line LP1. The potential of the second potential line LP2 is higher than the potential of the first potential line LP1.

For example, the second circuit 32 includes a third switch SW3 electrically connected to the third magnetic layer 13 and a fourth switch SW3 electrically connected to the fourth magnetic layer 14. When the third switch SW3 electrically connects the third magnetic layer 13 to the first potential line LP1, the fourth switch SW4 electrically connects the fourth magnetic layer 14 to the second potential line LP2. When the third switch SW3 electrically connects the third magnetic layer 13 to the second potential line LP2, the fourth switch SW4 electrically connects the fourth magnetic layer 14 to the first potential line LP1.

For example, when the first switch SW1 electrically connects the first magnetic layer 11 to the first potential line LP1, the third switch SW3 connects the third magnetic layer 13 to the first potential line LP1 or the second potential line LP1. It may be electrically connected to LP2. When the first switch SW1 electrically connects the first magnetic layer 11 to the second potential line LP2, the third switch SW3 connects the third magnetic layer 13 to the first potential line LP1 or the second potential line LP2. It may be connected electrically.

First, the first operation OP1, the operation shown in FIG. 4 (a), or the operation shown in FIG. 4 (b) is simultaneously performed on a plurality of memory cells, and then the second operation OP2, the fourth operation OP4, or the fourth operation OP4 or the second operation. By performing the 6 operation OP6 at the same time and then performing the 3rd operation OP3, the 5th operation OP5, or the 7th operation OP7 at the same time, it is possible to write to a plurality of memory cells at once. Therefore, substantially high-speed writing is realized.

(Second Embodiment)
In the magnetic storage device according to the second embodiment, the control unit 70 performs an operation different from the operation described with respect to the first embodiment. In the second embodiment, for example, the configuration of the memory unit MP is the same as the configuration of the memory unit MP in the first embodiment. Hereinafter, the second embodiment will be described with respect to parts different from the first embodiment.

7 (a) to 7 (c) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment.
The control unit 70 executes the 21st operation QP21, the 22nd operation QP22, and the 23rd operation QP23 when writing the first information of “00” to the first memory cell MC1. The 22nd operation QP22 is performed after the 21st operation QP21. The 23rd operation QP23 is performed after the 22nd operation QP22. These operations correspond to the writing of "00".

As shown in FIG. 7A, in the 21st operation QP21, the control unit 70 performs a “reading operation”. In the 21st operation QP21, the control unit 70 detects the state of the first memory cell MC1. The 21st operation QP21 (reading operation) is performed by, for example, the detection circuit 76. In the example of FIGS. 7 (a) to 7 (c), the read state of the first memory cell MC1 is “10” or “00”. The operation when the read state of the first memory cell MC1 is “01” will be described later.

When the read state of the first memory cell MC1 is “10” or “00”, as shown in FIG. 7 (b), in the 22nd operation QP22, the control unit 70 starts from the first portion 21a. When the 21st conductive layer current Ic21 to the 2nd portion 21b is supplied to the conductive layer 21 and the potential of the 1st portion 21a is used as a reference in the 1st circuit 31, the potential of the 1st magnetic layer 11 is set to the second. While making the polarity (for example, negative), the potential of the second magnetic layer 12 is made to have the first polarity (for example, positive) opposite to the second polarity.

As shown in FIG. 7C, in the 23rd operation QP23, the control unit 70 supplies the 22nd conductive layer current Ic22 from the 2nd portion 21b to the 1st portion 21a to the conductive layer 21, and the first circuit. When the potential of the first portion 21a is used as a reference in 31, the potential of the first magnetic layer 11 is set to the second polarity (for example, negative), and the potential of the second magnetic layer 12 is set to the first polarity (for example, positive). Let me.

For example, the first junction SB1 is written in "1" by the 22nd operation QP22 shown in FIG. 7B. In the 22nd operation QP22, the second junction SB2 maintains the state (“0”) before the 22nd operation QP22. The first junction SB1 is written to "0" by the 23rd operation QP23 shown in FIG. 7 (c). In the 23rd operation QP23, the second junction SB2 maintains the state (“0”) before the 23rd operation QP23.

As a result, when the read state of the first memory cell MC1 is "10" or "00", the first memory cell MC1 is written to the first information of "00".

Hereinafter, in the 21st operation QP21, an example of the operation when the read state of the first memory cell MC1 is “01” will be described. The following operation may be performed when the state of the first memory cell MC1 is "01" or "00".

8 (a) to 8 (c) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment.
As shown in FIG. 8A, in the 21st operation QP21, the control unit 70 performs a “reading operation”. In the example of FIGS. 8A to 8C, the read state of the first memory cell MC1 is “01” or “00”.

As shown in FIG. 8B, in the 22nd operation QP22, the control unit 70 supplies the 21st conductive layer current Ic21 from the first portion 21a to the second portion 21b to the conductive layer 21, while supplying the first circuit. When the potential of the first portion 21a is used as a reference in 31, the potential of the first magnetic layer 11 is set to the first polarity (for example, positive), and the potential of the second magnetic layer 12 is set to the second polarity (for example, negative). Let me.

As shown in FIG. 8C, in the 23rd operation QP23, the control unit 70 supplies the 22nd conductive layer current Ic22 from the 2nd portion 21b to the 1st portion 21a to the conductive layer 21, and the first circuit. When the potential of the first portion 21a is used as a reference in 31, the potential of the first magnetic layer 11 is set to the first polarity (for example, positive), and the potential of the second magnetic layer 12 is set to the second polarity (for example, negative). Let me.

For example, the second junction SB2 is written in "1" by the 22nd operation QP22 shown in FIG. 8 (b). In the 22nd operation QP22, the first junction SB1 maintains the state (“0”) before the 22nd operation QP22. The second junction SB2 is written to "0" by the 23rd operation QP23 shown in FIG. 8 (c). In the 23rd operation QP23, the first junction SB1 maintains the state (“0”) before the 23rd operation QP23.

By these operations, when the state of the read first memory cell MC1 is "01" or "00", the first memory cell MC1 is written to the first information of "00".

Also in the second embodiment, the fluctuation of the current i21 flowing through the conductive layer 21 is suppressed. For example, it is possible to provide a magnetic storage device capable of stable and normal operation.

As shown in FIGS. 7 (b) and 8 (b), the 21st conductive layer current Ic21 flows from the first portion 21a to the third portion 21c and from the third portion 21c to the second portion 21b. As shown in FIGS. 7 (c) and 8 (c), the 22nd conductive layer current Ic22 flows from the second portion 21b to the third portion 21c, and flows from the third portion 21c to the first portion 21a.

For example, in the 22nd operation QP22, the 21st junction current Im21 flows through the 1st junction SB1 and the 22nd junction current Im22 flows through the 2nd junction SB2. In the 23rd operation QP23, the 23rd junction current Im23 flows through the 1st junction SB1 and the 24th junction current Im24 flows through the 2nd junction SB2. The orientation of the 23rd junction current Im23 is the same as the orientation of the 21st junction current Im21. The orientation of the 24th junction current Im24 is the same as the orientation of the 22nd junction current Im22.

When the state (read state) of the first memory cell MC1 corresponds to the 22nd information (“01”) or the 21st information (“00”), the direction of the 21st junction current Im21 is the first circuit. The orientation from 31 to the first junction SB1 and the orientation of the 22nd junction current Im22 is the orientation from the second junction SB2 to the first circuit 31 (see FIG. 8B).

When the state (read state) of the first memory cell MC1 corresponds to the 23rd information (“10”) or the 21st information (“00”), the direction of the 21st junction current Im21 is the first junction. The orientation from SB1 to the first circuit 31, and the orientation of the 22nd junction current Im22 is the orientation from the first circuit 31 to the second junction SB2 (see FIG. 7B).

For example, it is preferable that the absolute value of the 21st junction current Im21 is substantially the same as the absolute value of the 22nd junction current Im22. It is preferable that the absolute value of the 23rd junction current Im23 is substantially the same as the absolute value of the 24th junction current Im24. For example, the absolute value of the 21st junction current Im21 is preferably 0.7 times or more and 1.3 times or less the absolute value of the 22nd junction current Im22. The absolute value of the 23rd junction current Im23 is preferably 0.7 times or more and 1.3 times or less the absolute value of the 24th junction current Im24.

Hereinafter, an example of the operation when the 22nd information of “01” is written to the first memory cell MC1 will be described.

9 (a) and 9 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment.
As shown in FIGS. 9A and 9B, the control unit 70 sets the 24th operation QP24 and the 25th operation QP25 when writing the 21st information (“10”) to the 1st memory cell MC1. implement. The 25th operation QP25 is performed after the 24th operation QP24.

As shown in FIG. 9A, in the 24th operation QP24, the control unit 70 supplies the 23rd conductive layer current Ic23 from the first portion 21a to the second portion 21b to the conductive layer 21, while supplying the first circuit. When the potential of the first portion 21a is used as a reference in 31, the potential of the first magnetic layer 11 is set to the first polarity (for example, positive), and the potential of the second magnetic layer 12 is set to the second polarity (for example, negative). Let me.

As shown in FIG. 9B, in the 25th operation QP25, the control unit 70 supplies the 24th conductive layer current Ic24 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. When 31 is based on the potential of the first portion 21a, the potential of the first magnetic layer 11 is made to be the second polarity, and the potential of the second magnetic layer 12 is made to be the first polarity.

For example, the 24th operation QP24 writes the second junction SB2 to "1". In the 24th operation QP24, the first junction SB1 maintains the state (“0” or “1”) before the 24th operation QP24. For example, the 25th operation QP25 writes the first junction SB1 to "0". In the 25th operation QP25, the first junction SB1 maintains the state (“1”) before the 25th operation QP25. As a result, the second 22nd information of "01" is written in the first memory cell MC1.

Before the 24th operation QP24, the 21st operation QP21 of reading may be performed.

As shown in FIG. 9A, in the 24th operation QP24, the 25th junction current Im25 flows through the first junction SB1 and the 26th junction current Im26 flows through the second junction SB2. The orientation of the 25th junction current Im26 is the same as the orientation of the 21st junction current Im21 when the state of the first memory cell MC1 corresponds to the 22nd information (see FIG. 8B). The orientation of the 26th junction current Im26 is the same as the orientation of the 22nd junction current Im22 when the state of the first memory cell MC1 corresponds to the 22nd information (see FIG. 8B).

As shown in FIG. 9B, in the 25th operation QP25, the 27th junction current Im27 flows through the first junction SB1 and the 28th junction current Im28 flows through the second junction SB2. The orientation of the 27th junction current Im27 is opposite to the orientation of the 25th junction current Im25 (see FIG. 9A). The orientation of the 28th junction current Im28 is opposite to the orientation of the 26th junction current Im26 (see FIG. 9A).

Hereinafter, an example of the operation when the 23rd information of “10” is written to the first memory cell MC1 will be described.

10 (a) and 10 (b) are schematic perspective views illustrating the operation of the magnetic storage device according to the second embodiment.
As shown in FIGS. 10A and 10B, the control unit 70 performs the 26th operation QP26 and the 27th operation QP27 when writing the 23rd information (“10”) to the 1st memory cell MC1. implement. The 27th operation QP27 is carried out after the 26th operation QP26.

As shown in FIG. 10A, in the 26th operation QP26, the control unit 70 supplies the 25th conductive layer current Ic25 from the first portion 21a to the second portion 21b to the conductive layer 21, while supplying the first circuit. When 31 is based on the potential of the first portion 21a, the potential of the first magnetic layer 11 is made to be the second polarity, and the potential of the second magnetic layer 12 is made to be the first polarity.

As shown in FIG. 10B, in the 27th operation QP27, the control unit 70 supplies the 26th conductive layer current Ic26 from the second portion 21b to the first portion 21a to the conductive layer 21, while supplying the first circuit. When 31 is based on the potential of the first portion 21a, the potential of the first magnetic layer 11 is made to be the first polarity, and the potential of the second magnetic layer 12 is made to be the second polarity.

For example, the 26th operation QP26 writes the first junction SB1 to "1". In the 26th operation QP26, the second junction SB2 maintains the state (“0” or “1”) before the 26th operation QP26. For example, the 27th operation QP27 writes the second junction SB2 to “0”. In the 27th operation QP27, the first junction SB1 maintains the state (“1”) before the 27th operation QP27. As a result, the 23rd information of "10" is written in the first memory cell MC1.

Before the 26th operation QP26, the 21st operation QP21 of reading may be performed.

As shown in FIG. 10A, in the 26th operation QP26, the 29th junction current Im29 flows through the first junction SB1 and the 30th junction current Im30 flows through the second junction SB2. The orientation of the 29th junction current Im29 is the same as the orientation of the 21st junction current Im21 when the state of the first memory cell MC1 corresponds to the 23rd information or the 21st information (see FIG. 7B). The orientation of the 30th junction current Im30 is the same as the orientation of the 22nd junction current Im22 when the state of the first memory cell MC1 corresponds to the 23rd information or the 21st information (see FIG. 7B).

As shown in FIG. 10B, in the 27th operation QP27, the 31st junction current Im31 flows through the 1st junction SB1 and the 32nd junction current Im32 flows through the 2nd junction SB2. The orientation of the 31st junction current Im31 is opposite to the orientation of the 29th junction current Im29 (see FIG. 10A). The orientation of the 32nd junction current Im32 is opposite to the orientation of the 30th junction current Im30 (see FIG. 10A).

In the second embodiment, the circuit of FIG. 6 of the first embodiment can be applied to the first circuit 31 and the second circuit 32.

In the second embodiment, as in the first embodiment, a circuit that makes the current flowing into the memory cell and the current flowing from the memory cell substantially the same can be applied to the first circuit 31 and the second circuit 32. ..

In the second embodiment, the 21st operation QP21 is first performed on a plurality of memory cells, then the 22nd operation QP22, the 24th operation QP24 or the 26th operation QP26 are simultaneously performed, and then the 23rd operation QP23, By simultaneously performing the 25th operation QP25 or the 27th operation QP27, it is possible to write a plurality of memory cells at once. Therefore, substantially high-speed writing is realized.

In the first and second embodiments, the first to fourth magnetic layers 11 to 14 include, for example, at least one selected from the group consisting of Fe, Co and Ni. The first to fourth opposed magnetic layers 11c to 14c include, for example, at least one selected from the group consisting of Fe, Co and Ni. The first to fourth non-magnetic layers 11n to 14n contain, for example, oxides such as MgO, AlO, and MgAlO. The conductive layer 21 includes, for example, at least one selected from the group consisting of Hf, Ta and W. These materials are examples, and other materials exhibiting a magnetoresistive effect may be applied.

According to the embodiment, it is possible to provide a magnetic storage device capable of normal operation due to a small fluctuation current of the current i21 of the conductive layer 21.

The embodiment may include, for example, the following configuration (technical proposal).
(Structure 1)
The first part, the second part, the third part between the first part and the second part, the fourth part between the first part and the third part, and the third part and the above. A conductive layer containing a fifth portion between the second portion and
A first memory cell containing a first junction and a second junction, wherein the first junction is in a first direction intersecting a first magnetic layer and a second direction from the first portion to the second portion. A first opposed magnetic layer provided between the fourth portion and the first magnetic layer, and a first non-magnetic layer provided between the first magnetic layer and the first opposed magnetic layer. The second bonding includes a second magnetic layer, a second opposed magnetic layer provided between the fifth portion and the second magnetic layer in the first direction, and the second magnetic layer. The first memory cell including the second non-magnetic layer provided between the second opposed magnetic layer and the first memory cell.
A first circuit electrically connected to the first magnetic layer and the second magnetic layer,
Memory part including
A control unit electrically connected to the conductive layer and the first circuit,
Equipped with
When writing the first information to the first memory cell, the control unit performs a first operation, a second operation after the first operation, and a third operation after the second operation.
In the first operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the first conductive layer current from the second portion to the first portion to the conductive layer. The second polarity opposite to the first polarity when the potential of the second magnetic layer is based on the potential of the first portion while making the first polarity when the potential of the first portion is used as a reference. Let me
In the second operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the second conductive layer current from the first portion to the second portion to the conductive layer. The potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference.
In the third operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the third conductive layer current from the second portion to the first portion to the conductive layer. A magnetic storage device that makes the potential of the second magnetic layer the first polarity when the potential of the first portion is used as a reference while making the potential of the second magnetic layer the second polarity when the potential of the first portion is used as a reference. ..

(Structure 2)
The first conductive layer current flows from the second portion to the third portion, and flows from the third portion to the first portion.
The second conductive layer current flows from the first portion to the third portion, and flows from the third portion to the second portion.
The magnetic storage device according to the configuration 1, wherein the third conductive layer current flows from the second portion to the third portion and flows from the third portion to the first portion.

(Structure 3)
In the first operation, the first junction current flows through the first junction, the second junction current flows through the second junction, and the direction of the first junction current is the direction from the first circuit to the first junction. If, the direction of the second junction current is the direction from the second junction to the first circuit, and the direction of the first junction current is the direction from the first junction to the first circuit. In some cases, the direction of the second junction current is from the first circuit to the second junction.
In the second operation, the third junction current flows through the first junction, the fourth junction current flows through the second junction, and the direction of the third junction current is opposite to the direction of the first junction current. , The direction of the fourth junction current is opposite to the direction of the second junction current.
In the third operation, the fifth junction current flows through the first junction, the sixth junction current flows through the second junction, and the direction of the fifth junction current is opposite to the direction of the first junction current. The magnetic storage device according to the configuration 1 or 2, wherein the direction of the sixth junction current is opposite to that of the second junction current.

(Structure 4)
The absolute value of the first junction current is 0.7 times or more and 1.3 times or less the absolute value of the second junction current.
The absolute value of the third junction current is 0.7 times or more and 1.3 times or less the absolute value of the fourth junction current.
The magnetic storage device according to the third configuration, wherein the absolute value of the fifth junction current is 0.7 times or more and 1.3 times or less the absolute value of the sixth junction current.

(Structure 5)
When writing the second information to the first memory cell, the control unit performs a fourth operation and a fifth operation after the fourth operation.
In the fourth operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the fourth conductive layer current from the first portion to the second portion to the conductive layer. When the potential of the first portion is used as a reference, the first polarity is set, and when the potential of the second magnetic layer is used as a reference of the potential of the first portion, the second polarity is set.
In the fifth operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the fifth conductive layer current from the second portion to the first portion to the conductive layer. Configurations 1 to 4 in which the potential of the first portion is set to the second polarity when the potential of the first portion is used as a reference, and the potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference. The magnetic storage device according to any one of the above.

(Structure 6)
In the fourth operation, the seventh junction current flows through the first junction, the eighth junction current flows through the second junction, and the direction of the seventh junction current is the same as the direction of the first junction current. , The direction of the eighth junction current is the same as the direction of the second junction current.
In the fifth operation, the ninth junction current flows through the first junction, the tenth junction current flows through the second junction, and the direction of the ninth junction current is opposite to the direction of the first junction current. The magnetic storage device according to the configuration 5, wherein the direction of the tenth junction current is opposite to the direction of the second junction current.

(Structure 7)
When writing the third information to the first memory cell, the control unit performs a sixth operation and a seventh operation after the sixth operation.
In the sixth operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the sixth conductive layer current from the first portion to the second portion to the conductive layer. When the potential of the first portion is used as a reference, the second polarity is set, and when the potential of the second magnetic layer is used as a reference of the potential of the first portion, the first polarity is set.
In the seventh operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the seventh conductive layer current from the second portion to the first portion to the conductive layer. Configurations 1 to 6 in which the potential of the first portion is set to the first polarity when the potential of the first portion is used as a reference, and the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference. The magnetic storage device according to any one of the above.

(Structure 8)
In the sixth operation, the eleventh junction current flows through the first junction, the twelfth junction current flows through the second junction, and the direction of the eleventh junction current is opposite to the direction of the first junction current. , The direction of the twelfth junction current is opposite to the direction of the second junction current.
In the seventh operation, the thirteenth junction current flows through the first junction, the fourteenth junction current flows through the second junction, and the direction of the thirteenth junction current is the same as the direction of the first junction current. The magnetic storage device according to the configuration 7, wherein the direction of the 14th junction current is the same as the orientation of the second junction current.

(Structure 9)
The first part, the second part, the third part between the first part and the second part, the fourth part between the first part and the third part, and the third part and the above. A conductive layer containing a fifth portion between the second portion and
A first memory cell containing a first junction and a second junction, wherein the first junction is in a first direction intersecting a first magnetic layer and a second direction from the first portion to the second portion. A first opposed magnetic layer provided between the fourth portion and the first magnetic layer, and a first non-magnetic layer provided between the first magnetic layer and the first opposed magnetic layer. The second bonding includes a second magnetic layer, a second opposed magnetic layer provided between the fifth portion and the second magnetic layer in the first direction, and the second magnetic layer. The first memory cell including the second non-magnetic layer provided between the second opposed magnetic layer and the first memory cell.
A first circuit electrically connected to the first magnetic layer and the second magnetic layer,
Memory part including
A control unit electrically connected to the conductive layer and the first circuit,
Equipped with
The control unit has a function of setting the polarity of the potential applied to the first magnetic layer and the second magnetic layer to the first polarity of positive or negative polarity or the second polarity of the polarity opposite to the first polarity. Have and
The first memory cell is
The 21st information in a state where the direction of magnetization of the first facing magnetic layer and the direction of magnetization of the second facing magnetic layer are substantially the same.
The 22nd information in which the magnetization direction of the second opposed magnetic layer is substantially opposite to the 21st information, and
The 23rd information in a state where the magnetization direction of the first opposed magnetic layer is substantially opposite to the 21st information.
Can be held,
When the control unit writes the 21st information to the first memory cell, the control unit
The 21st operation, the 22nd operation after the 21st operation, and the 23rd operation after the 22nd operation are performed.
In the 21st operation, the control unit detects the first memory cell state and determines the state.
When the first memory cell state corresponds to the 22nd information or the 21st information.
In the 22nd operation, the control unit supplies the 21st conductive layer current from the first portion to the second portion to the conductive layer, and refers to the potential of the first portion in the first circuit. In this case, the potential of the first magnetic layer is set to the first polarity, and the potential of the second magnetic layer is set to the second polarity.
In the 23rd operation, the control unit supplies the 22nd conductive layer current from the 2nd portion to the 1st portion to the conductive layer, and refers to the potential of the 1st portion in the 1st circuit. In this case, the potential of the first magnetic layer is set to the first polarity, and the potential of the second magnetic layer is set to the second polarity.
When the first memory cell state corresponds to the 23rd information or the 21st information.
In the 22nd operation, the control unit supplies the 21st conductive layer current from the first portion to the second portion to the conductive layer, and refers to the potential of the first portion in the first circuit. In this case, the potential of the first magnetic layer is set to the second polarity, and the potential of the second magnetic layer is set to the first polarity.
In the 23rd operation, the control unit supplies the 22nd conductive layer current from the 2nd portion to the 1st portion to the conductive layer, and refers to the potential of the 1st portion in the 1st circuit. A magnetic storage device that causes the potential of the second magnetic layer to be the first polarity while making the potential of the first magnetic layer the second polarity.

(Structure 10)
The 21st conductive layer current flows from the first portion to the third portion, and flows from the third portion to the second portion.
The magnetic storage device according to the configuration 9, wherein the 22nd conductive layer current flows from the second portion to the third portion and flows from the third portion to the first portion.

(Structure 11)
In the 22nd operation, the 21st junction current flows through the 1st junction and the 22nd junction current flows through the 2nd junction.
In the 23rd operation, the 23rd junction current flows through the 1st junction, the 24th junction current flows through the 2nd junction, and the direction of the 23rd junction current is the same as the direction of the 21st junction current. The direction of the 24th junction current is the same as the direction of the 22nd junction current.
When the first memory cell state corresponds to the 22nd information or the 21st information, the direction of the 21st junction current is the direction from the 1st circuit to the 1st junction, and the 22nd junction. The direction of the current is the direction from the second junction to the first circuit.
When the first memory cell state corresponds to the 23rd information or the 21st information, the direction of the 21st junction current is the direction from the 1st junction to the 1st circuit, and the 22nd junction. The magnetic storage device according to configuration 9 or 10, wherein the direction of the current is the direction from the first circuit to the second junction.

(Structure 12)
The absolute value of the 21st junction current is 0.7 times or more and 1.3 times or less the absolute value of the 22nd junction current.
11. The magnetic storage device according to configuration 11, wherein the absolute value of the 23rd junction current is 0.7 times or more and 1.3 times or less the absolute value of the 24th junction current.

(Structure 13)
When writing the 22nd information to the 1st memory cell, the control unit performs a 4th operation and a 5th operation after the 4th operation.
In the fourth operation, the control unit supplies the 23rd conductive layer current from the first portion to the second portion to the conductive layer, and refers to the potential of the first portion in the first circuit. In this case, the potential of the first magnetic layer is set to the first polarity, and the potential of the second magnetic layer is set to the second polarity.
In the fifth operation, the control unit supplies the 24th conductive layer current from the second portion to the first portion to the conductive layer, and refers to the potential of the first portion in the first circuit. The magnetic storage according to any one of the configurations 9 to 12, wherein the potential of the first magnetic layer is set to the second polarity while the potential of the second magnetic layer is set to the first polarity. Device.

(Structure 14)
In the fourth operation, the 25th junction current flows through the first junction, and the 26th junction current flows through the second junction.
The direction of the 25th junction current is the second direction from the first circuit to the first junction, and the direction of the 26th junction current is the direction from the second junction to the first circuit.
In the fifth operation, the 27th junction current flows through the first junction, and the 28th junction current flows through the second junction.
13. The magnetic storage device according to configuration 13, wherein the direction of the 27th junction current is opposite to that of the 25th junction current, and the orientation of the 28th junction current is opposite to the orientation of the 26th junction current.

(Structure 15)
When writing the 23rd information to the 1st memory cell, the control unit performs a 6th operation and a 7th operation after the 6th operation.
In the sixth operation, the control unit applies the potential of the first magnetic layer to the first circuit while supplying the 25th conductive layer current from the first portion to the second portion to the conductive layer. The potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference.
In the seventh operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the 26th conductive layer current from the second portion to the first portion to the conductive layer. Configurations 9 to 9 in which the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference. 14. The magnetic storage device according to any one of 14.

(Structure 16)
In the sixth operation, the 29th junction current flows through the first junction, and the 30th junction current flows through the second junction.
The direction of the 29th junction current is the direction from the 1st junction to the 1st circuit, and the direction of the 30th junction current is the orientation from the 1st circuit to the 2nd junction.
In the seventh operation, the 31st junction current flows through the first junction, and the 32nd junction current flows through the second junction.
The magnetic storage device according to the configuration 15, wherein the direction of the 31st junction current is opposite to that of the 29th junction current, and the orientation of the 32nd junction current is opposite to the orientation of the 30th junction current.

(Structure 17)
The conductive layer further includes a sixth part, a seventh part, an eighth part and a ninth part, the second part is between the fifth part and the sixth part, and the seventh part is. , The 8th part is between the 2nd part and the 7th part, and the 9th part is between the 7th part and the 7th part. It is between the 6 parts
The memory unit further includes a second memory cell and a second circuit.
The second memory cell includes a third junction and a fourth junction, and includes a third junction and a fourth junction.
The third junction includes a third magnetic layer, a third opposed magnetic layer provided between the eighth portion and the third magnetic layer in the first direction, the third magnetic layer, and the third magnetic layer. The fourth junction comprises a first non-magnetic layer provided between the opposing magnetic layers, and the fourth junction is between the fourth magnetic layer and the ninth portion and the fourth magnetic layer in the first direction. The fourth magnetic layer provided in the above and the fourth non-magnetic layer provided between the fourth magnetic layer and the fourth magnetic layer are included.
The second circuit is electrically connected to the third magnetic layer and the fourth magnetic layer.
The magnetic storage device according to any one of configurations 1 to 16, wherein the control unit is electrically connected to the second circuit.

(Structure 18)
The first circuit includes a first switch electrically connected to the first magnetic layer and a second switch electrically connected to the second magnetic layer.
When the first switch electrically connects the first magnetic layer to the first potential line, the second switch electrically connects the second magnetic layer to the second potential line.
When the first switch electrically connects the first magnetic layer to the second potential line, the second switch electrically connects the second magnetic layer to the first potential line.
The potential of the second potential line is higher than the potential of the first potential line.
The second circuit includes a third switch electrically connected to the third magnetic layer and a fourth switch electrically connected to the fourth magnetic layer.
When the third switch electrically connects the third magnetic layer to the first potential line, the fourth switch electrically connects the fourth magnetic layer to the second potential line.
When the third switch electrically connects the third magnetic layer to the second potential line, the fourth switch electrically connects the fourth magnetic layer to the first potential line. The magnetic storage device according to configuration 17.

(Structure 19)
When the first switch electrically connects the first magnetic layer to the first potential line, the third switch connects the third magnetic layer to the first potential line or the second potential line. Electrically connected
When the first switch electrically connects the first magnetic layer to the second potential line, the third switch connects the third magnetic layer to the first potential line or the second potential line. The magnetic storage device according to configuration 18, which is electrically connected.

(Structure 20)
The first circuit includes a first switch electrically connected to the first magnetic layer and a second switch electrically connected to the second magnetic layer.
When the first switch electrically connects the first magnetic layer to the first potential line, the second switch electrically connects the second magnetic layer to the second potential line.
When the first switch electrically connects the first magnetic layer to the second potential line, the second switch electrically connects the second magnetic layer to the first potential line.
The magnetic storage device according to any one of configurations 1 to 17, wherein the potential of the second potential line is higher than the potential of the first potential line.

According to the embodiment, it is possible to provide a magnetic storage device capable of stable and normal writing operation.

In the present specification, "vertical" and "parallel" include not only strict vertical and strict parallel, but also variations in the manufacturing process, for example, and may be substantially vertical and substantially parallel. ..

Hereinafter, embodiments of the present invention have been described with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configuration of each element such as a conductive layer, a junction, a magnetic layer, a non-magnetic layer, a circuit, a transistor, and a control unit included in a magnetic storage device can be appropriately selected from a range known to those skilled in the art. The present invention is included in the scope of the present invention as long as the present invention can be carried out in the same manner and the same effect can be obtained.

Further, a combination of any two or more elements of each specific example to the extent technically possible is also included in the scope of the present invention as long as the gist of the present invention is included.

In addition, all magnetic storage devices that can be appropriately designed and implemented by those skilled in the art based on the magnetic storage device described above as an embodiment of the present invention are also within the scope of the present invention as long as the gist of the present invention is included. Belongs to.

In addition, in the scope of the idea of the present invention, those skilled in the art can come up with various modified examples and modified examples, and it is understood that these modified examples and modified examples also belong to the scope of the present invention. ..

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and variations thereof are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and the equivalent scope thereof.

11-14 ... 1st to 4th magnetic layers, 11c to 14c ... 1st to 4th opposed magnetic layers, 11n to 14n ... 1st to 4th non-magnetic layers, 21 ... Conductive layers, 21a to 21i ... 1st to 9th part, 31, 32 ... 1st, 2nd circuit, 70 ... Control unit, 70a-70d ... Wiring, 70s ... Switch, 71a, 71b ... Control circuit, 75 ... Drive circuit, 76 ... Detection circuit, 110 ... Magnetism Storage device, Cs1 ... current source, D1 to D6 ... 1st to 6th drains, G1 to G6 ... 1st to 6th gates, Ic1 to Ic7 ... 1st to 7th conductive layer currents, Ic21 to Ic26 ... 21st to 26th conductive layer current, Im01 to Im14 ... 1st to 14th junction currents, Im21 to Im32 ... 21st to 32nd junction currents, In1, In2 ... 1st and 2nd inverters, LP1, LP2 ... 1st and 2nd Current line, Ls1, Ls2 ... 1st and 2nd wiring, MC1, MC2 ... 1st and 2nd memory cells, MP ... Memory unit, OP1 to OP7 ... 1st to 7th operations, QP21 to QP27 ... 21st to 21st 27 operations, S1 to S6 ... 1st to 6th sources, SB1 to SB4 ... 1st to 4th junctions, SW1 to SW4 ... 1st to 4th switches, T1 to T6 ... 1st to 6th transistors, Tr1, Tr2 … Transistor, VH… high potential, VL… low potential, WL… word line, i21… current, ip1, ip2… junction current

Claims (7)

Memory part and
Control unit and
Equipped with
The memory unit is
With a conductive layer
With multiple memory cells
With multiple first circuits,
Including
The conductive layer includes a first portion, a second portion, a third portion between the first portion and the second portion, a fourth portion between the first portion and the third portion, and the above. Including the fifth part between the third part and the second part.
Each of the plurality of memory cells includes a first junction and a second junction.
The first junction is provided between the first magnetic layer and the fourth portion and the first magnetic layer in a first direction intersecting the second direction from the first portion to the second portion. The second magnetic layer includes a first magnetic layer and a first non-magnetic layer provided between the first magnetic layer and the first magnetic layer, and the second junction is a second magnetic layer and the first. A second counter-magnetic layer provided between the fifth portion and the second magnetic layer in one direction, and a second non-magnetic layer provided between the second magnetic layer and the second counter-magnetic layer. Including layers,
The plurality of first circuits are electrically connected to the first magnetic layer and the second magnetic layer of the plurality of memory cells, respectively.
The control unit is electrically connected to the conductive layer and the plurality of first circuits.
When writing the first information to each of the plurality of memory cells, the control unit performs a first operation, a second operation after the first operation, and a third operation after the second operation. death,
In the first operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the first conductive layer current from the second portion to the first portion to the conductive layer. The second polarity opposite to the first polarity when the potential of the second magnetic layer is based on the potential of the first portion while making the first polarity when the potential of the first portion is used as a reference. Let me
In the second operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the second conductive layer current from the first portion to the second portion to the conductive layer. The potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference.
In the third operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the third conductive layer current from the second portion to the first portion to the conductive layer. The potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference, while the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference .
In the first operation, the first junction current flows through the first junction, the second junction current flows through the second junction, and the direction of the first junction current is the direction from the first circuit to the first junction. If, the direction of the second junction current is the direction from the second junction to the first circuit, and the direction of the first junction current is the direction from the first junction to the first circuit. In some cases, the direction of the second junction current is from the first circuit to the second junction.
In the second operation, the third junction current flows through the first junction, the fourth junction current flows through the second junction, and the direction of the third junction current is opposite to the direction of the first junction current. , The direction of the fourth junction current is opposite to the direction of the second junction current.
In the third operation, the fifth junction current flows through the first junction, the sixth junction current flows through the second junction, and the direction of the fifth junction current is opposite to the direction of the first junction current. , The direction of the sixth junction current is opposite to the direction of the second junction current.
The control unit simultaneously performs the first operation on the plurality of memory cells, the control unit simultaneously performs the second operation on the plurality of memory cells, and the control unit simultaneously performs the second operation on the plurality of memory cells. A magnetic storage device that performs the third operation at the same time . The first conductive layer current flows from the second portion to the third portion, and flows from the third portion to the first portion.
The second conductive layer current flows from the first portion to the third portion, and flows from the third portion to the second portion.
The magnetic storage device according to claim 1, wherein the third conductive layer current flows from the second portion to the third portion and from the third portion to the first portion. The absolute value of the first junction current is 0.7 times or more and 1.3 times or less the absolute value of the second junction current.
The absolute value of the third junction current is 0.7 times or more and 1.3 times or less the absolute value of the fourth junction current.
The magnetic storage device according to claim 1 , wherein the absolute value of the fifth junction current is 0.7 times or more and 1.3 times or less the absolute value of the sixth junction current. When writing the second information to at least one of the plurality of memory cells , the control unit performs a fourth operation and a fifth operation after the fourth operation.
In the fourth operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the fourth conductive layer current from the first portion to the second portion to the conductive layer. When the potential of the first portion is used as a reference, the first polarity is set, and when the potential of the second magnetic layer is used as a reference of the potential of the first portion, the second polarity is set.
In the fifth operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the fifth conductive layer current from the second portion to the first portion to the conductive layer. Claims 1 to 1, wherein the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference, and the potential of the second magnetic layer is set to the first polarity when the potential of the first portion is used as a reference. 3. The magnetic storage device according to any one of 3. In the fourth operation, the seventh junction current flows through the first junction, the eighth junction current flows through the second junction, and the direction of the seventh junction current is the same as the direction of the first junction current. , The direction of the eighth junction current is the same as the direction of the second junction current.
In the fifth operation, the ninth junction current flows through the first junction, the tenth junction current flows through the second junction, and the direction of the ninth junction current is opposite to the direction of the first junction current. The magnetic storage device according to claim 4 , wherein the direction of the tenth junction current is opposite to that of the second junction current. When writing the third information to at least one of the plurality of memory cells , the control unit performs a sixth operation and a seventh operation after the sixth operation.
In the sixth operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the sixth conductive layer current from the first portion to the second portion to the conductive layer. When the potential of the first portion is used as a reference, the second polarity is set, and when the potential of the second magnetic layer is used as a reference of the potential of the first portion, the first polarity is set.
In the seventh operation, the control unit supplies the potential of the first magnetic layer to the first circuit while supplying the seventh conductive layer current from the second portion to the first portion to the conductive layer. Claims 1 to 1, wherein the potential of the first portion is set to the first polarity when the potential of the first portion is used as a reference, and the potential of the second magnetic layer is set to the second polarity when the potential of the first portion is used as a reference. 5. The magnetic storage device according to any one of 5. In the sixth operation, the eleventh junction current flows through the first junction, the twelfth junction current flows through the second junction, and the direction of the eleventh junction current is opposite to the direction of the first junction current. , The direction of the twelfth junction current is opposite to the direction of the second junction current.
In the seventh operation, the thirteenth junction current flows through the first junction, the fourteenth junction current flows through the second junction, and the direction of the thirteenth junction current is the same as the direction of the first junction current. The magnetic storage device according to claim 6 , wherein the direction of the 14th junction current is the same as the orientation of the second junction current.

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