JP6943110B2 - Power converter - Google Patents

Description

The present invention relates to a power conversion device, and more particularly to control of a switching circuit included in the power conversion device.

Electric vehicles such as hybrid vehicles and electric vehicles are widely used. The electric vehicle is equipped with a battery for supplying electric power to the drive motor. In a hybrid vehicle, the battery is charged by the driving force of the engine and the electric power generated by regenerative braking. Further, in an electric vehicle having a plug-in function, the battery is charged by the electric power supplied from the commercial power source. Electric vehicles are equipped with a power converter to charge the battery. The power converter converts the voltage input for charging the battery into an appropriate voltage and applies it to the battery.

The following Patent Documents 1 and 2 show a power conversion device in which two switching circuits are magnetically coupled by a winding connected to each circuit and power is transmitted between the two switching circuits. Patent Document 3 describes a power conversion device that controls an output voltage by adjusting the frequencies of the first and second boost converters while improving the power factor by pulse width modulation of the first and second boost converters. It is shown.

Japanese Unexamined Patent Publication No. 2011-193713 Japanese Unexamined Patent Publication No. 2017-46533 Japanese Unexamined Patent Publication No. 2010-183726

For an electric vehicle having a plug-in function, a technique for adjusting the power factor of input power by using a circuit as described in Patent Document 3 has been proposed. In such a plug-in type electric vehicle, a power conversion device including two switching circuits coupled by a transformer is used in order to insulate the circuit on the side touched by the user and the circuit on the battery side. In a power conversion device using a transformer, a current that does not contribute to power transmission flows through the transformer depending on the operation of the circuit connected to the primary winding of the transformer and the operation of the circuit connected to the secondary winding of the transformer. , Power loss may be large. Therefore, as shown in Patent Document 2, a technique for reducing power loss by devising the switching timing of each switching circuit has been proposed.

However, combining a circuit as described in Patent Document 2 for the purpose of reducing power loss and a circuit as described in Patent Document 3 for the purpose of improving the power factor is a combination of these circuits. It is difficult because the configuration and control method of are different.

An object of the present invention is to adjust the power factor of the electric power input to the power conversion device and to suppress the power loss in the power conversion device.

In the present invention, a first switching circuit that adjusts the power factor of an input power by switching and a power that is coupled to the first switching circuit by a magnetic coupling circuit and input from the first switching circuit via the magnetic coupling circuit. The first switching circuit and the second switching circuit are shifted in timing according to the power transmitted from the first switching circuit to the second switching circuit and the same switching frequency. The control unit includes a control unit that switches in It is characterized by suppressing a circulating current which is a current and does not contribute to the power output by the second switching circuit.

Desirably, the correction value is determined according to the dead time when each switching element included in the second switching circuit is turned off.

Desirably, the control unit obtains a value for increasing or decreasing the duty ratio of the second switching circuit as the correction value according to the duty ratio of the first switching circuit.

Desirably, a first switching circuit that adjusts the power factor of the input power by switching and a second switching circuit that is coupled to the first switching circuit by a magnetic coupling circuit and adjusts the power input from the magnetic coupling circuit by switching. A control unit that switches the first switching circuit and the second switching circuit at the same switching frequency at different timings according to the power transmitted from the first switching circuit to the second switching circuit. The control unit determines an upper limit value and a lower limit value of the duty ratio of the first switching circuit and the second switching circuit according to the load power output from the second switching circuit to the load circuit, and determines the upper limit value and the lower limit value. The duty ratio is adjusted within the numerical range determined by the lower limit value.

Desirably, the control unit decreases the upper limit value or increases the lower limit value as the load power increases.

Desirably, the first switching circuit is two first half bridges connected in parallel, each containing two switching elements connected in series, and two first half bridges connected in parallel. A buffer capacitor connected in parallel to the first half bridge to store DC power and the other end of an AC power source having one end connected to an intermediate connection point of the primary winding are connected to the AC power source. The second switching circuit has two second half bridges connected in parallel, including a rectifying unit that rectifies the AC power output from the first switching circuit by switching of the first switching circuit and charges the buffer capacitor. Two second half bridges, each containing two switching elements connected in series, and an output capacitor connected in parallel to the two second half bridges connected in parallel to store DC power. The power conversion device is connected between a connection point of two switching elements included in one of the first half bridges and a connection point of two switching elements included in the other first half bridge. 2 connected between the primary winding and the connection point of the two switching elements included in one of the second half bridges and the connection point of the two switching elements included in the other second half bridge. The primary winding and the secondary winding are magnetically coupled to form the magnetic coupling circuit.

According to the present invention, the power factor of the electric power input to the power conversion device can be adjusted, and the power loss in the power conversion device can be suppressed.

It is a figure which shows the structure of the power conversion device for vehicle mounting. It is a figure which shows the time waveform of the control signal Cn1 to Cn8. It is a figure which shows the time waveform of the primary winding voltage Vuv, the secondary winding voltage Vwx, and the secondary winding current id. It is a figure which shows the structural example of the control part. It is a figure which shows the time waveform of the input AC voltage Vac, the UV phase duty ratio target value α0 ^* , and the correction term δ = 2π · td · fsw · PL. It is a figure which shows the time waveform of the primary winding voltage Vuv, the secondary winding voltage Vwx, and the secondary winding current id. It is a figure which shows the time waveform of the primary winding voltage Vuv, the secondary winding voltage Vwx, and the secondary winding current id. It is a figure which shows the structural example of the control part. It is a figure which shows the time waveform of the output power Pout, the UV phase duty ratio target value α0 ^{*, and the phase difference φ.} It is a figure which shows the time waveform of the output power Pout, the UV phase duty ratio target value α0 ^{*, and the phase difference φ.}

FIG. 1 shows the configuration of a vehicle-mounted power conversion device according to an embodiment of the present invention. The power conversion device includes a power factor improving circuit 10, a voltage converter circuit 14, and a control unit 22. An AC voltage source 18 is connected to the power factor improving circuit 10. The AC voltage source 18 is, for example, a commercial power source, and when the vehicle on which the power conversion device is mounted has a plug-in function, the AC outlet becomes the AC voltage source 18. A load circuit 20 is connected to the voltage converter circuit 14. The load circuit 20 is, for example, a charging circuit for charging a vehicle-mounted battery. The control unit 22 controls on / off of each switching element included in the power factor improving circuit 10 and the voltage converter circuit 14.

The power factor improving circuit 10 adjusts the time waveform of the current flowing in from the AC voltage source 18 by switching, and improves the power factor when the power conversion device side is viewed from the AC voltage source 18. The power factor improving circuit 10 and the voltage converter circuit 14 are coupled by a transformer T, and the electric power output from the AC voltage source 18 is transmitted from the power factor improving circuit 10 to the voltage converter circuit 14. The voltage converter circuit 14 converts the AC voltage obtained from the secondary winding T2 of the transformer T into a DC voltage, and outputs a DC voltage of an appropriate magnitude to the load circuit 20. According to the power factor improving circuit 10 and the voltage converter circuit 14, power is efficiently supplied from the AC voltage source 18 to the load circuit 20.

The configuration of the power factor improving circuit 10 will be described. The power factor improving circuit 10 includes a filter capacitor Cin, a primary winding T1, and a UV phase switching circuit 12.

The UV phase switching circuit 12 includes a half bridge U composed of switching elements S1 and S2, a half bridge V composed of switching elements S3 and S4, a diode D1, a diode D2, and a buffer capacitor Cbuf. The half bridge U connects one end of the switching element S1 and one end of the switching element S2. Diodes are connected to both ends of the switching element S1 with the side of the connection point with the switching element S2 as the anode. Diodes are connected to both ends of the switching element S2 with the side of the connection point with the switching element S1 as the cathode. As the switching elements S1 and S2, for example, an IGBT (Insulated Gate Bipolar Transistor) is used. In this case, the emitter of the IGBT as the switching element S1 and the collector of the IGBT as the switching element S2 are connected.

Similarly, the half bridge V connects one end of the switching element S3 and one end of the switching element S4. Diodes are connected to both ends of the switching element S3 with the side of the connection point with the switching element S4 as the anode. Diodes are connected to both ends of the switching element S4 with the side of the connection point with the switching element S3 as the cathode. As the switching elements S3 and S4, for example, an IGBT is used. In this case, the emitter of the IGBT as the switching element S3 and the collector of the IGBT as the switching element S4 are connected.

A primary winding T1 is connected between the connection points of the switching elements S1 and S2 and the connection points of the switching elements S3 and S4. The center tap m (midway connection point) of the primary winding T1 is connected to the power input terminal 24-1.

A first reactor is connected between one end of the primary winding T1 and the connection points of the switching elements S1 and S2, and between the other end of the primary winding T1 and the connection points of the switching elements S3 and S4. A second reactor may be connected to the. In this case, the first reactor and the second reactor may be magnetically coupled. Further, a reactor may be connected between the power input terminal 24-1 and the center tap m.

The half bridges U and V are connected in parallel to form a full bridge. That is, the terminal on the side opposite to the switching element S2 side of the switching element S1 (the terminal on the upper side in the figure) and the terminal on the side opposite to the switching element S4 side in the switching element S3 (the terminal on the upper side in the figure) are connected. ing. Further, the terminal on the side of the switching element S2 opposite to the switching element S1 side (the terminal on the lower side in the figure) and the terminal on the side opposite to the switching element S3 side of the switching element S4 (the terminal on the lower side in the figure) are It is connected.

The anode of diode D1 is connected to the cathode of diode D2. The cathode of the diode D1 is connected to the upper terminals of the half bridges U and V, and the anode of the diode D2 is connected to the lower terminals of the half bridges U and V. The connection points of the diodes D1 and D2 are connected to the power input terminal 24-2.

A buffer capacitor Cbuf is connected between the connection point of the switching element S1, the switching element S3, and the diode D1 and the connection point of the switching element S2, the switching element S4, and the diode D2.

The primary winding T1 is magnetically coupled to the secondary winding T2 included in the voltage converter circuit 14, and the primary winding T1 and the secondary winding T2 constitute a transformer T.

A filter capacitor Cin is connected between the power input terminal 24-1 and the power input terminal 24-2. Further, an AC voltage source 18 is connected between the power input terminal 24-1 and the power input terminal 24-2. When the AC voltage source 18 is a commercial power source, a power supply plug is connected to the power input terminals 24-1 and 24-2 via a cable, and the power supply plug is inserted into the AC outlet.

The operation of the power factor improving circuit 10 will be described. The AC voltage source 18 outputs an input AC voltage Vac, which is a sinusoidal voltage, to the power input terminals 24-1 and 24-2. The filter capacitor Cin suppresses the high-frequency current generated in the power factor improving circuit 10 and flowing out to the AC voltage source 18 side.

The control unit 22 outputs the control signals Cn1 to Cn4 to the switching elements S1 to S4, respectively, and controls the switching elements S1 to S4 on and off. When the control signal Cni is high, the switching element Si is turned on, and when the control signal Cni is low, the switching element Si is turned off. However, i is an integer of 1 to 4. In the time zone excluding the dead time, the control signal Cn2 has a value obtained by inverting high and low with respect to the control signal Cn1, and the control signal Cn4 has a value obtained by inverting high and low with respect to the control signal Cn3. In the dead time, the control signals Cn1 and Cn2 are both low, and the control signals Cn3 and Cn4 are both low. Further, the phases of the control signals Cn3 and Cn4 are 180 ° behind the control signals Cn1 and Cn2, respectively.

As a result, the switching element S1 and the switching element S2 are alternately turned on and off. That is, the switching element S2 changes from off to on when the dead time elapses after the switching element S1 turns from on to off, and the switching element S1 changes when the dead time elapses after the switching element S2 turns from on to off. From off to on. Similarly, the switching element S3 and the switching element S4 are alternately turned on and off. That is, the switching element S4 changes from off to on when the dead time elapses after the switching element S3 turns from on to off, and the switching element S3 changes when the dead time elapses after the switching element S4 turns from on to off. From off to on. By providing the dead time in this way, it is possible to prevent the two switching elements constituting each half bridge from being turned on at the same time and short-circuiting at both ends of the buffer capacitor Cbuf.

The on / off phase of the switching elements S3 and S4 is 180 ° behind the on / off phase of the switching elements S1 and S2.

The control unit 22 flows through the difference between the terminal voltage of the buffer capacitor Cbuf and its target value, the input AC voltage Vac output by the AC voltage source 18, and the path connecting the power input terminal 24-1 and the center tap m. The duty ratio (time ratio) of the control signals Cn1 to Cn4 is changed according to the input current iL. As a result, the time waveform of the current flowing through the power input terminals 24-1 and 24-2 is approximated or matched with the time waveform of the input AC voltage Vac, and the current flowing through the power input terminals 24-1 and 24-2 is matched. The phase is approximated or matched with the phase of the input AC voltage Vac.

Further, by controlling the switching S1 to S4 on and off according to the control signals Cn1 to Cn4, the switching elements S1 to S4, the diodes D1 and D2 operate as a rectifier circuit, and the voltage Vuv between the terminals of the primary winding T1 is rectified. Is applied to the buffer capacitor Cbuf. As a result, the buffer capacitor Cbuf is charged based on the input AC voltage Vac.

As described above, the operating state of the power factor improving circuit 10 is represented by each of the control signals Cn1 to Cn4. The UV phase duty ratio as a representative value of the duty ratio is defined as a value obtained by dividing the time obtained by adding the time when the control signal Cn1 is turned on and the dead time by the period of the control signal Cn1.

The period of the control signals Cn1 to Cn4 is sufficiently shorter than the period of the input AC voltage Vac. The time waveform of the current flowing through the power input terminals 24-1 and 24-2 is shaped by the switching of the switching elements S1 to S4, and the power factor improving operation is executed.

The configuration of the voltage converter circuit 14 will be described. The voltage converter circuit 14 includes a secondary winding T2 and a WX phase switching circuit 16.

The WX phase switching circuit 16 includes a half bridge W composed of switching elements S5 and S6, a half bridge X composed of switching elements S7 and S8, and an output capacitor Cout. The half bridge W connects one end of the switching element S5 and one end of the switching element S6. Diodes are connected to both ends of the switching element S5 with the side of the connection point with the switching element S6 as the anode. Diodes are connected to both ends of the switching element S6 with the side of the connection point with the switching element S5 as the cathode. As the switching elements S5 and S6, for example, an IGBT is used. In this case, the emitter of the IGBT as the switching element S5 and the collector of the IGBT as the switching element S6 are connected.

Similarly, the half bridge X connects one end of the switching element S7 and one end of the switching element S8. Diodes are connected to both ends of the switching element S7 with the side of the connection point with the switching element S8 as the anode. Diodes are connected to both ends of the switching element S8 with the side of the connection point with the switching element S7 as the cathode. As the switching elements S7 and S8, for example, an IGBT is used. In this case, the emitter of the IGBT as the switching element S7 and the collector of the IGBT as the switching element S8 are connected.

A secondary winding T2 is connected between the connection points of the switching elements S5 and S6 and the connection points of the switching elements S7 and S8.

The half bridges W and X are connected in parallel to form an output full bridge. That is, the upper terminal of the switching element S5 and the upper terminal of the switching element S6 are connected, and the lower terminal of the switching element S7 and the lower terminal of the switching element S8 are connected. An output capacitor Cout is connected between the upper terminals of the half bridges W and X and the lower terminals of the half bridges W and X. Further, a positive electrode load terminal 26P is connected to the upper terminals of the half bridges W and X, and a negative electrode load terminal 26N is connected to the terminals below the half bridges W and X. Further, a load circuit 20 is connected between the positive electrode load terminal 26P and the negative electrode load terminal 26N.

The operation of the voltage converter circuit 14 will be described. A voltage is generated in the secondary winding T2 according to the voltage applied to the primary winding T1 of the power factor improving circuit 10, and the voltage generated in the secondary winding T2 is connected to the connection points of the switching elements S5 and S6. It is applied between the connection points of the switching elements S7 and S8.

The control unit 22 outputs the control signals Cn5 to Cn8 to the switching elements S5 to S8, respectively, and controls the switching elements S5 to S8 on and off. When the control signal Cni is high, the switching element Si is turned on, and when the control signal Cni is low, the switching element Si is turned off. However, i is an integer of 5 to 8. In the time zone excluding the dead time, the control signal Cn6 has a value obtained by inverting high and low with respect to the control signal Cn5, and the control signal Cn8 has a value obtained by inverting high and low with respect to the control signal Cn7. Further, the phases of the control signals Cn7 and Cn8 are 180 ° behind the control signals Cn5 and Cn6, respectively.

As a result, the switching elements S5 and S6 are alternately turned on and off. That is, the switching element S6 changes from off to on when the dead time elapses after the switching element S5 turns from on to off, and the switching element S5 changes when the dead time elapses after the switching element S6 turns from on to off. From off to on. Similarly, the switching elements S7 and S8 are alternately turned on and off. That is, the switching element S8 changes from off to on when the dead time elapses after the switching element S7 turns from on to off, and the switching element S7 changes when the dead time elapses after the switching element S8 turns from on to off. From off to on. By providing the dead time in this way, it is possible to prevent the two switching elements constituting each half bridge from being turned on at the same time and short-circuiting at both ends of the output capacitor Cout.

The on / off phase of the switching elements S7 and S8 is 180 ° behind the on / off phase of the switching elements S5 and S6.

As described above, the operating state of the voltage converter circuit 14 is represented by each of the control signals Cn5 to Cn8. The WX phase duty ratio as a representative value of the duty ratio is defined as a value obtained by dividing the time obtained by adding the time when the control signal Cn5 is turned on and the dead time by the period of the control signal Cn5. The control unit 22 matches the WX phase duty ratio of the voltage converter circuit 14 with the UV phase duty ratio of the power factor improving circuit 10.

The control unit 22 delays the phase of switching the WX phase switching circuit 16 with respect to the UV phase switching circuit 12 according to the difference between the terminal voltage of the output capacitor Cout and its target value. Since the phase for switching the WX phase switching circuit 16 is delayed with respect to the phase for switching the UV phase switching circuit 12, electric power is transmitted from the UV phase switching circuit 12 to the WX phase switching circuit 16 via the transformer T.

As described above, the power conversion device includes a UV phase switching circuit 12 as a first switching circuit that adjusts the power factor of the input power from the AC voltage source 18 by switching, and a transformer as a magnetic coupling circuit in the UV phase switching circuit 12. It includes a WX phase switching circuit 16 as a second switching circuit that is coupled by T and adjusts the power input from the UV phase switching circuit 12 via the transformer T by switching. The control unit 22 shifts the timing of the UV phase switching circuit 12 and the WX phase switching circuit 16 according to the power transmitted from the UV phase switching circuit 12 to the WX phase switching circuit 16, that is, shifts the phases and performs the same switching. Switch by frequency.

The UV phase switching circuit 12 is two first half bridges connected in parallel and includes half bridges U and V as two first half bridges, each containing two switching elements connected in series. .. Further, the UV phase switching circuit 12 is a center tap of the primary winding T1 via a buffer capacitor Cbuf connected in parallel to the half bridges U and V connected in parallel to store DC power and a power input terminal 24-1. As a rectifying unit that charges the buffer capacitor Cbuf by connecting the other end of the AC voltage source 18 to which one end is connected to m and rectifying the AC power output from the AC voltage source 18 by switching of the UV phase switching circuit 12. It has the capacitors D1 and D2 of.

The WX phase switching circuit 16 is two second half bridges connected in parallel, and includes half bridges W and X as two second half bridges, each including two switching elements connected in series. .. Further, the WX phase switching circuit 16 has an output capacitor Cout which is connected in parallel to the half bridges W and X which are connected in parallel and stores DC power.

The primary winding T1 is connected between the connection points of the two switching elements S1 and S2 included in the half bridge U and the connection points of the two switching elements S3 and S4 included in the half bridge V. The secondary winding T2 is connected between the connection points of the two switching elements S5 and S6 included in the half bridge W and the connection points of the two switching elements S7 and S8 included in the half bridge X. The primary winding T1 and the secondary winding T2 are magnetically coupled to form a transformer T as a magnetic coupling circuit.

In the power conversion device according to the present embodiment, a dead time is provided when one of the two switching elements constituting each half bridge is turned from on to off and the other is turned from off to on. When there is such a dead time, the circulating current that does not contribute to the power output to the load circuit 20 may increase, as will be described later. This circulating current is a current that flows in the secondary winding T2 during a time period when the voltage Vwx across the secondary winding T2 is 0, and the loss is increased due to the generation of Joule heat or the like. In order to suppress the circulating current, the control unit 22 sets the value obtained by adding the correction value to the UV phase duty ratio as the WX phase duty ratio, and switches the voltage converter circuit 14 according to the WX phase duty ratio.

2 (a) and 2 (b) show the time waveforms of the control signals Cn1 to Cn4. The time waveforms of the control signals Cn1 and Cn2 are shown by solid lines, and the time waveforms of the control signals Cn3 and Cn4 are shown by broken lines.

The period of the control signals Cn1 and Cn2 with respect to the half bridge U is P. The time when the control signal Cn1 becomes high is the time (Tα−td) obtained by subtracting the dead time td from the duty-on time Tα. Here, the duty-on time Tα is a time during which the control signal Cn1 becomes high when the dead time td is set to 0. The time when the control signal Cn2 becomes high is the time (P-Tα-td) obtained by subtracting the duty-on time Tα from the switching cycle P and further subtracting the dead time td.

The control signals Cn3 and Cn4 for the half bridge V have the same time waveforms as the control signals Cn1 and Cn2, respectively, and their phases are 180 ° behind the control signals Cn1 and Cn2, respectively.

2 (c) and 2 (d) show the time waveforms of the control signals Cn5 to Cn8. The time waveforms of the control signals Cn5 and Cn6 are shown by solid lines, and the time waveforms of the control signals Cn7 and Cn8 are shown by broken lines. The control signals Cn5 and Cn6 are out of phase with the control signals Cn1 and Cn2 by φ, respectively. The duty ratio (WX phase duty ratio) of the control signal Cn5 is a correction duty ratio obtained by adding a correction value to the duty ratio (UV phase duty ratio) of the control signal Cn1. By correcting the duty ratio, the pulse width of the control signal Cn5 becomes the time obtained by adding the time conversion correction value Δα to the pulse width of the control signal Cn1. The pulse width of the control signal Cn6 is the time obtained by adding the time conversion correction value Δα to the pulse width of the control signal Cn2. The time-converted correction value Δα is a time-converted value of the correction value of the duty ratio expressed in radians. In the examples shown in FIGS. 2 (c) and 2 (d), Δα is a negative value, and the on-time of the control signal Cn5 is shorter than the on-time of the control signal Cn1 by | Δα |. Further, the off time of the control signal Cn6 is shorter than the off time of the control signal Cn2 by | Δα |. In FIGS. 2C and 2D, the time waveforms of the control signals Cn5 and Cn6 before correction are schematically shown by dotted lines.

Similarly, the control signals Cn7 and Cn8 are out of phase with the control signals Cn3 and Cn4 by φ, respectively. The duty ratio of the control signal Cn7 is a correction duty ratio obtained by adding a correction value to the duty ratio of the control signal Cn3. By correcting the duty ratio, the pulse width of the control signal Cn7 becomes the time obtained by adding the time conversion correction value Δα to the pulse width of the control signal Cn3. Further, the pulse width of the control signal Cn8 is the time obtained by adding the time conversion correction value Δα to the pulse width of the control signal Cn4. In the examples shown in FIGS. 2 (c) and 2 (d), Δα is a negative value, and the on-time of the control signal Cn7 is shorter than the on-time of the control signal Cn3 by | Δα |. Further, the off time of the control signal Cn8 is shorter than the off time of the control signal Cn4 by | Δα |. In FIGS. 2C and 2D, the time waveforms of the control signals Cn7 and Cn8 before correction are schematically shown by dotted lines.

Between the time when the control signal Cn1 switches from high to low and the time when the control signal Cn2 switches from low to high, and the time when the control signal Cn2 switches from high to low and the control signal Cn1 switches from low to high. A dead time td is provided for each of the changing times. The set of the control signal Cn3 and the control signal Cn4, the set of the control signals Cn5 and Cn6, and the set of the control signals Cn7 and Cn8 are also provided with the dead time td as in the set of the control signals Cn1 and Cn2. In FIG. 2, each dead time is shown by hatching.

Assuming that the buffer capacitor Cbuf is charged to a constant voltage Vb and the output capacitor Cout is charged to a constant voltage Vd, the primary winding voltage Vuv, the secondary winding voltage Vwx and the secondary winding current id Will be described. 3 (a) and 3 (b) show time waveforms of the primary winding voltage Vuv and the secondary winding voltage Vwx, respectively. Further, it is assumed that the winding ratio defined as the ratio of the number of turns of the primary winding T1 to the number of turns of the secondary winding T2 is N, and the relationship of Vb = N · Vd is established.

The primary winding voltage Vuv becomes Vb in the time zone when both the switching elements S1 and S4 are turned on, and the primary winding voltage becomes −Vuv in the time zone when both the switching elements S2 and S3 are turned on. Further, the secondary winding voltage Vwx becomes Vd in the time zone when both the switching elements S5 and S8 are turned on, and the secondary winding voltage Vwx becomes −Vd in the time zone when both the switching elements S6 and S7 are turned on. Become. In other time zones, the primary winding voltage Vuv and the secondary winding voltage Vwx are both 0.

The value of the primary winding voltage Vuv repeats changing in the order of Vb, 0, -Vb, 0 with the passage of time, such as Vb, 0, -Vb, 0, Vb, .... The secondary winding voltage Vwx repeatedly changes in the order of Vd, 0, −Vd, 0 with the passage of time, such as Vd, 0, −Vd, 0, Vd, ....

The time for the secondary winding voltage Vwx to rise from 0 to Vd is delayed by φ in phase conversion with respect to the time for the primary winding voltage Vv to rise from 0 to Vb. The time waveform shown by the broken line in FIG. 3B is the secondary winding voltage Vwx when the power conversion device operates according to the duty ratio in which the correction value is not added to the UV phase duty ratio. The time waveform shown by the solid line in FIG. 3B is the secondary winding voltage Vwx when the power converter operates according to the WX phase duty ratio in which the correction value is added to the UV phase duty ratio.

FIG. 3C shows a time waveform of the current id flowing through the secondary winding T2. The direction in which the secondary winding current id flows from the connection point of the switching element S7 and the switching element S8 toward the connection point of the switching elements S5 and S6 is positive.

The case where the power conversion device operates according to the UV duty ratio and the WX duty ratio will be described. During the time t1 to t2, the primary winding voltage Vuv is Vb, while the secondary winding voltage Vwx is 0. As a result, an induced current flows in the secondary winding T2 and the secondary winding current id increases. During the time t2 to t3, the primary winding voltage Vuv maintains Vb and the secondary winding voltage Vwx maintains Vd. Since Vb = N · Vd is established, the secondary winding current id has little transient increase / decrease and maintains a substantially constant value from the time t2. During the time t3 to t4, the secondary winding voltage Vwx is Vd, while the primary winding voltage Vuv is 0. As a result, an induced current flows through the secondary winding T2, and the secondary winding current id decreases. Since both the primary winding voltage Vuv and the secondary winding voltage Vwx are 0 during the time t4 to t5, the id has little transient increase / decrease and maintains a value close to 0 or 0 from the time t4. ..

During the time t5 to t9, the primary winding voltage Vuv, the secondary winding voltage Vwx, and the secondary winding current id are the reversals of the polarities of the values at the times t1 to t5. During the time t9 to t10, the primary winding voltage Vuv is Vb, while the secondary winding voltage Vwx is 0, as in the time t1 to t2. As a result, an induced current flows in the secondary winding T2 and the secondary winding current id increases.

Next, the operation when the power conversion device operates according to the duty ratio to which the correction value is not added will be described. According to the WX phase duty ratio, the secondary winding current id decreases from time t3 to time t4 and approaches 0 or becomes 0. On the other hand, when the duty ratio to which the correction value is not added is followed, the secondary winding current id decreases from time t3 to time t4 + | Δα | to 0, and the direction is reversed to be negative. To increase. After that, the value −iz at the time t4 + | Δα | is maintained from the time t4 + | Δα | to the time t5. Further, when the WX phase duty ratio is followed, the secondary winding current id approaches 0 from time t7 to time t8. On the other hand, when the duty ratio to which the correction value is not added is followed, the secondary winding current id goes to 0 from the time t7 to the time t8 + | Δα |, and the direction is reversed and increases in the positive direction. After that, the value iz at the time t8 + | Δα | is maintained from the time t8 + | Δα | to the time t9.

Among the secondary winding current ids, a circulating current that does not contribute to the electric power supplied to the load circuit 20 will be described. When the power converter operates according to the duty ratio to which the correction value is not added, the secondary winding voltage Vwx becomes 0 in the time zone of time t1 to t9 during the time t4 + | Δα. Between | and t6, and between time t8 + | Δα | and t9. The secondary winding current id in these zero voltage time zones is a circulating current that does not contribute to the power output to the load circuit 20, and increases the loss of Joule heat and the like.

In the zero voltage time zone, the current −iz at the time t4 + | Δα | flows during the time t4 + | Δα | to t5, and the current iz at the time t8 + | Δα | flows during the time t8 + | Δα | .. Therefore, in the zero voltage time zone, a circulating current (−iz or iz) determined based on the secondary winding current id at the time t4 + | Δα | and the time t8 + | Δα | flows.

On the other hand, when the power converter operates according to the WX phase duty ratio, the secondary winding voltage Vwx becomes 0 in the time zone of time t1 to t9 during time t1 to t2 and time t4 to t6. , And time between t8 and t9. Among these zero voltage time zones, the secondary winding current id is 0 or a value close to 0 during the time t4 to t5 and between the time t8 and t9. Therefore, the circulating current is suppressed and the loss due to the circulating current is suppressed as compared with the case where the correction value follows the duty ratio to which the correction value is not added.

FIG. 4 shows a configuration example of the control unit 22. The control unit 22 may include a processor that realizes the components shown in FIG. 4 by executing a program. Further, each component may be individually configured by an electronic circuit as hardware.

When the control unit 22 generates each control signal, the measured value Vbm of the inter-terminal voltage Vb of the buffer capacitor Cbuf, the measured value Vim of the input AC voltage Vac, the measured value IL of the input current iL, and the voltage converter circuit 14 The measured value Vdm of the voltage Vd output to the load circuit 20 is used. The power conversion device is provided with sensors (not shown) for measuring these.

The control unit 22 sets the UV phase duty ratio target values α0 ^* and WX based on the difference between the buffer voltage measurement value Vbm, which is the measurement value of the inter-terminal voltage of the buffer capacitor Cbuf, and the buffer voltage target value Vb ^{*, which is the target value thereof.} Find the phase duty ratio target value α ^* . Further, the control unit 22 determines the WX phase based on the difference between the output voltage measurement value Vdm, which is the measurement value of the output voltage from the voltage converter circuit 14 to the load circuit 20, and the output voltage target value Vd ^{*, which is the target value thereof.} Each control signal that delays the phase of switching the switching circuit 16 with respect to the UV phase switching circuit 12 is generated.

The process of obtaining the UV phase duty ratio target value α0 ^* and the WX phase duty ratio target value α ^* will be described. The subtractor 28 subtracts the buffer voltage measurement value Vbm from the buffer voltage target value Vb ^* to obtain the first error, and outputs the first error to the voltage PI control unit 30. The voltage PI control unit 30 obtains the first control value by proportional integration control and outputs it to the multiplier 32. The multiplier 32 multiplies the first control value by the absolute value | Vim | of the measured value of the input AC voltage Vin, and further multiplies the reciprocal of the self-squared value of the time average value of the input AC voltage measured value Vim to obtain the input current target. The value iL ^* is output to the subtractor 34. The subtractor 34 subtracts the absolute value | IL | of the input current measurement value IL from the input current target value iL ^* to obtain the second error, and outputs the second error to the current PI control unit 36. The current PI control unit 36 obtains a second control value by proportional integration control and outputs it to the adder 38. The adder 38 adds the half-cycle target value 1- | Vim | / Vbm to the second control value to obtain the pre-adjustment target value α0. The half-cycle target value 1- | Vim | / Vbm has significance as a duty ratio at which the power factor improving effect can be obtained in the power factor improving circuit 10 when the input AC voltage Vac is a positive half-cycle value.

When the measured value Vim of the input AC voltage Vac is 0 or a positive value, the duty ratio determining unit 40 obtains the UV phase duty ratio target value α0 ^* with ^{α0 * = α0.} Further, when the measured value Vim of the input AC voltage Vac is a negative value, the duty ratio determining unit 40 obtains the UV phase duty ratio target value α0 ^{* by} setting ^{α0 * = 1-α0.}

^{Further, the duty ratio determining unit 40 corrects the UV phase duty ratio target value α0 *} according to the following (Equation 1) to obtain the WX phase duty ratio target value α ^* . However, the unit of the WX phase duty ratio target value α ^* obtained in (Equation 1) is radian, and the value obtained by dividing this value by 2π is the value representing the ratio of the on-duty time Tα to one cycle P. ..

(Equation 1) α ^* = α0 ^* + 2π ・ td ・ fsw ・ PL [rad]

Td in this equation is the dead time. fsw is the switching frequency and is the reciprocal of the switching period P. Further, PL is a polarity coefficient, and has a value ^{of +1 when the UV phase duty ratio target value α0 *} is π or more, and -1 when the UV phase duty ratio target value α0 ^* is less than π.

In (Equation 1), the polarities of the correction terms 2π, td, fsw, and PL are reversed depending on whether the UV phase duty ratio target value α0 ^{* is π or more and less than π.} Thus, the control unit 22, based on the correction value having a polarity corresponding to the UV-phase duty ratio target value .alpha.0 ^* corrected ^* UV-phase duty ratio target value .alpha.0, obtaining the WX-phase duty ratio target value alpha ^*. Then, the WX phase switching circuit 16 is controlled based on the WX phase duty ratio target value α ^{* to suppress the circulating current.}

The unit of the correction value 2π, td, fsw, and PL of (Equation 1) is radian. The time-converted correction value Δα shown in FIG. 2 is a value obtained by multiplying the switching period P (= 1 / fsw) and dividing by 2π as shown in (Equation 2). That is, the time-converted correction value Δα determines the polarity of the dead time td according to the polarity coefficient PL, and | Δα | = td.

(Equation 2) Δα = td ・ PL

A process of generating a control signal that delays the phase of switching the WX phase switching circuit 16 with respect to the UV phase switching circuit 12 will be described. The subtractor 42 obtains a third error obtained by subtracting the output voltage measurement value Vdm from the output voltage target value Vd ^{*, and outputs the third error to the phase PI control unit 44.} The phase PI control unit 44 obtains a third control value by proportional integration control and outputs it to the phase adjustment unit 48. The carrier generation unit 46 outputs a carrier signal for performing pulse width modulation to the phase adjustment unit 48. The carrier signal is, for example, a signal having a triangular wave as a time waveform.

The phase adjusting unit 48 further changes the phase of the carrier signal output from the carrier generation unit 46 based on the third control value, and outputs the phase to the UV phase buffer amplifier 50. For example, the phase adjusting unit 48 advances the phase of the carrier signal as the third control value becomes larger. The UV phase buffer amplifier 50 outputs the carrier signal output from the phase adjusting unit 48 to the UV phase control signal generation unit 54 as a U phase carrier signal CU. Further, the UV phase buffer amplifier 50 delays the carrier signal output from the phase adjusting unit 48 by 180 ° and outputs it as a V phase carrier signal CV to the UV phase control signal generation unit 54.

The phase adjusting unit 48 outputs the carrier signal to the WX phase buffer amplifier 52. The WX phase buffer amplifier 52 outputs the carrier signal output from the phase adjusting unit 48 to the WX phase control signal generation unit 56 as the W phase carrier signal CW. Further, the WX phase buffer amplifier 52 delays the carrier signal output from the phase adjusting unit 48 by 180 ° and outputs it to the WX phase control signal generation unit 56 as an X phase carrier signal CX.

Here, the process of advancing the phase of the signal output to the UV phase buffer amplifier 50 by the phase adjusting unit 48 based on the third control value has been described, but the signal output by the phase adjusting unit 48 to the WX phase buffer amplifier 52 has been described. A process of delaying the phase of the above based on the third control value may be adopted.

The UV phase control signal generation unit 54 generates ^{control signals Cn1 to Cn4 as shown in FIG. 2 based on the UV phase duty ratio target value α0 *} , the U phase carrier signal CU, and the V phase carrier signal CV. The WX phase control signal generation unit 56 generates ^{control signals Cn5 to Cn8 as shown in FIG. 2 based on the WX phase duty ratio target value α *} , the W phase carrier signal CW, and the X phase carrier signal CX.

According to such control, when the buffer voltage measurement value Vbm is ^{less than the buffer voltage target value Vb *} , the UV phase duty ratio target value α0 ^* increases, and the buffer voltage measurement value Vb becomes the buffer voltage target value Vb ^*. When it exceeds, the UV phase duty ratio target value α0 ^* decreases. As a result, the voltage between the terminals of the buffer capacitor Cbuf approaches or coincides with the ^{voltage target value Vb *.}

Further, when the output voltage measurement value Vdm is ^{less than the output voltage target value Vd *} , the phase delay in switching the WX phase switching circuit 16 becomes larger than the phase in which the UV phase switching circuit 12 is switched. When the output voltage measurement value Vdm exceeds the output voltage target value Vd ^* , the phase advance of switching the WX phase switching circuit 16 becomes larger than the phase of switching the UV phase switching circuit 12. As a result, the output voltage approaches or coincides with the ^{output voltage target value Vd *.}

In the above, the operation of the power conversion device has been described assuming that the relationship of Vb = N · Vd is established between the inter-terminal voltage Vb of the buffer capacitor Cbuf and the inter-terminal voltage Vd of the output capacitor Cout. The relationship of Vb = N · Vd may not be established between the start of operation of the power conversion device and the steady state, or when the power output to the load circuit 20 fluctuates. In this case, the current flowing through the secondary winding T2 may increase during the zero voltage time zone. In order to solve such a problem, the duty ratio determination unit 40 may obtain the WX phase duty ratio target value α ^{* based on (Equation 3) in which the second correction term is added to the right side of (Equation 1).} good.

(Equation 3) α ^* = α0 ^* + 2π ・ td ・ fsw ・ PL
+ (2π-α0 ^* ) ・ (1-Vbm / (N ・ Vdm))

5 (a), (b) and (c) show the input AC voltage Vac, the UV phase duty ratio target value α0 ^* , and the time waveforms of the correction term δ = 2π, td, fsw, and PL, respectively. ing. ^{As described above, the duty ratio determining unit 40 has a UV phase duty ratio target value α0 *} according to different mathematical formulas when the measured value Vim of the input AC voltage Vac is 0 or a positive value and when it is a negative value. Ask for. Therefore, as shown in FIGS. 4A and 4B, the time waveform becomes discontinuous at the timing when the input AC voltage Vac becomes 0.

In FIG. 6, in (Equation 1), instead of the correction term δ = 2π ・ td ・ fsw ・ PL, the correction term | δ | = 2π ・ td ・ fsw with a constant polarity is tentatively used. The time waveforms of the winding voltage Vuv, the secondary winding voltage Vwx, and the secondary winding current id are shown. These time waveforms are obtained by simulation. FIG. 6A shows a time waveform when the UV phase duty ratio target value α0 ^* is larger than π (when the ratio of the on-duty time Tα to the switching period P is larger than 0.5). FIG. 6B shows a time waveform when the UV phase duty ratio target value α0 ^* is smaller than π (when the ratio of the on-duty time Tα to the switching period P is smaller than 0.5). When the UV phase duty ratio target value α0 ^* is smaller than π, the circulating current iz in the zero voltage time zone of the secondary winding voltage Vwx is close to 0. On the other hand, when the UV phase duty ratio target value α0 ^* is larger than π, the circulating current iz in the zero voltage time zone is larger than when the UV phase duty ratio target value α0 ^* is smaller than π. As described above, when | δ | = 2π · td · fsw is used as the correction term, the loss due to the circulating current becomes large when ^{the UV phase duty ratio target value α0 * is larger than π.}

FIG. 7 shows the time waveforms of the primary winding voltage Vuv, the secondary winding voltage Vwx, and the secondary winding current id when (Equation 1) is used. These time waveforms are obtained by simulation. FIG. 7A shows a time waveform when the UV phase duty ratio target value α0 ^{* is larger than π.} FIG. 7B shows a time waveform when the UV phase duty ratio target value α0 ^{* is smaller than π.} The circulating current iz in the zero voltage time zone is close to 0 in both cases where the UV phase duty ratio target value α0 ^{* is smaller than π and larger than π.}

^{In the present embodiment, the WX phase duty ratio target value α *} is obtained by using (Equation 1) or (Equation 3) having δ = 2π ・ td ・ fsw ・ PL as a correction term. Therefore, the loss due to the circulating current in the zero voltage time zone is suppressed.

FIG. 8 shows the configuration of the control unit 22A according to the application embodiment of the present invention. The same components as those of the control unit 22 shown in FIG. 4 are designated by the same reference numerals, and the description thereof will be omitted. The control unit 22A replaces the duty ratio determining unit 40 in the control unit 22 shown in FIG. 4 with the duty ratio limiting / determining unit 58.

When the measured value Vim of the input AC voltage Vac is 0 or a positive value, the duty ratio limiting / determining unit 58 sets β0 ^* = α0 (pre-adjustment target value α0 output by the adder 38) and sets UV before limiting. Find the phase duty ratio target value β0 ^* . Further, when the measured value Vim of the input AC voltage Vac is a negative value, the duty ratio limiting / determining unit 58 obtains the UV phase duty ratio target value β0 ^* before the limitation by setting ^{β0 * = 1-α0.} ..

When the UV phase duty ratio target value β0 ^* is equal to or higher than the lower limit value Lw and equal to or lower than the upper limit value Up, the ^{duty ratio limiting / determining unit 58 sets α0 *} = β0 ^{* and} sets the UV phase duty ratio target value α0. ^* Is output to the UV phase control signal generation unit 54. ^{When the UV phase duty ratio target value β0 *} exceeds the upper limit value Up, the duty ratio limiting / determining unit 58 sets the UV phase duty ratio target value α0 ^* to the UV phase control signal generation unit 54 ^{as α0 * = Up.} When the output is performed and the UV phase duty ratio target value β0 ^* is less than the lower limit value Lw, the UV phase duty ratio target value is output to the UV phase control signal generation unit 54 with ^{β0 * = Lw.} As a result, the UV phase duty ratio target value α0 ^* is limited to a value equal to or greater than the lower limit value Lw and less than or equal to the upper limit value Up.

The duty ratio limiting / determining unit 58 obtains the WX phase duty ratio target value α ^{* based on the UV phase duty ratio target value α0 *} by the same processing as the duty ratio determining unit 40 in FIG. 4, and generates a WX phase control signal. Output to unit 56.

According to such processing, the UV phase duty ratio target value α0 ^* is limited to a value equal to or higher than the lower limit value Lw and equal to or lower than the upper limit value Up, and the range of the ^{WX phase duty ratio target value α * is also limited accordingly.}

It may be difficult for each switching element constituting each half bridge to operate reliably when the control signal changes abruptly. Therefore, when the duty-on-time Tα is short, or when the time obtained by subtracting the duty-on-time Tα from the switching cycle P is short, it may be difficult to control the on / off of each switching element. According to the process executed by the duty ratio limiting / determining unit 58, the range of the UV phase duty ratio and the WX phase duty ratio is limited. Therefore, each switching element constituting each half bridge operates reliably.

FIG. 9 shows a time waveform of the power Pout output to the load circuit 20, the UV phase duty ratio target value α0 ^* , and the phase difference φ. The phase difference φ indicates the phase delay of the W-phase carrier signal with respect to the U-phase carrier signal and the phase delay of the X-phase carrier signal with respect to the V-phase carrier signal. These time waveforms are obtained by simulation. In this simulation, the upper limit value Up of the UV phase duty ratio target value α0 ^* was set to 0.9, and the lower limit value Lw was set to 0.

In this simulation result, the output power Pout decreases when the UV phase duty ratio target value α0 ^{* becomes maximum.} The reason for this is as follows.

The output power of the power converter is represented by the product of the secondary winding voltage Vwx and the secondary winding current id in the time zone when the secondary winding voltage Vwx is not 0. When the duty ratios of the UV phase switching circuit 12 and the WX phase switching circuit 16 are constant in the power conversion device, the larger the phase difference φ, the larger the output power Pout tends to be. This is because the larger the phase difference φ, the larger the secondary winding current id in the time zone when the secondary winding voltage Vwx is not 0, and the secondary winding voltage Vwx and the secondary winding current id in this time zone. This is because the product with and is large.

On the other hand, in the power conversion device, if the duty ratios of the UV phase switching circuit 12 and the WX phase switching circuit 16 are close to 2π or 0, sufficient output power Pout cannot be obtained even if the phase difference φ is increased. There is. The reason is that as the duty ratio of the UV phase switching circuit 12 and the WX phase switching circuit 16 approaches 2π or 0, the loss due to increasing the phase difference φ and increasing the secondary winding current id increases. be. As shown in FIG. 9, it is due to this tendency that the output power Pout decreases when ^{the UV phase duty ratio target value α0 * becomes maximum.}

Therefore, the duty ratio limiting / determining unit 58 obtains an upper limit value Up with respect to the UV phase duty ratio target value based on the following (Equation 4) according to ^{the output power target value Pout *, and is based on (Equation 5).} Therefore, the lower limit value Lw with respect to the UV phase duty ratio target value may be obtained.

(Number 4) Up = Up0-k ・ Pout ^*

(Number 5) Lw = Lw0 + k ・ Pout ^*

Here, Up0 and Lw0 are reference values for the upper limit value Up and the lower limit value Lw, respectively. The reference value Up0 is, for example, 1, and the reference value Lw0 is, for example, 0. k is an arbitrary constant set by the user.

According to (Equation 4) and (Equation 5), the ^{larger the output power target value Pout *} , the smaller the upper limit value Up with respect to the UV phase duty ratio target value α0 ^{*, and the larger the lower limit value Lw.} The smaller the output power target value Pout ^* , the larger the upper limit value Up with respect to the UV phase duty ratio target value, and the smaller the lower limit value Lw. As a result, the larger the output power target value Pout ^* , the narrower the range that the UV phase duty ratio target value α0 ^* and the WX phase duty ratio target value α ^* can take, and these values are far from both 2π and 0. .. Therefore, the problem that the output power Pout does not become a sufficient value even if the phase difference φ is increased is avoided.

It is also assumed that the power factor of the input power will not be maximized because the range that the UV phase duty ratio target value α0 ^{* can take is narrowed.} However, the decrease in the power factor does not necessarily increase the power loss, and the power factor may be an appropriate value.

Figure 10 is a case which is limited according to the UV-phase duty ratio target value .alpha.0 ^* output power target value Pout ^*, the output power Pout, UV-phase duty ratio target value .alpha.0 ^*, and the time waveform of the phase difference φ is shown Has been done. The upper limit value Up of the UV phase duty ratio target value α0 ^* was set to 0.8, and the lower limit value Lw was set to 0. In the simulation result of FIG. 9, the decrease of the output power Pout is suppressed as compared with the simulation result of FIG.

10 Power factor improvement circuit, 12 UV phase switching circuit, 14 voltage converter circuit, 16 WX phase switching circuit, 18 AC voltage source, 20 load circuit, 22,22A control unit, 24-1, 24-2 power input terminal, 26P Positive load terminal, 26N negative negative load terminal, 28, 34, 42 subtractor, 30 voltage PI control unit, 32 multiplier, 36 current PI control unit, 38 adder, 40 duty ratio determination unit, 44 phase PI control unit, 46 Carrier generation unit, 48 phase adjustment unit, 50 UV phase buffer amplifier, 52 WX phase buffer amplifier, 54 UV phase control signal generation unit, 56 WX phase control signal generation unit, 58 duty ratio limiting / determining unit.

Claims (6)

The first switching circuit that adjusts the power factor of the input power by switching,
A second switching circuit that is coupled to the first switching circuit by a magnetic coupling circuit and adjusts the power input from the first switching circuit via the magnetic coupling circuit by switching.
A control unit that switches the first switching circuit and the second switching circuit at the same switching frequency by shifting the timing according to the electric power transmitted from the first switching circuit to the second switching circuit is provided.
The control unit
The duty ratio of the second switching circuit is corrected by a correction value according to the duty ratio of the first switching circuit, and the circulating current flowing through the second switching circuit contributes to the power output by the second switching circuit. A power conversion device characterized by suppressing circulating current. In the power conversion device according to claim 1,
The power conversion device, characterized in that the correction value is determined according to a dead time during which each switching element included in the second switching circuit is turned off. In the power conversion device according to claim 1 or 2.
The power conversion device is characterized in that the control unit obtains a value for increasing or decreasing the duty ratio of the second switching circuit as the correction value according to the duty ratio of the first switching circuit. The first switching circuit that adjusts the power factor of the input power by switching,
A second switching circuit that is coupled to the first switching circuit by a magnetic coupling circuit and adjusts the power input from the magnetic coupling circuit by switching.
A control unit that switches the first switching circuit and the second switching circuit at the same switching frequency by shifting the timing according to the electric power transmitted from the first switching circuit to the second switching circuit is provided.
The control unit
The upper limit value and the lower limit value of the duty ratio of the first switching circuit and the second switching circuit are determined according to the load power output from the second switching circuit to the load circuit, and are determined by the upper limit value and the lower limit value. A power conversion device characterized in that the duty ratio is adjusted within a numerical range. In the power conversion device according to claim 4,
The control unit
A power conversion device characterized in that the upper limit value is decreased or the lower limit value is increased as the load power is larger. In the power conversion device according to any one of claims 1 to 5.
The first switching circuit is
Two first half bridges connected in parallel, each containing two switching elements connected in series, and two first half bridges.
A buffer capacitor that is connected in parallel to the two first half bridges that are connected in parallel and stores DC power,
The other end of the AC power source to which one end is connected is connected to the intermediate connection point of the primary winding, and the AC power output from the AC power source is rectified by switching of the first switching circuit to rectify the buffer. It has a commutator that charges the capacitor,
The second switching circuit is
Two second half bridges connected in parallel, each containing two switching elements connected in series, and two second half bridges.
It has an output capacitor that is connected in parallel to the two second half bridges that are connected in parallel and stores DC power.
The power converter
A primary winding connected between a connection point of two switching elements included in one of the first half bridges and a connection point of two switching elements included in the other first half bridge.
It comprises a connection point of two switching elements included in one of the second half bridges and a secondary winding connected between the connection points of two switching elements included in the other half bridge.
A power conversion device characterized in that the primary winding and the secondary winding are magnetically coupled to form the magnetic coupling circuit.

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