JP6904769B2 - Display device - Google Patents

Description

One aspect of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method. Alternatively, one aspect of the invention disclosed herein and the like relates to a process, machine, manufacture, or composition of matter. In particular, the present invention relates to a display device and a method for manufacturing the display device.

In the present specification and the like, the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics. Display devices (liquid crystal display devices, light emitting display devices, etc.), projection devices, lighting devices, electro-optical devices, power storage devices, storage devices, semiconductor circuits, image pickup devices, electronic devices, and the like may be said to be semiconductor devices. Alternatively, they may be said to have semiconductor devices.

In display devices typified by liquid crystal display devices and light emitting display devices, as one of the means for achieving weight reduction and narrowing of the frame, at least a part of the drive circuit is manufactured on the same substrate together with the pixel circuit. It has been known. In order to achieve a further narrowing of the frame, it is required to reduce the drive circuit.

In addition, especially for stationary display devices, the screen size tends to increase to 30 inches or more diagonally, and development is being carried out with a view to screen sizes of 60 inches or more diagonally and 120 inches or more diagonally. It has been. In addition, the screen resolution is also full high definition (also referred to as 1920 × 1080 pixels or “2K”), ultra high definition (also referred to as 3840 × 2160 pixels or “4K”), super high definition. (The number of pixels is 7680 x 4320, or it is also called "8K".) There is a tendency for higher definition.

The drive circuit is generally composed of a CMOS (Complementary Metal Oxide Sensor) circuit. On the other hand, in order to improve productivity and narrow the frame, a drive circuit composed of only n-channel transistors or only p-channel transistors is also being studied. A circuit having such a configuration is also referred to as a "unipolar circuit". For example, Patent Document 1 discloses a technique in which a shift register is composed of a unipolar circuit.

Further, metal oxides are attracting attention as semiconductor materials applicable to transistors. Some metal oxides exhibit semiconductor properties. For example, Patent Document 2 discloses a technique for producing a transistor using a metal oxide such as zinc oxide or an In-Ga-Zn-based oxide.

Japanese Unexamined Patent Publication No. 2002-049333 Japanese Unexamined Patent Publication No. 2007-123861

One aspect of the present invention is to provide a display device having a narrow frame. Alternatively, one of the issues is to provide a display device having good display quality. Another issue is to provide a display device with low power consumption. Alternatively, one of the issues is to provide a display device having good productivity. Alternatively, one of the issues is to provide a display device having good reliability. Alternatively, one of the issues is to provide a new display device. Alternatively, one of the issues is to provide an electronic device equipped with the above display device. Alternatively, one of the issues is to provide new electronic devices.

The description of these issues does not prevent the existence of other issues. It should be noted that one aspect of the present invention does not need to solve all of these problems. It should be noted that the problems other than these are naturally clarified from the description of the description, drawings, claims, etc., and it is possible to extract the problems other than these from the description of the description, drawings, claims, etc. Is.

One aspect of the present invention includes a display unit having a plurality of pixels and a drive circuit unit, each of the plurality of pixels having a display element and a first transistor, and the drive circuit unit includes a display element and a first transistor. It has a second transistor, a third transistor, and a first layer, the second transistor is electrically connected to the first transistor, and the third transistor is connected to the second transistor. Electrically connected, the semiconductor layer of the second transistor and the semiconductor layer of the third transistor each contain a metal element and oxygen, and the semiconductor layer of the second transistor has a region overlapping the first layer. It is a display device having a thermal conductivity of 0.05 W / (m · K) or more and 0.5 W / (m · K) or less of the first layer.

Further, another aspect of the present invention includes a display unit having a plurality of pixels and a drive circuit unit, and each of the plurality of pixels has a display element and a first transistor and is driven. The circuit unit has a second transistor, a third transistor, a capacitive element, and a first layer, and one of the source and drain of the second transistor is the gate and electricity of the first transistor. One of the source or drain of the third transistor is electrically connected to the gate of the second transistor, and one electrode of the capacitive element is electrically connected to the gate of the second transistor. The other electrode of the capacitive element is electrically connected to one of the source or drain of the second transistor, and the semiconductor layer of the second transistor and the semiconductor layer of the third transistor are metal elements and oxygen, respectively. The semiconductor layer of the second transistor has a region overlapping with the first layer, and the thermal conductivity of the first layer is 0.05 W / (m · K) or more and 0.5 W / (m · K) or more. ) It is a display device characterized by the following.

Further, another aspect of the present invention includes a display unit having a plurality of pixels and a drive circuit unit, and each of the plurality of pixels has a display element and a first transistor and is driven. The circuit unit has a second transistor, a third transistor, a first layer, and a second layer, and the second transistor is electrically connected to the first transistor and has a second layer. The third transistor is electrically connected to the second transistor, and the semiconductor layer of the second transistor and the semiconductor layer of the third transistor each contain a metal element and oxygen, and the semiconductor layer of the second transistor is contained. Has a region that overlaps with the first layer and the second layer, and the semiconductor layer of the third transistor has a region that does not overlap with the first layer and overlaps with the second layer. The display device is characterized in that the thermal conductivity of the first layer is smaller than the thermal conductivity of the second layer.

Further, another aspect of the present invention includes a display unit having a plurality of pixels and a drive circuit unit, and each of the plurality of pixels has a display element and a first transistor and is driven. The circuit unit has a second transistor, a third transistor, a capacitive element, a first layer, and a second layer, and one of the source and drain of the second transistor is the first. One electrode of the capacitive element is electrically connected to the gate of the second transistor, and one of the source or drain of the third transistor is electrically connected to the gate of the second transistor. The other electrode of the capacitive element is electrically connected to one of the source or drain of the second transistor, and the semiconductor layer of the second transistor and the semiconductor layer of the third transistor are respectively. However, if it contains a metal element and oxygen, the semiconductor layer of the second transistor has a region overlapping the first layer and the second layer, and the semiconductor layer of the third transistor overlaps the first layer. The display device is characterized in that it has a region overlapping with the second layer, and the thermal conductivity of the first layer is smaller than the thermal conductivity of the second layer.

The thickness of the first layer may be 0.01 μm or more and 5.0 μm or less, preferably 0.01 μm or more and 2.0 μm or less.

The first layer functions as a heat storage layer. For example, as the first layer, a resin material such as an acrylic resin, an epoxy resin, a phenol resin, a silicone resin, a polyimide, a polycarbonate, or polystyrene can be used.

Further, the metal element is preferably at least one of indium, gallium, or zinc. The semiconductor layer is preferably an oxide semiconductor which is a kind of metal oxide.

According to one aspect of the present invention, it is possible to provide a display device having a narrow frame. Alternatively, it is possible to provide a display device having good display quality. Alternatively, it is possible to provide a display device with low power consumption. Alternatively, it is possible to provide a display device having good productivity. Alternatively, it is possible to provide a display device having good reliability. Alternatively, a new display device can be provided. Alternatively, an electronic device provided with the above display device can be provided. Alternatively, a new electronic device can be provided.

The description of these effects does not preclude the existence of other effects. It should be noted that one aspect of the present invention does not have to have all of these effects. It should be noted that the effects other than these are naturally clarified from the description of the description, drawings, claims, etc., and it is possible to extract the effects other than these from the description of the description, drawings, claims, etc. Is.

The figure explaining the display device. The figure explaining the display device. The figure explaining the display device. The figure explaining the electrical characteristic of a transistor. The figure explaining the structural example of the drive circuit part. A timing chart that explains the operation of the output circuit. The figure explaining the operation of an output circuit. The figure explaining the operation of an output circuit. The figure explaining the display device. The figure explaining the display device. The figure explaining the display device. The figure explaining the display device. The figure explaining the configuration example of a pixel circuit. The figure explaining the configuration example of a pixel. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the structural example of a transistor. The figure explaining the electronic device. The figure explaining the electronic device. The figure explaining the Example. The figure explaining the Example. The figure explaining the Example.

The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details thereof can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same reference numerals may be used in common between different drawings for the same parts or parts having similar functions, and the repeated description thereof may be omitted.

In addition, the position, size, range, etc. of each configuration shown in the drawings may not represent the actual position, size, range, etc. in order to facilitate understanding of the invention. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings and the like. For example, in an actual manufacturing process, layers, resist masks, and the like may be unintentionally reduced due to processing such as etching, but they may be omitted for the sake of easy understanding of the invention.

Further, in order to facilitate understanding of the invention, in particular, in a top view (also referred to as a “plan view”) or a perspective view, the description of some components may be omitted. In addition, some hidden lines may be omitted.

In the present specification and the like, ordinal numbers such as "first" and "second" are added to avoid confusion of components, and do not indicate any order or order such as process order or stacking order. In addition, even terms that do not have ordinal numbers in the present specification and the like may have ordinal numbers within the scope of claims in order to avoid confusion of components. In addition, the ordinal numbers given in the present specification and the like may differ from the ordinal numbers given in the claims. Further, even if the terms have ordinal numbers in the present specification and the like, the ordinal numbers may be omitted in the scope of claims.

Further, in the present specification and the like, the terms "electrode" and "wiring" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring" and vice versa. Further, the terms "electrode" and "wiring" include the case where a plurality of "electrodes" and "wiring" are integrally provided.

The channel length is, for example, a region in which a semiconductor (or a portion in which a current flows in the semiconductor when the transistor is on) and a gate electrode overlap each other in a top view of a transistor, or a region in which a channel is formed. The distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in (also referred to as “channel forming region”). In one transistor, the channel length does not always take the same value in all regions. That is, the channel length of one transistor may not be fixed to one value. Therefore, in the present specification, the channel length is set to any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

The channel width is, for example, the source and the drain facing each other in the region where the semiconductor (or the part where the current flows in the semiconductor when the transistor is on) and the gate electrode overlap each other, or the region where the channel is formed. The length of the part that is being used. In one transistor, the channel width does not always take the same value in all regions. That is, the channel width of one transistor may not be fixed to one value. Therefore, in the present specification, the channel width is set to any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

Depending on the structure of the transistor, the channel width in the region where the channel is actually formed (hereinafter, also referred to as “effective channel width”) and the channel width shown in the top view of the transistor (hereinafter, “apparently”). (Also called the channel width of)) and may be different. For example, when the gate electrode covers the side surface of the semiconductor layer, the effective channel width may be larger than the apparent channel width, and the influence thereof may not be negligible. For example, in a transistor that is fine and has a gate electrode covering the side surface of the semiconductor, the proportion of the channel forming region formed on the side surface of the semiconductor may be large. In that case, the effective channel width is larger than the apparent channel width.

In such a case, it may be difficult to estimate the effective channel width by actual measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, if the shape of the semiconductor is not known accurately, it is difficult to accurately measure the effective channel width.

Therefore, in the present specification, the apparent channel width may be referred to as "surrounded channel width (SCW)". Further, in the present specification, when simply referred to as a channel width, it may refer to an enclosed channel width or an apparent channel width. Alternatively, in the present specification, the term "channel width" may refer to an effective channel width. The values of the channel length, channel width, effective channel width, apparent channel width, enclosed channel width, and the like can be determined by analyzing a cross-sectional TEM image or the like.

When calculating the electric field effect mobility of a transistor, the current value per channel width, or the like, the enclosed channel width may be used for calculation. In that case, the value may be different from that calculated using the effective channel width.

Further, in the present specification and the like, when a resist mask is formed by a photolithography method and then an etching step (removal step) is performed, the resist mask is removed after the etching step is completed unless otherwise specified. And.

The word "membrane" and the word "layer" can be interchanged with each other in some cases or depending on the situation. For example, it may be possible to change the term "conductive layer" to the term "conductive layer". Alternatively, for example, it may be possible to change the term "insulating film" to the term "insulating layer".

Further, in the present specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. Then, a channel region is provided between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and between the source and drain via the channel forming region. It is capable of passing an electric current. In the present specification and the like, the channel region refers to a region in which a current mainly flows.

Further, the transistor shown in the present specification and the like shall be an enhancement type (normally off type) field effect transistor unless otherwise specified. Further, the transistor shown in the present specification and the like shall be an n-channel type transistor unless otherwise specified. Therefore, the threshold voltage (also referred to as “Vth”) is assumed to be larger than 0V unless otherwise specified.

In the present specification and the like, the Vth of a transistor having a back gate means the Vth when the potential of the back gate is the same as that of the source or the gate, unless otherwise specified.

Further, in the present specification and the like, unless otherwise specified, the off current means a drain current (also referred to as “Id”) when the transistor is in an off state (also referred to as a non-conducting state or a cutoff state). .. Unless otherwise specified, the off state means that in an n-channel transistor, the potential difference between the gate and the source (also referred to as “gate voltage” or “Vg”) with respect to the source is greater than the threshold voltage. In the case of a p-channel transistor, Vg is higher than the threshold voltage. For example, the off-current of an n-channel transistor may refer to the drain current when Vg is lower than Vth.

The off current of the transistor may depend on Vg. Therefore, the fact that the off-current of the transistor is I or less may mean that there is a value of Vg in which the off-current of the transistor is I or less. The off-current of a transistor may refer to an off-current in a predetermined Vg, an off-state in a Vg within a predetermined range, an off-state in a Vg in which a sufficiently reduced off-current can be obtained, and the like.

As an example, when Vth is 0.5V and Vg is 0.5V, the drain current is 1 × 10 ^-9 A, when Vg is 0.1V, the drain current is 1 × 10 ^-13 A, and Vg is −. Assume an n-channel transistor having a drain current of 1 × 10 ^-19 A at 0.5 V and a drain current of 1 × 10 ^{-22 A at Vg of −0.8 V. Since the drain current of the transistor is 1 × 10 -19} A or less when Vg is −0.5 V or Vg is in the range of −0.5 V to −0.8 V, the off current of the transistor is 1. It may be said that it is ^{× 10-19 A or less.} Since there is Vg in which the drain current of the transistor is 1 × ^10-22 A or less, it may be said that the off current of the transistor is 1 × ^10-22 A or less.

The off current of the transistor may depend on the temperature. In the present specification, the off-current may represent an off-current at room temperature (RT: Room Temperature), 60 ° C., 85 ° C., 95 ° C., or 125 ° C., unless otherwise specified. Alternatively, an off-current at a temperature at which the reliability of the semiconductor device or the like containing the transistor is guaranteed, or a temperature at which the semiconductor device or the like containing the transistor is used (for example, a temperature of 5 ° C. or higher and 35 ° C. or lower). May represent. The off-current of a transistor is I or less, which means RT, 60 ° C., 85 ° C., 95 ° C., 125 ° C., a temperature at which the reliability of the semiconductor device including the transistor is guaranteed, or the transistor is included. It may indicate that there is a value of Vg at which the off current of the transistor is I or less at the temperature at which the semiconductor device or the like is used (for example, the temperature of 5 ° C. or higher and 35 ° C. or lower).

The off-current of the transistor may depend on the voltage between the drain and the source (hereinafter, also referred to as “Vd”) with respect to the source. In the present specification, the off current has Vd of 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V unless otherwise specified. , Or may represent off-current at 20V. Alternatively, it may represent Vd in which the reliability of the semiconductor device or the like including the transistor is guaranteed, or the off-current in Vd used in the semiconductor device or the like including the transistor. When the off current of the transistor is I or less, Vd is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V. , Vd in which the reliability of the semiconductor device including the transistor is guaranteed, or Vd used in the semiconductor device including the transistor, and the value of Vg in which the off current of the transistor is I or less exists. May point to.

In the above description of the off-current, the drain may be read as the source. That is, the off-current may refer to the current flowing through the source when the transistor is in the off state.

Further, in the present specification and the like, it may be described as a leak current in the same meaning as an off current. Further, in the present specification and the like, the off current may refer to, for example, the current flowing between the source and the drain when the transistor is in the off state.

Further, in the present specification and the like, the high power supply potential VDD (hereinafter, also simply referred to as “VDD” or “H potential”) indicates a power supply potential having a potential higher than that of the low power supply potential VSS. Further, the low power supply potential VSS (hereinafter, also simply referred to as “VSS” or “L potential”) indicates a power supply potential having a potential lower than that of the high power supply potential VDD. The ground potential can also be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential, and when VSS is the ground potential, VDD is a potential higher than the ground potential.

Further, in general, the "voltage" often indicates a potential difference between a certain potential and a reference potential (for example, a ground potential (GND potential) or a source potential). Further, the "potential" is relative, and the potential given to the wiring or the like may change depending on the reference potential. Therefore, "voltage" and "potential" may be paraphrased with each other. In this specification and the like, VSS is used as a reference potential unless otherwise specified.

In addition, the terms "upper" and "lower" in the present specification and the like do not limit the positional relationship of the components to be directly above or directly below and to be in direct contact with each other. For example, in the case of the expression "electrode B on the insulating layer A", it is not necessary that the electrode B is provided in direct contact with the insulating layer A, and another configuration is provided between the insulating layer A and the electrode B. Do not exclude those that contain elements.

Further, in the present specification, "parallel" means a state in which two straight lines are arranged at an angle of −10 ° or more and 10 ° or less, unless otherwise specified. Therefore, the case of −5 ° or more and 5 ° or less is also included. Further, "substantially parallel" means a state in which two straight lines are arranged at an angle of -30 ° or more and 30 ° or less, unless otherwise specified. Further, "vertical" and "orthogonal" mean a state in which two straight lines are arranged at an angle of 80 ° or more and 100 ° or less, unless otherwise specified. Therefore, the case of 85 ° or more and 95 ° or less is also included. Further, "substantially vertical" means a state in which two straight lines are arranged at an angle of 60 ° or more and 120 ° or less, unless otherwise specified.

In the present specification and the like, when the count value and the measured value are referred to as "same", "same", "equal" or "uniform" (including synonyms thereof), unless otherwise specified. , Plus or minus 20% error shall be included.

(Embodiment 1)
In the present embodiment, the display device 100 according to one aspect of the present invention will be described with reference to the drawings.

<Display device configuration example>
FIG. 1A is a front view of a display device 100 to which an FPC 145 (Flexible printed circuit) is connected. FIG. 1B is a block diagram illustrating the configuration of the display device 100. 2 and 3 are schematic cross-sectional views corresponding to the portions indicated by the alternate long and short dash lines in FIGS. 1 (A) and A2. 2 and 3 show a part of the drive circuit unit 104a and a part of the display unit 102. Further, FIG. 2 shows an example of a liquid crystal display device using a liquid crystal element as the display element. The display device 100 shown in FIG. 2 illustrates a liquid crystal element that operates in the FFS (Fringe Field Switching) mode. Further, FIG. 3 shows an example of a light emitting display device using a light emitting element as the display element.

The display device 100 includes a display unit 102, a drive circuit unit 104a, a drive circuit unit 104b, and a drive circuit unit 103. The drive circuit unit 104a and the drive circuit unit 104b can function as, for example, a scanning line drive circuit. Further, the drive circuit unit 103 can function as, for example, a signal line drive circuit. The drive circuit unit 104a and the drive circuit unit 104b may be provided with only one of them and may not be provided with the other. Further, some kind of circuit may be provided at a position facing the drive circuit unit 103 with the display unit 102 interposed therebetween.

The drive circuit unit 104a, the drive circuit unit 104b, and the drive circuit unit 103 may be collectively referred to as a "drive circuit", a "peripheral circuit", or a "peripheral drive circuit".

Further, the display device 100 is provided with n wires (n is an integer of 2 or more) 162, each of which is arranged substantially in parallel and whose potential is controlled by the drive circuit unit 104a and / or the drive circuit unit 104b. , Each of which is arranged substantially in parallel, and has m wires (m is an integer of 2 or more) whose potential is controlled by the drive circuit unit 103. Further, the display unit 102 has a plurality of pixels 110 arranged in a matrix of n rows and m columns. Pixel 110 includes a pixel circuit and a display element.

The plurality of pixels 110 arranged in the i-th row (i is an integer of 1 or more and n or less) are electrically connected to the i-th wiring 162. The plurality of pixels 110 arranged in the j-th column (j is an integer of 1 or more and m or less) are electrically connected to the j-th wiring 163. In this specification and the like, the i-th wiring 162 is referred to as wiring 162_i. Further, in the present specification and the like, the jth wiring 163 is referred to as wiring 163_j.

The display unit 102, the drive circuit unit 104a, the drive circuit unit 104b, and the drive circuit unit 103 are provided on the first substrate 101. Further, a sealing material 4005 is provided so as to surround the display unit 102, the drive circuit unit 104a, and the drive circuit unit 104b. Further, a second substrate 106 is provided on the display unit 102, the drive circuit unit 104a, and the drive circuit unit 104b. Therefore, the display unit 102, the drive circuit unit 104a, and the drive circuit unit 104b are sealed together with the display element by the first substrate 101, the sealing material 105, and the second substrate 106.

Further, the drive circuit unit 103 is formed of a single crystal semiconductor or a polycrystalline semiconductor on a separately prepared substrate. The drive circuit unit 103 is mounted in a region different from the region surrounded by the sealing material 105 on the first substrate 101. Various signals and potentials given to the display unit 102, the drive circuit unit 104a, the drive circuit unit 104b, and the drive circuit unit 103 are supplied from the FPC 145.

The connection method of the drive circuit unit 103 is not particularly limited, and wire bonding, a COG (Chip On Glass) method, a TCP (Tape Carrier Package) method, a COF (Chip On Film) method, or the like can be used. can. FIG. 1A is an example of mounting the drive circuit unit 103 by the COG method.

Further, in the present specification and the like, the display device may include a panel in which the display element is sealed and a module in which an IC or the like including a controller is mounted on the panel.

[Cross-section configuration example]
The display device 100 has an electrode 143, and the electrode 143 is electrically connected to the terminal of the FPC 145 via the anisotropic conductive layer 144 (see FIGS. 2 and 3). Further, the electrode 143 is electrically connected to the wiring 141 via the electrode 142.

The electrode 143 is formed of another part of the conductive layer on which the first electrode layer 117 is formed. The electrode 142 is formed of a transistor 112, a transistor 172, a transistor 114, and another part of the conductive layer forming the source electrode and the drain electrode of the transistor 136. The wiring 141 is formed of a transistor 112, a transistor 114, and another part of the conductive layer forming the gate electrode of the transistor 136.

The display unit 102, the drive circuit unit 104a, and the drive circuit unit 104b each have a plurality of transistors. FIG. 2 illustrates a transistor 112 included in the display unit 102, and a transistor 114 and a transistor 136 included in the drive circuit unit 104a. FIG. 3 illustrates a transistor 172 and a transistor 112 included in the display unit 102, and a transistor 114 and a transistor 136 included in the drive circuit unit 104a. In this embodiment, a top gate type transistor is exemplified as the transistor 112, the transistor 172, the transistor 114, and the transistor 136.

Further, in FIG. 2, an insulating layer 149, an insulating layer 115, and an insulating layer 116 are provided on the transistor 112, the transistor 114, and the transistor 136. In FIG. 3, an insulating layer 149, an insulating layer 115, and an insulating layer 116 are provided on the transistor 172, the transistor 112, the transistor 114, and the transistor 136, and a partition wall 132 is provided on the insulating layer 116.

Further, the transistor 112, the transistor 172, the transistor 114, and the transistor 136 are provided on the insulating layer 146. In addition, the transistor 112, the transistor 172, the transistor 114, and the transistor 136 have an electrode 147 formed on the insulating layer 146, and the insulating layer 111 is formed on the electrode 147. The electrode 147 can function as a back gate electrode. The structure of the transistor used in the display device 100 is not limited to the top gate type and may be the bottom gate type. The structure of the transistor that can be used in one aspect of the present invention will be described in detail separately.

Further, an insulating layer 161 is formed between the transistor 114 and the substrate 101. The insulating layer 161 functions as a heat storage layer.

Further, the display device shown in FIGS. 2 and 3 has a capacitance element 113. The capacitive element 113 has a region in which an electrode formed by another part of the same conductive layer as the conductive layer forming the gate electrode of the transistor 112 and the electrode 148 overlap with each other via the insulating layer 111. The electrode 148 is formed of another part of the conductive layer on which the electrode 147 is formed.

Generally, the capacitance of the capacitance element provided in the pixel portion of the display device is set so as to hold the electric charge for a predetermined period in consideration of the leakage current of the transistor arranged in the pixel portion. The capacitance of the capacitive element may be set in consideration of the off-current of the transistor and the like.

For example, since the bandgap of an oxide semiconductor, which is a type of metal oxide, is 2 eV or more, a transistor using an oxide semiconductor in the semiconductor layer on which a channel is formed (also referred to as an “OS transistor”) has an off-current. It can be extremely small. Specifically, voltage is 3.5V between the source and the drain, at at room temperature (25 ° C.), 1 × less than ^{10 -20} A state current per channel width 1 [mu] m, 1 × ¹⁰ below ^-22 A, or 1 It can be less than × ^10-24A. That is, the on / off ratio can be 20 digits or more and 150 digits or less.

For example, by using an OS transistor in the pixel portion of the liquid crystal display device, the capacity of the capacitance element 113 can be reduced to 1/3 or less, or even 1/5 or less of the liquid crystal capacity. Further, by using the OS transistor, the formation of the capacitive element 113 can be omitted.

In FIG. 2, the transistor 112 provided in the display unit 102 is electrically connected to the display element. Further, in FIG. 3, the transistor 172 provided in the display unit 102 is electrically connected to the display element.

[Example of cross-sectional configuration of liquid crystal display device]
As described above, FIG. 2 shows an example of a liquid crystal display device using the liquid crystal element 121 as the display element. In FIG. 2, the liquid crystal element 121 includes a first electrode layer 117, a second electrode layer 118, and a liquid crystal layer 124. The insulating layer 122 and the insulating layer 123 are provided so as to sandwich the liquid crystal layer 124. The insulating layer 122 and the insulating layer 123 function as an alignment film. The second electrode layer 118 is provided on the insulating layer 116. The second electrode layer 118 has a region that overlaps with the first electrode layer 117 via the insulating layer 119.

The spacer 125 is a columnar spacer obtained by selectively etching the insulating layer, and is provided to control the distance (cell gap) between the insulating layer 122 and the insulating layer 123. A spherical spacer may be used as the spacer 125.

Further, if necessary, an optical member (optical substrate) such as a black matrix (light-shielding layer), a colored layer (color filter), a polarizing member, a retardation member, and an antireflection member may be appropriately provided. For example, circularly polarized light using a polarizing substrate and a retardation substrate may be used. Further, a backlight, a side light or the like may be used as the light source. Further, as the backlight and the side light, a micro LED or the like may be used.

In the display device 100 shown in FIG. 2, a light-shielding layer 151, a colored layer 152, and an insulating layer 153 are provided between the second substrate 106 and the second insulating layer 123.

Examples of the material that can be used as the light-shielding layer include carbon black, titanium black, metal, metal oxide, and composite oxide containing a solid solution of a plurality of metal oxides. The light-shielding layer may be a film containing a resin material or a thin film of an inorganic material such as metal. Further, as the light-shielding layer, a laminated film of a film containing a material of a colored layer can also be used. For example, a laminated structure of a film containing a material used for a colored layer that transmits light of a certain color and a film containing a material used for a colored layer that transmits light of another color can be used. By using the same material for the colored layer and the light-shielding layer, it is preferable because the device can be shared and the process can be simplified.

Examples of the material that can be used for the colored layer include a metal material, a resin material, a resin material containing a pigment or a dye, and the like. The method for forming the light-shielding layer and the colored layer may be the same as the method for forming each layer described above. For example, it may be performed by an inkjet method or the like.

[Cross-sectional configuration example of light emitting display device]
Further, as described above, FIG. 3 shows an example of a light emitting display device using a light emitting element (also referred to as an “EL element”) that utilizes electroluminescence as a display element. The EL element has a layer (also referred to as an "EL layer") containing a luminescent compound between a pair of electrodes. When a potential difference larger than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the luminescent substance contained in the EL layer emits light.

Further, the EL element is distinguished by whether the light emitting material is an organic compound or an inorganic compound, and the former is generally called an organic EL element and the latter is called an inorganic EL element.

By applying a voltage to the organic EL element, electrons are injected into the EL layer from one electrode and holes are injected into the EL layer from the other electrode. Then, when those carriers (electrons and holes) are recombined, the luminescent organic compound forms an excited state, and when the excited state returns to the ground state, it emits light. From such a mechanism, such a light emitting element is called a current excitation type light emitting element.

In addition to the luminescent compound, the EL layer is a substance having a high hole injecting property, a substance having a high hole transporting property, a hole blocking material, a substance having a high electron transporting property, a substance having a high electron injecting property, or a bipolar. It may have a sex substance (a substance having high electron transport property and hole transport property) and the like.

The EL layer can be formed by a method such as a thin-film deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

The inorganic EL element is classified into a dispersed inorganic EL element and a thin film type inorganic EL element according to the element configuration. The dispersed inorganic EL element has a light emitting layer in which particles of a light emitting material are dispersed in a binder, and the light emitting mechanism is donor-acceptor recombination type light emission utilizing a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light emitting mechanism is localized light emission utilizing the inner-shell electron transition of metal ions. Here, an organic EL element will be used as the light emitting element.

The light emitting element may have at least one of a pair of electrodes transparent in order to extract light. Then, a top emission (top emission) structure in which a transistor and a light emitting element are formed on the substrate and light emission is taken out from the surface opposite to the substrate, or a bottom injection (bottom emission) structure in which light emission is taken out from the surface on the substrate side. , There is a light emitting element having a double-sided emission (dual emission) structure that extracts light emission from both sides, and any light emitting element having an injection structure can be applied.

The light emitting element 131, which is a display element, is electrically connected to a transistor 172 provided in the display unit 102. The configuration of the light emitting element 131 is a laminated structure of the first electrode layer 117, the light emitting layer 133, and the second electrode layer 118, but is not limited to this configuration. The configuration of the light emitting element 131 can be appropriately changed according to the direction of the light extracted from the light emitting element 131 and the like.

The partition wall 132 is formed by using an organic insulating material or an inorganic insulating material. In particular, it is preferable to use a photosensitive resin material to form an opening on the first electrode layer 117 so that the side surface of the opening becomes an inclined surface formed with a continuous curvature.

The light emitting layer 133 may be composed of a single layer or may be configured such that a plurality of layers are laminated.

The emission color of the light emitting element 131 can be changed to white, red, green, blue, cyan, magenta, yellow, or the like depending on the material constituting the light emitting layer 133.

As a method of realizing color display, there are a method of combining a light emitting element 131 having a white light emitting color and a colored layer, and a method of providing a light emitting element 131 having a different light emitting color for each pixel. The former method is more productive than the latter method. On the other hand, in the latter method, since it is necessary to make the light emitting layer 133 separately for each pixel, the productivity is inferior to that of the former method. However, in the latter method, it is possible to obtain an luminescent color having a higher color purity than the former method. In addition to the latter method, the color purity can be further increased by imparting a microcavity structure to the light emitting element 131.

The light emitting layer 133 may have an inorganic compound such as a quantum dot. For example, by using quantum dots in the light emitting layer, it can function as a light emitting material.

A protective layer may be formed on the second electrode layer 118 and the partition wall 132 so that oxygen, hydrogen, water, carbon dioxide, etc. do not enter the light emitting element 131. As the protective layer, silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum nitride nitride, aluminum nitride oxide, DLC (Diamond Like Carbon) and the like can be formed. Further, a filler 135 is provided and sealed in the space sealed by the first substrate 101, the second substrate 106, and the sealing material 105. As described above, it is preferable to package (enclose) with a protective film (bonded film, ultraviolet curable resin film, etc.) or a cover material having high airtightness and little degassing so as not to be exposed to the outside air.

As the filler 135, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB ( Polyvinyl butyral) or EVA (ethylene vinyl acetate) or the like can be used. Further, the filler 135 may contain a desiccant.

As the sealing material 105, a glass material such as glass frit, a curable resin such as a two-component mixed resin that cures at room temperature, a photocurable resin, and a resin material such as a thermosetting resin can be used. Further, the sealing material 105 may contain a desiccant.

If necessary, an optical film such as a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), and a color filter is attached to the ejection surface of the light emitting element. It may be provided as appropriate. Further, an antireflection film may be provided on the polarizing plate or the circular polarizing plate. For example, it is possible to apply an anti-glare treatment that can diffuse the reflected light due to the unevenness of the surface and reduce the reflection.

Further, by forming the light emitting element with a microcavity structure, it is possible to extract light having high color purity. Further, by combining the microcavity structure and the color filter, reflection can be reduced and the visibility of the displayed image can be improved.

In the first electrode layer and the second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, a counter electrode layer, etc.) for applying a voltage to the display element, the direction of the light to be taken out, the place where the electrode layer is provided, and the place where the electrode layer is provided. Translucency and reflectivity may be selected according to the pattern structure of the electrode layer.

The first electrode layer 117 and the second electrode layer 118 are an indium oxide containing tungsten oxide, an indium zinc oxide containing tungsten oxide, an indium oxide containing titanium oxide, an indium tin oxide, and an indium containing titanium oxide. A translucent conductive material such as tin oxide, indium zinc oxide, and indium tin oxide to which silicon oxide is added can be used.

Further, the first electrode layer 117 and the second electrode layer 118 are formed of tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta). ), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium (Ti), Platinum (Pt), Aluminum (Al), Copper (Cu), Silver (Ag) and other metals, or alloys thereof, or It can be formed from the metal nitride using one or more.

Further, the first electrode layer 117 and the second electrode layer 118 can be formed by using a conductive composition containing a conductive polymer (also referred to as a conductive polymer). As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. Examples thereof include polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer consisting of two or more kinds of aniline, pyrrole and thiophene or a derivative thereof.

[Constituent materials]
A material and the like that can be used for the display device or the semiconductor device of one aspect of the present invention will be described.

[substrate]
There are no major restrictions on the materials used for the substrate. Depending on the purpose, it may be determined in consideration of the presence or absence of translucency and the heat resistance to the extent that it can withstand heat treatment. For example, a glass substrate such as barium borosilicate glass or aluminoborosilicate glass, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like can be used. Further, a semiconductor substrate, a flexible substrate (flexible substrate), a bonding film, a base film, or the like may be used.

Examples of the semiconductor substrate include a single semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. be. Further, the semiconductor substrate may be a single crystal semiconductor or a polycrystalline semiconductor.

Further, as the substrate, for example, the 6th generation (1500 mm × 1850 mm), the 7th generation (1870 mm × 2200 mm), the 8th generation (2200 mm × 2400 mm), the 9th generation (2400 mm × 2800 mm), and the 10th generation (2950 mm × 3400 mm). ) Etc., a glass substrate having a large area can be used. As a result, a large display device can be manufactured. Further, by increasing the size of the substrate, more display devices can be produced from one substrate, and the production cost can be reduced.

In addition, in order to increase the flexibility of the display device 100, a flexible substrate (flexible substrate), a bonding film, a base film, or the like may be used as the substrate.

Examples of materials such as flexible substrates, laminated films, and base film include polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, and polymethyl methacrylates. Resin, Polycarbonate (PC) resin, polyether sulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polychloride Vinylidene resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofibers and the like can be used.

By using the above material as the substrate, a lightweight display device can be provided. Further, by using the above material as the substrate, it is possible to provide a display device that is strong against impact. Further, by using the above material as the substrate, it is possible to provide a display device that is not easily damaged.

As for the flexible substrate used for the substrate, the lower the coefficient of linear expansion, the more the deformation due to the environment is suppressed, which is preferable. As the flexible substrate used for the substrate, for example, a material having a linear expansion coefficient of 1 × 10 ^-3 / K or less, 5 × 10 ^-5 / K or less, or 1 × 10 ^-5 / K or less may be used. In particular, aramid is suitable as a flexible substrate because of its low coefficient of linear expansion.

[Conductive layer]
In addition to the gate, source and drain of the transistor, the conductive materials that can be used for the conductive layers such as various wirings and electrodes that make up the display device include aluminum (Al), chromium (Cr), copper (Cu), and silver. (Ag), gold (Au), platinum (Pt), tantalum (Ta), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W), hafnium (Hf), vanadium (V), niobium A metal element selected from (Nb), manganese (Mn), magnesium (Mg), zirconium (Zr), beryllium (Be), etc., an alloy containing the above-mentioned metal element as a component, or an alloy obtained by combining the above-mentioned metal element. Etc. can be used. Further, a semiconductor typified by polycrystalline silicon containing an impurity element such as phosphorus, and a silicide such as nickel silicide may be used. The method for forming the conductive material is not particularly limited, and various forming methods such as a vapor deposition method, a CVD method, a sputtering method, and a spin coating method can be used.

Further, as the conductive material, a Cu—X alloy (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. Since the layer formed of the Cu—X alloy can be processed by a wet etching process, the manufacturing cost can be suppressed. Further, as the conductive material, an aluminum alloy containing one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used.

Further, as a conductive material that can be used for the conductive layer, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, and indium tin containing titanium oxide. Conductive materials having oxygen, such as oxides, indium zinc oxides, and indium tin oxides to which silicon oxide has been added, can also be used. Further, a conductive material containing nitrogen such as titanium nitride, tantalum nitride, and tungsten nitride can also be used. Further, the conductive layer may have a laminated structure in which a conductive material having oxygen, a conductive material containing nitrogen, and a material containing the above-mentioned metal element are appropriately combined.

For example, the conductive layer has a single-layer structure of an aluminum layer containing silicon, a two-layer structure in which a titanium layer is laminated on an aluminum layer, a two-layer structure in which a titanium layer is laminated on a titanium nitride layer, and a tungsten layer on a titanium nitride layer. As a two-layer structure in which the titanium layer is laminated, a two-layer structure in which the tungsten layer is laminated on the titanium nitride layer, a titanium layer, an aluminum layer on the titanium layer, and a titanium layer on the titanium layer. good.

Further, a plurality of conductive layers formed of the above conductive materials may be laminated and used. For example, the conductive layer may have a laminated structure in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined. Further, a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing nitrogen are combined. Further, a laminated structure may be formed in which the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined.

For example, the conductive layer is formed by laminating a conductive layer containing copper on a conductive layer containing at least one of indium or zinc and oxygen, and further laminating a conductive layer containing at least one of indium or zinc and oxygen on the conductive layer. It may have a three-layer structure. In this case, it is preferable that the side surface of the conductive layer containing copper is also covered with the conductive layer containing at least one of indium or zinc and oxygen. Further, for example, a plurality of conductive layers containing at least one of indium or zinc and oxygen may be laminated and used as the conductive layer.

[Insulation layer]
Each insulating layer is made of aluminum nitride, aluminum oxide, aluminum nitride, aluminum oxide, magnesium oxide, silicon nitride, silicon oxide, silicon nitride, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, and lanthanum oxide. , Neodim oxide, Hafnium oxide, Tantal oxide, Aluminum silicate, etc. are used in a single layer or in a laminated manner. Further, among the oxide material, the nitride material, the oxide nitride material, and the nitride oxide material, a material obtained by mixing a plurality of materials may be used.

In the present specification and the like, the nitride oxide refers to a compound having a higher nitrogen content than oxygen. The oxidative nitride refers to a compound having a higher oxygen content than nitrogen. The content of each element can be measured by using, for example, Rutherford Backscattering Spectrometry (RBS) or the like.

In particular, the insulating layer 146 and the insulating layer 149 are preferably formed by using an insulating material in which impurities are difficult to permeate. For example, insulating materials containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lantern, neodymium, hafnium or tantalum in a single layer or It may be used in lamination. Examples of insulating materials that are difficult for impurities to permeate include aluminum oxide, aluminum nitride, aluminum nitride, aluminum nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Examples include silicon nitride.

By using an insulating material in which impurities do not easily permeate into the insulating layer 146, diffusion of impurities from the substrate 101 side can be suppressed and the reliability of the transistor can be improved. By using an insulating material in which impurities do not easily permeate into the insulating layer 149, diffusion of impurities from above the insulating layer 149 can be suppressed and the reliability of the transistor can be improved.

Further, an insulating layer capable of functioning as a flattening layer may be used as the insulating layer. As the insulating layer that can function as the flattening layer, a heat-resistant organic material such as polyimide, acrylic resin, benzocyclobutene resin, polyamide, or epoxy resin can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane resins, PSG (phosphorus glass), BPSG (phosphorene glass) and the like can be used. A plurality of insulating layers formed of these materials may be laminated.

The siloxane resin corresponds to a resin containing a Si—O—Si bond formed using a siloxane-based material as a starting material. As the substituent of the siloxane resin, an organic group (for example, an alkyl group or an aryl group) or a fluoro group may be used. Moreover, the organic group may have a fluoro group.

Further, the surface of the insulating layer or the like may be subjected to CMP treatment. By performing the CMP treatment, the unevenness of the sample surface can be reduced, and the covering property of the insulating layer and the conductive layer formed after that can be improved.

[Semiconductor layer]
As the semiconductor material used for the semiconductor layer of the transistor, any of amorphous semiconductors and crystalline semiconductors (microcrystalline semiconductors, polycrystalline semiconductors, single crystal semiconductors, or semiconductors having a partially crystalline region) may be used. good.

Further, for example, silicon, germanium, or the like can be used as the semiconductor material used for the semiconductor layer of the transistor. Further, compound semiconductors such as silicon carbide, gallium arsenide, metal oxides and nitride semiconductors, organic semiconductors and the like can be used.

For example, amorphous silicon (amorphous silicon) can be used as the semiconductor material used for the transistor. In particular, amorphous silicon is excellent in mass productivity and can be easily provided on a substrate having a large area. In general, amorphous silicon used for transistors contains a large amount of hydrogen. Therefore, amorphous silicon containing a large amount of hydrogen may be referred to as "hydrogenated amorphous silicon" or "a-Si: H". Further, since amorphous silicon can be formed at a lower temperature than polycrystalline silicon, the maximum temperature during the manufacturing process can be lowered. Therefore, a material having low heat resistance can be used for the substrate, the conductive layer, the insulating layer, and the like.

Further, as the semiconductor material used for the transistor, silicon having crystallinity such as microcrystalline silicon, polycrystalline silicon, and single crystal silicon can also be used. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon, and has higher field effect mobility and higher reliability than amorphous silicon.

Further, as the semiconductor material used for the transistor, an oxide semiconductor which is a kind of metal oxide can be used. Typically, an oxide semiconductor containing indium or the like can be used. Oxide semiconductors can achieve higher field-effect mobility and higher reliability than amorphous silicon. Further, the oxide semiconductor is excellent in mass productivity and can be easily provided on a substrate having a large area.

Further, since an oxide semiconductor, which is a kind of metal oxide, has a wider bandgap and a lower carrier density than silicon, it is preferably used for the semiconductor layer of a transistor. It is preferable to use an oxide semiconductor for the semiconductor layer of the transistor because the current flowing between the source and the drain in the off state of the transistor can be reduced.

The oxide semiconductor, which is a kind of metal oxide, preferably has an energy gap of 2 eV or more, and more preferably 2.5 eV or more. It is more preferably 3 eV or more. As described above, by using an oxide semiconductor having a wide energy gap, the off-current of the transistor can be reduced.

Oxide semiconductors, which are a type of metal oxide, include In-M containing at least indium, zinc and M (metals such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium). It is preferable to include a material represented by −Zn-based oxide. Further, in order to reduce variations in the electrical characteristics of the transistor using the oxide semiconductor, it is preferable to include a stabilizer together with them.

Examples of the stabilizer include gallium, tin, hafnium, aluminum, zirconium and the like, including the metal described in M above. Other stabilizers include lanthanoids such as lanthanide, cerium, praseodymium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium.

Examples of the metal oxide constituting the semiconductor layer include In-Ga-Zn-based oxide, In-Al-Zn-based oxide, In-Sn-Zn-based oxide, In-Hf-Zn-based oxide, and In-. La-Zn-based oxide, In-Ce-Zn-based oxide, In-Pr-Zn-based oxide, In-Nd-Zn-based oxide, In-Sm-Zn-based oxide, In-Eu-Zn-based oxide In-Gd-Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Zn-based oxide, In-Er-Zn-based oxide, In-Tm -Zn-based oxide, In-Yb-Zn-based oxide, In-Lu-Zn-based oxide, In-Sn-Ga-Zn-based oxide, In-Hf-Ga-Zn-based oxide, In-Al- Ga-Zn-based oxides, In-Sn-Al-Zn-based oxides, In-Sn-Hf-Zn-based oxides, and In-Hf-Al-Zn-based oxides can be used.

Here, the In-Ga-Zn-based oxide means an oxide containing In, Ga, and Zn as main components, and the ratio of In, Ga, and Zn does not matter. Further, a metal element other than In, Ga and Zn may be contained.

The metal oxide that can be used for the semiconductor layer of the transistor will be described in detail in another embodiment.

[Formation method of each layer]
Insulating layers, semiconductor layers, conductive layers for forming electrodes and wiring are prepared by sputtering method, chemical vapor deposition (CVD) method, vacuum deposition method, pulse laser deposition (PLD) method. , Atomic layer deposition (ALD) method or the like can be used for formation. The CVD method may be a plasma chemical vapor deposition (PECVD) method or a thermal CVD method. As an example of the thermal CVD method, the metalorganic chemical vapor deposition (MOCVD) method may be used.

In addition, the insulating layer, semiconductor layer, conductive layer for forming electrodes and wiring, etc. that make up the display device include spin coating, dip, spray coating, inkjet, dispense, screen printing, offset printing, slit coating, roll coating, etc. It may be formed by a method such as a curtain coat or a knife coat.

The PECVD method provides a high quality film at a relatively low temperature. When a film forming method that does not use plasma during film formation, such as a MOCVD method, an ALD method, or a thermal CVD method, is used, damage to the surface to be formed is unlikely to occur. For example, wiring, electrodes, elements (transistors, capacitive elements, etc.) and the like included in a semiconductor device may be charged up by receiving electric charges from plasma. At this time, the accumulated electric charge may destroy the wiring, electrodes, elements, and the like included in the semiconductor device. On the other hand, in the case of the film forming method that does not use plasma, such plasma damage does not occur, so that the yield of the semiconductor device can be increased. Further, since plasma damage does not occur during film formation, a film having few defects can be obtained.

The CVD method and the ALD method are different from the film forming method in which particles emitted from a target or the like are deposited, and are film forming methods in which a film is formed by a reaction on the surface of an object to be treated. Therefore, it is a film forming method that is not easily affected by the shape of the object to be treated and has good step coverage. In particular, the ALD method has excellent step covering property and excellent thickness uniformity, and is therefore suitable for covering the surface of an opening having a high aspect ratio. However, since the ALD method has a relatively slow film forming rate, it may be preferable to use it in combination with another film forming method such as a CVD method having a high film forming rate.

In the CVD method and the ALD method, the composition of the obtained film can be controlled by the flow rate ratio of the raw material gas. For example, in the CVD method and the ALD method, a film having an arbitrary composition can be formed depending on the flow rate ratio of the raw material gas. Further, for example, in the CVD method and the ALD method, a film having a continuously changed composition can be formed by changing the flow rate ratio of the raw material gas while forming the film. When forming a film while changing the flow rate ratio of the raw material gas, it is possible to shorten the time required for film formation by the amount of time required for transportation and pressure adjustment as compared with the case of forming a film using a plurality of film forming chambers. can. Therefore, it may be possible to increase the productivity of the semiconductor device.

When processing the layer (thin film) constituting the display device, it can be processed by using a photolithography method or the like. Alternatively, an island-shaped layer may be formed by a film forming method using a shielding mask. Alternatively, the layer may be processed by a nanoimprint method, a sandblast method, a lift-off method, or the like. In the photolithography method, a resist mask is formed on a layer (thin film) to be processed, a resist mask is used as a mask, a part of the layer (thin film) is selectively removed, and then the resist mask is removed. There are a method and a method in which a layer having photosensitivity is formed, and then exposure and development are performed to process the layer into a desired shape.

When light is used in the photolithography method, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these can be used as the light used for exposure. In addition, ultraviolet light, KrF laser light, ArF laser light, or the like can also be used. Further, the exposure may be performed by the immersion exposure technique. Further, as the light used for exposure, extreme ultraviolet light (EUV: Extreme Ultra-violet) or X-rays may be used. Further, an electron beam can be used instead of the light used for exposure. It is preferable to use extreme ultraviolet light, X-rays, or an electron beam because extremely fine processing is possible. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

A dry etching method, a wet etching method, a sandblasting method, or the like can be used for removing (etching) the layer (thin film). Moreover, you may use these etching methods in combination.

[Electrical characteristics of transistors]
4 (A) and 4 (B) show an example of the Id-Vg characteristic, which is one of the electrical characteristics of the transistor. The Id-Vg property indicates the change in Id with respect to the change in Vg. The horizontal axis of FIGS. 4A and 4B shows the gate voltage (Vg) on a linear scale. Further, the vertical axis of FIGS. 4A and 4B shows the drain current (Id) on a log scale.

FIG. 4A shows the Id-Vg characteristics of the OS transistor. FIG. 4B shows the Id-Vg characteristics of a transistor (also referred to as a “Si transistor”) in which silicon is used in the semiconductor layer on which a channel is formed. Note that both FIGS. 4 (A) and 4 (B) show the Id-Vg characteristics of the n-channel transistor.

As shown in FIG. 4A, the off-current of the OS transistor is unlikely to increase even in operation at a high temperature. In addition, the on-current of the OS transistor increases as the temperature rises. Therefore, the electric field effect mobility increases. On the other hand, as shown in FIG. 4B, the off-current of the Si transistor increases as the temperature rises. Further, the on-current of the Si transistor decreases as the temperature rises. Therefore, the electric field effect mobility is reduced.

Further, when a drain current flows through a transistor, Joule heat is generated (self-heating). Therefore, by providing the OS transistor and the heat storage layer in an overlapping manner, the on-current and field effect mobility of the OS transistor can be increased without using special heating means or the like.

[Example of drive circuit unit]
As an example of the drive circuit unit, a configuration example of the drive circuit unit 104a will be described. FIG. 5A is a block diagram for explaining a configuration example of the drive circuit unit 104a. In the present embodiment, a case where the drive circuit unit 104a is configured by a unipolar circuit will be described. The transistor included in the drive circuit unit 104a is an n-channel transistor.

The drive circuit unit 104a has n pulse output circuits 184. In the present specification and the like, the pulse output circuit 184 of the first stage marked "pulse output circuit 184 _{_} 1", the pulse output circuit 184 of the n-th stage referred to as "pulse output circuit 184_n". In addition, the pulse output circuit 184 of the i-th stage referred to as "pulse output circuit 184 _{_} i". The terminals of the pulse output circuit 184, the output signal OUT, and the like may also be described in the same manner as described above. For example, the output signal OUT of the pulse output circuit 184_i may be referred to as “output signal OUT_i”.

Further, in the drive circuit unit 104a, the wiring 901 to which the first clock signal CLK1 is supplied, the wiring 902 to which the second clock signal CLK2 is supplied, the wiring 903 to which the third clock signal CLK3 is supplied, and the fourth It has a wiring 904 to which the clock signal CLK4 is supplied and a wiring 905 to which the start signal is supplied.

The clock signal is a signal that changes to H potential and L potential at regular intervals, and the first clock signal CLK1 to the fourth clock signal CLK4 are delayed by 1/4 cycle in order. The drive circuit unit 104a controls the pulse output circuit and the like by using the first clock signal CLK1 to the fourth clock signal CLK4. The number of clock signals used in the drive circuit unit is not limited to four.

FIG. 5B shows a configuration example of the pulse output circuit 184_i in the i-th stage. The pulse output circuit 184_i has a control circuit 185_i and an output circuit 186_i.

[Control circuit 185]
The control circuit 185_i has terminals 911 to 919. The terminal 911 is electrically connected to the wiring 901, the terminal 912 is electrically connected to the wiring 902, the terminal 913 is electrically connected to the wiring 903, and the terminal 914 is electrically connected to the wiring 904.

The start signal SP is supplied to the terminal 915 of the control circuit 185_i via the wiring 905. Further, the terminal 915 of the control circuit 185_i is electrically connected to the terminal 916 of the control circuit 185_i-1 (the control circuit 185 of the i-1st stage. In this case, i is an integer of 2 or more and n or less). .. Further, the terminal 916 of the control circuit 185_i is electrically connected to the terminal 915 of the control circuit 185_i + 1 (in this case, i is an integer of 1 or more and less than n).

The control circuit 185 has a function of controlling the operation of the output circuit 186 according to the signals input to the terminals 911 to 915.

[Output circuit 186]
The output circuit 186_i includes a transistor 114, a transistor 134, a transistor 136, a transistor 126, and a capacitive element 128. One of the source or drain of the transistor 114 is electrically connected to the terminal 917 and the other is electrically connected to the node 127. The gate of transistor 114 is electrically connected to node 129. One of the source or drain of the transistor 114 is supplied with VDD (H potential), and the other is electrically connected to the node 129. The gate of the transistor 134 is electrically connected to the terminal 918. One of the source or drain of the transistor 136 is electrically connected to the node 129, and the other is supplied with VSS (L potential). The gate of transistor 136 is electrically connected to terminal 919. One of the source or drain of the transistor 126 is electrically connected to the node 127 and the other is supplied with VSS. The gate of transistor 126 is electrically connected to terminal 919. One electrode of the capacitive element 128 is electrically connected to the node 129 and the other electrode is electrically connected to the node 127. Node 127 is electrically connected to wiring 162_i.

[Transistors used in drive circuits]
The transistor 114 has a function of supplying a selection signal to all the pixels 110 connected to the wiring 162. Further, increasing the size and definition of the display unit tends to increase the wiring resistance of the wiring 162 and the parasitic capacitance. An increase in wiring resistance and an increase in parasitic capacitance cause delays in signal transmission to the end of wiring, blunting of signal waveforms, etc., and contribute to deterioration of display quality. Therefore, it is necessary to increase the on-current of the transistor 114.

Increasing the channel width of the transistor 114 in order to increase the on-current increases the occupied area of the transistor 114. Further, since the gate capacitance also increases when the channel width of the transistor 114 is increased, it is necessary to increase the capacitance value of the capacitance element 128. That is, it is necessary to increase the occupied area of the capacitance element 128.

By using an OS transistor for the transistor 114 and providing an insulating layer 161 that functions as a heat storage layer and a semiconductor layer of the transistor 114 in an overlapping manner, the field effect mobility is increased (on) without increasing the occupied area of the transistor 114. (Increase in current) can be realized.

The insulating layer 161 is formed by using a material having a lower thermal conductivity than an inorganic material such as silicon oxide or silicon nitride. Specifically, as the insulating layer 161, a material having a thermal conductivity (unit: W / (m · K) of 0.05 or more and less than 1, preferably 0.05 or more and less than 0.5) at 20 ° C. is used, for example. As the insulating layer 161, a resin material such as acrylic resin, epoxy resin, phenol resin, silicone resin, polyimide, polycarbonate, or polystyrene can be used. The material used as the insulating layer 161 is limited to the resin material. For example, an inorganic material having a reduced thermal conductivity by a method such as porosification may be used as the insulating layer 161.

Further, in the unipolar circuit, a "boot strap operation" is performed to reliably output the H potential. In order to realize the bootstrap operation in the output circuit 186_i, it is necessary to make the node 129 in a floating state. Therefore, it is preferable that the off-currents of the transistors 134 and the transistors 136 that supply the potential (charge) to the node 129 are small. Therefore, it is preferable to use an OS transistor as the transistor 134 and the transistor 136.

Further, in principle, the transistor included in the output circuit 186_i does not have a negative Vg. Therefore, in the transistor 134 and the transistor 136, it is important that the drain current (also referred to as “Icut”) when Vg is 0V is small. The operation of the output circuit 186_i will be described later.

Further, as shown in FIG. 4A, Icut tends to increase as the temperature of the transistor rises. Therefore, it is preferable that the transistor 134 and the transistor 136 are not provided with the heat storage layer.

By determining the presence or absence of the insulating layer 161 that functions as a heat storage layer according to the required electrical characteristics of the transistor, it is possible to realize a narrow frame of the display device while maintaining or improving the performance of the peripheral drive circuit.

Further, since the transistor is easily destroyed by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured by using a non-linear element.

[Operation of output circuit 186]
The operation of the output circuit 186_i will be described with reference to FIGS. 6 to 8. FIG. 6 is a timing chart illustrating the operation of the output circuit 186_i. FIG. 6 shows the potential changes of the terminals 917 to 919, the node 129, and the wiring 162_i. The clock signal CLK is supplied to the terminal 917. For example, the first clock signal CLK1 is supplied.

[Period 950 (see FIG. 7 (A))]
In the period 950, the L potential is supplied to the terminals 917 and 918, and the H potential is supplied to the terminals 919. Therefore, the transistor 114 and the transistor 134 are in the off state, and the transistor 126 and the transistor 136 are in the on state. The L potential is supplied to the node 129 via the transistor 136. The L potential is supplied to the node 127 via the transistor 126. Therefore, the L potential is supplied to the wiring 162_i.

[Period 951 (see FIG. 7B)]
In the period 951, the H potential is supplied to the terminal 918 and the L potential is supplied to the terminal 919. Then, the transistor 134 is turned on, and the transistor 126 and the transistor 136 are turned off.

The H potential is supplied to the node 129 via the transistor 134. Here, since the transistor 134 is an n-channel type transistor, the potential of the node 129 is lower than the H potential by Vth. Further, the transistor 114 is turned on, and the potential of the terminal 917 is supplied to the node 127. However, since the potential of the terminal 917 is the L potential, the potential of the node 127 remains the L potential.

[Period 952 (see FIG. 8 (A))]
In period 952, the L potential is supplied to the terminal 918. Then, the transistor 134 is turned off. Here, since the transistor 136 is in the off state, the node 129 is in the floating state.

[Period 953 (see FIG. 8B)]
In period 952, the H potential is supplied to the terminal 917. The H potential is supplied to the node 127 via the transistor 134. At this time, if the capacitance element 128 is not provided, the potential of the node 127 becomes a potential Vth lower than the H potential, and the potential supply to the wiring 162_i is insufficient. Such a phenomenon is called a "threshold drop phenomenon".

By providing the capacitance element 128 between the node 127 and the node 129, the potential of the node 129 in the floating state can be raised in conjunction with the potential rise of the node 127. Therefore, the Vg of the transistor 114 can be set to H potential + Vth or more. Such an operation is also referred to as a "boot strap operation". The capacitive element 128 is also referred to as a "bootstrap capacitance".

Due to the bootstrap operation, the potential of node 129 rises to 2 × H potential −Vth. In a unipolar circuit, the output voltage is likely to be attenuated due to the threshold drop phenomenon. However, the bootstrap operation can prevent the threshold drop phenomenon and reliably supply the H potential to the wiring 162_i.

[Modification example of display device]
Subsequently, a modification of the liquid crystal display device shown in FIGS. 2 and 3 will be described. In order to reduce the repetition of the description, the differences from the liquid crystal display devices shown in FIGS. 2 and 3 will be mainly described.

[Modification 1]
FIG. 9 is a diagram illustrating a modified example of the liquid crystal display device shown in FIG. As shown in FIG. 9, in the display unit 102, an insulating layer 161 that functions as a heat storage layer may be provided between the transistor 112 and the capacitance element 113 and the substrate 101.

By using an OS transistor for the transistor 112 and providing the insulating layer 161 and the semiconductor layer of the transistor 112 in an overlapping manner, the field effect mobility can be increased (increased on-current) without increasing the occupied area of the transistor 112. It can be realized.

When the transistor 112 is turned off, a negative voltage is applied to the gate of the transistor 112, so that the increase in Icut does not matter.

By increasing the electric field effect mobility of the transistor 112, the writing speed of the video signal to each pixel can be increased. Therefore, it is possible to easily increase the size and / or increase the definition of the display device.

[Modification 2]
When the display device 100 is a transmissive liquid crystal display device, it is preferable that the area of the insulating layer 161 occupying the display unit 102 is small in order to prevent or reduce the absorption and coloring of the transmitted light by the insulating layer 161. .. For example, as in the liquid crystal display device shown in FIG. 10, the insulating layer 161 may be provided only in the region overlapping the semiconductor layer of the transistor 112 and its vicinity in the display unit 102.

[Modification 3]
FIG. 11 is a diagram illustrating a modified example of the light emitting display device shown in FIG. As shown in FIG. 11, in the display unit 102, an insulating layer 161 that functions as a heat storage layer may be provided between the transistor 112, the transistor 172, and the capacitance element 113 and the substrate 101.

By using an OS transistor for the transistor 112 and providing the insulating layer 161 and the semiconductor layer of the transistor 112 in an overlapping manner, the field effect mobility can be increased (increased on-current) without increasing the occupied area of the transistor 112. It can be realized.

Similarly, by using an OS transistor for the transistor 172 and providing the insulating layer 161 and the semiconductor layer of the transistor 172 in an overlapping manner, the field effect mobility is increased (on-current) without increasing the occupied area of the transistor 172. Increase) can be realized.

By increasing the electric field effect mobility of the transistor 112, the writing speed of the video signal to each pixel can be increased. Therefore, it is possible to easily increase the size and / or increase the definition of the display device.

Further, by increasing the electric field effect mobility of the transistor 172, the driving force of the display element can be increased.

[Modification example 4]
Further, when the display device 100 is a bottom emission type light emitting display device, the area of the insulating layer 161 occupying the display unit 102 is smaller in order to prevent or reduce the absorption and coloring of the transmitted light by the insulating layer 161. preferable. For example, as in the light emitting display device shown in FIG. 12, the insulating layer 161 may be provided only in the region overlapping the semiconductor layer of the transistor 172 and its vicinity in the display unit 102.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 2)
In the present embodiment, a configuration example of the pixel 110 will be described with reference to the drawings.

13 (A), 13 (B), 13 (C), and 13 (D) show examples of circuit configurations that can be used for pixel 532. The pixel 110 includes a pixel circuit 534 and a display element 462.

[Display element]
Various display elements can be used for the display element 462. Examples of display elements include EL (electroluminescence) elements (organic EL elements, inorganic EL elements, or EL elements containing organic and inorganic substances), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors. (Transistor that emits light according to current), electron emitting element, liquid crystal element, electronic ink, electrophoresis element, GLV (grating light valve), display element using MEMS (micro electro mechanical system), DMD (digital) Micromirror device), DMS (digital micro shutter), MIRASOL (registered trademark), IMOD (interferometric modulation) element, shutter type MEMS display element, optical interference type MEMS display element, electrowetting element, Some have a display medium such as a piezoelectric ceramic display or a display element using carbon nanotubes, in which the contrast, brightness, reflectance, transmittance, etc. are changed by an electric or magnetic action. Further, quantum dots may be used as the display element.

An EL display or the like is an example of a display device using an EL element as the display element 462. An example of a display device using an electron emitting element is a FED (field emission display) or a SED type flat display (SED: Surface-conduction Electron-emitter Display). An example of a display device using quantum dots is a quantum dot display. An example of a display device using a liquid crystal element is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display). An example of a display device using electronic ink, electronic powder fluid (registered trademark), or an electrophoretic element is electronic paper. Further, the display device may be a PDP (plasma display panel). Further, the display device may be a retinal scanning type projection device. Further, it may be a display device using a micro LED.

In the case of realizing a semi-transmissive liquid crystal display or a reflective liquid crystal display, a part or all of the pixel electrodes may have a function as a reflective electrode. For example, a part or all of the pixel electrodes may have aluminum, silver, or the like. Further, in that case, it is also possible to provide a storage circuit such as SRAM under the reflective electrode. Thereby, the power consumption can be further reduced.

When an LED is used, graphene or graphite may be arranged under the electrode of the LED or the nitride semiconductor. Graphene and graphite may be formed into a multilayer film by stacking a plurality of layers. By providing graphene or graphite in this way, a nitride semiconductor, for example, an n-type GaN semiconductor layer having crystals can be easily formed on the graphene or graphite. Further, a p-type GaN semiconductor layer having crystals or the like can be provided on the p-type GaN semiconductor layer to form the LED. An AlN layer may be provided between graphene or graphite and an n-type GaN semiconductor layer having crystals. The GaN semiconductor layer of the LED may be formed by MOCVD. However, by providing graphene, the GaN semiconductor layer of the LED can be formed by a sputtering method.

[Pixel circuit]
[Example of pixel circuit for light emission display device]
The pixel circuit 534 shown in FIG. 13A includes a transistor 112, a capacitive element 113, a transistor 172, and a transistor 464. Further, the pixel circuit 534 shown in FIG. 13B is electrically connected to a light emitting element that can function as a display element 462.

There are no particular restrictions on the transistors used as the transistor 112, the transistor 172, and the transistor 464. For example, a transistor using amorphous silicon may be used for the semiconductor layer on which the channel is formed, or an OS transistor may be used.

One of the source and drain of the transistor 112 is electrically connected to the wiring 163_j. Further, the gate of the transistor 112 is electrically connected to the wiring 162_i. A video signal is supplied from the wiring 163_j.

The transistor 112 has a function of controlling the writing of the video signal to the node 465.

One of the pair of electrodes of the capacitive element 113 is electrically connected to the node 465 and the other is electrically connected to the node 467. Also, the other of the source and drain of the transistor 112 is electrically connected to the node 465.

The capacitance element 113 has a function as a holding capacitance for holding the data written in the node 465.

One of the source and drain of the transistor 172 is electrically connected to the potential supply line VL_a and the other is electrically connected to the node 467. Further, the gate of transistor 172 is electrically connected to node 465.

One of the source and drain of the transistor 464 is electrically connected to the potential supply line V0 and the other is electrically connected to the node 467. Further, the gate of the transistor 464 is electrically connected to the wiring 162_i.

As the display element 462, for example, an organic electroluminescence element (also referred to as an organic EL element) or the like can be used. However, the display element 462 is not limited to this, and for example, an inorganic EL element made of an inorganic material may be used.

When a light emitting element such as an organic EL element or an inorganic EL element is used as the display element 462, one of the anode and the cathode of the display element 462 is electrically connected to the potential supply line VL_b, and the other is electrically connected to the node 467. Be connected.

For example, one of the potential supply line VL_a or the potential supply line VL_b is given a high power supply potential VDD, and the other is given a low power supply potential VSS.

In the display device having the pixel 110 of FIG. 13A, the drive circuit unit 104a and / or the drive circuit unit 104b sequentially selects the pixel 110 of each row, turns on the transistor 112 and the transistor 464, and transmits the video signal to the node. Write to 465.

The pixel 110 in which data is written to the node 465 is put into a holding state when the transistor 112 and the transistor 464 are turned off. Further, the amount of current flowing between the source electrode and the drain electrode of the transistor 172 is controlled according to the potential of the data written in the node 465, and the display element 462 (light emitting element) emits light with brightness corresponding to the amount of flowing current. do. By doing this sequentially line by line, the image can be displayed.

Further, as shown in FIG. 13C, a transistor having a back gate may be used as the transistor 112, the transistor 464, and the transistor 172. In the transistor 112 and the transistor 464 shown in FIG. 13C, the gate is electrically connected to the back gate. Therefore, the gate and the back gate always have the same potential. Further, the back gate of the transistor 172 is electrically connected to the node 467. Therefore, the back gate always has the same potential as the node 467.

[Example of pixel circuit for liquid crystal display device]
The pixel circuit 534 shown in FIG. 13B includes a transistor 112 and a capacitive element 113. Further, in the pixel circuit 534 shown in FIG. 13B, a liquid crystal element that can function as a display element 462 is electrically connected.

The potential of one of the pair of electrodes of the display element 462 is appropriately set according to the specifications of the pixel circuit 534. For example, a common potential (common potential) may be applied to one of the pair of electrodes of the display element 462, or the potential may be the same as that of the capacitance line CL described later. Further, a different potential may be applied to one of the pair of electrodes of the display element 462 for each pixel 532. The other of the pair of electrodes of the display element 462 is electrically connected to the node 466. The orientation state of the display element 462 is set by the data written to the node 466.

Examples of the driving method of the display device including the display element 462 include a TN (Twisted Nematic) mode, an STN (Super Twisted Nematic) mode, a VA (Vertical Identic) mode, and an ASM (Axially Liquid Crystal Electronic) mode. Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (Antiferroelectric Liquid Crystal) mode, MVA mode, PVA (Partnered Virtual) mode, PVA (Partnered Vertical) Mode , Or TBA (Transverse Bend Alignment) mode or the like may be used. In addition to the above-mentioned driving method, the display device can be driven by an ECB (Electrically Controlled Birefringence) mode, a PDLC (Polymer Dispersed Liquid Crystal) mode, a PNLC (Polymer Network Liquid Crystal) mode, a PNLC (Polymer Network Liquid Crystal) mode, or the like, or a PNLC (Polymer Network Liquid Crystal) mode. However, the present invention is not limited to this, and various liquid crystal elements and various driving methods thereof can be used.

The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation action of a liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field). When a liquid crystal element is used as the display element 462, a thermotropic liquid crystal, a low molecular weight liquid crystal, a polymer liquid crystal, a polymer dispersion type liquid crystal, a strong dielectric liquid crystal, an anti-strong dielectric liquid crystal, or the like can be used. Depending on the conditions, these liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase and the like.

As the liquid crystal material, either a positive type liquid crystal or a negative type liquid crystal may be used, and the optimum liquid crystal material may be used according to the mode and design to which the liquid crystal is applied.

An alignment film can be provided to control the orientation of the liquid crystal. When the transverse electric field method is adopted, a liquid crystal showing a blue phase (Blue Phase) without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the temperature of the cholesteric liquid crystal is raised. Since the blue phase is expressed only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent of several weight% or more is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response rate and is optically isotropic. Further, the liquid crystal composition containing the liquid crystal showing the blue phase and the chiral agent does not require an orientation treatment and has a small viewing angle dependence. Further, since it is not necessary to provide an alignment film, the rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced. .. Therefore, it is possible to improve the productivity of the liquid crystal display device.

By using a liquid crystal material that operates in the guest-host mode for the liquid crystal element, functional members such as a light diffusion layer and a polarizing plate can be omitted. Therefore, the productivity of the display device can be increased. Further, by not providing a functional member such as a polarizing plate, it is possible to increase the reflected brightness and the amount of transmitted light of the element 180 of the display unit 102. Therefore, the visibility of the display device can be improved.

In addition, when switching between the on state and the off state (switching between the bright state and the dark state) of the reflective liquid crystal display device using a circularly polarizing plate, the long axis of the liquid crystal molecules should be aligned in a direction substantially perpendicular to the substrate, or the substrate and the substrate. It is done by aligning it in a substantially horizontal direction. In general, a liquid crystal element operating in a transverse electric field system such as an IPS mode is difficult to use in a reflective liquid crystal display device because the long axis of the liquid crystal molecules is aligned in a direction substantially horizontal to the substrate in both the on state and the off state.

The liquid crystal element operating in the VA-IPS mode operates in a transverse electric field method, and the long axis of the liquid crystal molecule is aligned in a direction substantially perpendicular to the substrate or substantially horizontal to the substrate when switching between the on state and the off state. It is done by aligning the directions. Therefore, when a liquid crystal element operating in a transverse electric field method is used for a reflective liquid crystal display device, it is preferable to use a liquid crystal element operating in the VA-IPS mode.

Further, a method called multi-domain or multi-domain design, in which the pixel 110 is divided into several regions and the molecules are tilted in different directions, can be used.

The intrinsic resistance of the liquid crystal material is 1 × 10 ⁹ Ω · cm or more, preferably 1 × 10 ¹¹ Ω · cm or more, and more preferably 1 × 10 ¹² Ω · cm or more. The value of the intrinsic resistance in the present specification is a value measured at 20 ° C.

In the pixel circuit 534 of the i-th row and j-th column, one of the source and drain of the transistor 112 is electrically connected to the wiring 163_j, and the other is electrically connected to the node 466. The gate of the transistor 112 is electrically connected to the wiring 162_i. A video signal is supplied from the wiring 163_j. The transistor 112 has a function of controlling the writing of a video signal to the node 466.

One of the pair of electrodes of the capacitance element 113 is electrically connected to a wiring (hereinafter, capacitance line CL) to which a specific potential is supplied, and the other is electrically connected to a node 466. The potential value of the capacitance line CL is appropriately set according to the specifications of the pixel circuit 534. The capacitance element 113 has a function as a holding capacitance for holding the data written in the node 466.

For example, in the display device 100 having the pixel circuit 534 of FIG. 13B, the drive circuit unit 104a and / or the drive circuit unit 104b sequentially selects the pixel circuit 534 of each row, turns on the transistor 112, and connects to the node 466. Write a video signal.

The pixel circuit 534 in which the video signal is written to the node 466 is put into a holding state when the transistor 112 is turned off. By sequentially performing this line by line, an image can be displayed on the display unit 102.

Further, as shown in FIG. 13D, a transistor having a back gate in the transistor 112 may be used. In the transistor 112 shown in FIG. 13 (D), the gate is electrically connected to the back gate. Therefore, the gate and the back gate always have the same potential.

Further, the pixel 110 that controls red light, the pixel 110 that controls green light, and the pixel 110 that controls blue light are collectively functioned as one pixel 120, and the amount of light emitted (emission brightness) of each pixel 110 is controlled. By doing so, full-color display can be realized. Therefore, each of the three pixels 110 functions as a sub-pixel. That is, each of the three sub-pixels controls the amount of light emitted from red light, green light, or blue light (see FIG. 14A). The color of light controlled by each of the three sub-pixels is not limited to the combination of red (R), green (G), and blue (B), but is cyan (C), magenta (M), and yellow (Y). It may be present (see FIG. 14 (B)).

Further, the four sub-pixels may be collectively functioned as one pixel. For example, a sub-pixel that controls white light may be added to the three sub-pixels that control red light, green light, and blue light (see FIG. 14C). By adding a sub-pixel that controls white light, the brightness of the display area can be increased. Further, the sub-pixels that control the yellow light may be added to the three sub-pixels that control the red light, the green light, and the blue light (see FIG. 14D). Further, the sub-pixels that control white light may be added to the three sub-pixels that control cyan light, magenta light, and yellow light (see FIG. 14E).

By increasing the number of sub-pixels that function as one pixel and using sub-pixels that control light such as red, green, blue, cyan, magenta, and yellow in appropriate combinations, it is possible to improve the reproducibility of halftones. can. Therefore, the display quality can be improved.

Further, the display device of one aspect of the present invention can reproduce color gamuts of various standards. For example, the PAL (Phase Alternate Line) standard used in television broadcasting, the NTSC (National Television System Committee) standard, and sRGB (standard RGB) widely used in display devices used in electronic devices such as personal computers, digital cameras, and printers. ITU-R BT. Standards and Adobe RGB standards, used in HDTV (High Definition Television, also referred to as HDTV). 709 (International Telecommunication Union Radiocommunication Vector Broadcasting Service (Television) 709) standard, DCI-P3 (Digital Cinema Initiative) used in digital cinema projection, Ultra-High-Definition TV3 (Digital Cinema Initiative) RBT. It is possible to reproduce a color gamut such as the 2020 (REC. 2020 (Recommendation 2020)) standard.

Further, by arranging the pixels 120 in a matrix of 1920 × 1080, a display device 100 capable of full-color display at a so-called full high-definition (also referred to as “2K resolution”, “2K1K”, or “2K”) resolution is realized. can do. Further, for example, when the pixels 120 are arranged in a matrix of 3840 × 2160, a display device 100 capable of full-color display at a so-called ultra-high definition (also referred to as “4K resolution”, “4K2K”, or “4K”) resolution is displayed. Can be realized. Further, for example, when the pixels 120 are arranged in a matrix of 7680 × 4320, the display device 100 capable of full-color display at the resolution of so-called super high definition (also referred to as “8K resolution”, “8K4K”, or “8K”). Can be realized. By increasing the number of pixels 120, it is possible to realize a display device 100 capable of full-color display at a resolution of 16K or 32K.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 3)
In this embodiment, a metal oxide that can be used for the semiconductor layer of the transistor will be described.

<Composition of metal oxide>
In this section, CAC-OS (Cloud-Aligned Composite-Oxide Semiconductor) or CAC (Cloud-), which is one aspect of a metal oxide that can be used in a semiconductor device such as a transistor disclosed in one aspect of the present invention. The configuration of the Aligned Semiconductor) -metal oxide will be described.

In addition, in this specification and the like, it may be described as CAC and CAAC (c-axis aligned crystal). In this case, CAC represents an example of function or material composition, and CAAC represents an example of structure.

The CAC-OS or CAC-metal oxide has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. When CAC-OS or CAC-metal oxide is used for the active layer of the transistor, the conductive function is the function of flowing electrons (or holes) that serve as carriers, and the insulating function is the function of flowing electrons (or holes) that serve as carriers. It is a function that does not shed. By making the conductive function and the insulating function act in a complementary manner, a switching function (on / off function) can be imparted to the CAC-OS or the CAC-metal oxide. In CAC-OS or CAC-metal oxide, by separating each function, both functions can be maximized.

Therefore, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. Further, in the material, the conductive region and the insulating region may be separated at the nanoparticle level. Further, the conductive region and the insulating region may be unevenly distributed in the material. In addition, the conductive region may be observed with the periphery blurred and connected in a cloud shape.

In the CAC-OS or CAC-metal oxide, the conductive region and the insulating region are dispersed in the material in a size of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less, respectively. There is.

Further, CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, CAC-OS or CAC-metal oxide is composed of a component having a wide gap due to an insulating region and a component having a narrow gap due to a conductive region. In the case of this configuration, when the carriers flow, the carriers mainly flow in the components having a narrow gap. Further, the component having a narrow gap acts complementarily to the component having a wide gap, and the carrier flows to the component having a wide gap in conjunction with the component having a narrow gap. Therefore, when the CAC-OS or CAC-metal oxide is used in the channel region of the transistor, a high current driving force, that is, a large on-current and a high field effect mobility can be obtained in the on-state of the transistor.

That is, the CAC-OS or CAC-metal oxide can also be referred to as a matrix composite or a metal matrix composite.

<Structure of metal oxide>
This section describes the structure of a metal oxide that can be used in a semiconductor device such as a transistor disclosed in one aspect of the present invention.

The metal oxide is divided into a metal oxide made of a single crystal material and a metal oxide made of a non-single crystal material. The single crystal material has a single crystal structure. Further, the non-single crystal material has any one or more of an amorphous structure, a microcrystal structure, and a polycrystalline structure.

Moreover, as one non-single crystal material, a material called a semi-crystalline material (Semi-crystal line material) can be mentioned. The semi-crystalline material has an intermediate structure between a single crystal structure and an amorphous structure.

A single crystal of a metal oxide has a structure in which an oxygen polyhedron having a metal atom in the center is connected with a specific regularity. Specifically, in _{the single crystal of InGaZnO 4,} the octahedron of oxygen having an In atom in the center and the trigonal bipyramid of oxygen having Ga or Zn in the center are connected with a specific regularity. Therefore, it has a layered crystal structure.

On the other hand, the semi-crystalline material has a plurality of oxygen polyhedra having a metal atom in the center, and the polyhedra have a structure in which they are connected to each other without having a specific regularity. The polyhedron of the semi-crystalline material is a polyhedron that is not observed in a single crystal, in which the polyhedron of the single crystal structure is significantly broken. The semi-crystalline material may have a part of a single crystal structure such as a polyhedron having a single crystal structure or a region in which the polyhedron having a single crystal structure is regularly connected.

The structure of the semi-crystalline material is more stable than that of the so-called amorphous material because the polyhedra do not have a specific regularity and are connected to each other.

For example, when the metal oxide is an oxide semiconductor, it is divided into a single crystal oxide semiconductor and other non-single crystal oxide semiconductors. Examples of the non-single crystal oxide semiconductor include CAAC-OS (c-axis aligned crystal oxide semiconductor), polycrystal oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor), and pseudo-amorphous oxide semiconductor (a-lique). OS: atomous-like oxide semiconductor), amorphous oxide semiconductors, and the like.

Further, for example, as a semi-crystalline oxide semiconductor, there is an oxide semiconductor having a CAAC structure and a CAC configuration (hereinafter, also referred to as CAAC / CAC).

CAAC-OS is an oxide semiconductor having a c-axis orientation and having a strained CAAC structure in which a plurality of nanocrystals are connected in the ab plane direction. The strain refers to a region where the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another lattice arrangement is aligned in the region where a plurality of nanocrystals are connected.

Although nanocrystals are basically hexagonal, they are not limited to regular hexagonal shapes and may have non-regular hexagonal shapes. In addition, in distortion, it may have a lattice arrangement such as a pentagon and a heptagon. In CAAC-OS, a clear grain boundary (also referred to as grain boundary) cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion because the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between atoms changes due to the substitution of metal elements. It is thought that this is the reason.

Further, CAAC-OS is a layered crystal in which a layer having indium and oxygen (hereinafter, In layer) and a layer having elements M, zinc, and oxygen (hereinafter, (M, Zn) layer) are laminated. It tends to have a structure (also called a layered structure). Indium and element M can be replaced with each other, and when a part of element M in the (M, Zn) layer is replaced with indium, it can be expressed as (In, M, Zn) layer. Further, when a part of the indium in the In layer is replaced with the element M, it can be expressed as the (In, M) layer.

CAAC-OS is a highly crystalline oxide semiconductor. On the other hand, in CAAC-OS, since a clear crystal grain boundary cannot be confirmed, it can be said that a decrease in electron mobility due to the crystal grain boundary is unlikely to occur. Further, since the crystallinity of the oxide semiconductor may decrease due to the mixing of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the physical properties of CAAC-OS are stable. Therefore, CAAC-OS is heat resistant and highly reliable.

The nc-OS is an oxide semiconductor having a structure having periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In addition, nc-OS does not show regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Therefore, the nc-OS may be indistinguishable from the a-like OS and the amorphous oxide semiconductor depending on the analysis method.

The a-like OS is an oxide semiconductor which is a structure between nc-OS and an amorphous oxide semiconductor. The a-like OS has a void or low density region. That is, a-like OS has lower crystallinity than nc-OS and CAAC-OS.

Oxide semiconductors have various structures, and each has different characteristics. The oxide semiconductor of one aspect of the present invention may have two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 4)
In this embodiment, an example of a transistor that can be used in the display device or the like shown in the above embodiment will be described with reference to the drawings.

<Transistor structure example 1>
The display device of one aspect of the present invention can be manufactured by using various types of transistors such as a bottom gate type transistor and a top gate type transistor. For example, a planar type transistor may be used, or a stagger type transistor may be used. Therefore, the material and transistor structure of the semiconductor layer to be used can be easily replaced according to the existing production line.

[Bottom gate type transistor]
FIG. 15 (A1) is a cross-sectional view of a channel protection type transistor 310, which is a kind of bottom gate type transistor. In FIG. 15 (A1), the transistor 310 is formed on the substrate 371. Further, the transistor 310 has an electrode 322 on the substrate 371 via an insulating layer 372. Further, the semiconductor layer 324 is provided on the electrode 322 via the insulating layer 326. The electrode 322 can function as a gate electrode. The insulating layer 326 can function as a gate insulating layer.

Further, the insulating layer 327 is provided on the channel forming region of the semiconductor layer 324. Further, the electrode 344a and the electrode 344b are provided on the insulating layer 326 in contact with a part of the semiconductor layer 324. The electrode 344a can function as either a source electrode or a drain electrode. The electrode 344b can function as the other of the source electrode and the drain electrode. A part of the electrode 344a and a part of the electrode 344b are formed on the insulating layer 327.

The insulating layer 327 can function as a channel protection layer. By providing the insulating layer 327 on the channel forming region, it is possible to prevent the semiconductor layer 324 from being exposed when the electrodes 344a and 344b are formed. Therefore, it is possible to prevent the channel formation region of the semiconductor layer 324 from being etched when the electrodes 344a and 344b are formed. According to one aspect of the present invention, a transistor having good electrical characteristics can be realized.

Further, the transistor 310 has an insulating layer 328 on the electrode 344a, the electrode 344b and the insulating layer 327, and has an insulating layer 329 on the insulating layer 328.

When a semiconductor such as silicon is used for the semiconductor layer 324, it is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor between the semiconductor layer 324 and the electrode 344a and between the semiconductor layer 324 and the electrode 344b. The layer that functions as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of a transistor.

The insulating layer 329 is preferably formed by using a material having a function of preventing or reducing the diffusion of impurities from the outside into the transistor. The insulating layer 329 may be omitted if necessary.

The transistor 311 shown in FIG. 15 (A2) is different from the transistor 310 in that it has an electrode 323 that can function as a back gate electrode on the insulating layer 329. The electrode 323 can be formed by the same material and method as the electrode 322.

Generally, the back gate electrode is formed of a conductive layer, and is arranged so as to sandwich the channel formation region of the semiconductor layer between the gate electrode and the back gate electrode. Therefore, the back gate electrode can function in the same manner as the gate electrode. The potential of the back gate electrode may be the same potential as that of the gate electrode, may be a ground potential (GND potential), or may be an arbitrary potential. Further, the threshold voltage of the transistor can be changed by changing the potential of the back gate electrode independently without interlocking with the gate electrode.

Both the electrode 322 and the electrode 323 can function as a gate electrode. Therefore, the insulating layer 326, the insulating layer 329, the insulating layer 328, and the insulating layer 329 can each function as a gate insulating layer. The electrode 323 may be provided between the insulating layer 328 and the insulating layer 329.

When one of the electrodes 322 and 323 is referred to as a "gate electrode", the other is referred to as a "back gate electrode". For example, in the transistor 311, when the electrode 323 is referred to as a "gate electrode", the electrode 322 is referred to as a "back gate electrode". Further, when the electrode 323 is used as the "gate electrode", the transistor 311 can be considered as a kind of top gate type transistor. Further, either one of the electrode 322 and the electrode 323 may be referred to as a "first gate electrode", and the other may be referred to as a "second gate electrode".

By providing the electrodes 322 and 323 with the semiconductor layer 324 sandwiched between them, and further by setting the electrodes 322 and 323 to have the same potential, the region in which the carriers flow in the semiconductor layer 324 becomes larger in the film thickness direction. The amount of carrier movement increases. As a result, the on-current of the transistor 311 becomes large, and the field effect mobility becomes high.

Therefore, the transistor 311 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of the transistor 311 can be reduced with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be reduced. Therefore, according to one aspect of the present invention, a semiconductor device having a high degree of integration can be realized.

Further, since the gate electrode and the back gate electrode are formed of a conductive layer, they have a function of preventing an electric field generated outside the transistor from acting on the semiconductor layer on which a channel is formed (particularly, an electric field shielding function against static electricity). .. By forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode, the electric field shielding function can be enhanced.

Since the gate electrode and the back gate electrode each have a function of shielding an electric field from the outside, electric charges such as charged particles generated above and below the transistor do not affect the channel formation region of the semiconductor layer. As a result, deterioration of the stress test (for example, NGBT (Negative Gate Bias-Temperature) stress test (also referred to as “NBT” or “NBTS”) in which a negative voltage is applied to the gate is suppressed. The back gate electrode can block the electric field generated from the drain electrode so as not to act on the semiconductor layer. Therefore, it is possible to suppress the fluctuation of the on-current rising voltage due to the fluctuation of the drain voltage. This effect is remarkable when a potential is supplied to the gate electrode and the back gate electrode.

In addition, the transistor having a back gate electrode also has fluctuations in the threshold voltage before and after the PGBT (Positive Gate Bias-Temperature) stress test (also referred to as "PBT" or "PBTS") in which a positive voltage is applied to the gate. Smaller than a transistor without a backgate electrode.

The BT stress test such as NGBT and PGBT is a kind of accelerated test, and it is possible to evaluate a change in transistor characteristics (aging) caused by long-term use in a short time. In particular, the fluctuation amount of the threshold voltage of the transistor before and after the BT stress test is an important index for examining the reliability. Before and after the BT stress test, it can be said that the smaller the fluctuation amount of the threshold voltage is, the higher the reliability of the transistor is.

Further, by having a gate electrode and a back gate electrode and setting both of them at the same potential, the amount of fluctuation of the threshold voltage is reduced. Therefore, the variation in electrical characteristics among the plurality of transistors is also reduced at the same time.

Further, when light is incident from the back gate electrode side, by forming the back gate electrode with a conductive film having a light-shielding property, it is possible to prevent light from being incident on the semiconductor layer from the back gate electrode side. Therefore, it is possible to prevent photodegradation of the semiconductor layer and prevent deterioration of electrical characteristics such as a shift of the threshold voltage of the transistor.

According to one aspect of the present invention, a transistor having good reliability can be realized. In addition, a semiconductor device with good reliability can be realized.

FIG. 15 (B1) shows a cross-sectional view of a channel protection type transistor 320, which is one of the bottom gate type transistors. The transistor 320 has almost the same structure as the transistor 310, except that the insulating layer 327 covers the semiconductor layer 324. Further, the semiconductor layer 324 and the electrode 344a are electrically connected to each other in the opening formed by selectively removing a part of the insulating layer 327 that overlaps with the semiconductor layer 324. Further, the semiconductor layer 324 and the electrode 344b are electrically connected to each other in another opening formed by selectively removing a part of the insulating layer 327 that overlaps with the semiconductor layer 324. The region of the insulating layer 327 that overlaps the channel forming region can function as a channel protection layer.

The transistor 321 shown in FIG. 15 (B2) is different from the transistor 320 in that it has an electrode 323 that can function as a back gate electrode on the insulating layer 329.

By providing the insulating layer 327, it is possible to prevent the semiconductor layer 324 from being exposed when the electrodes 344a and 344b are formed. Therefore, it is possible to prevent the semiconductor layer 324 from being thinned when the electrodes 344a and 344b are formed.

Further, the transistor 320 and the transistor 321 have a longer distance between the electrode 344a and the electrode 322 and a distance between the electrode 344b and the electrode 322 than the transistor 310 and the transistor 311. Therefore, the parasitic capacitance generated between the electrode 344a and the electrode 322 can be reduced. In addition, the parasitic capacitance generated between the electrode 344b and the electrode 322 can be reduced. According to one aspect of the present invention, a transistor having good electrical characteristics can be realized.

The transistor 325 shown in FIG. 15 (C1) is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 325 forms the electrode 344a and the electrode 344b without using the insulating layer 327. Therefore, a part of the semiconductor layer 324 exposed at the time of forming the electrode 344a and the electrode 344b may be etched. On the other hand, since the insulating layer 327 is not provided, the productivity of the transistor can be improved.

The transistor 325 shown in FIG. 15 (C2) is different from the transistor 320 in that it has an electrode 323 that can function as a back gate electrode on the insulating layer 329.

[Top gate type transistor]
FIG. 16 (A1) shows a cross-sectional view of a transistor 330, which is a type of top gate type transistor. The transistor 330 has a semiconductor layer 324 on the insulating layer 372, and has an electrode 344a in contact with a part of the semiconductor layer 324 and an electrode 344b in contact with a part of the semiconductor layer 324 on the semiconductor layer 324 and the insulating layer 372. It has an insulating layer 326 on the semiconductor layer 324, the electrode 344a, and the electrode 344b, and an electrode 322 on the insulating layer 326.

Since the electrode 322 and the electrode 344a and the electrode 322 and the electrode 344b do not overlap with each other, the transistor 330 reduces the parasitic capacitance generated between the electrode 322 and the electrode 344a and the parasitic capacitance generated between the electrode 322 and the electrode 344b. be able to. Further, by introducing the impurity 255 into the semiconductor layer 324 using the electrode 322 as a mask after forming the electrode 322, an impurity region can be formed in the semiconductor layer 324 in a self-alignment manner (self-alignment). See FIG. 16 (A3)). According to one aspect of the present invention, a transistor having good electrical characteristics can be realized.

The impurity 255 can be introduced using an ion implantation device, an ion doping device, or a plasma processing device.

As the impurity 255, for example, at least one kind of element among the group 13 element or the group 15 element can be used. When an oxide semiconductor is used for the semiconductor layer 324, at least one element of rare gas, hydrogen, and nitrogen can be used as the impurity 255.

The transistor 331 shown in FIG. 16A is different from the transistor 330 in that it has an electrode 323 and an insulating layer 227. The transistor 331 has an electrode 323 formed on the insulating layer 372, and has an insulating layer 227 formed on the electrode 323. The electrode 323 can function as a back gate electrode. Therefore, the insulating layer 227 can function as a gate insulating layer. The insulating layer 227 can be formed by the same material and method as the insulating layer 326.

Like the transistor 311 the transistor 331 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of the transistor 331 can be reduced with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be reduced. Therefore, according to one aspect of the present invention, a semiconductor device having a high degree of integration can be realized.

The transistor 340 illustrated in FIG. 16 (B1) is one of the top gate type transistors. The transistor 340 differs from the transistor 330 in that the semiconductor layer 324 is formed after the electrodes 344a and 344b are formed. Further, the transistor 341 illustrated in FIG. 16 (B2) is different from the transistor 340 in that it has an electrode 323 and an insulating layer 227. In the transistor 340 and the transistor 341, a part of the semiconductor layer 324 is formed on the electrode 344a, and the other part of the semiconductor layer 324 is formed on the electrode 344b.

Like the transistor 311 the transistor 341 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of the transistor 341 can be reduced with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be reduced. Therefore, according to one aspect of the present invention, a semiconductor device having a high degree of integration can be realized.

The transistor 342 illustrated in FIG. 17 (A1) is one of the top gate type transistors. The transistor 342 differs from the transistor 330 and the transistor 340 in that the electrode 344a and the electrode 344b are formed after the insulating layer 329 is formed. The electrodes 344a and 344b are electrically connected to the semiconductor layer 324 at the openings formed in the insulating layer 328 and the insulating layer 329.

Further, by removing a part of the insulating layer 326 that does not overlap with the electrode 322 and introducing the impurity 255 into the semiconductor layer 324 using the electrode 322 and the remaining insulating layer 326 as a mask, self-alignment (self-alignment) in the semiconductor layer 324 ( Impurity regions can be formed in a self-aligned manner (see FIG. 17 (A3)). The transistor 342 has a region in which the insulating layer 326 extends beyond the end of the electrode 322. When the impurities 255 are introduced into the semiconductor layer 324, the impurity concentration in the region where the impurities 255 are introduced through the insulating layer 326 of the semiconductor layer 324 is higher than that in the region where the impurities 255 are introduced without passing through the insulating layer 326. It becomes smaller. Therefore, in the semiconductor layer 324, an LDD (Lightly Doped Drain) region is formed in a region that does not overlap with the electrode 322.

The transistor 343 shown in FIG. 17 (A2) is different from the transistor 342 in that it has an electrode 323. The transistor 343 has an electrode 323 formed on the substrate 371 and overlaps with the semiconductor layer 324 via an insulating layer 372. The electrode 323 can function as a back gate electrode.

Further, as in the transistor 344 shown in FIG. 17 (B1) and the transistor 345 shown in FIG. 17 (B2), the insulating layer 326 in the region that does not overlap with the electrode 322 may be completely removed. Further, the insulating layer 326 may be left as shown in the transistor 346 shown in FIG. 17 (C1) and the transistor 347 shown in FIG. 17 (C2).

Transistors 342 to 347 can also form an impurity region in the semiconductor layer 324 in a self-aligned manner by introducing the impurity 255 into the semiconductor layer 324 using the electrode 322 as a mask after forming the electrode 322. .. According to one aspect of the present invention, a transistor having good electrical characteristics can be realized. Further, according to one aspect of the present invention, a semiconductor device having a high degree of integration can be realized.

Next, an example of a transistor structure preferably used for an OS transistor will be described.

<Transistor configuration example 2>
[Configuration Example 1]
First, as an example of the structure of the transistor, the transistor 500a will be described with reference to FIGS. 18A, 18B, and 18C. FIG. 18A is a top view of the transistor 500a. FIG. 18B corresponds to a cross-sectional view of the cut surface at the alternate long and short dash line X1-X2 shown in FIG. 18A, and FIG. 18C corresponds to the sectional view at the alternate long and short dash line Y1-Y2 shown in FIG. 18A. Corresponds to a cross-sectional view of the surface. In order to make the drawings easier to understand, FIG. 18A omits some of the components of the transistor 500a (an insulating layer having a function as a gate insulating layer, etc.). In the following, the alternate long and short dash line X1-X2 direction may be referred to as the channel length direction, and the alternate long and short dash line Y1-Y2 direction may be referred to as the channel width direction. In the top view of the transistor, in the subsequent drawings, as in FIG. 18A, some of the components may be omitted.

The transistor 500a includes a conductive layer 521 on the insulating layer 524, an insulating layer 511 on the insulating layer 524 and the conductive layer 521, a semiconductor layer 531 on the insulating layer 511, and conductivity on the semiconductor layer 531 and the insulating layer 511. The layers 522a, the conductive layer 522b on the semiconductor layer 531 and the insulating layer 511, the insulating layer 512 on the semiconductor layer 531, the conductive layer 522a, and the conductive layer 522b, and the conductive layer 523 on the insulating layer 512. Has.

The insulating layer 524 may be a substrate. When the insulating layer 524 is used as a substrate, the substrate can be a substrate containing the same material as the substrate 371 shown in the first embodiment.

Further, as the conductive layer 521 and the conductive layer 523, for example, the same material as the electrode 322 shown in the above embodiment can be included. As the insulating layer 511, for example, the same material as the insulating layer 326 shown in the above embodiment can be included. As the conductive layer 522a and the conductive layer 522b, for example, the same materials as the electrodes 344a and 344b shown in the above embodiment can be included. As the insulating layer 512, the same material as the insulating layer 328 shown in the above embodiment can be included.

Further, the semiconductor layer 531 can include, for example, the same material as the semiconductor layer 324 shown in the above embodiment. In the present embodiment, the semiconductor layer 531 will be described as a semiconductor layer containing a metal oxide.

The insulating layer 511 and the insulating layer 512 have an opening 535. The conductive layer 523 is electrically connected to the conductive layer 521 via the opening 535.

Here, the insulating layer 511 has a function as a first gate insulating layer of the transistor 500a, and the insulating layer 512 has a function as a second gate insulating layer of the transistor 500a. Further, in the transistor 500a, the conductive layer 521 has a function as a first gate, the conductive layer 522a has a function as one of a source or a drain, and the conductive layer 522b has a function as the other of the source or the drain. Has the function of. Further, in the transistor 500a, the conductive layer 523 has a function as a second gate.

The transistor 500a is a so-called channel etch type transistor and has a dual gate structure.

Further, the transistor 500a may be configured not to be provided with the conductive layer 523. In this case, the transistor 500a is a so-called channel etch type transistor and has a bottom gate structure.

As shown in FIGS. 18B and 18C, the semiconductor layer 531 is located so as to face the conductive layer 521 and the conductive layer 523, and is sandwiched between the conductive layers having the functions of two gates. The length of the conductive layer 523 in the channel length direction and the length of the conductive layer 523 in the channel width direction are longer than the length of the semiconductor layer 531 in the channel length direction and the length of the semiconductor layer 531 in the channel width direction, respectively. The entire semiconductor layer 531 is covered with the conductive layer 523 via the insulating layer 512.

In other words, the conductive layer 521 and the conductive layer 523 have a region connected at the opening 535 provided in the insulating layer 511 and the insulating layer 512 and located outside the side end portion of the semiconductor layer 531.

With such a configuration, the semiconductor layer 531 included in the transistor 500a can be electrically surrounded by the electric fields of the conductive layer 521 and the conductive layer 523. The device structure of a transistor that electrically surrounds a semiconductor layer in which a channel formation region is formed by the electric fields of the first gate and the second gate, such as the transistor 500a, is called a surroundd channel (s-channel) structure. Can be done.

Since the transistor 500a has an s-channel structure, an electric field for inducing a channel by the conductive layer 521 having the function of the first gate can be effectively applied to the semiconductor layer 531. Therefore, the current of the transistor 500a The drive capacity is improved, and it becomes possible to obtain high on-current characteristics. Further, since the on-current can be increased, the transistor 500a can be miniaturized.

Further, since the transistor 500a has a structure in which the semiconductor layer 531 is surrounded by the conductive layer 521 having the function of the first gate and the conductive layer 523 having the function of the second gate, the mechanical strength of the transistor 500a is increased. Can be enhanced.

Since the transistor 500a having an s-channel structure has high field effect mobility and high drive capability, by using the transistor 500a in a drive circuit, typically a scanning line drive circuit, the frame width is narrow (also a narrow frame). A display device can be provided.

[Configuration Example 2]
Next, as an example of the transistor structure, the transistor 500b will be described with reference to FIGS. 19A, 19B, and 19C. FIG. 19A is a top view of the transistor 500b. 19 (B) corresponds to a cross-sectional view of the cut surface at the alternate long and short dash line X1-X2 shown in FIG. 19 (A), and FIG. 19 (C) shows the cut along the alternate long and short dash line Y1-Y2 shown in FIG. 19 (A). Corresponds to a cross-sectional view of the surface.

The transistor 500b is different from the transistor 500a in that the semiconductor layer 531, the conductive layer 522a, the conductive layer 522b, and the insulating layer 512 have a laminated structure.

The insulating layer 512 has an insulating layer 512a on the semiconductor layer 531, a conductive layer 522a, and a conductive layer 522b, and an insulating layer 512b on the insulating layer 512a. The insulating layer 512 has a function of supplying oxygen to the semiconductor layer 531. That is, the insulating layer 512 has oxygen. Further, the insulating layer 512a is an insulating layer capable of allowing oxygen to permeate. The insulating layer 512a also functions as a damage mitigating film for the semiconductor layer 531 when the insulating layer 512b to be formed later is formed.

As the insulating layer 512a, silicon oxide, silicon oxide nitride, or the like having a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less can be used.

Further, the insulating layer 512a preferably has a small amount of defects, and typically, the spin density of the signal appearing at g = 2.001 derived from the dangling bond of silicon is 3 × 10 ¹⁷ spins / by ESR measurement. It is preferably cm ^{3 or less.} This is because if the defect density contained in the insulating layer 512a is high, oxygen is bonded to the defects and the permeability of oxygen in the insulating layer 512a is reduced.

In the insulating layer 512a, some oxygen that has entered the insulating layer 512a from the outside does not move to the outside of the insulating layer 512a and remains in the insulating layer 512a. Further, when oxygen enters the insulating layer 512a and oxygen contained in the insulating layer 512a moves to the outside of the insulating layer 512a, oxygen may move in the insulating layer 512a. When an oxide insulating layer capable of transmitting oxygen is formed as the insulating layer 512a, oxygen desorbed from the insulating layer 512b provided on the insulating layer 512a is moved to the semiconductor layer 531 via the insulating layer 512a. Can be done.

Further, the insulating layer 512a can be formed by using an oxide insulating layer having a low level density due to nitrogen oxides. The level density due to the nitrogen oxide may be formed between the energy at the upper end of the valence band of the metal oxide and the energy at the lower end of the conduction band of the metal oxide. As the oxide insulating layer, a silicon oxynitride film having a small amount of nitrogen oxides released, an aluminum nitride film having a small amount of nitrogen oxides released, or the like can be used.

A silicon oxynitride film having a small amount of nitrogen oxides released is a representative film in which the amount of ammonia released is larger than the amount of nitrogen oxides released in the thermal desorption gas analysis method (TDS). The amount of ammonia released is 1 × 10 ¹⁸ / cm ³ or more and 5 × 10 ¹⁹ / cm ³ or less. The amount of ammonia released is the amount released by heat treatment at which the surface temperature of the film is 50 ° C. or higher and 650 ° C. or lower, preferably 50 ° C. or higher and 550 ° C. or lower.

Nitrogen oxides (NO _x , x are greater than 0 and 2 or less, preferably 1 or more and 2 or less), typically NO ₂ or NO, form a level on the insulating layer 512a or the like. The level is located within the energy gap of the semiconductor layer 531. Therefore, when nitrogen oxides diffuse to the interface between the insulating layer 512a and the semiconductor layer 531, the level may trap electrons on the insulating layer 512a side. As a result, the trapped electrons stay in the vicinity of the interface between the insulating layer 512a and the semiconductor layer 531, so that the threshold voltage of the transistor is shifted in the positive direction.

Nitrogen oxides also react with ammonia and oxygen in the heat treatment. Since the nitrogen oxides contained in the insulating layer 512a react with the ammonia contained in the insulating layer 512b in the heat treatment, the nitrogen oxides contained in the insulating layer 512a are reduced. Therefore, electrons are less likely to be trapped at the interface between the insulating layer 512a and the semiconductor layer 531.

By using the oxide insulating layer as the insulating layer 512a, it is possible to reduce the shift of the threshold voltage of the transistor, and it is possible to reduce the fluctuation of the electrical characteristics of the transistor.

Further, the oxide insulating layer has a nitrogen concentration of 6 × 10 ²⁰ atoms / cm ³ or less as measured by SIMS.

The substrate temperature is 220 ° C. or higher and 350 ° C. or lower, and the oxide insulating layer is formed by using the PECVD method using silane and nitrous oxide to form a dense and hard film. be able to.

The insulating layer 512b is an oxide insulating layer containing more oxygen than oxygen satisfying the stoichiometric composition. A part of oxygen is desorbed from the above oxide insulating layer by heating. In TDS, the oxide insulating layer has a region in which the ^{amount of oxygen released is 1.0 × 10 19} atoms / cm ³ or more, preferably 3.0 × 10 ²⁰ atoms / cm ^{3 or more.} The amount of oxygen released is the total amount in the range where the temperature of the heat treatment in TDS is 50 ° C. or higher and 650 ° C. or lower, or 50 ° C. or higher and 550 ° C. or lower. The amount of oxygen released is the total amount converted into oxygen atoms in TDS.

As the insulating layer 512b, silicon oxide, silicon oxide nitride, or the like having a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or less can be used.

Further, the insulating layer 512b preferably has a small amount of defects, and typically, the spin density of the signal appearing at g = 2.001 derived from the dangling bond of silicon is 1.5 × 10 ^{18 by ESR measurement.} It is preferably less than spins / cm ³ and more preferably 1 × 10 ¹⁸ spins / cm ^{3 or less.} Since the insulating layer 512b is separated from the semiconductor layer 531 as compared with the insulating layer 512a, the defect density may be higher than that of the insulating layer 512a.

Further, since the insulating layer 512 can use an insulating layer made of the same material, the interface between the insulating layer 512a and the insulating layer 512b may not be clearly confirmed. Therefore, in the present embodiment, the interface between the insulating layer 512a and the insulating layer 512b is shown by a broken line. In the present embodiment, the two-layer structure of the insulating layer 512a and the insulating layer 512b has been described, but the present invention is not limited to this, and for example, a single-layer structure of the insulating layer 512a or a laminated structure of three or more layers may be used. good.

In the transistor 500b, the semiconductor layer 531 has a semiconductor layer 531_1 on the insulating layer 511 and a semiconductor layer 531_2 on the semiconductor layer 531_1. The semiconductor layer 531_1 and the semiconductor layer 531_2 each have the same element. For example, it is preferable that the semiconductor layer 531_1 and the semiconductor layer 531_2 independently have the elements of the above-mentioned semiconductor layer 531.

Further, it is preferable that the semiconductor layer 531_1 and the semiconductor layer 531_2 each independently have a region in which the atomic number ratio of In is larger than the atomic number ratio of M. As an example, it is preferable that the ratio of the number of atoms of In, M, and Zn of the semiconductor layer 531_1 and the semiconductor layer 531_2 is in the vicinity of In: M: Zn = 4: 2: 3. Here, the neighborhood includes, when In is 4, M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less. Alternatively, it is preferable that the ratio of the number of atoms of In, M, and Zn of the semiconductor layer 531_1 and the semiconductor layer 531_2 is in the vicinity of In: M: Zn = 5: 1: 6. As described above, by making the semiconductor layer 531_1 and the semiconductor layer 531_2 substantially the same composition, they can be formed by using the same sputtering target, so that the manufacturing cost can be suppressed. Further, when the same sputtering target is used, the semiconductor layer 531_1 and the semiconductor layer 531_2 can be continuously formed in the same chamber in a vacuum, so that impurities are incorporated into the interface between the semiconductor layer 531_1 and the semiconductor layer 531_2. Can be suppressed.

Here, the semiconductor layer 531_1 may have a region having a lower crystallinity than the semiconductor layer 531_2. The crystallinity of the semiconductor layer 531_1 and the semiconductor layer 531_2 is, for example, analyzed by using X-ray diffraction (XRD: X-Ray Diffraction) or by using a transmission electron microscope (TEM). It can be analyzed by analyzing.

The region of the semiconductor layer 531_1 having low crystallinity serves as a diffusion path for excess oxygen, and excess oxygen can also be diffused into the semiconductor layer 531_2 having higher crystallinity than the semiconductor layer 531_1. As described above, a highly reliable transistor can be provided by forming a laminated structure of semiconductor layers having different crystal structures and using a region having low crystallinity as a diffusion path for excess oxygen.

Further, since the semiconductor layer 531_2 has a region having a higher crystallinity than the semiconductor layer 531_1, impurities that may be mixed in the semiconductor layer 531 can be suppressed. In particular, by increasing the crystallinity of the semiconductor layer 531_2, it is possible to suppress damage when the conductive layer 522a and the conductive layer 522b are processed. The surface of the semiconductor layer 531, that is, the surface of the semiconductor layer 531_2, is exposed to an etchant or etching gas during processing of the conductive layer 522a and the conductive layer 522b. However, when the semiconductor layer 531_2 has a region having high crystallinity, it is superior in etching resistance as compared with the semiconductor layer 531_1 having low crystallinity. Therefore, the semiconductor layer 531_2 has a function as an etching stopper.

Further, the semiconductor layer 531_1 may have a higher carrier density because it has a region having a lower crystallinity than the semiconductor layer 531_2.

Further, when the carrier density of the semiconductor layer 531_1 is high, the Fermi level may be relatively high with respect to the conduction band of the semiconductor layer 531_1. As a result, the lower end of the conduction band of the semiconductor layer 531_1 becomes lower, and the energy difference between the lower end of the conduction band of the semiconductor layer 531_1 and the trap level that can be formed in the gate insulating layer (here, the insulating layer 511) becomes large. In some cases. By increasing the energy difference, the charge trapped in the gate insulating layer is reduced, and the fluctuation of the threshold voltage of the transistor may be reduced. Further, when the carrier density of the semiconductor layer 531_1 is increased, the electric field effect mobility of the semiconductor layer 531 can be increased.

In the transistor 500b, an example in which the semiconductor layer 531 has a laminated structure of two layers has been shown, but the present invention is not limited to this, and a configuration in which three or more layers are laminated may be used.

The conductive layer 522a included in the transistor 500b has a conductive layer 522a_1, a conductive layer 522a_2 on the conductive layer 522a_1, and a conductive layer 522a_3 on the conductive layer 522a_2. Further, the conductive layer 522b included in the transistor 500b has a conductive layer 522b_1, a conductive layer 522b_2 on the conductive layer 522b_1, and a conductive layer 522b_3 on the conductive layer 522b_2.

For example, the conductive layer 522a_1, the conductive layer 522b_1, the conductive layer 522a_3, and the conductive layer 522b_3 have one or more selected from titanium, tungsten, tantalum, molybdenum, indium, gallium, tin, and zinc. Is preferable. Further, as the conductive layer 522a_2 and the conductive layer 522b_2, it is preferable to have any one or more selected from copper, aluminum, and silver.

More specifically, In-Sn oxide or In-Zn oxide may be used for the conductive layer 522a_1, the conductive layer 522b_1, the conductive layer 522a_3, and the conductive layer 522b_3, and copper may be used for the conductive layer 522a_2 and the conductive layer 522b_2. can.

Further, the end portion of the conductive layer 522a_1 has a region located outside the end portion of the conductive layer 522a_2, and the conductive layer 522a_3 covers the upper surface and the side surface of the conductive layer 522a_2 and has a region in contact with the conductive layer 522a_1. Have. Further, the end portion of the conductive layer 522b_1 has a region located outside the end portion of the conductive layer 522b_2, and the conductive layer 522b_3 covers the upper surface and the side surface of the conductive layer 522b_2 and has a region in contact with the conductive layer 522b_1. Have.

The above configuration is preferable because the wiring resistance of the conductive layer 522a and the conductive layer 522b can be lowered and the diffusion of copper into the semiconductor layer 531 can be suppressed.

[Configuration Example 3]
Next, as an example of the transistor structure, the transistor 500c will be described with reference to FIGS. 20A, 20B, and 20C. FIG. 20A is a top view of the transistor 500c. 20 (B) corresponds to a cross-sectional view of the cut surface at the alternate long and short dash line X1-X2 shown in FIG. 20 (A), and FIG. 20 (C) shows the cut along the alternate long and short dash line Y1-Y2 shown in FIG. 20 (A). Corresponds to a cross-sectional view of the surface.

The transistor 500c is formed by insulating the conductive layer 521 on the insulating layer 524, the insulating layer 511 on the conductive layer 521 and the insulating layer 524, the semiconductor layer 531 on the insulating layer 511, and the semiconductor layer 531 and the insulating layer 511. Layer 516, conductive layer 522a on semiconductor layer 531 and insulating layer 516, conductive layer 522b on semiconductor layer 531 and insulating layer 516, insulating layer on insulating layer 516, conductive layer 522a, and conductive layer 522b. It has a 512 and a conductive layer 523 on the insulating layer 512.

The insulating layer 511, the insulating layer 516, and the insulating layer 512 have an opening 535. The conductive layer 521 that functions as the first gate of the transistor 500c is electrically connected to the conductive layer 523 that functions as the second gate of the transistor 500c via the opening 535. Further, the insulating layer 516 has an opening 538a and an opening 538b. The conductive layer 522a, which functions as one of the source and drain of the transistor 500c, is electrically connected to the semiconductor layer 531 via the opening 538a. The conductive layer 522b, which functions as the source or drain of the transistor 500c, is electrically connected to the semiconductor layer 531 via the opening 538b.

The insulating layer 516 has a function as a channel protection layer of the transistor 500c. If the insulating layer 516 is not provided, the channel forming region of the semiconductor layer 531 may be damaged when the conductive layer 522a and the conductive layer 522b are formed by an etching method or the like. As a result, the electrical characteristics of the transistor may become unstable. A semiconductor is formed by forming an insulating layer 516, providing an opening 538a and an opening 538b, then forming a conductive layer, and processing the conductive layer by an etching method or the like to form a conductive layer 522a and a conductive layer 522b. Damage to the channel forming region of layer 531 can be suppressed. As a result, the electrical characteristics of the transistor can be stabilized and a highly reliable transistor can be realized.

The insulating layer 516 can contain, for example, the same material as the insulating layer 512.

The insulating layer 516 preferably has an excess oxygen region. When the insulating layer 516 has an excess oxygen region, oxygen can be supplied to the channel forming region of the semiconductor layer 531. Therefore, since the oxygen deficiency formed in the channel forming region can be compensated by excess oxygen, a highly reliable display device can be provided.

Further, it is preferable to add an impurity element to the semiconductor layer 531 after the opening 538a and the opening 538b are formed. Specifically, it is preferable to add an element that forms an oxygen deficiency or an element that binds to an oxygen deficiency. As a result, as will be described in detail later, the conductivity of the region of the semiconductor layer 531 that overlaps the conductive layer 522a (one of the source region or the drain region) and the region that overlaps the conductive layer 522b (the other of the source region or the drain region) is determined. Can be high. As a result, the current drive capability of the transistor 500c is improved, and high on-current characteristics can be obtained.

The transistor 500c is a so-called channel protection type transistor and has a dual gate structure.

The transistor 500c has an s-channel structure similar to the transistor 500a and the transistor 500b. With such a configuration, the semiconductor layer 531 included in the transistor 500c can be electrically surrounded by the electric fields of the conductive layer 521 and the conductive layer 523.

Since the transistor 500c has an s-channel structure, an electric field for inducing a channel by the conductive layer 521 or the conductive layer 523 can be effectively applied to the semiconductor layer 531. As a result, the current drive capability of the transistor 500f is improved, and high on-current characteristics can be obtained. Further, since the on-current can be increased, the transistor 500c can be miniaturized. Further, since the transistor 500c has a structure in which the semiconductor layer 531 is surrounded by the conductive layer 521 and the conductive layer 523, the mechanical strength of the transistor 500f can be increased.

The transistor 500c may not be provided with the conductive layer 523. In this case, the transistor 500c is a so-called channel protection type transistor and has a bottom gate structure.

[Configuration Example 4]
Next, an example of the transistor structure will be described with reference to FIGS. 21 (A), (B), (C), and (D).

21 (A) and 21 (B) are cross-sectional views of the transistor 500d, and FIGS. 21 (C) and 21 (D) are cross-sectional views of the transistor 500e. The transistor 500d is a modification of the transistor 500b shown above, and the transistor 500e is a modification of the transistor 500c shown above. Therefore, in FIGS. 21 (A), (B), (C), and (D), the portions having the same functions as the transistor 500b and the transistor 500c are designated by the same reference numerals, and detailed description thereof will be omitted.

21 (A) is a cross-sectional view of the transistor 500d in the channel length direction, and FIG. 21 (B) is a cross-sectional view of the transistor 500d in the channel width direction. 21 (C) is a cross-sectional view of the transistor 500e in the channel length direction, and FIG. 21 (D) is a cross-sectional view of the transistor 500e in the channel width direction.

The transistor 500d shown in FIGS. 21A and 21B is not provided with the conductive layer 523 and the opening 535 as compared with the transistor 500b. Further, the transistor 500d has different configurations of the insulating layer 512, the conductive layer 522a, and the conductive layer 522b as compared with the transistor 500b.

In the transistor 500d, the insulating layer 512 has an insulating layer 512c and an insulating layer 512d on the insulating layer 512c. The insulating layer 512c has a function of supplying oxygen to the semiconductor layer 531 and a function of suppressing the entry of impurities (typically, water, hydrogen, etc.). As the insulating layer 512c, an aluminum oxide film, an aluminum nitride film, or an aluminum nitride film can be used. In particular, the insulating layer 512c is preferably an aluminum oxide film formed by a reactive sputtering method. As an example of the method of forming the aluminum oxide film by the reactive sputtering method, the following methods can be mentioned.

First, a gas in which an inert gas (typically Ar gas) and an oxygen gas are mixed is introduced into the sputtering chamber. Subsequently, a voltage is applied to the aluminum target arranged in the sputtering chamber to form an aluminum oxide film. Examples of the power supply that applies a voltage to the aluminum target include a DC power supply, an AC power supply, and an RF power supply. In particular, it is preferable to use a DC power supply because the productivity is improved.

The insulating layer 512d has a function of suppressing the entry of impurities (typically water, hydrogen, etc.). As the insulating layer 512d, a silicon nitride film, a silicon nitride film, or a silicon nitride film can be used. In particular, as the insulating layer 512d, a silicon nitride film formed by the PECVD method is preferable. A silicon nitride film formed by the PECVD method is preferable because a high film density can be easily obtained. The silicon nitride film formed by the PECVD method may have a high hydrogen concentration in the film.

In the transistor 500d, since the insulating layer 512c is arranged under the insulating layer 512d, the hydrogen contained in the insulating layer 512d does not diffuse to the semiconductor layer 531 side or is difficult to diffuse.

The transistor 500d is a single-gate transistor unlike the transistor 500b. By using a single-gate transistor, the number of masks can be reduced, so that productivity can be improved.

The transistors 500e shown in FIGS. 21C and 21D have different configurations of the insulating layer 516 and the insulating layer 512 as compared with the transistor 500c. Specifically, the transistor 500e has an insulating layer 516a instead of the insulating layer 516, and has an insulating layer 512d instead of the insulating layer 512.

The insulating layer 516a has the same function as the insulating layer 512c.

By adopting the structure of the transistor 500d and the transistor 500e, it is possible to manufacture using the existing production line without making a large capital investment. For example, a hydrogenated amorphous silicon manufacturing factory can be easily replaced with an oxide semiconductor manufacturing factory.

[Structure Example 5]
Next, as an example of the structure of the transistor, the transistor 500f will be described with reference to FIGS. 22A, 22B, and 22C. FIG. 22A is a top view of the transistor 500f. 22 (B) corresponds to a cross-sectional view of the cut surface at the alternate long and short dash line X1-X2 shown in FIG. 22 (A), and FIG. 22 (C) shows the cut along the alternate long and short dash line Y1-Y2 shown in FIG. 22 (A). Corresponds to a cross-sectional view of the surface.

The transistors 500f shown in FIGS. 22 (A), 22 (B), and (C) are semiconductors on the conductive layer 521 on the insulating layer 524, the insulating layer 511 on the conductive layer 521 and the insulating layer 524, and the semiconductor on the insulating layer 511. It has a layer 531, an insulating layer 512 on the semiconductor layer 531, a conductive layer 523 on the insulating layer 512, and an insulating layer 515 on the insulating layer 511, the semiconductor layer 531, and the conductive layer 523. The semiconductor layer 531 has a channel forming region 531i overlapping the conductive layer 523, a source region 531s in contact with the insulating layer 515, and a drain region 531d in contact with the insulating layer 515.

Further, the insulating layer 515 has nitrogen or hydrogen. When the insulating layer 515 is in contact with the source region 531s and the drain region 531d, nitrogen or hydrogen in the insulating layer 515 is added to the source region 531s and the drain region 531d. The carrier density of the source region 531s and the drain region 531d is increased by adding nitrogen or hydrogen.

Further, the transistor 500f may have a conductive layer 522a that is electrically connected to the source region 531s via an opening 536a provided in the insulating layer 515. Further, the transistor 500f may have a conductive layer 522b that is electrically connected to the drain region 531d via an opening 536b provided in the insulating layer 515.

The insulating layer 511 has a function as a first gate insulating layer, and the insulating layer 512 has a function as a second gate insulating layer. Further, the insulating layer 515 has a function as a protective insulating layer.

Further, the insulating layer 512 has an excess oxygen region. Since the insulating layer 512 has an excess oxygen region, excess oxygen can be supplied into the channel formation region 531i of the semiconductor layer 531. Therefore, the oxygen deficiency that can be formed in the channel forming region 531i can be compensated by excess oxygen, so that a highly reliable display device can be provided.

In order to supply excess oxygen into the semiconductor layer 531, excess oxygen may be supplied to the insulating layer 511 formed below the semiconductor layer 531. In this case, the excess oxygen contained in the insulating layer 511 can also be supplied to the source region 531s and the drain region 531d of the semiconductor layer 531. When excess oxygen is supplied into the source region 531s and the drain region 531d, the resistance of the source region 531s and the drain region 531d may increase.

On the other hand, by configuring the insulating layer 512 formed above the semiconductor layer 531 to have excess oxygen, it is possible to selectively supply excess oxygen only to the channel formation region 531i. Alternatively, after supplying excess oxygen to the channel forming region 531i, the source region 531s, and the drain region 531d, the carrier densities of the source region 531s and the drain region 531d are selectively increased to cause the source region 531s and the drain region 531d. It is possible to prevent the resistance from increasing.

Further, it is preferable that the source region 531s and the drain region 531d of the semiconductor layer 531 each have an element that forms an oxygen deficiency or an element that binds to the oxygen deficiency. Typical examples of the element that forms the oxygen deficiency or the element that binds to the oxygen deficiency include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and noble gas. Typical examples of noble gas elements include helium, neon, argon, krypton, xenon and the like. When one or more elements forming oxygen deficiency are contained in the insulating layer 515, the elements diffuse from the insulating layer 515 into the source region 531s and the drain region 531d, and / or the source region 531s and / or the impurity addition treatment are used. It is added into the drain region 531d.

When an impurity element is added to a metal oxide, the bond between the metal element and oxygen in the metal oxide is broken, and an oxygen deficiency is formed. Alternatively, when an impurity element is added to the metal oxide, oxygen bonded to the metal element in the metal oxide is combined with the impurity element, oxygen is desorbed from the metal element, and an oxygen deficiency is formed. As a result, the carrier density of the metal oxide is increased and the conductivity is increased.

Further, the conductive layer 521 has a function as a first gate, the conductive layer 523 has a function as a second gate, the conductive layer 522a has a function as a source, and the conductive layer 522b. Has a function as a drain.

Further, as shown in FIG. 22C, the insulating layer 511 and the insulating layer 512 are provided with an opening 537. Further, the conductive layer 521 is electrically connected to the conductive layer 523 via the opening 537. Therefore, the same potential is applied to the conductive layer 521 and the conductive layer 523. It should be noted that different potentials may be applied to the conductive layer 521 and the conductive layer 523 without providing the opening 537. Alternatively, the conductive layer 521 may be used as a light-shielding film without providing the opening 537. For example, by forming the conductive layer 521 with a light-shielding material, it is possible to suppress the light from below that irradiates the channel forming region 531i.

Further, as shown in FIGS. 22 (B) and 22 (C), the semiconductor layer 531 is a conductive layer 521 having a function as a first gate and a conductive layer 523 having a function as a second gate. It is located so as to face each other and is sandwiched between two conductive layers having a function as a gate.

Further, the transistor 500f also has an s-channel structure like the transistor 500a, the transistor 500b, and the transistor 500c. With such a configuration, the semiconductor layer 531 included in the transistor 500f is electrically driven by the electric fields of the conductive layer 521 having a function as a first gate and the conductive layer 523 having a function as a second gate. Can surround.

Since the transistor 500f has an s-channel structure, an electric field for inducing a channel by the conductive layer 521 or the conductive layer 523 can be effectively applied to the semiconductor layer 531. As a result, the current drive capability of the transistor 500f is improved, and high on-current characteristics can be obtained. Further, since the on-current can be increased, the transistor 500f can be miniaturized. Further, since the transistor 500f has a structure in which the semiconductor layer 531 is surrounded by the conductive layer 521 and the conductive layer 523, the mechanical strength of the transistor 500f can be increased.

The transistor 500f may be referred to as a TGSA (Top Gate Self Align) type FET depending on the position of the conductive layer 523 with respect to the semiconductor layer 531 or the method of forming the conductive layer 523.

The transistor 500f may also have a configuration in which two or more semiconductor layers 531 are laminated in the same manner as the transistor 500b.

Further, in the transistor 500f, the insulating layer 512 is provided only in the portion overlapping the conductive layer 523, but the present invention is not limited to this, and the insulating layer 512 may be configured to cover the semiconductor layer 531. Further, the conductive layer 521 may not be provided.

Further, an aluminum oxide layer may be provided between the insulating layer 512 and the conductive layer 523. By providing the aluminum oxide layer, excess oxygen contained in the insulating layer 512 can be prevented from diffusing toward the conductive layer 523.

Further, it is preferable that at least the region of the conductive layer 523 in contact with the insulating layer 512 is made of a material in which oxygen does not easily diffuse. Examples of such a material include aluminum and molybdenum. For example, the conductive layer 523 may have a two-layer laminated structure in which aluminum is provided on the insulating layer 512 side and titanium is provided on the aluminum. Further, the conductive layer 523 may have a three-layer laminated structure in which molybdenum is provided on the insulating layer 512 side and aluminum and titanium are provided on the molybdenum.

This embodiment can be implemented in combination with at least a part thereof as appropriate with other embodiments described in the present specification.

(Embodiment 5)
In the present embodiment, an electronic device to which the display system of one aspect of the present invention can be applied will be described with reference to FIGS. 23 to 24.

An example of an electronic device will be described with reference to FIGS. 23 and 24. According to one aspect of the present invention, good display quality and high visibility can be realized even in a display device having a large size and / or a high definition. Therefore, it can be suitably used for television devices, digital signage, portable electronic devices, wearable electronic devices (wearable devices), electronic book terminals, and the like. It can also be used for VR (Virtual Reality) equipment, AR (Augmented Reality) equipment, and the like.

The electronic device using the display system of one aspect of the present invention may have a secondary battery, and it is preferable that the secondary battery can be charged by using non-contact power transmission.

Examples of the secondary battery include a lithium ion secondary battery such as a lithium polymer battery (lithium ion polymer battery) using a gel-like electrolyte, a nickel hydrogen battery, a nicad battery, an organic radical battery, a lead storage battery, an air secondary battery, and nickel. Examples include zinc batteries and silver-zinc batteries.

An electronic device using the display system of one aspect of the present invention may have an antenna. By receiving the signal with the antenna, the display unit can display images, information, and the like. Further, when the electronic device has an antenna and a secondary battery, the antenna may be used for non-contact power transmission.

The electronic device using the display system of one aspect of the present invention includes sensors (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness). , Which includes the ability to measure electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays).

An electronic device using the display system of one aspect of the present invention can have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, a function to execute various software (programs), wireless communication. It can have a function, a function of reading a program or data recorded on a recording medium, and the like.

By using the display system of one aspect of the present invention, the display quality of electronic devices can be improved.

Further, in an electronic device having a plurality of display units, a function of displaying image information mainly on one display unit and mainly displaying character information on another display unit, or parallax is considered on the plurality of display units. By displaying an image, it is possible to have a function of displaying a three-dimensional image or the like. Further, in an electronic device having an image receiving unit, a function of shooting a still image or a moving image, a function of automatically or manually correcting the shot image, and a function of saving the shot image in a recording medium (external or built in the electronic device). , It is possible to have a function of displaying the captured image on the display unit and the like. The functions of the electronic device of one aspect of the present invention are not limited to these, and can have various functions.

FIG. 23A shows a television device 1810 using the display system of one aspect of the present invention. The television device 1810 includes a display unit 1811, a housing 1812, a speaker 1813, and the like. Further, it may have an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

Further, the television device 1810 can be operated by the remote controller operating device 1814.

Examples of broadcast radio waves that can be received by the television device 1810 include terrestrial waves and radio waves transmitted from satellites. Further, as broadcast radio waves, there are analog broadcasting, digital broadcasting, etc., and there are also video and audio broadcasting, or audio-only broadcasting. For example, it is possible to receive broadcast radio waves transmitted in a specific frequency band within the UHF band (about 300 MHz to 3 GHz) or the VHF band (30 MHz to 300 MHz). Further, for example, by using a plurality of data received in a plurality of frequency bands, the transfer rate can be increased and more information can be obtained. As a result, an image having a resolution exceeding full high-definition can be displayed on the display unit 1831. For example, it is possible to display an image having a resolution of 4K, 8K, 16K, or higher.

In addition, a configuration that generates an image to be displayed on the display unit 1831 using broadcast data transmitted by data transmission technology via a computer network such as the Internet, LAN (Local Area Network), or Wi-Fi (registered trademark). May be. At this time, the television device 1810 does not have to have a tuner.

FIG. 23B shows a digital signage 1820 using the display system of one aspect of the present invention. The digital signage 1820 is attached to a columnar pillar 1822. The digital signage 1820 has a display unit 1821.

The wider the display unit 1821, the more information can be provided at one time. Further, the wider the display unit 1821, the easier it is to be noticed by people, and for example, the advertising effect of the advertisement can be enhanced.

It is preferable to use a touch panel for the display unit 1821 because not only the image or moving image can be displayed on the display unit 1821 but also the user can intuitively operate the display unit 1821. Further, when it is used for providing information such as route information or traffic information, usability can be improved by intuitive operation.

FIG. 23C shows a notebook personal computer 1830 using the display system of one aspect of the present invention. The personal computer 1830 has a display unit 1831, a housing 1832, a touch pad 1833, a connection port 1834, and the like.

The touch pad 1833 functions as an input means for a pointing device, a pen tablet, or the like, and can be operated with a finger, a stylus, or the like.

Further, a display element is incorporated in the touch pad 1833. As shown in FIG. 23C, by displaying the input key 1835 on the surface of the touchpad 1833, the touchpad 1833 can be used as a keyboard. At this time, a vibration module may be incorporated in the touch pad 1833 in order to realize a tactile sensation by vibration when the input key 1835 is touched.

FIG. 23 (D) shows an example of a portable information terminal using the display system of one aspect of the present invention. The portable information terminal 1840 shown in FIG. 23D has a housing 1841, a display unit 1842, an operation button 1843, an external connection port 1844, a speaker 1845, a microphone 1846, a camera 1847, and the like.

The mobile information terminal 1840 includes a touch sensor on the display unit 1842. All operations such as making a phone call or entering characters can be performed by touching the display unit 1842 with a finger or a stylus.

Further, by operating the operation button 1843, the power ON / OFF operation and the type of the image displayed on the display unit 1842 can be switched. For example, the mail composition screen can be switched to the main menu screen.

Further, by providing a detection device such as a gyro sensor or an acceleration sensor inside the mobile information terminal 1840, the orientation (vertical or horizontal) of the mobile information terminal 1840 is determined, and the orientation of the screen display of the display unit 1842 is determined. It can be switched automatically. The orientation of the screen display can also be switched by touching the display unit 1842, operating the operation button 1843, or inputting voice using the microphone 1846.

The personal digital assistant 1840 has one or more functions selected from, for example, a telephone, a notebook, an information browsing device, and the like. Specifically, it can be used as a smartphone. The personal digital assistant 1840 can execute various applications such as mobile phone, e-mail, text viewing and creation, music playback, video playback, Internet communication, and games.

23 (E) and 23 (F) show an example of a portable information terminal 1850 using the display system of one aspect of the present invention. The personal digital assistant 1850 has a housing 1851, a housing 1852, a display unit 1853, a display unit 1854, a hinge unit 1855, and the like.

The housing 1851 and the housing 1852 are connected by a hinge portion 1855. The mobile information terminal 1850 can open the housing 1851 and the housing 1852 as shown in FIG. 23 (F) from the folded state as shown in FIG. 23 (E).

For example, document information can be displayed on the display unit 1853 and the display unit 1854, and can also be used as an electronic book terminal. Further, a still image or a moving image can be displayed on the display unit 1853 and the display unit 1854.

As described above, the portable information terminal 1850 is excellent in versatility because it can be folded when it is carried.

The housing 1851 and the housing 1852 may have a power button, an operation button, an external connection port, a speaker, a microphone, and the like.

FIG. 24A shows the appearance of the camera 1860 using the display system of one aspect of the present invention with the finder 1861 attached.

The camera 1860 has a housing 1869, a display unit 1862, an operation button 1863, a shutter button 1864, and the like. A removable lens 1865 is attached to the camera 1860.

Here, the camera 1860 has a configuration in which the lens 1865 can be removed from the housing 1869 and replaced, but the lens 1865 and the housing may be integrated.

The camera 1860 can take an image by pressing the shutter button 1864. Further, the display unit 1862 has a function as a touch panel, and it is possible to take an image by touching the display unit 1862.

The housing 1869 of the camera 1860 has a mount having electrodes, and can be connected to a finder 1861, a strobe device, and the like.

The finder 1861 includes a housing 1866, a display unit 852, a button 1868, and the like. The display system of one aspect of the present invention may be used for the finder 1861.

The housing 1866 has a mount that engages with the mount of the camera 1860, allowing the finder 1861 to be attached to the camera 1860. Further, the mount has electrodes, and an image or the like received from the camera 1860 can be displayed on the display unit 852 via the electrodes.

Button 1868 has a function as a power button. With the button 1868, the display of the display unit 852 can be switched on / off.

The display device of one aspect of the present invention can be applied to the display unit 1862 of the camera 1860 and the display unit 852 of the finder 1861.

In FIG. 24A, the camera 1860 and the finder 1861 are separate electronic devices, and these are detachable. However, the housing 1869 of the camera 1860 is provided with the display device of one aspect of the present invention. A finder may be built in.

FIG. 24B shows the appearance of the head-mounted display 1870 using the display system of one aspect of the present invention.

The head-mounted display 1870 includes a mounting portion 1871, a lens 1872, a main body 1873, a display portion 1874, a cable 1875, and the like. Further, the mounting portion 1871 has a built-in battery 1876.

The cable 1875 supplies power from the battery 1876 to the body 1873. The main body 1873 is provided with a wireless receiver or the like, and can display video information such as received image data on the display unit 1874. In addition, the camera provided on the main body 1873 captures the movements of the user's eyeballs and eyelids, and the coordinates of the user's viewpoint are calculated based on the information, so that the user's viewpoint can be used as an input means. can.

Further, the mounting portion 1871 may be provided with a plurality of electrodes at positions where it touches the user. The main body 1873 may have a function of recognizing the viewpoint of the user by detecting the current flowing through the electrodes with the movement of the eyeball of the user. Further, it may have a function of monitoring the pulse of the user by detecting the current flowing through the electrode. Further, the mounting unit 1871 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function of displaying the biometric information of the user on the display unit 1874. Further, the movement of the head of the user may be detected, and the image displayed on the display unit 1874 may be changed according to the movement.

24 (C) and 24 (D) show the appearance of the head-mounted display 1880 using the display system of one aspect of the present invention.

The head-mounted display 1880 includes a housing 1881, two display units 1882, operation buttons 1883, and a band-shaped fixture 1884.

The head-mounted display 1880 includes two display units in addition to the functions of the head-mounted display 1880.

By having two display units 1882, the user can see one display unit per eye. As a result, a high-resolution image can be displayed even when performing three-dimensional display or the like using parallax. Further, the display unit 1882 is curved in an arc shape centered substantially on the user's eyes. As a result, the distance from the user's eyes to the display surface of the display unit becomes constant, so that the user can see a more natural image. Further, even if the brightness and chromaticity of the light from the display unit change depending on the viewing angle, the user's eyes are positioned in the normal direction of the display surface of the display unit, so that the user's eyes are substantially located. Since the influence can be ignored, a more realistic image can be displayed.

The operation button 1883 has a function such as a power button. Further, a button may be provided in addition to the operation button 1883.

Further, as shown in FIG. 24 (E), a lens 1885 may be provided between the display unit 1882 and the position of the user's eyes. The lens 1885 allows the user to magnify the display unit 1882, which further enhances the sense of presence. At this time, as shown in FIG. 24 (E), a dial 1886 that changes the position of the lens for diopter adjustment may be provided.

A display device according to one aspect of the present invention can be applied to the display unit 1882. Since the display device of one aspect of the present invention has extremely high definition, even if the display device is magnified using the lens 1885 as shown in FIG. 24 (E), the pixels are not visually recognized by the user, and the display device has a more realistic feeling. It is possible to display high-quality images.

FIG. 24F shows an example of a television device using the display system of one aspect of the present invention. In the television device 1890, the display unit 1892 is incorporated in the housing 1891. Here, the configuration in which the housing 1891 is supported by the stand 1893 is shown.

The operation of the television device 1890 shown in FIG. 24 (F) can be performed by the operation switch provided in the housing 1891 or the remote control operation device 1894 provided separately. Alternatively, the display unit 1892 may be provided with a touch sensor, and may be operated by touching the display unit 1892 with a finger or the like. The remote controller 1894 may have a display unit that displays information output from the remote controller 1894. The channel and volume can be operated by the operation keys or the touch panel included in the remote controller 1894, and the image displayed on the display unit 1892 can be operated.

The television device 1890 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts. In addition, by connecting to a wired or wireless communication network via a modem, information communication is performed in one direction (from sender to receiver) or in two directions (between sender and receiver, or between recipients, etc.). It is also possible.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

The relationship between the thickness of the heat storage layer and the mobility of the electric field effect was calculated using Atlas2D (atlas 5.20.2.R), a device simulation software manufactured by Silvaco.

[Structure used for calculation]
The transistor 800 used in the calculation and the structure around it are shown in FIGS. 25 (A), 25 (B), and 25 (C).

FIG. 25A is a top view of the transistor 800 used in the calculation. 25 (B) corresponds to a cross-sectional view of the portion X1-X2 shown by the alternate long and short dash line in FIG. 25 (A), and FIG. 25 (C) shows the portion Y1- shown by the alternate long and short dash line in FIG. 25 (A). Corresponds to the cross-sectional view of Y2. The transistor 800 has a top gate structure with a back gate electrode.

Further, the transistor 800 is provided on the substrate 801 via an insulating layer 820 that functions as a heat storage layer and an insulating layer 802 on the insulating layer 820. Further, the transistor 800 functions as a conductive layer 803 that functions as a back gate electrode, a semiconductor layer 805 (semiconductor layer 805s, a semiconductor layer 805i, and a semiconductor layer 805d), a conductive layer 807 that functions as a gate electrode, and a source electrode. It has a conductive layer 809s and a conductive layer 809d that functions as a drain electrode.

Further, an insulating layer 804 (insulating layer 804a and an insulating layer 804b) is provided between the conductive layer 803 and the semiconductor layer 805, and an insulating layer 806 is provided between the semiconductor layer 805 and the conductive layer 807. The insulating layer 804 functions as a gate insulating layer on the back gate electrode side. The insulating layer 806 functions as a gate insulating layer on the gate electrode side.

Further, it has an insulating layer 808 (insulating layer 808a and insulating layer 808b) covering the conductive layer 807 and the semiconductor layer 805. Further, the conductive layer 809s and the conductive layer 809d are provided on the insulating layer 808. The conductive layer 809s is in contact with the semiconductor layer 805s at the opening 811s provided in the insulating layer 808. The conductive layer 809d is in contact with the semiconductor layer 805d at the opening 811d provided in the insulating layer 808.

The semiconductor layer 805s functions as a source region of the semiconductor layer 805, and the semiconductor layer 805d functions as a drain region of the semiconductor layer 805. Of the semiconductor layer 805, the region overlapping the conductive layer 807 is the semiconductor layer 805i, and the semiconductor layer 805i functions as a channel forming region. The conductive layer 803 has a region that overlaps with the semiconductor layer 805i, a region that overlaps with the semiconductor layer 805s, and a region that overlaps with the semiconductor layer 805d.

Further, an insulating layer 810 that functions as a flattening layer is set above the transistor 800.

[Various setting parameters]
Next, various setting parameters used in the calculation will be described. The channel length L of the transistor 800 was set to 6 μm, and the channel width W was set to 50 μm (see FIGS. 25 (B) and 25 (C)). In the X1-X2 cross section, the length of contact between the conductive layer 809s and the semiconductor layer 805s and the length of contact between the conductive layer 809d and the semiconductor layer 805d were set to 2 μm, respectively. Further, in the X1-X2 cross section, the length of the region where the conductive layer 803 and the semiconductor layer 805s (source region) overlap (the shortest distance from one end of the conductive layer 807 to one end of the conductive layer 803), and the conductive layer 803 and the semiconductor layer. The length of the region where the 805d (drain region) overlaps (the shortest distance from the other end of the conductive layer 807 to the other end of the conductive layer 803) was set to 1.5 μm. Further, in the X1-X2 cross section, the shortest distance from one end of the conductive layer 807 to the end of the opening 811s and the shortest distance from the other end of the conductive layer 807 to the end of the opening 811d were set to 3 μm, respectively.

Table 1 shows other setting parameters.

[Calculation of field effect mobility]
The thickness of the insulating layer 820 that functions as a heat storage layer is 0 μm, 0.001 μm, 0.01 μm, 0.025 μm, 0.05 μm, 0.075 μm, 0.1 μm, 0.25 μm, 0.5 μm, 0.75 μm. , 1.0 μm, 1.5 μm, 2.0 μm, 3.0 μm, 4.0 μm, and 5.0 μm, 16 levels were assumed, and the field effect mobility of the transistor 800 was calculated for each level.

The field effect mobility was calculated by setting the back gate voltage and source voltage of the transistor 800 to 0 V, the drain voltage to 20 V, and changing the gate voltage from −5 V to 20 V in increments of 0.25 V. The field effect mobility calculated in this embodiment is the saturation mobility.

The calculation results are shown in FIGS. 26 (A), 26 (B), 27 (A), 27 (B), and 27 (C).

FIG. 26A is a calculation result of the maximum value of the field effect mobility (μFE) when the thickness of the heat storage layer (insulating layer 820) is changed. Further, FIG. 26 (B) is a graph showing the calculation result of FIG. 26 (A). The horizontal axis of FIG. 26B is the thickness of the heat storage layer, and the vertical axis is the maximum value of the field effect mobility.

FIG. 27A is a calculation result of the temperature of the transistor 800 when the thickness of the heat storage layer (insulating layer 820) is changed. Further, FIG. 27 (B) is a graph showing the calculation result of FIG. 27 (A). The horizontal axis of FIG. 27 (B) is the thickness of the heat storage layer, and the vertical axis is the temperature.

FIG. 27 (C) is a graph showing the relationship between the temperature of the transistor 800 and the field effect mobility using the calculation results shown in FIGS. 26 (A) and 27 (A). The horizontal axis of FIG. 27C is the temperature of the transistor 800, and the vertical axis is the field effect mobility of the transistor 800.

From FIG. 27 (C), it can be seen that there is a strong positive correlation between the temperature of the transistor 800 and the field effect mobility. Further, from FIGS. 26 (A), 26 (B), 27 (A), and 27 (B), the temperature and field effect mobility of the transistor 800 are such that the thickness of the heat storage layer is 0.01 μm or more. It starts to rise, and when the thickness of the heat storage layer exceeds 2.0 μm, it changes to a gradual rise. Therefore, the thickness of the heat storage layer may be 0.01 μm or more and 5.0 μm or less, preferably 0.01 μm or more and 2.0 μm or less.

100 Display device 101 Board 102 Display unit 103 Drive circuit unit 105 Sealing material 106 Board 110 Pixel 111 Insulation layer 112 Transistor 113 Capacitive element 114 Transistor 115 Insulation layer 116 Insulation layer 117 Electrode layer 118 Electrode layer 119 Insulation layer 120 Pixel 121 Liquid crystal element 122 Insulation layer 123 Insulation layer 124 Liquid crystal layer 125 Spacer 126 Transistor 127 Node 128 Capacitive element 129 Node 131 Light emitting element 132 Partition 133 Light emitting layer 134 Transistor 135 Filling material 136 Transistor 141 Wiring 142 Electrode 143 Electrode 144 Anisotropic conductive layer 145 FPC
146 Insulation layer 147 Electrode 148 Electrode 149 Insulation layer 151 Light-shielding layer 152 Colored layer 153 Insulation layer 161 Insulation layer 162 Wiring 163 Wiring 172 Transistor 180 Element 184 Pulse output circuit 185 Control circuit 186 Output circuit

Claims (8)

It has a display unit having a plurality of pixels and a drive circuit unit.
Each of the plurality of pixels has a display element and a first transistor.
The drive circuit unit includes a second transistor, a third transistor, and a first layer.
The second transistor is electrically connected to the first transistor.
The third transistor is electrically connected to the second transistor.
The semiconductor layer of the second transistor and the semiconductor layer of the third transistor each contain a metal element and oxygen, respectively.
The first layer is an insulating layer provided below the second transistor.
The semiconductor layer of the second transistor has a region overlapping with the first layer.
The semiconductor layer of the third transistor does not have a region overlapping with the first layer.
A display device having a thermal conductivity of 0.05 W / (m · K) or more and 0.5 W / (m · K) or less of the first layer. It has a display unit having a plurality of pixels and a drive circuit unit.
Each of the plurality of pixels has a display element and a first transistor.
The drive circuit unit includes a second transistor, a third transistor, and a first layer.
One of the source or drain of the second transistor is electrically connected to the gate of the first transistor.
One of the source or drain of the third transistor is electrically connected to the gate of the second transistor.
The semiconductor layer of the second transistor and the semiconductor layer of the third transistor each contain a metal element and oxygen, respectively.
The first layer is an insulating layer provided below the second transistor.
The semiconductor layer of the second transistor has a region overlapping with the first layer.
The semiconductor layer of the third transistor does not have a region overlapping with the first layer.
A display device having a thermal conductivity of 0.05 W / (m · K) or more and 0.5 W / (m · K) or less of the first layer. In claim 1 or 2,
The drive circuit unit has a capacitive element and
One electrode of the capacitive element is electrically connected to the gate of the second transistor.
A display device in which the other electrode of the capacitive element is electrically connected to one of the source or drain of the second transistor. In any one of claims 1 to 3,
A display device having a thickness of the first layer of 0.01 μm or more and 2.0 μm or less. In any one of claims 1 to 4,
The first layer is a display device containing a resin. In any one of claims 1 to 5,
The display element is a display device that is a liquid crystal element. In any one of claims 1 to 6,
A display device in which the metal element is at least one of indium, gallium, or zinc. In any one of claims 1 to 7,
The semiconductor layer of the first transistor and the semiconductor layer of the second transistor are display devices including oxide semiconductors.

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