JP6903087B2 - Light emitting element - Google Patents

Light emitting element Download PDF

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JP6903087B2
JP6903087B2 JP2019050824A JP2019050824A JP6903087B2 JP 6903087 B2 JP6903087 B2 JP 6903087B2 JP 2019050824 A JP2019050824 A JP 2019050824A JP 2019050824 A JP2019050824 A JP 2019050824A JP 6903087 B2 JP6903087 B2 JP 6903087B2
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layer
electrode
light emitting
insulating layer
conductive semiconductor
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JP2019114803A (en
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ホン−チェ,チェン
チエン−フ,シェン
チャオ−シン,チェン
ユ−チェン,ヤン
ジア−クエン,ワン
チー−ナン,リン
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Epistar Corp
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Description

本発明は、発光素子構造及びその製造方法に係り、特に電極が第1の層及び第2の層を有する発光素子構造及びその製造方法に関する。 The present invention relates to a light emitting device structure and a method for manufacturing the same, and more particularly to a light emitting device structure in which an electrode has a first layer and a second layer and a method for manufacturing the same.

発光ダイオードは半導体素子における広く用いられている光源である。発光ダイオードは、従来の白熱電球又は蛍光灯に比べて、省電力及び使用寿命が長い特性を有するため、だんだん従来の光源に代えて、各種の分野、例えば交通標示、バックライトモジュール、街灯照明、医療設備などの産業において適用される。 Light emitting diodes are a widely used light source in semiconductor devices. Since light emitting diodes have characteristics of power saving and long service life as compared with conventional incandescent lamps or fluorescent lamps, they gradually replace conventional light sources in various fields such as traffic signs, backlight modules, street lighting, etc. It is applied in industries such as medical equipment.

発光ダイオード光源が適用され、発展するにつれて、輝度への要望がますます高くなる。どうやって発光効率を増やして、その輝度を向上するのかは、産業業界は共同して努力する重要な方向となる。 As light emitting diode light sources are applied and evolved, the demand for brightness is increasing. How to increase the luminous efficiency and improve its brightness is an important direction for the industrial industry to work together.

図9は従来のLEDパッケージ30を示している。LEDパッケージ30は、パッケージ構造31とパッケージ構造31によりパッケージ化される半導体LEDチップ32とを含む。半導体LEDチップ32はp−n接面33を有し、パッケージ構造31は一般的には熱硬化性の材料、例えばエポキシ樹脂(epoxy)、又は熱硬化性プラスチックである。半導体LEDチップ32は、ワイヤ(wire)34を介して2つの導電フレーム35、56に接続されている。エポキシ樹脂(epoxy)は、高温の中で劣化(degrading)現象が生じられるため、低温環境でしか動作できない。また、エポキシ樹脂(epoxy)は高い熱抵抗(thermal resistance)を有するため、図9の構造は半導体LEDチップ32の高い抵抗値の熱分散ルートを提供し、LEDパッケージ30の低消費電力の適用を限定している。 FIG. 9 shows the conventional LED package 30. The LED package 30 includes a package structure 31 and a semiconductor LED chip 32 packaged by the package structure 31. The semiconductor LED chip 32 has a pn contact surface 33, and the package structure 31 is generally a thermosetting material such as epoxy resin or thermosetting plastic. The semiconductor LED chip 32 is connected to two conductive frames 35 and 56 via a wire 34. Epoxy resin can operate only in a low temperature environment because a degrading phenomenon occurs in a high temperature. Further, since the epoxy resin has a high thermal resistance, the structure of FIG. 9 provides a thermal dispersion route of a high resistance value of the semiconductor LED chip 32, and the application of the low power consumption of the LED package 30 is applied. Limited.

本発明は、発光素子を提供することを目的とする。 An object of the present invention is to provide a light emitting device.

本発明の一の態様によれば、底部を有する凹溝と、上表面を有する平たい台とを含む半導体積層と、前記凹溝内及び前記平たい台の上表面の一部領域に位置する第1の絶縁層と、
第1の導電材料を含み、且つ前記平たい台の上表面の一部領域に位置する第1の層と、第2の導電材料を含み、且つ前記第1の層の上に位置する第2の層とを含む第1の電極と、を含む発光素子を提供する。
According to one aspect of the present invention, a semiconductor laminate including a concave groove having a bottom portion and a flat base having an upper surface, and a first portion located in the concave groove and a part of the upper surface of the flat base. Insulation layer and
A first layer containing a first conductive material and located in a partial region of the upper surface of the flat table, and a second layer containing a second conductive material and located on the first layer. A first electrode including a layer and a light emitting device including the layer are provided.

好適には、第1の電極の第1の層を形成する第1の導電材料と第1の電極の第2の層を形成する第2の導電材料とは異なる。また、第1の電極の第1の層の、発光素子により生じられた光線に対する反射率は、第1の電極の第2の層の光線に対する反射率よりも大きく、第2の層の光線に対する反射率は60%よりも大きい。 Preferably, the first conductive material forming the first layer of the first electrode and the second conductive material forming the second layer of the first electrode are different. Further, the reflectance of the first layer of the first electrode to the light rays generated by the light emitting element is larger than the reflectance to the light rays of the second layer of the first electrode, and the reflectance to the light rays of the second layer. The reflectance is greater than 60%.

本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図及び断面図。The plan view and the sectional view of the light emitting element structure which concerns on 1st Example of this invention. 本発明の第1実施例に係る発光素子構造の平面図。The plan view of the light emitting element structure which concerns on 1st Example of this invention. 従来の発光素子のLEDパッケージの構成図。The block diagram of the LED package of the conventional light emitting element. 本発明の他の実施例に係る電球の分解図。Exploded view of a light bulb according to another embodiment of the present invention.

図1〜図8及び図10を参照しながら、本発明を実施するための各実施例を説明する。 Each embodiment for carrying out the present invention will be described with reference to FIGS. 1 to 8 and 10.

図1Aは、本発明の第1実施例に係る発光素子の平面図である。図1Aに示すように、発光素子は、基板(図示せず)及び半導体積層を含む。半導体積層は、第1の導電型半導体層11と、第1の導電型半導体層の上に形成される活性層(図1Aに図示せず)及び第2の導電型半導体層12とを含む。一部分の第2の導電型半導体層12及び活性層をエッチングすることにより第1の導電型半導体層11を露出する。 FIG. 1A is a plan view of a light emitting device according to a first embodiment of the present invention. As shown in FIG. 1A, the light emitting element includes a substrate (not shown) and a semiconductor laminate. The semiconductor laminate includes a first conductive semiconductor layer 11, an active layer (not shown in FIG. 1A) formed on the first conductive semiconductor layer, and a second conductive semiconductor layer 12. The first conductive semiconductor layer 11 is exposed by etching a part of the second conductive semiconductor layer 12 and the active layer.

図1Bは横切る線(cross section line)A−A’を沿って横切った断面図である。半導体積層は、底部を有する凹溝と、上表面を有する平たい台とを含む。本実施例では、平たい台の上表面は第2の導電型半導体層12の表面となり、第1の導電型半導体層11は凹溝の底部から露出され、凹溝は活性層21を横切っている。発光素子が形成された後、電圧によって発光素子を駆動して、第1の導電型半導体層11に電子を提供させ、第2の導電型半導体層12に正孔を提供させ、電子と正孔とが活性層21で結合して光線を発する。 FIG. 1B is a cross-sectional view taken along a cross section line AA'. The semiconductor laminate includes a recessed groove having a bottom and a flat base having an upper surface. In this embodiment, the upper surface of the flat table is the surface of the second conductive semiconductor layer 12, the first conductive semiconductor layer 11 is exposed from the bottom of the concave groove, and the concave groove crosses the active layer 21. .. After the light emitting element is formed, the light emitting element is driven by a voltage to provide electrons to the first conductive semiconductor layer 11 and holes to the second conductive semiconductor layer 12, and the electrons and holes are provided. And are combined in the active layer 21 to emit light rays.

図2A、図2Bに示すように、第2の電極13は、凹溝の底部、第1の導電型半導体層11の上に形成され、第2の電極13と第1の導電型半導体層11とは電気的に接続している。 As shown in FIGS. 2A and 2B, the second electrode 13 is formed on the bottom of the groove and the first conductive semiconductor layer 11, and the second electrode 13 and the first conductive semiconductor layer 11 are formed. Is electrically connected to.

図3Aに示すように、線A−A’に沿って切った断面領域と線B−B’に沿って切った断面領域とは構造及び製造プロセスが異なるため、以下それぞれについて説明する。まず、図3Bは線A−A’に沿って切った断面領域を示している。第1の絶縁層14は、凹溝内及び平たい台の上表面の一部領域に形成され、第2の電極13を覆う。 As shown in FIG. 3A, the cross-sectional area cut along the line AA'and the cross-sectional area cut along the line BB' differ in structure and manufacturing process, and therefore each will be described below. First, FIG. 3B shows a cross-sectional area cut along the line AA'. The first insulating layer 14 is formed in a concave groove and a part of the upper surface of the flat table, and covers the second electrode 13.

図4A、4Bに示すように、第1の電極第1の層15は、平たい台の上表面の一部領域に形成され、且つ第1の絶縁層14とは互いに離れて重なっていない。本実施例では、第1の電極第1の層15は第1の導電材料を含み、第1の導電材料は例えば金属であってもよい。第1の導電材料は、銀、プラチナ、及び金からなる群から選択された少なくとも一つの材料を含み、第1の層15の厚さは500Å以上、5000Å以下である。 As shown in FIGS. 4A and 4B, the first layer 15 of the first electrode is formed in a part of the upper surface of the flat table and does not overlap with the first insulating layer 14 apart from each other. In this embodiment, the first layer 15 of the first electrode contains the first conductive material, and the first conductive material may be, for example, a metal. The first conductive material contains at least one material selected from the group consisting of silver, platinum, and gold, and the thickness of the first layer 15 is 500 Å or more and 5000 Å or less.

図5A、5Bに示すように、第1の電極第2の層16は第1の電極第1の層15の上に形成され、第1の電極第1の層15及び第1の絶縁層14の少なくとも一部を覆う。本実施例では、第1の電極第2の層16は第2の導電材料を含み、第2の導電材料は例えば金属であってもよい。第2の導電材料は、ニッケル、アルミニウム、銅、クロム、及びチタンからなる群から選択された少なくとも一つの材料を含み、第2の層16の厚さは、2000Å以上、1.5μm以下である。他の実施例では、第1層15を形成する第1の導電材料と第2の層16を形成する第2の導電材料とは異なり、第1の層15の発光素子により発せられる光線に対する反射率は、第2の層16の発光素子により発せられる光線に対する反射率よりも大きい。好適には、第2の層16の光線に対する反射率は60%よりも大きい。 As shown in FIGS. 5A and 5B, the second layer 16 of the first electrode is formed on the first layer 15 of the first electrode, and the first layer 15 of the first electrode and the first insulating layer 14 are formed. Cover at least part of. In this embodiment, the second layer 16 of the first electrode includes a second conductive material, and the second conductive material may be, for example, a metal. The second conductive material contains at least one material selected from the group consisting of nickel, aluminum, copper, chromium and titanium, and the thickness of the second layer 16 is 2000 Å or more and 1.5 μm or less. .. In another embodiment, unlike the first conductive material forming the first layer 15 and the second conductive material forming the second layer 16, reflection on light rays emitted by the light emitting element of the first layer 15 The rate is greater than the reflectance for light rays emitted by the light emitting element of the second layer 16. Preferably, the reflectance of the second layer 16 to light rays is greater than 60%.

図6A、図6Bに示すように、第1の電極第2の層16の上に第2の絶縁層17が形成され、第1の電極第2の層16は第2の絶縁層17の間隔領域から露出される。第2の絶縁層17の領域と第1の絶縁層14の領域とは、ほぼ対応している。本実施例では、発光素子の縁部にある第2の絶縁層17と第1の絶縁層14とは直接接触してもよい。第1の絶縁層14を構成する材料と第2の絶縁層17を構成する材料とは同じであってもよいし、異なってもよく、両者の組成材料は酸化ケイ素、窒化ケイ素、酸化アルミニウム、酸化ジルコニウム、又は酸化チタンであってもよい。 As shown in FIGS. 6A and 6B, a second insulating layer 17 is formed on the second layer 16 of the first electrode, and the second layer 16 of the first electrode is spaced apart from the second insulating layer 17. Exposed from the area. The region of the second insulating layer 17 and the region of the first insulating layer 14 substantially correspond to each other. In this embodiment, the second insulating layer 17 and the first insulating layer 14 at the edge of the light emitting element may be in direct contact with each other. The material constituting the first insulating layer 14 and the material constituting the second insulating layer 17 may be the same or different, and the composition materials of both are silicon oxide, silicon nitride, aluminum oxide, and the like. It may be zirconium oxide or titanium oxide.

図7A、7Bに示すように、第2の絶縁層17の上及び第2の絶縁層17の間隔領域に第1の電極パッド18が形成され、第1の電極パッド18は第1の電極第1の層15及び第2の層16に電気的に接続される。 As shown in FIGS. 7A and 7B, the first electrode pad 18 is formed on the second insulating layer 17 and in the interval region of the second insulating layer 17, and the first electrode pad 18 is the first electrode first. It is electrically connected to the first layer 15 and the second layer 16.

次に、図3Cは図3Aの線B−B’に沿って切った断面領域を示している。第1の絶縁層14は、凹溝内及び平たい台の上表面の一部領域に形成される。本実施例では、第2の電極13の上表面の一部において、第1の絶縁層14により覆われていない領域に通路20が形成される。 Next, FIG. 3C shows a cross-sectional area cut along the line BB'of FIG. 3A. The first insulating layer 14 is formed in a concave groove and a part of the upper surface of the flat table. In this embodiment, a passage 20 is formed in a part of the upper surface of the second electrode 13 in a region not covered by the first insulating layer 14.

図4A、4Cに示すように、第1の電極第1の層15は、平たい台の上表面の一部領域に形成され、且つ第1の絶縁層14とは互いに離れて重なっていない。本実施例では、第1の電極第1の層15は第1の導電材料を含み、第1の導電材料は例えば金属であってもよい。第1の導電材料は、銀、プラチナ、及び金からなる群から選択された少なくとも一つの材料を含む。第1の層15の厚さは500Å以上、5000Å以下である。 As shown in FIGS. 4A and 4C, the first layer 15 of the first electrode is formed in a part of the upper surface of the flat table and does not overlap with the first insulating layer 14 apart from each other. In this embodiment, the first layer 15 of the first electrode contains the first conductive material, and the first conductive material may be, for example, a metal. The first conductive material comprises at least one material selected from the group consisting of silver, platinum, and gold. The thickness of the first layer 15 is 500 Å or more and 5000 Å or less.

図5A、5Cに示すように、第1の電極第2の層16は第1の電極第1の層15の上に形成され、第1の電極第1の層15及び第1の絶縁層14の少なくとも一部を覆う。本実施例では、第1の電極第1層15及び第1の電極第2層16は凹溝を覆う。第1の電極第2の層16は第2の導電材料を含み、第2の導電材料は例えば金属であってもよい。第2の導電材料は、ニッケル、アルミニウム、銅、クロム、及びチタンからなる群から選択された少なくとも一つの材料を含み、第2の層16の厚さは、2000Å以上、1.5μm以下である。他の実施例では、第1層15を形成する第1の導電材料と第2の層16を形成する第2の導電材料とは異なり、第1の層15の発光素子により発せられる光線に対する反射率は、第2の層16の発光素子により発せられる光線に対する反射率よりも大きい。好適には、第2の層16の光線に対する反射率は60%よりも大きい。 As shown in FIGS. 5A and 5C, the second layer 16 of the first electrode is formed on the first layer 15 of the first electrode, and the first layer 15 of the first electrode and the first insulating layer 14 are formed. Cover at least part of. In this embodiment, the first electrode first layer 15 and the first electrode second layer 16 cover the groove. The first electrode second layer 16 contains a second conductive material, and the second conductive material may be, for example, a metal. The second conductive material contains at least one material selected from the group consisting of nickel, aluminum, copper, chromium and titanium, and the thickness of the second layer 16 is 2000 Å or more and 1.5 μm or less. .. In another embodiment, unlike the first conductive material forming the first layer 15 and the second conductive material forming the second layer 16, reflection on light rays emitted by the light emitting element of the first layer 15 The rate is greater than the reflectance for light rays emitted by the light emitting element of the second layer 16. Preferably, the reflectance of the second layer 16 to light rays is greater than 60%.

図6A、図6Cに示すように、第1の電極第2の層16の上及び複数の第1の絶縁層14の上に第2の絶縁層17が形成される。第2の絶縁層17の一部領域と第1の絶縁層14の領域とは直接接触している。第1の絶縁層14を構成する材料と第2の絶縁層17を構成する材料とは同じであってもよいし、異なってもよく、両者の組成材料は酸化ケイ素、窒化ケイ素、酸化アルミニウム、酸化ジルコニウム、又は酸化チタンであってもよい。 As shown in FIGS. 6A and 6C, a second insulating layer 17 is formed on the first electrode second layer 16 and on the plurality of first insulating layers 14. A part of the region of the second insulating layer 17 and the region of the first insulating layer 14 are in direct contact with each other. The material constituting the first insulating layer 14 and the material constituting the second insulating layer 17 may be the same or different, and the composition materials of both are silicon oxide, silicon nitride, aluminum oxide, and the like. It may be zirconium oxide or titanium oxide.

図7A、7Cに示すように、第2の絶縁層17の上及び通路20の領域に第2の電極パッド19が形成され、第2の電極パッド19は第2の電極13に電気的に接続される。図8は、形成された発光素子10の平面図である。 As shown in FIGS. 7A and 7C, a second electrode pad 19 is formed on the second insulating layer 17 and in the region of the passage 20, and the second electrode pad 19 is electrically connected to the second electrode 13. Will be done. FIG. 8 is a plan view of the formed light emitting element 10.

図10は、本発明の他の実施例に係る電球の分解図。電球40は、ランプカバー41、レンズ42、発光モジュール44、ランプソケット45、放熱フィン46、結合部47、及び電気端子48を含む。発光モジュール44は載置板43を更に含み、複数の上述した実施例に係る発光素子10は載置板43の上に位置する。 FIG. 10 is an exploded view of a light bulb according to another embodiment of the present invention. The light bulb 40 includes a lamp cover 41, a lens 42, a light emitting module 44, a lamp socket 45, a heat radiation fin 46, a coupling portion 47, and an electric terminal 48. The light emitting module 44 further includes a mounting plate 43, and the plurality of light emitting elements 10 according to the above-described embodiment are located on the mounting plate 43.

上述した第2の電極13、第1の電極パッド18、及び第2の電極パッド19の材料は、クロム(Cr)、チタン(Ti)、ニッケル(Ni)、プラチナ(Pt)、銅(Cu)、金(Au)、アルミニウム(Al)、タングステン(W)、錫(Sn)又は銀(Ag)等の金属材料から選択してもよい。基板(図示せず)は成長及び又は載置基部である。候補材料は透光基板を含み、透光基板の材料はサファイア(Sapphire)、アルミン酸リチウム(LiAlO)、酸化亜鉛(ZnO)、窒化ガリウム(GaN)、窒化ガリウム(AlN)、ガラス、ダイヤモンド、CVDダイヤモンド、ダイヤモンド様炭素(Diamond−Like Carbon、DLC)、尖晶石(spinel、MgAl)、酸化ケイ素(SiO)及びガリウム酸リチウム(LiGaO)であってもよい。 The materials of the second electrode 13, the first electrode pad 18, and the second electrode pad 19 described above are chromium (Cr), titanium (Ti), nickel (Ni), platinum (Pt), and copper (Cu). , Gold (Au), Aluminum (Al), Tungsten (W), Tin (Sn) or Silver (Ag) and the like. The substrate (not shown) is the growth and / or mounting base. Candidate materials include translucent substrates, and translucent substrate materials include sapphire, lithium aluminate (LiAlO 2 ), zinc oxide (ZnO), gallium nitride (GaN), gallium nitride (AlN), glass, diamond, etc. It may be CVD diamond, diamond-like carbon (DLC), spinel (MgAl 2 O 4 ), silicon oxide (SiO X ) and lithium gallium nitride (LiGaO 2).

上述した第1の導電型半導体層11と第2の導電型半導体層12とは、少なくとも2つの部分の電気性、極性若しくはドーパントが異なり、又はそれぞれ電子及び正孔の半導体材料の単層或いは多層(「多層」とは、2層又は2層以上を指す。以下は同じ)を提供するためのものであり、その電気性の選択肢はp型、n型及びi型のうち少なくとも2つの組み合わせであってもよい。活性層21は第1の導電型半導体層11と第2の導電型半導体層12との間に位置し、電気エネルギと光エネルギとが転換又は誘導されて転換可能な領域である。電気エネルギから光エネルギへ転換又は誘導するものは、例えば発光ダイオード、液晶表示装置、有機発光ダイオードであり、光エネルギから電気エネルギへ変換又は誘導するものは、太陽電池、光電ダイオードである。上述した第1の導電型半導体層11、活性層21及び第2の導電型半導体層12の材料が含む一種又は一種以上の元素は、ガリウム(Ga)、アルミニウム(Al)、インジウム(In)、砒素(As)、燐(P)、窒素(N)及びケイ素(Si)からなる群から選択されたものである。 The first conductive semiconductor layer 11 and the second conductive semiconductor layer 12 described above have different electrical properties, polarities, or dopants in at least two parts, or a single layer or a multilayer of electron and hole semiconductor materials, respectively. (“Multilayer” refers to two or more layers; the same shall apply hereinafter), the electrical choice of which is at least two combinations of p-type, n-type and i-type. There may be. The active layer 21 is located between the first conductive semiconductor layer 11 and the second conductive semiconductor layer 12, and is a region in which electrical energy and light energy can be converted or induced to be converted. Those that convert or induce electrical energy to optical energy are, for example, light emitting diodes, liquid crystal displays, and organic light emitting diodes, and those that convert or induce optical energy to electrical energy are solar cells and photoelectric diodes. One or more elements contained in the materials of the first conductive semiconductor layer 11, the active layer 21 and the second conductive semiconductor layer 12 described above are gallium (Ga), aluminum (Al), indium (In), and the like. It was selected from the group consisting of arsenic (As), phosphorus (P), nitrogen (N) and silicon (Si).

本発明の他の実施例に係る発光素子は発光ダイオードであり、その発光スペクトルは半導体単層又は多層の物理又は化学要素を調整することにより変更される。常用の材料は、例えば燐化アルミニウムガリウムインジウム(AlGaInP)シリーズ、窒化アルミニウムガリウムインジウム(AlGaInN)シリーズ、酸化亜鉛(ZnO)シリーズなどがある。活性層(図示せず)の構成は、例えばシングルヘテロ構造(single heterostructure、SH)、ダブルヘテロ構造(double heterostructure、DH)、ダブルサイドダブルヘテロ構造(double−side double heterostructure、DDH)、多重量子井戸(multi−quantum well、MQW)。更に、発光の波長の変更は、量子井戸の対数を調整してもよい。 The light emitting device according to another embodiment of the present invention is a light emitting diode, and the light emitting spectrum thereof is changed by adjusting the physical or chemical elements of a semiconductor single layer or a multilayer. Commonly used materials include, for example, aluminum phosphide gallium gallium indium (AlGaInP) series, aluminum nitride gallium indium (AlGaInN) series, zinc oxide (ZnO) series and the like. The composition of the active layer (not shown) is, for example, a single heterostructure (SH), a double heterostructure (DH), a double-sided double heterostructure (double-side double heterostructure), a double-sided double heterostructure, a double-sided double heterostructure (DH), and a double-side double heterostructure (DH). (Multi-quantum well, MQW). Further, the change of the emission wavelength may adjust the logarithm of the quantum well.

本発明の一の実施例では、第1の導電型半導体層11と基板(図示せず)との間は、バッファー層(buffer layer、図示せず)を選択的に含んでもよい。このバッファー層は2つの材料システムの間にあり、基板の材料システムを半導体システムの材料システムに「移行」させる。発光ダイオードの構造について、バッファー層が2種類の材料の間の格子の不整合を低減するための材料層である。一方、バッファー層は2種類の材料又は2つの分離構造を結合するための単層、多層又は構造であってもよい。バッファー層の材料は、例えば有機材料、無機材料、金属、及び半導体などから選択されたものであってもよく、その構造は、例えば反射層、導熱層、導電層、オーム接触(ohmic contact)層、耐変形層、応力リリース(stress release)層、接合(bonding)層、波長変換層、及び機械固定構造などであってもよい。一の実施例では、バッファー層の材料はAIN、GaNであってもよく、その形成方法はスパッタ(Sputter)又は原子層堆積(Atomic Layer Deposition、ALD)であってもよい。 In one embodiment of the present invention, a buffer layer (not shown) may be selectively included between the first conductive semiconductor layer 11 and the substrate (not shown). This buffer layer lies between the two material systems and "migrates" the material system of the substrate to the material system of the semiconductor system. Regarding the structure of the light emitting diode, the buffer layer is a material layer for reducing the lattice mismatch between the two kinds of materials. On the other hand, the buffer layer may be a single layer, a multilayer or a structure for binding two kinds of materials or two separated structures. The material of the buffer layer may be selected from, for example, an organic material, an inorganic material, a metal, a semiconductor, etc., and its structure may be, for example, a reflective layer, a heat conductive layer, a conductive layer, an ohmic contact layer, or the like. , Deformation resistant layer, stress release layer, bonding layer, wavelength conversion layer, mechanically fixed structure and the like. In one embodiment, the material of the buffer layer may be AIN, GaN, and the method of forming the buffer layer may be Sputter or Atomic Layer Deposition (ALD).

第2の導電型半導体層12は第2の導電型接触層(図示せず)を更に選択的に形成してもよい。接触層は第2の導電型半導体層の活性層21から離れた側に設けられる。具体的には、第2の導電型接触層は、光学層、電気学層、又は両者の組み合わせであってもよい。光学層は、活性層21から、又は活性層21への電磁輻射又は光線を変化させてもよい。ここの「変化」とは、電磁輻射又は光の少なくとも一種類の光学特性を変えるものであり、この特性は周波数、波長、強度、フラックス、効率、色温、演色性(rendering index)、光照射野(light field)及び画角(angle of view)を含んでもよく、ここに例示されたものに限定されない。電気学層は、第2の導電型接触層のいずれか一組の対向側の間の電圧、抵抗、電流、容量のうち少なくとも一つの数値、密度、分布を変化させる又は変化する趨勢を生じさせるものであってもよい。第2の導電型接触層の構成材料は酸化物、導電酸化物、透明酸化物、50%以上の透過率を有する酸化物、金属、相対な光透過性を有する金属、50%以上の透過率を有する金属、有機質、無機質、蛍光物、燐光物、セラミック、半導体、不純物をドープした半導体、不純物をドープしていない半導体の少なくとも一つを含む。ある応用において、第2の導電型接触層の材料は、酸化インジウム錫、酸化カドミウム錫、酸化アンチモン錫、酸化インジウム亜鉛、酸化亜鉛アルミニウム、酸化亜鉛錫の少なくとも一つである。光透過金属である場合は、その厚さは約0.005μm〜0.6μmである。 The second conductive semiconductor layer 12 may further selectively form a second conductive contact layer (not shown). The contact layer is provided on the side of the second conductive semiconductor layer away from the active layer 21. Specifically, the second conductive contact layer may be an optical layer, an electromagnetic layer, or a combination of both. The optical layer may change the electromagnetic radiation or light rays from or to the active layer 21. "Change" here is to change at least one type of optical characteristic of electromagnetic radiation or light, which is frequency, wavelength, intensity, flux, efficiency, color temperature, color rendering index, light irradiation field. (Light field) and angle of view (angle of view) may be included, and is not limited to those exemplified herein. The electrical layer creates a trend that changes or changes the value, density, distribution of at least one of the voltage, resistance, current, and capacitance between any pair of opposite sides of the second conductive contact layer. It may be a thing. The constituent materials of the second conductive contact layer are oxides, conductive oxides, transparent oxides, oxides and metals having a transmittance of 50% or more, metals having relative light transmittance, and transmittances of 50% or more. Includes at least one of metals, organics, inorganics, phosphors, phosphors, ceramics, semiconductors, impurity-doped semiconductors, and non-impurity-doped semiconductors. In one application, the material of the second conductive contact layer is at least one of indium tin oxide, cadmium oxide tin, antimony oxide, indium zinc oxide, zinc aluminum oxide, and tin zinc oxide. In the case of a light transmitting metal, its thickness is about 0.005 μm to 0.6 μm.

以上、図面及び文字で本発明の特定実施例を説明したが、各実施例に記載又は開示されている素子、実施方式、設計基準、及び技術原理は、衝突、矛盾、共同で実施しにくい場合を除き、当業者が必要に応じて任意に参照、交換、配合、協調、又は合併してもよい。 Although the specific embodiments of the present invention have been described above with reference to the drawings and characters, the elements, implementation methods, design standards, and technical principles described or disclosed in each embodiment are cases of collision, contradiction, and difficulty in joint implementation. However, those skilled in the art may optionally refer to, exchange, formulate, coordinate, or merge as necessary.

上記の説明は、本発明の好適な実施例に過ぎず、本発明の実施の範囲、実施の順序、又は使用される材料及び製造方法は、これらに限定されず、本発明の特許請求の範囲及び明細書の内容に基づいて、当業者によって何れの変更及び修飾が可能であり、本発明の保護範囲は特許請求の範囲を基準とする。 The above description is merely a preferred embodiment of the present invention, and the scope of implementation of the present invention, the order of implementation, or the materials and manufacturing methods used are not limited thereto, and the scope of claims of the present invention is limited. And any modification or modification can be made by those skilled in the art based on the contents of the specification, and the scope of protection of the present invention is based on the scope of claims.

10 発光素子
11 第1の導電型半導体層
12 第2の導電型半導体層
13 第2の電極
14 第1の絶縁層
15 第1の電極第1の層
16 第1の電極第2の層
17 第2の絶縁層
18 第1の電極パッド
19 第2の電極パッド
20 通路
21 活性層
30 LEDパッケージ
31 パッケージ構造
32 LEDチップ
33 p−n接面
34 ワイヤ
35、36 導電フレーム
40 電球
41 ランプカバー
42 レンズ
43 載置板
44 発光モジュール
45 ランプソケット
46 放熱フィン
47 結合部
48 電気端子
10 Light emitting element 11 1st conductive semiconductor layer 12 2nd conductive semiconductor layer 13 2nd electrode 14 1st insulating layer 15 1st electrode 1st layer 16 1st electrode 2nd layer 17th 2 Insulation layer 18 1st electrode pad 19 2nd electrode pad 20 Passage 21 Active layer 30 LED package 31 Package structure 32 LED chip 33 pn contact surface 34 Wire 35, 36 Conductive frame 40 Light bulb 41 Lamp cover 42 Lens 43 Mounting plate 44 Light emitting module 45 Lamp socket 46 Heat dissipation fin 47 Coupling part 48 Electrical terminal

Claims (10)

発光素子であって、
第1の導電型半導体層と、活性層と、第2の導電型半導体層とを含む半導体積層であって、前記半導体積層は複数の凹溝と、平たい台とを含み、前記複数の凹溝は、前記第1の導電型半導体層を露出させる底部をそれぞれ有し、前記平たい台は上表面を有し、該上表面は前記第2の導電型半導体層の表面である、半導体積層と、
第1の導電材料を含み、前記平たい台の前記上表面の上に位置する第1の電極第1の層と、
互いに離れており、且つ前記複数の凹溝の各前記底部にそれぞれ位置する複数の第2の電極であって、前記複数の第2の電極は、前記複数の凹溝の各前記底部から離れた側に位置する上表面をそれぞれ有する、複数の第2の電極と、
前記複数の凹溝に位置し、且つ前記平たい台の前記上表面の一部の上に位置する第1の絶縁層であって、前記第1の絶縁層は、前記複数の第2の電極の各前記上表面の一部を覆い、且つ前記複数の第2の電極の各前記上表面の他部を露出させるように複数の通路を含む、第1の絶縁層と、
第2の導電材料を含み、前記複数の第2の電極、前記第1の絶縁層及び前記第1の電極第1の層を覆う第1の電極第2の層であって、前記第1の絶縁層は前記第1の電極第2の層と前記複数の第2の電極との間に位置し、前記発光素子の平面図において、前記第1の電極第2の層の外輪郭と前記平たい台の外輪郭とは略対応する、第1の電極第2の層と、
前記第1の電極第2の層の一部を覆い、且つ前記第1の電極第2の層の他部を露出させるように複数の間隔領域を含む第2の絶縁層と、
前記第2の絶縁層の上に位置し、前記第1の導電型半導体層及び前記第2の導電型半導体層を覆い、且つ前記第1の電極第2の層と接触する第1の電極パッドであって、前記第2の絶縁層は前記第1の電極第2の層と前記第1の電極パッドとの間に位置し、前記第2の絶縁層は前記第1の電極パッドと直接接触する、第1の電極パッドと、
前記複数の第2の電極の上に位置し、前記第1の導電型半導体層及び前記第2の導電型半導体層を覆い、且つ前記複数の第2の電極に電気的に接続される第2の電極パッドと、を含む発光素子。
It is a light emitting element
A semiconductor laminate including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. The semiconductor laminate includes a plurality of recesses and a flat base, and the plurality of recesses. Each has a bottom portion that exposes the first conductive semiconductor layer, the flat base has an upper surface, and the upper surface is the surface of the second conductive semiconductor layer.
A first layer of first electrodes comprising a first conductive material and located on the upper surface of the flatbed.
A plurality of second electrodes that are separated from each other and are located at the bottom of each of the plurality of recesses, and the plurality of second electrodes are separated from each of the bottoms of the plurality of recesses. A plurality of second electrodes, each having an upper surface located on the side,
A first insulating layer located in the plurality of recesses and above a part of the upper surface of the flat table, wherein the first insulating layer is of the plurality of second electrodes. A first insulating layer that covers a portion of each of the upper surfaces and includes a plurality of passages so as to expose the other portion of each of the upper surfaces of the plurality of second electrodes.
A first electrode second layer containing the second conductive material and covering the plurality of second electrodes, the first insulating layer, and the first electrode first layer, wherein the first electrode The insulating layer is located between the first electrode second layer and the plurality of second electrodes, and in the plan view of the light emitting element, the outer contour of the first electrode second layer and the flat surface. A second layer of first electrodes, which roughly corresponds to the outer contour of the table,
And including a second insulating layer a plurality of spacing regions so that the cover part of the first electrode and the second layer, thereby and expose the other portion of the first electrode and the second layer,
A first electrode pad that is located on the second insulating layer, covers the first conductive semiconductor layer and the second conductive semiconductor layer, and is in contact with the second layer of the first electrode. The second insulating layer is located between the second layer of the first electrode and the first electrode pad, and the second insulating layer is in direct contact with the first electrode pad. The first electrode pad and
A second electrode that is located on the plurality of second electrodes, covers the first conductive semiconductor layer and the second conductive semiconductor layer, and is electrically connected to the plurality of second electrodes. Electrode pads and light emitting elements including.
前記半導体積層の下に位置する基板をさらに含む請求項1に記載の発光素子。 The light emitting device according to claim 1, further comprising a substrate located under the semiconductor laminate. 前記活性層は光線を発することができ、
前記複数の凹溝は、前記第2の導電型半導体層及び前記活性層を横切っている請求項1に記載の発光素子。
The active layer can emit light rays
The light emitting device according to claim 1, wherein the plurality of concave grooves cross the second conductive semiconductor layer and the active layer.
前記複数の凹溝の1つは前記平たい台を囲む請求項3に記載の発光素子。 The light emitting element according to claim 3, wherein one of the plurality of concave grooves surrounds the flat table. 前記第1の絶縁層は、前記第1の電極第1の層の上表面と前記第1の電極第2の層の上表面との間に位置する表面を含む請求項1に記載の発光素子。 The light emitting device according to claim 1, wherein the first insulating layer includes a surface located between the upper surface of the first layer of the first electrode and the upper surface of the second layer of the first electrode. .. 前記第2の絶縁層は、前記第1の絶縁層と直接接触する一部の領域を含む請求項5に記載の発光素子。 The light emitting element according to claim 5, wherein the second insulating layer includes a part of a region in direct contact with the first insulating layer. 前記第1の導電材料及び前記第2の導電材料は金属を含み、
前記第1の導電材料と前記第2の導電材料とは異なる請求項1に記載の発光素子。
The first conductive material and the second conductive material contain a metal and contain a metal.
The light emitting element according to claim 1, wherein the first conductive material and the second conductive material are different from each other.
前記第1の電極第1の層の前記光線に対する反射率は、前記第1の電極第2の層の前記光線に対する反射率よりも大きい請求項3に記載の発光素子。 The light emitting device according to claim 3, wherein the reflectance of the first layer of the first electrode to the light rays is larger than the reflectance of the second layer of the first electrode to the light rays. 前記第2の導電型半導体層の前記活性層から離れた側に設けられる第2の導電型接触層をさらに含み、
前記第2の導電型接触層の材料は、酸化インジウム錫、酸化カドミウム錫、酸化アンチモン錫、酸化インジウム亜鉛、酸化亜鉛アルミニウム又は酸化亜鉛錫を含む請求項3に記載の発光素子。
Further including a second conductive contact layer provided on the side of the second conductive semiconductor layer away from the active layer.
The light emitting element according to claim 3, wherein the material of the second conductive contact layer contains indium tin oxide, cadmium oxide tin, antimony oxide, indium zinc oxide, zinc aluminum oxide or zinc oxide.
発光素子であって、
第1の導電型半導体層と、活性層と、第2の導電型半導体層とを含む半導体積層であって、前記半導体積層は凹溝と、平たい台とを含み、前記凹溝は前記第1の導電型半導体層を露出させる底部を有し、前記平たい台は上表面を有し、該上表面は前記第2の導電型半導体層の表面である、半導体積層と、
第1の導電材料を含み、前記平たい台の前記上表面の上に位置する第1の電極第1の層と、
前記凹溝の前記底部に位置する第2の電極と、
前記凹溝に位置し、且つ前記平たい台の前記上表面の一部の上に位置する第1の絶縁層であって、前記第1の絶縁層は前記第2の電極の上表面の一部を露出させるように第1の通路を含む、第1の絶縁層と、
第2の導電材料を含み、前記第2の導電型半導体層に電気的に接続され、前記第2の電極及び前記第1の電極第1の層を覆い、且つ前記第1の絶縁層の上に位置する第1の電極第2の層であって、前記発光素子の断面図において、前記第1の絶縁層は前記第1の電極第2の層と前記第2の電極との間に位置し、前記第1の電極第2の層は、前記第1の通路と重なり、且つ前記第2の電極の前記上表面の前記一部を露出させる第2の通路を含む、第1の電極第2の層と、
前記第1の電極第2の層を覆い、且つ前記第1の電極第2の層を露出させるように間隔領域を含む第2の絶縁層と、
前記第2の絶縁層の上に位置し、前記第1の導電型半導体層及び前記第2の導電型半導体層を覆い、且つ前記第1の電極第2の層に電気的に接続される第1の電極パッドと、
前記第2の電極の上に位置し、前記第1の導電型半導体層及び前記第2の導電型半導体層を覆い、且つ前記第2の電極に電気的に接続される第2の電極パッドと、を含む発光素子。
It is a light emitting element
A semiconductor laminate including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. The semiconductor laminate includes a concave groove and a flat base, and the concave groove is the first. The flat base has an upper surface, and the upper surface is the surface of the second conductive semiconductor layer.
A first layer of first electrodes comprising a first conductive material and located on the upper surface of the flatbed.
A second electrode located at the bottom of the groove and
A first insulating layer located in the recess and above a part of the upper surface of the flatbed, wherein the first insulating layer is a part of the upper surface of the second electrode. With a first insulating layer, including a first passage so as to expose
It contains a second conductive material, is electrically connected to the second conductive semiconductor layer, covers the second electrode and the first layer of the first electrode, and is on the first insulating layer. The second layer of the first electrode located in, and in the cross-sectional view of the light emitting element, the first insulating layer is located between the second layer of the first electrode and the second electrode. However, the first electrode second layer includes a second passage that overlaps with the first passage and exposes the part of the upper surface of the second electrode. 2 layers and
A second insulating layer that covers the second layer of the first electrode and includes an interval region so as to expose the second layer of the first electrode.
A second layer that is located on the second insulating layer, covers the first conductive semiconductor layer and the second conductive semiconductor layer, and is electrically connected to the second layer of the first electrode. 1 electrode pad and
With a second electrode pad located on the second electrode, covering the first conductive semiconductor layer and the second conductive semiconductor layer, and electrically connected to the second electrode. A light emitting element including.
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