JP6897296B2 - Power factor improvement circuit - Google Patents

Description

The present invention relates to a power factor improving circuit.

FIG. 6 is a circuit configuration diagram of a conventional power factor improving circuit (Patent Document 1). This power factor improvement circuit rectifies the AC voltage of the AC power supply 1 with the full-wave rectifier circuit 2, and switches the obtained rectified voltage via the smoothing capacitor C1 via the reactor L1, the primary winding P of the transformer T, and the MOSFET. It is supplied to the series circuit with the element Q1. The switching element Q1 is turned on and off by a PWM signal from the drive circuit 14.

A series circuit of the diode Do and the capacitor Co is connected to the series circuit of the transformer T and the switching element Q1. The diode Do and the capacitor Co form a rectifying and smoothing circuit, rectifying and smoothing the switching voltage generated at the connection point between the primary winding P of the transformer T and the diode Do, and outputting the rectified and smoothed voltage as an output voltage to the load RL. .. A series circuit of the resistor R1 and the resistor R2 is connected to both ends of the capacitor Co.

The transformer T includes a primary winding P connected to the drain of the switching element Q1 and a secondary winding S electromagnetically coupled to the primary winding P. The turns ratio between the primary winding P and the secondary winding S is 1: N (integer). A series circuit of the diode D1 and the resistor R5 is connected to both ends of the secondary winding S.

The voltage generated across the secondary winding S is converted into a voltage CS corresponding to the drain current of the switching element Q1 by the diode D1 and the resistor R5. The voltage CS corresponding to the drain current of the switching element Q1 is converted into a current VL corresponding to the current flowing through the reactor L1 by the conversion circuit 15. This current VL is input to the adder 12.

The power factor improving circuit further includes an error amplifier 10, a phase correction circuit H1, a phase correction circuit H2, a reference power supply Vref, a multiplier 11, an adder 12, a PWM comparator 13, and a drive circuit 14. The error amplifier 10 amplifies the error voltage between the reference voltage of the reference power supply Vref and the voltage obtained by dividing the output voltage of the load RL by the resistors R1 and R2, and outputs the voltage to the multiplier 11 as a COMP voltage. A phase correction circuit H1 is connected between the error amplifier 10 and the ground. The phase correction circuit H1 is a circuit for phase correction for improving control stability.

The multiplier 11 multiplies the AC input voltage from the full-wave rectifier circuit 2 by the voltage VAC divided by the resistors R3 and R4, the COMP voltage of the error amplifier 10, and the coefficient A, and sets the multiplied output VIREF as the input current target. It is output to the adder 12 as a value.

The adder 12 subtracts the input current VL generated from the current waveform flowing through the drain of the switching element Q1 from the multiplication output VIREF from the multiplier 11, and outputs the obtained value to the PWM comparator 13. A phase correction circuit H2 is connected between the adder 12 and the ground. The phase correction circuit H2 is a circuit for phase correction for improving control stability.

The PWM comparator 13 generates a PWM signal (pulse width modulation signal) by comparing the added output from the adder 12 with the triangular wave signal. The drive circuit 14 turns on / off the switching element Q1 by the PWM signal from the PWM comparator 13. In this way, a current similar to the input voltage is generated, and the power factor improving operation is performed.

Further, in the power factor improving circuit described in Patent Document 2, the resistance ratio of the AC input voltage input to the IC is switched according to the level of the input voltage.

Japanese Unexamined Patent Publication No. 2-7869 Japanese Unexamined Patent Publication No. 2012-1358080

However, in Patent Document 1, since the multiplier 11 multiplies the input voltage from the full-wave rectifier circuit 2 with the COMP voltage of the error amplifier 10, the COMP voltage of the error amplifier 10 depends on the input voltage. When the output power is kept constant and the input voltage is increased, the input current is the output power divided by the input voltage, so the input current decreases. Therefore, the output of the multiplier 11 also decreases.

Further, when the input voltage is increased by the multiplier 11, the output of the error amplifier is decreased. Therefore, the COMP voltage of the error amplifier 10 is inversely proportional to the square of the AC input voltage. Therefore, when the input voltage is low, the output power cannot be obtained up to the desired power due to the limit of the dynamic range of the multiplier 11 and the error amplifier 10.

Further, when the input voltage is high, the influence of the ripple of the COMP voltage of the error amplifier 10 due to the output voltage ripple becomes large due to the decrease of the COMP voltage of the error amplifier 10, and the target of the sine wave generated by multiplying the COMP voltage and the VAC voltage. The current is distorted and the power factor decreases.

Further, when the input voltage is high, the error amplifier 10 operates in a range where the COMP voltage is small, which causes a decrease in power factor and difficulty in control. Therefore, the input voltage range could not be widened.

In Patent Document 2, the switching of the resistance ratio becomes discontinuous, and there is a possibility that the switching becomes unstable near the switching of the input voltage. Further, a filter having a long time constant capable of generating a full-wave rectified waveform of commercial AC 50 Hz is required, and when the filter is incorporated into an IC, the complexity or chip size becomes large.

An object of the present invention is to provide a power factor improving circuit that reduces the dependence of the output of an error amplifier on an input voltage and provides a high power factor over a wide input voltage range.

The power factor improving circuit according to the present invention is connected to a rectifier circuit that rectifies the AC voltage of an AC power supply, a transformer having a primary winding and a secondary winding, and both ends of the output of the rectifier circuit, and is connected to a reactor and the transformer. A series circuit in which the primary winding and the switching element are connected in series, a rectifying and smoothing circuit in which the primary winding of the transformer and the switching element are connected in series, and a rectifying element and a smoothing capacitor, and the above. A multiplier that multiplies the error voltage between the output voltage of the smoothing capacitor and the reference voltage and the output voltage of the rectifier circuit, a coefficient multiplier circuit that multiplies the output of the multiplier by the first coefficient, and a first from the coefficient multiplier circuit. From the adder that outputs the added output obtained by adding the output of the rectifier circuit to the output of the multiplier multiplied by one coefficient to the multiplier, and the output of the multiplier and the secondary winding of the transformer. It is characterized by including a control circuit that generates a pulse signal based on the converted current and turns the switching element on and off by the pulse signal.

Further, the power factor improvement circuit according to the present invention is a series of a rectifier circuit that rectifies the AC voltage of the AC power supply and a reactor, a switching element, and a current detection resistor connected in series at both ends of the output of the rectifier circuit. A rectifying and smoothing circuit connected to a circuit, a series circuit of the switching element and the current detection resistor, and composed of a rectifying element and a smoothing capacitor, an error voltage between the output voltage and the reference voltage of the smoothing capacitor, and an output of the rectifying circuit. A multiplier that multiplies the voltage, a coefficient-multiplier circuit that multiplies the output of the multiplier by the first coefficient, and the output of the rectifier circuit is added to the output of the multiplier that is multiplied by the first coefficient from the coefficient-multiplier circuit. A pulse signal is generated based on the adder that outputs the added output obtained as a result to the multiplier and the output of the multiplier and the voltage generated at both ends of the current detection resistor, and the switching element is generated by the pulse signal. It is characterized by including a control circuit for turning it on and off.

Further, the power factor improving circuit according to the present invention is a series in which a rectifier circuit that rectifies the AC voltage of an AC power supply and a reactor, a switching element, and a current detection resistor are connected in series at both ends of the output of the rectifier circuit. A circuit, a rectifying and smoothing circuit connected to a series circuit of the switching element and the current detection resistor and composed of a rectifying element and a smoothing capacitor, and a conversion circuit for converting the current flowing through the current detecting resistor into the current flowing through the reactor. From the multiplier that multiplies the error voltage between the output voltage of the smoothing capacitor and the reference voltage and the output voltage of the rectifier circuit, the coefficient multiplying circuit that multiplies the output of the multiplier by the first coefficient, and the coefficient multiplying circuit. The adder that outputs the added output obtained by adding the output of the rectifier circuit to the output of the multiplier multiplied by the first coefficient of the above to the multiplier, and the output of the multiplier and the conversion circuit are converted. It is characterized by including a control circuit that generates a pulse signal based on a signal corresponding to a current flowing through the reactor and turns the switching element on and off by the pulse signal.

According to the present invention, the coefficient multiplier circuit is obtained by multiplying the output of the multiplier by the first coefficient, and the adder is obtained by adding the output of the rectifier circuit to the output of the multiplier multiplied by the first coefficient from the coefficient multiplier circuit. Output the added output to the multiplier.

When the input voltage rises, the output of the rectifier circuit rises, but when the output power is constant, the input current falls. Since the multiplier output and the input current are proportional, by inputting the additive output, which is the sum of the output of the rectifier circuit and the multiplier output, to the multiplier, the input voltage fluctuation of the input signal level is canceled out. , The fluctuation of the output of the error amplifier can be suppressed. That is, by feeding back the multiplier output, it is possible to reduce the fluctuation of the output of the error amplifier with respect to the input voltage. This makes it possible to obtain a high power factor over a wide input voltage range.

It is a circuit block diagram of the power factor improvement circuit which concerns on Example 1 of this invention. It is a figure which shows the characteristic of the output voltage of the error amplifier with respect to the AC input voltage of the power factor improvement circuit which concerns on Example 1 of this invention. It is a figure which shows the characteristic of the output voltage of an error amplifier with respect to the output power of the power factor improvement circuit which concerns on Example 1 of this invention. It is a circuit block diagram of the power factor improvement circuit which concerns on Example 2 of this invention. It is a circuit block diagram of the power factor improvement circuit which concerns on Example 3 of this invention. It is a circuit block diagram of the conventional power factor improvement circuit. It is a figure which shows the characteristic of the output voltage of an error amplifier with respect to the AC input voltage of the conventional power factor improvement circuit. It is a figure which shows the characteristic of the output voltage of an error amplifier with respect to the output power of a conventional power factor improvement circuit.

Hereinafter, the power factor improving circuit according to the embodiment of the present invention will be described in detail with reference to the drawings.

(Example 1)
FIG. 1 is a circuit configuration diagram of a power factor improving circuit according to a first embodiment of the present invention. The power factor improving circuit according to the first embodiment is characterized in that a C times circuit 3 and an adder 4 are added to the circuit configuration diagram of the conventional power factor improving circuit shown in FIG.

Since the configurations other than the C-fold circuit 3 and the adder 4 have already been described in FIG. 6, only the configurations of the C-fold circuit 3 and the adder 4 will be described here. The PWM comparator 13 corresponds to the control circuit of the present invention.

The C-fold circuit 3 multiplies the output of the multiplier 11 by the first coefficient C and outputs it to the adder 4. In the C-multiplier circuit 3, for example, a series circuit including a first resistor and a second resistor (not shown) is connected to both ends of the output of the multiplier 11, and the output of the multiplier 11 is output from the connection point between the first resistor and the second resistor. Is multiplied by the first coefficient C, and the voltage is taken out and output to the adder 4.

The adder 4 is an addition obtained by adding the voltage VAC obtained by dividing the output of the full-wave rectifier circuit 2 by the resistors R3 and R4 to the output of the multiplier 11 multiplied by the first coefficient C from the C multiplier circuit 3. The output is output to the multiplier 11.

Next, the operation of the power factor improving circuit according to the first embodiment configured in this way will be described. First, let the output of the multiplier 11 be VIREF. The C-multiplier circuit 3 multiplies the output VIREF of the multiplier 11 by the first coefficient C and outputs it to the adder 4. Therefore, the voltage of C / VIREF is input to the adder 4.

Next, the adder 4 adds the voltage VAC obtained by dividing the output of the full-wave rectifier circuit 2 by the resistors R3 and R4 to the output C / VIREF of the multiplier 11 multiplied by the first coefficient C from the C-fold circuit 3. The addition output obtained in this manner is multiplied by the second coefficient B and output to the multiplier 11. Therefore, the voltage of B (C · VIREF + VAC) is input to the multiplier 11.

Next, the multiplier 11 multiplies the voltage of B (C · VIREF + VAC) from the adder 4 by the third coefficient A and the COMP voltage of the error amplifier 10. Since this multiplication output becomes the voltage VIREF, the equation (1) holds.

A ・ B (C ・ VIREF + VAC) COMP = VIREF… (1)
From equation (1), COMP = VIREF / {AB (C ・ VIREF + VAC)} ... (2)
For VIREF, when the conversion impedance of the reactor current IL to VL is Rx (VL = Rx · IL), the equation (3) is established.

VIREF = Rx ・ IL = Rx ・ Po / Vin… (3)
Here, Vin is the input voltage and Po is the output power. From the equations (2) and (3), the COMP voltage of the error amplifier 10 for each input voltage Vin and output power Po can be obtained.

VAC = R3 · Vin / (R3 + R4) = k · Vin ... (4)
Then, by substituting the VIREF of the equation (2) and the VAC of the equation (4) into the equation (3),
COMP = (Rx ・ Po / Vin) / {A ・ B (C ・ Rx ・ Po / Vin + k ・ Vin)} = 1 / {A ・ B (C + k ・ Vin ² / Rx ・ Po)}… (5)
As can be seen from the equation (5), since the coefficient C is included in the denominator, when the input voltage Vin is small, the degree of inverse proportionality to the square of the input voltage Vin decreases. Therefore, the dependence of the input voltage Vin can be reduced by appropriately setting the coefficient A, the coefficient B, and the coefficient C.

When the coefficient C = 0, the circuit is the same as the conventional circuit shown in FIG. 6 without a feedback path for the output of the multiplier 11.

The COMP voltage of the conventional circuit shown in FIG. 6 is
COMP = Rx ・ Po / A ・ k ・ Vin ² … (6)
As can be seen from the equation (6), the COMP voltage decreases in inverse proportion to the square of the input voltage Vin.

For simplicity, assuming a DC input, A, B, C, and Rx are determined so that the COMP voltage <2.5V when Vin = 85VPo = 1800W. The constants Rx = 0.05, A = 1 / 2.5, B = 0.68, C = 1, VAC = Vin / 160. When Vin = 85VPo = 1800W, the COMP voltage = 2.45V. On the other hand, the COMP voltage when Vin = 265VPo = 4400W is 1.22V from the equation (5).

For comparison, in the case of 85V input Po = 1800W in the conventional circuit diagram 6, if the constant is determined so that the COMP voltage is about 2.5V, Rx = 0.025, A = 1 / 2.5, VAC = Vin. Set to / 160.

The COMP voltage of the conventional circuit is 0.63V, and the COMP voltage of the circuit of the first embodiment can be higher than the COMP voltage of the conventional circuit.

FIG. 2 shows the characteristics of the output voltage of the error amplifier with respect to the AC input voltage of the power factor improving circuit according to the first embodiment. FIG. 3 shows the characteristics of the output voltage of the error amplifier with respect to the output power of the power factor improving circuit according to the first embodiment. FIG. 7 shows the characteristics of the output voltage of the error amplifier with respect to the AC input voltage of the conventional power factor improving circuit. FIG. 8 shows the characteristics of the output voltage of the error amplifier with respect to the output power of the conventional power factor improving circuit.

As shown in FIG. 2, the COMP voltage is larger than that of the conventional one even when a high voltage is input. Therefore, the power factor improving circuit according to the first embodiment has a higher power factor than the conventional circuit, and can be controlled more stably with respect to noise.

As described above, according to the power factor improving circuit according to the first embodiment, the C multiplier circuit 3 multiplies the output of the multiplier 11 by the first coefficient C, and the adder 4 multiplies the output of the C multiplier circuit 3 by the first coefficient C. The added output obtained by adding the voltage VAC obtained by dividing the voltage of the full-wave rectifying circuit 2 by resistance to the output of the multiplier 11 is output to the multiplier 11.

When the input voltage rises, the voltage VAC of the full-wave rectifier circuit 2 rises, but when the output power is constant, the input current falls. Since the multiplier output and the input current are proportional, the input voltage fluctuation of the level of the input signal is obtained by inputting the additive output obtained by adding the voltage VAC of the full-wave rectifier circuit 2 and the multiplier output to the multiplier 11. Are in the direction of canceling each other out, and fluctuations in the output of the error amplifier 10 can be suppressed.

In addition, when the input voltage drops, a large amount of target input current signal is added to the voltage VAC to compensate for the drop in the input voltage on the VAC side and reduce the change in the COMP voltage with respect to the change in the input voltage. Operate.

That is, by feeding back the multiplier output, it is possible to reduce the fluctuation of the output of the error amplifier 10 with respect to the input voltage.

Further, by setting the coefficient A, the coefficient B, and the coefficient C so that the output decrease of the error amplifier 10 is equal to or less than a predetermined value, the COMP voltage at the low input voltage is kept as it is, and the COMP voltage at the high input voltage is set. Can be raised.

(Example 2)
FIG. 4 is a circuit configuration diagram of the power factor improving circuit according to the second embodiment of the present invention. In the power factor improvement circuit according to the second embodiment, the transformer T, the diode D1 and the resistor R5 of the power factor improvement circuit according to the first embodiment are deleted, and the current detection resistor Rd is connected between the source and the ground of the switching element Q1. did.

The current detection resistor Rd detects the current flowing through the reactor L1 and outputs it to the adder 12a. The adder 12a subtracts the current flowing through the switching element Q1 detected by the current detection resistor Rd from the output VIREF of the multiplier 11, and outputs the obtained value to the PWM comparator 13.

Since the other configurations and operations of the power factor improving circuit according to the second embodiment shown in FIG. 4 are the same as the configurations and operations of the power factor improving circuit according to the first embodiment shown in FIG. 1, the description thereof will be omitted.

As described above, the power factor improving circuit according to the second embodiment also has the same effect as the effect of the power factor improving circuit according to the first embodiment.

(Example 3)
FIG. 5 is a circuit configuration diagram of a power factor improving circuit according to a third embodiment of the present invention. The power factor improvement circuit according to the third embodiment has a conversion circuit 16 between the connection point between the source of the switching element Q1 and the current detection resistor Rd and the adder 12a with respect to the power factor improvement circuit according to the second embodiment. Connected.

The conversion circuit 16 inputs the current flowing through the current detection resistor Rd, converts the current flowing through the current detection resistor into the current flowing through the reactor L1, and outputs the current to the adder 12a. The adder 12a subtracts the current flowing through the reactor L1 converted by the conversion circuit 16 from the output VIREF of the multiplier 11, and outputs the obtained value to the PWM comparator 13.

Since the other configurations and operations of the power factor improving circuit according to the third embodiment shown in FIG. 5 are the same as the configurations and operations of the power factor improving circuit according to the first embodiment shown in FIG. 1, the description thereof will be omitted.

As described above, the power factor improving circuit according to the third embodiment also has the same effect as the effect of the power factor improving circuit according to the first embodiment.

1 AC power supply 2 Full-wave rectifier circuit 3 C times circuit 10 Error amplifier 11 Multiplier 4, 12 Adder 13 PWM comparator 14 Drive circuit 16 Conversion circuit L1 Reactor Q1 Switching element T Transformer D1 Diode Co, C1, C2 Capacitor P Primary winding Wire S Secondary winding R1 to R4 Resistance RL Load Rd Current detection resistance

Claims (5)

A rectifier circuit that rectifies the AC voltage of the AC power supply,
A transformer with a primary winding and a secondary winding,
A series circuit connected to both ends of the output of the rectifier circuit, and the reactor, the primary winding of the transformer, and the switching element connected in series,
A rectifying and smoothing circuit that is connected to a series circuit of the transformer's primary winding and the switching element and consists of a rectifying element and a smoothing capacitor.
A multiplier that multiplies the error voltage between the output voltage of the smoothing capacitor and the reference voltage and the output voltage of the rectifier circuit.
A coefficient multiplication circuit that multiplies the output of the multiplier by the first coefficient,
An adder that outputs an added output obtained by adding the output of the rectifying circuit to the output of the multiplier multiplied by the first coefficient from the coefficient multiplying circuit and outputs the added output to the multiplier.
A control circuit that generates a pulse signal based on the current converted from the output of the multiplier and the voltage generated in the secondary winding of the transformer, and turns the switching element on and off by the pulse signal.
A power factor improving circuit characterized by being equipped with. A rectifier circuit that rectifies the AC voltage of the AC power supply,
A series circuit connected to both ends of the output of the rectifier circuit and a reactor, a switching element, and a current detection resistor connected in series,
A rectifying and smoothing circuit connected to a series circuit of the switching element and the current detection resistor and composed of a rectifying element and a smoothing capacitor.
A multiplier that multiplies the error voltage between the output voltage of the smoothing capacitor and the reference voltage and the output voltage of the rectifier circuit.
A coefficient multiplier circuit that multiplies the output of the multiplier by the first coefficient,
An adder that outputs an added output obtained by adding the output of the rectifying circuit to the output of the multiplier multiplied by the first coefficient from the coefficient multiplying circuit and outputs the added output to the multiplier.
A control circuit that generates a pulse signal based on the output of the multiplier and the voltage generated across the current detection resistor and turns the switching element on and off by the pulse signal.
A power factor improving circuit characterized by being equipped with. A rectifier circuit that rectifies the AC voltage of the AC power supply,
A series circuit connected to both ends of the output of the rectifier circuit and a reactor, a switching element, and a current detection resistor connected in series,
A rectifying and smoothing circuit connected to a series circuit of the switching element and the current detection resistor and composed of a rectifying element and a smoothing capacitor.
A conversion circuit that converts the current flowing through the current detection resistor into the current flowing through the reactor.
A multiplier that multiplies the error voltage between the output voltage of the smoothing capacitor and the reference voltage and the output voltage of the rectifier circuit.
A coefficient multiplication circuit that multiplies the output of the multiplier by the first coefficient,
An adder that outputs an added output obtained by adding the output of the rectifying circuit to the output of the multiplier multiplied by the first coefficient from the coefficient multiplying circuit and outputs the added output to the multiplier.
A control circuit that generates a pulse signal based on the output of the multiplier and a signal corresponding to the current flowing through the reactor converted by the conversion circuit, and turns the switching element on and off by the pulse signal.
A power factor improving circuit characterized by being equipped with. The adder multiplies the adder by a second coefficient and
The multiplier 1 or claim 2 or the present invention comprises multiplying the error voltage, the third coefficient, and the multiplication result of the second coefficient from the adder and the addition output. The power factor improving circuit according to claim 3. Wherein the first coefficient and the second coefficient and the third coefficient, power factor correction circuit of claim 4, wherein the reduction in the output of the error amplifier is characterized in that it is set to be equal to or less than the predetermined value.

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