JP6879042B2 - Manufacturing method of light emitting device - Google Patents

Description

The present invention relates to a method for manufacturing a light emitting device.

A semiconductor light emitting device having a substrate and a semiconductor laminate on the substrate is known. The semiconductor laminate in the semiconductor light emitting device generally includes an n-type semiconductor layer grown on a substrate, a p-type semiconductor layer, and an active layer between them. Electrodes and the like for feeding power are provided on the n-type semiconductor layer and the p-type semiconductor layer.

A structure in which semiconductor laminates are arranged at a plurality of locations on the same substrate has been proposed. For example, Patent Document 1 below discloses a light emitting device including a plurality of blue light emitting units arranged in a matrix.

Japanese Unexamined Patent Publication No. 2015-026731

There is a demand for a light emitting device in which the difference in brightness between the light emitting unit in the light emitting state and the light emitting unit in the non-light emitting state is clearer.

The present invention provides a method for manufacturing a light emitting device in which the difference in brightness between the light emitting portion and the non-light emitting portion is clearer.

In the method for manufacturing a wavelength conversion member according to one aspect of the present invention, a wafer having a substrate and a plurality of semiconductor laminates arranged two-dimensionally on one main surface of the substrate and each having a light emitting portion is prepared. A step, a step of removing a portion of the substrate located between the plurality of light emitting portions in a plan view to form a groove portion in the substrate, a step of filling the groove portion with a light-reflecting member, and removal. It has a step of removing the substrate remaining without being used.

According to the method for manufacturing a light emitting device according to one aspect of the present invention, it is possible to relatively easily manufacture a light emitting device in which the difference in brightness between the light emitting portion and the non-light emitting portion is clearer.

It is a schematic top view of the exemplary light emitting device obtained by the manufacturing method according to an embodiment of the present invention. It is a schematic bottom view of the light emitting device 100 shown in FIG. FIG. 3A is a diagram schematically showing an example of a cross section of IIIA-IIIA'of FIG. FIG. 3A is a diagram schematically showing an example of a cross section of IIIB-IIIB'of FIG. It is a flowchart which shows the outline of the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic top view which shows the part of the array of the semiconductor laminated body 120 enlarged after forming a groove part. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view for demonstrating the manufacturing method of the light emitting device by an embodiment of this invention. It is a schematic cross-sectional view when the light emitting device which aligned the position of the bottom surface of the groove portion with the position of the upper surface of the reflection layer is cut at the position of the line IIIA-IIIA'shown in FIG. It is a schematic cross-sectional view when the light emitting device which aligned the position of the bottom surface of the groove portion with the position of the upper surface of the reflection layer is cut at the position of the line IIIB-IIIB'shown in FIG.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following embodiments are examples, and the present invention is not limited to the following embodiments. For example, the numerical values, shapes, materials, steps, the order of the steps, and the like shown in the following embodiments are merely examples, and various modifications can be made as long as there is no technical contradiction.

First, the configuration of the light emitting device 100 obtained by the manufacturing method of the present embodiment will be described with reference to FIGS. 1, 2, 3A and 3B. For reference, FIGS. 1, 2, 3A and 3B show x-axis, y-axis and z-axis that are orthogonal to each other. Other drawings may also show the x-axis, y-axis and z-axis.

FIG. 1 is a schematic top view of the light emitting device 100. FIG. 1 is a schematic bottom view of the light emitting device 100. FIG. 3A schematically shows a cross section when the light emitting device 100 is cut at the position of the line IIIA-IIIA'of FIG. 1, and FIG. 3B shows the cross section of the light emitting device 100 when the light emitting device 100 is cut at the position of the line IIIB-IIIB' of FIG. The cross section is schematically shown. As will be described later, the light emitting device 100 has a light reflecting resin layer 190 on the bottom surface side, but in FIG. 2, for convenience of explanation, the light emitting device 100 is excluded from the light reflecting resin layer 190. The structure of is illustrated.

In the light emitting device 100, a plurality of semiconductor laminates 120 are arranged two-dimensionally. The semiconductor laminate 120 includes an n-type semiconductor layer 122n which is a first semiconductor layer and a p-type semiconductor layer 122p which is a second semiconductor layer. In addition, in FIGS. 3A and 3B, in the adjacent semiconductor laminate 120, the p-type semiconductor layer 122p is completely separated, while the n-type semiconductor layer 122n is partially connected. However, since the main parts of the n-type semiconductor layer 122n included in one semiconductor structure 120 are separated from each other for each semiconductor structure 120, the n-type semiconductor layer 122n is partially separated as shown in FIGS. 3A and 3B. Even if the structure is connected to each other, the adjacent semiconductor laminates 120 are treated as individual ones.

In this example, each of the semiconductor laminates 120 has a square shape when viewed from above. The length of one side of the square shape may be in the range of, for example, about 15 μm or more and 600 μm or less. The semiconductor laminate 120 further includes an n-side electrode 136n and a p-side electrode 136p, and each of the semiconductor laminates 120 functions as one light emitting element. In this example, the outer shape of the light emitting device 100 is also square. The size of one side of the square light emitting device 100 can be, for example, about 4.2 mm. Of course, the number and shape of the semiconductor laminate 120 in the light emitting device 100 can be arbitrarily set, and the shape of the light emitting device 100 may also be arbitrarily set. Further, the shape and size of the semiconductor laminate in the light emitting device 100 may be common to all of them, or the semiconductor laminates 120 having different shapes and / or sizes may be mixed in the light emitting device 100. Good.

The light emitting unit 100e is a portion of each semiconductor laminate 120 in which the first semiconductor layer and the second semiconductor layer overlap. Each semiconductor laminate 120 includes one light emitting unit 100e. As shown in FIG. 3A, the semiconductor laminate 120 includes a first region R1 in which the n-type semiconductor layer 122n is not covered by the p-type semiconductor layer 122p and a second region R2 in which the p-type semiconductor layer 122p is covered. Including. In this second region R2, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are laminated in this order, which corresponds to the light emitting unit 100e described above.

In the example shown in FIG. 1, the light emitting device 100 includes a total of 64 light emitting units 100e in which eight light emitting units 100e are arranged along the row direction and the column direction. In the present specification, the "row direction" refers to the direction in which the rows of the plurality of light emitting units 100e extend (the left-right direction of the paper surface in FIG. 1), and the "column direction" refers to the direction in which the columns of the plurality of light emitting units 100e extend. Refers to the direction (vertical direction of the paper surface in FIG. 1).

In the configuration illustrated in FIG. 1, the two light emitting units 100e adjacent to each other are separated from each other, and a part of the reflection layer 130 described later is interposed between the two light emitting units 100e adjacent to each other. Here, a part of the reflection layer 130 appears in a grid shape between two light emitting units 100e adjacent to each other in a matrix-like arrangement of the light emitting units 100e. The width W of the portion of the reflective layer 130 that appears between the two light emitting portions 100e adjacent to each other can be appropriately set in a range of, for example, about 1 μm or more and 1000 μm or less.

By separating the two light emitting units 100e adjacent to each other by the reflective layer 130, for example, when one of the two light emitting units 100e adjacent to each other is turned on and the other is turned off, the light straddling the reflective layer 130. Leakage can be reduced. This is useful because it makes it easier to recognize patterns such as figures and characters drawn by the lit light emitting unit 100e. Hereinafter, in the light emitting device 100, the region where the repeating structure of the light emitting unit 100e is located may be referred to as a display region Rr. It is also possible to use the light emitting device 100 as a surface light source by lighting all the light emitting units 100e in the display area Rr, for example.

As shown in FIGS. 3A and 3B, a light reflecting member 210 is provided between the plurality of light emitting portions 100e on the upper surface of the semiconductor laminate 120. The light reflecting member 210 is formed in a grid pattern having an opening surrounding the light emitting portion 100e. By surrounding the light extraction surface of the light emitting portion 100e with the light reflecting member 210, the difference in brightness between the light emitting portion and the non-light emitting portion can be made clearer. In the following, the fact that the difference in brightness between the light emitting portion and the non-light emitting portion becomes clear is also simply referred to as "good closeout".

The light emitting device 100 may have a peripheral region Rp outside the display region Rr composed of a plurality of light emitting units 100e. In the configuration illustrated in FIG. 1, a plurality of terminal portions 100s and 100t for power supply are provided in the peripheral region Rp. In this example, eight terminal portions 100s are linearly arranged on the upper side of the display area Rr along the row direction of the plurality of light emitting units 100e arranged in a matrix, and a plurality of terminal portions 100s are arranged on the right side of the display area Rr. Eight terminal portions 100t are linearly arranged along the row direction of the light emitting portion 100e. Needless to say, the arrangement of the terminal portion 100s and the arrangement of the terminal portion 100t are not limited to a linear shape.

As shown in FIG. 2, the light emitting device 100 includes a plurality of first wirings 160w arranged in each column of the plurality of semiconductor laminates 120, and a plurality of second wires arranged in each row of the plurality of semiconductor laminates 120. It has a wiring of 180w. Here, each of the first wirings 160w extends in the row direction of the matrix-like arrangement of the semiconductor laminate 120, and eight light emitting structures 120 arranged in the row direction are electrically connected to each other. Each first wiring 160w is electrically connected to the p-type semiconductor layer of the semiconductor laminate 120 arranged along the column direction. The first wiring 160w may be called the p-side wiring. On the other hand, each of the second wirings 180w extends in the row direction of the matrix-like arrangement of the semiconductor laminates 120, and electrically connects the n-type semiconductor layers of the semiconductor laminates 120 arranged in the row direction to each other. The second wiring 180w may be called the n-side wiring.

In this example, one end of each first wiring 160w extends to the position of the terminal portion 100s arranged in the peripheral region Rp (see FIG. 1). Similarly, one end of each second wiring 180w extends to the position of the terminal portion 100t arranged in the peripheral region Rp (see FIG. 1).

The first wiring 160w and each second wiring 180w are electrically separated from each other by interposing a second insulating layer 170 between them. That is, FIG. 2 illustrates a configuration of wiring capable of so-called passive matrix drive, and according to such a wiring configuration, a part of the light emitting unit 100e of the light emitting unit 100e in the light emitting device 100 is used. It can be selectively supplied with current. Therefore, light can be selectively emitted from a part of the light emitting unit 100e in the display area Rr.

As shown in FIGS. 3A and 3B, the light emitting device 100 includes a plurality of semiconductor laminates 120 supported by a light reflecting resin layer 190 and a light reflecting resin layer 190, each having a light emitting portion 100e, and a plurality of semiconductor laminates 120. Between the light emitting portions 100e, there is a light reflecting member 210 provided on the side opposite to the side where the light reflecting resin layer 190 of the semiconductor laminate is provided.

As shown in FIG. 3A, each of the semiconductor laminate 120 has an n-type semiconductor layer 122n, a p-type semiconductor layer 122p, an active layer 122a sandwiched between the n-type semiconductor layer 122n and the p-type semiconductor layer 122p, and p. The entire surface electrode layer 124e provided so as to cover substantially the entire upper surface of the type semiconductor layer 122p is included. The n-side electrode 136n is connected to the n-type semiconductor layer 122n, and the p-side electrode 136p is connected to the p-type semiconductor layer 122p via the entire surface electrode layer 124e. The n-side electrode 136n and the p-side electrode 136p penetrate the reflective layer 130. In this example, the semiconductor laminates 120 adjacent to each other are connected by an n-type semiconductor layer 122n. The light-reflecting member 210 is formed on the surface of the n-type semiconductor layer 122n on the side opposite to the side where the light-reflective resin layer 190 of the semiconductor laminate 120 is provided.

As the semiconductor laminate 120, a structure that emits light having an arbitrary wavelength can be selected. For example, by forming an n-type semiconductor layer 122n, a p-type semiconductor layer 122p, and an active layer 122a using a nitride-based semiconductor (InxAlyGa1-x-yN, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1), blue color. A semiconductor laminate that emits green light can be obtained. Red light can be obtained by forming a semiconductor laminate containing semiconductors such as GaAlAs, AlInGaP, GaAsP, and GaP. Hereinafter, the case where all the semiconductor laminates 120 emit blue light will be described, but it goes without saying that a plurality of types of light emitting structures that emit light of different colors may be included. For example, the light emitting device may include three types of semiconductor laminates 120 that emit red, blue, and green light, respectively.

The reflective layer 130 substantially covers the side portion and the bottom portion of the semiconductor laminate 120, and among the light emitted from the semiconductor laminate 120, the light directed to the side portion or the bottom portion of the semiconductor laminate 120 is opposite to the bottom portion. (Here, the positive direction of z) is reflected. The reflective layer 130 includes, for example, a single-layer or multi-layer metal film, or a dielectric multilayer film in which two or more kinds of dielectric films are laminated. From the viewpoint of light utilization efficiency, absorption can be reduced as compared with a metal film, so it is beneficial to use a dielectric multilayer film as the reflective layer 130. The dielectric multilayer film as the reflective layer 130 includes, for example, two or more selected from the group consisting of a SiO2 film, a TiO2 film, and an Nb2O5 film. The reflective layer 130 may contain Al2O3. When a metal film is applied as the reflective layer 130, for example, Ti, Al, Ag or the like can be used as the material of the reflective layer 130.

In the configurations illustrated in FIGS. 3A and 3B, a light-reflecting resin layer 190 is further arranged on the bottom side of the semiconductor laminate 120 (which may be referred to as the bottom side of the light emitting device 100). The light-reflecting resin layer 190 is, for example, a resin layer in which a light-reflective filler is dispersed, and has a function of reflecting downward light in a direction opposite to the bottom, like the reflective layer 130. .. The reflectance of the light-reflecting resin layer 190 with respect to light from the semiconductor laminate 120 is, for example, 60% or more. The reflectance for light from the semiconductor laminate 120 may be 70% or more, 80% or 90% or more, and may be appropriately set.

A first insulating layer 150A, a p-side wiring layer 160, a second insulating layer 170, and an n-side wiring layer 180 are arranged between the reflective layer 130 and the light-reflecting resin layer 190. The first insulating layer 150A is located between the reflective layer 130 and the p-side wiring layer 160. On the other hand, the second insulating layer 170 is located between the p-side wiring layer 160 and the n-side wiring layer 180, and electrically separates them.

The p-side wiring layer 160 has the above-mentioned first wiring 160w and a plurality of vias 160v having one end connected to the first wiring 160w. Vias 160v are provided for each p-type semiconductor layer 122p of the semiconductor laminate 120, and the other end is connected to a p-side electrode 136p electrically connected to the p-type semiconductor layer 122p. As can be seen with reference to FIG. 3B, the first wiring 160w electrically connects the p-type semiconductor layers 122p of the plurality of semiconductor laminates 120 arranged in the column direction to each other via the via 160v.

Here, the first wiring 160w extends to the position of the terminal portion 100s in the same row. As shown in FIG. 2, the p-side connection terminal 126p is arranged at the position of the terminal portion 100s. The first wiring 160w extends to a position where at least a part thereof overlaps with the p-side connection terminal 126p. The p-side connection terminal 126p is electrically connected to the p-type semiconductor layer 122p of a plurality of semiconductor laminates 120 belonging to the same row by the first wiring 160w.

See FIG. 3A again. The n-side wiring layer 180 has the above-mentioned second wiring 180w and a plurality of vias 180v having one end connected to the second wiring 180w. Vias 180v are provided for each n-type semiconductor layer 122n of the light emitting structure 120, and the other end is connected to an n-side electrode 136n electrically connected to the n-type semiconductor layer 122n. The second wiring 180w electrically connects the n-type semiconductor layers 122n of the plurality of semiconductor laminates 120 arranged in the row direction to each other via the via 180v.

Here, paying attention to the peripheral region Rp, the second wiring 180w extends to the position of the terminal portion 100t in the same line, and at least a part thereof overlaps the n-side connection terminal 126n arranged in the terminal portion 100t. The n-side connection terminal 126n is electrically connected to the n-type semiconductor layer 122n of a plurality of semiconductor laminates 120 belonging to the same row by the second wiring 180w.

The p-side wiring layer 160 and the n-side wiring layer 180 can be formed by patterning the metal film obtained by the deposition after the metal material is deposited. The first wiring 160w in the p-side wiring layer 160 and the second wiring 180w in the n-side wiring layer 180 may have a laminated structure including a plurality of metal layers (for example, a laminated structure of Ti / Rh / Au / Ti). .. Of course, the configurations of the first wiring 160w and the second wiring 180w do not have to be the same.

By applying a voltage between the p-side connection terminal 126p and the n-side connection terminal 126n, the first wiring electrically connected to the n-side connection terminal 126n to which the voltage is applied among the plurality of first wirings 160w. Of the 160w and the plurality of second wirings 180w, the current is selectively supplied to the semiconductor laminate 120 at the position where the second wiring 180w electrically connected to the p-side connection terminal 126p to which the voltage is applied intersects. can do. That is, it is possible to selectively supply a current to the desired semiconductor laminate 120 in the light emitting device 100 to emit light from the semiconductor laminate 120.

In the structures illustrated in FIGS. 3A and 3B, the light from the light emitting unit 100e is taken out upward on the paper surface. By covering the bottom and side portions of each semiconductor laminate 120 with the reflective layer 130, it is possible to suppress the emission of light from the bottom surface and side surfaces of the light emitting device and improve the light utilization efficiency. Further, since the reflection layer 130 can be arranged between the light emitting units 100e adjacent to each other, when a part of the light emitting units 100e among the plurality of light emitting units 100e is selectively emitted, the non-light emitting region from the light emitting region is emitted. It can suppress the leakage of light to. Further, by arranging the light reflecting member 210 between the plurality of light emitting portions 100e on the upper surface of the semiconductor laminate 120 on the light emitting side, light leakage from the light emitting region to the non-light emitting region is effectively performed. Can be suppressed. As a result, it is possible to obtain a light emitting device having a good parting property and a good brightness distribution.

(Manufacturing method of light emitting device)
Hereinafter, an exemplary manufacturing method of the light emitting device 100 will be described.

FIG. 4 shows an outline of a method for manufacturing a light emitting device according to the present embodiment. The method for manufacturing the light emitting device shown in FIG. 4 is roughly a step of preparing a wafer having a substrate and a plurality of semiconductor laminates on the substrate (step S1) and a step of removing the substrate to form a groove. (Step S2) includes a step of filling the groove with a light-reflecting member (step S3), and a step of removing the substrate remaining without being removed (step S4). Hereinafter, the details of each step will be described with reference to FIGS. 5A to 9B. 5A, 6A and 7A schematically show a cross section at the position of the line AA'in FIG. 2, and FIGS. 5B, 6B and 7B show the cross section of the line BB' in FIG. The cross section at the position is schematically shown. Further, FIG. 9A schematically shows a cross section at the position of the line IIIA-IIIA'of FIG. 1, and FIG. 9B schematically shows a cross section at the position of the line IIIB-IIIB' of FIG.

First, as shown in FIGS. 5A and 5B, a wafer having a plurality of semiconductor laminates 120 is prepared (step S1 in FIG. 4). The wafer 200W shown in FIGS. 5A and 5B includes a substrate 200 and has a plurality of semiconductor laminates 120 on one surface 200a of the substrate 200. The plurality of semiconductor laminates 120 are arranged two-dimensionally on the surface 200a along a first direction and a second direction different from the first direction. Here, an example in which directions orthogonal to each other are selected as the first direction and the second direction will be described. That is, here, the plurality of semiconductor laminates 120 are arranged in a matrix on the surface 200a. The first direction is, for example, the row direction of the matrix arrangement, and the second direction is the column direction of the matrix arrangement.

As described with reference to FIGS. 3A and 3B, each semiconductor laminate 120 includes an n-type semiconductor layer 122n and a p-type semiconductor layer 122p. The n-type semiconductor layer 122n and the p-type semiconductor layer 122p can be formed by epitaxially growing a semiconductor layer on the main surface of the substrate 200. The substrate 200 may be a substrate capable of growing a semiconductor layer and finally separating the semiconductor laminate 120, and for example, a Si substrate, a sapphire substrate, a GaN substrate, a SiC substrate, and a GaAs substrate may be used. it can. Here, a Si substrate is illustrated.

By depositing a semiconductor material (here, a nitride-based semiconductor) on the surface 200a of the substrate 200, a semiconductor laminate having an n-type semiconductor layer, an active layer, and a p-type semiconductor layer is formed on the surface 200a. Further, an electrode material (ITO, Ag, etc.) is deposited on the p-type semiconductor layer to form the entire surface electrode layer 124e. Next, the semiconductor laminate and the entire surface electrode layer are patterned by etching to form a plurality of island-shaped light emitting portions 100e on the surface 200a of the substrate 200. At this time, the active layer, the p-type semiconductor layer, and the film of the electrode material are patterned so as to expose a part of the n-type semiconductor layer 122n.

Here, patterning is performed so that a total of 64 light emitting portions 100e are formed in a matrix on the surface 200a of the substrate 200. That is, after the semiconductor layer is grown on the entire surface of the surface 200a of the substrate 200, the semiconductor layer is removed from the region other than the region where the light emitting portion 120 should be arranged to a depth such that a part of the n-type semiconductor layer 122n remains. ..

Next, a reflective film that covers the entire surface of the substrate 200 is formed. For example, _{the formation of a laminated film of a SiO 2} film and an Nb ₂ O ₅ film is repeated three times to form a reflective film covering each semiconductor laminated body 120.

Next, in the reflective film, on the region where the n-side electrode 136n should be formed in the n-type semiconductor layer 122n of each semiconductor laminate 120 and on the region where the p-side electrode 136p should be formed in the p-type semiconductor layer 122p. The portion is removed by, for example, reactive ion etching (RIE) or the like to form a contact hole in the reflective film. Further, for example, an Au film is formed on the reflective layer 130, and patterning of the Au film is performed so as to leave a part of the Au film at the position of the contact hole. By patterning the Au film, the n-side electrode 136n and the p-side electrode 136p are formed.

Next, in the region on the reflective film 130, the resin layer 140 is formed by filling the space between two light emitting portions adjacent to each other with an uncured resin composition and curing the resin composition.

The resin layer 140 is, for example, a light-reflecting resin layer in which a light-reflective filler is dispersed. The reflectance of the resin layer 140 to light from the semiconductor laminate 120 is, for example, 60% or more. By forming a light-reflecting resin layer as the resin layer 140 using a resin composition in which a light-reflective filler is dispersed, leakage of light emitted from the semiconductor laminate 120 to the side can be suppressed. The reflectance for light from the semiconductor laminate 120 may be 70% or more, 80% or 90% or more, and may be appropriately set.

As the resin material for dispersing the light-reflecting filler, for example, a silicone resin, an epoxy resin, or the like can be used. As the light-reflecting filler, metal particles or particles of an inorganic material or an organic material having a higher refractive index than the resin material in which the light-reflecting filler is dispersed can be used.

Next, by forming an insulating material that covers the entire surface of the semiconductor laminate 120 and patterning the insulating material, the semiconductor laminate 120 on the substrate 200 is covered, and each of the semiconductor laminates 120 is included in the first region R1. A first insulating layer 150 having a through hole is formed at the position of the n-side electrode 136n and the position of the p-side electrode 136p in the second region. As the material of the first insulating layer 150, for example, a photosensitive material such as an epoxy-based material or a silicone-based material can be used. After the photosensitive material is applied, the insulating film material can be left in a portion other than the through hole by applying photolithography.

Next, a plurality of first wirings are formed. First, a conductive film is formed on the entire surface of the substrate 200. For example, by sequentially depositing Ti, Rh, Au and Ti on the first insulating layer 150, a conductive film can be formed in the form of a multilayer film. After that, the p-side wiring layer 160 including the first wiring 160w and the via 160v is formed by patterning the conductive film.

At this time, the first conductive structure 161n whose one end is connected to the n-side electrode 136n may be formed for each semiconductor laminate 120 by leaving the portion of the conductive film at the position of the n-side electrode 136n. After the first conductive structure 161n is formed in advance, a second insulating layer 170 provided with a through hole reaching the first conductive structure 161n, which will be described later, is formed on the first insulating layer 150, and then the second insulating layer 170 is formed. By forming the second wiring 180w on the n-type semiconductor layer 122n of the plurality of semiconductor laminates 120 via the first conductive structure 161n, the n-type semiconductor layers 122n of the plurality of semiconductor laminates 120 can be electrically connected to each other by the second wiring 180w. Therefore, for example, the first insulating layer under the first wiring group extending in the column direction of the array of the semiconductor laminate 120, and the first wiring group and the second wiring group intersecting the first wiring group. The n-type semiconductor layers 122n of the plurality of semiconductor laminates 120 can be electrically connected to each other without forming a through hole penetrating both of the second insulating layer located between them in a single step. .. Therefore, when the first conductive structure 161n is not formed in advance, in other words, it is possible to avoid complication of the process as compared with the case where the through holes penetrating the two insulating layers are collectively formed.

As shown in FIG. 5A, the via 160v of the p-side wiring layer 160 electrically connects the p-side electrode 136p and the first wiring 160w to each other. As shown in FIG. 5B, the first wiring 160w extends in the second direction (here, in the row direction), and semiconductors are laminated in the second direction via the via 160v, the p-side electrode 136p, and the entire surface electrode layer 124e. The p-type semiconductor layers 122p of the body 120 are electrically connected to each other.

In this example, the first wiring 160w extends to the position of the terminal portion 100s, and one end thereof is electrically connected to the p-side connection terminal 160t. As described with reference to FIG. 2, the first wiring 160w is provided for each row of the plurality of semiconductor laminates 120, for example. By applying a voltage to the p-side connection terminal 160t, the p-type semiconductor layer of the plurality of semiconductor laminates 120 arranged in the second direction via the first wiring 160w and connected to the first wiring 160w. A voltage can be applied to 122p all at once.

Next, a second insulating layer that covers the entire surface of the substrate 200 is formed. After the formation of the second insulating layer, the second insulating layer is patterned to cover the plurality of first wirings 160w, and a through hole is provided at a position overlapping the n-side electrode 136n in the top view. Form 170. As the material of the second insulating layer 170, the same material as the material of the first insulating layer 150, such as a photosensitive material, can be used. After the photosensitive material is applied, the insulating film material can be left in a portion other than the through hole by applying photolithography.

Next, a plurality of second wirings are formed. Similar to the step of forming the p-side wiring layer 160, for example, by sequentially depositing Ti, Rh, Au and Ti on the second insulating layer 170, a conductive film is formed on the entire surface of the substrate 200 in the form of a multilayer film. Form. After that, as shown in FIG. 12A, the n-side wiring layer 180 including the second wiring 180w and the via 180v can be formed by patterning the conductive film. One end and the other end of the via 180v are connected to the n-side electrode 136n (or the first conductive structure 161n) and the second wiring 180w, respectively, so that the second wiring 180w is the via 180v, the first conductive structure 161n and n. It is electrically connected to the n-type semiconductor layer 122n of the light emitting structure 120 via the side electrode 136n. As shown in FIG. 2, the second wiring 180w is provided for each row of the plurality of semiconductor laminates 120, for example.

The second wiring 180w extends in the first direction (here, the row direction) and is electrically connected to the first conductive structure 161n arranged in the first direction via the via 180v. As a result, the second wiring 180w electrically connects the n-type semiconductor layers 122n of the semiconductor laminates 120 arranged in the first direction via the via 180v. Further, in this example, the second wiring 180w extends to the position of the terminal portion 100t, and one end thereof is connected to the n-side connection terminal 180t. As described above, in the step of forming the n-side wiring layer 180, each second wiring 180w can be electrically connected to the corresponding one of the plurality of n-side connection terminals 180t. By applying a voltage to the n-side connection terminal 180t, the n-type semiconductor layer of the plurality of semiconductor laminates 120 arranged in the first direction via the second wiring 180w and connected to the second wiring 180w. A voltage can be applied to 122n all at once.

Then, as shown in FIGS. 6A and 6B, the light-reflecting resin layer 190 may be formed on the second insulating layer 170 so as to cover the n-side wiring layer 180. As the material of the light-reflecting resin layer 190, the same material as the above-mentioned resin layer 150, for example, a resin composition in which a light-reflective filler is dispersed can be used. A compression molding method such as transfer molding can be applied to the formation of the light-reflecting resin layer 190. The light-reflecting resin layer 190 is formed by applying an uncured resin composition in which a light-reflective filler is dispersed on the second insulating layer 170 and curing the resin composition. The reflectance of the light-reflecting resin layer 190 with respect to light from the semiconductor laminate 120 is, for example, 60% or more. The thickness of the light-reflecting resin layer 190 (distance from the lowest portion to the upper surface in the direction perpendicular to the surface on which the semiconductor laminate 120 is arranged) may be about 0.2 mm or more and 2 mm or less.

Next, as shown in FIGS. 7A and 7B, a part of the substrate 200 is removed to form the groove portion 202 (step S2 in FIG. 4). As shown in FIG. 8, the grid-like groove portions 202 are formed by removing the substrate 200 located between the plurality of light emitting portions 100e in a plan view. Since a Si substrate is used as the substrate 200 here, it is possible to remove a part of the substrate 200 by etching, for example. For example, by providing a mask on the other main surface of the substrate and etching the substrate 200 through the mask, the groove can be formed relatively easily. The groove portion 202 is formed to a depth at which the n-type semiconductor layer 122n is exposed. By forming the groove portion, a plurality of island-shaped substrates 200 separated from each other are provided on the n-type semiconductor layer 122n. As a method for forming the groove, a method such as dicing or scribe can be used in addition to etching.

Next, as shown in FIGS. 9A and 9B, the groove portion 202 is filled with the light reflecting member 210 (step S3 in FIG. 4). As the material of the light-reflecting member 210, a resin containing a light-reflecting substance can be used, and for example, the same material as the resin layer 150 described above can be used. A compression molding method such as transfer molding can be applied to the formation of the light reflective member 210. The light-reflecting member 210 is formed by applying an uncured resin composition in which a light-reflecting filler is dispersed to the groove portion 202 and curing the resin composition. The viscosity of the resin composition is preferably adjusted so that the entire width direction of the groove 202 can be embedded. The reflectance of the light-reflecting member 210 with respect to the light from the semiconductor laminate 120 is, for example, 60% or more. The width of the light reflecting member 210 is preferably in the range of about 1 μm or more and 1000 μm or less.

Next, the substrate 200 that remains unremoved in the step of forming the groove 202 is removed (step S4 in FIG. 4). By removing the substrate 200 remaining in the region other than the groove portion 202, the upper surface of the n-type semiconductor layer 122n (on the side opposite to the surface of the n-type semiconductor layer 122n on which the n-side electrode 136n and the p-side electrode 136p are formed). A light-reflecting member 210 provided on the surface) is obtained. In the step of removing the substrate, the substrate 202 can be removed by, for example, etching. When a sapphire substrate is used as the substrate 200, the laser lift-off can be applied to separate the sapphire substrate from the semiconductor laminate 120. As a result, the light emitting device 100 having the structures shown in FIGS. 3A and 3B is obtained.

According to the above-described embodiment, the light reflecting member 210 surrounding the light emitting portion 100e can be easily formed on the light emitting side of the semiconductor laminate, so that the light emitting device has a good parting property and a good brightness distribution. Can be realized.

In the above example, the position of the bottom surface of the groove portion 202 is the surface of the n-type semiconductor layer 122n opposite to the surface on which the n-side electrode 136n and the p-side electrode 136p are formed. ) Is almost the same. However, it is not necessary to align the position of the bottom surface of the groove portion 202 with the top surface of the n-type semiconductor layer 122n. As shown in FIGS. 10A and 10B, for example, when the upper surface of the reflection layer 130 located between the two light emitting portions 100e adjacent to each other is lower than the upper surface of the semiconductor laminate 120, the position of the bottom surface of the groove portion 202. May be aligned with the position of the upper surface of the reflective layer 130. As a result, the two light emitting units 100e adjacent to each other are separated by the reflective layer 130 and the light reflecting member 210, so that the leakage of light into the adjacent light emitting units 100e can be further reduced.

100 light emitting device 100e light emitting part 100s, 100t terminal part 120 semiconductor laminate 122a active layer 122n n type semiconductor layer 122pp p type semiconductor layer 122s sacrificial layer 124e full surface electrode layer 130 reflection layer 136n n side electrode 136p p side electrode 137n, 137p barrier Layer 140 Resin layer 150 1st insulating layer 160 p side wiring layer 160v via 160w 1st wiring 160t p side connection terminal 161n 1st conductive structure 170 2nd insulating layer 180 n side wiring layer 180v via 180w 2nd wiring 180t n side connection Terminal 190 Light-reflecting resin layer 200 Substrate 200W Wafer 202 Groove 210 Light-reflecting member

Claims (7)

A step of preparing a wafer having a substrate and a plurality of semiconductor laminates arranged two-dimensionally on one main surface of the substrate and each having a light emitting portion.
A step of removing a portion of the substrate located between the plurality of light emitting portions in a plan view to form a groove portion on the substrate.
The step of filling the groove with a light-reflecting member and
A method for manufacturing a light emitting device, which comprises a step of removing a substrate remaining without being removed. A claim further comprising a step of forming a light-reflecting resin layer on a side of the plurality of semiconductor laminates opposite to the side on which the substrate is provided, between the step of preparing the wafer and the step of forming the groove. The method for manufacturing a light emitting device according to 1. The method for manufacturing a light emitting device according to claim 1 or 2, wherein the light reflecting member is made of a resin containing a light reflecting substance. The method according to any one of claims 1 to 3, wherein in the step of forming the groove portion, a mask is provided on the other main surface of the substrate, and the substrate is etched through the mask to form the groove portion. How to manufacture a light emitting device. The method for manufacturing a light emitting device according to any one of claims 1 to 4, wherein a reflective layer covering each semiconductor laminate is formed in the step of preparing the wafer. The method for manufacturing a light emitting device according to claim 5, wherein the groove has a depth that reaches the reflective layer. The substrate is a Si substrate.
The method for manufacturing a light emitting device according to any one of claims 1 to 6, wherein the semiconductor laminate is a nitride-based semiconductor.

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