JP6860718B2 - Vertical switching configuration for ESD protection - Google Patents

Description

The embodiments disclosed in this document generally relate to structures, methods, and devices using voltage-switchable dielectric materials to achieve vertical switching protection from ESD and other overvoltage events.

Electronic devices are usually manufactured by connecting and assembling various components (eg, integrated circuits, passive components, chips, etc. (hereinafter referred to as "chips"). Many components, especially semiconductors, have overvoltage devices. It is easily affected by a spurious electrical event (called an overvoltage state) that is applied to the overvoltage state. Examples of causes of the overvoltage state are electrostatic discharge (ESD), countercurrent power (EMF), lightning bolt, solar wind, and electric motor. Includes electromagnetic induction loads with switches such as electromagnets, heavy resistance loads with switches, large current changes, electromagnetic pulses, etc. As a result of overvoltage conditions, active electronic components and / or passive electronic components or semiconductor IC chips, etc. High voltage is applied to the device including the circuit element, which can cause a large current to flow or pass through the component. This large current easily destroys the active component, the passive component, the circuit element, etc. Or it can adversely affect its function.

Some chips provide "on-chip" protection from some overvoltage events (eg, mild ESD events) that can be expected during chip packaging or operation of each electronic device (eg, human body model). Protection from events).

The chip can be packaged (eg, mounted on a board). The packaged chip can be connected to an additional (eg, external chip) overvoltage protection device that protects the packaged chip from more severe (eg, high voltage) overvoltage events. Since the on-chip overvoltage protection device and the off-chip overvoltage protection device are electrically communicable, the off-chip overvoltage protection device may be required to "protect" the on-chip overvoltage protection device. It is difficult to add an out-of-chip overvoltage protection device that uses individual components during the manufacture of the substrate. Moreover, it is difficult to optimize on-chip protection beyond a complete system or subsystem. An example of the ESD test specifications is IEC61.
000-4-2 and JESD22-A114E.

Printed circuit board, printed wiring board, or similar board (hereinafter referred to as PCB)
Can be used to attach, support and connect multiple electronic components. To provide electrical conductivity between various mounted components, chips, etc., a PCB typically includes a substrate of dielectric material and one or more conductive leads. A pattern of metal leads is usually plated on a dielectric substrate (eg, using printing techniques such as silkscreen) to allow electrical connection. Alternatively, a metal layer (eg, Cu, Ag,
A layer of Au) is formed on the substrate, and then a portion of the metal layer is removed (eg, etched). As a result, a desired pattern is formed. Multiple layers of conductive pattern and / or dielectric material can be provided on the PCB. These layers can be connected using multiple vias. Printed circuit boards containing 14 or more layers are not uncommon.

PCBs are typically used to support and connect various integrated electronic components such as chips, packages and other integrated devices. PCBs can also support and connect individual components such as resistors, capacitors, inductors, etc., and can also provide connections between a plurality of integrated components and each component of the plurality of individual components. Conductive patterns and / or layers in PCBs and other components or regions within electronic devices may occasionally provide a path for overvoltage events that damage the component or otherwise adversely affect the component. ..

Various configurations, methods and devices for protecting electronic devices (eg, individual surge suppression components surface-mounted on PCBs) from overvoltage exist in the prior art. However, they generally indicate that there are various constraints in terms of manufacturability, performance, operating characteristics, and cost. There is a need to improve overvoltage protection configurations, methods and devices.

The accompanying drawings are integral with the specification, along with the details of the invention below, and constitute parts of the specification, further illustrating various embodiments according to the exemplary embodiments disclosed herein, and various principles and. Helps explain the benefits.

A horizontal switching VSDM configuration with VSD material that can be used for ESD protection of electronic components is shown. A horizontal switching cylindrical configuration with a VSD material that can be used for ESD protection of electronic components is shown. The PCB used for various embodiments and the directional criteria associated therewith are shown. Demonstrates a VSDM configuration that is configured to implement vertical switching using VSD material according to embodiments and can be incorporated into a substrate device. A VSDM configuration with a VSD material layer that can be incorporated into a PCB or other substrate and configured to provide vertical switching according to embodiments is shown. According to an embodiment, a VSDM configuration configured to achieve vertical switching using VSD material is shown. According to an embodiment, a VSDM configuration configured to achieve vertical switching using VSD material is shown. Demonstrates a method of manufacturing one or more conductive structures, such as layered interconnects, within a vertical switching VSDM configuration according to an embodiment. A graph of the envelope of the sample response voltage for a vertical switching VSDM configuration is shown according to an embodiment. A VSD material configuration configured to achieve vertical switching using a VSD material according to an embodiment is shown. A VSD material configuration configured to achieve vertical switching using a VSD material according to an embodiment is shown. A VSD material configuration configured to achieve vertical switching using a VSD material according to an embodiment is shown. A VSD material configuration configured to achieve vertical switching using a VSD material according to an embodiment is shown. A VSD material configuration configured to achieve vertical switching using a VSD material according to an embodiment is shown. A VSDM configuration with a VSD material layer that can be incorporated into a PCB or other substrate and configured to provide vertical switching according to embodiments is shown. A VSDM configuration with a VSD material configuration that can be incorporated into a PCB or other substrate and configured to provide vertical switching according to embodiments is shown. According to an embodiment, a VSD material configuration in which one or more circuit elements are connected and configured to realize vertical switching using a VSD material is shown. A VSD material configuration configured to achieve vertical switching using a VSD material according to an embodiment is shown. According to an embodiment, a VSD material configuration configured to achieve vertical switching using a plurality of VSD material structures is shown. A bidirectional switching VSD material configuration configured to achieve both vertical and horizontal switching using a VSD material according to an embodiment is shown.

Although the present specification describes at the end the claims that identify the features of the various embodiments, the present invention should be better understood by considering the drawings and the following description relating to the drawings. The same reference number is used for the same parts and members in the drawings.

According to the various embodiments disclosed herein, protection against ESD and other overvoltage events of substrate devices, electronic components and / or electronic devices is provided by voltage-switchable dielectric materials (“VSD materials” or “VSD materials” or “VSD materials” or “VSD materials”. Incorporating a "VSDM") into each substrate and / or device may be included. While those skilled in the art recognize that overvoltage events include multiple events, in the present document, ESD (electrostatic discharge) can typically be used to describe an overvoltage event.

In certain embodiments, the VSD material is embedded in the device as a layer or other structure configured such that at least a portion of the ESD signal flows through the device to ground or other predetermined location.

In certain embodiments, circuit elements such as filters are placed between the vertical switching VSDM configuration and the electronic components to prevent the high frequency voltage components generated by the ESD event from reaching the electronic components. This circuit element can be embedded in a substrate device as a layer, structure, or via, or mounted on a substrate as a surface mount component.

VSD materials according to the various embodiments disclosed herein are materials that exhibit non-linear resistance as a function of voltage. While VSD materials exhibit non-linear resistance, not all materials that exhibit non-linear resistance are VSD materials. For example, a material whose resistance value changes as a function of temperature but whose resistance value does not substantially change as a function of voltage is not considered as a VSD material for the purposes of the embodiments disclosed herein. In various embodiments, the VSD material has a non-linear resistance as a function of voltage and additional operating parameters such as current, energy field density, light or other electromagnetic radiation inputs, and / or other similar parameters. Indicates that it will change.

The change in resistance as a function of voltage, as indicated by the VSD material, includes a transition from a high resistance state to a low resistance state. This transition occurs at a particular voltage value, which can be variously referred to as "characteristic voltage", "characteristic voltage level", "operating overvoltage" or "operating overvoltage level". The "characteristic voltage" may vary depending on the various configurations of the VSD material, but is relatively stable for a given composition. The characteristic voltage for a particular formulation can be a function of the voltage as well as additional parameters such as temperature and / or incident electromagnetic energy at various wavelengths including light, infrared, ultraviolet, or microwave.

For a given VSD material composition, the characteristic voltage is in units of voltage per unit length (eg, volt per mil (V / mil), volt per micrometer (V / um), etc.). It can be defined in terms of the corresponding "characteristic electric field" or "characteristic field" expressed.

Unless otherwise specified, the terms "VSD material structure", "VSD material structure" or "VSD"
"M structure" shall mean any amount of VSD material having a particular physical dimension capable of performing an electrical switching function. An example of the structure of a VSD material is VS
Layer of D material (either placed on the substrate or cured as an independent layer),
A certain amount of VSD material bordering these electrodes between two or more electrodes, or a certain amount of VSD material bordering two or more insulating or semiconductor structures, or in response to a sufficiently large voltage change Includes the composition of other elements or VSD materials that can be switched between a substantially non-conductive state and a substantially conductive state.

In one embodiment, the VSD material structure is such that an amount of the first VSD material having a first characteristic voltage is between two other quantities of VSD material having a characteristic voltage different from the first characteristic voltage. It can be manufactured by bordering with (the characteristic voltages of these two other quantities of VSD material may or may not be equal to each other).

In one embodiment, the VSD material structure is such that a certain amount of VSD material having a first characteristic voltage is used.
It can be produced by (a) bordering an amount of VSD material with different characteristic voltages and (b) one or more electrodes, insulating structures, and / or semiconductor structures.

An example of a VSD material structure is a layer of VSD material placed on top of the copper foil (but excluding the copper foil). A compound composition comprising both a layer of VSD material and a copper foil is referred to as a "VSDM composition". More complex configurations of VSDM will be described below.

Another example of a VSD material structure is a coating, lamellae or other layer of VSD material arranged as a horizontal layer within the PCB, bordering between two adjacent horizontal layers of the PCB (ie, bordering). Horizontal layer above the VSD material structure, and horizontal layer below the VSD material structure).
The compound composition having both this VSD material structure and two horizontal layers bordering it is
This is an example of a VSDM configuration.

Another example of a VSD material structure is a certain amount of VSD material placed in a horizontal layer within a PCB.
Boundary with these between four structures located within the same horizontal layer of the PCB (eg, four etched channels that outline the rectangular VSD material structure), and within two adjacent horizontal layers. Boundary with these between two electrodes arranged in (eg, conductive layer on top, insulating layer on bottom). The compound composition including both the four structures bordering the VSD material structure and the two electrodes is an example of the VSDM structure.

The structure of the VSD material for which the distance between the two points to which the voltage is applied is known (eg, when the voltage is applied over the thickness of the layer of the VSD material or over other gaps in the VSD material structure). On the other hand, the characteristic voltage can be specified as a specific voltage value (for example,
The characteristic voltage of this VSD material structure can be specified as a specific value in units of volts).

Thus, the characteristic voltage of a VSD material structure can be defined in units of a characteristic electric field expressed as a voltage value per unit length, or the VSD material is considered to have a particular volume with known dimensional characteristics. Can be defined as a characteristic voltage expressed as a particular voltage value when (eg, a VSD material structure with a particular thickness portion where voltage switching can occur). In various contexts, the detailed description of the invention of this patent may refer to the characteristic field or characteristic voltage of a VSD material for various embodiments, and in each case the corresponding characteristic field (bolts per unit length). (As) or characteristic voltage (in volts) can be obtained with appropriate conversion by taking into account the dimensions of each structure of the VSD material. For example, due to the uniform characteristic electric field generated within the VSD material structure, the characteristic voltage of the VSD material structure is the corresponding gap (in mils) of the range in which switching occurs in the characteristic field (V / mil) of this VSD material. ) Can be obtained by multiplying. In a more general sense, for non-uniform characteristic electric fields that occur within the VSD material structure, the characteristic voltage of this VSD material structure can be obtained by integrating the characteristic field of this VSD material over the gap where switching occurs. .. In certain embodiments, the characteristic voltage of the VSD material over such a gap is directly or linearly associated with the size of each gap, relative to certain configurations of the VSD material and the physical characteristics of the gaps where switching can occur. It may not be (eg, in such an embodiment, each characteristic voltage may be evaluated by direct measurement or by a more complex simulation or approximation).

In general, the characteristic voltage of a VSD material structure is a function of the quantity, cross-sectional area, volume, depth, thickness, width and / or length of the VSD material structure located between the two points to which the voltage is applied. possible. And optionally, it can also be a function of relative shape, arrangement, density change, and other similar variables related to VSD material structure.

The VSD material is substantially non-conductive (ie, substantially insulating) at voltages below the characteristic voltage level, in which case it behaves as substantially an insulator or dielectric. This state can be said to be substantially non-conductive or insulated. A voltage below the characteristic voltage level of the VSD material can be referred to as a low voltage (at least for a voltage above the characteristic voltage level).
In such a state of operating at a voltage lower than the characteristic voltage level, the VSD material provided in one or more embodiments is a semiconductor material similar to a semiconductor material suitable for functioning as a substrate in a semiconductor manufacturing process. Can be interpreted as having properties. According to various embodiments, V
The SD material can behave substantially as an insulator for both positive and negative voltages when the magnitude of the voltage is less than the characteristic voltage level.

At a voltage higher than its characteristic voltage level, according to the various embodiments disclosed herein.
The VSD material behaves as a conductor that has substantially no electrical resistance or has a relatively low resistance value. This is said to be substantially conductive. A voltage that exceeds the characteristic voltage level is called a high voltage. The VSD material is or is substantially conductive, whether positive or negative, when the magnitude of the voltage exceeds the characteristic voltage level. The characteristic voltage is
It can be either positive or negative depending on the polarity of the applied voltage. A VSD material can be said to be "switched on" when it becomes substantially conductive in response to a voltage above its characteristic voltage. The VSD material is said to be "switched off" when the VSD material becomes substantially non-conductive after the voltage above its characteristic voltage has been removed. VSD
When the material switches on or off, the VSD material simply "switches"
Can be said.

In an ideal model, the operation of the VSD materials provided in the various embodiments disclosed herein would have infinite resistance at voltages below the characteristic voltage and zero resistance at voltages above the characteristic voltage. It is approximated as a thing. However, under normal operating conditions, such a VSD
The material usually has a high resistance at a voltage below the characteristic voltage but is not infinite and has a finite resistance value, and at a voltage above the characteristic voltage has a low resistance but a non-zero resistance value. As an example, for a particular VSD material, the ratio of resistance at low voltage to resistance at high voltage can be expected to approach large values (eg, 10 ³ , 10 ⁶ , 1).
Over the range of ⁰⁹ , 10 ^{12 or more).} In an ideal model, this ratio can be infinitely large or approach very large values.

The VSD materials provided in the various embodiments disclosed herein exhibit high reproducibility (ie, reversibility) in operation in both low and high voltage conditions. In certain embodiments, the VSD material behaves substantially as an insulator or a dielectric (
That is, at voltages below the characteristic voltage level, it is substantially non-conductive and exhibits very high resistance or virtually infinite electrical resistance). The VSD material then switches to become substantially conductive when operating at a voltage above the characteristic voltage level and again becomes substantially an insulator or dielectric at a voltage below the characteristic voltage. If the input voltage level changes between a voltage below the characteristic voltage and a voltage above the characteristic voltage, the VSD material can continue to move back and forth between these two operating states indefinitely. .. While transitioning between these two operating states, the VSD material may experience a constant level of hysteresis.
This hysteresis may change the characteristic voltage level, switching response time, or other operating characteristics of the VSD material to some extent.

First, when the VSD material is substantially an insulator according to the embodiments disclosed herein.
The transition between the (lower) voltage state of the VSD material and the second (higher) voltage state when the VSD material is substantially conductive is substantially predictable and has a limited signal amplitude. It is generally expected to stay within the range of the envelope and within the limited range of switching time. In the ideal model, the time required for the VSD material to transition from a substantially insulating state to a substantially conductive state in response to the signal of the input step function rising until the characteristic voltage is exceeded is close to zero. Can be done. That is, the transition can be approximated to be substantially instantaneous. Similarly, in the ideal model, the time it takes for the VSD material to transition from a substantially conductive state to a substantially non-conductive state in response to an input step function signal that drops below the characteristic voltage is close to approximately zero. obtain. The reverse transition can also be approximated to be substantially instantaneous. However, under normal operating conditions, none of these transition times of the VSD material is zero. In general, such transition times are small, preferably as small as possible (eg, about ^10-6).
Seconds, ^10-9 seconds, ^10-12 seconds, or less). Further structural details and properties of the VSD material are described in a US patent patented by Kosowsky et al. On January 18, 2011, entitled "Construction of Voltage-Switchable Dielectric Materials with Step Voltage Response and Methods of Manufacture Therefor". It is disclosed in No. 7,872,251, the entire contents of which shall be incorporated into the application documents by reference.

In a substantially conductive state, according to various embodiments, the VSD material directs an electrical signal to ground or other predetermined point within each circuit, substrate or electronic device to protect the electronic components. Can be done. In various embodiments, predetermined points are grounds, virtual grounds, shields, safety ground terminals, and the like. Examples of electronic components disclosed herein that can be operated according to various embodiments and / or protected by VSD materials include (a) circuit elements, circuit structures, surface mount electronic components (eg, resistors). , Capacitor,
Inductors), PCBs or other circuit boards, electronic devices, electronic subsystems, electronic systems, (b) any other electrical, magnetic, microelectromechanic
al structure (MEMS)) or similar elements, structures, parts, systems and / or devices, (c) any data that can be processed or transmitted, operated with electrical signals, or damaged by electrical signals. Other systems (d) (a), (b) and / or (c) above
) Includes any combination of the above-mentioned contents specified by.

In general, VSD materials are used before they are damaged, and in some cases irreversibly.
It may have limited ability to carry current or operate in another manner in the presence of high signal voltages, high currents, and energy or power levels. In addition, if an electrical signal within normal operating specifications persists for too long, the VSD material can be damaged (eg, the VSD material will heat up and eventually destroy while passing such a signal). Can be). For example, a VSD material can function normally when exposed to an input signal with a voltage level of 10 KV for 100 nanoseconds, but can be damaged if this signal continues to be applied for longer than a few milliseconds. The ability of a VSD material to withstand high levels of voltage, current, power or energy without damage is the characteristic of a particular composition of the VSD material, the corresponding VSD material structure (eg, a VSD material structure with large physical dimensions). It can depend on various factors such as the ability to carry currents with high current densities), the corresponding circuit architecture, the presence of other ESD protection components, and the characteristics of the device in which the VSD material is included.

VSD materials are polymeric composites according to various embodiments, such as metals, semiconductors,
It may include fine particle materials such as ceramics and the like. Various examples of VSD material compositions that can be used according to various embodiments are described, for example, on November 23, 2010, "Constructions, methods, and methods of voltage-switchable dielectric materials with a step voltage response. US Patent Application No. 12 / 953,309, filed under the title "Manufacturing Method", 2010 7
U.S. Patent Application No. 12 / 832,040, filed on 7th May, entitled "Light Emitting Diode Devices for Voltage-Switchable Dielectric Materials with High Aspect Ratio Particles",
U.S. Patent Application Nos. 12/717, 102, and July 1, 2011, filed on March 3, 2010, entitled "Voltage-Switchable Dielectric Materials with High Aspect Ratio Particles."
It is described in US Pat. No. 7,981,325, patented on the 9th, entitled "Electronic Devices for Voltage-Switchable Dielectric Materials with High Aspect Ratio Particles".

According to various embodiments, the VSD material is a matrix material and its matrix.
It may include one or more organic particles and / or inorganic particles dispersed in the material.

Examples of matrix materials included in the VSD material according to various embodiments include silicon polymers, phenolic resins, epoxy resins (eg, EPON resin 828, bifunctional bisphenol A / epichlorohydrin-derived liquid epoxy resins), polyurethanes. Organic polymers such as poly (meth) acrylate, polysulfone, polyester, polycarbonate, polyacrylamide, polymid, polyethylene, polypropylene, polyphenylene oxide, polysulfone, ceramer (solgel / polymer composite material), and polyphenylene sulfone. included. Other examples of matrix materials include siloxane, polyphosphazenes and the like.

Examples of particles contained in the VSD material according to various embodiments include copper, aluminum, nickel, silver, gold, titanium, stainless steel, chromium, other metal alloys, T, Si,
NiO, SiC, (including diamond, nanotubes, and / or in the form of _{fullerene) ZnO, BN, C, ZnS} , Bi 2 0 3, Fe 2 0 3, Ce0 2, Ti0 2, A1N, and a two-indium selenide Conductive materials and / or semiconductor materials containing compounds are included. In certain embodiments, Ti0 ₂ may not be or may be doped, for example, W0 _3, doping may include a surface coating. Such particles range from spherical to very elongated, including high aspect ratio particles and including carbon nanotubes (single and / or other layers), fullerene, metal nanorods, or metal nanowires. Can have the shape of. Examples of materials that form nanorods and / or nanowires include boron nitride, antimony tin oxide, titanium dioxide, silver, copper, tin, and gold.

Certain particles included in the VSD material according to various embodiments are 3: 1, 10: 1,
It can have aspect ratios greater than 100: 1 and 1000: 1. Materials with higher aspect ratios are sometimes referred to as "high aspect ratio" particles or "HAR" particles. Carbon nanotubes are an example of ultra-HAR particles with an aspect ratio on the order of 1000: 1 or higher. Materials with lower aspect ratios that can be included in VSD materials in various embodiments are carbon black (L / D on the order of any 10: 1).
) Particles, and carbon fiber (L / D on the order of 100: 1) particles.

The particles contained in the VSD material according to various embodiments have the smallest dimensions of 5
Same as or smaller than 00 nm, or even smaller (eg, the smallest dimension is 10)
It can have a variety of sizes, including nanoscale particles characterized by (particles that are 0 nm or 50 nm).

The particles included in the VSD material according to various embodiments may include an organic material. V
By including the organic material in the SD material, the coefficient of thermal expansion, thermal conductivity improvement, better dielectric constant improvement, fracture toughness improvement, better compressive strength improvement, and metal adhesion ability in VSD material. Improvement is possible. Examples of organic semiconductors that may be included in the VSD material in various embodiments include carbon forms such as electrically semi-conductive carbon nanotubes and fullerenes (eg, C60 and C70). Fullerenes and nanotubes can be modified in certain embodiments to be functionalized to include covalently bonded chemical groups or residue moieties. Other examples of organic semiconductors that may be included in VSD materials in various embodiments are poly-3-hexylthiophene, polythiophene, polyacteyl.
ene), poly (3,4-ethylenedioxythiophene), poly (styrenesulfonate), pentacene, (8-hydroxyquinolinolato) aluminum (III), and N, N'- Di-[(naphthalenyl) -N, N'diphenyl] -l, 1'-biphenyl-4,4'-
Contains diamine [NPD]. In addition, organic semiconductors include thiophene and analog.
, Phenylene, vinylene, fluorene, naphthalene, pyrrole, acetylene, carbazole, pyrrolidone, cyano material, anthracene, pentacene, rubrene, perylene, and oxadizole monomers, oligomers, polymers. Among these organic materials, there may be photoactive organic materials such as polythiophene.

With respect to the distribution of particles within the polymer composition of the VSD material, "substantially uniformly" means that each particle is evenly and / or randomly distributed within the material. That is, however, non-uniform and / or non-random agglomeration of the composition of such particles can certainly occur in a limited portion of the polymer composition. In fact, even after extensive mixing, the probability of such particle agglomeration occurring within a limited volume within the VSD material is usually not zero, before the VSD material is placed on the substrate. VSD after being placed on the substrate (eg through coating), including in the liquid or semi-liquid state and / or after the VSD material has hardened (either on the substrate or in any other state).
This phenomenon can occur at all stages of the material. However, as a whole, when considering the total amount of VSD material (or a sufficiently large portion of such VSD material), each of the particles is considered to be uniformly and / or randomly distributed within the mixture. Can be VSD
When modeling the behavior of each material, the particles may be modeled as being uniformly and / or randomly distributed.

In various embodiments, the characteristic voltage of the VSD material structure located between the two electrodes in contact with the VSD material decreases as the distance between these electrodes decreases. The distance between the electrodes that the VSD material can switch between a substantially conductive state and a substantially non-conductive state in response to a sufficiently large voltage change is "thickness", "effective". Can be labeled as "thickness", "gap", "switching gap", or "effective gap". If the two electrodes are located in one substantially horizontal plane, the effective gap for the VSD material structure can be considered to be horizontal, if the two electrodes are located in different vertical planes. And / or, if voltage switching occurs primarily in the vertical direction, the effective gap for the VSD material structure can be considered vertical.

FIG. 1 shows a horizontal switching structure 100 with a VSD material that can be used for ESD protection of electronic components. In the embodiment of FIG. 1, the electrodes 120 and 122 are in electrical contact with the vias 130 and 132, respectively.

In general, the term "electrode" may or may include any conductive structure.
Examples of such electrodes or conductive structures include pads, leads, wiring, vias (eg, through holes, blind vias, buried vias), cables, conductive films, signal layers, conductive layers, conductive layers. PCB layer (eg, conductive prepreg or filler layer), or
Includes other connectors that are conductive and are designed to provide electrical interconnection capabilities to any substrate, such as any PCB or semiconductor packaging.

In various embodiments, one or both of the electrodes 120 and 122 may be omitted as long as an electrical connection can be established to the vias 130 and / or the vias 132. Electrode 12
The 0 and / or electrode 122 may be made of copper or other suitable conductive material. Electrodes 120 and / or electrodes 122 may be manufactured by deposition, screen printing, gluing, or any other bonding method, mechanically, chemically, or otherwise.

In various embodiments, the electrodes 120 and 122 may be covered with a sealing material or configuration such as an insulating layer. In FIG. 2, it is shown that the electrodes 120 and 122 are embedded in the insulating layer 170.

Vias 130, 132 are conductive structures that can completely or partially penetrate or completely cross the VSD material layer 140. Vias 130 and / or 132s are conductive in through-holes, blind vias, buried vias, wiring, or any other conductive designed to facilitate signal propagation. It may be a structure. Vias 130 and / or 132s may be made from copper or any other suitable conductive material. Vias 130 and / or Vias 132 are deposited, screen printed, glued,
Alternatively, it may be manufactured mechanically, chemically, or by any other bonding method by another method. The vias 130 and / or the vias 132 are solids (eg, solid metal structures),
It may be a cavity (eg, a conductive cylindrical configuration), or it may be a cavity and partially or completely filled with a suitable conductive material (eg, partially filled with a conductive material). Conductive cylindrical structure with a hollow inside).

In some embodiments, instead of being strictly conductive, via 130 and / or via 132
May be partially or completely filled with VSD material. In such an embodiment, the vias 130 and / or the vias 132 are substantially conductive in response to voltages above the characteristic voltage of the respective VSD material, although each via normally functions substantially as an insulating structure. It can function as either a vertical switching configuration or a horizontal switching configuration in the sense that it can be sex. In such an embodiment, switching can occur vertically along each via or horizontally beyond each via.

In the embodiment of FIG. 1, the layer 140 of VSD material is arranged on the substrate 160. Board 16
0 may be a conductive substrate (eg, a layer made of copper or other conductive material, a thin plate or foil), or an insulating substrate (eg, a PCB prepreg layer). In one embodiment, the substrate 1
Reference numeral 60 denotes a substrate having variable conductivity such as a layer of VSD material.

In the embodiment of FIG. 1, the voltage sources can be connected so as to create a voltage difference between the electrodes 120 and 122. The voltage source 110 is shown in FIG. 1 as a stand-alone voltage source, which may be a current source or any other electrical energy source. Such an arrangement can often be encountered in test arrangements, or specific architectural arrangements, designed to activate the VSD material by intentionally increasing the voltage generated by the voltage source 110. The voltage source 110 is shown in FIG. 1 to be connected to the via 130, the via 130 to be electrically connected to the electrode 120, the ground to be connected to the via 132, and the via 132 to be electrically connected to the electrode 122. It is shown to do. In various alternative applications and embodiments, the voltage source 110 may be applied to the via 132 and the ground may be applied to the via 130.

However, in a more general sense, the voltage applied between the electrodes 120 and 122 is
It may be any voltage signal or other electrical signal, including the voltage generated by the ESD event as indicated by the ESD pulse 112 shown in the embodiment of FIG. In the operating environment normally experienced by terminal user devices such as mobile phones, the ESD pulse 112 has a high voltage amplitude (eg, approximately 200 to over 300 volts, and in some cases approximately 2000 to 300).
It can be expected to have a short time (eg, nanoseconds to microseconds) (more than 0 volts).
Despite this short time, it can be expected that the current generated by the ESD pulse 112 will reach large amplitudes, and in some cases above 10 amps. If the structure of the embodiment of FIG. 1 is used for ESD protection, either electrode 120 or electrode 122 is directly on the ground plate (or other predetermined location within the circuit or device to be protected). Or it can be connected indirectly.
Then, when the ESD pulse 112 reaches another electrode, it can be guided to the ground or a predetermined position through the connected electrode at the ground or a predetermined position.

If the voltage applied by the voltage source 110 (or by the ESD pulse 112) is V
If the characteristic voltage of the SD material 140 is not exceeded, the VSD material 140 remains substantially non-conductive and no meaningful current flows between the electrodes 120 and 122 through the VSD material 140. (In some cases, a certain amount of leakage current is excluded. The VSD material 140 is usually designed to minimize leakage current so as not to affect the performance of the electronic device in which the 100 structures are arranged).

To illustrate that the voltage source 110 and the ESD pulse 112 can be in different regions and are used for general purposes, the connecting wire and electrode 120 and electrode 1 between them.
22 is shown with a dotted line. In general, any voltage source, ESD signal, or other power source, overvoltage signal, or potential difference may be applied between the two electrodes 120 and 122. Either of the two electrodes may be connected to ground or a location with another reference voltage level. The polarity of the voltage source 110 may be in either direction between the electrodes 120 and 122.

If the voltage applied by the voltage source 110 (or applied by the ESD pulse 112) exceeds the characteristic voltage of the VSD material 140, the VSD material 140 will switch and become substantially conductive, which is equivalent. VSD material 14 with a large amount of current between the electrodes 120 and 122
It passes through 0 and flows.

In the embodiment of FIG. 1, the VSD material 140 can be said to switch in the "horizontal" or "horizontal" direction. This horizontal or lateral direction is defined for substrate 160. This is because the flow of current through the VSD material 140 occurs between the vias 130 and the vias 132, primarily in a direction substantially parallel to the main surface of the substrate 160. In one embodiment, the substrate 1
Reference numeral 60 denotes a layer within the PCB, where horizontal switching means that the flow of current through the VSD material 140 is the main surface (or both sides of the PCB) to which most of the components and electrical components are mounted. In the case of PCBs mounted on the surface, it mainly occurs in a direction substantially parallel to (multiple surfaces).

In various embodiments, the VSD material 140 is designed to pass a current flow in both directions between the electrodes 120 and 122 depending on the polarity of the voltage applied between the electrodes 120 and 122. .. In the embodiment of FIG. 1, the horizontal switching direction of the VSD material 140 is indicated by the arrow line 142. The substrate 160 (eg, PCB or PCB core) is actually a larger two-dimensional plane (ie, a plane defined by one or more surfaces of the PCB to which its components are mounted) and smaller height dimensions. Because it is a three-dimensional structure with
A horizontal flow of current between the electrodes 120 and 122 can occur in any direction substantially parallel to the larger two-dimensional plane. In other words, the embodiment of FIG. 1 seems to indicate that horizontal switching implies a flow of current from left to right or right to left, but in practice device packaging or PCB. Considering the three-dimensional dimensions of the actual substrate, such as
The current flow can occur in any direction substantially parallel to the two-dimensional plane formed by the main surface of the substrate 160.

With reference to the embodiment of FIG. 3, horizontal switching means flowing in any direction substantially parallel to the XY plane shown in FIG. The current flow through the medium is generally 3
Being aware that there is a dimensional charge flow, horizontal switching does not mean that all charges must flow only in the exact horizontal and planar directions. Instead, referring to horizontal switching or switching that occurs horizontally implies that charge movement occurs primarily along a plane that is substantially parallel to the main two-dimensional plane of the substrate, but of the current. It is certainly possible and predictable that at least some part will exhibit some vertical movement. Detecting the vertical movement of charges can be easier if performing simulations or analyzes at the micro level. Nevertheless, in general, in horizontal switching, at least two conductive structures such as vias 130, 132, etc. are arranged in a range substantially perpendicular to the substrate, and the current flow is two. It means that it occurs between vias mainly parallel to the main two-dimensional plane of the substrate.

In the embodiment of FIG. 1, the distance between the electrode 120 and the electrode 122 defines the gap of the VSD material 140. This gap is indicated by the gap 150 in FIG. In general, the horizontal gap in a horizontally switching VSDM configuration is determined by the shortest electrical path through the structure of the VSD material. And in FIG. 1, this shortest electrical path is the VSD material 14
It is determined by the ends of the electrode 120 and the electrode 122 at the boundary with 0. If, in the embodiment, the electrodes 120 and 122 do not extend relative to each other so that the gap 150 shown in FIG. 1 is smaller than the distance between the vias 130 and 132, the VSD.
The material 140 may instead switch in the horizontal gap between the vias 130 and the vias 132.

In certain embodiments, the characteristic field of the VSD material 140 is defined in bolts / mills. In this embodiment, by defining a particular gap size for the gap 150, the characteristic voltage for the structure 140 of the VSD material disposed between the vias 130 and 132 can be determined by the actual volt value.

In certain embodiments, the structure shown in the embodiment of FIG. 1 has a rectangular structure (eg, VS).
Layer 140 of D material may be constructed as a rectangular structure). In one embodiment, the structure shown in the embodiment of FIG. 1 includes a curved structure (eg, layer 140 of VSD material).
It may be constructed as a substantially cylindrical configuration).

FIG. 2 shows a VSD arranged between two conductive surfaces (eg, copper surfaces) labeled conductive surface 230 and conductive surface 232, which can be used for ESD protection of electronic components.
FIG. 2 shows a vertical switching cylindrical structure 200 with material 240. The structure 200 is roughly equivalent to the structure of the embodiment of FIG. 1, but shows how the various aspects shown in FIG. 1 can be implemented in a curved architecture. The conductive plane 230 and the conductive surface 232 are substantially concentric conductive structures separated by an amount of VSD material according to one embodiment. For simplicity, the substrate and electrodes are not shown in the embodiment of FIG.

In certain embodiments, the structure 200 shown in FIG. 2 represents a cross-sectional view of the structure implemented within the PCB. Referring to the embodiment of FIG. 3, the annulus shown between the conductive surface 230 and the conductive surface 232 in FIG. 2 is arranged substantially parallel to the XY plane shown in FIG. From a three-dimensional point of view, the conductive surface 230 and the conductive surface 232 extend vertically and are substantially parallel to the Z axis shown in the embodiment of FIG. 3 with respect to the PCB.

In the embodiment of FIG. 2, the voltage source 210 or the ESD signal 212 may generate a voltage between the conductive surface 230 and the conductive surface 232. If this voltage exceeds the characteristic voltage of the VSD material 240, the VSD material is switched on and the VSD material changes from a substantially non-conductive state to a conductive state. In this case, a considerable current flows between the conductive surface 230 and the conductive surface 232. In the case of concentric structures as shown in FIG. 2, the current flow occurs mostly in the radial direction indicated by line 242. Referring to the embodiment of FIG. 3, in the horizontal switching for the structure shown in FIG. 2, the current is substantially parallel to the XY plane shown mainly in FIG. 3 between the conductive surface 230 and the conductive surface 232. It means that it flows along a horizontal surface. Again, as already mentioned for the embodiment of FIG. 1, horizontal switching does not mean that the current is strictly limited to flowing along a plane substantially parallel to the main two-dimensional dimensions of the substrate. Instead, given the three-dimensional aspect of the vias, the VSD material structure and the effect at the micro level, it is expected that a certain amount of current flow will also occur in the vertical range. Nevertheless, horizontal switching is such that the current flow is actually primarily parallel to the two-dimensional principal plane of the substrate so that useful electrical functions can be achieved using the current flowing horizontally through the VSD material 240. It means that it occurs in the right direction.

In one embodiment, the characteristic field of the VSD material 240 is the voltage value per mill (Volts /.
Mill) is defined. In that embodiment, a particular gap size is defined for the gap 250 so that it is located between the conductive surface 230 and the conductive surface 232.
The characteristic voltage of the structure in the embodiment of VSD material 240 can therefore be determined by the actual voltage value. The curved architecture of the structure 200 from the embodiment of FIG. 2 is more complex than the rectangular architecture of the structure 100 from the embodiment of FIG. 1, and therefore determining the bolt value of the actual characteristic voltage is a structure. 200 is more difficult. Nevertheless, in certain embodiments, the characteristic voltage of the VSD material 240 correlates with the size of the gap 250 and can be determined with some certainty as a volt value.

FIG. 3 shows PCBs used in connection with various embodiments and associated orientation criteria.
The PCB 300 shown in FIG. 3 has a main horizontal plane defined by the X-axis and the Y-axis and a vertical dimension defined by the Z-axis. This reference coordinate system is P in physical space so that the rotation of the PCB does not change the representation of the horizontal and vertical dimensions defined here in space.
It is defined independently of the actual position of the CB. This reference system is PCB3 shown in FIG.
PCBs such as 00 can be described in more detail herein, but are similar to any other substrate.

In general, it can be protected by a VSDM configuration from ESD or other overvoltage events.
Alternatively, the "board device" in which the VSDM configuration can be incorporated is any PCB, any single-layer or multi-layer PCB, a semiconductor device package, an LED board, an integrated circuit (IC).
) Boards, interposers, or any other platform that connects two or more electronic components, devices or boards (such connections can be vertical and / or horizontal), other laminated packaging formats ( For example, an interposer, a wafer level package, a package-in-package, a system-in-package, or at least two other optional packages or substrates stacked. Combinations), or VSD material configurations can be attached, or VSD
Means another substrate into which the material composition can be incorporated. For simplicity, board devices may be labeled as "board."

Using this reference coordinate system, the horizontal switching direction defined by line 142 of the second embodiment and line 242 of the third embodiment is mainly in a plane substantially parallel to the main two-dimensional plane of the PCB 300. Along, PCB 300 is defined by the XY plane shown in FIG.

FIG. 4A shows a VSDM configuration 400 that is configured to implement vertical switching using VSD material according to an embodiment and can be incorporated into a substrate device such as a PCB, flexible circuit, or packaging of semiconductor chips. .. At least one layer is VS
A VSDM configuration with multiple layers, which is a layer of D material, is a VSDM configuration, or simply VSDM.
It is called composition. This configuration 400 may be a cross-sectional view showing various layers in the PCB of a semiconductor package or other substrate device. In general, a VSDM configuration configured to realize vertical switching may also be referred to as a "vertical switching VSDM configuration".

A vertical switching VSDM configuration was developed by Shocking Technology in 2009.
It is disclosed in US Patent Application No. 12 / 417,589 filed on April 2, 2014, all of which is incorporated by reference in the specification, claims and drawings of this application.

The configuration 400 shown in FIG. 4A includes two substrate layers 460 and 462, which are insulating layers incorporated in the PCB, a layer 440 of VSD material, a conductive structure 430, and a conductive layer 432.

The conductive structure 430 comprises vias (eg, laser-drilled vias), pads, wiring,
Alternatively, it may be any other structure that is conductive and designed to facilitate the propagation of electrical signals.

The conductive layer 432 may be a signal layer or a ground layer integrated with the PCB.
In certain embodiments, the conductive layer 432 is a conductive substrate on which the VSD material 440 is initially placed (eg, a copper foil coated and cured with the VSD material 440).

The VSDM configuration 400 shown in FIG. 4A is arranged according to the vertical dimensions of the PCB as shown by the Z axis. With reference to the embodiment of FIG. 3, the Z-axis shown in FIG. 4A is FIG.
It is the same as the Z axis indicated by.

By way of analogy to the description of horizontal switching related to the embodiments of FIGS. 1 and 2, vertical switching means that the current flow is substantially parallel to the vertical direction of the substrate.

Referring to the embodiment of FIG. 3, the vertical switching in the structure shown in the embodiment of FIG. 4A is switched on so that the VSD material 440 is substantially conductive in response to a voltage exceeding the characteristic voltage. If so, it means that a current flows between the conductive structure 430 and the conductive layer 432 mainly in a direction substantially parallel to the Z axis shown in FIG. Again, with respect to horizontal switching, as described in connection with the embodiments of FIGS. 1 and 2, vertical switching is strictly such that current flows in a direction substantially parallel to the Z-axis (or vertical axis) of the substrate. Does not mean that it is limited to. Instead, the three-dimensional physics of the conductor, the three-dimensional structure of the PCB layout, the three-dimensional physics and shape of the VSD material structure, and the micro-level effects of the VSD material itself (eg, between particles dispersed within the VSD material). Considering (and / or current propagation within the particle), a certain amount of current flow can occur in the horizontal dimension, at least V.
It is expected that it can occur in local areas within the SD material. Nonetheless, vertical switching is mainly done on the Z-axis of the PCB board or other board so that useful electrical function can be achieved using the current flowing vertically through the VSD material 440. Or vertical axis) means that it occurs in a direction substantially parallel to it.

In one embodiment, the VSDM configuration 400 further comprises a conductive structure 430 and a VSD material 4.
A layered interconnect 434 arranged in contact with the 40 is provided. The layered interconnect 434 varies to increase the conductive region of the cross section at the boundary between the conductive structure and the VSD material structure, such as the boundary between the conductive structure 430 and the VSD material 440 shown in FIG. 4A. It is a conductive mechanism that can be added in the embodiment. By adding layered interconnects to such boundaries, the ability of each conductive structure to carry a larger current can be increased. Especially if this boundary is a small physical structure, it can result in another current or electric field concentration.
For example, this may be more desirable if the conductive structure 430 has a smaller cross-sectional area at the point of contact with the VSD material 440.

Generally, a layered interconnect such as the layered interconnect 434 shown in layer diagram 4A, which is arranged between the conductive structure and the structure of the VSD material, has a current flow between the conductive structure and the VSD material. To improve the mechanical properties of the boundary between the conductive structure and the VSD material (eg, strengthen the adhesion or bonding, improve the alignment of the thermal coefficient, etc.), and electrically between the conductive structure and the VSD material. It can improve connectivity and provide other similar benefits.

In various embodiments, the layered interconnect 434 has a conductive structure 430 with a VSD material 440.
Can be arranged to be completely or partially separated from, or to provide an additional electrical path between the conductive structure 430 and the VSD material 440 at the other boundary of the conductive structure 430 (eg, vertically). Can be placed.

In one embodiment, the layered interconnect 434 physically separates the conductive structure 430 from the VSD material 440. In order to manufacture such an embodiment, the layered interconnect 434 is V.
The conductive structure 430 can be formed on the upper end of the SD material 440, and the conductive structure 430 can be formed on the layered interconnect 434 so that the conductive structure 430 completely penetrates the layered interconnect 434. Can be avoided.

In one embodiment, the layered interconnect 434 is in physical contact with the VSD material 440, and the layered interconnect 434 wraps a portion of the conductive structure 430 at the boundary with the VSD material 440. To manufacture such an embodiment, the layered interconnect 434 is a VSD.
It can be formed on the top edge of material 440. Then, the conductive structure 430 has a layered interconnect portion 434.
Can be formed on top of the conductive structure 430 and VSD through the layered interconnect 434
A direct physical contact with the material 440 can be established (eg, to pierce with a laser, penetrate the layered interconnect 434 until reaching the VSD material 440, and then form a conductive via. By filling the holes with a conductive material, etc.).

FIG. 4B is a VSDM configuration 49 with a VSD material layer 498 that can be incorporated into a PCB or other substrate according to embodiments and configured to provide vertical switching.
Indicates 0. In certain embodiments, the VSDM configuration 490 shown in FIG. 4B includes the structural components of structure 430 shown in FIG. 4A and a number of additional structures and layers.

The VSDM configuration 490 shown in FIG. 4B typically has a prepreg filler 480, core 482.
, Prepreg Filler 484, Core 486, and a number of substrate layers which are insulators (or dielectrics) represented as Prepreg Filler 488.

The VSDM configuration 490 shown in FIG. 4B is represented by the conductive layer LI to the conductive layer L6, and also includes a large number of conductive signal layers numbered as conductive layers 470, 472, 474, 476, 478, 479. These signal layers can conduct electrical signals within the PCB board or from or to components and circuit elements mounted on the PCB, or serve as ground or other voltage reference points.

The VSDM configuration 490 shown in FIG. 4B also comprises two conductive structures represented as conductive structures 450, 452. Either or both of the conductive structure 450 and the conductive structure 452 can be vias, pads, wires, or any other structure designed to be conductive and facilitate the propagation of electrical signals. The VSDM configuration 490 shown in FIG. 4B is arranged along the vertical dimension of the PCB as shown by the Z axis. With reference to the embodiment of FIG. 3, the Z-axis shown in FIG. 4A is the same as the Z-axis shown in FIG.

In the embodiment of FIG. 4B, the layered interconnect 499 has a conductive structure 452 and a VSD material 49.
It is placed on the boundary with 8. In various embodiments, the layered interconnect 499 may resemble the layered interconnect 434 in the embodiment of FIG. 4A. The layered interconnect 499 brings various advantages to the boundary between the conductive structure 452 and the VSD material 498, including the matters described in relation to the layered interconnect 434 in the embodiment of FIG. 4A.

If the VSD material layer 498 exceeds its characteristic voltage, the conductive structure 452 and the conductive layer 474
If exposed to an intervening voltage, the VSD material contained in the VSD material layer 498 will switch on and become substantially conductive. In this case, the current flows mainly in the vertical direction between the conductive structure 452 and the conductive layer 474. If this happens, the VSD material layer 498 switches vertically.

In one embodiment, the characteristic voltage of the VSD material layer 498 as measured by the volt value reciprocates with the size of the gap in the VSD material, similar to the description given in connection with the embodiments of FIGS. 1 and 2. Is related to. For the embodiment of FIG. 4B, this gap size is substantially equal to the distance between the conductive structure 452 and the conductive layer 474, which is substantially equal to the VSD material layer 49.
It is also 8 thick. The exact formula for relating the gap size to the characteristic voltage for the VSD material is a number of variables (eg, the exact composition of the VSD material, the VSD material structure or the complete amount of layers, thereby the VSD material structure for which switching is achieved. It can vary depending on the actual shape of the VSD material, the impedance of any circuit element connected to the VSD material, etc.), while the gap of the VSD material is smaller than the VSD material configuration used in various embodiments. Generally, the characteristic voltage is small. For some applications, a smaller characteristic voltage may be desirable (eg, for applications where the VSD material is expected to switch in response to the smaller voltage).

However, as a general design study, by reducing the size of the gap in the VSD material, the VSD material structure becomes too small, resulting in the loss of some or all of the desired operating characteristics (eg, too thin). The VSD material structure may experience reduced reproducibility integrity when exposed to similar trigger voltages in quick succession, and may experience a reduced ability to dissipate heat, or short or dissipate. You have to balance the risk that you may be exposed to a higher risk).

The advantage of vertical switching over horizontal switching is that in some manufacturing environments it may be easier to control the gap size of the vertical switching configuration compared to horizontal switching configurations. For example, while including manufacturing costs for manufacturing horizontal VSD material gaps such as the gap 150 in the embodiment of FIG. 1 and the gap 250 in the embodiment of FIG. 2, the tolerances that can be achieved with current technology are not small enough. It can be difficult to maintain accurately across multiple PCBs that pass through a large number of commercial production lines. As a result, a different PCB board, or a horizontal switching VSD on the same PCB board.
M configurations can exhibit undesired large statistical fluctuations in their respective characteristic voltages and / or operational robustness, which are standard manufacturing techniques and processes provided in current production lines. It is more difficult to deal with using.

In contrast, in certain embodiments, vertical tolerances for VSDM configurations such as the VSD material configuration 400 shown in FIG. 4A may be easier to maintain accurately. For example, if VS
If the process in which the D material 440 is placed on the conductive layer 432 ensures a consistent and accurate thickness with respect to the VSD material 440, the gap 442 should have a consistently accurate gap size accordingly. become. In fact, this can be achieved by using advanced coating techniques that are integrated with appropriate inspection, measurement and monitoring processes.

Another advantage of vertical switching when compared to horizontal switching is that the VSD material structure used to perform vertical switching has a larger cross section through which current flows when the VSD material becomes substantially conductive. Can be manufactured with a region. Larger cross-sectional areas can usually carry larger currents, thus providing good performance characteristics and durability for each VSD material structure. For example, the cross-sectional switching region of the VSD material 140 in the embodiment of FIG. 1 is proportional to the thickness of the VSD material layer measured in the vertical direction, which thickness is usually small and tends to result in a smaller cross-sectional region. In contrast, the cross-sectional switching region of the VSD material 940 in the embodiment of FIG. 9 is proportional to the surface region of the electrode 920 as determined by the XY plane, which tends to produce a larger cross-sectional region. is there.

To arrange a layer of VSD material 140 such as VSD material 140 on the substrate 160 in the embodiment of FIG. 1 or VSD material 440 on the conductive layer 432 in the embodiment of FIG. 4A on the substrate, V
The SD material is coated and cured on the substrate. By way of example, referring to the embodiment of FIG. 4A, the VSD material can be coated and cured on a conductive sheet steel material (eg, copper) in order to place the layer of VSD material 440 on the conductive layer 432. Then, the cured VSDM structure is introduced as a compound layer in the PCB, and the material of the conductive thin plate becomes the conductive layer 432 and the layer of the VSD material becomes the VSD material 440. The rest of the configuration shown in FIG. 4A can be formed through various manufacturing steps during the manufacturing process.

Unless otherwise explicitly stated, the terms "VSD material composition", "VSDM composition", "VS"
The "D material configuration", "VSDM configuration", "VSD material laminate" or "VSDM laminate" may be any combination, arrangement or other structure (a) at least one VSD material structure, (
b) One or more of the following: (i) insulating elements (eg, prepregs or other insulating layers or structures in PCBs, insulating layers or structures in semiconductor packages, etc.), (ii) electrodes (eg, ii). , Conductive vias in PCBs or conductive connectors in semiconductor packages), (iii) semiconductor elements (eg, structures made from semiconductor materials, and / or (iv) different VSD material structures. An example of a VSD material structure having a simpler configuration is a combination of a VSDM structure arranged on a copper foil (eg, a layer of VSD material) and the foil itself.

Another example of a VSDM configuration with a more complex configuration is a vertically switching VSDM configuration disclosed in this patent application and / or claimed in connection with various embodiments, of the embodiment of FIG. 4A. VSDM configuration 400, VSDM configuration 490 of the embodiment of FIG. 4B, VSDM configuration 500 of the embodiment of FIG. 5, VSD material configuration 600 of the embodiment of FIG. 6, VSD material configuration 900 of the embodiment of FIG. 9, implementation of FIG. VSD material configuration 1000 of the embodiment, VSD material configuration 1100 of the embodiment of FIG. 11, VSD material configuration 1200 of the embodiment of FIG. 12A, FIG.
The VSD material configuration 1300 of the embodiment, the VSD material configuration 1400 of the embodiment of FIG. 14, the VSD material configuration 1500 of the embodiment of FIG. 15A, the VSD material configuration 160 of the embodiment of FIG.
0, and the bidirectional switching structure 1700 of the embodiment of FIG. 17 are included.

Coating and curing a VSD material structure, such as a layer of VSD material, on a substrate can be achieved through a series of steps. For example, referring to the embodiment of FIG. 4A,
In order to arrange the layer of the VSD material such as the VSD material 440 on the substrate which will eventually become the conductive layer 432, a series of steps such as the following steps can be used.

(1) The VSD material is in a liquid or semi-liquid state (eg, due to the particles and other materials dispersed in the VSD material, the viscosity of the VSD material is higher than the viscosity of a purer liquid such as water. Also tends to be higher, and therefore tends to flow slower) while its V on the substrate
Apply SD material.

(2) Spread the VSD material over the surface of the substrate while maintaining the thickness of the VSD material within the desired range and tolerances.

(3) The thickness of the layer of VSD material is monitored, inspected and / or over the larger surface of the coated substrate to ensure that the thickness of the VSD material is actually maintained within the desired range and tolerances. Or test.

(4) The VSD material is cured by exposing it to heat (eg, heating the VSD material coated on the substrate in an oven where the temperature is controlled and / or varies within a suitable range).

(5) Remove the solvent or other material to the extent that the solvent or other material is used in the previous manufacturing step and is designed to be removed at that time to facilitate subsequent processes.
And

(6) Thickness, consistency, defect density, operating overvoltage, physical elasticity, adhesiveness, flexibility or other physical properties, thermal durability or other thermal properties, and / or other associations. The resulting VSD comprises a layer of cured VSD material placed on top of the substrate to ensure that the layer of cured VSD material exhibits the expected properties and tolerances in terms of certain parameters. Monitor, inspect and / or test material composition.

In addition to coating, other methods can be used to place VSD material structures, such as layers of VSD material, on the substrate. Other methods such as deposition, screen printing, die coating, comma coating, lamination, mechanical bonding (eg, by pre-curing the VSD material in the layer and then attaching it to the substrate), Alternatively, mechanical, chemical, or other bonding methods may be used. Regardless of the method used, the resulting VSD material composition comprises a layer of VSD material placed on a substrate (whether conductive or not), the VSD material being cured and voltage switching. Can perform functions.

In one embodiment, instead of producing a VSD material configuration with a layer of VSD material pre-cured on the substrate and then incorporating the VSD material configuration into the PCB, the VSD material is P.
It may be coated over a layer of PCB during the actual manufacturing process of the CB. Referring to FIG. 4B, for example, the conductive layer L3 474 may be attached to the prepreg filler 484 during the manufacture of the VSDM configuration 490, after which the layer 498 of the VSD material may be attached to the conductive layer L3 47.
Placed in 4 and cured. The layered interconnect 434 may then be formed on the top surface of the VSD material 498 (eg, screen printing). The core 482 is then layered 49 of VSD material.
The conductive structure 452 may be sequentially formed in the core 482, or may already be formed in the core 482 prior to attachment.

FIG. 5 shows a VSDM configuration 500 configured to achieve vertical switching using VSD material according to an embodiment. The VSDM configuration of FIG. 5 can be integrated into a substrate device such as a PCB, flexible circuit, or semiconductor chip packaging.

The VSDM configuration 500 of FIG. 5 includes a set of a conductive layer 520 and a conductive layer 522, which are PCs.
It can be a conductive signal layer at B or another electrode. The VSDM configuration 500 of FIG. 5 further comprises a layer 540 of VSD material.

The layered interconnect portion 530 is arranged between the conductive layer 520 and the VSD material 540. The layered interconnect 532 is arranged between the VSD material 540 and the conductive layer 522. In one alternative embodiment, either or both of the layered interconnect 530 and the layered interconnect 532 are absent, in which case the VSD material 540 is in direct physical contact with one or both of the two conductive layers. ing.

In various embodiments, the "layered interconnect" is used as part of or connected to a vertically switching VSDM structure to transfer voltage and / or current along an electrical path that includes one or more VSDM structures. Any conductive structure that may be. In certain embodiments, the layered interconnects are arranged to allow horizontal conduction (eg, within the horizontal layer).
In certain embodiments, the layered interconnects are vertical (eg, over one or more horizontal layers).
And / or arranged to allow conduction (between two or more horizontal layers). In certain embodiments, the layered interconnects are arranged to allow conduction both horizontally and vertically and / or diagonally.

In various embodiments, layered interconnects such as the layered interconnect 530 or layered interconnect 532 in FIG. 5 can be created using a suitable process, such as screen printing. By textile printing, deposition, bonding, lamination using heat and / or pressure, any other physical attachment (eg bonding or bonding), or pre-construction of layered interconnects into the substrate (eg). Placing layered interconnects as layers, structures, conductive cores or prepregs within a PCB, or as layers or conductive structures within a semiconductor package). In some embodiments, a substrate attached to a layer of VSD material (eg, a copper foil used as a substrate for a layer of VSD material) is a layered interconnect to allow horizontal conduction within a PCB or other substrate. Functions as. In general,
Layered interconnects suitable for use in connection with various vertical switching VSDM configurations can be manufactured by mechanical, chemical, or other suitable deposition treatment.

In various embodiments, the layered interconnect can have a wide range of impedances. For example, in some embodiments, it may be desirable to have a layered interconnect with negligible impedance (eg, a conductive film with very low resistance and high conductivity that does not result in a large voltage drop). There is. As another example, the layered interconnect may be designed to have high impedance and cause a certain voltage drop as current flows through it (eg, the layered interconnect may be an embedded circuit element). , Or an embedded circuit element may be included). Examples of layered interconnects with resistances that are usually not considered negligible are 25-1000
A conductive film having ohm resistance. In certain embodiments, the layered interconnect may be configured to be element 1592 of the embodiment of FIG. 15A, or may be embodied to operate as element 1592 of the embodiment of FIG. 15A.

Layered interconnects with non-negligible electrical resistance vary as carbon-filled epoxy resins or copper-deposited nickel-chromium alloys (eg, thin thin film resistance layers thermally deposited on copper foil). Can be manufactured for various embodiments.

In various embodiments, the layered interconnect can be made from a material having a high dielectric constant or a combination thereof, which allows the layered interconnect to have a higher capacitance.

In various embodiments, the layered interconnect can be made from any material or combination thereof that is capable of carrying current and is suitable for use in connection with substrate applications.

Examples of materials used to make layered interconnects related to this embodiment, such as layered interconnects 530, or layered interconnects 532, are manufactured by 3M and are "3M ^TM Z-axis electrical conductivity." It is a Z-axis conductive tape sold under the brand name "Sex tape 9703". When placed as a substantially horizontal layer, the Z-axis conductive tape is substantially conductive when the current propagates along the Z-axis, but is substantially insulating in the horizontal direction. Shows anisotropic, vertical conductivity along the Z axis.

Other examples of materials used to make layered interconnects related to this embodiment, such as layered interconnects 530, or layered interconnects 532, are silver pastes, copper pastes, and other metal types. Pastes, silver-plated copper layers, carbon layers, compounds containing ferroic materials (ferroic materials) or ferrites, conductive epoxy resins or polymers, or layers, structures or connectors of any other material that can carry current. Is. In general, unless the layered interconnects have anisotropic conductivity, they are layered to allow current to flow horizontally, vertically and / or diagonally, depending on the particular architecture of each embodiment. The interconnect can be used in vertical switching VSDM configurations in various embodiments.

In the embodiment of FIG. 5, the voltage source can be connected between the conductive layer 520 and the conductive layer 522. The voltage source 510 shown in FIG. 5 is shown as a stand-alone voltage source and can be a current source or any other electrical energy source. Such an arrangement can be encountered during test setup or in certain structural arrangements that are intended to deliberately activate the VSD material by increasing the voltage generated by the voltage source 510.

However, in a more general sense, the voltage applied between the conductive layer 520 and the conductive layer 522 may be any voltage signal or other electrical signal, the ESD shown in the embodiment of FIG.
The voltage generated by the ESD discharge is included as indicated by pulse 512. In the normal operating environment commonly experienced by end-user devices such as mobile phones, the ESD pulse 512 has a high voltage amplitude (eg, over 200-300 volts, and in some cases 2000).
It can be expected to have a short period (eg, between nanoseconds and microseconds) (~ 3000 volts). Despite the short period of time, the electrical current generated by the ESD pulse 512 can be expected to reach large amplitudes, and in some cases above 10 amps. If the structure of the embodiment of FIG. 5 is used for ESD protection, one of the conductive layer 520 and the conductive layer 522 is connected to a grounding plate (or another predetermined point in the circuit or device to be protected). It is possible that the ESD pulse 512 can be guided to ground or reach a predetermined location.

If the voltage applied by the voltage source 510 (or by the ESD pulse 512) is V
If the characteristic voltage of the SD material 540 is not exceeded, the VSD material 540 remains substantially non-conductive and passes through the layered interconnect 530 and the layered interconnect 532 to the VSD.
The VSD material 540 is usually such that the leakage current is minimized so as not to affect the performance of the electronic device in which the 500 structures are arranged, passing through the material 540 (possibly excluding some amount of leakage current). (Designed), no influential current flows between the conductive layer 520 and the conductive layer 522.

To illustrate that the voltage source 510 and the ESD pulse 512 can also exist in alternative examples and are used for general purposes, the connecting lines between each of them and the conductive layer 520 and the conductive layer 522 are dotted. Shown. In general, any voltage source, ESD signal, or other power source, overvoltage signal, or potential difference can be applied between the conductive layer 520 and the conductive layer 522. Either of the two conductive layers may be connected to ground or may be connected to a location with another reference voltage level.

If the voltage VS applied by the voltage source 510 (or by the ESD pulse 512)
When the characteristic voltage of the D material 540 is exceeded, the VSD material 540 switches to become substantially conductive, and a considerable amount of current flows between the conductive layer 520 and the conductive layer 522 through the VSD material 540. It flows.

If, for a given VSD material composition, the characteristic field of the VSD material is the voltage value per mill (V).
If defined in units of / mil) (or otherwise the voltage value per unit length),
The characteristic voltage of a layer of VSD material with a given thickness can be determined as a particular voltage value. For example, if layer 540 of VSD material across gap 542 in the embodiment of FIG.
The thickness of the VSD material is displayed as T, and the characteristic field of the VSD material expressed by the voltage value per mill is ECH.
If it is displayed by, the corresponding characteristic voltage expressed by the voltage value is displayed by VCH and is expressed as follows.

V _CH (V) = E _CH (V / mill) * T (mill) (Equation 1)

Equation 1 is generally correct if the value of the characteristic field ECH is assumed to be constant, or if it can be approximated to be approximately constant for each thickness T.

However, in general, the characteristic field ECH is not always constant over each gap of the VSD material, and the V
It may have values that vary with the thickness of the SD material structure. To the extent that the characteristic field ECH is not constant over the switching VSD configuration gap, the characteristic voltage VCH is obtained by integrating the characteristic field ECH over the corresponding thickness T.

From Equation 1, the VSD material structure 54 by reducing the thickness of the VSD material layer 540.
It can be seen that the characteristic voltage of 0 becomes smaller accordingly. Illustrative Values The exemplary values that can be used for the thickness of VSD material 540 in industrial applications to mobile phones include 2 mils or less. To further reduce the characteristic voltage, the thickness of the layer 540 of the VSD material may be reduced to 1 mil or less.

If the impedance of the layered interconnect 530 and the layered interconnect 532 and the conductive layer 5
If the impedances of 20 and the conductive layer 522 are negligible, then the voltage drop at the conductive layer and the layered interconnect is not a significant amount, so the VSD material 540 is switched on and the voltage source 510, Alternatively, the VSD material 540 becomes substantially conductive after the voltage generated by the ESD pulse 512 reaches the characteristic voltage of layer 540 of the VSD material.

FIG. 6 shows a VSDM configuration 600 configured to implement vertical switching using a VSD material according to an embodiment. The VSDM configuration of FIG. 6 can be incorporated within a substrate device such as a PCB, flexible circuit, or semiconductor chip packaging.

The VSDM configuration 600 of FIG. 6 includes a set of a conductive layer 620 and a conductive layer 622, which are PCs.
It can be a conductive signal layer at B or another electrode. The VSDM configuration 600 of FIG. 6 further comprises a VSD material structure 640, the VSD material structure 640 having a substantially gap 64 in thickness.
Arranged as a layer equal to 2, represented by T.

The layered interconnect portion 630 is arranged between the conductive layer 620 and the VSD material structure 540.
The conductive layer 622 makes physical and electrical contact with the VSD material 640.

According to various embodiments, in addition to conventional rigid substrates such as rigid PCBs and rigid semiconductor packaging, vertical switching VSDM configurations are used in flexible circuits, flexible substrates, flexible semiconductor packaging, and other flexible devices. It may be implemented. To achieve this, the composition of the VSD material used is adjusted to exhibit a high degree of elastic properties. For example, as a general guideline, reducing the metal particle content in a VSD material (eg, by reducing or removing the metal particles dispersed in the VSD material) reduces the vulnerability of the once cured VSD material. Will weaken,
Therefore, VSD materials are more suitable for application to flexible devices.

Vertical switching VSD material configurations may be further adapted to the implementation of flexible device applications by adding appropriate mechanical properties and / or environmental resistance to one or more layers.
For the VSD material configuration 600 shown in the embodiment of FIG. 6, for example, two additional layers are added as polyimide substrates 680, 682.

Polyimide materials are generally lightweight and flexible, have higher mechanical extensibility, and tend to improve resilience from thermal and chemical reactions. Polyimide materials are used in the manufacture of flexible electrical cables in the electronics industry, as insulating or protective layers in the manufacture of digital semiconductors and MEMS chips, as insulating films, as high temperature adhesives, for medical tube applications. And each is used for other applications that are flexible, lightweight and require improved environmental resilience.

Polyimide substrate 680 included in the VSD material configuration 600 shown in the embodiment of FIG.
Other applications of vertical switching VSD material configurations, including heat resistant materials such as, 682, include regions of higher environmental temperatures (eg, hot climates) or within devices with limited breathability (eg, besieged). Alternatively, there are high thermal applications such as LED panels or electronic application products that operate on embedded electronic devices or systems with limited or non-existent cooling capabilities.

The operation and electrical behavior of the VSDM configuration 600 shown in FIG. 6 is generally the VS shown in FIG.
The operation and electrical behavior of the DM configuration 500 are similar. In particular, the conductive layer 620 and the conductive layer 6
When a voltage is applied to and from 22, the inside of the conductive layers 620 and 622, or the layered interconnect 6
Within 30, it is considered that no influential voltage drop occurs as long as each impedance is negligible. Therefore, the voltage source 610 (or ESD pulse 6)
When the voltage applied by (12) exceeds the characteristic voltage of VSD material 640, VS
The D material 640 is switched on and becomes substantially conductive. VSD material 640
The characteristic voltage of is proportional to the thickness T of the VSD material 640.

FIG. 7 shows a method for forming a vertically switching VSDM configuration that includes layered interconnects or other electrodes according to an embodiment. As shown in FIG. 7, this method 700
It comprises various steps that can be used to make one or more conductive structures such as one or more layered interconnects or other electrodes within a vertical switching VSDM configuration. Additional optional steps may be applied to further improve the resulting VSDM configuration.

The method of manufacturing various devices such as LED devices by electroplating with VSD material is
U.S. Pat. No. 7,825, entitled "Light Emitting Device Using Voltage-Switchable Dielectric Material"
It is described in No. 491, the contents of which are incorporated herein by reference.

In step 710 of the embodiment of FIG. 7, the VSD material is applied to the substrate or surface (eg, to copper foil). In step 720, a layer of non-conductive material is placed on top of the VSD material (eg, a layer of photoresist material).

In step 730, the non-conductive layer is patterned with a particular pattern defining one or more conductive structures such as layered interconnects or other electrodes. For example, step 7
The pattern in 30 can define the position and shape of the layered interconnect 434 according to the embodiment of FIG. 4A, which is arranged on the upper surface of the layer 440 of the VSD material. In one embodiment, the non-conductive layer is a photoresist layer, which is exposed to laser light through a photomask and then an etching process is performed.
A pattern is formed. As is well known to those skilled in the art, either positive photoresist treatment or negative photoresist treatment may be used. As a result of step 730, VSD
Allow one or more areas of material to be exposed through a non-conductive layer corresponding to one or more parts of the pattern.

In step 740, when a voltage exceeding the characteristic voltage of the VSD material is applied,
Therefore, the VSD material becomes substantially conductive. This voltage may be applied directly to the VSD material or to the conductive substrate on which the VSD material is located (eg, to the copper foil). The applied voltage may be either a constant voltage or a fluctuating voltage (eg, a pulse).

Step 750 to form a conductive structure (eg, a layered interconnect such as a layered interconnect 434 in the embodiment of FIG. 4A) in the exposed region of the VSD material pattern while the VSD material is conductive. The ion deposition process is executed in. Various known deposition processes can be performed to deposit the ionic medium in at least a portion of the exposed area defined by the pattern of the exposed VSD material. In one embodiment
An electroplating process is performed to immerse the exposed area of the VSD material in the electrolyte.

According to another embodiment, the ion deposition is performed using a powder coating process.
In this process, the powder particles are charged and deposited in the exposed area of the VSD material, which is substantially conductive. Adhesion of the powder can be achieved by depositing the powder in the exposed area or by immersing the substrate in a powder bath.

In yet another embodiment, an electrostatic spray process may be used. The ionic medium may be contained in the form of charged particles in the solution. The substrate may be immersed in this solution while the VSD material is conductive. Ink or paint may be used to spray the spray.

Other deposition techniques include vacuum deposition (vacuum deposition) on exposed areas of VSD material during a substantially conductive state.
For example, it can be used in various embodiments to perform deposition such as physical vapor deposition (PVD) or chemical vapor deposition (CVD) treatment). For example, in PVD, metal ions
Introduced into the chamber to combine with gaseous ions. The exposed area of the VSD material can be conductive because it has an opposite charge so as to attract and bond the ions in the chamber. In CVD, a film of ionic material can deposit on the VSD material on the surface of the substrate.

In step 760, the non-conductive material may optionally be removed from the substrate so as to leave the formed conductive structure (eg, layered interconnects or other electrodes used in the vertical switching VSDM configuration). In one embodiment, when the photoresist material is used as a non-conductive material, a basal solution (eg, KOH), or water, is added to the substrate to remove the photoresist material.

In certain embodiments, following the removal of the photoresist layer, a polishing step can be applied to the resulting VSDM configuration. In certain embodiments, it is used to polish a substrate of VSDM configuration resulting from chemical mechanical polishing.

FIG. 8 shows a graph 8000 of the envelope of the sample response voltage of a vertically switching VSDM configuration such as the VSDM configuration 500 shown in FIG. 5 or the VSDM configuration 600 shown in FIG. 6 according to an embodiment. The voltage response curve 820 shown in FIG. 8 is TLP (transmissi).
It was obtained by measuring the voltage between both sides of a layer of VSD material with a vertical gap of 2 mils while repeatedly applying the input voltage in the form of an on line pulse) method. For example, in the embodiment of FIG. 5, this measurement can be realized by measuring the voltage at the conductive layer 520 with respect to the conductive layer 522 when the voltage source 510 is applied to the TLP.

In certain embodiments, the measurement of the response voltage of the VSDM configuration in response to the TLP can be processed using a TLP generator and an oscilloscope as follows.

(1) The TLP generator sends a pulse to the coaxial cable transmission line toward an electrode having a VSDM configuration having a gap having a corresponding characteristic voltage.

(2) The ossiloscope is a TL that moves toward the target electrode of the VSDM configuration.
Capture P.

(3) The TLP arrives at the target electrode of the VSDM configuration. Some parts of the energy from the TLP are reflected as echoes.

(4) The oscilloscope catches the reflected echo, and

(5) In order to evaluate the characteristic voltage of the VSDM configuration existing over each gap.
A computer may be used to process the TLP and the reflected signal.

The response curve 820 shown in part 802 of this graph is displayed on a longer time scale. This response curve 822, shown in part 804 of this graph, is a response curve 820 displayed on a shorter time scale of 16 nanoseconds. Each TLP voltage input has a signal 81
0, indicated as signal 812.

As shown by graph 800, as the input signal 810 increases, the voltage VS
The voltage between both sides of the D material layer initially follows the input voltage, but begins to move away from the input voltage as the VSD material begins to carry more and more current. At some point, the VSD material is
Switched to be substantially conductive, the response signal stabilizes at values below 200V, despite the fact that the input signal 810 continues to increase. The characteristic voltage of the VSD material layer can be estimated from graph 800 to be between 150V and 220V.

FIG. 9 shows a VSD material configuration 900 configured to achieve vertical switching with VSD materials according to embodiments. Vertical switching VSD material configuration 900 in FIG.
May be incorporated into any electronic device, including substrate devices such as PCBs, flexible circuits, or packaging of semiconductor chips to allow protection from ESD and other overvoltage events. FIG. 9 shows a cross-sectional view of the VSD material configuration in the vertical direction of a substrate such as a PCB.

The VSD material configuration 900 of FIG. 9 includes a pair of electrodes 920 and 922. The electrodes 920 and 922 are arranged in contact with the VSD material structure 940, which is shown as a layer in the embodiment of FIG. Layer 940 of VSD material has a gap of 9
It has a thickness substantially equal to the thickness of 42 and is represented by T. As a commercial example, VSD
Depending on the composition of the material 940, the characteristic voltage and the design of other physical or operational characteristics desirable for the VSD material 940, T can take a wide range of values. Specific exemplary values of T include 2 mils, 1.5 mils, 1 mil, and 0.5 mils. Generally, VSD
For the material structure 940, a smaller value T is expected in order to have a lower characteristic voltage.

The via 930 intersects the layer of VSD material 940 and contacts the electrode 922. Beer 930
Is substantially conductive. The layered interconnect portion 970 is arranged in contact with the layer of the VSD material 940 along the horizontal plane opposite to the electrodes 920 and 922. Layered interconnect 97
The various layered interconnects that can be used to carry out zero are Z-axis layered interconnects that impede the efficient flow of current in the horizontal direction, except that the Z-axis layered interconnects are not suitable for this particular practice. It is described in connection with the embodiment of FIG.

The layered interconnect portion 970 is arranged in the prepreg layer 980. Prepreg 980
Is a component of a substrate device such as a PCB, and is in physical contact with another layer of the substrate, the core 982. The prepreg 980 is substantially an insulator.

It can be assumed that the vias 930 and the layered interconnect 970 are substantially conductive and have generally negligible impedance. Therefore, the voltage is transmitted between the electrode 922 and the layered interconnect 970 without substantial loss.

If a voltage exceeding the characteristic voltage of the VSD material structure 940 is applied between the electrodes 920 and 922 by the voltage source 910 or the ESD pulse 912, the VSD material 940 becomes substantially conductive. Since the electrode 922 and the layered interconnect 970 have substantially the same voltage level, a current flow across the VSD material 940 will occur primarily between the electrode 920 and the layered interconnect 970 in the vertical direction. .. One reason for this is that the current tends to choose the path with the lowest impedance for propagation, and the layered interconnect 97
Vertically crossing layer 940 of VSD material between 0 and electrode 920 will result in a minimal impedance path.

The fact that the VSD material structure 940 switches vertically in the embodiment of FIG. 9 does not necessarily mean that the current flows beyond the gap 942 exactly along the Z axis. Instead, due to various effects as described in more detail in relation to the embodiment of FIG. 3, a constant level of current flow can occur horizontally within the VSD material structure 940. However, in general, when the VSD material 940 switches to become substantially conductive in the embodiment of FIG. 9, the current flow is predominantly in a direction substantially parallel to the Z-axis (or vertical axis) of the respective substrate. Will occur.

Since the current flow in the VSD material structure 940 of the embodiment of FIG. 9 occurs substantially vertically across the gap 942, the characteristic voltage of the VSD material structure 940 can be determined by the thickness T of the gap 942. it can. For some configurations of VSD material, this characteristic voltage is
It can be determined by Equation 1.

The advantage of the vertical switching VSDM configuration 900 shown in the embodiment of FIG. 9 is the electrode 920,
The 922 can be placed horizontally with limited accuracy. As long as there is sufficient overlap between the electrodes 920 and the layered interconnect 970, and as long as there is good electrical contact with the vias 930, the specific horizontal placement of these electrodes is not a significant issue. Because.

Another advantage of the vertical switching VSDM configuration 900 shown in the embodiment of FIG. 9 is the electrode 9
Since metal electrodes such as 20, 922 (eg copper) can be placed in the outer layer, heat dissipation and / or heat of the LED device or other device that can benefit from improved thermal cooling. Is to be able to promote the conduction of.

In various embodiments, once the VSD material is substantially conductive, current flows through the VSD material structure with virtually no loss (eg, a set of conductive states that are in electrical contact with each other. The vertical switching VSDM configuration shown in FIG. 9 is conductive, insulating and semi-conducting, while following the general operating principle of current flowing across the vertical thickness of the VSD material structure (through a set of mechanisms). Both various other layers and mechanisms with can be added and implemented. In this general design approach, the characteristic voltage of the VSD material is determined by the vertical thickness of the VSD material configuration.

FIG. 10 shows a VSD material configuration 1000 configured to achieve vertical switching using a VSD material according to an embodiment. The vertical switching VSD material configuration 1000 of FIG. 10 can be incorporated into any electronic device, including substrate devices such as PCBs, flexible circuits, or packaging of semiconductor chips to protect against ESD and other overvoltage events. FIG. 10 shows a cross-sectional view of the VSD material configuration in the vertical direction of a substrate such as a PCB.

Instead of the single VSD material structure 940 in the embodiment of FIG. 9, in the embodiment of FIG. 10, two VSD material structures, a layer 1040 of VSD material having a vertical thickness Tl over the gap 1042, and a gap 1046. Vertical switching VSD of FIG. 10 except that there is a layer 1044 of VSD material with a vertical thickness T2 spanning.
The material configuration 1000 is generally similar to the VSD material configuration 900 of FIG. Commercial examples depend on the composition of VSD material 1040, 1044, and VSD material structure 1040.
Desirable characteristics for 1044 Depending on the voltage and other physical or operational characteristics, T
1 and T2 can take a wide range of values. In various embodiments, VSD material 1040,
The configuration of 1044 may or may not be the same. Similar to this, in various embodiments, the vertical thickness T1 of the VSD material 1040 and the VSD material 1044, respectively.
And T2 may or may not be equal. Specific exemplary values for the sum of T1 and T2 include 2 mils, 1.5 mils, 1 mil, and 0.5 mils. Generally, VSD material structure 1
Small values are desired for T1 and / or T2 in order to provide a lower characteristic voltage for 040 and / or VSD material structure 1042.

Generally, two or more VSD material structures used to produce a set of compounds of VSD material structure as components of a vertically switching VSDM configuration such as VSD material 1040, 1044 used to make VSDM configuration 1000. They may have the same, substantially the same, or different properties with respect to each other with respect to properties including dielectric constant, adhesive properties, stiffness, flexibility, composition, and thickness.

The VSD material configuration 1000 of FIG. 10 includes a set of electrodes 1020 and 1022. Electrodes 1020 and 1022 are arranged so as to be in contact with the first VSD material structure and the first VS.
The D material structure is shown in FIG. 10 as layer 1040 of VSD material. The via 1030 traverses the layers of VSD material 1040 and 1044 and contacts the electrode 1022. Beer 1030
Is substantially conductive. The conductive layer 1070 is arranged in contact with the layer 1044 of the VSD material along the horizontal plane opposite to the electrodes 1020 and 1022. The conductive layer is made of a conductive material (eg, copper) or may be a layered interconnect. Conductive layer 1070
The various layered interconnects that can be used to mount the are effective horizontal current flow, except that the Z-axis layered interconnects are not suitable for a particular implementation. The embodiment of FIG. 5 is described.

The conductive layer 1070 is arranged adjacent to the prepreg layer 1080. Prepreg 10
Reference numeral 80 denotes a component of a substrate device such as a PCB or a flexible circuit, which is in physical contact with another layer of the substrate, the core 1082. The prepreg 1080 is substantially an insulator.

It can be assumed that the vias 1030 and the conductive layer 1070 are substantially conductive and have generally negligible impedances. Therefore, the voltage propagates between the electrode 1022 and the conductive layer 1070 without causing substantial loss.

If the voltage exceeding the sum of the characteristic voltage of the VSD material structure 1040 and the characteristic voltage of the VSD material structure 1044 exceeds the sum of the characteristic voltage of the VSD material structure 1040 and the electrode 1020 and the electrode 1 by the voltage source 1010 or the ESD pulse 1012
If applied between 022, the VSD materials 1040 and 1044 will be substantially conductive. Since the voltage levels of the electrode 1022 and the conductive layer 1070 are substantially the same, the current flow across the VSD materials 1040 and 1044 is mainly in the vertical direction of the electrode 1020 and the conductive layer 1.
Occurs with 070. One of the reasons for this phenomenon is that the current tends to choose the path with the lowest impedance for propagation, and the layers of VSD material 1040, 1044 are perpendicular between the conductive layer 1070 and the electrode 1020. Crossing is generally provided with a path having the lowest impedance.

As a result, the VSDM configuration 1000 shown in the embodiment of FIG. 10 is vertically switched and the current passes through the VSD material structures 1040 and 1044 and is substantially parallel to the Z-axis (or vertical axis) of each substrate. Flow to.

The current flow in the VSD material structure 1040, 1044 of the embodiment of FIG. 10 is the gap 10.
Two different VSD material structures 1 as they flow substantially vertically across 42, 1046.
The characteristic voltage of the composite VSD material structure formed by 040 and 1044 will be determined by the composition of the two VSD materials and by the thickness Tl of the gap 1042 and the thickness T2 of the gap 1046, respectively. For certain configurations of VSD material, the characteristic voltage of this composite spans gap 1042 and gap 1046, respectively, VSD material structure 1040, 1
It can be determined by adding the individual characteristic voltages of 044.

In general, in a composite configuration of a structure of two or more VSD materials in which vertical switching is occurring, the effective characteristic voltage of the complex set of VSDM structures, whether or not they are in physical contact with each other, is the composite. As the total thickness of the VSD material structure increases, the resulting composite characteristic voltage also tends to increase, correlating with the total thickness of the individual VSD material structures.

In various embodiments, the vertical switching VSDM configuration shown in FIG. 10 is an individual VS.
When the D material structure becomes substantially conductive, it is substantially over one vertical direction of the two or more VSD material structures (eg, through a set of conductive mechanisms that are in electrical contact with each other). Various other layers of conductivity, insulation and semiconductivity, while following the general operating principle of lossless current flow and vertical flow through the thickness of two or more opposite VSD material structures. And the mechanism can be added and implemented. In this general design approach, the characteristic voltage of the composite of VSD material structures is determined by the overall vertical thickness of the individual VSD material structures and the characteristic voltage of each VSD material.

FIG. 11 shows a VSD material configuration 1100 configured to achieve vertical switching using a VSD material according to an embodiment. The vertical switching VSD material configuration 1100 of FIG. 11 can be incorporated into any electronic device, including substrate devices that allow protection from ESD and other overvoltage events. VSD material composition 1 in various embodiments
Examples of substrate devices that can incorporate 100 include PCB and semiconductor chip packaging. FIG. 11 shows a cross-sectional view of the VSD material structure in the vertical direction of the substrate device.

Instead of the two VSD material structures according to the embodiment of FIG. 10, the embodiment of FIG. 11 comprises a single layer 1140 of VSD material having a vertical thickness T across the gap 1142. The vertical switching VSD material configuration 1100 of FIG. 11 is the VS of FIG.
D Material composition is generally similar to 1000. Nevertheless, in various embodiments, the VSD
Multiple layers of material can be utilized as generally described for the embodiment of FIG. In commercial embodiments, T can take a wide range of values, depending on the configuration of the VSD material 1140 and depending on the characteristic voltage and other physical and operational characteristics desirable for the VSD material 1140. Certain exemplary values of thickness T that could be considered for implementation in the manufacturing process are:
Includes 2 mils, 1.5 mils, 1 mil, 0.5 mils, 0.2 mils and smaller values. In general, it is expected that the smaller the value of T, the lower the characteristic voltage of the VSD material structure 1140.

The VSD material configuration 1100 of FIG. 11 includes a set of electrodes 1120 and 1122. Electrodes 1120 and 1122 are arranged in contact with the VSD material structure 1140. The conductive prepreg layer 1170 is arranged in contact with the layer 1140 of VSD material along the horizontal plane opposite to the electrodes 1120 and 1122. The conductive prepreg layer can be a layer within a substrate device such as a PCB, flexible circuit, or packaging of semiconductor devices. The conductive prepreg layer 1170 is a layer configured to carry current with minimal or no loss and /.
Alternatively, it is a set of conductive structures or includes these. The conductive prepreg layer 1170
It is in physical contact with another layer of the substrate, the core 1182. Core 1180 is substantially an insulator.

If a voltage exceeding the characteristic voltage of the VSD material structure 1140 is applied between the electrodes 1120 and 1122 by the voltage source 1110 or the ESD pulse 1112, the VSD material 114
0 is substantially conductive. The flow of current across the VSD material 1140 is the electrode 1120.
Between and the conductive prepreg layer 1170, and between the electrode 1122 and the conductive prepreg layer 117.
It occurs mainly in the vertical direction during 0. Once a current flows from either the electrode 1120 or the electrode 1122 across the VSD material structure 1140 in a particular sense, the current propagates along the conductive prepreg layer 1170 with minimal loss or losslessness. The current is then VSD in the opposite vertical direction towards the other of the two electrodes 1122, or 1120.
It flows across the material structure 1140. The reason for the predominantly vertical current flow across layer 1140 of the VSD material is that it tends to choose the path with the lowest impedance for propagation, with either electrode 1120 or electrode 1122 and the conductive prepreg 1170.
Vertically crossing layer 1140 of VSD material with and from will generally provide a path with minimum impedance. When the distance between the two electrodes 1120 and 1122 is reduced to the extent of the gap 1142, the VSD material 1140 can carry a larger current in the horizontal direction. In some embodiments, it exhibits substantially conductivity when the current propagates along the Z axis, but exhibits anisotropic horizontal conductivity such that it is substantially insulated in the horizontal direction. This can be reduced by producing a composition of VSD material 1140.

As a result, the VSDM configuration 1100 shown in the embodiment of FIG. 11 switches vertically and the current flow traverses the VSD material structure 1140 and is substantially parallel to the Z-axis (or vertical axis) of each substrate. It occurs in the wrong direction.

In various embodiments, the vertical switching VSDM configuration shown in FIG. 11 is such that the current is one or more VS in one vertical direction when the individual VSD material structures are substantially conductive.
Flow across the D material structure, then horizontally with minimal or lossless, and then the thickness of one or more VSD material structures while the individual VSD material structures remain substantially conductive. Both conductive, insulating and semi-conducting various other layers and mechanisms can be added and implemented, while following the general operating principle of flowing across and in opposite vertical directions. In this schematic design approach, the characteristic voltage of one or more layers of VSD material is determined by the sum of the vertical thicknesses of the individual VSD material structures and by the characteristic voltage of each VSD material.

FIG. 12A shows a VSD material configuration 1200 configured to achieve vertical switching using VSD materials according to an embodiment. The vertical switching VSD material configuration 1200 in the embodiment of FIG. 12A can be incorporated into any electronic device, including a substrate device, to protect against ESD and other overvoltage events. Examples of substrate devices into which the VSD material configuration 1200 can be incorporated in various embodiments include packaging of PCBs and semiconductor chips. FIG. 12A shows a cross-sectional view of the VSD material configuration in the vertical direction of the substrate device.

The vertical switching VSD material configuration 1200 of FIG. 12A comprises a layer of VSD material 1240 having a vertical thickness T across the gap 1242. As outlined with respect to the embodiment of FIG. 10, multiple layers of VSD material are utilized in various embodiments.
In commercial examples, depending on the compounding composition of the VSD material 1240, and depending on the characteristic voltage and other physical or operational properties desirable for the VSD material 1240, T.
Can take a wide range of values. Specific exemplary values of thickness T that may be considered for implementation in the manufacturing process include 2 mils, 1.5 mils, 1 mil, 0.5 mils, 0.2 mils, and smaller values. included. In general, the smaller the value of T, the more VSD material structure 1240.
It is expected that the characteristic voltage of will be lower.

The VSD material configuration 1200 of FIG. 12A comprises a set of electrodes 1120, 1122, and 1124, which are arranged in contact with the VSD material structure 1240. The conductive layer 1270 is arranged adjacent to the prepreg layer 1230. The prepreg layer 1230 is a conductive layer 1270.
And placed between layers of VSD material 1240. The layered interconnect 1280 is arranged in contact with the layer 1240 of VSD material. In certain embodiments, the layered interconnect 1280 is shown in FIG.
It is formed within the prepreg layer 1230 as shown in 2A. In certain embodiments, the layered interconnect 1280 separates the prepreg layer 1230 from the VSD material 1240 (a distinguishing layer (1240).
That is, it may be arranged as (not formed in the prepreg layer 1230). The prepreg layer 1230 can be a layer within a substrate device such as a PCB, flexible circuit, or packaging of semiconductor devices.

The via 1250 traverses the prepreg layer 1230 and makes electrical contact with the layered interconnect 1280 to establish electrical contact between the conductive layer 1270 and the layered interconnect 1280.

In the embodiment of FIG. 12A, the electrodes 1220 and 1224 are connected to ground. In certain embodiments, one or both electrodes can be connected to different locations in the electrical circuit, where they may have a voltage source, circuit element or component, or other reference potential difference. Includes where ESD pulses or other voltages can be directed.

If a voltage exceeding the characteristic voltage of the VSD material structure 1240 is applied to the conductive layer 1270 by the ESD pulse 1212 (or voltage source), the VSD material 1240 becomes substantially conductive. Current across the VSD material 1240 will occur primarily in the vertical direction between the layered interconnect 1280 and the electrodes 1220 and / or electrodes 1224.

As a result, the VSDM configuration 1200 shown in the embodiment of FIG. 12A switches vertically and current flows across the VSD material structure 1240, primarily in a direction substantially parallel to the Z-axis (or vertical axis) of each substrate. .. The approximate electrical path followed by the current flowing across the VSDM configuration 1200 in response to the ESD signal 1212 is shown in FIG. 12A as the ESD discharge path 1290.

The embodiment of FIG. 12A shows a circuit element further displayed as an embedded impedance of 1296. In various embodiments, this circuit element is partially or completely VS.
It may be included within the DM configuration 1200 or communicated with the VSDM configuration 1200 (eg,).
The circuit element may be embedded in the same PCB as the VSDM configuration 1200, or may be surface mounted on the PCB that includes the VSDM configuration 1200).

In the embodiment of FIG. 12A, the embedded impedance 1296 is shown as a circuit element that is at least partially embedded within the VSDM configuration 1200. In particular, FIG. 12A shows
Embedded impedance 1 at least partially embedded within the prepreg layer 1230
296 is shown. In another or supplementary embodiment, the embedded impedance 1296 can be placed elsewhere in the substrate or in the VSDM configuration 1200. For example, the embedded impedance 1296 can be placed within the VSD material structure 1240, within another PCB layer, or within another substrate such as a semiconductor package.

In various embodiments, the embedded impedance 1296 comprises or comprises one or more circuit elements. In various embodiments, the embedded circuit element impedance 1296 may or may not include one or more resistors, one or more inductors, one or more capacitors, and one or more Ferroic circuit elements (eg, VSD materials). Also good embedded ferroic (ferroic) circuit elements), one or more diodes, 1
One or more transistors, one or more filters (eg, one or more low frequency filters,
Various combinations of bandpass filters and high frequency filters or filter stages),
Any other passive circuit element or active circuit element or passive electronic component or active electronic component, any layered interconnect with negligible impedance, any layered interconnect with non-negligible impedance (eg, high dielectric) A layer of material), any electrode or other conductive structure with non-negligible impedance, and / or any combination described above.

The embedded impedance 1296 can be used with respect to the VSD material structure 1240 to partially or completely protect electronic components such as the electronic component 1298 shown in FIG. 12A from ESD. In FIG. 12A, the electronic component 1298 is shown to be connected to the impedance embedded through the electrode 1228. Embedded impedance 1296
Is also in electrical contact with the conductive layer 1270. If VSD material 1240 is not present
The ESD pulse or other high voltage applied to the conductive layer 1270 results in high voltage and / or current propagation leading to electronic components 1298 through an embedded impedance of 1296. However, if the VSD material 1240 is present, the vertical switching VS
The DM configuration 1200 switches in response to a voltage higher than the characteristic voltage of the VSD material structure 1240, after which at least part of the ESD pulse that would have reached the electronic component 1298 without the VSD material 1240 is the electrode 1220. Detour to the earth through. Therefore, the vertical switching configuration 1200 uses an embedded impedance 1296 to protect the electronic component 1298 from potential damage of ESD pulses or other overvoltage events present in the conductive layer 1270.

Partial or full ESD for electronic components such as electronic components 1298 shown in FIG. 12A
The architecture and operation of electrical circuits that may be used in connection with VSD material structure 1240 as a component of vertical switching configuration 1200 to provide protection for is described in detail in U.S. Patent Application No. 13 / 096,860. It has been disclosed and is filed April 28, 2011, entitled "Incorporated Protection from Spurious Electrical Events", the entire of which is incorporated into this application by reference. The vertically switching VSDM structure disclosed and / or claimed in this patent application provides advanced protection from ESD and other overvoltage events for electronic components, US Patent Application No. 13 / 096,860. It can be used with respect to the embodiments disclosed and / or claimed in the specification.

In one embodiment, electronic components 1298 may be embedded within the VSDM configuration 1200.
In one embodiment, the electronic component 1298 is the same substrate (which includes the VSDM configuration 1200).
For example, it can be embedded in the same PCB). In one embodiment, the electronic component 1298
Can be surface mounted on the same substrate that includes the VSDM configuration 1200. One embodiment,
The electronic component 1298 may be included in a different electronic device that makes electrical contact with the substrate on which the VSDM configuration 1200 is included (eg, the VSDM configuration 1200 may be included in a connector attached to the electronic device that includes the electronic component 1298. ). In one embodiment, V
The SDM configuration 1200 is included in the packaging of electronic component 1298, or electronic component 1
It is separately mounted or included on a substrate that is physically in contact with or electrically communicated with 298.

In various embodiments, the electronic component 1298 may be any one or more of the following: That is, a semiconductor chip or other integrated circuit (IC) (eg, a microprocessor,
Control unit, memory chip, RF circuit, baseband processor, etc.), light emitting diode (LE)
D), MEMS chips or structures, or any other component or circuit element located inside an electronic device.

In one embodiment, the embedded impedance 1296 can be implemented using a Ferroic circuit element that includes a conductive structure that is at least partially embedded within the Ferroic material. A Ferroic circuit element that comprises a Ferroic VSD material and is suitable for such an embedded embodiment is a US patent application filed May 24, 2011, 13 / 115,068.
It is disclosed in the specification, and all of this content is incorporated into the application documents by reference. In various embodiments, the embedded impedance 1296 can be used as an embedded ferroic inductor, as an embedded ferroic VSD material inductor, as an embedded ferroic capacitor, as an embedded ferroic VSD material capacitor, or as any. It can be implemented as another embedded Ferroic circuit element or an embedded Ferroic VSD material circuit element.

FIG. 12B shows VSD material configuration 1202 configured to achieve vertical switching with VSD material according to embodiments. In the embodiments shown in FIGS. 12A and 12B, the embedded impedance 1296 in the embodiment of FIG. 12B is replaced by the embedded impedance 1297, the electrode 1228 is replaced by the electrode 1229, and the electronic component 1298 is replaced by the electronic component 1299. It is almost the same except that it is replaced with. As shown in FIG. 12B, the embedded impedance 1297 is not embedded in the prepreg layer 1230, but rather is due to the conductive layer 1270.
Separated from 30. The optional electrode 1229 has an embedded impedance of 1.
The 297 is connected to the electronic component 1299.

In various embodiments, the architecture, examples and functions of the embedded impedance 1297 and electronic component 1299 are embedded except that the embedded impedance 1297 and electronic component 1299 are arranged as described with respect to FIG. 12B. Impedance 1296 and electronic component 1298, respectively, are substantially the same as those described for the embodiment of FIG. 12A.

In one embodiment, the embedded impedance 1297 shown in FIG. 12B is V.
Instead of being embedded in the SDM configuration 1200, it is embedded in the same substrate (eg, the same PCB) that contains the VSDM configuration 1200. In certain embodiments, the embedded impedance 1297 and / or electronic components 1299 may be surface mounted on the same substrate that includes the VSDM configuration 1200. In one embodiment, the embedded impedance 1297 and / or electronic component 1299 may be included in a different electronic device that makes electrical contact with the substrate containing the VSDM configuration 1200 (eg, VSDM configuration 12).
00 is the mounted embedded impedance 1297 and / or electronic component 12
It may be included in a connector attached to an electronic device comprising 99). In one embodiment, the VSDM configuration 1200 and the embedded impedance 1297 are included in the packaging of electronic components 1298, or are otherwise attached to a substrate that physically contacts or energizes electronic components 1298. Or included in it.

FIG. 13 shows a VSD that can be incorporated into a PCB or other substrate according to an embodiment.
VSDM configuration 13 with material layer 1340 and configured to provide vertical switching
Indicates 00.

The VSDM configuration 1300 shown in FIG. 13 is displayed as conductive layers L1 to L6, and the conductive layer 1
It comprises a number of conductive signal layers numbered 370, 1372, 1374, 1376, 1378, and 1379. These signal layers can carry electrical signals within the PCB board or to and from components and circuit elements mounted on the PCB, or may serve as ground or other voltage reference point. These signal layers are separated by a number of substantially insulating or dielectric layers incorporated into each substrate device (not specifically shown in FIG. 13). For PCBs, the insulating layer may include a prepreg filler, core, laminate layer, or any other similar film or structure. FIG. 13
The VSDM configuration 1300 shown in is arranged along the vertical dimensions of the PCB or other substrate.

The VSDM configuration 1300 shown in FIG. 13 further comprises a via 1350. In various embodiments, the vias 1350 may be vias, pads, wires, or any other structure that is conductive and designed to facilitate the propagation of electrical signals. Via 1350 is layer L1
It has electrical conductivity between 1370 and layer L2 1372.

The VSDM configuration 1300 of the embodiment of FIG. 13 further comprises a VSD material structure shown as a VSD material structure 1340. The VSD material structure 1340 is arranged vertically and VS
It traverses a plurality of conductive layers of DM configuration 1300. As shown in FIG. 13, VSD material structure 1
340 crosses the conductive layer L2 1374 and the conductive layer L3 1376. In various embodiments, the VSD material structure 1340 may traverse two or more conductive layers or other conductive structures within a substrate such as a PCB, flexible circuit, or semiconductor package. In one embodiment, the VSD material structure 1340 is made up of VSD material vias (eg, buried vias) or any other volume that can be used within a substrate such as a PCB, flexible circuit, or semiconductor package. It can be manufactured by filling. In one embodiment, V
The SD material structure 1340 can be manufactured by making holes in the substrate (eg, mechanically or by laser) and then filling the holes with VSD material. In one embodiment, the VSD
The material structure 1340 can be manufactured by depositing VSD material in the empty space created within the substrate during the manufacture of the substrate (eg, previously in a pre-existing gap or a different adjacent layer of its PCB. Create a vertical cavity in the PCB by adjusting the holes made in, and VS
By injecting D material and curing the VSD material inside the cavity).

If the ESD pulse 1312 arrives at layer L1 1370 (or another voltage source is applied to layer L1 1370), it propagates to layer L2 1372 with each voltage, minimal loss or lossless. In layer L2 1372, the voltage generated in response to the ESD pulse 1312 is VSD.
The material structure reaches 1340. If the voltage reaching the VSD material structure 1340 exceeds the characteristic voltage of the VSD material structure 1340 over a particular vertical gap, the VSD material switches and the gap is substantially conductive.

In the embodiment of FIG. 13, the conductive layer L3 1374 is connected to ground. In another embodiment, the conductive layer L3 1374 (or the conductive structure or layer in electrical contact with each VSD material structure) may carry an ESD signal, such as any voltage reference point or circuit element or component. Can be connected to other places where it can.

In the embodiment of FIG. 13, since the conductive layer L3 1374 is connected to ground and the ESD pulse 1312 propagates to the conductive layer L2 1372, the effective gap that triggers vertical switching within the VSD material structure 1340 is substantially a gap. 1342, a substantially effective thickness T is approximately determined by the vertical spacing between the conductive layer L2 1372 and the ground layer L3 1374. The thickness T is the characteristic voltage of the VSD material structure 1340 (eg, Equation 1).
Determine at least partially (according to). In one embodiment, as described in the application documents of the present application for another embodiment, two or more VSD material structures are vertically stacked (in the form of adjacent or physically separated layers). Alternatively, they may be connected horizontally (eg, via a layered interconnect).

Once the VSD material structure 1340 shown in the embodiment of FIG. 13 is switched on and becomes substantially conductive over the gap 1342, the current crosses the gap 1342 between the conductive layer L2 1372 and the ground layer L3 1374. It flows mainly in the vertical direction. If this happens, the VSDM configuration 1300 switches vertically.

FIG. 14 shows a VSDM configuration 1 comprising a VSD material structure 1440 that can be embedded in a PCB or other substrate according to an embodiment and configured to provide vertical switching.
400 is shown. In one embodiment, the depiction shown in FIG. 14 is the VSDM configuration 1 of FIG.
It is an enlarged view of 300.

The VSDM configuration 1400 shown in FIG. 14 is represented by the conductive layers L1 to L3, and the conductive layer 1
It comprises three conductive signal layers numbered 470, 1472, 1474.
The conductive layer 1474 is connected to ground. Alternatively, the conductive layer 1474 may be connected to a circuit element or component, or other voltage reference point. These three signal layers are separated by a number of substantial insulating or dielectric layers incorporated into each substrate device (not specifically shown in FIG. 14). For PCBs, such an insulating layer may include a prepreg filler, core, laminate layer, or any other similar film or structure. The VSDM configuration 1400 of FIG. 14 is arranged along the vertical dimensions of the PCB or other substrate.

The VSDM configuration 1400 shown in FIG. 14 also includes vias 1450. In various embodiments, the vias 1450 may be vias, pads, wires, or any other structure that is conductive and designed to facilitate the propagation of electrical signals. Via 1450 is layer L1
It is electrically connected to 1470 and layer L2 1472.

The VSDM configuration 1400 of the embodiment of FIG. 14 further comprises a VSD material structure shown as VSD material structure 1440. The VSD material structure 1440 is arranged vertically and is in electrical contact with the conductive layers L2 1474 and L3 1476. In various embodiments, V
The SD material structure 1440 can traverse two or more conductive layers or other conductive structures within a substrate such as a PCB, flexible circuit, or semiconductor package. In one embodiment, the VSD material structure 1440 is a VSD material in a via (eg, buried via) or any other volume available within a substrate such as a PCB, flexible circuit, or semiconductor package. Can be manufactured by filling.

If the ESD pulse 1412 reaches layer L1 1470 (or another voltage source is applied to layer L1 1470), each voltage travels through vias 1450 and propagates to layer L2 1472 with minimal or lossless loss. .. At layer L2 1472, the voltage generated in response to the ESD pulse 1412 reaches the VSD material structure 1440. If VSD material structure 1440
If the voltage reaching the VSD material structure exceeds the characteristic voltage of the VSD material structure 1440 over a particular vertical gap, the VSD material will switch on and become substantially conductive across that gap.

Since the conductive layer L3 1474 is connected to ground and the ESD pulse 1412 propagates to the conductive layer L2 1472 in the embodiment of FIG. 14, the effective gap that triggers vertical switching within the VSD material structure 1440 is substantially a gap. 1442, the effective thickness is approximately T, which is substantially determined by the vertical spacing between the conductive layer L2 1472 and the ground layer L3 1474. Thickness T is at least partially VSD material structure 14
The characteristic voltage of 40 will be determined (eg according to Equation 1). In one embodiment, one or more configurations of VSD material may be vertically stacked (adjacent or physically separated layers) as described in the application documents for another embodiment. ) It may also be connected horizontally (eg, via layered interconnects).

The VSD material structure 1440 shown in the embodiment of FIG. 14 is switched on and has a gap of 1.
It becomes substantially conductive over 442, and current flows through the conductive layer L2 1472 and layer L3 14
It flows primarily vertically across the gap 1442 to and from 74. If this happens, the VSDM configuration 1400 is switching vertically. In response to an ESD pulse 1412 (or other voltage source) applied to layer L1 1470 and having a voltage over the gap 1442 that exceeds the characteristic voltage of the VSD material structure, the current is substantially as shown in electrical path 1490. It can flow along the electrical path shown in.

FIG. 15A shows a VSD material configuration 1500 configured to achieve vertical switching using VSD materials connected to one or more circuit elements according to an embodiment. FIG. 15A
Vertically switching VSD material configuration 1500 may be incorporated into any electronic device, including substrate devices, to protect against ESD and other overvoltage events. Examples of substrate devices into which the VSD material configuration 1500 can be incorporated in various embodiments include packaging of PCBs, flexible circuits, and semiconductor chips. FIG. 15A shows a cross-sectional view of the VSD material configuration in the vertical direction of the substrate device.

Instead of the conductive prepreg 1170 of the embodiment of FIG. 11, the embodiment of FIG. 15A is vertical of FIG. 15A, except that it includes two layered interconnects 1570, 1572 connected via circuit element 1592. The switching VSD material configuration 1500 is generally similar to the VSD material configuration 1100 of FIG. Circuit element 1592 has a non-negligible impedance labeled H in FIG. 15A. In various embodiments, the layered interconnect 1
570, 1572 may be, or may include, an electrode, a layered interconnect or a portion of a layered interconnect, a portion of a conductive layer or a conductive layer, or any other conductive structure.

The vertical switching VSD material configuration 1500 of FIG. 15A comprises a VSD material structure 1540, which is located between the electrode 1520 and the layered interconnect 1572 and between the electrode 1522 and the layered interconnect 1570, respectively. Be placed. The VSD material structure 1540 of the embodiment of FIG. 5 is substantially uniform over the horizontal dimensions and has a vertical thickness approximately equal to the gap 1542 labeled T.

Layered interconnects 1570, 1572 are arranged adjacent to the substrate layer, core 1582, which core 1582 is substantially an insulator or substantially a dielectric. Additional layers may be present within the substrate device that includes the VSDM configuration 1500 (eg, one or more prepreg layers).

In response to the voltage generated between the electrodes 1520 and 1522 by the ESD pulse 1512 (or voltage source 1510), the VSD material structure 1540 can switch on and become substantially conductive. The effective gap that triggers vertical switching within the VSD material structure 1540 is substantially twice as large as the gap 1542 and has an effective thickness approximately twice the value of T (which is the VSDM configuration 1500). Gap 15 when switching vertically
This is because the current propagates twice in 42 including the opposite direction). The thickness T is (for example,
The characteristic voltage of the VSD material structure 1540 (according to Equation 1) is determined at least partially.
If the impedance of element 1592 is 0 or negligible, or element 1
In the absence of 592, the minimum voltage that must be generated by the ESD pulse 1512 before the VSD material structure 1540 is switched on is approximately twice the characteristic voltage of the VSD material structure 1540 (because the two electrodes 1520). In order for an electrical circuit to hold between the 1522, the current must flow across the gap 1542 twice in two different vertical directions).

However, if element 1592 has a non-negligible impedance, the VSD material structure 1
The minimum voltage that the ESD pulse 1512 must generate before the 540 switches on is greater than a voltage approximately equal to the voltage drop across element 1592. For example, if element 1592 is a resistor, the VSD material structure 1540 switches when the voltage of the ESD pulse 1512 is approximately equal to twice the characteristic voltage of the VSD material structure 1540 plus the voltage drop between the elements 1592. It can be turned on and become substantially conductive.

In various embodiments, the circuit element 1592 comprises one or more resistors, one or more inductors,
One or more capacitors, one or more ferroic circuit elements (eg, embedded ferroic circuit elements with or without VSD material), one or more diodes,
One or more transistors, one or more filters (eg, one or more low pass filters,
Various combinations of band pass filters, high pass filters or filter stages), any other passive circuit element or active circuit element or passive electronic component or active electronic component, any layered interconnect, electrode or non-negligible impedance. It may or may not include other conductive structures having, and any combination described above. The circuit element 1592 may comprise a single electronic component or a combination of electronic components, in order to partially or wholly provide ESD protection for the electronic or substrate device in which the VSDM configuration 1500 is incorporated. It may be used with respect to the VSD material structure 1540.

In one embodiment, the circuit element 1592 is embedded in a substrate such as a PCB, flexible circuit, or packaging of semiconductor devices. Referring to FIG. 15A, for example element 1592 may be embedded in a layer of PCB in which VSDM configuration 1500 can be incorporated (eg, circuit element 1592 may be in the core layer, in the prepreg layer, in the laminate layer, or in the PCB. May be contained within any other layer). In one embodiment, element 1592
The VSDM configuration 1500 can be an electronic component or circuit element attached to a PCB in which it can be incorporated. In one embodiment, element 1592 can be a circuit element contained within a semiconductor chip protected by a packaging substrate into which a VSDM configuration can be incorporated.

In the embodiment of FIG. 15A, the element 1592 is shown to be connected between the layered interconnect 1570 and the layered interconnect 1572. In other or supplementary embodiments, the element 1592, or other circuit element, may be located within the substrate or elsewhere within the VSDM configuration 1500. For example, element 1592, or other circuit element, has an ESD pulse 151 between the electrode 1520 and the VSD material structure 1540, and between the electrode 1522 and the VSD material structure 1540.
One or more electronic components and VSDM configuration 1 that should be protected from the electrical path of this voltage or from ESD events before the voltage generated by 2 reaches the electrode 1520 or 1522.
It can be placed in electrical contact with the 500.

In one embodiment, element 1592 can be mounted using an embedded circuit element manufactured by at least partially embedding a conductive structure within a ferroic material, the ferroic material being at least partially embedded. Is embedded in the substrate. Ferroic circuit elements that include the Ferroic VSD material and are suitable for such embedded embodiments are disclosed in US Patent Application 13 / 115,068.

When the VSD material structure 1540 of the embodiment of FIG. 15A is switched on and becomes substantially conductive over the gap 1542, the current is applied once between the electrode 1520 and the layered interconnect 1572 and between the electrode 1522 and the layered interconnect. It flows once between 1570s in the opposite direction, primarily vertically across the gap 1542.

In one embodiment, instead of a single VSD material structure 1540, the VSDM configuration 150
0 comprises two VSD material structures with different vertical thicknesses so that the gap between the electrode 1522 and the layered interconnect 1570 is between the electrode 1520 and the layered interconnect 15.
Different from the gap between 72.

In some embodiments, one or more VSD material structures may be stacked vertically (
It may be adjacent or physically separated layers).

In commercial embodiments, the thickness T of the gap 1542 is widespread, depending on the structure of the VSD material 1540 and also on the characteristic voltage and other physical or operational properties desired for the VSD material 1540. Can take a value. Given that the effective thickness of the VSDM configuration 1500 is determined by a value of twice T, certain exemplary values of thickness T that can be considered for implementation in the manufacturing process include 1 mil. 0.75 mil, 0.5 mil, 0.25 mil, 0.
1 mil and smaller values are included. Generally, a smaller value is required for T in order to enable a smaller characteristic voltage for the VSD material structure 1540, but it is more difficult to achieve consistently in a commercial mass production environment. possible.

FIG. 15B shows a circuit element having a first impedance value and a second according to an embodiment.
FIG. 5 shows a VSD material configuration 1502 configured to achieve vertical switching using a VSD material with an embedded impedance element having an impedance value of. Figure 1
The embodiment shown in 5A and 15B is that in the embodiment of FIG. 15B, element 1592 is replaced by element 1593 and the circuit element shown as the embedded impedance 1597 is embedded within the VSD material structure 1540. Other than that, it is almost the same.
The electronic component 1599 is in electrical contact with the embedded impedance 1597. This electrical contact can be achieved with an optional electrode 1529.

In various embodiments, the architecture, examples and functions of element 1593 are such that element 15
FIG. 1 with respect to element 1592, except that 93 has an impedance labeled H1.
It is substantially the same as described with respect to the embodiment of 5A. The embedded impedance 1597 has an impedance labeled H2. In various embodiments, element 1
The 593 and the embedded impedance 1597 may be of the same type as the circuit element (eg, they may both be inductors, or one may be a resistor and the other may be a capacitor). It may be a type. In various embodiments, impedance H1 and impedance H2 may or may not be the same.

In various embodiments, the architecture, examples, and functions of the embedded impedance 1597 and electronic component 1599 are such that the embedded impedance 1597 and electronic component 1599 are arranged as described with respect to FIG. 12B, and the vertical switching VSDM.
Except as used with respect to configuration 1502, it can be substantially the same as that described for the embodiment of FIG. 12A for the electronic component 1298 corresponding to the embedded impedance 1296.

As shown in FIG. 15B, the embedded impedance 1597 is at least partially contained within the VSD material structure 1540 and is in electrical contact with the electrode 1522. In the absence of the VSD material structure 1540, the high voltage applied to the electrode 1522 will be
It propagates through the embedded impedance 1597 to electronic components 1599 and can potentially damage electronic components 1599.

However, if the VSD material structure 1540 is present and switches on in response to a sufficiently high voltage ESD pulse 1512 applied to the electrode 1522, at least a portion of the current flowing to the electronic component 1599 will instead. A layered interconnect 1570 is reached across the VSD material 1540. As a result, the electronic component 1599 and the optionally embedded impedance 1597 are protected from overvoltage damage.

As described in the embodiment of FIG. 12B with respect to the embedded impedance 1297.
Instead of being embedded within layer 1540 of VSD material, the impedance 1597 embedded instead may be contained on the same substrate (eg, the same PCB) that contains VSDM configuration 1502. In one embodiment, the embedded impedance 1597 and / or electronic components 1599 may be surface mounted on the same substrate that includes the VSDM configuration 1502. In certain embodiments, the embedded impedance 1597 and / or electronic component 1599 may be included in a different electronic device that makes electrical contact with the substrate containing the VSDM configuration 1502 (eg, the VSDM configuration 1502 is embedded. Impedance 1597 and / or can be included in a connector attached to an electronic device with electronic components 1599). In certain embodiments, the VSDM configuration 1502 and the embedded impedance 1597 are included in the packaging of electronic component 1599, or electronic component 1
It is otherwise attached to or included in a substrate that is in physical contact with or electrically communicated with 599.

FIG. 16 shows a combination of vertical switching VSD material configuration 1600 and horizontal switching VSD material configuration 1601 according to an embodiment. In the embodiment of FIG. 10, VS
The DM configuration 1000 comprises two structures of VSD material arranged in a vertical layer that switches vertically. In the embodiment of FIG. 16, the VSD material configurations 1600, 1601 have a gap of 1.
A VSD material structure 1646 arranged to switch vertically over 648 and a VSD material structure 164 arranged to switch horizontally over a gap 1642.
It is combined with 0.

In one embodiment, the vertical switching VSD material configuration 1600 and the horizontal switching V
It is contained within a different substrate from the SD material configuration 1601, which is the connector 1628.
Is connected by. In one embodiment, the vertical switching VSD material configuration 1600
And / or one of the vertical switching VSD material configurations 1601 are included in the flexible substrate, and the connector 1628 is a flexible connector.

In the embodiment of FIG. 16, the vertical switching VSD material configuration 1600 has two electrodes 16
It comprises a pair of 20, 1622 and a VSD material structure 1646. Electrodes 1620, 1622
Is in contact with the VSD material structure 1646, which covers the range of the vertical gap 1648 of thickness T1. The layered interconnect 1670 is arranged in contact with the VSD material structure 1646 facing the electrode 1620. The electrode 1622 shown in FIG. 16 traverses the layer 1646 of the VSD material and makes direct electrical contact with the layered interconnect 1670.
In other embodiments, the electrode 1622 does not have to completely cross the layer 1622 of the VSD material, in which case the second vertical gap has a thickness equal to or less than the VSD material 1646 (T1). ) May exist, and vertical switching may occur in that range.

In the embodiment of FIG. 16, the horizontal switching VSD material configuration 1601 has two electrodes 16
It comprises 24, 1626 and a VSD material structure 1640. Electrodes 1624 and 1626 are VSDs.
In contact with the material structure 1640, the VSD material structure 1640 has a vertical gap of thickness T2 of 1642.
To. The layered interconnect 1672 is arranged to contact the VSD material structures 1640 facing the electrodes 1624, 1626.

In the embodiment of FIG. 16, the conductive structure labeled connector 1628 has the electrode 1622 of the vertical switching VSD material configuration 1600 and the horizontal switching VSD material configuration 1601.
Is connected to the electrode 1624 of. The connector 1628 may be vias, pads, wires, layered interconnects, or any other structure that is conductive and configured to facilitate the propagation of electrical signals. In one embodiment, the connector 1628 is a flexible electrical connector.

The vertical switching VSD material configuration 1600 and the horizontal switching VSD material configuration 1601 of FIG. 16 may be included in electronic devices including substrate devices that allow protection from ESD and other overvoltage events. Examples of board devices in which the vertical switching VSD material configuration 1600 and the horizontal switching VSD material configuration 1601 are incorporated in various embodiments are a combination of two PCBs interconnected by a flexible connector, a PCB interconnected by a flexible connector. And a combination of semiconductor packages,
Alternatively, it includes a combination of two semiconductor packages interconnected by a flexible connector. Applications of such flexible connectors may be realized in flexible electronic devices, which include electronic devices with pivotal or movable surfaces (eg, keyboards or adjustable screens). Have a mobile phone or tablet) or an electronic device designed to be flexible (eg, flexible LE)
D display) is included.

FIG. 16 shows cross-sectional views of the vertical switching VSD material configuration 1600 and the horizontal switching VSD material configuration 1601. Each of the vertical switching VSD material configuration 1600 and the horizontal switching VSD material configuration 1601 can be embedded in separate substrate devices such as PCBs, flexible circuits or semiconductor packages. FIG. 16 shows substrate layers such as core 1682 and core 1683 for additional description.

In one embodiment, the vertical switching VSD material configuration 1600 and the horizontal switching V
Each of the SD material configurations 1601 operates independently in response to an ESD pulse such as the ESD pulse 1612. If an ESD pulse 1612 is applied to the electrode 1620 and the electrode 162
If 2 is grounded (or if a particular potential difference is set in another way), or
This operation occurs for the vertically switching VSD material configuration 1600 if the ESD pulse 1612 is applied to the electrode 1622 and the electrode 1620 is grounded (or if a particular potential difference is set in another embodiment). If ESD pulse 1612 is electrode 1624
If and the electrode 1626 is grounded (or if a particular potential difference is set in another embodiment), or if an ESD pulse 1612 is applied to the electrode 1626 and the electrode 1624 is grounded (or). This operation occurs for the horizontally switching VSD material configuration 1601 (if a particular potential difference is set in another embodiment).

In the embodiment shown in FIG. 16, if the two configurations are switched together,
Vertical switching VSD material configuration 16 in response to an ESD pulse such as an ESD pulse 1612
00 and the horizontal switching VSD material configuration 1601 can operate cooperatively. If electrode 16
If 26 is grounded (or a specific potential difference is set in another embodiment) and an ESD pulse 1612 is applied to the electrode 1620, or if the electrode 1620 is grounded (or a specific potential difference in another embodiment). Is set) and the ESD pulse 1612 is set to the electrode 162.
If 6 is applied, this operation can be realized. In this case, the VSD material structure 1646
Vertical switching can occur across gap 1648, and VSD material structure 1640 can cause horizontal switching across gap 1642.

Vertical switching VSD material configuration 1600 and horizontal switching VSD material configuration 16
In order for 01 to switch together between the electrodes 1620 and 1626, the VSD material structure 1640 and the VSD material structure 1648 must be switched on. For this to occur, the differential voltage generated between the electrodes 1620 and 1626 in response to the ESD pulse 1612 must exceed or be equal to the sum of the characteristic voltage of the VSD material structure 1640 and the characteristic voltage of the VSD material structure 1648. Must be.

When both the VSD material structure 1640 and the VSD material structure 1646 are switched on to make the two VSD material structures substantially conductive, the current propagates vertically across the gap 1648 and horizontally across the gap 1642. Propagate across the direction.

In one embodiment, the VSD material structure 1640 and the VSD material structure 1646 have different compositions and characteristic voltages (represented in volts). In one embodiment, the two VSD material structures 1640 and the VSD material structure 1646 have the same composition. The VSD material structure 1640 and the VSD material structure 1646 may or may not have the same characteristic voltage depending on the embodiment.

For commercial examples, depending on the configuration of VSD material structure 1646 and VSD material structure 1640, and the characteristic voltage and VSDM configuration 1600 and VSDM configuration 160.
Gap 1648 thickness T, depending on other physical or operational properties desired in 1.
The thickness T2 of 1 and the gap 1642 can take a wide range of values, respectively. Specific exemplary values for T1 and T2 are 2 mils, 1.5 mils, 1 mil, 0.5 mils, or less. In general, it is expected that the smaller the value of T, the lower the characteristic voltage of the VSD material structure 1646 and the VSD material structure 1640.

In various embodiments, as described in the patent application documents and / or in the claims, the vertical switching VSDM configuration includes those shown in FIG. 16 and is connected to a horizontal switching configuration. It can be mounted on a board. For example, both a vertical switching VSDM configuration (such as the structure shown in FIG. 15A) and a horizontal switching VSDM configuration (such as the structure shown in FIG. 2) can be embedded in the substrate and two to protect specific electronic components. VSDM configurations can be used together (eg, by connecting electrode 122 to electrode 1620).
Alternatively, it can be used independently to protect a single electronic component or different electronic components (eg, used without directly connecting the two structures).

The embodiment of FIG. 16 further shows a circuit element labeled as embedded impedance 1696. In various embodiments, this circuit element may be partially or completely contained within a vertical switching VSDM configuration 1600, or a vertical switching VSDM configuration 1600.
(For example, this circuit element has a vertical switching VSDM configuration 160.
It can be embedded in the same PCB that contains 0s, or surface mounted on that PCB). In an alternative or complementary embodiment, the embedded impedance 1696, or other similar circuit element, may be partially or completely contained within the horizontal switching VSDM configuration 1601, or with the horizontal switching VSDM configuration 1601. Can be communicated (eg, can be embedded in the same PCB as VSDM configuration 1601 or VSDM
Can be surface mounted on a PCB that includes configuration 1601).

In the embodiment of FIG. 16, the embedded impedance 1696 is a VSDM configuration 160.
It is shown as a circuit element that is at least partially embedded in zero. In particular, FIG. 16 shows VS.
Shows impedance 1696 embedded so as to be at least partially embedded within the D material structure 1646. In an alternative or complementary embodiment, the embedded impedance 1696 may be located within the substrate or elsewhere within the VSDM configuration 1600.

In various embodiments, the circuit elements at least partially embedded in the substrate, such as the embedded impedance 1696 of FIG. 16, consist of or include one or more circuit elements. In various embodiments, the embedded impedance 1696 is 1.
One or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (eg, embedded ferroic circuit elements that may or may not contain VSD material), one or more. Diodes, one or more transistors, one or more filters (eg, various combinations or filter stages of one or more low pass filters, band pass filters, and high pass filters), any other passive circuit element Alternatively, it may include active circuit elements or active electronic components or passive electronic components, any layered interconnects, electrodes or other conductive structures with non-negligible impedances, and any combination of the configurations described above.

The embedded impedance 1696 provides VSD material structure 164 to partially or wholly provide ESD protection for electronic components such as the electronic component 1698 shown in FIG.
0 and VSD material structure 1646 can be used in connection with each other. In FIG. 16, the electronic component 16
98 is shown to be connected through an embedded impedance 1696 and electrode 1629. The embedded impedance 1696 is also in electrical contact with the electrode 1620. Impedance 16 with high voltage and / or current embedded by ESD pulse or other high voltage applied to electrode 1620 in the absence of VSD material 1640
The result is propagation to the electronic component 1698 via 96. However, in the presence of the VSD material 1640, the vertical switching VSDM configuration 1600 was switched on as described above and then passed through the layered interconnect 1670 to reach the electronic component 1698 in the absence of the VSD material. Bypass at least some of the possible ESD pulses. Thus, the vertical switching configuration 1600 uses embedded impedance 1696 to protect electronic components 1698 from potential damage from ESD pulses or other overvoltage events present at electrode 1620.

The architecture and operation of electrical circuits that may be used with respect to switching VSDM configurations 1600, 1601 to partially or wholly protect electronic components such as the electronic component 1698 shown in FIG. 16 is described in U.S. Patent Application No. 13. / 096, 860, disclosed in detail.

In one embodiment, the electronic component 1698 may be embedded within the VSDM configuration 1600. In one embodiment, the electronic component 1698 may be embedded in the same substrate (eg, the same PCB) in which the VSDM configuration 1600 is contained. In one embodiment, electronic components 169
8 can be surface mounted on the same substrate as the substrate containing the same VSDM configuration 1600.
In one embodiment, the electronic component 1698 may be included in a different electronic device that makes electrical contact with the substrate that contains the VSDM configuration 1600 (eg, the VSDM configuration 1600.
Can be included in a connector attached to an electronic device comprising electronic components 1698). 1
In one embodiment, the VSDM configuration 1600 is included in the packaging of electronic component 1698, or is physically in contact with electronic component 1698, or otherwise mounted on a board that is electrically connected. Or is included. In one embodiment, the electrode 1629 is a flexible connector and the electronic component 1698 is placed on a different substrate as part of the flexible electronic device.

In various embodiments, the architecture, implementation and function of the embedded impedance 1696 and electronic component 1698 is impedance 1296, except that the embedded impedance 1696 and electronic component 1698 are arranged as described with respect to FIG. And electronic components 1298 are substantially the same as described in the embodiment of FIG. 12A.

In one embodiment, the embedded impedance 1696 can be implemented using a Ferroic circuit element that includes a conductive structure that is at least partially embedded within the Ferroic material. In various embodiments, the embedded impedance 1696 can be used as an embedded ferroic inductor, an embedded ferroic VSD material inductor, an embedded ferroic capacitor, an embedded ferroic VSD material capacitor, or any other embedded. Ferroic circuit element or embedded Ferroic V
It is mounted as an SD material circuit element.

FIG. 17 shows a VSD material configuration 1700 configured to achieve both vertical and horizontal switching using VSD materials according to embodiments.

A VSD material configuration configured to perform both vertical and horizontal switching using a VSD material is a "bidirectional switching VSDM configuration" or a "bi-switching V".
It is called "SDM configuration". In various embodiments, the bidirectional switching VSDM configuration 1 of FIG.
A bidirectional switching VSDM configuration such as 700 is such a bidirectional switching VSDM.
The configuration can be used in similar applications and examples as various vertical switching VSDM configurations disclosed herein and / or claims, except that additional horizontal switching functions can be performed.

In various embodiments, the bidirectional switching VSDM configuration facilitates vertical switching as loosely described for the various vertical switching VSDM configurations disclosed and / or claimed in the patent application. V arranged in various modes
It has an SD material structure. Further, in this embodiment, each VSD material structure is shown in FIG.
And / or electrical contact with at least one electrode arranged in a manner that facilitates horizontal switching as loosely described with respect to FIG.

The VSD material configuration 1700 shown in the embodiment of FIG. 17 includes electrodes 1720 (eg, pads or layered interconnects) that are in electrical contact with the VSD material structure 1740 (eg, layers of VSD material). The VSD material configuration 1700 further comprises an electrode 1726 and an electrode 1728 that are also in electrical contact with the VSD material structure 1740. In one embodiment, the electrode 17
26 may be in electrical contact with the layered interconnect 1770 (eg, electrode 1726 may be
The vias may cross the layer 1740 of the VSD material, or the vias may connect the electrodes 1726 to the layered interconnect 1770). In various embodiments, any one of the two electrodes 1726, 1728 may be omitted, in which case there is of course no corresponding horizontal switching function provided by the omitted electrodes.

In one embodiment, the electrode 1726 is in electrical contact with the electrode 1728 (eg, they may be part of the same conductive surface, or directly by wiring or other connector on the PCB. May be connected).

The VSD material structure 1740 has a vertical gap of 1742 with a vertical thickness of T1 (eg, measured in mill units). The layered interconnect 1770 (eg, electrode or layered interconnect) is in electrical contact with the VSD material structure 1740 and the electrode 1726.
The core layer 1782 may be a layer of a substrate (eg, PCB or semiconductor package) arranged adjacent to the layered interconnect 1770 and containing the bidirectional switching structure 1700.

An optional via 1772, or any other conductive structure, may traverse one or more layers of the substrate to establish electrical contact with the layered interconnect 1782. Such vias can be manufactured by laser drilling or any other suitable manufacturing process.

In one embodiment, the electrodes 1726, electrodes 1728 and vias 1772 are all connected to ground. In other embodiments, the layered interconnect 1770 is not connected to ground (eg, via 1772 is absent or not grounded), in this case between the layered interconnect 1770 and the electrode 1720. No vertical switching occurs. In other embodiments,
Electrode 1726, or electrode 1728, is not connected to ground, in which case horizontal switching does not occur between the unconnected electrode and electrode 1720.

The bi-switching VSDM configuration 1700 of the embodiment of FIG. 17 performs both horizontal and vertical switching if the electrode 1726, electrode 1728 and layered interconnect 1770 are all connected to ground or other reference potential points. be able to.
In this embodiment, there are three possible switching directions: That is, (1) horizontal switching over the gap 1744 (having a horizontal thickness Gl) between the electrode 1726 and the electrode 1720, and (2) the gap 1746 (horizontal thickness) between the electrode 1728 and the electrode 1720. Horizontal switching over (with G2) and (3) vertical switching over the gap 1742 (with vertical thickness T1) between the electrode 1720 and the layered interconnect 1770. The lowest characteristic voltage gap in the configuration of the VSD material 1740 determines where switching occurs. If the composition of the VSD material is the same as the three gaps 1742, 1744 and 1746 and its characteristic voltage is associated with the size of that gap, switching can occur in the smallest gap.

In one embodiment, the gap 1744 and the gap 1746 are substantially the same.
The VSDM configuration 1700 switches horizontally across both gaps 1744 and 1746. In one embodiment, gaps 1742, 1744 and gap 17
46 is substantially the same, with VSDM configuration 1700 switching vertically across gap 1742 and horizontally across gap 1744 and gap 1746. In one embodiment, the gap 1742 and the gap 1744 are substantially the same, and the VSDM configuration 1700 is vertically across the gap 1742, the gap 17
Switch horizontally over 44. In one embodiment, the gap 1742 and the gap 1746 are substantially the same, and the VSDM configuration 1700 switches vertically across gap 1742 and horizontally across gap 1746.

In certain embodiments, for the composition of the VSD material and certain physical properties for horizontal and / or vertical gaps, the characteristic voltage across such gaps may not be directly related to the size of the gap. .. Therefore, in such an embodiment, the characteristic voltages of the two gaps of different thickness can still be substantially the same. In one embodiment, the characteristic voltages across gaps 1744 and 1746 are substantially the same, and VSDM configuration 1700 switches horizontally across both gaps 1744 and 1746. In one embodiment, gap 1742, gap 1
The characteristic voltage across the 744 and the gap 1746 is substantially the same, VSDM configuration 1
The 700 switches vertically across gaps 1742 and horizontally across gaps 1744 and 1746. In one embodiment, the gap 174
The characteristic voltage across 2 and the gap 1744 is substantially the same, VSDM configuration 17
00 switches vertically across gap 1742 and horizontally across gap 1744. In one embodiment, gaps 1742 and gaps 1746
The characteristic voltages across are substantially the same, and the VSDM configuration 1700 switches vertically across gap 1742 and horizontally across gap 1746.

Configuration 400 of the embodiment of FIG. 4A, VSDM configuration 490 of the embodiment of FIG. 4B, VSDM configuration 500 of the embodiment of FIG. 5, VSD material configuration 600 of the embodiment of FIG. 6, VSD material configuration 900 of the embodiment of FIG. , VSD material configuration 1000 of the embodiment of FIG. 10, VSD material configuration 1100 of the embodiment of FIG. 11, VSD material configuration 1200 of the embodiment of FIG. 12A, VSD material configuration 1300 of the embodiment of FIG. VSD Material Composition 1400, FIG.
VSD material configuration 1500 of the embodiment of A, VSD material configuration 1600 of the embodiment of FIG.
And the vertical or bidirectional switching VS described in the patent application and / or in the claims, such as the bidirectional switching structure 1700 of the embodiment of FIG.
DM configurations can be used for ESD protection of circuit elements and components. Examples of electronic components that can be protected by a vertical switching VSDM configuration include one or more of the following:
That is, semiconductor chips or other integrated circuits (ICs) (eg, microprocessors, controls, memory chips, high frequency circuits, baseband processors, etc.), light emitting diodes (LEs).
D), a MEMS chip or structure, or any other component or circuit element located inside an electronic device may be included.

As described in this patent application document for ESD protection and / or as described in its claims, the architecture and operation of exemplary circuits in which vertical switching VSDM configurations can be used are: It is disclosed in U.S. Patent Application No. 13 / 096,860 and U.S. Patent Application No. 13 / 115,068. The exemplary circuits disclosed in these applications may have considered horizontal switching VSDM configurations, but these horizontal switching configurations retain their schematic ESD protection capabilities, while the claims are documented. Can be replaced by the vertical switching VSDM configuration described in and / or in the claims.

The vertical switching VSDM and bi-switching VSDM configurations described in this patent application and / or in the claims are a set of layers or PCB layers, semiconductor device packaging, or vertical switching VSD material configurations. Can be used for ESD protection of substrate devices such as any other substrate on which a vertical switching VSD material configuration can be mounted.

The vertically switching VSDM and bi-switching VSDM configurations described in and / or the claims described in this patent application document include such VSDM configurations (eg, such electronic devices. By inclusion in the substrate, or when such a VSDM configuration is connected (eg, when such a VSDM configuration is incorporated into a connector or cable attached to such an electronic device, or such. It can be used for ESD protection of electronic devices (when VSDM configurations are included in devices connected to such electronic devices).

Examples of electronic devices that may include substrate devices, electronic components or circuit elements that may be protected by such a vertical switching VSDM configuration or dual switching VSDM configuration, or may be protected by such a vertical switching VSDM configuration or dual switching VSDM configuration. Mobile phones, electronic tablets, electronic readers, mobile computers (
For example, laptops), desktop computers, server computers (eg)
Servers, blades, multiprocessors, supercomputers), television sets, video displays, music players (eg portable MP3 music players),
Personal health care devices (eg, pulse rate monitor, heart monitor, pedometer, temperature monitor,
Or any other sensor device for health care applications), light emitting diodes (LEDs)
) And devices including LEDs, lighting modules, and any other consumer and / or industrial device that processes or stores data using electrical or electromechanical signals. Other examples include satellites, military equipment, aviation equipment, and marine equipment.

In various embodiments, the vertical switching VSDM configuration and / or the claims described in the patent application documents may be included in the connector. Such connectors may be attached to electronic devices that should be protected from ESD or other overvoltage events. Examples of such connectors include power connectors, USB
Connector, Ethernet (registered trademark) cable connector, HDMI
Includes connectors, or any other connector that facilitates the use of serial data, parallel data or other types of data, signals or power transmission.

This specification describes in detail the various embodiments and examples disclosed herein, and the present invention applies to additional embodiments and examples, further modifications, and alternative configurations. It is possible. The patent is not intended to limit the invention to the specified embodiments and examples disclosed, and on the contrary, the patent is intended to be any modification or alternative that falls within the claims. It is intended to extend the scope of embodiments and examples as well.

As used herein, a set means any group of one or more items. Similarly, for a group of N items, the subset is N of the items.
It means an arbitrary set consisting of −l or less of each item.

As used herein, the terms "include", "eg", "exemplary" and variations thereof do not mean to be limiting terms, but rather "without limitation". Or it has the same meaning as when it is accompanied by the wording "including similar meanings". The definitions, all headers, titles and subtitles herein are intended to be sufficiently explained and concrete by indicating goals that aid understanding, but with respect to the scope of the claims of the present invention. It does not mean to limit. Each such definition will be known or become known to the average person skilled in the art as being equivalent to or substitutable for each item, technique or defined item. Or it means to grasp the matter. Unless required to be understood differently depending on the context, the expressions "get", "can", etc. mean that each action, step or implementation may be achieved, and these actions, It is not intended to establish a requirement that a step or implementation must be achieved, but that each of these behaviors, steps or implementations must be achieved exactly as stated. Is not intended.

Claims (20)

It is a dielectric material (VSDM) configuration that is included in the substrate and can be switched by a vertical switching voltage, and the VSDM configuration is
a. A first conductive element arranged on the first horizontal layer of the substrate and a second conductive element arranged on the second horizontal layer of the substrate, the second horizontal layer being said. A second conductive element that is different from the first horizontal layer,
b. A VSDM structure having a thickness in the direction perpendicular to the characteristic voltage, wherein the VSDM structure is arranged in a third horizontal layer of the substrate, and the third horizontal layer is the first horizontal layer and the second horizontal layer. The VSDM structure, which is different from the horizontal layer of
c. It is a layered interconnection portion arranged between the VSDM structure and at least one of the first conductive element and the second conductive element, and is the VSDM structure, the first conductive element, and the first. A layered interconnect configured to increase the cross-sectional conductive region at the boundary between the two conductive elements and at least one of the two conductive elements.
d. A circuit element that is at least partially embedded in the substrate, connected to the first conductive element, separated from the VSDM structure, and has impedance.
e. The VSDM structure becomes substantially conductive over its vertical thickness in response to an ESD pulse exceeding the characteristic voltage, with the first conductive element having a first voltage level and a second voltage. A current is configured to flow to and from the second conductive element having a level, the first voltage level of which is substantially equal to the second voltage level, and the vias extend perpendicular to the substrate. , A VSDM configuration that is an electrical contact between the first conductive element in the first horizontal layer and the second conductive element in the second horizontal layer and is separated from the VSDM configuration. .. The first conductive element includes a layered interconnect, a Z-axis conductive tape, a silver paste, a copper paste, a silver-plated copper layer, a carbon layer, a conductive epoxy resin, a conductive polymer, an electrode, a pad, and a lead. The VSDM configuration according to claim 1, which is a wire, wiring, via, cable, or signal layer. The VSDM configuration according to claim 1, wherein the vertical thickness is less than 2 mils. The substrate is a PCB, a set of a single layer or multiple layers of a PCB, a semiconductor device package, an LED substrate, an integrated circuit (IC) substrate, an interposer, a platform for connecting two or more electronic components, a device or a substrate. The VSDM configuration according to claim 1, which is a laminated packaging format, an interposer, a wafer-level package, a package-in-package, a system-in-package, or a stack of at least two packages or substrates. The VSDM configuration according to claim 1, further comprising an electronic device. The electronic device comprises a mobile phone, an electronic tablet, an electronic reader, a mobile computer, a desktop computer, a server computer, a television set, a video display, a music player, a personal health care device, a light emitting diode (LED), and at least one LED. The VSDM configuration according to claim 5, which is a device or a lighting module. The VSDM configuration according to claim 1, wherein the circuit element includes at least one of a resistor, an inductor, a capacitor, a Ferroic circuit element, a Ferroic VSDM circuit element, a diode, a transistor, a filter, and a layered interconnect having impedance. .. An electronic device comprising a substrate and a dielectric material (VSDM) configuration switchable by a vertical switching voltage, wherein the VSDM configuration is included in the substrate, the substrate comprising three different horizontal layers. The VSDM configuration
a. A first conductive element arranged in the first horizontal layer, a second conductive element arranged in the second horizontal layer, and the like.
b. A VSDM structure having a characteristic voltage and a thickness in the vertical direction, the VSDM structure arranged in the third horizontal layer, and the VSDM structure.
c. It is a layered interconnection portion arranged between the VSDM structure and at least one of the first conductive element and the second conductive element, and is the VSDM structure, the first conductive element, and the first. A layered interconnect configured to increase the cross-sectional conductive region at the boundary between the two conductive elements and at least one of the two conductive elements.
d. A circuit element that is at least partially embedded in the substrate, connected to the first conductive element, separated from the VSDM structure, and has impedance.
e. The VSDM structure becomes substantially conductive over the vertical thickness in response to ESD pulses above the characteristic voltage, the VSDM configuration provides ESD protection for the electronic device, and vias are perpendicular to the substrate. It becomes an electrical contact between the first conductive element in the first horizontal layer and the second conductive element in the second horizontal layer, and is separated from the VSDM configuration. Electronic device that has been. The electronic device comprises a mobile phone, an electronic tablet, an electronic reader, a mobile computer, a desktop computer, a server computer, a television set, a video display, a music player, a personal health care device, a light emitting diode (LED), and at least one LED. The electronic device according to claim 8, which is a device, a lighting module, a satellite, or an aviation device. The first conductive element includes a layered interconnect, a Z-axis conductive tape, a silver paste, a copper paste, a silver-plated copper layer, a carbon layer, a conductive epoxy resin, a conductive polymer, an electrode, a pad, and a lead. 8. The electronic device of claim 8, which is a wire, wire, via, cable, or signal layer. The electronic device of claim 8, wherein the vertical thickness is less than 2 mils. The substrate may be a PCB, a set of a single layer or multiple layers of a PCB, a semiconductor device package, an LED substrate, an integrated circuit (IC) substrate, an interposer, a platform, a device or substrate to which two or more electronic components are connected. The electronic device according to claim 8, which is a laminated packaging format, an interposer, a wafer-level package, a package-in-package, a system-in-package, or a stacking combination of at least two packages or substrates. The electron according to claim 8, wherein the circuit element includes at least one of a resistor, an inductor, a capacitor, a ferroic circuit element, a ferroic VSDM circuit element, a diode, a transistor, a filter, or a layered interconnect having impedance. device. It is a dielectric (VSD) material structure that can be switched by a vertical switching voltage.
a. A first conductive element arranged in the first horizontal layer, a second conductive element arranged in the first horizontal layer, and the like.
b. With the layered interconnect located in the second horizontal layer,
c. A third conductive element that connects the second conductive element to the layered interconnect.
d. A configuration of a VSD material arranged in a third horizontal layer having a characteristic voltage over a vertical gap formed between the first conductive element and the layered interconnect, said layered. The interconnect comprises a configuration of the VSD material disposed between the VSD material and at least one of the first conductive element and the second conductive element.
e. The configuration of the VSD material is vertical between the first horizontal layer having the first voltage level and the layered interconnect having the second voltage level in response to an ESD pulse exceeding the characteristic voltage. It is adapted to switch vertically across a directional gap, its first voltage level is substantially equal to said second voltage level, vias extend perpendicular to the substrate and in said first horizontal layer. A VSD material structure that serves as an electrical contact between the first conductive element and the second conductive element in the second horizontal layer and is separated from the configuration of the VSD material. The first conductive element includes a layered interconnect, a Z-axis conductive tape, a silver paste, a copper paste, a silver-plated copper layer, a carbon layer, a conductive epoxy resin, a conductive polymer, an electrode, a pad, and a lead. The VSD material structure according to claim 14, which is a wire, wire, via, cable, or signal layer. The VSD material structure according to claim 14, wherein the vertical gap is less than 2 mils. The VSD material structure according to claim 14, wherein the VSD material structure is included in the substrate. The substrate may be a PCB, a set of a single layer or multiple layers of a PCB, a semiconductor device package, an LED substrate, an integrated circuit (IC) substrate, an interposer, a platform, a device or substrate to which two or more electronic components are connected. The VSD material structure according to claim 17, which is a laminated packaging format, an interposer, a wafer-level package, a package-in-package, a system-in-package, or a stack of at least two packages or substrates. The VSD material structure according to claim 14, wherein the VSD material structure is included in an electronic device. The electronic device comprises a mobile phone, an electronic tablet, an electronic reader, a mobile computer, a desktop computer, a server computer, a television set, a video display, a music player, a personal health care device, a light emitting diode (LED), and at least one LED. The VSD material structure according to claim 19, which is a device or a lighting module.

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