JP6856193B2 - Schottky barrier diode manufacturing method - Google Patents

Description

The present invention relates to a method of manufacturing a Schottky barrier diode.

Conventionally, _{a Schottky barrier diode in which a Schottky electrode made of Pt is connected to a Ga 2} O ₃ single crystal is known (see, for example, Non-Patent Document 1). The rising voltage (forward voltage) of the Schottky barrier diode described in Non-Patent Document 1 is 1.23V.

Further, conventionally, _{an ultraviolet sensor in which a Schottky electrode made of Pt is connected to a Ga 2} O ₃ single crystal substrate is known (see, for example, Patent Document 1). Patent Document 1 discloses that Pt is vapor-deposited on a _{Ga 2} O _{3 single crystal substrate and then heat-treated.}

Further, conventionally, a Schottky barrier diode in which a Schottky electrode having a Ni / Au laminated structure is connected on _{a Ga 2} O _{3 single crystal is known (see, for example, Non-Patent Document 2).}

Japanese Unexamined Patent Publication No. 2009-260059

Kohei Sasaki et al., “Ga2O3 Schottky Barrier Diodes Fabricated by Using Single-Crystal β-Ga2O3 (010) Substrates”, IEEE Electron Device Letters, April 2013, Vol. 34, No. 4, pp. 493-495. Toshiyuki Oishi et al., “Conduction mechanism in highly doped β-Ga2O3 (-201) single crystals grown by edge-defined film-fed growth method and their Schottky barrier diodes”, Japanese Journal of Applied Physics, 2016, 55, 030305.

The loss of the Schottky barrier diode is determined by the rising voltage and the differential on-resistance. That is, the loss of the Schottky barrier diode can be reduced by reducing the rising voltage and the differential on-resistance.

According to Patent Document 1, from the disclosed current-voltage characteristics of the ultraviolet sensor, it can be read that the rising voltage of the Schottky junction may decrease due to the heat treatment after the vapor deposition of Pt. However, the differential on resistance after the current value rises is extremely high, and it is difficult to use the ultraviolet sensor of Patent Document 1 as a Schottky barrier diode.

Specifically, for example, in the case of a general Schottky barrier diode, a current of about ^{100 A / cm 2 must flow when a voltage of about 1 to 2 V is applied.} The current that flows when a voltage of about 1 to 2 V is applied is less than ^{1 A / cm 2.}

Further, in the Schottky barrier diode of Non-Patent Document 2, Ni is used for the layer forming the Schottky junction with _{the Ga 2} O _{3 single crystal of the Schottky electrode as described above.} However, since Ni is easily oxidized, Ni of the Schottky electrode and the Ga ₂ O ₃ single crystal are likely to react with each other, and a NiO film may be formed at the interface with the passage of time, which may deteriorate the device characteristics.

Further, the lower the rising voltage of the Schottky barrier diode, the smaller the forward loss, but on the other hand, the reverse leakage current becomes large, so that there is a problem even if it is too low. As a result of device simulation by the present inventors, in the case of _{a Schottky barrier diode using Ga 2} O ₃ , particularly a trench MOS type Schottky barrier diode, the rising voltage is about 0.6 to 0.9 V, preferably 0. It was found that a device with a small reverse leakage current and a small forward loss can be realized by setting the voltage to about 0.6 to 0.7 V. However, _{there is no known method for forming an electrode for Ga 2} O ₃ so that a rising voltage in such a range can be obtained and the on-resistance is sufficiently reduced.

Therefore, an object of the invention is a composed Schottky barrier diode of Ga ₂ O ₃ based semiconductor, shot reaction of key electrodes and Ga ₂ O ₃ based semiconductor is suppressed, a small reverse leakage current, Further, it is an object of the present invention to provide a low-loss Schottky barrier diode and a method for manufacturing the same.

One aspect of the present invention provides the following methods for manufacturing Schottky barrier diodes [1] to [2 ] in order to achieve the above object.

[1] _{A step of forming a Schottky electrode including a Pt layer on a semiconductor layer made of a Ga 2} O ₃ system single crystal so that the Pt layer comes into contact with the semiconductor layer, and after forming the Schottky electrode. Including a step of performing a heat treatment of 350 ° C. or higher and 650 ° C. or lower, by setting the temperature of the heat treatment in the step of performing the heat treatment to 450 ° C. or higher and 550 ° C. or lower, the rising voltage is 0.6 V or higher and By controlling the voltage to 0.7 V or less and setting the temperature of the heat treatment in the step of performing the heat treatment to 350 ° C. or higher and 450 ° C. or lower or 550 ° C. or higher and 650 ° C. or lower, the rising voltage is 0.7 V or higher and 0. A method for manufacturing a Schottky barrier diode controlled to 9 V or less.

[ 2 ] The method for producing a Schottky barrier diode according to the above [1], wherein the Pt layer has a thickness of 10 nm or more.

According to the present invention, there is provided a composed Schottky barrier diode of Ga ₂ O ₃ system semiconductor, the Schottky electrode and the Ga ₂ O ₃ system semiconductor of the reaction is suppressed, a small reverse leakage current, and low loss Schottky barrier diode and a method for manufacturing the same can be provided.

FIG. 1 is a vertical cross-sectional view of the Schottky barrier diode according to the embodiment. FIG. 2 is a graph showing the relationship between the heat treatment temperature and the forward characteristics of the sample in the formation of the Schottky electrode. FIG. 3 is a graph showing the relationship between the heat treatment temperature and the rising voltage read from FIG.

[Embodiment]
(Schottky barrier diode configuration)
FIG. 1 is a vertical cross-sectional view of the Schottky barrier diode 1 according to the embodiment. The Schottky barrier diode 1 is a vertical Schottky barrier diode, which is a semiconductor layer 10, a Schottky electrode 11 as an anode electrode formed on one surface of the semiconductor layer 10, and the other of the semiconductor layer 10. It has an ohmic electrode 12 as a cathode electrode formed on the surface.

The semiconductor layer 10 is a _{flat plate-like member made of a Ga 2} O ₃ system single crystal, and is typically a Ga ₂ O ₃ system substrate. The semiconductor layer 10 may be undoped (not intentionally doped) or may contain a dopant such as Si or Sn. The carrier concentration of the semiconductor layer 10 is preferably, for example, 1 × 10 ¹⁵ cm ^-3 or more and 1 × 10 ¹⁸ cm ^-3 or less.

Here, the Ga ₂ O ₃ system single crystal refers to a Ga ₂ O _{3 single crystal or a Ga 2} O ₃ single crystal to which an element such as Al or In is added. For example, it is a Ga ₂ O ₃ single crystal _{to which Al and In are added (Ga x} Al _y In _(1-xy) ) ₂ O ₃ (0 <x ≦ 1, 0 ≦ y <1, 0 <x + y). ≦ 1) It may be a single crystal. When Al is added, the bandgap widens, and when In is added, the bandgap narrows. The Ga ₂ O ₃ single crystal described above has, for example, a β-type crystal structure.

The thickness of the semiconductor layer 10 is preferably 100 nm or more in order to secure sufficient withstand voltage characteristics of the Schottky barrier diode 1. The withstand voltage of the Schottky barrier diode 1 is determined by the thickness of the semiconductor layer 10 and the carrier concentration. The upper limit of the thickness of the semiconductor layer 10 is not particularly limited, but since the electrical resistance in the thickness direction increases as the thickness increases, it is preferable to make the semiconductor layer 10 as thin as possible within the range in which the required withstand voltage characteristics can be obtained. ..

Further, the semiconductor layer 10 may have a multilayer structure composed of _two or more Ga 2 O _{3 system single crystal layers.} In this case, for example, the semiconductor layer 10 is composed of a Ga ₂ O ₃ system single crystal substrate and a Ga ₂ O ₃ system single crystal film epitaxially grown on the Ga 2 O 3 system single crystal substrate. Ga ₂ O ₃ based Schottky electrode 11 on the single crystal film is connected, if the ohmic electrode 12 is connected to the _Ga 2 _{O 3} system single crystal substrate, for example, the carrier concentration of _Ga 2 _{O 3} single crystal film 1 It is set to × 10 ¹⁵ cm ^-3 or more and 1 × 10 ¹⁷ cm ^-3 or less, and _{the carrier concentration of the Ga 2} O ₃ system single crystal substrate is 1 × 10 ¹⁷ cm ^-3 or more and 4 × 10 ¹⁹ cm ^-3 or less. Set.

The Schottky electrode 11 includes a Pt layer. That is, it has a single-layer structure composed of a Pt layer and a multi-layer structure including a Pt layer such as Pt / Ti / Au. In either case, the Pt layer of the Schottky electrode 11 is bonded to the semiconductor layer 10 to form a Schottky bond.

Since Pt is a material that does not easily oxidize, the Pt layer of the Schottky electrode 11 does not easily react with the semiconductor layer 10. Therefore, as compared with the case of using an electrode made of a material that easily reacts with _{a Ga 2} O _{3 system single crystal such as Ni, deterioration of device characteristics over time can be suppressed.}

The Pt layer of the Schottky electrode 11 preferably has a thickness of 10 nm or more. If the thickness is less than 10 nm, pinholes may occur and good rectification may not be obtained. When the thickness of the Pt layer of the Schottky electrode 11 is 10 nm or more, good rectification can be obtained and the differential on resistance after the current value rises becomes small.

Further, the upper limit of the thickness of the Pt layer of the Schottky electrode 11 is not restricted from the aspect of device performance. However, since Pt is a metal having a low vapor pressure, it is difficult to form a thick film by vapor deposition. Further, since Pt is expensive, it is preferable that it is thin from the viewpoint of manufacturing cost. Therefore, the Pt layer of the Schottky electrode 11 preferably has a thickness of 100 nm or less.

When the Schottky electrode 11 has a Pt / Ti / Au laminated structure, the Ti layer is used for the purpose of improving the adhesion between the Pt layer and the Au layer, and the Au layer is used for reducing the wiring resistance of the electrode itself. .. The Ti layer preferably has a thickness of 5 nm or more so that the Pt layer and the Au layer are sufficiently adhered to each other. The thickness of the Au layer may be thicker in order to reduce the wiring resistance, but is preferably 5000 nm or less from the viewpoint of manufacturing cost.

The Schottky electrode 11 is formed by forming a metal film constituting the Schottky electrode 11 on the semiconductor layer 10 by vacuum vapor deposition or the like, and then performing a heat treatment at 350 ° C. or higher and 650 ° C. or lower.

By performing this heat treatment at 350 ° C. or higher and 650 ° C. or lower, a Schottky barrier diode 1 having a rising voltage of 0.6 V or higher and 0.9 V or lower can be obtained. If the heat treatment temperature is less than 350 ° C., the effect of reducing the rising voltage by the heat treatment can hardly be obtained. Further, when the Schottky electrode 11 has a laminated structure such as Pt / Ti / Au, when the heat treatment temperature exceeds 650 ° C., Pt reacts with other metals (for example, Ti and Au) to obtain rectification. There is a risk that it will not be possible.

More specifically, by performing a heat treatment at 450 ° C. or higher and 550 ° C. or lower, a Schottky barrier diode 1 having a rising voltage of 0.6 V or higher and 0.7 V or lower can be obtained, and 350 ° C. or higher and 450 ° C. or lower or 550 ° C. or lower. By performing the heat treatment above and below 650 ° C., the Schottky barrier diode 1 having a rising voltage of 0.7 V or more and 0.9 V or less can be obtained.

The ohmic electrode 12 is made of a metal such as Ti and forms an ohmic contact with the semiconductor layer 10. The ohmic electrode 12 may have a multilayer structure in which different metal films are laminated, for example, Ti / Au or Ti / Al. In order to ensure ohmic contact between the ohmic electrode 12 and the semiconductor layer 10, it is preferable that the layer in contact with the semiconductor layer 10 of the ohmic electrode 12 is made of Ti.

In the Schottky barrier diode 1, a forward voltage (a positive potential on the Schottky electrode 11 side) is applied between the Schottky electrode 11 and the ohmic electrode 12, so that the Schottky electrode 11 is viewed from the semiconductor layer 10. The energy barrier at the interface with the semiconductor layer 10 is lowered, and a current flows from the Schottky electrode 11 to the ohmic electrode 12. On the other hand, when a voltage in the opposite direction (negative potential on the Schottky electrode 11 side) is applied between the Schottky electrode 11 and the ohmic electrode 12, no current flows due to the Schottky barrier.

(Manufacturing method of Schottky barrier diode)
An example of a method for manufacturing the Schottky barrier diode 1 will be described below.

First, a semiconductor layer is formed by slicing a bulk crystal of _{a Ga 2} O ₃ single crystal grown by a melt growth method such as an FZ (Floating Zone) method or an EFG (Edge Defined Film Fed Growth) method and polishing the surface. A Ga ₂ O ₃ system substrate as 10 is formed.

Next, the Schottky electrode 11 and the ohmic electrode 12 are formed on the front surface and the back surface of the semiconductor layer 10 by vacuum deposition or the like, respectively.

The Schottky electrode 11 is subjected to a heat treatment of 350 ° C. or higher and 650 ° C. or lower after depositing a metal film constituting the Schottky electrode 11.

(Effect of embodiment)
According to the above embodiment, it is possible to obtain a Schottky barrier diode having a small reverse leakage current and a low loss, which is composed of _{a Ga 2} O _{3 system semiconductor.}

The evaluation result of one form of the Schottky barrier diode 1 according to the above embodiment will be described below.

_{In this evaluation, as the semiconductor layer 10, a Ga 2} O ₃ substrate having a main surface orientation of (001) and having CMP treatment on both sides was used. Further, this Ga ₂ O ₃ substrate is a substrate that has not been intentionally doped, and has a carrier concentration of about ^{1 × 10 17 to} 5 × 10 ¹⁷ cm ^-3.

First, an ohmic electrode 12 having a Ti / Au laminated structure was formed by vacuum vapor deposition on the entire back surface of the semiconductor layer 10.

Next, a Schottky electrode 11 having a circular Pt / Ti / Au laminated structure having a diameter of 100 μm was formed on the surface of the semiconductor layer 10. The thicknesses of the Pt layer, Ti layer, and Au layer of the Schottky electrode 11 were set to 23 nm, 5 nm, and 280 nm, respectively.

In the formation of the Schottky electrode 11, a Pt / Ti / Au laminated structure was formed by vacuum vapor deposition, and then a heat treatment at 200 to 600 ° C. was performed. The atmosphere of this heat treatment was nitrogen, and the heat treatment time was 10 minutes.

Then, the forward characteristics (current density-voltage characteristics) of the sample before the heat treatment in the formation of the Schottky electrode 11 and the sample subjected to the heat treatment at 200 ° C., 300 ° C., 400 ° C., 500 ° C., or 600 ° C. are examined. Examined.

FIG. 2 is a graph showing the relationship between the heat treatment temperature and the forward characteristics of the sample in the formation of the Schottky electrode 11.

FIG. 2 shows that the rising voltage of the sample changes due to the heat treatment. Here, the voltage at the point where the straight line passing through the point where the current density is 50 A / cm ² and the point where the current density is 150 A / cm ² on each curve intersects the horizontal axis (the straight line where the current density is 0 A / cm ² ) rises. The voltage was used.

Further, FIG. 2 shows that the differential on-resistance after the current value of each sample rises is sufficiently low, and each sample functions as a Schottky barrier diode. For example, in the samples heat-treated at 300 ° C., 400 ° C., 500 ° C., and 600 ° C., the current densities are 100 A / cm when voltages of 1.08 V, 0.99 V, 0.89 V, and 0.99 V are applied, respectively. More than ^2.

FIG. 3 is a graph showing the relationship between the heat treatment temperature and the rising voltage read from FIG. The rising voltage of the sample before the heat treatment is about 1.01V, and the rising voltage of the sample heat-treated at 200 ° C., 300 ° C., 400 ° C., 500 ° C., or 600 ° C. is about 0.97V and 0, respectively. It is .91V, 0.82V, 0.66V, 0.82V.

From this result, a Schottky barrier diode 1 having a rising voltage of about 0.6 V or more and 0.7 V or less can be obtained by performing a heat treatment of about 450 ° C. or more and 550 ° C. or less, and about 350 ° C. or more and 450 ° C. or less. Alternatively, it can be seen that the Schottky barrier diode 1 having a rising voltage of about 0.7 V or more and 0.9 V or less can be obtained by performing a heat treatment of about 550 ° C. or higher and 650 ° C. or lower.

Although the embodiments and examples of the present invention have been described above, the present invention is not limited to the above-described embodiments and examples, and various modifications can be carried out within a range that does not deviate from the gist of the invention.

Further, the embodiments and examples described above do not limit the invention according to the claims. It should also be noted that not all combinations of features described in the embodiments and examples are essential to the means for solving the problems of the invention.

1 ... Schottky barrier diode, 10 ... Semiconductor layer, 11 ... Schottky electrode, 12 ... Ohmic electrode

Claims (2)

A step of forming a Schottky electrode containing a Pt layer on a semiconductor layer made of a Ga ₂ O _{3 system single crystal so that the Pt layer comes into contact with the semiconductor layer.}
After forming the Schottky electrode, a step of performing a heat treatment at 350 ° C. or higher and 650 ° C. or lower, and
Including
By setting the temperature of the heat treatment in the step of performing the heat treatment to 450 ° C. or higher and 550 ° C. or lower, the rising voltage is controlled to 0.6 V or higher and 0.7 V or lower, and the temperature of the heat treatment in the step of performing the heat treatment. The rise voltage is controlled to 0.7 V or more and 0.9 V or less by setting the temperature to 350 ° C. or higher and 450 ° C. or lower or 550 ° C. or higher and 650 ° C. or lower.
Manufacturing method of Schottky barrier diode. The Pt layer has a thickness of 10 nm or more.
The method for manufacturing a Schottky barrier diode according to claim 1.

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