JP6823756B2 - Game machine - Google Patents

Description

The present invention relates to a game machine such as a slot machine (rotary cylinder type game machine) and a pachinko machine, and more particularly to an initialization of a controller (bus state controller) built in a CPU included in a processing unit of the game machine.

A gaming machine (rotating cylinder type gaming machine, slot machine) having a plurality of rotating cylinders in which symbols are arranged on the outer peripheral surface is known. This type of game machine imparts a certain game value to a game medium (medal), and plays a game for acquiring such a game medium. Further, in this type of gaming machine, an internal lottery is performed and the rotation of a plurality of rotating cylinders is started with the player's rotation start operation as an opportunity, and the mode according to the result of the internal lottery as a player's stop operation trigger. Controls to stop multiple rotating cylinders. Then, the result of the game is determined by the combination of symbols displayed on the winning determination line in the state where the plurality of rotating cylinders are stopped, and medals and the like are paid out according to the result of the game.

As devices that play a role in enhancing the interest of the player, various production devices such as a liquid crystal display device, a display lamp for production (illumination), and a sound generator (sound device, speaker) are provided in the game machine. In addition, a movable accessory (movable body) that is provided with a movable portion and produces an effect by the movement of the movable portion may be provided. In the following description, not only the liquid crystal display device, the illumination, and the sound generator itself, but also their control devices may be referred to as "directing device".

Japanese Patent Application Laid-Open No. 11-76565 EPROM for storing programs, EEPROM for storing data required for game machine control, RAM functioning as a work area, and chip select signals (CSOO to CS15) from an address signal (ADROO-ADR15). ), A bus interface unit with a terminal that can switch between an address signal and a chip select signal, and a CPU core that operates according to a program stored in EPROM. The parts are connected by a bus. Japanese Unexamined Patent Publication No. 2005-348808 A game machine is provided with a CPU having a built-in RAM and a control board having a ROM connected to the outside of the CPU via a bus. This ROM is required to have a "game machine control program" for controlling the operation of the game machine and a high-speed process of the "game machine control program" as an initialization program process when the power is turned on to the control device. Two programs, the "initialization program", which is a means for transferring and storing a specific program module to the RAM built in the CPU, are stored. The "game machine control program" stored in the ROM is configured to execute the program module stored in the RAM built in the CPU during the execution of the game machine control program.

The processing unit (sub-board) of the game machine includes a CPU (central processing unit). A ROM, RAM and other devices are connected to the CPU. In order to use these devices, each device must be mapped to the address space (CS space) and made accessible in the initial settings after power-on or reset. The bus state controller is a circuit (function) built in the CPU and manages the CS space. By default, the bus state controller is enabled only in some CS spaces and disabled in others after power-on or reset. For example, immediately after the CPU operation starts, the CS space setting is valid only for CS0, which is premised on the connection of the device for starting the program, and the other CS spaces are invalidated.

Patent Document 1 does not describe the case where there is a CS space that is enabled in the initial state and a CS space that is disabled. Patent Document 2 does not describe the setting of the CS space. Therefore, in both Patent Documents 1 and 2, the device is appropriately connected to the CS space for a CPU including a bus state controller in which only a part of the CS space is enabled by default and the other is disabled. I can't.

An object of the present invention is to provide a gaming machine capable of appropriately initializing a bus state controller and appropriately connecting a device to a CS space.

The present invention is a gaming machine including a central processing unit and a plurality of devices connected to the central processing unit, and including a processing unit (sub-board) that performs a predetermined processing.
The central processing unit includes a controller that controls an address space for managing a plurality of the devices.
At least one of the plurality of devices is a storage unit for storing a program.
The central processing unit
Based on the reset, the central processing unit itself performs initial settings (initial settings by the CPU), including setting the controller so that it can access at least the storage unit and setting the access position.
In the storage unit, the start program stored at the position (start address) determined by the initial setting by the central processing unit itself is read and the initial setting by the program is executed.
The start program is
Information related to the settings for accessing the device for each device, and
It includes an instruction for setting access to the device other than the storage unit by the controller based on the content of the information.
The start program may further include an instruction to change the setting of access to the storage unit by the controller based on the content of the information.

The information stores a setting for disabling access to a plurality of the devices that are not used.

According to the present invention, the start program has a table in which settings for accessing the device are stored in advance for each device, and access to the storage unit by the controller based on the contents of the table. Since the instruction to change the setting and the instruction to set the access to the device other than the storage unit by the controller based on the contents of the table are included, the controller setting should be appropriately performed before using each device. And the device can be referenced.

It is a perspective view of the slot machine which shows the state which the front door is closed. It is a perspective view of the slot machine which shows the state which the front door is opened. It is a block diagram of a slot machine. It is a flowchart of a game process of a slot machine. It is a block diagram of the communication system of the game machine which concerns on embodiment of the invention. It is explanatory drawing of the slave board which concerns on embodiment of an invention. The embodiment of the invention (initial setting at the time of program execution: disabling interrupts) The embodiment of the invention (initial setting at the time of program execution: disabling interrupts) The embodiment of the invention (initial setting at the time of program execution: setting of bus state controller) The embodiment of the invention (initial setting at the time of program execution: setting of bus state controller) The embodiment of the invention (initial setting at the time of program execution: setting of bus state controller) The embodiment of the invention (initial setting at the time of program execution: setting of bus state controller) The embodiment of the invention (initial setting at the time of program execution: setting of CS0 space for storing the start program). The embodiment of the invention (initial setting at the time of program execution: setting of CS0 space for storing the start program). The embodiment of the invention (initial setting at the time of program execution: setting of CS0 space for storing the start program). The embodiment of the invention (adjustment of the timing of reset release at the time of initial setting) The embodiment of the invention (adjustment of the timing of reset release at the time of initial setting) The embodiment of the invention (adjustment of the timing of reset release at the time of initial setting) It is a circuit diagram (FIG. 19 (a)) of the processing unit which concerns on embodiment of the invention (maintenance of an initial setting at the time of a malfunction), and a timing chart (FIG. 19 (b)) for explaining operation. It is a perspective view of the pachinko machine with the front door open. It is a figure (front view) which shows the state of the board surface of a pachinko machine. It is a block diagram of a pachinko machine.

<Mechanical structure of game machines>
FIG. 1 shows a front view of a slot machine showing a state in which the front door is closed, and FIG. 2 shows a front view of the slot machine showing a state in which the front door is opened. In the following description, the up, down, left, or right directions shall refer to the directions seen by the player facing the slot machine, unless otherwise specified.

In FIGS. 1 and 2, 100 indicates a slot machine, and the slot machine 100 has a slot machine housing 120 and a front door attached to one side of the front surface of the slot machine housing 120 so as to be openable and closable by a hinge or the like. It is equipped with 130. The front door 130 includes an upper door 130U and a lower door 130L that can be opened and closed independently.

A game display unit 131 is provided in the upper right corner of the front surface of the front door 130. The player can see the three reels of the reel unit 203 through the game display unit 131.

On the right side of the upper surface of the upper door 130U, a medal insertion slot 132 for a player to insert a medal is provided, and on the left side of the medal insertion slot 132, a jammed medal inserted from the medal insertion slot 132 is inserted into a slot machine. A reject button 133 is provided for forcibly discharging the 100 to the outside.

A start switch 134 for starting a game is provided on the left side of the upper surface of the lower door 130L, and three stop buttons 140 corresponding to each of the three reels are provided between the start switch 134 and the medal insertion slot 132. There is.

A liquid crystal panel LCD1 is provided in the center of the upper door 130U, and a liquid crystal panel LCD2 is provided in the lower door 130L over substantially the entire surface thereof.

A switch (cross key unit) SW as an operation unit is provided in the center of the upper surface of the lower door 130L, that is, above the stop button 140 and between the bet switch BET and the medal insertion slot 132. The switch SW includes, for example, a cursor key (switch) for moving the cursor up / down / left / right, an operation confirmation button / cancel button, and the like.

Illuminations DRU, DRL, DLU, and DLL are provided at the left and right ends of the slot machine 100, respectively. That is, an illuminated DLU is provided at the left end of the upper door 130U, an illuminated DRU is provided at the right end, an illuminated DLL is provided at the left end of the lower door 130L, and an illuminated DRL is provided at the right end. Each of the illuminated DRU, DRL, DLU, and DLL is provided with a light emitting device (LED) inside.

As shown in FIG. 2, inside the slot machine housing 120, a plurality of medals are stored inside, and the stored medals are stored in a payout port provided in the lower front portion of the lower door 130L. A hopper device 121 for paying out one by one is installed. An upper portion of the hopper device 121 is provided with a hopper tank 122 that opens upward and stores a large number of medals inside. Inside the slot machine housing 120, a reel unit 203 composed of three reels is installed at a position where the game display unit 131 comes when the upper door 130U is closed. The reel unit 203 includes three reels (first reel to third reel) in which a plurality of types of symbols are arranged on the outer peripheral surface. The game display unit 131 is provided with an opening so that the player can see the design of each rotating reel of the reel unit 203. A power supply unit 205 is provided on the left side of the hopper device 121.

As shown in FIG. 2, a medal (coin) selector 1 is attached to the back surface of the lower door 130L at the lower part of the medal insertion slot 132 on the upper surface of the lower door 130L. The medal selector 1 rolls the medal toward the hopper device 121 while detecting the passage of the medal inserted from the medal insertion slot 132, and a medal having an outer diameter different from a predetermined dimension, iron or iron. It is a device for selecting and eliminating illegal medals made of alloy, and for selecting and eliminating a predetermined number or more of medals that can be inserted per game.

Further, on the lower side of the medal selector 1, as shown in FIG. 2, a lead-out path 136 that covers the lower side thereof and communicates with the payout port at the lower part of the lower door 130L is provided. The medals sorted by the medal selector 1 are returned to the player from the payout port via the lead-out path 136.

The main board 10 is attached to the inside of the slot machine housing 120 and below the reel unit 203. The main board 10 is provided with a setting change switch SSW for making internal settings related to the game (for example, which of a plurality of lottery tables is used). A sub-board 20 is attached to the lower center of the back surface of the upper door 130U.

A bass speaker SPL is provided in the upper left corner inside the slot machine housing 120, and two speaker SPs covering a standard range are provided below the lower door 130L.

<Electrical structure of game machines>
FIG. 3 shows a functional block diagram of the slot machine 100.

In this figure, the display of the power supply system is omitted. Although not shown in FIG. 3, the slot machine includes a power supply unit (power supply unit 205 in FIG. 2) for generating a DC power supply (+ 5V or the like) from a commercial power supply (AC100V).

<Electrical structure of game machine: Overall>
The slot machine 100 includes a main board 10 and a sub board 20 that operates in response to a command from the main board 10 as its main processing device. The substrate including the main substrate 10 and the sub substrate is housed inside the case so as not to be contacted from the outside, and is sealed so that a trace remains when these substrates are removed. Specifically, the main board 10 and the sub board 20 are integrally attached by caulking, and are covered by an integrated case that covers the entire main board 10 and the sub board 20.

The main board 10 is for performing an internal lottery in response to an operation of a player, and performing processing (game processing) such as rotation / stop of a rotating cylinder and payout of medals. The main board 10 includes a CPU that performs control operations according to a preset program, a ROM that is a storage means for storing the program, and a RAM that temporarily stores processing results and the like.

The sub-board 20 is for receiving a command signal from the main board 10 to notify the result of the internal lottery and to perform various effects. The sub-board 20 includes a CPU that performs control operations according to a preset program corresponding to the command signal, a ROM that is a storage means for storing the program, and a RAM that temporarily stores processing results and the like. The flow of commands is only one from the main board 10 to the sub board 20, and conversely, no command or the like is issued from the sub board 20 to the main board 10. The sub-board 20 is provided with means for generating random numbers used for the effect.

Hereinafter, the main board and the sub board will be described in detail.

<Electrical structure of game machine: Main board>
On the main board 10, the number of medals paid out from the bet switch BET, the start switch 134, the stop button 140, the reel (rotary cylinder) unit 203, the setting change switch SSW, the hopper drive unit 80, the hopper 81, and the hopper 81 are displayed. A medal detection unit 82 for counting (these constitute the above-mentioned hopper device 121) is connected.

Further, the medal sensors S1 and S2 of the medal selector 1 are connected to the main board 10.

The medal selector 1 is provided with medal sensors S1 and S2 for counting medals. The medal sensors S1 and S2 are attached to the downstream side (near the exit) of the medal passage (not shown) provided in the medal selector 1 (the upstream side of the medal passage communicates with the medal insertion slot 132). The two medal sensors S1 and S2 are provided side by side at predetermined intervals along the traveling direction of the medal. The medal sensors S1 and S2 are, for example, photointerruptors having a light emitting portion and a light receiving portion facing each other and formed in a U-shaped cross section, and the detection optical axis thereof faces the medal passage from above. .. Each photo interrupter detects the passage of medals sent unblocked along the way. The reason why the two photo interrupters are adjacent to each other is not only to detect the number of medals but also to monitor whether or not the passage of medals is normal. That is, by providing two photo interrupters adjacent to each other, it is possible to detect the passing speed and the passing direction of medals, thereby detecting not only the number of medals but also fraudulent acts moving in the opposite direction.

The reel unit 203 includes three reels 40a to 40c, stepping motors 155a to 155c for rotating them, and a reel position detector (index sensor) 159a to 159c for detecting their positions (note that). , Stepping motors 155a to 155c may be simply referred to as motors 155 or motors).

The rotating cylinder control means 1300 starts from the reference position of the rotating cylinder 40 (a frame specified by an index (not shown)) based on the reference position signal detected by the index sensor 159 each time each of the rotating cylinders 40a to 40c makes one rotation. By obtaining the rotation angle of (counting the number of rotation steps of the rotation shaft of the step motor), it is possible to monitor the current rotation state of the spinning top 40. That is, the main board 10 can obtain the position of the rotating cylinder 40 when the stop button 140 is operated by obtaining the rotation angle of the rotating cylinder 40 from the reference position.

In the following description, reference numerals 40 will be used to indicate any one or more rotating cylinders, and reference numerals 40a to 40c will be used to indicate the three rotating cylinders separately.

The hopper drive unit 80 rotates and drives a rotating disc (not shown) of the hopper 81 to pay out the number of medals specified by the main board 10. The game machine includes a medal detection unit 82 that operates every time one medal is paid out, and the main board 10 is a medal that is actually paid out from the hopper 81 based on an input signal from the medal detection unit 82. You can manage the number.

The insertion reception unit (insertion reception means) 1050 receives the outputs of the medal sensors S1 and S2 of the medal selector 1, receives the insertion of medals for each game, and based on the fact that medals corresponding to the specified number of insertions are inserted. , The process of permitting the rotation start operation of the first to third cylinders with respect to the start switch 134 is performed. The pressing operation of the start switch 134 serves as an opportunity to start the rotation of the first to third cylinders and also to execute an internal lottery. Further, the specified number of input may be set according to the game state, and the specified number of input is set to 3 in the normal state, the bonus establishment state, and the bonus state.

When medals are inserted, the inserted medals are set to the inserted state up to the specified number of medals inserted according to the gaming state. Alternatively, when the bet switch BET is pressed while the medals are credited to the game machine, the credited medals are set to the inserted state by limiting the specified number of inserted medals according to the game state. The main board 10 controls whether or not to accept the insertion of medals. From the time when the start switch 134 is pressed and the rotation of each cylinder starts (when the game starts), when the three stop buttons 140 are pressed and the rotation of each cylinder stops (when the medal payout is completed if a prize is won) (game) If the medal is not ready to be inserted (when it is not permitted), even if the medal is inserted, it will not be counted by the medal sensors S1 and S2 and will be returned as it is. .. Similarly, the main board 10 controls the validity / invalidity of the bet switch BET depending on whether or not it is in a state of accepting the insertion of medals. Further, the bet switch BET is valid from the end of the game to the start of the game, but during other periods (when the BET switch is not permitted to be pressed), the bet switch BET is pressed. But it is ignored.

The main board 10 contains a random number generation means 1100. The random number generation means 1100 is a means for generating a random number value for lottery. The random number value can be generated based on, for example, the count value of an increment counter (a counter that counts numerical values so as to circulate in a predetermined count range). In the present embodiment, the “random number value” includes not only a value that randomly occurs in a mathematical sense, but also that even if the generation itself is regular, the acquisition timing and the like are irregular, so that the value is practical. Also includes values that can function as random numbers.

The internal lottery means 1200 performs an internal lottery in which the player decides whether or not to win the combination based on the start signal from the start switch 134. That is, a lottery table selection process for selecting a lottery table (not shown) stored in a memory (not shown) of the main board 10, a random number determination process for determining the winning of a random number obtained from the random number generating means 1100, and winning. When a big hit or the like is won based on the judgment result of, a lottery flag setting process for setting a flag to that effect is performed.

In the lottery table selection process, it is determined which of the plurality of lottery tables (not shown) stored in the storage means (ROM) (not shown) is used for the internal lottery. In the lottery table, for each of the multiple random values (for example, 65536 random values from 0 to 65535), replay, small role (bell, cherry), regular bonus (RB: bonus), and big bonus (BB) : Bonus) and other roles are associated. Further, as a game state, a normal state, a bonus establishment state, and a bonus state can be set, and further, as a replay lottery state, a replay non-lottery state, a replay low probability state, and a replay high probability state can be set.

By the lottery table selection process, the content of the lottery can be set within a predetermined range (the probability of winning can be increased or decreased), and the setting work is performed by the store in the hall where the game machine is installed. .. The switch used in this setting work is the setting change switch SSW.

A normal game machine is provided with a plurality of (for example, six) lottery tables having different lottery probabilities such as BB, RB, and small winning combination in advance. In the lottery of the game machine, one is set from the plurality of lottery tables, and the winning / losing determination by the lottery is made based on the set lottery table. Changing the setting regarding which of the plurality of lottery tables is used is referred to as changing the setting (hereinafter referred to as "setting change").

Conventionally, in a game machine such as a slot machine, when changing a set value (usually 1 to 6), the door of the game machine is opened and a setting change key is used as a key switch of the setting change switch SSW provided on the main board 10. With the key switch turned on, turn on the power of the game machine to make it possible to change the setting, and each time the setting change button (push button) of the setting change switch SSW is pressed once, 7 segments The set value displayed on the display or the like is incremented to cyclically change the values from 1 to 6, and when the desired set value is displayed on the display, the start switch is operated to obtain the desired set value. Has been confirmed.

In the random number determination process, a random number value (lottery random number) is acquired from a random number generating means (not shown) for each game based on the start signal from the start switch 134, and the acquired random number value is referred to the lottery table. Determine whether or not the role was won.

In the lottery flag setting process, the lottery flag of the winning combination is changed from the non-winning state (first flag state, off state) to the winning state (second flag state, on) based on the result of the random number determination process. State). When two or more types of winning combinations are won in duplicate, a lottery flag corresponding to each of the two or more types of winning combination is set in the winning state. The lottery flag setting information is stored in the storage means (RAM).

A lottery flag (carry-over flag) that allows you to carry over the winning status to the next and subsequent games until you win, and a lottery flag that resets to the non-winning status without carrying over the winning status to the next and subsequent games regardless of winning. No carry-over flag) may be provided. In this case, the roles to which the former carry-over flag is associated include the regular bonus (RB) and the big bonus (BB), and the other roles (for example, small role, replay) correspond to the latter non-carryable flag. It is attached. That is, in the lottery flag setting process, if the regular bonus is won in the internal lottery, the winning state of the regular bonus lottery flag is carried over until the regular bonus is won, and if the big bonus is won in the internal lottery, the big bonus lottery is performed. The winning status of the flag is carried over until the big bonus is won. At this time, the main board 10 uses the internal lottery function to determine whether or not the winning status of the regular bonus or big bonus lottery flag is carried over, but for the roles other than the regular bonus and the big bonus (small role and replay). An internal lottery is held. That is, in the lottery flag setting process, in the game in which the winning state of the regular bonus lottery flag is carried over, if a small winning combination or replay is won in the internal lottery, the regular bonus lottery flag and the internal lottery that have already been won In a game in which the lottery flags corresponding to two or more types of winning small wins or replay lottery flags are set to the winning state, and the winning state of the big bonus lottery flag is carried over, the small winning combination is used in the internal lottery. If a role or replay is won, a lottery flag corresponding to two or more types of roles consisting of a big bonus lottery flag that has already been won and a small role or replay lottery flag that has been won in the internal lottery will be set to the winning state. Set.

In the rotating cylinder control means 1300, the player rotates and drives the first cylinder to the third cylinder by a stepping motor based on a start signal by pressing the start switch 134 (rotation start operation), and the first cylinder is ~ 3rd time When the rotation speed of the cylinder reaches a predetermined speed (about 80 rpm: rotation speed of about 80 rotations per minute), pressing operation (stop) of three stop buttons 140 corresponding to each rotating cylinder The operation) is controlled, and the first to third cylinders, which are rotationally driven by the stepping motor, are stopped according to the setting state of the lottery flag (result of the internal lottery).

Further, the reel control means 1300 stops the reel when the player presses the three stop buttons 140 in a state where the pressing operation (stop operation) for the three stop buttons 140 is permitted (enabled). By stopping the supply of the drive pulse (motor drive signal) to the stepping motor of the reel unit 203 based on the signal, control is performed to stop each of the first to third reels.

That is, each time the rotating cylinder control means 1300 presses each of the three stop buttons 140, the rotating cylinder control means 1300 determines the stop position of the rotating cylinder corresponding to the pressed button from the first cylinder to the third cylinder. Therefore, control is performed to stop the rotating cylinder at the determined stop position. Specifically, the first time according to the pressing timing, pressing order, etc. (mode of stop operation) of the three stop buttons with reference to the stop control table (not shown) stored in the storage means (ROM). The stop position of the body to the third body is determined, and control is performed to stop the first body to the third body at the determined stop position.

Here, in the stop control table, the positions of the 1st to 3rd cylinders (pressing detection position) at the time when the stop button 140 is operated and the actual stop positions (or pressing detections) of the 1st to 3rd cylinders. The correspondence with the number of sliding frames from the position) is set. The number of sliding frames is a symbol that passes through the reference position between the operation of the stop button 140 when the reference position is a specific symbol that can be seen from the game display when the rotation is stopped and the rotation of the corresponding rotation is stopped. The number of. Since the rotating cylinder control means 1300 stops each rotating cylinder within 190 ms from the operation of each stop button 140, the number of sliding frames is within the range of 0 or more and 4 or less (however, 80 rotations / minute, (Under the condition that the number of symbols = 21). Depending on the setting state of the lottery flag, a stop control table for determining the stop positions of the first to third cylinders may be prepared.

As described above, the rotating cylinder control means 1300 is based on the reference position signal detected by the index sensor 159 each time the rotating cylinder makes one rotation, from the reference position of the rotating cylinder (the top detected by the reel index). By obtaining the rotation angle (the number of rotation steps of the rotation shaft of the step motor), it is possible to monitor the current rotation state of the spinning top. That is, the main board 10 can be obtained by obtaining the position of the rotating cylinder when the stop button 140 is operated by obtaining the rotation angle from the reference position of the rotating cylinder.

The rotating cylinder control means 1300 performs so-called pull-in processing and kicking processing as control for stopping the rotating cylinder. The pull-in process is a control that stops the rotating cylinder so that the symbol corresponding to the winning combination whose lottery flag is set is stopped on the valid winning judgment line (so that the winning combination can be won). It is a process. On the other hand, the kicking process is to prevent the symbol corresponding to the winning combination whose lottery flag is set to the non-winning state from stopping on the valid winning judgment line (so that the winning combination cannot be won). It is a control process to stop. That is, in the gaming machine of the present embodiment, in order to realize the pull-in process and the kick-off process, the setting state of the lottery flag, the pressing timing of the stop button 140, the pressing order, and the stop position of the rotating cylinder that has already been stopped (display symbol). The stop control table is set so that the stop position of each rotating cylinder changes according to the type). In this way, the main board 10 makes it possible to stop the symbol of the winning combination with the lottery flag set in the winning state in the form of winning, while the symbol of the winning combination with the lottery flag set in the non-winning state is in the form of winning. Control is performed to stop the 1st to 3rd cylinders so as not to stop.

In the gaming machine of the present embodiment, the first to third cylinders are in a control state in which the rotating cylinder corresponding to the pressed stop button is stopped within 190 ms from the time when the stop button 140 is pressed. Is set to. That is, in the stop control table for determining the stop position of each rotating cylinder, the number of frames required from the time when the stop button 140 is pressed until each rotation cylinder stops is in the range of 0 to 4 frames (predetermined pull-in range). It is set in.

The winning determination means 1400 performs a process of determining whether or not a winning combination has won a prize, based on the stopping modes of the first to third cylinders. Specifically, while referring to the winning judgment table stored in the storage means (ROM), the symbol combination displayed on the winning judgment line when all of the 1st to 3rd cylinders are stopped. However, it is determined whether or not it is in the form of winning a predetermined combination.

The winning determination means 1400 executes the winning processing based on the determination result. As the process at the time of winning, for example, when a small winning combination is won, the hopper 81 is driven to perform the medal payout control process, or the credit is increased (the specified maximum number is increased to, for example, 50, and it is increased). If the replay wins, the replay process is performed, and if the big bonus or regular bonus wins, the game state transition control process that shifts the game state is performed.

The payout control means 1500 performs payout control processing related to payout of medals according to the game result. Specifically, when a small winning combination is won, the number of medals to be paid out in the game is determined based on a predetermined payout for each winning combination, and the medals corresponding to the determined number of payouts are given to the hopper drive unit 80. Drives the hopper 81 to pay out. At this time, a current flows through a motor (not shown) built in the hopper 81.

When medal credits (internal storage) are permitted, the number of credits stored in the credit storage area (not shown) of the storage means (RAM) instead of actually paying out the medals by the hopper 81 (not shown). The credit addition process of adding the number of payouts to the number of credited medals) is performed to virtually pay out the medals.

When the replay wins a prize, the replay processing means 1600 performs a replay process (replay process) in which the player does not need to insert a medal owned by the player for the next game and sets the same preparation state as the previous game. When the replay wins, the automatic insertion process is performed in which the same specified number of medals as in the previous game are automatically set to the insertion state without using the medals (including credit medals) held by the player. , The game machine is set to a state of waiting for the rotation start operation (pressing operation of the start switch 134 by the player) in the next game with the same winning determination line as in the previous game enabled.

The replay processing means 1600 may control to change the winning probability of the replay in the internal lottery under a predetermined condition. For example, if a predetermined result is displayed when the rotating cylinder is stopped by operating the stop button 140, the winning probability of the replay fluctuates. As the lottery state of the replay, the replay is excluded from the target of the internal lottery, the replay no lottery state, the replay winning probability is set to about 1 / 7.3, the replay winning probability is about 1 /. It is possible to set a plurality of types of lottery states called a replay high probability state set to 6.

The error processing unit 1700 determines an error of the game machine based on the outputs of the door open / close detection sensor, the medal sensors S1 and S2, and the medal detection unit 82 (not shown), and when the error is determined, notifies that fact and the game machine. To a predetermined state (for example, a state in which an operation is not accepted).

The door open / close detection sensor (not shown) is a sensor that detects that the front door 130 (upper door 130U, lower door 130L) is closed, and is, for example, an electric switch such as a micro switch or a contact. When the front door 130 (upper door 130U, lower door 130L) is closed, the switch is turned on (or off) by the action part of the switch coming into contact with the back side of the front door 130 (upper door 130U, lower door 130L). ), And when the front door 130 (upper door 130U, lower door 130L) is opened, the working part is separated and turned off (or on). The door open / close detection sensor may be an optical type such as a photo interrupter. The medal sensors S1 and S2 and the medal detection unit 82 have been described above.

Specifically, the error processing unit 1700 performs the following operations.
-When the opening of the front door 130 (upper door 130U, lower door 130L) is detected based on the output of the door open / close detection sensor (not shown), error processing is performed.
-Medal backflow based on the outputs of the medal sensors S1 and S2 (the detection order of the sensors S1 and S2 is reversed), medal retention (the detection time of the sensors S1 and S2 is longer than a predetermined threshold). When such as is detected, error processing is performed.
-Medal clogging based on the output of the medal detection unit 82 (the detection time of the medal detection unit 82 is longer than a predetermined threshold value), hopper empty (the medal detection unit despite operating the hopper drive unit 80). When 82 does not detect a medal) or the like is detected, error processing is performed.

When the error processing unit 1700 determines that an error is determined as described above, the error processing unit 1700 notifies the fact and puts the game machine in a predetermined state (error state), but this state is canceled by a reset switch (not shown). The reset switch is provided, for example, on the panel of the power supply unit 205.

There is also an error that occurs in the sub-board 20. Although the game is not disabled due to this error, it is possible to notify by a liquid crystal display device or the like that an error has occurred due to the processing of the sub-board 20 itself. The error occurs, for example, when an invalid command is received (including when the encrypted command cannot be decrypted correctly), and the error is canceled by the reset switch (main board 10 to sub board 20). A reset command is sent to).

Further, the main board 10 may control to shift the gaming state between the normal state, the bonus establishment state, and the bonus state (game state transition control function). As the transition condition of the gaming state, one condition may be defined, or a plurality of conditions may be defined. When a plurality of conditions are set, the gaming state is transferred to another gaming state based on the fact that one of the plurality of conditions is satisfied or all of the plurality of conditions are satisfied. Can be done.

The normal state is a gaming state corresponding to the initial state among a plurality of types of gaming states, and it is possible to shift from the normal state to the bonus establishment state. The bonus establishment state is a gaming state in which a transition occurs when a big bonus or a regular bonus is won in an internal lottery. In the bonus establishment state, if the big bonus is won in the internal lottery in the normal state, the lottery flag corresponding to the big bonus is maintained in the winning state until the big bonus is won, and if the regular bonus is won in the internal lottery in the normal state. , The lottery flag corresponding to the regular bonus is maintained in the winning state until the regular bonus is won. In the bonus state, whether or not the end condition is satisfied is determined by the total number of medals paid out by the bonus game, and when the number of medals exceeding the predetermined maximum number of medals to be paid out is paid out according to the type of bonus won. , End the bonus state and return the game state to the normal state.

The reel unit 203 includes three reels 40a to 40c, and one stepping motor 155a to 155c is attached to each of the three reels 40a to 40c. The stepping motor 155 is provided with a gear-shaped iron core or a permanent magnet as a rotor, a plurality of windings (coils) as a stator, and is rotated by switching windings through which an electric current flows. Is. That is, a current is passed through the winding of the stator to generate a magnetic force, and the rotor is attracted to rotate. Since the rotation axis can be stopped at a specified angle, it is used to drive the rotation of the rotating cylinder of a slot machine. Multiple windings make up one phase. As the number of phases, for example, there are two (two phases), four (four phases), and five (five phases).

The characteristics of the stepping motor can be changed (the excitation mode changes) by changing the way in which the current is applied to the windings of each phase. The two-phase type is as follows.

・ One-phase excitation Always pass current through only one phase of the winding. Positioning accuracy is good.

・ Two-phase excitation
Apply current to the two phases. An output torque about twice that of single-phase excitation can be obtained. Since the positioning accuracy is good and the static torque when stopped is large, the stopped position can be reliably held.

・ One-two-phase excitation
A current is passed by alternately switching between one phase and two phases. Since the step angle can be halved in the case of one-phase excitation and two-phase excitation, smooth rotation can be obtained.

In addition, "driving" the stepping motor includes rotating the motor by the above-mentioned excitation and exciting each phase in order to stop the motor at a desired position and hold the position.

Regarding the drive of the rotating cylinders 40a to 40c of the slot machine, for example, a stepping motor having a four-phase basic step angle of 1.43 degrees is used, and one- or two-phase excitation is adopted as a pulse output method.

The 10CG is a command transmission unit that transmits a command to be sent to the sub-board 20. This command includes a command related to information on the winning combination, a command related to information on the number of medals inserted and the number of credits (stored number), and the like. Specifically, the command transmission unit 10CG is realized by the CPU executing a program written in advance in the ROM mounted on the main board 10.

<Game processing on the main board>
Next, the game processing on the main board 10 will be described with reference to FIG.
Generally, in a game machine, one game is from the insertion of medals (insertion of credits) to the end of payout (or the end of increase in the number of credits). There is a rule that you cannot proceed to the next game until one game is completed.

First, when a predetermined number of medals are inserted, the start switch 134 is activated and the process of FIG. 4 is started.

In step S1, the start switch 134 is operated to turn on the start switch 134. Then, the process proceeds to the next step S2.

In step S2, the lottery process is performed by the main substrate 10. Then, the process proceeds to the next step S3.

In step S3, the rotation of the first reel to the third reel starts. Then, the process proceeds to the next step S4.

In step S4, the stop button 140 is turned on by operating the stop button 140. Then, the process proceeds to the next step S5.

In step S5, the rotation stop processing is performed on the reel corresponding to the pressed stop button 140 among the first reel to the third reel. Then, the process proceeds to the next step S6.

In step S6, it is determined whether or not the stop button 140 corresponding to the three reels has been operated. Then, when it is determined that all three stop buttons 140 corresponding to the three reels have been operated, the process proceeds to the next step S7.

In step S7, it is determined whether or not the symbol combinations corresponding to the lottery flag are aligned on the effective winning line while the lottery flag is established, that is, whether or not the winning is confirmed. Then, when it is determined that the winning is confirmed, the process proceeds to the next step S8. If the prize is not confirmed, the medal will not be paid out even if the lottery flag is established.

In step S8, medals corresponding to the symbol combinations aligned on the winning determination line are paid out.

From the insertion of the medal to the completion of the execution of step S8 is one game. When the standby process in step S8 is completed, the process returns to the beginning of the flowchart. In other words, the next game is possible (shift to the next game).

<Electrical structure of game machine: Sub-board>
Liquid crystal panels LCD1 and LCD2, LEDs 202B, 202U and 202L, a speaker SP, a bass speaker SPL, a solenoid SN, a motor MU and ML, sensors SENU and SENL, and a switch SW are connected to the sub-board 20. The LEDs 202B, 202L, and 202U have a built-in latch that acquires and holds data, and an LED that is an illumination (the LED may be provided outside the substrate). These components are controlled by the sub-board 20, and are an output device that produces effects by moving images, light, sound, and moving bodies, or an input device or a player for detecting the movements of moving bodies. It is an input device that accepts operations by.

Although not shown, the model-specific block BB and the lower door block BL include a video controller (VDC) for controlling the liquid crystal panel LCD 2, a speaker SP, and a sound for driving the speaker SP to generate sound. It has a built-in drive circuit for driving the controller, solenoid SN, motor MU and ML.

The components such as the liquid crystal panel described above correspond to the model-specific block BB built in the slot machine housing 120, the upper door block BU provided corresponding to the upper door 130U, and the lower door 130L, except for the bass speaker SPL. It is provided separately for any of the three lower door blocks BL provided.

In the example of FIG. 3, the model-specific block BB includes the solenoid SN, the speaker SP, and the LED202B, and the upper door block BU includes the liquid crystal panel LCD1, the LED202U, the motor MU, and the sensor SENU that detects the movement of the movable body by the liquid crystal panel LCD1, LED202U. The lower door block BL includes a liquid crystal panel LCD2, a speaker SP, an LED202L, a motor ML, a sensor SONL for detecting the operation of a movable body by the motor ML, and a switch SW such as a cursor key. It should be noted that the entire liquid crystal panel LCD 2 may be configured to be slightly movable back and forth by the motor ML, and the player may be able to push the liquid crystal panel LCD 2 while the liquid crystal panel LCD 2 is in the front position. In this case, the switch SW of the lower door block BL includes a switch for detecting the pressing of the liquid crystal panel LCD2.

<Electrical structure of game machine: Outline of initial operation of CPU on sub-board>
When the power of the game machine is turned on, the CPU of the sub-board starts the operation (when it is reset, the operation is restarted and the operation is the same as when the power is turned on).

When the power is turned on (reset), the start address as the initial value of the program counter and the initial value of the stack pointer are taken out from a predetermined table (exception handling vector table) and stored respectively. The program counter is a counter that indicates the position of the program to be executed. The stack is a storage area (register) used to temporarily hold information, and the stack pointer is the last address (latest) in the stack of addresses (a set of information indicating the position of the set of information held). Address) is a register that points to.

Next, the vector base register is set to a predetermined value (H'00000000), the interrupt mask level bits (I3 to I0) of the status register are set to a predetermined value (B'1111), and the BO bit and CS bit are set to 0. To become. It also initializes the interrupt controller. The vector base register is one of the control registers and is used as the base address (program jump destination) of the exception handling vector area including interrupts. When an exception or interrupt occurs, it is referenced as the base address of the branch destination. The status register is one of the control registers, and its contents indicate the state of the CPU. The interrupt controller is for determining the priority of interrupts.

The mask level bit sets the interrupt priority level. Some interrupts are always enabled, but some interrupts are not always enabled and you want to enable them only in specific situations. Therefore, there is an interrupt mask function that disables interrupt reception for each interrupt factor. The mask level bit is used for this. Interrupts that can be disabled with an interrupt mask are called masqueradable interrupts, and interrupts that cannot be disabled with an interrupt mask are called non-maskable interrupts (NMI). The priority is set to 15 by setting the interrupt mask level bits (I3 to I0) of the status register to a predetermined value (B'1111). Even if an interrupt occurs, the interrupt is not accepted unless the priority level exceeds the mask level of 15. Therefore, interrupts are substantially disabled at priority 15 immediately after reset (NMI interrupts have a priority of 16 and are exceptionally accepted). The BO bit is a bit indicating that a predetermined register has overflowed, and the CS bit is a bit indicating that a predetermined operation has overflowed. By setting them to 0, it becomes a normal state. The IBNR of the interrupt controller is a bank number register.

The above initial operation is provided in advance on the CPU side and is not described by a program.

Then, based on the initial value of the program counter fetched from the exception handling vector table, the program branches to the start address and the program execution is started.

In the case of an interrupt, etc., the program counter and status register are saved in the stack area by referring to the stack pointer, the address corresponding to the interrupt is extracted from the exception handling vector table, and the program is branched to that address to start program execution. To do. After that, the processing state becomes a program execution state in which the CPU sequentially executes the program.

The program is executed by reading the instruction from the start address. At this time, the memory (ROM, RAM) containing the program for initial startup is selected (CS0 described later is used when reading the start address. Enabled). This memory is an IC provided separately from the CPU. In addition to this memory, a similar memory may be provided, in which case chip select (CS) is used to distinguish between the plurality of memories. Programs and data can be read from memory with CS enabled. CS is generated by the bus state controller (BSC) built into the CPU. There are multiple outputs, and they are distinguished as CS0, CS1, CS2, and so on.

Immediately after the CPU starts operating, the CS space to which the external device is connected is enabled only for the CSO, which is premised on the device connection for starting the program, and the other CS spaces are disabled. Therefore, the memory connected to the CSO stores programs and data for enabling each CS space and performing various settings according to the relationship with the device connected to the space other than the CSO of the CPU. The CPU reads and executes the program and data to enable the memory connected to other CS1, CS2, .... The CSO space access setting at the time of initial startup is set so that the weight value etc. is the maximum and the access width etc. is the minimum so that it can correspond to any memory connected to CS0. This is a setting value that is likely to guarantee the minimum operation, and even if the memory connected to CS0 has low specifications, it is possible to read and write normally.

<Electrical structure of game machine: Command transmission from main board to sub board>
The sub-board 20 receives a command from the main board 10 and performs processing such as directing according to the command. The flow of commands is only one from the main board 10 to the sub board 20, and conversely, no command or the like is issued from the sub board 20 to the main board 10.

The sub-board 20 generates commands (display commands, drawing commands) for displaying a predetermined screen on the liquid crystal panels LCD1 and LCD2 in accordance with the commands from the main board 10. For example, when performing an effect by animation or the like, a large number of commands are continuously transmitted one after another.

In FIG. 3, 20CR is a command receiving unit that receives a command received from the main board 10. Specifically, the command receiving unit 20CR is realized by the CPU executing a program written in advance in the ROM mounted on the sub-board 20.

As the above command, there is one for performing an effect suggesting the winning content by the software on the sub-board 20 side. For example, as in the AT below, suggestions for obtaining balls are displayed on a display device such as a liquid crystal display device to provide convenience (assist) for the player's operation. The suggestion is not always given, but in certain cases. The sub-board is not limited to the form in which the AT is displayed (notified) based on the command from the main board. For example, the main board may display (notify) the AT by a display (notification means) under the control of the main board. The following description also applies to such forms.

The game machine includes an effect display device including a liquid crystal display device, a speaker, a display lamp, and the like. This effect display device is controlled by the sub-board 20, and the game machine notifies the player of a prize or the like, or presses a stop button in which a specific small winning combination wins a prize during a certain game in the so-called assist time (AT). It is intended to teach the user with some action. (Assist time (AT): Even if a specific small winning combination is won, there is no payout unless the player aligns the symbol combinations corresponding to this small winning combination on the winning judgment line. To ensure the payout by the small winning combination , After the end of the big bonus (or at the time of winning) or any other opportunity, the assist time is drawn, and if this is won, the symbol combination corresponding to a specific small role will be aligned on the winning judgment line for a certain period of time. A function that teaches the player the stop operation with some action)

The command receiving unit 20CR receives the command received from the main board 10. For example, a command received as serial data is input to a series-parallel converter (shift register) and output for each fixed data (for example, 8 bits). This output data is passed to the CPU of the sub-board 20 as a command, and is interpreted and executed.

<Electrical structure of game machine: Connection between sub-board and components such as slave board and LED>
The above-mentioned game machine is separated into a plurality of blocks such as the upper door block BU and the lower door block BL, and each can be independently incorporated or removed (separated housing). Some blocks, for example, the lower door block BL may be manufactured, shipped, and installed without being incorporated.

FIG. 5 is a block diagram showing a connection of a sub-board, a slave board (relay board), an effect device such as an LED, a solenoid, and a motor, and a sensor (photosensor, switch, etc.) according to the embodiment of the invention. FIG. 5 is a block diagram of FIG. 3 in which the connection system related to the effect device and the slave board is extracted. At least, the harnesses HBU and HBL for connecting the sub-board 20 and the slave boards 206BU and 206BL specify the data line on which the digital signal propagates and the timing for acquiring (latch) the digital signal, as shown in the lower left of FIG. A clock line to which a clock signal propagates is included, and the communication method between them is clock synchronous serial communication. In FIG. 5, the same or corresponding parts as those in FIG. 3 are designated by the same reference numerals.

Of the elements of FIG. 5, the slave boards 206BU and 206BL are realized by hardware such as ICs, but the I2C transmission / reception processing unit 207 and the transmission / reception processing unit 208 of the slave board 206BB are mounted on the ROM mounted therein. This is realized by the CPU executing a program written in advance. The transmission processing units 209T and 210T and the reception processing units 209R and 210R are realized by either hardware such as an IC or software.

In FIG. 5, the sub-board 20 is included in the upper door block BU, which is an example. For example, the sub-board 20 may be included in the lower door block BL, or may be provided separately from the model-specific block BB, the upper door block BU, and the lower door block BL.

In the gaming machine according to the embodiment of the present invention, I2C (Inter-Integrated Circuit) or clock synchronization is used as a control communication method from the sub-board 20 to the slave board (relay board) that controls the effect devices such as accessories and lights. The type serial communication is used. As the number of devices such as accessories and illuminations to be controlled increases, the sub-board is connected to the slave board by serial communication, and serial-parallel conversion (series-parallel conversion) is performed on each slave board. Each slave board is connected to a device such as an accessory or an illumination.

That is, in the gaming machine according to the embodiment of the invention, I2C is used as the communication method between the sub-board 20 and the model-specific block BB. Since the configuration of the electrical members of the model-specific block BB changes for each model, versatile bidirectional communication is adopted. Synchronous serial is used as the communication method between the sub-board 20 and the upper door block BU. Since the reel unit 203 is to be replaced at the same time as the reel unit 203 is replaced, a harness HBU dedicated to the upper door block BU is provided. Synchronous serial is used as the communication method between the sub-board 20 and the lower door block BL. Since it is a remaining common part, it is equipped with a harness HBL dedicated to the lower door block BL.

The BB is a model-specific block unique to each model of the game machine. BL is a lower door block (first block) commonly used in each housing. The BU is a replaceable upper door block (second block).

The model-specific block BB, the lower door block BL, and the upper door block BU include a slave board (model-specific relay board) 206BB, a slave board (first relay board) 206BL, and a slave board (second relay board) 206BU, respectively. The slave board 206BB has a built-in CPU, and is more flexible and advanced processing than the slave boards 206BL and BU (for example, the address of the slave board 206BB is predetermined, it is determined whether the received message is addressed to oneself, and if it is addressed to oneself, it is determined. (Request to the sub-board 20 to that effect when transmitting data) is possible. The slave boards 206BL and BU have a predetermined communication procedure with the communication partner (transmission processing units 209T, 210T, reception processing units 209R, 210R of the sub-board 20), and do not require flexibility. .. Therefore, the slave boards 206BL and BU can be configured by the dedicated IC.

J11 is a model-specific input / output end of the sub-board 20. This includes one data line and one clock line (same for other terminals).

J21 and J22 are the first output terminals, and J31 is the first input end. J41 and J42 are the second output ends, and J51 is the second input end.

In the harness (model-specific harness) HBB, the model-specific input / output end J11 is connected to the slave board 206BB.

The harness HBL connects the first output ends J21, J22 and the first input end J31 to the slave board 206BL.

The harness HBU connects the second output ends J41 and J42 and the second input end J51 to the slave board 206BU.

The transmission processing unit 209T generates a serial signal to be transmitted from the first output terminals J21 and J21 to the slave board 206BL.

The reception processing unit 209R converts the serial signal received from the slave board 206BL at the first input terminal J31 into a parallel signal. The converted parallel signal undergoes a predetermined process on the sub-board 20.

The transmission processing unit 210T generates a serial signal to be transmitted from the second output terminals J41 and J42 to the slave board 206BU.

The reception processing unit 210R converts the serial signal received from the slave board 206BU at the second input terminal J51 into a parallel signal. The converted parallel signal undergoes a predetermined process on the sub-board 20.

The transmission / reception processing unit 208 of the slave board 206BB performs reception processing and transmission processing according to the address from the I2C transmission / reception processing unit 207. Although only one slave board 206BB is shown in FIG. 5, a plurality of slave boards 206BB can be connected to the same harness HBB (including the signal line branched from the slave board 206BB). An address is used to identify the slave board 206BB.

FIG. 6 is an explanatory diagram of slave boards 206BB, 206BL, and 206BU.

The slave boards 206BL, 206BU, and 206BB for driving the LED are provided with the LED driver IC01. The LED driver IC01 receives a serial signal and a clock from the sub-board 20, acquires data from the serial signal based on the clock, and based on the decoding result of this data, a plurality of connected LEDs 202L, 202U, and 202B are connected in a predetermined pattern. Make it blink. For example, a specific LED is turned on and the duty ratio is set to a predetermined value to adjust the brightness.

The slave boards 206BL and 206BU that drive the motor include a motor control circuit IC02. The motor control circuit IC02 receives a serial signal and a clock from the sub-board 20, acquires data from the serial signal based on the clock, and excites the windings of the connected motor in a predetermined pattern based on the decoding result of this data. .. For example, the windings are sequentially excited to rotate the motor, and the rotation speed is adjusted by changing the excitation frequency. A motor driver DRV for passing a current required for driving the motor through the winding is connected to the output of the motor control circuit IC02.

The slave boards 206BL and 206BU including the sensor (switch) include a parallel-series converter IC3 for converting the input signals of a plurality of sensors from parallel to series. The parallel-series converter IC3 receives a clock from the sub-board 20. The parallel-series converter IC3 takes in the outputs of a plurality of sensors at predetermined intervals, converts the sensor data into a serial signal based on the clock, and sends it to the sub-board 20. This serial data is received by the reception processing units 209R and 210R of the sub-board 20, performs serial-parallel conversion, and is passed to the CPU of the sub-board 20.

<Initial setting when executing a program: Disable interrupts>
The CPU starts executing the program by canceling the reset after the power is turned on, but as described in <Electrical structure of the game machine: Outline of initial operation of the CPU on the sub-board>, when the reset is released, the CPU is inside the CPU. Interrupts are disabled. In this state, a predetermined program (program A in FIG. 7, hereinafter may be referred to as “start program”) is executed first. This start program is stored in the address set by the initial operation of the CPU, and is usually executed only when the reset is released.

However, it is conceivable to jump to the address of the starting program due to factors such as noise. If the start program is executed when the reset is released, the interrupt is disabled at the time of execution, but if the jump is exceptionally made to the address of the start program, the initial operation of the CPU is not performed and the interrupt is enabled. is there. If the process is executed with interrupts enabled, there is a high possibility that the restart process by the starting program will not be performed normally. When an interrupt occurs, the CPU refers to the stack pointer, saves the program counter and status register to the stack area, extracts the start address corresponding to the interrupt from the predetermined table, branches to that address, and executes the program. It starts, but during the initial setting, the initial setting for executing the branch destination program is not made, so normal operation may not be possible. For example, when the start program is executed without resetting for some reason such as cheating, the cheating person gives an interrupt signal to the CPU to perform interrupt processing, which is convenient for himself. It is also conceivable to perform operations (change of setting value, setting of winning flag, rewriting of table, etc.). After reset, interrupts are prohibited, so there is no problem, but it is a problem when the start program is started illegally.

In order to avoid such a situation, in the embodiment of the present invention, in the gaming machine provided with the CPU that performs a predetermined initial operation as the operation of the CPU itself at the time of reset release and invalidates the interrupt, the start program side (for example, after reset) Disable interrupts (in the first process of and the execution of an unintended start program), and then execute the process.

FIG. 7 is an explanatory diagram of program execution by the CPU according to the embodiment of the invention.

Upon receiving the power-on reset signal RST (low level signal) at the power-on reset terminal, the CPU performs a predetermined initial setting INI (initial setting by the CPU itself, initial setting INI of the CPU is schematically shown in FIG. 7). Shown as one unit). Initial setting by the CPU itself The internal state of the CPU and all the registers of the built-in peripheral modules are initialized by the INI. In the initial setting INI by the CPU itself, the CPU operates as follows.

1. 1. The initial value (start address) of the program counter (PC) is fetched from the exception handling vector table.

2. 2. The initial value of the stack pointer (SP) is fetched from the exception handling vector table.

3. 3. Clear the vector base register (VBR) to H'00000000, initialize the interrupt mask level bits (I3 to I0) of the status register (SR) to H'F (B'1111), and initialize the BO bit and CS bit to 0. To do. It also initializes the interrupt controller (INTC). By setting in this way, interrupts are disabled.

4. Set the values retrieved from the exception handling vector table to the program counter (PC) and stack pointer (SP), respectively, and start program execution. In FIG. 7, the program jumps to the first address 0000 of the program A.

The program counter is a counter that indicates the position of the program to be executed.

The exception handling vector table is a table that stores the values set in the program counter and the stack pointer in exception handling such as reset. The contents of the exception handling vector table are preset.

The stack is a storage area (register) used to temporarily hold information, and the stack pointer is a register that points to the last address in the stack of addresses.

The vector base register is one of the control registers and is used as the base address (program jump destination) of the exception handling vector area including interrupts. When an exception or interrupt occurs, it is referenced as the base address of the branch destination.

The status register is one of the control registers, and its contents indicate the state of the CPU.

The interrupt controller is for determining the priority of interrupts.

The mask level bit sets the interrupt priority level. Some interrupts are always enabled, but some interrupts are not always enabled and you want to enable them only in specific situations. Therefore, there is an interrupt mask function that disables interrupt reception for each interrupt factor. The mask level bit is used for this. Interrupts that can be disabled with an interrupt mask are called masqueradable interrupts, and interrupts that cannot be disabled with an interrupt mask are called non-maskable interrupts (NMI). The priority is set to 15 by setting the interrupt mask level bits (I3 to I0) of the status register to a predetermined value (B'1111). Even if an interrupt occurs, the interrupt is not accepted unless the priority level exceeds the mask level of 15. Therefore, interrupts are substantially disabled at priority 15 immediately after reset (NMI interrupts have a priority of 16 and are exceptionally accepted).

The BO bit is a bit indicating that a predetermined register has overflowed, and the CS bit is a bit indicating that a predetermined operation has overflowed. By setting them to 0, it becomes a normal state.

By initializing the interrupt controller (INTC), exceptional acceptance of interrupts will not be performed.

In FIG. 7, it is assumed that the program counter is set to, for example, 0000 by the initial setting INI by the CPU itself (arrow from the CPU to the upper right). In addition, in FIG. 7, it is assumed that the jump may be unintentionally jumped to 0000 (arrow from the top of the ROM to the lower left).

The programs A, B, C, ... Are stored in the storage unit (ROM). Program A (reference numeral Program A in FIG. 7) is the first program (start program) to be executed after reset. In FIG. 7, the start address is 0000. Programs B, C, ... Are arbitrary programs such as a production program.

The program A (start program) includes an initial setting program P-INI that performs the same processing as the initial operation performed by the CPU. Initial setting The instruction (initial setting instruction) of the program P-INI performs initial setting of registers that may affect the execution of programs A, B, C, ... (At least program A). For example, the following processing is performed.

a. Set the start address (H'00000000) of the exception handling vector table in the vector base register (VBR).

b. Set all interrupt mask level bits (I3 to I0) in the status register (SR) (H'F (B'1111)) (interrupt disabled state).

c. Initialize the interrupt controller (INTC).

After the above processing, programs A, B, C, ... Are executed.

By including the process of performing a predetermined initial setting (at least b above) in the program A (start program) executed by the reset, even if the start program is unintentionally started due to factors such as noise, The process can be performed normally. The legitimacy of executing the start program is maintained.

If the start program does not have the initial setting P-INI, when the start program is started unintentionally, the processing is interrupted by an interrupt, and the result of the start program execution may not be normal.

When the program A (start program) includes a plurality of processes, it is desirable that the instruction of the initial setting P-INI is placed at the beginning of the program A. In FIG. 8, the initial setting P-INI is arranged before the other processes a (P-a) to c (P-c). In irregular cases, interrupts cannot be disabled before the initial setting P-INI is completed, but by doing so, the period for accepting interrupts can be shortened and the possibility of normal operation can be increased. The initial setting P-INI may be executed before other processes, and may not be directly arranged at the start address (0000 in FIG. 7).

<Initial setting when executing a program: Bus state controller setting>
The CPU reads data from the memory and writes the data to the writable memory. When reading and writing, specify the memory address (address, position) and do this. In order to effectively use the address space that can be used by the CPU, the CPU has a built-in bus state controller (see FIG. 9). The address space (CS space) that can be used by the CPU is large, and it is usually covered by multiple memory ICs (sometimes referred to as devices). The bus state controller optimally manages multiple memories. For example, do the following:

Divide the address space into a maximum of 8 (areas CS0 to CS7), and allocate a maximum of 64MB to each.

Each area has its own access width, such as bus size (8, 16, 32 bits), cycle weight function (maximum 255 weights) for adjusting timing to slow devices, and weight control for setting timing. Set the value etc.

Since the memory connected to the CPU and how many are connected differ depending on the model, make initial settings when executing the program (initial settings by program, initial settings P-INI2 in Fig. 9). This performs a process different from the initial setting P-INI of FIG. 7), and sets the bus state controller optimally for the model (reference numeral AA of FIG. 9). The initial setting process of the bus state controller (initial setting process by the program) is included in, for example, the program A (start program) of FIG.

The processing of the initial setting P-INI2 for appropriately connecting to the CS space in the initialization of the bus state controller will be described with reference to FIGS. 10 to 12.

FIG. 10 shows the default state. It shows the correspondence between devices such as control ROMs connected to the CPU and the address spaces CS0 to CS7 assigned to each, and the distinction between CS valid / invalid at reset. On the other hand, FIG. 12 shows the setting after the initial setting. In the description of FIGS. 9 to 12, the device refers to an IC connected to a CPU such as a memory IC such as a ROM or RAM, an I / O IC such as a port, or a controller IC such as a VDP, and managed in an address space.

As shown in FIG. 10, immediately after the start of CPU operation, the setting of the CS space to which the external device is connected is the device connection for program startup (in the example of FIG. 10, the control ROM is connected) by the initial setting by the CPU itself. ) Is valid only for CSOs, and other CS spaces are disabled. A control ROM connected to the CSO (indicated as CS0, address 0000 in FIG. 9) to perform initial settings (programmatic initial settings) for connecting to devices other than CS0 enabled by the initial settings by the CPU itself. The device) stores a program and data for enabling each CS space and performing various settings according to the relationship with the device connected to the space other than the CSO of the CPU (see FIG. 12).

In FIG. 12, the CS is valid for the device used during the operation of the game machine. The weight value is indicated by a code such as W0, which is determined for each device according to its hardware performance. For example, the higher the read / write speed, the smaller the weight value, which enables higher speed operation (the weight corresponds to the time that the CPU waits according to the speed of the device). The access width is indicated by a code such as B0, which corresponds to the bus size (8, 16, 32 bits) for each device. For example, if the bus size of the control ROM is large, B0 is set to 32 bits, and a large amount of data can be read and written at one time, which enables higher speed operation. The initial setting P-INI2 of FIG. 9 includes a table as shown in FIG. 12 in which the optimum setting is performed for each device in this way.

As described in the above <Electrical structure of the game machine: Outline of initial operation of the CPU on the sub-board>, interrupts are disabled inside the CPU when the reset is released due to the initial setting by the CPU itself. However, similarly, the bus state controller is also set to a predetermined state, and as shown in FIG. 10, for example, only CS0 is valid, the weight value is the maximum, and the access width is the minimum. This setting is compatible with any device and is therefore likely to guarantee minimal operation. For example, even a device with a narrow access width and a low speed can be accessed.

In this state, program A (start program) is executed first. This start program is stored in the address set by the initial setting by the CPU itself, and is executed only when the reset is released.

Initial setting of program A (start program) P-INI2 (initial setting by program) is processed by the procedure as shown in FIG. 11 (procedure of bus state controller: (CS0) to (CS6)) as shown in FIG. Set to so that the CPU can properly connect to the CS space.

(CS0) CS0 is enabled in the default state, but the parameters such as the weight value and access width are the settings that are likely to guarantee the minimum operation as described above, and actually connect. It is not commensurate with the performance of the control ROM being used. Therefore, first, the setting value of the CS0 space corresponding to the control ROM is changed to the optimum value. For example, the weight value is set to W0 and the access width is set to B0 based on the table of FIG. In this way, after adjusting the performance of the CSO space to the maximum and improving the execution speed of the program A, the settings for other CS spaces are made.

(CS1) Enable the CS1 space corresponding to the latter half of the control ROM, and change the setting value of the CS1 space corresponding to the control ROM to the optimum value. For example, the weight value is set to W0 and the access width is set to B0 based on the table of FIG.

(CS7) The CS7 space corresponding to the control register of VDP (liquid crystal panel controller) is enabled, and the setting value of the corresponding CS7 space is changed to the optimum value. For example, the weight value is set to W7 and the access width is set to B7 based on the table of FIG.

(CS2) Enable the CS2 space corresponding to the backup RAM, and change the setting value of the corresponding CS2 space to the optimum value. For example, the weight value is set to W2 and the access width is set to B2 based on the table of FIG.

(CS3) Enable the CS3 space corresponding to the device control port, and change the setting value of the corresponding CS3 space to the optimum value. For example, the weight value is set to W3 and the access width is set to B3 based on the table of FIG.

(CS6) The CS6 space corresponding to DRAM and VRAM is enabled, and the set value of the corresponding CS6 space is changed to the optimum value. For example, the weight value is set to W6 and the access width is set to B6 based on the table of FIG.

It is sufficient that the activation and setting of the CS space have already been completed when access to the space is required, and all of the above processes (processes CS0 to CS7 in FIG. 11) are initially set to P-INI2. You don't have to do it in. For example, if only CS0, CS1 and CS7 are valid (the control ROM and VDP control register can be read and written), the VDP control program that can be processed is started after the above (CS1), and then (CS2) is performed. May be good. In this case, the above (CS2) to (CS6) should be removed from the initial setting P-INI2, and they should be performed after the VDP control program.

Regarding CS4 used for debugging etc., in order to avoid malfunctions such as noise, it may be disabled if it is not used and enabled if necessary. In FIG. 12, CS4 is disabled (the dotted line in the (CS4) debug port in FIG. 11 indicates that it is normally disabled). To enable the debug port, do (CS4) after (CS3) above.

Although it is invalid in FIGS. 11 and 12, (CS4) will be described. Enable the CS4 space corresponding to the debug port and change the setting value of the corresponding CS4 space to the optimum value. For example, the weight value is set to W4 and the access width is set to B4 based on the table of FIG.

According to the embodiment of the invention, it is possible to appropriately refer to the corresponding device by appropriately setting the CS space before using each device by the initial setting by the program.

<Initial setting when executing a program: Setting of CS0 space to store the start program>
The control ROM that stores the programs that control the CPU (for example, the instructions and data for performing the initial settings P-INI and P-INI2 shown in FIGS. 7 and 9) must be read and written reliably. It doesn't become. For that purpose, the setting of the bus controller must be a value that can reliably fetch the data of the control ROM.

By the way, there are various types of ICs that can be used as control ROMs. From a memory that is expensive and has high performance, that is, a high read speed, and therefore can have a small weight value and a large access width, it cannot be used unless it is inexpensive but has a low read speed, a large weight value, and a small access width. There are various types of memory. It is preferable that the parts used when designing the game machine are not only low in cost but also versatile and easily available. If the CPU of the game machine can support a wide range of speeds from high speed to low speed, the choices of usable devices (memory) will increase.

From this point of view, in the embodiment of the invention, the initial setting INI (initial setting by the CPU itself) of the CPU after reset increases the weight value within the range allowed by the CPU and increases the access width. It shall be set small. By doing so, it is possible to expand the options of the device (memory) used as the control ROM in the CS0 space.

FIG. 13 shows a setting example of the initial setting INI. The initial setting INI of the CPU after reset enables the address space CS0 to which the control ROM is connected for the bus state controller setting, the weight value is Wint (predetermined weight value), and the access width is Bint (predetermined). Access width). Wint has a large weight value (for example, maximum value) within the range allowed by the CPU, and Bint has a similarly small access width (for example, minimum value). For example, when the weight value is represented by 8 bits, Wint = 255 and Bint = 8 bits.

After that, the performance of the entire system can be improved by allowing the bus state controller setting to be switched to an arbitrary value using a program (for example, the initial setting P-INI2).

The weight value Wint and the access width Bint are changed to W0 and the access width B0 for the CS0 space, for example, as shown in FIG. Assuming that the performance of the device used as the control ROM is sufficiently high, W0 has a small weight value (for example, the minimum value) within the range allowed by the CPU, and B0 has the same large access width (for example, the maximum value). is there. W0 <Wint, B0> Bint. For example, when WO = 38, 38 <255, and when BO = 32 bits, 32 bits> 8 bits. Alternatively, the WO is made as small as possible and the BO is made as large as possible within the performance range of the device used as the control ROM. The weight value is set to 255 because it may be written during debugging. Since writing to ROM is performed using tall during debugging, the maximum value is set to 255 to ensure writing. On the other hand, when shipping to the market, the minimum value is set to 0 so that the ROM cannot be written (the signal line for writing is cut off just in case).

According to embodiments of the invention, the choice of ROM for storing the starting program can be increased. The device for storing the start program is not limited to the ROM, and the embodiment of the invention can be applied to a RAM (for example, a power-backed SRAM or a backup RAM).

In addition, the performance of the gaming machine can be improved by setting the bus state controller so that the performance of the device connected to the CPU is fully exhibited by the initial setting P-INI2.

A modified example according to the embodiment of the invention will be described with reference to FIGS. 14 and 15.

In FIG. 13, the setting contents of the bus state controller are included in the initial setting P-INI2 of the start program, but this may be stored separately from the control ROM. In this case, the identification information that identifies the type and model of the device is prepared in the initial setting P-INI2, and the CPU reads the identification information, and based on this, reads the setting contents of the bus state controller and performs the setting.

FIG. 14 shows an outline of the operation. It is equipped with an initial setting table INI-T that stores the setting contents for each device in advance. This includes the weight value and access width corresponding to the device identification information of FIG. After the reset, the CPU accesses the initial setting P-INI2 of the control ROM and reads the identification information. The CPU accesses the initial setting table INI-T, reads out the setting corresponding to the device identification information, and sets the setting. The initial setting table INI-T may be built in the CPU as shown by the dotted line in FIG.

FIG. 15A shows an example of the identification information of the initial setting P-INI2. Identification information (ROMinfo, etc.) is stored in advance for each connected device. The identification information is, for example, specific information (data) such as an allowable weight value and an access width, but may be information (data) of a manufacturer and a model number. Based on this, the setting contents are read from the initial setting table INI-T, and the bus state controller is set.

FIG. 15B shows an example of the initialization table INI-T. Setting information such as weight value and access width is stored for each identification information. In the example of the figure, CS valid / invalid information is also stored for each identification information. The CPU reads the setting information from the initial setting table INI-T based on the identification information read from the initial setting P-INI2, and sets the bus state controller based on this.

This modification also improves the performance of the gaming machine by increasing the choice of ROM for storing the start program and setting the bus state controller so as to fully demonstrate the performance of the device connected to the CPU. be able to.

In this modification, the setting contents of the bus state controller are stored in a memory provided separately from the control ROM, so that the area consumed for the initial setting of the control ROM can be reduced and other programs can be stored accordingly. Become.

<Adjusting the reset release timing at the time of initial setting>
The initial setting of the CPU itself and the initial setting based on the start program are performed by the power-on reset. At that time, devices such as LED drivers, motor drivers, and sound amplifiers other than the CPU mounted on the sub-board 20 ( The block) is also reset. The LED driver, motor driver, sound amplifier, etc. may include devices such as a plurality of ICs, and in this section, the LED driver, the motor driver, the sound amplifier, etc. are referred to as blocks including the case where the devices include a plurality of devices. Blocks are the same as devices in terms of functionality and performance. It is possible to reset the target block (LED driver, motor driver, sound amplifier, etc.) by sending a reset signal from the CPU. The reset can be performed individually for each block. The logic of these reset signals at the time of starting the board is predetermined. Power-on reset shifts all blocks to the reset state, and then releases the reset.

Blocks such as the CPU, LED driver, motor driver, and sound amplifier of the sub-board 20 receive current from a common power supply unit. The power supply unit is designed so that its capacity supplies a sufficient current to the CPU and the block, and the power supply unit usually does not overload. However, when the reset is released, a larger amount of current may temporarily flow, which may exceed the rating of the power supply unit, that is, the required current may exceed the value that can be supplied. Recent game machines are equipped with more drive units and light emitting elements, and the risk of this is increasing. Since the power supply unit is equipped with a safety device that stops its operation when the rating is exceeded, it may operate and the game machine may stop. This should be avoided.

The power system of the game machine will be described with reference to FIG. FIG. 16 is a power system diagram of this game machine. In the figure, the same or corresponding parts as those in FIG. 3 are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 205 denotes a power supply unit that supplies a current to at least the main board 10, the sub board 20, and the peripheral boards connected to the sub board 20.

Reference numeral 20521 is a rectifying unit that receives an AC power source (AC input) connected to the game machine and rectifies it. The rectifying unit 2051 is unnecessary when receiving a DC power source instead of an AC power source from the outside. That is, the power supply from the outside of the game machine may be either AC or DC.

Reference numeral 2052 is an AC-DC converter (first power supply unit) that converts a rectified power supply into a smooth direct current of 24 V (first voltage). The AC-DC converter 2052 has a built-in overcurrent protection circuit 2052a. This cuts off or reduces the output when a current exceeding the rated or upper limit value is output, or when a current exceeding the upper limit value is input from the rectifying unit 2051 (overcurrent detection limiter function). The overcurrent protection circuit 2052a prevents an excessive load from being applied to the AC-DC converter 2052 for a certain period of time or longer, and protects the AC-DC converter 2052 from destruction.

Reference numeral 2053 is a DC-DC converter (second power supply unit) that converts a 24V power supply output by the AC-DC converter 2052 into 12V (second voltage).

The 20SA is a sound amplifier (sound signal generator) that drives speakers (sound generators) SPL and SP to output sound signals for generating sound. The sound amplifier 20SA is provided with a memory (storage unit) (not shown), and acoustic data is stored in the memory (acoustic data storage unit) in advance. Based on this data, the sound amplifier 20SA generates an acoustic signal.

The 20MD is a motor driver that generates a drive signal for driving the motors ML and MU.

The 20LD is an LED driver that generates a light emitting signal for blinking the LEDs 202B, 202L, and 202U.

The 20CNV is a DC-DC converter that generates a 5V power supply for the LED driver 20LD.

As can be seen from FIG. 16, the CPU and each block receive current supply from a common AC-DC converter 2052. Therefore, if the reset release is performed for each block all at once, the rating of the AC-DC converter 2052 may be exceeded due to a temporary larger current flowing during the reset release as described above, and the overcurrent protection circuit 2052a may operate. is there.

Therefore, in the embodiment of the invention, the current value does not exceed the rating of the AC-DC converter 2052 by shifting the timing of the reset signal given from the CPU to each block to change the reset release timing.

Depending on the initial setting of the start program, the CPU performs, for example, the process shown in FIG. An example of a timing chart for resetting by this process is shown in FIG.

S100: The CPU shifts a plurality of blocks such as the LED driver 20LD, the motor driver 20MD, and the sound amplifier 20SA to the reset state. Specifically, the reset signal from the CPU is input to the reset terminal of each block.

S101: The CPU performs time counting at a predetermined time. Wait for the time.

S102: The CPU releases the reset state of a predetermined block (for example, the LED driver 20LD) after the timing is completed. Specifically, the input of the reset signal to the reset terminal is stopped. In the example of FIG. 18, the reset is released at time tr1.

S103: The CPU performs time counting at a predetermined time. Wait for the time.

S104: The CPU releases the reset state of another block (for example, the motor driver 20MD) after the timing is completed. Specifically, the input of the reset signal to the reset terminal is stopped. In the example of FIG. 18, the reset is released at time tr2.

S105: The CPU performs time counting at a predetermined time. Wait for the time.

S106: The CPU releases the reset state of the remaining blocks (sound amplifier 20SA) after the timing is completed. Specifically, the input of the reset signal to the reset terminal is stopped. In the example of FIG. 18, the reset is released at time tr3.

As can be seen from FIG. 18, the timing of resetting all the blocks is the same (time tr0), but the timings of releasing them are all different (tr1, tr2, tr3). Therefore, a relatively large current consumption at the time of reset release does not flow at the same time. According to the embodiment of the invention, the inrush current can be dispersed by making the reset release timing of each block different, and the operation of the game machine is not hindered.

When there are a plurality of blocks, the reset release order may be as follows, for example.

(Order: Part 1)
Release the reset from the one with the largest current consumption (power). A block with a large current consumption (power) is considered to have a large inrush current. Based on this, if the reset of the maximum current (power) block is released first, the inrush current at that time is large, but the other blocks are not supplied with current and there is a margin, and the overcurrent protection circuit 2052a Is unlikely to work. It is expected that the possibility that the overcurrent protection circuit 2052a will operate can be reduced by releasing the reset in order from the one with the largest current consumption (power).

(Order: Part 2)
When the current is supplied from the common AC-DC converter 2052 as shown in FIG. 16 and the voltage is lowered to use the power supply for each block, the block receiving the current directly from the common power supply (converter) (FIG. 16). Then, the sound amplifier 20SA) is first released from the reset, then the block that receives the current supply from the converter that receives the current supply directly from the common power supply (motor driver 20MD in FIG. 16), and then the current from this converter. The reset is released in the order of the block receiving the current supply from the converter receiving the supply (LED driver 20LD in FIG. 16). Since the inrush current of the block that receives the current supply directly from the common power supply directly affects the common power supply, it is expected that the reset should be released first when there is a margin. When the converters are connected in series as shown in FIG. 16, it is expected that the influence of the inrush current on the common power supply can be reduced by releasing the reset in the order of connection (the order from the center to the end) ( A capacitor (not shown) may be provided inside each converter, which can reduce the inrush current to some extent).

<Maintaining the initial settings in the event of a malfunction>
In the initial settings described above, the address space CS3 is assigned to the device control port (see FIG. 12). The device control port is a port for holding and outputting a control signal for controlling the device, and the device control signal is an important signal that determines the operation of the device.

A specific circuit is shown in FIG. 19 (a). A control port for switching between a signal for controlling the liquid crystal panel and a 5V signal (high-level signal) supplied to an external device (a device outside the sub-board 20) is connected to the address space CS3. Since the CPU did not have a sufficient number of pins for I / O ports, a dedicated IC (latch in FIG. 19) was connected to the address space CS3, and the above signal was connected to this IC (latch). , The external device is controlled by setting the port.

As can be seen from FIG. 19A, there is no circuit that reads out the output of the IC (latch) and feeds it back to the CPU, and the signal is written only to the IC (latch).

The problem here is that when the output of the IC (latch) changes unintentionally due to the influence of noise or the like, it cannot be detected. Therefore, it is not possible to correct that an unintended signal is output, which may adversely affect the operation of the game machine.

Therefore, in the embodiment of the invention, with respect to an IC such as the latch shown in FIG. 19A, which determines the operation mode by setting data, regardless of whether the operation is normal or abnormal. Writing is repeated at a predetermined timing. That is, the data of the same value as the optimum value at the time of initial setting is continuously written. In other words, the initial settings are repeated. For example, as shown in FIG. 19B, the CPU gives a write signal to the latch at Tw intervals. Although not shown, when a write signal is generated, the CPU prepares a latch input signal (initial setting signal, a signal for controlling a liquid crystal panel in the above example, and a 5V signal supplied to an external device) and latches. Is supplying to. The Tw interval is an example, and the interval may be different each time.

According to the embodiment of the invention, even if the content held by the latch changes unintentionally due to some external factor such as static electricity or radio waves, it can be restored to the normal state by repeating the initial setting. it can.

By shortening the repetition interval of the initial setting, even if the content held by the latch changes unintentionally, it can be restored to a level that does not hinder the game. In the embodiment of the invention, since it is not necessary to determine the normality or abnormality of the IC (latch) to be controlled, it is not necessary to provide additional circuits and wiring, and the cost is low. The load on the program is also small (processing for abnormality detection can be omitted).

Although the above description has been made by taking a slot machine as an example, the embodiment of the present invention can be applied to other gaming machines such as pachinko machines.

A brief description of the pachinko machine (ball game machine) will be added with reference to FIGS. 20, 21 and 22. The pachinko machine includes an outer frame 50, a main body member 51, and an opening frame door 52 as main members. The opening frame door 52 is provided with a transparent plate member made of glass or resin at the opening, and an illumination (not shown), a speaker 52b, a door 53 with a ball tray, and the like are attached around the opening.

The game board 10B is detachably attached to the main body member 51 by using a predetermined fixing member so as to face the space portion of the main body member 51. The board surface 11 of the game board 10B is a rectangular board surface including a guide rail 12 and an discharge port (out port) 13 for guiding a game ball that has fallen in a substantially circular game area defined by the guide rail 12 to the outside. An out-ball sensor 13S is provided inside the discharge port 13 (FIG. 21).

As shown in FIG. 21, the board surface 11 has a variable display device (center accessory) 30a, a through chucker 30b, and a normal winning device (center accessory) 30a having one or a plurality of variable display units such as an effect display lamp and an LCD (liquid crystal display). It includes a start chucker (starting winning device) 30d having a starting winning opening, and attackers 30c and 30e having a large winning opening (not shown). Ball passage detectors 20b, 20c, 20d, 20e are provided inside the 30b, 30c, 30d, and 30e.

The board surface 11 is provided with a winning device 30, obstacles such as nails and windmills (not shown), and decorative members having various designs to enhance the interest.

FIG. 22 is a functional block diagram of the gaming machine according to the embodiment of the present invention.

Although not shown, the main control device (main board) 101 and the sub control device (sub board) 200 are mainly composed of a CPU and include a ROM, RAM, I / O, and the like. Then, when the CPU reads the program stored in the ROM, it operates as described below.

Reference numeral 100 denotes a main control device that performs processing related to the game. The main control device 101 performs electrical game control processing and generates main processing information. The main control device 101 receives the signals of the ball passage detectors 20b to 20d that move (flow) the game area and detect the winning balls that have passed through the winning devices 30b to 30d, respectively, and the winning balls of the winning devices 30b to 30d are input. Lottery / judgment will be made according to the passage.

1110 acquires a random number based on the detection that the game ball has passed through the start chucker (start winning opening) 30d (to be exact, detected by the sensor 20d provided inside the game ball). It is a department. The random number acquisition unit 1110 includes one or both of a hard random number generator 1120 including a counter and a soft random number generator 1130 operated by a program.

Reference numeral 1210 is a symbol variation control unit that causes the special symbol display device 119 to variably display the symbol based on the random number acquired by the random number acquisition unit 1110.

Reference numeral 1310 is a special game control unit. The special game control unit 1310 stops and displays the symbols constituting the preset award mode on the special symbol display device 119 on the condition that the random number acquired by the random number acquisition unit 1110 is a winning random number (big hit). After that, the player is made to perform a special game that is advantageous.

Reference numeral 1410 is a probability variation game control unit. After the special game by the special game control unit 1310 is completed, the probability variation game control unit 1410 causes the random number acquisition unit 1110 to perform a probability variation game that increases the possibility of acquiring a winning random number. The variable display symbol is stopped and displayed with a symbol that is out of alignment or a big hit based on the random number acquired by the random number acquisition unit 1110 after a predetermined time.

The 1510 is extracted based on the fact that when the game ball passes through the start chucker (starting winning device) 30d while the special symbol display device 119 is displaying the symbol in a variable manner, the game ball has passed up to a predetermined number. It is a hold processing unit that stores the random numbers that have been generated and enables the variable display of the symbol to be performed based on the stored random numbers after the variable display of the symbol is completed.

Reference numeral 1610 is a look-ahead processing unit. The look-ahead processing unit 1610 determines for each reserved ball whether or not they are related to a jackpot. At the timing of extracting the random number of the starting prize, the random number which is the stored content of the reserved sphere is tentatively determined (look-ahead), and the result is sent to the sub-control device 200.

110a is a payout for paying out a predetermined number of game balls according to the game ball winning of the winning devices 30c to 30e and the ordinary winning device (not shown) and / or the result of the lottery / judgment by this as the game profit. It is a control device.

Reference numeral 110b is a payout control board for controlling the payout control device 110a.

119 is a special symbol display device which is a display device (for example, a 7-segment display) provided in the status display device 141.

Reference numeral 130 denotes a normal symbol display device which is a display device (for example, a 7-segment display) provided in the status display device 141.

Reference numeral 141 denotes a state display device provided on the board surface of the game machine so that the player can see it. The status display device 141 includes a round number display unit 150 for displaying the number of rounds and a hold number display unit 160 for displaying the hold number. The hold number display unit 160 is arranged on the game board and displays the hold ball during the variable display of the symbol.

Reference numeral 200 denotes a sub-control device that obtains processing information generated by the main control device 101 to perform control for performing predetermined output mode processing including effects such as driving a movable body, blinking light, and generating sound. ..

Reference numeral 2100 is an effect symbol control unit that controls the image display device 210 to display an image related to the effect, an image related to the game state, a current game state, an error display, a hold display, and the like. During the fluctuation of the special symbol display device 119, the fluctuation is stopped from the fluctuation display in synchronization with the special symbol display device 119.

Reference numeral 2200 is an accessory driving unit for controlling the movable body 220 provided on the game board 10B.

Reference numeral 2300 is a lamp control unit for controlling lighting of the lamp / illumination 230 provided on the game board 10B, the variable display device 30a, the game machine housing, or the like.

Reference numeral 2400 is a sound control unit that controls the sound generator 240.

Reference numeral 2500 denotes a pre-reading effect processing unit that performs an effect related to pre-reading based on the determination result from the pre-reading processing unit 1610. For example, by making the display corresponding to the holding ball corresponding to the hit of the image display device 210 (such as the emission color of the holding ball display) different from other ones, it is suggested that the holding ball is likely to be hit. Or, notify that it is a hit.

Reference numeral 2600 is a specific effect processing unit that performs processing related to the specific effect, which is an effect unrelated to the gaming state of the main control device 101, based on the output (time signal) of the real-time clock 2700. For example, at every hour on the hour or at a predetermined time, a predetermined musical piece is played independently of the game state, and the video image is displayed on the image display device 210.

The 2700 is a real-time clock that outputs a time signal.

Reference numeral 210 denotes an image display device such as a liquid crystal display (LCD).

220 is a movable body. The movable body 220, for example, moves back and forth between a normal state and a state different from the normal state. The movable body is, for example, a flat plate shape, a columnar shape, a disk shape, a gear shape having irregularities, or the like. Although not shown, a power unit for driving the movable body 220 is provided.

The image display device 210 and the movable body 220 are provided in the variable display device (center accessory) 30a.

Reference numeral 230 denotes a lamp / illumination including a light emitting element.

Reference numeral 240 denotes a sound generator. The sound generator 240 includes a speaker 52b and a sound processor (not shown) that generates a drive signal for the speaker 52b based on a signal from the sound control unit 2400 of the sub-control device 200.

The sub-control device 200 of FIG. 22 corresponds to the sub-board 20 of FIG. 3, and the CPU and ROM of the sub-control device 200 correspond to the CPU and ROM of the sub-board 20 of FIG. The ROM of the sub-control device 200 stores in advance a start program for performing initial settings. This start program includes the table of FIG. 12 and includes its contents and instructions for setting the bus state controller in the procedure of FIG.

The embodiment of the present invention can be applied not only to the sub-board 20 and the sub-control device 200, but also to the main board 10 and the main control device 101.

In the embodiment of the present invention, as the initial setting performed by the start program, the description has been added focusing on interrupt disabling, but other processing such as register setting may be used. CPU parameters such as counters and flags may be set so that the restart process can be normally performed even when the execution of the start program is started in an irregular state.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the invention described in the claims, and these are also included in the scope of the present invention. Needless to say.

20 Sub-board (processing unit)
CPU Central processing unit ROM Read-only memory (storage unit)
Initial setting of the CPU itself performed in the INI CPU
Program A Program A (Start Program)
Initial setting by P-INI program (initial setting command)

Claims (2)

In a gaming machine including a central processing unit and a plurality of devices connected to the central processing unit, and including a processing unit that performs predetermined processing.
The central processing unit includes a controller that controls an address space for managing a plurality of the devices.
At least one of the plurality of devices is a storage unit for storing a program.
The central processing unit
Based on the reset, the central processing unit itself performs initial settings including setting the controller so that it can access at least the storage unit and setting a first weight value which is a weight value corresponding to a waiting time at the time of access. As well as doing
In the storage unit, the start program stored at the position determined by the initial setting by the central processing unit itself is read out and the initial setting by the program is executed.
The start program is
An instruction is issued to access a storage area in which the second weight value, which is the weight value, is stored in advance for each address space, and to set the second weight value in the address space corresponding to the device based on the storage area. Including
A gaming machine characterized in that the second weight value is smaller than the first weight value . In the initial setting by the central processing unit itself, the first access width, which is the access width corresponding to the bus size, is set.
The start program is
An instruction is issued to access a storage area in which a second access width, which is the access width, is stored in advance for each address space, and to set the second access width of the address space corresponding to the device based on the storage area. Including
The gaming machine according to claim 1, wherein the second access width is larger than the first access width.

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