JP6819302B2 - State detector - Google Patents

Description

The present invention relates to a state detection device for monitoring the electrical state of a power conversion device by detecting a ground fault current of the power conversion device, a current with respect to a load, a voltage, and the like.

FIG. 21 is a configuration diagram of an electric motor drive system for driving a three-phase electric motor by outputting high-voltage alternating current by a power conversion device as a first conventional technique. In the figure, 201 is a power converter, and the AC output terminals of three single-phase power converters INV-U1 to INV-U3 are connected in series to form a U-phase single-phase series multiplex converter. Similarly, single-phase power converters INV-V1 to INV-V3 and INV-W1 to INV-W3 constitute a V-phase and W-phase single-phase series multiplex converter, and these three-phase single-phase series multiplex converters. The main circuit section is composed of star connections.
Here, the U-phase, V-phase, and W-phase single-phase series multiplex converters are referred to as single-phase power conversion units for convenience.

Reference numeral 202 denotes a multi-winding transformer as an AC power source, which is provided with nine sets of three-phase windings on the secondary side with respect to the three-phase windings on the primary side connected to the power supply system, and the secondary side windings. A three-phase AC voltage is supplied from the output terminals R1 to R3 to the single-phase power converters INV-U1 to INV-U3, and similarly, the single-phase power converter INV is supplied from the secondary winding output ends S1 to S3 and T1 to T3. A three-phase AC voltage is supplied to −V1 to INV-V3 and INV-W1 to INV-W3, respectively.
Reference numeral 203 denotes an electric motor as an AC load, which is driven by supplying a high-voltage three-phase AC voltage from the output terminals U, V, and W of the power converter 201.

Reference numeral 401 denotes a main control device that controls the entire power converter 201, and is connected to each detector described later, and is a single-phase power converter via optical fibers 64U1 to 64U3, 64V1 to 64V3, 64W1 to 64W3. It is connected to INV-U1 to INV-U3, INV-V1 to INV-V3, INV-W1 to INV-W3, respectively. Reference numeral 402 denotes a ground fault detector connected between the neutral point O of the main circuit portion connected by a star and the ground terminal E, and is operated by being supplied with power from the main control device 401 by the power supply line _PDIG . together to determine the presence or absence of a ground fault from the size of the ground fault current I _G from the neutral point O through the ground terminal E and the ground line flows to the ground point G, the main control unit via the signal line S _DIG results 401 And use it for device protection calculation.

_{Reference numeral} 403 is a U-phase current detector connected between the single-phase power converter INV-U3 and the U-phase output end U, which is supplied with power from the main control device 401 by the power supply line _PDIU and operates in the U-phase. The current detection result is sent to the main controller 401 by the signal line _SDIU and used for current control and calculation for device protection. Similarly, 404 is a V-phase current detector connected between the single-phase power converter INV-V3 and the V-phase output end V, and operates by being supplied with power from the main control device 401 by the power supply line _PDIV. , The detection result of the V-phase current is sent to the main controller 401 by the signal line _SDIV . Further, reference numeral 405 is a W-phase current detector connected between the single-phase power converter INV-W3 and the W-phase output end W, and operates by being supplied with power from the main control device 401 by the power supply line _PDIW . The detection result of the W-phase current is sent to the main control device 401 by the signal line _SDIW .

The control unit of the power conversion device 201 is composed of the main controller 401, the ground fault detector 402, the U-phase current detector 403, the V-phase current detector 404, and the W-phase current detector 405.
The main controller 401 is connected to each of the detectors 403 to 405 and the single-phase power converters INV-U1 to INV-U3, INV-V1 to INV-V3, INV-W1 to INV-W3 to operate the electric motor 203. By executing the calculation required for protection and operating the single-phase power converter of each phase based on the result, the current of each phase output from the power converter 201 is controlled, and the motor 203 is appropriately sized. Operate according to the voltage and frequency of.

Next, FIG. 22 is a configuration diagram of a single-phase two-level converter showing an example of a single-phase power converter applied to the power converter 201.
In the single-phase power converter 301 shown in the figure, 302 is a diode rectifier circuit, which converts three-phase AC input from AC input terminals a, b, and c into DC to convert the positive bus P- of the DC intermediate circuit. Output between the negative bus N. Reference numeral 303 denotes a single-phase two-level converter (single-phase two-level inverter) in which the switching element is an IGBT, and the direct current between the PN of the DC intermediate circuit is switched between four IGBTs and the freewheeling diode of each part is turned on and off. Converts to alternating current of arbitrary voltage and frequency, and outputs between the alternating current output terminals xy.

Reference numeral 304 denotes an auxiliary control device that controls the main circuit of the single-phase two-level converter 303, and the information calculated by the main control device 401 in FIG. 21 is taken in from the serial received optical-electric conversion module SR via the optical fiber 64. The IGBT of the single-phase two-level converter 303 is switched according to the calculation result based on this information. Reference numeral 305 is the control power supply of the auxiliary control device 304, and the auxiliary control device 304 is provided by an appropriate means from AC taken from the AC input terminals a, b, c, DC taken from between PN of the DC intermediate circuit, and the like. Generates the power supply required for operation and supplies power through the power supply line _PLCTR .

The configuration of the electric motor drive system shown in FIG. 21 and the single-phase power converter shown in FIG. 22 and the operating principle thereof are described in, for example, Patent Document 1. Although Patent Document 1 does not show the ground fault detector 402 and the like in FIG. 21, it is added in FIG. 21 because it is an essential detector for safety in high-voltage power equipment. ..

Next, FIG. 23 is a configuration diagram of a single-phase three-level converter showing an example of the single-phase power converter applied to the power converter 201 of FIG. In the single-phase power converter 306 of the figure, 307 is a diode rectifier circuit, which converts three-phase AC input from AC input terminals a, b, and c into DC and outputs it between PN of the DC intermediate circuit. To do. Reference numeral 308 is a single-phase three-level converter (single-phase three-level inverter) in which the switching element is an IGBT, and the direct current between PN of the DC intermediate circuit is switched between eight IGBTs, a freewheeling diode in each part, and 2 By turning on / off the clamp diode connected between the series connection point M of the capacitors and the IGBT, it is converted into an alternating current of an arbitrary voltage and frequency and output between the alternating current output terminals xy. Note that M is a series connection point of two capacitors.

Reference numeral 310 denotes an auxiliary control device that controls the single-phase power converter 306, and the information calculated by the main control device 401 of FIG. 21 is taken in from the serial received light-electric conversion module SR via the optical fiber 64 and is based on this information. The eight IGBTs of the single-phase three-level converter 308 are switched according to the calculation result. Reference numeral 309 is the control power supply of the auxiliary control device 310, and the operation of the auxiliary control device 310 is performed by an appropriate means from AC taken from the AC input terminals a, b, c, or DC taken from between PN of the DC intermediate circuit. The power supply required for the power supply is generated and supplied through the power supply line _PLCTR .
The configuration and operation of the single-phase power converter 306 as described above are described in, for example, Patent Document 2.

The power conversion device 201 of FIG. 21 described above drives the electric motor 203 as an AC load, whereas FIG. 24 shows, as a second conventional technique, connecting the output ends of each phase to the power supply system side. , The configuration of the power conversion device used for the purpose of compensating for frequency fluctuations and invalid power is shown.
In FIG. 24, 204 is a power conversion device, and 205 is a transformer for converting or insulating voltage between the power conversion device 204 and the power supply system.

Reference numeral 406 denotes a main control device that controls the entire power conversion device 204. The main controller 406 is connected to a ground fault detector 402 and current detectors 403 to 405 of each phase, and is a single phase of each phase via optical fibers 64U1 to 64U3, 64V1 to 64V3, 64W1 to 64W3. The point that the power converter is connected is the same as in FIG. 21, but the single-phase power converter of each phase has CNV-U1 to CNV-U3 for the U phase, CNV-V1 to CNV-V3 for the V phase, and W. The phases are CNV-W1 to CNV-W3, and these single-phase power converters have different internal configurations from those in FIGS. 22 and 23 as described in FIGS. 25 and 26 below.

FIG. 25 is a configuration diagram of a single-phase two-level converter showing an example of a single-phase power converter applied to the power converter 204. In the figure, 311 is a single-phase power converter, and 312 is a single-phase two-level converter with switching elements as IGBTs. By switching four IGBTs and turning on / off the freewheeling diodes of each part, direct current can be converted to an arbitrary voltage. The voltage is converted to alternating current and output between the alternating current output terminals xy, and the DC voltage between PN is maintained at a predetermined value.

Reference numeral 313 is an auxiliary control device that controls only the single-phase two-level converter 312, and the information calculated by the main control device 406 of FIG. 24 is taken in from the serial received light-electric conversion module SR through the optical fiber 64 and used in this information. The IGBT of the single-phase two-level converter 312 is switched according to the calculation result based on the calculation. _{Reference numeral} 314 is a control power source for the auxiliary control device 313. A power source for the auxiliary control device 313 is generated by an appropriate means from a direct current or the like taken in from between _PNs , and power is supplied through the power supply line _PLCTR .
The configuration and operation of the single-phase power converter 311 as described above are described in, for example, Non-Patent Document 1.

FIG. 26 is a configuration diagram of a single-phase three-level converter showing an example of a single-phase power converter applied to the power converter 204. In the single-phase power converter 315 shown in the figure, 316 is a single-phase three-level converter with switching elements as IGBTs, and direct current can be converted to an arbitrary voltage by switching eight IGBTs and turning on / off the freewheeling diodes of each part. The voltage is converted to alternating current and output between the alternating current output terminals xy, and the DC voltage between PN is maintained at a predetermined value.

Reference numeral 317 is an auxiliary control device that controls only the single-phase three-level converter 316, and the information calculated by the main control device 406 in FIG. 24 is taken in from the serial received light-electric conversion module SR through the optical fiber 64, and the calculation is based on this information. Depending on the result, 8 IGBTs are switched. _{Reference numeral} 318 is a control power source for the auxiliary control device 317. A power source for the auxiliary control device 317 is generated by an appropriate means from a direct current or the like taken in from between _PNs , and power is supplied through the power supply line _PLCTR .

As described above, for example, Patent Document 3 describes a configuration in which a single-phase three-level converter is applied in a power converter for compensating for frequency fluctuations and ineffective power by connecting to a power supply system.

The ground fault detector 402 shown in FIGS. 21 and 24 is a protection device for a power device generally called a ground relay (or a ground relay, or simply a ground fault detector), and has a potential on the main circuit side. It is operated by a power source insulated from the neutral point O, which is the neutral point O, the ground terminal E, the ground wire, and the ground point G, which have substantially the same potential. Therefore, when the ground wire connected to the ground fault detector is disconnected from the ground point G for some reason such as disconnection, a very high potential on the main circuit side is applied to the ground fault detector as it is.
In order to ensure safety even if such a state occurs, it is necessary to use a power source having a sufficient dielectric strength (high withstand voltage) as the power source of the ground fault detector. However, in general, a high withstand voltage power supply is very expensive and becomes large. Furthermore, since this type of power supply is difficult to manufacture, there are other problems such as a long delivery time.

As a means for solving the above-mentioned problems, there is a method of using a ground fault detector that does not require a high withstand voltage power supply for an electric motor drive system as shown in FIG. 27.
In the power conversion device 201'shown in the figure, 501 is a ground fault detector, 502 is a main control device, 63 is an optical fiber, and other symbols are the same as those in FIG. 21 and description thereof will be omitted. In FIG. 27, each detector, signal line, optical fiber, etc. in FIG. 21 are omitted, and only the parts necessary for explanation are shown for simplification.

FIG. 28 shows the detailed configuration of the ground fault detector 501. In the figure, 51 is a rectifier circuit, 53 is an intermittent signal generation circuit, 54 is an EO (electrical-optical) conversion circuit, R1 and R2 are limiting resistors for limiting ground fault current, and ZD is a constant voltage diode. C1 is a capacitor. Further, 55 in the main control device 502 is an OE (optical-electric) conversion circuit.

Next, the operation of the ground fault detector 501 will be described.
When a ground fault occurs in the power converter 201 'for some reason 27, the current flows I _G which via the ground terminal E from the neutral point O toward the ground point G. The current _{I G} is a current magnitude by the resistors R1, R2 is restricted to the ground fault detector 501 in FIG. 28, for example, a waveform as a current _{I G} shown in FIG. 29 (1).
By current I _G flows, the input voltage V _in for the detector body at both ends of the resistor R2 is generated, a part from the connection point of the resistors R1, R2 of the current I _G flows as the current I1 in the detector body .. In this state, the current I1 is rectified by the rectifier circuit 51 to charge the capacitor C1, the power supply voltage V _cc rises as shown in FIG. 29 (2), and finally reaches a constant value as shown by V _g2. To do.

In the process of charging the capacitor C1 in this way, when the power supply voltage V _cc reaches the reference voltage required for circuit operation as shown by V _g1 in FIG. 29 (2), the intermittent signal generation circuit 53 in FIG. 28 Therefore, as shown in FIG. 29 (3), an intermittent signal _Sint whose logical value temporarily becomes “1” in the period ΔT is output and input to the EO conversion circuit 54 in the subsequent stage.
When the logical value of the intermittent signal _Sint is "1", the EO conversion circuit 54 turns on the internal light emitting element and outputs an optical signal, and this optical signal is sent to the monitoring side via the optical fiber 63. It is sent to the main control device 502 of the above and converted into an electric signal by the OE conversion circuit 55, so that a ground fault can be detected. Here, as shown in FIG. 30, the intermittent signal _Sint is more effective in reducing power consumption as the period T1 of the logical value "1" is sufficiently shorter than the period T2 of the logical value "0" in the period ΔT.

As described above, a power conversion device that uses a ground fault detector that does not require a high withstand voltage power supply is described in, for example, Patent Document 4. In Patent Document 4, as shown in FIGS. 27 and 28, a ground fault detector is operated using the ground fault current as a power source, and the detected ground fault failure signal is output by an optical fiber to obtain a high withstand voltage power supply. As a result, the size and cost are reduced.

Next, FIG. 31 shows an example in which a state detection device of the prior art is applied to an electric motor drive system that drives a three-phase electric motor 203 by using a power converter 101 equipped with a single-phase series multiplex converter for three phases. is there.

Here, the single-phase series multiplex converter for one phase is configured by connecting three single-phase power converters in series and multiplex. That is, similarly to the above, the U-phase single-phase series multiplex converter is composed of the single-phase power converters INV-U1 to INV-U3, and the V-phase single-phase series multiplex converter is the single-phase power converter INV. The W-phase single-phase series multiplex converter is composed of the -V1 to INV-V3, and the W-phase single-phase series multiplex converter is composed of the single-phase power converters INV-W1a to INV-W3.

In FIG. 31, 1 is a main control device for controlling the entire power conversion device 101, 2 is a state detection device, and R _DIG is a neutral point O and a ground terminal of the power conversion device 101 for detecting a ground fault current. The resistance element R _DIU as a current detecting means connected to E is connected to the neutral point O and the AC output terminal x of the U-phase single-phase power converter INV-U1 in order to detect the U-phase current. The resistance elements connected between them, similarly, R _DIV and R _DIW are the output ends of the neutral point O and V phase single-phase power converter INV-V1 and the W-phase single-phase power converter INV-W1a, respectively. It is a resistance element connected to x. Incidentally, single-phase power converter INV-W1a of the W phase has a function of supplying power to the state detection device 2 via the power line P _SD.
Further, 64U1 to 64U3, 64V1 to 64V3, 64W1 to 64W3 are a state detection device 2 and a single-phase power converter INV-U1 to INV-U3, INV-V1 to INV-V3, INV-W1a to INV-W3. It is an optical fiber connected between them.

Resistance element _{R DIG, R DIU, R DIV} , the _{R DIW} voltage across _{V DIG, V DIU, V DIV} , V DIW are inputted into the state detection device 2. From this state detector 2, as illustrated by FIG. 34 to be described later, the voltage across _{V DIG, V DIU, V DIV} , AD relative to _{V DIW} (analog - digital) conversion, digital - serial converter, E -O - optical signal obtained by performing (electric light) conversion, _{S IGL, S IUL, S IVL} , S IWL are output, these optical signals _{S IGL, S IUL, S IVL} , S IWL are optical fibers 41a It is input to the main control device 1 via ~ 41d.

FIG. 32 is a configuration diagram showing an example of a single-phase power converter 102 applied to the power converter 101 of FIG. 31. In the figure, the configurations of the diode rectifier circuit 302 and the single-phase two-level converter (single-phase two-level inverter) 303 are the same as those shown in FIG. 22, and thus the description thereof will be omitted.

Reference numeral 304 denotes an auxiliary control device that controls the main circuit of the single-phase two-level converter 303, and the information calculated by the main control device 1 of FIG. 31 is a serial reception optical-electric conversion module via the optical fiber 64. The IGBT of the single-phase two-level converter 303 is switched according to the calculation result based on this information taken from the SR. Reference numeral 3 denotes a control power supply for the auxiliary control device 304, which is the auxiliary control device 304 taken from AC input terminals a, b, and c, or DC taken from between PNs of the DC intermediate circuit by an appropriate means. Generates the power supply necessary for the operation of the above, and supplies power to the auxiliary control device 304 via the power supply line _PLCTR .

Further, the control power supply 3 generates a power supply necessary for the operation of the state detection device 2 in FIG. 31 and supplies power to the power supply circuit 21 described later in the state detection device 2 via the power supply line _PSD and the power supply terminal PS. ing. The power supply means is composed of the control power supply 3, the power supply line _PSD , the power supply terminal PS, and the power supply circuit 21 in the state detection device 2.
Here, the power supply circuit 21 in the state detection device 2 is supplied with power from the control power supply 3 in at least one single-phase power converter 102 (for example, the single-phase power converter INV-W1a of FIG. 31 described above). Just do it.

Next, FIG. 33 is a configuration diagram of a single-phase three-level converter showing an example of the single-phase power converter 103 applied to the power converter 101 of FIG. 31. In the figure, the configurations of the diode rectifier circuit 307 and the single-phase three-level converter (single-phase three-level inverter) 308 are the same as those shown in FIG. 23, and thus the description thereof will be omitted.
In FIG. 33, 309 is an auxiliary control device, 5 is a control power supply for the auxiliary control device 309, and a power supply necessary for the operation of the auxiliary control device 309 is generated in the same manner as the control power supply 3 in FIG. 32, and the power supply line P while feeding through _LCTR, generates the power required for the operation of the state detection device 2, supplies power to the power supply circuit 21 of the state detection device 2 via the power line P _SD and the power supply terminal PS.
Similar to FIG. 32, the power supply circuit 21 in the state detection device 2 may be supplied with power from the control power supply 5 in at least one single-phase power converter 103.

FIG. 34 is an internal configuration diagram of the state detection device 2. In the figure, 11a to 11d are voltage conversion circuits, 12a to 12d are AD conversion circuits, 13a to 13d are AD conversion control circuits for controlling AD conversion circuits 12a to 12d, and 14a to 14d are AD conversion circuits 12a to 12d. The serial conversion circuit 15a to 15d that converts the output signal of the above into a serial signal necessary for transmission, converts the serial signal (electrical signal) output from the serial conversion circuits 14a to 14d into an optical signal and outputs it to the optical fibers 41a to 41d. E-O of (electro - optical) conversion circuit, a power supply circuit connected to each other through a power supply line _{P SD} to the power supply terminal PS of the single-phase power converter 102 or 103 21, C1 is the output side of the power supply circuit 21 It is a capacitor as a power storage element connected to.

In the above configuration, the voltage conversion circuits 11a to 11d, the AD conversion circuits 12a to 12d, and the AD conversion control circuits 13a to 13d constitute digital signal calculation means, and the serial conversion circuits 14a to 14d constitute serial conversion means. The O conversion circuits 15a to 15d constitute an electric-optical conversion means.

In the detection operation of the ground fault current _{I G} in FIG. 31, the ground terminal E through the resistor element _{R DIG} from the neutral point O, to detect the current _{I G} flowing to the ground point G as a voltage across _{V DIG} of the resistance element _{R DIG} , Input to the state detection device 2. Relation between the current _{I G} and the voltage _{V DIG is} a _{V DIG = I G × R DIG} . This voltage V _DIG is input to the state detection device 2, converted into a voltage V _IG by the voltage conversion means 11a of FIG. 34, and input to the AD conversion circuit 12a.
An inverting amplifier circuit or a non-inverting amplifier circuit provided with an operational amplifier is used in the voltage conversion means 11a, and the voltage V _DIG is converted into the voltage V _IG (= V) by the conversion gain G _DIG determined by the resistance attached to the amplifier circuit. Convert to _DIG x G _DIG ).

The AD conversion control circuit 13a of FIG. 34 is a circuit that pulse-outputs the state of “1” at a preset constant period T as the AD conversion control signal _CIG shown in FIG. 35 (1), and is a free-run timer. It is composed of a digital counter of a logic circuit that realizes the function. As shown in FIG. 35 (2), the AD conversion circuit 12a starts a process of converting an analog signal into a digital signal when the AD conversion control signal _CIG is in the “1” state, and as shown in FIG. 35 (3). , and outputs the conversion result after a conversion time _{T CHG} as digital data _{D IG.}

When the digital data D _IG is output from the AD conversion circuit 12a, the serial conversion circuit 14a performs parallel-serial conversion of the digital data D _IG after the preset delay time T _DLY elapses, as shown in FIG. 35 (4). , Output as a serial signal _SIG as shown by "* 1". Here, the transmission format of the data output by the serial conversion circuit 14a on the transmitting side may be adjusted to the specifications on the receiving side.

For example, when the UART method is adopted for the serial signal, the above-mentioned "* 1" part becomes the waveform of the transmission format as shown in FIG. 36. Note that FIG. 36 (4') shows the clock signal S _CLK , and FIG. 36 (4) shows the serial signal _SIG which is an enlarged portion of “* 1” in FIG. 35 (4).
In serial signal _{S IG} of FIG. 36 (4), D0~D7 is the actual digital data, ST is a start bit indicating the beginning of the UART signal, SP is a stop bit indicating the end of the UART signal, PR digital data D0 It is a parity check result of ~ D7. When sending 8-bit data, this waveform may be used, but in the case of data exceeding 8 bits, after transmitting the waveforms (1) to (11) in FIG. 36, the waveform is repeated from the part (12). The waveforms (1) to (11) may be output, and the data may be divided into 8-bit units and transmitted as many times as necessary.

The EO conversion circuit 15a of FIG. 34 converts the serial signal _SIG as an electric signal output from the serial conversion circuit 14a into an optical signal _SIGL and transmits the serial signal _SIG .
The main controller 1 of FIG. 31, which receives the optical signal _SIGL through the optical fiber 41a, converts the optical signal into an electric signal by an OE (optical-electric) conversion circuit (not shown), contrary to the EO conversion circuit 15a. Convert to. Then, by taking this electric signal into a CPU or the like and converting the serial signal into a parallel signal by a parallel conversion circuit (not shown) opposite to the serial conversion circuit 14a, the data output from the AD conversion circuit 12a is recognized. To do.

Further determines the processing of the CPU or the like, the size of the data, that is, the magnitude of the ground fault current I _G exceeds the threshold value for failure determination, a ground fault. The processing when a ground fault is determined in this way varies depending on the equipment in which the power converter is used. For example, in an inverter for driving an electric motor, the frequency and voltage output by the inverter are gradually lowered to finalize. By setting the frequency to zero, the process of decelerating and stopping the motor is performed. Further, in the case of a converter connected to a power supply system, if the time determined to be a ground fault failure continues beyond a predetermined set time, the converter operation is stopped.

In the state detecting device 2 of FIG. 34, U-phase, V-phase, the load current I _U of _W-phase, for processing to detect the I _V, I _W are the same as those in the ground fault current I _G, details on these Description will be omitted. Incidentally, the ground fault current I _G is normal ground fault has not occurred is only flowing a minute current even during operation of the apparatus, even if the ground fault is detected, the equipment specifications of the device is used Depending on the case, the operation may be allowed to continue, or the passage of time such as several tens of milliseconds to several seconds or several tens of seconds may be allowed until the operation is stopped.
On the other hand, regarding the load currents I _U , _IV , and I _W flowing through each phase, the maximum current specified in the specifications of the device always flows, and the current exceeds the allowable maximum value to protect the semiconductor element. it like must stop operation immediately when it becomes the current is different from the case of the ground fault current I _G.

The power conversion device described with reference to FIGS. 31 to 36 is described in Japanese Patent Application No. 2015-141747 by the present applicant. In this prior invention, the detected ground fault signal is output by the number of optical fibers corresponding to the number of detected signals, so that a high withstand voltage power source is not required, and as a result, the size and cost are reduced, and the state detection device is used. Each conversion circuit etc. is operated by supplying the power of the above from the single-phase power converter side.

Japanese Patent No. 5181712 Japanese Patent No. 4096501 Japanese Unexamined Patent Publication No. 2000-253675 Japanese Patent No. 5305070

Fang Zheng Peng etc., “A Multilevel Voltage-Source Inverter with Static Var Generation”, IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL.32, NO. 5, 1996, P.1130-1138

In the power conversion device 201 shown in FIG. 21, not only a ground fault detector but also various detectors are used depending on the application and purpose. For example, in order to control the current at the output end, a current detector is used. It must be possible to detect the current at all times.
The current detector used in this type of application is mainly composed of circuits that use detection elements such as Hall elements, insulated amplifiers, and shunt resistors. In any configuration, current is detected accurately and reliably. Therefore, it is necessary to arrange the detection element so as to be in close contact with or in direct contact with a portion of the main circuit to which a high voltage is applied, such as a wire through which a current flows or a conductor plate (copper bus bar). The signals output from these current detectors are digital signals by the AD conversion circuit after the instantaneous values are taken into the main control device as analog signals in order to prevent the calculation for current control and the state where the current becomes excessive. The result of conversion to is taken into a CPU or the like and used for arithmetic processing.

Here, since both the power supply for operating the current detector and the detected analog signal must be electrically connected to the main controller, there is a power supply between the main controller and the current detector. High withstand voltage insulation corresponding to the part with the highest voltage in the conversion device is required. Generally, the current detector is processed to ensure high withstand voltage insulation, but the current detector with such processing is not only very expensive and large, but also has a delivery date. Will also be longer.

Further, when a semiconductor element such as an IGBT is switched in a high-voltage power conversion device, a very large surge voltage is generated due to a sudden change in voltage during switching. This surge voltage causes noise that may cause malfunction of the control device, but there is noise in the power line and analog signal detection line between the control device and the current detector electrically connected to it. Another problem has arisen is that it is easier to invade and as a result the control device is more likely to malfunction.

In response to the above-mentioned problems, according to the power conversion device shown in FIG. 31, the detectors are integrated into one unit, a power supply requiring high withstand voltage insulation is not required, noise intrusion is prevented, and a control device or the like is used. In addition to preventing malfunctions, stable detection operation is possible regardless of the magnitude of the current as the amount of state to be detected. However, since optical fibers and the number of EO conversion circuits and OE conversion circuits required for optical signal transmission are required for the number of detection signals, there is room for improvement in terms of downsizing of the device and cost reduction. is there.

Further, in a power converter for driving an electric motor, when a control method such as sensorless vector control or instantaneous power failure restart control is applied, it is often performed to detect the output voltage of the power converter, which is shown in FIG. 31. Although the power converter is provided with a ground fault detector and an output current detector, the output voltage detector of each phase has not been considered.

Further, when a resistance element such as a shunt resistor is used as the current detector, the influence of the resistance value change due to the temperature change may not be ignored. In addition, the effect of temperature change can be reduced by using a detector built into the electronic circuit combined with a Hall element, etc. However, when achieving high-precision control, the effect of temperature change may not be negligible. is there. As a countermeasure against this temperature change, there is a method of attaching the temperature detection elements separately, but in that case, since it is necessary to attach them to individual current detectors, the number of temperature detection elements increases.

Further, the power conversion device as shown in FIG. 21 is often used for several decades from the time of manufacture, and the control device (either one or both of the main control device and the auxiliary control device) is maintained during the process. May be replaced as part of. The detector may be replaced at the same time as the control device is replaced, but it is difficult to replace only the detector if the detector is designed to be integrated as a structure of the power converter. .. In addition, if the detector is replaced, the control performance will change, which may worsen in some cases. In order to prevent this, there is a problem that a time-consuming adjustment test is required, and from such a background, the existing detector is often used continuously as it is.
Even if the control device is replaced, the control performance will not change if the existing detector is used, but the control device after replacement needs to be designed and manufactured in consideration of the existing detector, which is unnecessary. It created another problem of labor, time, and cost.

Further, in the power converter of FIG. 21, it is possible to reduce the withstand voltage of the detector by supplying the power of the state detection device from the single-phase power converter of the main circuit. According to this method, the main circuit There was a risk that power could not be supplied if a failure occurred on the side.
Further, the control device of the power conversion device is equipped with an arithmetic element such as a CPU, and the software (program) written in the arithmetic element operates in a predetermined arithmetic cycle. When the detection operation of the state detection device is to be asynchronous with the calculation on the main controller side, the calculation cycle on the state detection device side must be sufficiently faster than the calculation cycle of the software on the main controller side. It becomes necessary to increase the transmission speed of serial transmission very high, and another problem arises such that the reception capacity on the main controller side must be increased more than necessary.

Therefore, an object of the present invention to solve the problem is to solve the above-mentioned various problems, to reduce the size and cost of the device, and to provide a state detection device having excellent operation stability and reliability.

In order to solve the above problem, the invention according to claim 1 comprises n (n is an integer of 1 or more) single-phase power converters, and when n = 1, two single-phase power converters. The AC output ends are the first and second AC output ends, and when n = 2 or more, the two AC output ends located at the start and end points of the series connection circuit on the AC output side of n single-phase power converters are used. A single-phase power conversion unit with the first and second AC output ends is configured.
The first AC output end of the single-phase power conversion unit of m (m is an integer of 2 or more) is commonly connected to form a neutral point, and the second AC of the single-phase power conversion unit of m units is used. The electrical state of the power converter is targeted at a power converter having an output end connected to each phase of the same AC load or AC power supply and having a main controller for controlling the single-phase power converter. In the state detection device for monitoring
A first detecting means installed between the neutral point and the grounding point,
A first analog-to-digital conversion means that converts an analog signal output from the first detection means into a first digital signal and outputs the signal.
A first serial conversion means that converts the first digital signal into a first serial signal and outputs the signal.
A second detection means attached between at least (m-1) of the first AC output ends and the neutral point, and
A second analog-to-digital conversion means that converts an analog signal output from the second detection means into a second digital signal and outputs the signal.
A second serial signal conversion means that converts the second digital signal into a second serial signal and outputs the signal.
A conversion timing control means for controlling the conversion timing of all the analog-to-digital conversion means,
A serial signal selection means that selects and outputs one of the output signals of all the serial conversion means,
An electric-optical conversion means that converts an output signal of the serial signal selection means into an optical signal and outputs it to the main control device as a signal indicating the state of the power conversion device.
The first and second detection means, the first and second analog-digital conversion means, the first and second serial conversion means, the conversion timing control means, the serial signal selection means, and the electric-light. A power supply means for supplying power to a circuit including a conversion means,
Power is supplied to the power supply means from any of the single-phase power converters.

The invention according to claim 2 is the state detection device according to claim 1.
A third detection means attached between the m second AC output ends and the neutral point, and
A third analog-to-digital conversion means that converts an analog signal output from the third detection means into a third digital signal and outputs the signal.
A third serial conversion means that converts the third digital signal into a third serial signal and outputs the signal.
With more
The conversion timing control means controls the conversion timing of all the analog-digital conversion means including the third analog-digital conversion means.
The serial signal selection means selects and outputs one of the output signals of all the serial conversion means including the third serial conversion means.
The power supply means also supplies power to the third detection means, the third analog-digital conversion means, and the third serial conversion means.

The invention according to claim 3 is the state detection device according to claim 1 or 2.
At least one of the detection means includes a temperature detection means and
A fourth analog-to-digital conversion means that converts an analog signal output from the temperature detecting means into a fourth digital signal and outputs the signal.
Further provided with a fourth serial conversion means for converting the fourth digital signal into a fourth serial signal and outputting the signal.
The conversion timing control means controls the conversion timing of all the analog-digital conversion means including the fourth analog-digital conversion means.
The serial signal selection means selects and outputs one of the output signals of all the serial conversion means including the fourth serial conversion means.
The power feeding means also supplies power to the fourth analog-to-digital conversion means and the fourth serial conversion means.

According to a fourth aspect of the present invention, in the state detection device according to any one of claims 1 to 3, at least one of the first detection means or the second detection means has a plurality of resistors. It is composed of elements, and among these resistance elements, the voltage is detected from the resistance element closest to the neutral point of the power conversion device.

The invention according to claim 5 is the state detection device according to any one of claims 1 to 4.
A fifth detection means connected between the second AC output end of the single-phase power conversion unit in the m range and each phase of the AC load or AC power supply, respectively.
Further provided with a power supply means for supplying power to the fifth detection means.
The second analog-to-digital conversion means converts an analog signal output from the fifth detection means into the second digital signal.

The invention according to claim 6 is the state detection device according to any one of claims 1 to 5, wherein power is supplied to the power feeding means from a system other than the single-phase power converter.

The invention according to claim 7 is the state detection device according to any one of claims 1 to 6.
It further includes means for converting an optical signal output from the main control device into an electric signal and outputting the electric signal as an operation control signal for the conversion timing control means.

According to the present invention, the power supply of the state detection device is one of the single-phase power converters constituting the power conversion device, or the main control device and all the detection functions necessary for protecting and controlling the power conversion device from the power supply. Only one system needs to be supplied to the provided state detection device. For this reason, a power supply or detector that requires high withstand voltage insulation corresponding to the main circuit potential of the power conversion device is not required between the main control device and the state detection device, or even if it is necessary, a small number of detections are required. Since it is only necessary to use a device, it is possible to provide a small and inexpensive state detection device.

Further, the state detection device and the main control device can be connected by an optical fiber, eliminating the need for a power line or a detection line that must be electrically connected. Therefore, noise does not enter the main control device through the power supply line and the detection line, and as a result, the power conversion device can be operated stably.
Further, in the present invention, the detectors for detecting ground faults, output currents, output voltages, etc. required for controlling the power conversion device can be integrated into one state detection device, so that the size can be increased by incorporating various functions. It is possible to simplify the design and structure of the circuit and printed circuit board of the main control device, which are expensive.
Even when an element such as a shunt resistor that is easily affected by a temperature change is used as the detector, the correction can be easily performed by detecting the temperature, and high-precision control can be realized even with an inexpensive shunt resistor. ..

Further, in the replacement of a normal control device, it is necessary to design and manufacture the main control device in consideration of the existing detector, but according to the present invention, it is the state detection device that considers the existing detector. Since only the part is required, the design and production can be simplified. Furthermore, as a power source, in addition to the method of supplying power from the single-phase power converter of the main circuit, it can also be supplied from other systems such as the main control device as needed, so it can be used even when power cannot be supplied due to a failure on the main circuit side. It is possible and the reliability of the device can be improved.

In addition, even when the calculation cycle of the main control device and the operation cycle of the state detection device are asynchronous, the state detection device can acquire the signal output from the main control device via the optical fiber. It is possible to control the operation cycle of the above in synchronization with the calculation cycle of the main control device. As a result, it is not necessary to increase the serial transmission speed more than necessary, and the reception capacity on the main controller side can be reduced to stabilize the operation including the control calculation.

It is a block diagram of the electric motor drive system provided with the state detection device 2a which concerns on 1st Embodiment of this invention. It is a block diagram of the state detection apparatus 2a in FIG. It is a waveform diagram which shows the operation of the AD conversion control circuit 16a in FIG. It is a truth table which shows the operation of the 4-bit binary counter in the AD conversion control circuit 16a of FIG. It is a waveform diagram which shows the operation of the AD conversion circuit 12a and the serial conversion circuit 14a in FIG. It is a waveform diagram which shows the operation of the serial signal selection circuit 17a in FIG. It is a block diagram of the electric motor drive system provided with the state detection device 2b which concerns on 2nd Embodiment of this invention. It is a block diagram of the state detection apparatus 2b in FIG. It is a waveform diagram which shows the operation of the AD conversion control circuit 16b in FIG. It is a block diagram of the electric motor drive system provided with the state detection device 2c which concerns on 3rd Embodiment of this invention. It is a block diagram of the state detection apparatus 2c in FIG. It is a block diagram of the voltage conversion circuit 11h in FIG. It is a block diagram of the resistance element group for detecting the ground fault current in the 4th Embodiment of this invention. It is a block diagram of the resistance element group for detecting the output current of U phase in 4th Embodiment of this invention. It is a block diagram of the electric motor drive system provided with the state detection device 2d which concerns on 5th Embodiment of this invention. It is a block diagram of the state detection apparatus 2d in FIG. It is a block diagram of the electric motor drive system provided with the state detection device 2e which concerns on 6th Embodiment of this invention. It is a block diagram of the electric motor drive system provided with the state detection device 2f which concerns on 7th Embodiment of this invention. It is a block diagram of the state detection apparatus 2f in FIG. It is a waveform diagram which shows the operation of the AD conversion control circuit 18a in FIG. It is a block diagram of the electric motor drive system which shows the 1st prior art. It is a block diagram which shows an example of the single-phase power converter applied to the power converter of FIG. It is a block diagram which shows another example of the single-phase power converter applied to the power converter of FIG. It is a block diagram of the electric motor drive system which shows the 2nd prior art. It is a block diagram which shows an example of the single-phase power converter applied to the power converter of FIG. FIG. 5 is a configuration diagram showing another example of a single-phase power converter applied to the power converter of FIG. 24. It is a block diagram of an electric motor drive system to which a ground fault detector which does not require a high withstand voltage power source is applied. It is a block diagram of the ground fault detector in FIG. 27. It is a waveform diagram for demonstrating the operation of the ground fault detector shown in FIG. 28. It is a waveform diagram for demonstrating the operation of the ground fault detector shown in FIG. 28. It is a block diagram of the electric motor drive system provided with the state detection device of the prior invention. It is a block diagram of the single-phase power converter in FIG. It is another block diagram of the single-phase power converter in FIG. It is a block diagram of the state detection apparatus in FIG. It is a waveform diagram for demonstrating the operation of the state detection apparatus shown in FIG. 34. FIG. 3 is an enlarged waveform diagram of a part of FIG. 35.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First Embodiment>
First, the first embodiment of the present invention will be described.
FIG. 1 is a configuration diagram of an electric motor drive system including a state detection device according to the first embodiment of the present invention. Similar to FIGS. 21 and 31, this electric motor drive system drives a three-phase electric motor 203 by a power converter 105 composed of a series multiplex converter in which each phase consists of three single-phase power converters. It is a thing.

In FIG. 1, 105 is a power converter, and 211 is a series multiplex conversion for three phases including single-phase power converters INV-U1 to INV-U3, INV-V1 to INV-V3, INV-W1 to INV-W. It is a main circuit section equipped with a device. Here, the series multiplex converter of each phase constitutes the single-phase power conversion unit according to the claim.
Further, 1a is a main control device for controlling the entire power conversion device 105, 2a is a state detection device, and _RDIG is a neutral point O of the power conversion device and a ground terminal E for detecting a ground fault current. The resistance element connected between them, R _DIU, is a resistance element connected between the neutral point O and the AC output end x of the single-phase power converter INV-U1 to detect the U-phase current, as well as the resistance element. R _DIV and _{R DIW} are each connected V-phase current detection between the neutral point O and V the phase-phase power converter INV-V1 and an output terminal x of the single-phase power converter INV-W1a, It is a resistance element for detecting W-phase current. Similarly to FIG. 31, the single-phase power converter INV-W1a has a function of supplying power to the state detection device 2a through the power line _{P SD.}
The other components are designated by the same symbols as those in FIG. 21 or 31, and the description thereof will be omitted.

Next, FIG. 2 is a configuration diagram of the state detection device 2a in FIG.
In FIG. 2, 11a is a voltage conversion circuit for detecting a ground fault current, 11b to 11d are voltage conversion circuits for detecting U-phase to W-phase currents, and 12a is a digital output voltage of the voltage conversion circuit 11a. The AD (analog-to-digital) conversion circuit for converting into a signal, 12b to 12d, is an AD conversion circuit for converting the output voltage of the voltage conversion circuits 11b to 11d into a digital signal, respectively.

Further, 14a is a serial conversion circuit that converts the digital signal output from the AD conversion circuit 12a into a serial signal required for transmission, and 14b to 14d are serials that convert the digital signal output from the AD conversion circuits 12b to 12d into the serial signal required for transmission. It is a serial conversion circuit that converts to a signal.
16a is an AD conversion control circuit as a conversion timing control means for calculating and outputting four AD conversion control signals for controlling the AD conversion circuits 12a to 12d, and 17a is four output from the serial conversion circuits 14a to 14d. A serial signal selection circuit that selects and outputs one of the serial signals, 15 is an EO that converts the serial signal as an electric signal output from the serial signal conversion circuit 17a into an optical signal and outputs it to the optical fiber 41. It is an (electric-light) conversion circuit.
Further, 21 is a power supply circuit connected to the power supply line _PSD , and C1 is a smoothing capacitor as a power storage element attached to the output side of the power supply circuit 21.

Next, the operation of the state detection device 2a will be described.
In the detection operation of the ground fault current _{I G,} it detects the current _{I G} flowing from the neutral point O in FIG. 1 to ground G as a voltage across _{V DIG} of the resistance element _{R DIG,} and inputs to the state detection device 2a. Here, the relationship between the current _{I G} and the voltage _{V DIG is} a _{V DIG = I G × R DIG} . This voltage V _DIG is converted into a voltage V _IG by the voltage conversion circuit 11a of the state detection device 2a and input to the AD conversion circuit 12a.
An inverting amplifier circuit or a non-inverting amplifier circuit provided with an operational amplifier is used in the voltage conversion circuit 11a, and the voltage V _{DIG is changed} to the voltage V _IG (= by the conversion gain G _DIG determined by the resistance element attached to the amplifier circuit. Convert to V _DIG x G _DIG ).

Next, the operations of the AD conversion circuit 12a, the serial conversion circuit 14a, the AD conversion control circuit 16a, and the serial signal selection circuit 17a will be described with reference to the drawings.
FIG. 3 is a waveform diagram showing the operation of the AD conversion control circuit 16a. FIG. 3 (1) CLK is a clock signal for operating the circuit, FIG. 3 (2) Bit 0 to (5) Bit 3 is an output signal of a 4-bit binary counter, and FIG. 3 (2) Bit 0 is the least significant bit. FIG. 3 (5) Bit3 is the most significant bit.
3 (6) CI _W to (9) _CIW are AD conversion control signals output from the AD conversion control circuit 16a. Here, FIG. 3 (6) CI _G is a control signal for the AD conversion circuit 12a that AD-converts the detection result of the ground fault current, and FIG. 3 (7) _CIU to (9) _CIW is the detection result of each phase current. It is a control signal for AD conversion circuits 12b to 12d to perform AD conversion.

FIG. 4 is a truth table showing the operation of the 4-bit binary counter in the AD conversion control circuit 16a. The numbers (0) to (15) in this table correspond to (0) to (15) added in FIG. 3, and the decimal number column in FIG. 4 indicates the output state of the 4-bit binary counter by 10. It is a value converted to a decimal number.
The output state of the 4-bit binary counter is synchronized with the rise of CLK in FIG. 3 (1), and the value converted into a decimal number is 0 as shown in FIG. 3 (2) Bit 0 to (5) Bit 3 or FIG. It changes while adding 1 from to 15 and repeats this with the operation of returning to 0 after 15 as one cycle.

The _{CIG in} FIG. 3 (6) outputs Bit0 = "1" as shown in FIG. 4 (1) so that "1" is output when the output of the 4-bit binary counter becomes 1 in decimal conversion. , Bit1 = "0", Bit2 = "0", Bit3 = "0". Likewise, as FIG. 3 _{(7) C IU} output of 4-bit binary counter is "1" when a 3 in decimal terms is output, as shown in FIG. 4 (3) Bit0 = "1 , Bit1 = "1", Bit2 = "0", Bit3 = "0", and Fig. 3 (8) _CIV shows "1" when the output of the 4-bit binary counter becomes 5 in decimal conversion. As shown in FIG. 4 (5), the conditions of Bit0 = “1”, Bit1 = “0”, Bit2 = “1”, and Bit3 = “0” are set so that “” is output, and FIG. 3 (9) _CIW Bit0 = "1", Bit1 = "1", Bit2 = as shown in FIG. 4 (7) so that "1" is output when the output of the 4-bit binary counter becomes 7 in decimal conversion. The logical product may be taken under the conditions of "1" and Bit3 = "0".
By doing so, it is possible to output FIGS. 3 (6) CI _G to (9) CI _W once as AD conversion control signals in one cycle of the operation of the 4-bit binary counter.

Next, FIG. 5 is a waveform diagram showing the operation of the AD conversion circuit 12a and the serial conversion circuit 14a. These operations are substantially similar to the prior art, the period _{T C} and 5 to AD conversion control signal _{C IG} of FIG. 5 (1) output from the AD conversion control circuit 16a becomes "1" (4) The period T _tx during which the serial signal _SIG is output is clarified. When the C _{IG of} FIG. 5 (1) becomes “1”, the analog-to-digital conversion process is started as shown during the conversion of FIG. 5 (2), and after the conversion period T _CHG elapses, the conversion result is used as a digital signal D _IG. Output.

FIG. 5 (1) C _IG becomes “1” and the AD conversion circuit 12a starts operation, then C _IG becomes “0” and conversion ends, and FIG. 5 (4) _SIG output ends. period until the conversion period _{T CHG,} the delay period _{T DLY,} the sum period of the serial signal output period _{T tx,} that this period does not exceed the output period _{T C} of the AD conversion control signal _{C IG,} subsequent In the serial signal selection circuit 17a of the above, the timings of the serial signals can be prevented from overlapping.
When the digital signal D _IG is output from the AD conversion circuit 12a, the serial conversion circuit 14a performs parallel-serial conversion of the digital signal D _IG after the elapse of the preset delay period T _DLY as shown in FIG. 5 (4). , Outputs the serial signal _SIG as shown in "* 1".
The above is a description of the operation of the AD conversion circuit 12a and the serial conversion circuit 14a, but the same operation is also applied to the AD conversion circuits 12b to 12d and the serial conversion circuits 14b to 14d used for current detection of each phase.

FIG. 6 is a waveform diagram showing the operation of the serial signal selection circuit 17a. _{(1) S IG ~ (4} ) S IW of the figure parallel digital signals output from the AD conversion circuit 12a~12d by serial conversion circuit 14a to 14d - a serial signal obtained by serial conversion.
Further, ※. 1 to ※ 4 parts in FIG. 6 shows how the serial signal is output, the serial signal selected by the serial signal selecting circuit 17a is 6 (5) S _T ※ 1~ ※ 4 As shown in the above, the signals are output in order, converted from an electric signal to an optical signal _SLT by the EO conversion circuit 15 in the next stage, and transmitted to the upper main control device 1a.
Since the timing at which the serial signal is output is determined by the AD conversion control signal and is controlled in advance so that the timings do not overlap, a logical sum circuit may be used for the serial signal selection circuit 17a.

<Second Embodiment>
Next, a second embodiment of the present invention will be described.
FIG. 7 shows an electric motor drive system to which the second embodiment is applied, and similarly to the first embodiment, a three-phase electric motor 203 is provided by a power converter 106 composed of a three-phase serial multiplex converter. It is the one that drives.

In FIG. 7, 1b is a main control device for controlling the entire power conversion device 106, 2b is a state detection device, and _RDVU is a neutral point O and a single-phase power converter INV for detecting a U-phase output voltage. The resistance element as a voltage detecting means connected to the AC output terminal y of −U3, similarly, R _DVV and R _DVW are the neutral point O and the single-phase power converter INV-V3 and INV-W3, respectively. It is a resistance element for V-phase output voltage detection and W-phase output voltage detection connected to the output end y. Further, the W-phase single-phase power converter INV-W1a has a function of supplying power to the state detection device 2b.
The other parts are designated by the same symbols as in FIG. 1 and the description thereof will be omitted.

FIG. 8 is a configuration diagram of the state detection device 2b in FIG. 7.
In the figure, 11e to 11g are voltage conversion circuits for detecting output voltages of U phase to W phase, respectively, and 12e to 12g are AD conversion circuits for converting output signals of voltage conversion circuits 11e to 11g into digital signals, 14e. ~ 14g is a serial conversion circuit that converts the output signals of the AD conversion circuits 12e to 12g into serial signals necessary for transmission, and 16b calculates and outputs seven AD conversion control signals for controlling the AD conversion circuits 12a to 12g. The AD conversion control circuit 17b as the conversion timing control means is a serial signal selection circuit that selects and outputs one of the seven serial signals output from the serial conversion circuits 14a to 14g.
The other parts are designated by the same symbols as in FIG. 2 and the description thereof will be omitted.

FIG. 9 is a waveform diagram showing the operation of the AD conversion control circuit 16b.
9 (6) C _IG to (12) C _VW are AD conversion control signals output from the AD conversion control circuit 16b. Of these, FIGS. 9 (10) C _VU to (12) C _VW are control signals for AD conversion circuits 12e to 12 g that AD convert the detection results of each phase output voltage, and other FIGS. 9 (1) to 9 (9). ) Is the same as in FIG.

Next, the operation for outputting FIGS. 9 (10) C _VU to (12) C _VW by the AD conversion control circuit 16b will be described.
As shown in FIG. 4 (9), Bit0 = "1", Bit1 so that the C _VU outputs "1" when the output of the 4-bit binary counter becomes 9 in decimal conversion. The logical product may be obtained under the conditions of = "0", Bit2 = "0", and Bit3 = "1". Similarly, as "1" when the output of FIG. 9 _{(11) C VV} 4-bit binary counter reaches 11 decimal converted is output, as shown in FIG. 4 (11) Bit0 = "1 , Bit1 = "1", Bit2 = "0", Bit3 = "1", and the logical product should be taken. In Fig. 9 (12) C _VW , the output of the 4-bit binary counter is 13 in decimal conversion. As shown in FIG. 4 (13), the logical product is obtained under the conditions of Bit0 = "1", Bit1 = "0", Bit2 = "1", and Bit3 = "1" so that "1" is output when becomes. Should be taken.
As is clear from the waveform of FIG. 9, the operation of the state detection device 2b including the serial signal selection circuit 16b has a configuration in which the number of detections is increased as compared with the state detection device 2a of the first embodiment, and the increased portion is Since the operation is similar to that of the first embodiment, detailed description thereof will be omitted.

<Third Embodiment>
Next, a third embodiment of the present invention will be described.
FIG. 10 shows an electric motor drive system to which this third embodiment is applied, and similarly to the first and second embodiments, a three-phase power converter 107 composed of a three-phase series multiplexing converter makes three phases. It drives the electric motor 203 of the above.

In FIG. 10, 1c is a main control device for controlling the entire power conversion device 107, 2c is a state detection device, and RT _DIU is a neutral point O and a single-phase power converter INV- for detecting a U-phase current. A resistor element with a temperature detection function connected to the AC output terminal x of U1, similarly, RT _DIV and RT _DIW are the outputs of the neutral point O and the single-phase power converters INV-V1 and INV-W1a, respectively. It is a resistance element for V-phase current detection and W-phase current detection with a temperature detection function connected to the end x. Further, the RT _DIG is a resistance element with a temperature detection function for detecting a ground fault current connected between the neutral point O and the ground terminal E.
The other parts are designated by the same symbols as those in FIGS. 1 and 7, and the description thereof will be omitted.

FIG. 11 is a configuration diagram of the state detection device 2c in FIG.
In FIG. 11, 11h is a voltage conversion circuit used for detecting the temperature of the resistance element for detecting the ground fault current, and 11i to 11k are used for detecting the temperature of the resistance element for detecting the U-phase to W-phase current. The voltage conversion circuit, 12h is an AD conversion circuit that AD-converts the output signal of the voltage conversion circuit 11h, 12i to 12k is an AD conversion circuit that AD-converts the output signals of the voltage conversion circuits 11i to 11k, and 14h is the output of the AD conversion circuit 12h. The serial conversion circuit 14i to 14k that converts a signal into a serial signal necessary for transmission is a serial conversion circuit that converts the output signal of the AD conversion circuits 12i to 12k into a serial signal necessary for transmission.
Further, 16c is an AD conversion control circuit as a conversion timing control means for calculating and outputting eight AD conversion control signals for controlling the AD conversion circuits 12a to 12k, and 17c is output from the serial conversion circuits 14a to 14k. It is a serial signal selection circuit that selects and outputs one of eight serial signals. Other parts are designated by the same reference numerals as those in FIGS. 2 and 8 and the description thereof will be omitted.

Resistance elements as current detecting means shown in FIG. 10 As temperature detecting elements attached to RT _DIG , RT _DIU , RT _DIV , RT _DIW , resistance temperature detectors and semiconductors using platinum or the like whose resistance value changes depending on the temperature are used. The thermistor, thermocouple, etc. used can be used, but the thermistor is suitable because the resistance element for current detection used for high-precision and high-speed calculation needs a quick response to temperature changes. It can be said that. There are various types of thermistors, but the relationship between temperature and resistance can be expressed by a simple approximation formula, and NTC (negative) has a negative temperature characteristic in which the resistance decreases monotonically as the temperature rises. temperature coefficient) Thermistor is the best.

FIG. 12 is a configuration diagram of the voltage conversion circuit 11h in FIG. In FIG. 12, Q ₁ is an operational amplifier, R ₁ and R ₂ are set resistors for forming a non-inverting amplifier in combination with the operational amplifier Q _1, and RP _TIG is attached to the resistance element RT _DIG for detecting ground fault current. This is a feeding resistor for feeding the NTC thermistor (not shown).
In the voltage conversion circuit 11h, the non-inverting amplifier amplifies the voltage obtained by dividing the power supply voltage _Vcc by the fixed resistance value of the feeding resistance RP _{TIG and} the resistance value of the NTC thermistor that changes depending on the temperature, and corresponds to the detected temperature. Output as voltage V _TIG . This voltage (analog signal) V _TIG is converted into a digital signal D _TIG by the AD conversion circuit 12h according to the AD conversion control signal C _TIG output from the AD conversion control circuit 16c of FIG. Then, this digital signal D _TIG is converted into a serial signal S _TIG by the serial conversion circuit 14h, converted into an optical signal by the EO conversion circuit 15 via the serial signal selection circuit 17c, and then converted into an optical signal via the optical fiber 41. It is transmitted to the control device 1c.
The operation of the AD conversion control circuit 16c may be the same as that of the AD conversion control circuit 16b in the second embodiment.

<Fourth Embodiment>
Next, a fourth embodiment of the present invention will be described.
Figure 13 is a block diagram of a resistive element group for detecting the ground fault current I _G, can be used as, for example, a resistance element R _DIG of the first embodiment and the second embodiment.
In FIGS. 13A and _13B , the resistor elements R _DIG1 and R _DIG2 connected in series are connected between the neutral point O and the grounding point G of the power conversion device. FIG (a) takes the voltage _{V DIG} corresponding to the ground fault current _{I G} from both ends of the resistance element _{R DIG1} neutral point O side, FIG. (B) both ends of the resistor element _{R DIG2} the ground point G side It is taken out from. The extracted voltage V _DIG is input to the ground fault current detection unit of the state detection device.

14 (a) and 14 (b) are configuration diagrams of a group of resistance elements as voltage detecting means for detecting the U-phase output voltage, and the resistance elements R _DVU1 and R _DVU2 connected in series are power conversion devices, respectively. It is arranged on the neutral point O side and the U phase output end side. The U-phase output voltage between the neutral point O and the U-phase output end is _divided by the resistor elements R _DVU1 and R _DVU2 connected in series, and the _divided voltage is neutral in FIG. 14 (a). It is taken out from both ends of the resistance element R _DVU1 on the point O side, and in FIG. 14B, it is taken out from both ends of the resistance element R _DVU2 on the U-phase output end side. Then, the extracted voltage is input as V _{DVU to} the U-phase output voltage detection unit of the state detection device.
The V-phase and W-phase output voltages can also be detected by the same method as in FIGS. 14A and 14B.

In the configuration of FIG. 13, the value of the resistance element _{R DIG1} neutral point O side smaller than the value of the resistance element _{R DIG2} the ground point G side, in the configuration of FIG. 14, the resistance element of the neutral point O side _{R DVU1} By making the value of R _DVU2 smaller than the value of the resistance element R _DVU2 on the U-phase output end side, the voltage input to the state detection device needs to be considered only with the value based on the neutral point O, which simplifies the circuit. can do.

<Fifth Embodiment>
Next, a fifth embodiment of the present invention will be described.
FIG. 15 shows an electric motor drive system to which the fifth embodiment is applied, and similarly, a three-phase electric motor 203 is driven by a power converter 108 configured by a three-phase serial multiplex converter. is there.
In FIG. 15, 1d is a main control device, 2d is a state detection device, and 403, 404, and 405 are current detectors for each phase as in FIG. 21. The other parts are designated by the same symbols as those in FIGS. 1 and 7, and the description thereof will be omitted.

FIG. 16 is a configuration diagram of the state detection device 2d in FIG.
Regarding the numbers (1) to (6) assigned in the state detection devices 2d of FIGS. 15 and 16, (1) is a U-phase power feeding unit for supplying power to the U-phase current detector 403, (2). Is a U-phase current detector for inputting a detection signal output from the U-phase current detector 403. Similarly, the numbers (3) and (5) are the V-phase feeding unit and the W-phase feeding unit for the V-phase and W-phase current detectors 404 and 405, respectively, and the numbers (4) and (6) are the V-phase, respectively. , V-phase current detector and W-phase current detector for inputting detection signals output from W-phase current detectors 404 and 405.

Reference numeral 22 denotes a power supply circuit in which the power supply voltage V _cc is supplied via the capacitor C1 on the output side of the power supply circuit 21, and C2 is a capacitor as a storage element to which the output voltage V _PCT of the power supply circuit 22 is applied. Here, a circuit having a voltage adjusting function such as a 3-terminal regulator or a DC / DC converter can be used for the power supply circuit 22, and the output voltage V _PCT of the power supply circuit 22 is fed to the current detector of each phase. It is supplied to parts (1), (3), and (5).
U-phase current detection unit in FIG. 16 (2), the detection signal of the U-phase current detector 403 is input to the state detection device 2d as a voltage _{V CTIU,} is converted into a voltage _{V IU} by the voltage conversion circuit 11b , Since the operation is the same as that in FIG. 2 and the like, detailed description thereof will be omitted. The V-phase current detection unit (4) and the W-phase current detection unit (6) also operate in the same manner as the U-phase current detection unit (2).

<Sixth Embodiment>
Next, a sixth embodiment of the present invention will be described.
FIG. 17 shows an electric motor drive system to which the sixth embodiment is applied, and similarly, a three-phase electric motor 203 is driven by a power converter 109 configured by a three-phase serial multiplex converter. is there.
In FIG. 17, 1e is a main control device, 2e is a state detection device, and the main control device 1e can supply power to the state detection device 2e. The other parts are designated by the same symbols as those in FIGS. 1 and 7, and the description thereof will be omitted.

In the sixth embodiment, the voltage supplied from the main control device 1e via the power supply line P _SD1 is insulated by the power transformer 31 and supplied to the state detection device 2e via the power supply line P _SD2 . Since there is a power transformer 31 in the middle of the power supply path, the power supply has an AC or pulse-like repeating waveform with a frequency component. Generally, the higher the frequency component, the smaller the power transformer can be, so a high-frequency power transformer should be used. Is desirable. In FIG. 17, an independent power transformer 31 is used, but the power transformer may be attached to the board or housing of the main control device 1e or the state detection device 2e and integrated.

<7th Embodiment>
Next, a seventh embodiment of the present invention will be described.
FIG. 18 shows an electric motor drive system to which the seventh embodiment is applied, and similarly, a three-phase electric motor 203 is driven by a power converter 110 configured by a three-phase serial multiplex converter. is there.
In FIG. 18, 1f is a main control device having a function of transmitting a serial signal to the state detection device 2f, 2f is a state detection device having a function of receiving a serial signal transmitted from the main control device 1f, and 42 is an optical fiber. .. The other parts of FIG. 18 will be omitted by using the same symbols as those in FIGS. 1, 7 and the like.

FIG. 19 is a configuration diagram of the state detection device 2f in FIG. 19, 42 the main control unit 1f optical fiber for transmitting the serial signal _{S LR} sent to state detection device 2f from 20 O-E conversion circuit for converting an optical signal into an electric signal, 18a is O- This is an AD conversion control circuit as a conversion timing control means that operates by receiving the output of the E conversion circuit 20. The other parts of FIG. 18 will be omitted by using the same symbols as those of FIGS. 2 and 8.

In the configuration as in the first embodiment described above, the cycle for AD conversion of the detected current and voltage is constant, and is asynchronous with the calculation cycle on the CPU side of the main control device. For this reason, it is necessary to make the conversion operation of the AD conversion circuit sufficiently fast, for example, by making it 10 times the calculation cycle of the CPU.
The digital signal converted from the analog signal is meaningless unless it is converted into a serial signal each time AD conversion is performed and transmitted to the CPU side of the main controller through the optical fiber. As a result, it matches the conversion operation of the AD conversion circuit. It was necessary to speed up the overall operation.

On the other hand, by using the configurations of FIGS. 18 and 19 according to the present embodiment, the state detection device 2f can receive the signal output by the main control device 1f. For example, the timing at which the CPU of the main control device 1f starts the calculation is set as a pulse signal by a method not shown in the drawing, and the optical signal _SLR is transmitted by EO conversion in the main control device 1f. This optical signal S _LR is received by the state detection device 2f through the optical fiber 42 and converted into an electric signal S _R by the OE conversion circuit 20. At the timing of receiving the electric signal S _R, it is sufficient to AD conversion control circuit 18a operates.
By providing the above configuration and functions, the conversion operation by the AD conversion circuits 12a to 12d in the state detection device 2f can be synchronized with the calculation cycle of the CPU on the main control device 1f side.

FIG. 20 is a waveform diagram for explaining the operation of the AD conversion control circuit 18a of FIG.
In the AD conversion control circuit 18a, Bit0 = "1", Bit1 = "1", Bit2 = "1" in FIG. 4 (15) in which the internal 4-bit binary counter becomes "15" in decimal conversion in the initial state. ", Bit3 =" 1 "is stopped. In this state, when the optical signal S signal based on the _LR S _R from the main controller 1f _(signal indicating the operation start of the CPU) is input as shown in FIG. 20 (0) to ※ 1, 2 binary counter , Bit0 = "0", Bit1 = "0", Bit2 = "0", Bit3 = "0" in FIG. 4 (0), which is "0" in decimal conversion.

After that, the AD conversion control signal is output in the process of adding the binary counters by 1 as in FIG. When the value of the binary counter is in a state of decimal "15" counter becomes stopped, as indicated by the 2 ※ Figure 20, to repeat the operation from the signal S _R is input again ※ 1 Operate.

The state detection device according to the present invention can be used for an electric motor drive system, a power conversion device connected to a power supply system, and the like.

1a to 1f: Main controller 2a to 2f: State detection device 11a to 11k: Voltage conversion circuit 12a to 12k: AD (analog-digital) conversion circuit 14a to 14k: Serial conversion circuit 15: EO (electrical-optical) Conversion circuits 16a to 16c, 18a: AD conversion control circuits 17a to 17c: Serial signal selection circuit 20: OE (optical-electric) conversion circuits 21 and 22: Power supply circuit 31: Power transformers 41, 42, 64U1 to 64U3 64V1 to 64V3, 64W1 to 64W3: Optical fiber 105-110: Power converter 202: Multi-winding transformer 203: Electricity 211: Main circuit 403: U-phase current detector 404: V-phase current detector 405: W-phase current Detectors a, b, c: AC input end x, y: AC output end U: U phase output end V: V phase output end W: W phase output end O: Neutral point E: Ground terminal G: Ground point C1 , C2: capacitor _{R DIG, R DIU, R DIV} , R DIW, RT DIG, RT DIU, RT DIV, RT DIW: resistance elements (current detecting means)
R _DVU , R _DVV , R _DVW : Resistance element (voltage detecting means)
SR: Serial reception light-electric conversion module P _SD , P _SD1 , P _SD2 : Power supply line PS: Power supply terminal R1 to R3, S1 to S3, T1 to T3: Secondary winding output terminal INV-U1 to INV- U3: U-phase single-phase power converter INV-V1 to INV-V3: V-phase single-phase power converter INV-W1 to INV-W3: W-phase single-phase power converter INV-W1a: With power supply function W-phase single-phase power converter

Claims (7)

It consists of n (n is an integer of 1 or more) single-phase power converters, and when n = 1, the two AC output ends of the single-phase power converter are used as the first and second AC output ends, and n When = 2 or more, a single-phase power conversion unit with two AC output ends located at the start and end points of the series connection circuit on the AC output side of n single-phase power converters as the first and second AC output ends. Configure and
The first AC output end of the single-phase power conversion unit of m (m is an integer of 2 or more) is commonly connected to form a neutral point, and the second AC of the single-phase power conversion unit of m units is used. The electrical state of the power converter is targeted at a power converter having an output end connected to each phase of the same AC load or AC power supply and having a main controller for controlling the single-phase power converter. In the state detection device for monitoring
A first detecting means installed between the neutral point and the grounding point,
A first analog-to-digital conversion means that converts an analog signal output from the first detection means into a first digital signal and outputs the signal.
A first serial conversion means that converts the first digital signal into a first serial signal and outputs the signal.
A second detection means attached between at least (m-1) of the first AC output ends and the neutral point, and
A second analog-to-digital conversion means that converts an analog signal output from the second detection means into a second digital signal and outputs the signal.
A second serial signal conversion means that converts the second digital signal into a second serial signal and outputs the signal.
A conversion timing control means for controlling the conversion timing of all the analog-to-digital conversion means,
A serial signal selection means that selects and outputs one of the output signals of all the serial conversion means,
An electric-optical conversion means that converts an output signal of the serial signal selection means into an optical signal and outputs it to the main control device as a signal indicating the state of the power conversion device.
The first and second detection means, the first and second analog-digital conversion means, the first and second serial conversion means, the conversion timing control means, the serial signal selection means, and the electric-light. A power supply means that supplies power to a circuit including a conversion means,
With
A state detection device characterized in that power is supplied to the power supply means from any of the single-phase power converters. In the state detection device according to claim 1,
A third detection means attached between the m second AC output ends and the neutral point, and
A third analog-to-digital conversion means that converts an analog signal output from the third detection means into a third digital signal and outputs the signal.
A third serial conversion means that converts the third digital signal into a third serial signal and outputs the signal.
With more
The conversion timing control means controls the conversion timing of all the analog-digital conversion means including the third analog-digital conversion means.
The serial signal selection means selects and outputs one of the output signals of all the serial conversion means including the third serial conversion means.
The state detection device is characterized in that the power supply means also supplies power to the third detection means, the third analog-digital conversion means, and the third serial conversion means. In the state detection device according to claim 1 or 2.
At least one of the detection means includes a temperature detection means and
A fourth analog-to-digital conversion means that converts an analog signal output from the temperature detecting means into a fourth digital signal and outputs the signal.
Further provided with a fourth serial conversion means for converting the fourth digital signal into a fourth serial signal and outputting the signal.
The conversion timing control means controls the conversion timing of all the analog-digital conversion means including the fourth analog-digital conversion means.
The serial signal selection means selects and outputs one of the output signals of all the serial conversion means including the fourth serial conversion means.
The state detection device is characterized in that the power feeding means also supplies power to the fourth analog-digital conversion means and the fourth serial conversion means. In the state detection device according to any one of claims 1 to 3,
At least one of the first detection means or the second detection means is composed of a plurality of resistance elements, and the voltage from the resistance element closest to the neutral point of the power conversion device among these resistance elements. A state detection device characterized by detecting. In the state detection device according to any one of claims 1 to 4.
A fifth detection means connected between the second AC output end of the single-phase power conversion unit in the m range and each phase of the AC load or AC power supply, respectively.
Further provided with a power supply means for supplying power to the fifth detection means.
The second analog-to-digital conversion means is a state detection device that converts an analog signal output from the fifth detection means into the second digital signal. In the state detection device according to any one of claims 1 to 5,
A state detection device characterized in that power is supplied to the power supply means from a system other than the single-phase power converter. In the state detection device according to any one of claims 1 to 6.
A state detection device further comprising means for converting an optical signal output from the main control device into an electric signal and outputting the electric signal as an operation control signal for the conversion timing control means.

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