JP6808997B2 - Signal processing circuit, physical quantity detection device, attitude calculation device, electronic device and mobile body - Google Patents

Description

The present invention relates to a signal processing circuit, a physical quantity detection device, a posture calculation device, an electronic device, and a mobile body.

In a system that performs various controls according to the posture of a moving body such as a robot or a vehicle, a posture calculation device that calculates the posture of the moving body using data detected by various sensors such as an angular velocity sensor attached to the moving body. Is used. For example, Patent Document 1 describes an angular velocity sensor, an acceleration sensor, and a magnetic sensor that measure angular velocity, acceleration, and geomagnetism on three axes, respectively, and an arithmetic processing unit that calculates an estimated value of quaternion based on the measured values of these sensors. A small attitude sensor with and is disclosed.

Japanese Unexamined Patent Publication No. 2013-200162

However, in the conventional posture calculation device, a processing unit (CPU (Central Processing Unit) or the like) that performs posture calculation communicates with various sensors attached to the moving body to acquire and acquire data for three axes. Since the attitude calculation is performed using the data for the three axes, the rate of the attitude calculation cannot be higher than the reception rate of the data for the three axes. That is, the conventional posture calculation device has a problem that the posture calculation cycle becomes long depending on the communication rate between the processing unit and the sensor, and it is difficult to improve the accuracy of the posture calculation.

The present invention has been made in view of the above problems, and according to some aspects of the present invention, a signal processing circuit capable of improving the accuracy of posture calculation as compared with the conventional case, and physical quantity detection. A device and a posture calculation device can be provided. Further, according to some aspects of the present invention, it is possible to provide an electronic device and a mobile body using the posture calculation device.

The present invention has been made to solve at least a part of the above-mentioned problems, and can be realized as the following aspects or application examples.

[Application example 1]
The signal processing circuit according to this application example includes a detection circuit that generates a first physical quantity signal based on the output signal of the physical quantity detection element, a first terminal capable of outputting the first physical quantity signal, and second and second terminals. It includes a second terminal capable of inputting a physical quantity signal of the Nth (N ≧ 2), and a posture calculation unit capable of executing a posture calculation based on the first to Nth physical quantity signals.

While the conventional attitude calculation device communicates with the external device to acquire the first to Nth physical quantity signals and executes the attitude calculation, the signal processing circuit according to this application example is the first generated by the detection circuit. The attitude calculation is executed based on the first physical quantity signal and the second to Nth physical quantity signals acquired from the outside via the second terminal. That is, the signal processing circuit according to this application example does not need to communicate with an external device to acquire the first physical quantity signal, and in parallel with acquiring the second to Nth physical quantity signals from the outside. Since the detection circuit can generate the first physical quantity signal, the time for acquiring the first to Nth physical quantity signals can be shortened. As a result, according to the signal processing circuit according to the present application example, the cycle of the posture calculation is shorter than in the conventional case, and the accuracy of the posture calculation can be improved.

Further, the signal processing circuit according to this application example can output the first physical quantity signal from the first terminal and can input the second to Nth physical quantity signals from the second terminal. It can function as a circuit (master) that executes a physical quantity signal using the physical quantity signal input from the terminal 2, or can function as a circuit (slave) that outputs a physical quantity signal used for the physical quantity calculation. Therefore, for example, by electrically connecting the second terminal of the first signal processing circuit and the first terminal of each of the second to Nth signal processing circuits, the first signal processing circuit becomes the first. It is possible to configure a posture calculation device that generates the physical quantity signal of 1 and acquires the 2nd to Nth physical quantity signals from the 2nd to Nth signal processing circuits to execute the posture calculation. Since such an attitude calculation device can be realized by using N signal processing circuits having the same configuration, the development cost can be reduced.

[Application example 2]
In the signal processing circuit according to the above application example, the posture calculation unit may perform the posture calculation using a quaternion.

[Application example 3]
In the signal processing circuit according to the above application example, the posture calculation unit may calculate the first to Nth angles by integrating each of the first to Nth physical quantity signals as the posture calculation.

[Application example 4]
In the signal processing circuit according to the above application example, the posture calculation unit may perform the posture calculation using a rotation matrix.

[Application example 5]
The signal processing circuit according to the application example includes a drive circuit that generates a drive signal for driving the physical quantity detection element, and the attitude calculation unit performs the attitude calculation using a clock signal based on the drive signal. You may.

According to the signal processing circuit according to this application example, the drive signal for driving the physical quantity detection element has a smaller frequency deviation than the clock signal generated by using the CR oscillation circuit, the ring oscillator, or the like. By using the based clock signal, the accuracy of the attitude calculation can be improved. For example, in an attitude calculation using a physical quantity signal sampled based on a clock signal having a relatively large frequency deviation, a sampling period (period of time integration) using a clock signal based on a drive signal having a relatively small frequency deviation. By correcting the above, the accuracy of the posture calculation can be improved.

[Application example 6]
The signal processing circuit according to the above application example includes a storage unit that stores setting information of the correspondence relationship between the first to first physical quantity signals and the first to Nth detection axes, and the posture calculation unit is the posture calculation unit. The posture calculation may be performed using the setting information.

According to the signal processing circuit according to this application example, the correspondence between the first to Nth physical quantity signals and the first to Nth detection axes can be changed by changing the setting information. A highly efficient signal processing circuit can be realized.

[Application 7]
In the signal processing circuit according to the above application example, each of the first to Nth physical quantity signals may be an angular velocity signal.

[Application Example 8]
The signal processing circuit according to the above application example may include a correction processing unit that corrects the posture calculation by the posture calculation unit based on the output signals of at least one of the acceleration detection element and the geomagnetic detection element.

According to the signal processing circuit according to this application example, the error of the attitude calculation (for example, the integration error) can be corrected by using the output signals of at least one of the acceleration detection element and the geomagnetic detection element, so that the accuracy of the attitude calculation can be corrected. Can be improved.

[Application 9]
The physical quantity detection device according to this application example includes any of the above signal processing circuits and a physical quantity detection element.

Whereas the conventional posture calculation device communicates with the external device to acquire the first to Nth physical quantity signals and executes the posture calculation, in the physical quantity detection device according to this application example, the signal processing circuit detects. The attitude calculation is executed based on the first physical quantity signal generated by the circuit and the second to Nth physical quantity signals acquired from the outside via the second terminal. That is, the physical quantity detecting device according to this application example does not need to communicate with the external device to acquire the first physical quantity signal, and also acquires the second to Nth physical quantity signals from the outside in parallel. Since the detection circuit can generate the first physical quantity signal, the time for acquiring the first to Nth physical quantity signals can be shortened. As a result, according to the physical quantity detection device according to the present application example, the cycle of the posture calculation is shorter than in the conventional case, and the accuracy of the posture calculation can be improved.

[Application Example 10]
The attitude calculation device according to the present application example includes N physical quantity detection devices, the second terminal of the signal processing circuit provided by the first physical quantity detection device, and the second to second Nth devices. The first terminal of the signal processing circuit provided in each of the physical quantity detection devices is electrically connected, and the posture calculation unit of the signal processing circuit provided in the first physical quantity detection device is said. Performs posture calculation.

According to this application example, the first signal processing circuit included in the first physical quantity detecting device generates the first physical quantity signal, and the second and Nth physical quantity detecting devices are passed through the second terminal. It is possible to configure a posture calculation device that executes a posture calculation by acquiring the second to Nth physical quantity signals output from the first terminals of the second to Nth signal processing circuits provided by the two.

In the attitude calculation device according to the present application example, the signal processing circuit included in the first physical quantity detection device does not need to communicate with the external device to acquire the first physical quantity signal, and the second to second N Since the detection circuit can generate the first physical quantity signal in parallel with acquiring the second to Nth physical quantity signals from the physical quantity detection device of the above, the time for acquiring the first to Nth physical quantity signals is Can be shortened. As a result, according to the posture calculation device according to the present application example, the posture calculation cycle is shorter than in the conventional case, and the accuracy of the posture calculation can be improved.

Further, since the posture calculation device according to this application example can be realized by using N physical quantity detection devices having the same configuration, the development cost can be reduced.

[Application Example 11]
The electronic device according to this application example includes the above-mentioned posture calculation device.

[Application 12]
The moving body according to this application example includes the above-mentioned posture calculation device.

According to these application examples, since the posture calculation device capable of improving the accuracy of the posture calculation as compared with the conventional one is provided, for example, it is possible to realize a highly reliable electronic device and a moving body. ..

The functional block diagram of the physical quantity detection apparatus of this embodiment. Top view of the vibrating piece of the physical quantity detecting element. The figure for demonstrating the operation of a physical quantity detection element. The figure for demonstrating the operation of a physical quantity detection element. The figure which shows the structural example of a drive circuit. The figure which shows the configuration example of the posture calculation part. The figure which shows an example of the communication format via the 1st interface circuit. The figure which shows an example of the communication format via the 1st interface circuit. The figure which shows an example of the communication format via the 1st interface circuit. The figure which shows an example of the communication format via the 2nd interface circuit. The figure which shows an example of the communication format via the 2nd interface circuit. The figure which shows an example of the address map of a register. The figure which shows the data structure of each writable address shown in FIG. The figure which shows an example of the address map of the non-volatile memory. The figure which shows the data structure of each address shown in FIG. The functional block diagram of the physical quantity detection device of the modification. The figure which shows the configuration example of the posture calculation apparatus of this embodiment. The figure which shows an example of the time chart of posture calculation. The functional block diagram which shows an example of the structure of the electronic device of this embodiment. The perspective view which shows typically the digital camera which is an example of an electronic device. The figure which shows an example of the moving body of this embodiment.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. It should be noted that the embodiments described below do not unreasonably limit the content of the present invention described in the claims. Moreover, not all of the configurations described below are essential constituent requirements of the present invention.

In the following, a physical quantity detection device (angular velocity detection device) that detects an angular velocity as a physical quantity will be described as an example.

1. 1. Physical quantity detector 1-1. FIG. 1 is a functional block diagram of the physical quantity detection device of the present embodiment. The physical quantity detection device 1 of the present embodiment includes a physical quantity detection element (sensor element) 2 for outputting an analog signal related to the physical quantity and a signal processing circuit 3.

The physical quantity detecting element 2 has a vibrating piece in which a driving electrode and a detecting electrode are arranged. Generally, in order to reduce the impedance of the vibrating piece as much as possible and improve the oscillation efficiency, the vibrating piece is ensured to be airtight. It is sealed in the package. In the present embodiment, the physical quantity detecting element 2 has a so-called double T-shaped vibrating piece having two T-shaped driving vibrating arms.

FIG. 2 is a plan view of a vibrating piece of the physical quantity detecting element 2 of the present embodiment. The physical quantity detecting element 2 has, for example, a double T-shaped vibrating piece formed of a Z-cut crystal substrate. The vibrating piece made of quartz has an advantage that the detection accuracy of the angular velocity can be improved because the fluctuation of the resonance frequency with respect to the temperature change is extremely small. The X-axis, Y-axis, and Z-axis in FIG. 2 indicate the crystal axis.

As shown in FIG. 2, in the vibrating piece of the physical quantity detecting element 2, the driving vibrating arms 101a and 101b extend from the two driving bases 104a and 104b in the + Y-axis direction and the −Y-axis direction, respectively. Drive electrodes 112 and 113 are formed on the side surface and the upper surface of the drive vibrating arm 101a, respectively, and drive electrodes 113 and 112 are formed on the side surface and the upper surface of the drive vibration arm 101b, respectively. The drive electrodes 112 and 113 are connected to the drive circuit 20 via the DS terminal and the DG terminal of the signal processing circuit 3 shown in FIG. 1, respectively.

The drive bases 104a and 104b are connected to the rectangular detection base 107 via connecting arms 105a and 105b extending in the −X axis direction and the + X axis direction, respectively.

The detection vibrating arm 102 extends from the detection base 107 in the + Y-axis direction and the −Y-axis direction. Detection electrodes 114 and 115 are formed on the upper surface of the detection vibrating arm 102, and a common electrode 116 is formed on the side surface of the detection vibration arm 102. The detection electrodes 114 and 115 are connected to the detection circuit 30 via the S1 terminal and the S2 terminal of the signal processing circuit 3 shown in FIG. 1, respectively. Further, the common electrode 116 is grounded.

When an AC voltage is applied as a drive signal between the drive electrodes 112 and the drive electrodes 113 of the drive vibrating arms 101a and 101b, as shown in FIG. 3, the drive vibrating arms 101a and 101b are shown by the inverse piezoelectric effect as shown by the arrow B. In addition, the tips of the two drive vibration arms 101a and 101b perform bending vibration (excitation vibration) in which the tips of the two driving vibration arms 101a and 101b repeatedly approach and separate from each other.

In this state, when an angular velocity with the Z axis as the rotation axis is applied to the vibrating piece of the physical quantity detecting element 2, the drive vibrating arms 101a and 101b coriolis in the direction perpendicular to both the bending vibration direction of the arrow B and the Z axis. Get the power of. As a result, as shown in FIG. 4, the connecting arms 105a and 105b vibrate as shown by the arrow C. Then, the detection vibrating arm 102 bends and vibrates as shown by the arrow D in conjunction with the vibration (arrow C) of the connecting arms 105a and 105b. The bending vibration of the detected vibrating arm 102 and the bending vibration (exciting vibration) of the driving vibrating arms 101a and 101b due to the Coriolis force are out of phase by 90 °.

By the way, if the magnitude of the vibration energy or the magnitude of the vibration amplitude when the drive vibration arms 101a and 101b perform bending vibration (excitation vibration) is equal to the two drive vibration arms 101a and 101b, the drive vibration arms 101a, The detection vibrating arm 102 does not bend and vibrate when the vibration energy of 101b is balanced and the physical quantity detecting element 2 is not subjected to angular velocity. However, if the vibration energies of the two drive vibration arms 101a and 101b are out of balance, bending vibration is generated in the detection vibration arm 102 even when the physical quantity detection element 2 is not subjected to an angular velocity. This bending vibration is called leakage vibration, which is the bending vibration of arrow D like the vibration based on the Coriolis force, but has the same phase as the drive signal.

Then, due to the piezoelectric effect, AC charges based on these bending vibrations are generated at the detection electrodes 114 and 115 of the detection vibration arm 102. Here, the AC charge generated based on the Coriolis force changes according to the magnitude of the Coriolis force (in other words, the magnitude of the angular velocity applied to the physical quantity detecting element 2). On the other hand, the AC charge generated based on the leakage vibration is constant regardless of the magnitude of the angular velocity applied to the physical quantity detecting element 2.

At the tips of the drive vibrating arms 101a and 101b, a rectangular weight portion 103 wider than the drive vibrating arms 101a and 101b is formed. By forming the weight portion 103 at the tips of the drive vibrating arms 101a and 101b, the Coriolis force can be increased and a desired resonance frequency can be obtained with a relatively short vibrating arm. Similarly, a weight portion 106 wider than the detection vibrating arm 102 is formed at the tip of the detection vibrating arm 102. By forming the weight portion 106 at the tip of the detection vibrating arm 102, the AC charge generated in the detection electrodes 114 and 115 can be increased.

As described above, the physical quantity detecting element 2 detects the AC charge (angular velocity component) based on the Coriolis force and the AC charge (vibration leakage component) based on the leakage vibration of the excitation vibration with the Z axis as the detection axis. Output via 115. The physical quantity detecting element 2 functions as an angular velocity sensor that detects the angular velocity.

Returning to FIG. 1, the signal processing circuit 3 of the present embodiment includes a reference voltage circuit 10, a drive circuit 20, a detection circuit 30, an attitude calculation unit 40, a clock generation circuit 50, a storage unit 60, a first interface circuit 70, and a second. It is configured to include an interface circuit 80, and may be, for example, a one-chip integrated circuit (IC). The signal processing circuit 3 of the present embodiment may have a configuration in which some of these elements are omitted or changed, or other elements are added.

The reference voltage circuit 10 generates constant voltages and currents such as reference voltages VR1 and VR2 from the power supply voltage supplied from the VDD terminal of the signal processing circuit 3 and supplies them to the drive circuit 20 and the detection circuit 30.

The drive circuit 20 generates a drive signal DRV for driving (exciting and vibrating) the physical quantity detection element 2 and supplies the drive signal DRV to the drive electrode 112 of the physical quantity detection element 2 via the DS terminal. Further, in the drive circuit 20, the oscillation current generated in the drive electrode 113 due to the excitation vibration of the physical quantity detection element 2 is input via the DG terminal, and the amplitude of the drive signal DRV is maintained so that the amplitude of the oscillation current is kept constant. Feedback control of the level. Further, the drive circuit 20 generates a detection signal SDET having the same phase as the drive signal DRV, and outputs the detection signal SDET to the detection circuit 30.

FIG. 5 is a diagram showing a configuration example of the drive circuit 20. As shown in FIG. 5, the drive circuit 20 includes an I / V conversion circuit 21, a low-pass filter 22, a high-pass filter 23, a comparator 24, a full-wave rectifier circuit 25, an integrator 26, a comparator 27, and a comparator 28. It is composed of. The drive circuit 20 of the present embodiment may have a configuration in which some of these elements are omitted or changed, or other elements are added.

The I / V conversion circuit 21, the low-pass filter 22, the high-pass filter 23, the comparator 24, the full-wave rectifier circuit 25, the comparator 27, and the comparator 28 operate with reference to the reference voltage VR1 supplied from the reference voltage circuit 10. .. The reference voltage VR1 is an analog ground voltage, which is, for example, a voltage halved from the power supply voltage supplied from the VDD terminal. Further, the integrator 26 operates with reference to the reference voltage VR2 supplied from the reference voltage circuit 10.

The I / V conversion circuit 21 converts the oscillating current generated by the excitation vibration of the physical quantity detection element 2 and input via the DG terminal into an AC voltage signal.

The low-pass filter 22 removes high-frequency components of the output signal of the I / V conversion circuit 21, and the high-pass filter 23 removes low-frequency components (offset, etc.) of the output signal of the low-pass filter 22. A bandpass filter is formed by the lowpass filter 22 and the highpass filter 23, and a signal generated by the excitation vibration of the physical quantity detecting element 2 is passed therethrough.

The comparator 24 compares the voltage of the output signal of the high-pass filter 23 with the reference voltage VR1 to generate a binarized signal. In this binarization signal, the high level voltage is the output voltage of the integrator 26, and the low level voltage is the ground voltage (0V). Then, the output signal of the comparator 24 is supplied to the physical quantity detecting element 2 as a drive signal DRV via the DS terminal. By matching the frequency (drive frequency) of the drive signal DRV with the resonance frequency of the physical quantity detection element 2, the physical quantity detection element 2 can be stably oscillated.

The full-wave rectifier circuit 25 rectifies the output signal of the I / V conversion circuit 21 (full-wave rectification) and outputs a DC signal.

The integrator 26 integrates and outputs the output voltage of the full-wave rectifier circuit 25 with reference to the reference voltage VR2. The output voltage of the integrator 26 decreases as the output voltage of the full-wave rectifier circuit 25 increases (the larger the amplitude of the output signal of the I / V conversion circuit 21). Therefore, the larger the oscillation amplitude, the lower the high-level voltage of the output signal (drive signal DRV) of the comparator 24, and the smaller the oscillation amplitude, the higher the high-level voltage of the output signal (drive signal DRV) of the comparator 24. Therefore, automatic gain control (AGC: Auto Gain Control) is applied so that the oscillation amplitude is kept constant.

The comparator 27 amplifies the voltage of the output signal of the high-pass filter 23 to generate a binarized signal (square wave voltage signal), and outputs it as a detection signal SDET. In this detection signal SDET, the high level voltage is the power supply voltage and the low level voltage is the ground voltage (0V).

The comparator 28 amplifies the voltage of the output signal of the high-pass filter 23 to generate a binarized signal (square wave voltage signal), and outputs it as a clock signal CKF. In this clock signal CKF, the high level voltage is the power supply voltage, and the low level voltage is the ground voltage (0V).

Returning to FIG. 1, the detection circuit 30 includes a QV amplifier 31, a variable gain amplifier (PGA) 32, a synchronous detection circuit 33, an A / D (Analog to Digital) conversion circuit 34, and a DSP (Digital Signal Processor) 35. Is configured to include. The detection circuit 30 of the present embodiment may have a configuration in which some of these elements are omitted or changed, or other elements are added.

The QV amplifier 31 receives an AC charge (detection current) including an angular velocity component and a vibration leakage component from the detection electrode 114 of the physical quantity detection element 2 via the S1 terminal, and generates a voltage signal corresponding to the AC charge. Let me. Further, in the QV amplifier 31, an AC charge (detection current) including an angular velocity component and a vibration leakage component is input from the detection electrode 115 of the physical quantity detection element 2 via the S2 terminal, and a voltage signal corresponding to the AC charge is input. To generate. The AC charge input from the detection electrode 114 to the QV amplifier 31 and the AC charge input from the detection electrode 114 to the QV amplifier 31 are in opposite phases (phase difference is 180 °), and the two are output from the QV amplifier 31. The signals are also out of phase with each other.

The variable gain amplifier 32 amplifies or attenuates the two signals output from the QV amplifier 31, respectively, and outputs two signals having a desired voltage level. The two signals output from the variable gain amplifier 32 are out of phase with each other.

The synchronous detection circuit 33 uses the detection signal SDET output by the drive circuit 20 to synchronously detect angular velocity components included in each of the two signals (detected signals) output from the variable gain amplifier 32. The synchronous detection circuit 33 outputs, for example, two signals output from the variable gain amplifier 32 as they are when the detection signal SDET is at a high level, and is output from the variable gain amplifier 32 when the detection signal SDET is at a low level. It can be configured as a circuit that outputs two signals obtained by inverting the two signals with respect to the reference voltage VR1.

The A / D conversion circuit 34 operates in synchronization with the clock signal ADCCLK generated by the clock generation circuit 50, and converts the voltage value of the difference signal between the two signals output by the synchronous detection circuit 33 into digital data (angular velocity data). And output. The digital data output from the A / D conversion circuit 34 is sequentially updated at a predetermined rate (for example, 1.5 kHz). The A / D conversion circuit 34 may be, for example, a delta-sigma type or a sequential comparison type A / D conversion circuit.

The DSP 35 operates in synchronization with the clock signal DSPCLK generated by the clock generation circuit 50, and performs processing such as filtering digital data (angular velocity data) output from the A / D conversion circuit 34. In order to realize high-speed digital filtering processing by the DSP35, the frequency of the clock signal DSPCLK is sufficiently higher than the output rate (for example, 1.5 kHz) of the A / D conversion circuit 34, for example, about 400 kHz. The value of the digital data output from the DSP 35 represents the angular velocity ω ₁ detected by the physical quantity detecting element 2, and is sequentially updated at a predetermined rate (for example, 1.5 kHz). Further, the DSP 35 outputs a flag signal DRDY indicating that the value ω _{1 of the} digital data has been updated.

Then, the digital data output from the DSP 35 becomes the output data of the detection circuit 30. As described above, the detection circuit 30 is a circuit that generates and outputs digital data (angular velocity data) as the first physical quantity signal based on the output signal of the physical quantity detection element 2.

The posture calculation unit 40 can execute the posture calculation based on the first to Nth (N ≧ 2) physical quantity signals. In the present embodiment, the first to Nth physical quantity signals are angular velocity signals, and the attitude calculation unit 40 acquires digital data (angular velocity ω ₁ ) as the first physical quantity signal from the detection circuit 30 (DSP35). N-1 digital data (angular velocities ω _{2 to} ω _N ) as the _{second to} Nth physical quantity signals are acquired from the storage unit 60 (register 61). Then, the attitude calculation unit 40 uses the setting information of the correspondence relationship between the first to Nth physical quantity signals and the first to Nth detection axes stored in the storage unit 60 (nonvolatile memory 62). , Each detection axis of the acquired first to Nth physical quantity signals (angular velocity ω _{2 to} ω _N ) is recognized, and the attitude calculation is performed.

In the present embodiment, the posture calculation unit 40 performs posture calculation using the quaternion. Alternatively, the posture calculation unit 40 integrates each of the first to Nth physical quantity signals to calculate the first to Nth angles as the posture calculation. Whether the posture calculation unit 40 performs the posture calculation using the quaternion or calculates the first to Nth angles as the posture calculation is determined by the setting information stored in the storage unit 60 (nonvolatile memory 62). Will be done. Further, in the present embodiment, the posture calculation by the posture calculation unit 40 can be set to allow or prohibit, and the posture calculation unit 40 generates a clock signal generated by the clock generation circuit 50 when the posture calculation unit 40 is set to allow. The attitude calculation is performed in synchronization with MCLK, and if it is set to prohibit, the attitude calculation is not performed.

For example, if the attitude calculation unit 40 performs a three-dimensional attitude calculation based on the first to third (N = 3 cases) physical quantity signals, the detection circuit 30 can use the detection circuit 30 as the first physical quantity signal with an angular velocity ω. Digital data (angular velocity data) representing ₁ is sequentially acquired at a predetermined period Δt (for example, 1 / 1.5 kHz ≈0.67 ms). Further, the attitude calculation unit 40 sequentially acquires digital data (angular velocity data) representing the angular velocity ω ₂ as a second physical quantity signal from the storage unit 60 in a predetermined period Δt (for example, 0.67 ms). Further, the attitude calculation unit 40 sequentially acquires digital data (angular velocity data) representing the angular velocity ω ₃ as a third physical quantity signal from the storage unit 60 in a period Δt (for example, 0.67 ms). Further, the attitude calculation unit 40 includes the first to third physical quantity signals stored in the storage unit 60 (nonvolatile memory 62), and the x-axis and y-axis that are orthogonal to each other as the first to third detection axes. , For example, the digital data (angular velocity ω ₁ ) as the first physical quantity signal is recognized as the angular velocity data (angular velocity ω _x ) around the x-axis by using the setting information of the correspondence with the z-axis, and the second physical quantity. Digital data as a signal (angular velocity ω ₂ ) is recognized as angular velocity data around the y-axis (angular velocity ω _y ), and digital data as a third physical quantity signal (angular velocity ω ₃ ) is angular velocity data around the z-axis (angular velocity ω). Recognize as _z ). Then, the quaternion unit 40 is based on the angular velocity ω _x (= ω ₁ ) around the x-axis, the angular velocity ω _y (= ω ₂ ) around the y-axis, and the angular velocity ω _z (= ω ₃ ) around the z-axis. The posture calculation can be performed using. For example, the attitude calculation unit 40 updates the quaternion q according to the equation (1) every time it acquires the angular velocities ω _x , ω _y , ω _z for three axes, and normalizes the updated quaternion q according to the equation (2). By doing so, the posture calculation is performed.

Alternatively, the attitude calculation unit 40 integrates the angular velocity ω _x (= ω ₁ ) around the x-axis to calculate the angle of the x-axis, and integrates the angular velocity ω _y (= ω ₂ ) around the y-axis as the attitude calculation. Then, the angle of the y-axis can be calculated, and the angular velocity ω _z (= ω ₃ ) around the z-axis can be integrated to calculate the angle of the z-axis.

By the way, in the present embodiment, the clock signal ADCCLK, the clock signal DSPCLK and the clock signal MCLK are generated in the clock generation circuit 50 based on the output signals of an oscillation circuit (not shown) such as a CR oscillator or a ring oscillator. Due to process fluctuations and environmental fluctuations, the physical quantity detection device 1 has a frequency deviation of, for example, about ± 1% in the guaranteed operating temperature range (for example, −40 ° C. to + 85 ° C.). Therefore, the update cycle of the digital data output from the detection circuit 30 that operates in synchronization with the clock signal ADCCLK and the clock signal DSPCLK, that is, Δt of the equation (1) has an error of about ± 1%, so that the attitude calculation is performed. The result will also have an error of about ± 1%. On the other hand, since the physical quantity detecting element 2 is made of quartz or the like having good frequency and temperature characteristics, the deviation of the excitation vibration frequency, that is, the frequency of the drive signal DRV is extremely small, for example, about ± 0.01%. Is. Therefore, in the present embodiment, the posture calculation unit 40 performs the posture calculation using the clock signal CKF based on the drive signal DRV.

FIG. 6 is a diagram showing a configuration example of a posture calculation unit 40 that performs a posture calculation using a quaternion. As shown in FIG. 6, the attitude calculation unit 40 includes D flip-flops 41A and 41B, NOT circuit 42, NOR circuit 43, counter 44, multiplier 45A and 45B, conversion unit 46, matrix calculation unit 47, adder 48 and It is configured to include a normalization unit 49. Note that in FIG. 6, the configuration for controlling the permission / prohibition of the posture calculation is omitted.

In the D flip-flop 41A, the clock signal CKF is input to the input terminal (D), and the clock signal MCLK is input to the clock terminal. In the D flip-flop 41B, a signal output from the output terminal (Q) of the D flip-flop 41A is input to the input terminal (D), and the clock signal MCLK is input to the clock terminal. Since the clock signal CKF is asynchronous with the clock signal MCLK, it is synchronized with the clock signal MCLK by the D flip-flops 41A and 41B. In the D flip-flop 41C, a signal (clock signal CKF synchronized with the clock signal MCLK) output from the output terminal (Q) of the D flip-flop 41B is input to the input terminal (D), and the clock signal MCLK is input to the clock terminal. Is entered. From the output terminal (Q) of the D flip-flop 41C, a signal obtained by delaying the output signal of the flip-flop 41B by one cycle of the clock signal MCLK is output.

The NOT circuit 42 outputs a signal in which the voltage level (low level / high level) of the output signal of the D flip-flop 41B is logically inverted. The NOR circuit 43 has a low level when one or both of the output signal of the D flip-flop 41C and the output signal of the NOT circuit 42 is high level, and both the output signal of the D flip-flop 41C and the output signal of the NOT circuit 42 are low. Outputs a high level signal when it is level. That is, the output signal of the NOR circuit 43 includes a plurality of pulses whose high level is increased by one cycle of the clock signal MCLK each time the clock signal CKF changes (rises) from the low level to the high level.

The counter 44 counts the number of pulses of the output signal of the NOR circuit 43 and outputs a count value when the flag signal DRDY is at a low level, and resets the count value to 0 when the flag signal DRDY becomes a high level. This count value represents the frequency ratio of the clock signal CKF and the flag signal DRDY.

The multiplier 45A calculates and outputs the product of the count value output by the counter 44 and the coefficient value COEF. The coefficient value COEF is stored in the storage unit 60 (nonvolatile memory 62) and is a constant value calculated by the equation (3).

In the formula (3), GS is the detection sensitivity (unit: ° / s / LSB) of the detection circuit 30 (GS is the physical quantity detection element 2). Further, FRQ is the frequency (unit: Hz) of the clock signal CKF.

The conversion unit 46 has three axes based on the setting information of the correspondence between the first to third physical quantity signals and the x-axis, y-axis, and z-axis stored in the storage unit 60 (nonvolatile memory 62). The angular velocity data (angular velocity ω ₁ , ω ₂ , ω ₃ ) is converted into the angular velocity ω _x around the x-axis, the angular velocity ω _y around the y-axis, and the angular velocity ω _z around the z-axis and output.

In synchronization with the clock signal MCLK, the matrix calculation unit 47 has an angular velocity ω _x around the x-axis, an angular velocity around the y-axis, and an angular velocity ω _z around the z-axis (both units are LSB) and the latest quaternion q (each element). The unit of q _w , q _x , q _y , and q _z is radian), and the part of the matrix product in the first term on the right side of equation (1) is calculated and output.

The multiplier 45B calculates and outputs the product of the output value of the matrix calculation unit 47 and the output value of the multiplier 45A. The output value of the multiplier 45B corresponds to the calculated value of the first term on the right side of the equation (1).

The adder 48 calculates and outputs the sum of the output value of the multiplier 45B and the latest quaternion q. The output value of the adder 48 corresponds to the calculated value of the equation (1).

The normalization unit 49 synchronizes with the clock signal MCLK and normalizes and outputs the output value of the adder 48 so that its magnitude becomes 1. The output value of the normalization unit 49 corresponds to the calculated value of the equation (2) and becomes the latest quaternion q.

The attitude calculation unit 40 configured in this way obtains the frequency ratio between the clock signal CKF (for example, the frequency deviation is ± 0.01%) and the flag signal DRDY (for example, the frequency deviation is ± 1%), and obtains the frequency. Since Δt is corrected using the ratio and the quaternion q is calculated according to the equations (1) and (2), the accuracy of the attitude calculation is improved.

Returning to FIG. 1, the storage unit 60 has a register 61 and a non-volatile memory 62. The register 61 is set with address and data information used in communication with an external device (first external device) via the first interface circuit 70 and the second interface circuit 80. Further, in the register 61, data acquired by communication with an external device (second to Nth external devices) via the first interface circuit 70 and the second interface circuit 80 (for example, the second to Nth physical quantities). Digital data as a signal), the result of the attitude calculation by the attitude calculation unit 40 (for example, the quarternion q), and the like are stored.

In the non-volatile memory 62, various trimming data (adjustment data and correction data) for the drive circuit 20 and the detection circuit 30 and communication with the outside via the first interface circuit 70 and the second interface circuit 80 are established. Various information is stored. The non-volatile memory 62 can be configured as, for example, a MONOS (Metal Oxide Nitride Oxide Silicon) type memory or an EEPROM (Electrically Erasable Programmable Read-Only Memory).

Further, when the power of the signal processing circuit 3 is turned on (when the voltage of the VDD terminal rises from 0 V to a desired voltage), various trimming data stored in the non-volatile memory 62 are transferred to the register 61 and held. Various trimming data held in the register 61 are supplied to the drive circuit 20 and the detection circuit 30.

Further, as described above, in the present embodiment, the storage unit 60 (nonvolatile memory 62) stores the setting information of the correspondence relationship between the first to Nth physical quantity signals and the first to Nth detection axes. The posture calculation unit 40 performs a posture calculation using the setting information.

The first interface circuit 70 is electrically connected to the XCS terminal, the SCLK terminal, the MOSI terminal, and the MISO terminal, and is a circuit for communicating with the first external device via these terminals. In communication via the first interface circuit 70, the first external device functions as a master, and the physical quantity detection device 1 (signal processing circuit 3) functions as a slave. Then, the first external device writes data to a predetermined address of the register 61, reads data from a predetermined address of the register 61, and transmits various commands via the first interface circuit 70. The operation of the signal processing circuit 3 can be controlled.

In this embodiment, the first interface circuit 70 functions as one of the SPI (Serial Peripheral Interface) interface circuit and ^{I 2 C (Inter-Integrated Circuit} ) interface circuit. For example, the first interface circuit 70 functions as an SPI interface circuit when the XCS terminal is at a low level, a clock signal is input via the SCLK terminal, a data signal is input via the MOSI terminal, and the MISO terminal is used. The data signal is output via. The first interface circuit 70, when the XCS pin is high level, and functions as an I 2 ^C interface circuit, a clock signal is input via the SCLK terminal, the data signal is input and output via the MOSI pin .. 7 to 9 show an example of communication formats (signal waveforms of XCS terminal, SCLK terminal, MOSI terminal, and MISO terminal) via the first interface circuit 70 when the first interface circuit 70 functions as an SPI interface circuit. Is shown. FIG. 7 is a communication format when the first external device writes data to a predetermined address of the register 61. Further, FIG. 8 shows a communication format when the first external device reads data from a predetermined address of the register 61. Further, FIG. 9 shows a communication format when the first external device transmits a predetermined command. In FIGS. 7 to 9, R is a read bit, W is a write bit, A6 to A0 are 7-bit addresses, and D7 to D0 are 8-bit data.

The second interface circuit 80 is a circuit that is electrically connected to the MSCK terminal and the MSDA terminal, and communicates with the second to second external devices via these terminals. In the communication via the second interface circuit 80, the physical quantity detection device 1 (signal processing circuit 3) functions as a master, and the second to second external devices function as slaves. Then, the physical quantity detection device 1 (signal processing circuit 3) writes data to a predetermined address of the storage unit (register) of the second to second external devices via the second interface circuit 80, and the first Data can be read from a predetermined address of the storage unit (register) of the second to Nth external devices.

In this embodiment, second interface circuit 80 functions as I 2 ^C interface circuit, outputs a clock signal through the MSCK terminal, the data signal is input and output via the MSDA terminal. 10 and 11 show an example of a communication format (signal waveforms of the MSCK terminal and the MSDA terminal) via the second interface circuit 80. FIG. 10 is a signal waveform when the physical quantity detection device 1 (signal processing circuit 3) writes data to a predetermined address of the storage unit (register) of the second to Nth external devices. Further, FIG. 11 is a signal waveform when the physical quantity detection device 1 (signal processing circuit 3) reads data from a predetermined address of a storage unit (register) included in the second to Nth external devices. In FIGS. 10 and 11, Start is a start condition, Stop is a stop condition, Start is a restart condition, ACK is an acknowledge bit, NACK is a non-acknowledge bit, R is a read bit, W is a write bit, and A7 to A0 are 8 bits. Register addresses (MI2CRAD [7: 0]), A6 to A0 are 7-bit slave addresses (MI2CSAS [6: 0]), and D7 to D0 are 7-bit write data or read data.

Communication with the first external device via the first interface circuit 70 is performed based on various information stored in the register 61. Further, communication with the second to second external devices via the second interface circuit 80 is performed based on various information stored in the register 61 and the non-volatile memory 62.

FIG. 12 is a diagram showing an example of the address map of the register 61. In FIG. 12, only a part of the address map is shown, and in the “R / W” column, “R” can be read only, “R / W” can be read and written, and “R / W” can be read and written. "W (C)" indicates that it is a command. Further, FIG. 13 is a diagram showing a data structure of each writable address shown in FIG.

The first external device is, for example, according to the communication format shown in FIG. 8, digital data (angular velocity data) as a first physical quantity signal from the address 0x0A (register RDGR) of the register 61 via the first interface circuit 70. Can be read. In this way, the physical quantity detection device 1 (signal processing circuit 3) is digitally used as the first physical quantity signal from the MISO terminal (an example of the "first terminal") in response to a read request from the first external device. It is configured to be able to output data (angular velocity data). Incidentally, if the first interface circuit 70 functions as an I ^{2 C} interface circuit in response to a read request from the first external device, MOSI terminal from (another example of the "first terminal") first Digital data (angular velocity data) as a physical quantity signal is output.

Further, the first external device is, for example, according to the communication format shown in FIG. 7, the attitude calculation unit 40 and the second interface circuit 80 are connected to the address 0x11 (register MCTL) of the register 61 via the first interface circuit 70. Setting information can be written. As shown in FIG. 13, at address 0x11 (register MCTL), bit 2 is a bit for setting the manual operation of the second interface circuit 80 to write or read, and bit 1 is the bit 1 of the second interface circuit 80. It is a bit for setting permission or prohibition of manual operation, and bit 0 is a bit for setting permission or prohibition of posture calculation by the posture calculation unit 40. Further, the first external device can also read the setting information from the address 0x11 (register MCTL) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

Further, for example, the first external device follows the communication format shown in FIG. 8 and performs calculation result information (3 axes) of the attitude calculation unit 40 from the address 0x12 (register RDAG) of the register 61 via the first interface circuit 70. Angle data or attitude data (eg, quaternion q)) can be read out.

Further, the first external device specifies, for example, the address 0x13 (register AGRS) of the register 61 in the first interface circuit 70 according to the communication format shown in FIG. 9, and the calculation result information of the attitude calculation unit 40 (register AGRS). A command for resetting the triaxial angle data or the attitude data) can be transmitted. Upon receiving the command, the first interface circuit 70 initializes the calculation result information of the posture calculation unit 40 and the operation of the posture calculation unit 40.

Further, for example, the first external device specifies the address 0x14 (register MI2CST) of the register 61 to the first interface circuit 70 according to the communication format shown in FIG. 9, and manually operates the second interface circuit 80. You can send a command to get it started.

Further, the first external device, for example, communicates with the address 0x15 (register MI2CSAS) of the register 61 via the first interface circuit 70 by the manual operation of the second interface circuit 80 according to the communication format shown in FIG. The slave address used in (FIG. 10 and FIG. 11 (slave address MI2CSAS [6: 0])) can be written. As shown in FIG. 13, at the address 0x15 (register MI2CSAS), bits 6 to 0 are bits for setting a 7-bit slave address. Further, the first external device can also read the slave address from the address 0x15 (register MI2CSAS) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

Further, the first external device, for example, communicates with the address 0x16 (register MI2CRAD) of the register 61 via the first interface circuit 70 by the manual operation of the second interface circuit 80 according to the communication format shown in FIG. The register address used in FIG. 10 (register address MI2CRAD [7: 0] in FIGS. 10 and 11) can be written. As shown in FIG. 13, in the address 0x16 (register MI2CRAD), bits 7 to 0 are bits for setting an 8-bit register address. Further, the first external device can also read the register address from the address 0x16 (register MI2CRAD) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

Further, the first external device, for example, communicates with the address 0x17 (register MI2CDAD) of the register 61 via the first interface circuit 70 by the manual operation of the second interface circuit 80 according to the communication format shown in FIG. The write data used in (FIG. 10 write data MI2CDAD [7: 0]) can be written. As shown in FIG. 13, at the address 0x17 (register MI2CDAD), bits 7 to 0 are bits for setting 8-bit write data. Further, the first external device can also read the write data from the address 0x17 (register MI2CDAD) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

Further, for example, the first external device communicates from the address 0x18 (register MI2CRD) of the register 61 via the first interface circuit 70 by the manual operation of the second interface circuit 80 according to the communication format shown in FIG. Can read the read data acquired from the second to Nth external devices.

FIG. 14 is a diagram showing an example of an address map of the non-volatile memory 62. In FIG. 14, only a part of the address map is shown. Further, FIG. 15 is a diagram showing a data structure of each address shown in FIG. 14 and 15 are examples of a case where the signal processing circuit 3 communicates with the second external device and the third external device via the second interface circuit 80 (case of N = 3). ..

As shown in FIGS. 14 and 15, in the non-volatile memory 62, the slave address of the second external device is stored in bits 6 to 0 of the address 0x01 (memory MI2CSA1), and the bit of the address 0x02 (memory MI2CSA2). The slave address of the third external device is stored in 6 to 0. Further, in the non-volatile memory 62, bits 7 to 0 of the address 0x03 (memory MI2CRA1) store digital data (angle velocity ω ₂ ) as the second physical quantity signal in the register of the second external device. The address is stored, and the register address in which the digital data (angular velocity ω ₃ ) as the third physical quantity signal is stored in the register of the third external device is stored in bits 7 to 0 of the address 0x04 (memory MI2CRA2). Has been done.

The physical quantity detection device 1 (signal processing circuit 3) is shown in FIG. 11 when bit 0 (MCTL [0]) of the address 0x11 of the register 61 is set to 1 (permission of posture calculation by the posture calculation unit 40). According to the communication format, the slave address stored in the address 0x01 is used as the slave address MI2CSAS [6: 0], and the register address stored in the address 0x03 is used as the register address MI2CRAD [7: 0]. Digital data (angular velocity ω ₂ ) as a second physical quantity signal is read out as read data MI2CRD [6: 0] from the second external device via the two-interface circuit 80. Further, the physical quantity detection device 1 (signal processing circuit 3) uses the slave address stored in the address 0x02 as the slave address MI2CSAS [6: 0] according to the communication format shown in FIG. 11, and uses the register address MI2CRAD [7: By using the register address stored in the address 0x04 as 0], the data read from the third external device via the second interface circuit 80 is digitally used as the third physical quantity signal as MI2CRD [6: 0]. Read the data (angular velocity ω ₃ ). As described above, the physical quantity detection device 1 (signal processing circuit 3) is configured from the MSDA terminal (an example of the "second terminal") to digital data (angular velocity data) as the second to Nth physical quantity signals. ..

Further, in the non-volatile memory 62, the bit 2 at the address 0x04 (memory AXISTL) is a bit for setting either the angle calculation or the quaternion calculation as the posture calculation by the posture calculation unit 40. The attitude calculation unit 40 performs an angle calculation if the bit 2 of the address 0x04 is 0, and performs a quaternion calculation if the bit 2 of the address 0x04 is 1.

Further, in the non-volatile memory 62, bits 1 to 0 of the address 0x04 (memory AXISTL) set a detection axis (detection axis of the physical quantity detection element 2) of digital data (angular velocity ω ₁ ) as a first physical quantity signal. Is a bit for. If the bits 1 to 0 of the address 0x04 are 0, the attitude calculation unit 40 recognizes the digital data (angular velocity ω ₁ ) as the first physical quantity signal as the angular velocity data (angular velocity ω _x ) around the x-axis. In this case, the attitude calculation unit 40 recognizes the digital data (angular velocity ω ₂ ) as the second physical quantity signal as the angular velocity data (angular velocity ω _y ) around the y-axis, and the digital data (angular velocity ω _y ) as the third physical quantity signal. ω ₃ ) is recognized as angular velocity data around the z-axis (angular velocity ω _z ). Further, if the bits 1 to 0 of the address 0x04 are 1, the attitude calculation unit 40 recognizes the digital data (angular velocity ω ₁ ) as the first physical quantity signal as the angular velocity data (angular velocity ω _y ) around the y-axis. .. In this case, the attitude calculation unit 40 recognizes the digital data (angular velocity ω ₂ ) as the second physical quantity signal as the angular velocity data (angular velocity ω _x ) around the x-axis, and the digital data (angular velocity ω _x ) as the third physical quantity signal. ω ₃ ) is recognized as angular velocity data around the z-axis (angular velocity ω _z ). Further, if the bits 1 to 0 of the address 0x04 are 2, the attitude calculation unit 40 recognizes the digital data (angular velocity ω ₁ ) as the first physical quantity signal as the angular velocity data (angular velocity ω _z ) around the z-axis. .. In this case, the attitude calculation unit 40 recognizes the digital data (angular velocity ω ₂ ) as the second physical quantity signal as the angular velocity data (angular velocity ω _x ) around the x-axis, and the digital data (angular velocity ω _x ) as the third physical quantity signal. ω ₃ ) is recognized as angular velocity data around the y-axis (angular velocity ω _y ). As described above, in the non-volatile memory 62, the bits 1 to 0 of the address 0x04 are the setting information of the correspondence between the first to third physical quantity signals and the x-axis, y-axis, and z-axis.

As described above, while the conventional posture calculation device communicates with the external device to acquire the first to Nth physical quantity signals and executes the posture calculation, the physical quantity detection device 1 of the present embodiment ( The signal processing circuit 3) executes the attitude calculation based on the first physical quantity signal output by the detection circuit 30 and the second to Nth physical quantity signals acquired from the external device via the MSDA terminal. That is, in the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, since the detection circuit 30 outputs the first physical quantity signal, it is not necessary to communicate with the external device to acquire the first physical quantity signal. Further, since the detection circuit 30 can generate the first physical quantity signal in parallel with acquiring the second to Nth physical quantity signals from the external device, the first to Nth physical quantity signals are acquired. The time can be shortened. As a result, according to the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, the cycle of the posture calculation is shorter than in the conventional case, and the accuracy of the posture calculation can be improved.

Further, in the physical quantity detection device 1 of the present embodiment, the signal processing circuit 3 can output the first physical quantity signal from the MISO terminal or the MOSI terminal, and can input the second to Nth physical quantity signals from the MSDA terminal. Therefore, it can function as a circuit (master) that executes a physical quantity signal using a physical quantity signal input from the MSDA terminal, or as a circuit (slave) that outputs a physical quantity signal used for a physical quantity calculation. .. Therefore, for example, by electrically connecting the MSDA terminal of the first signal processing circuit 3 and the MOSI terminal of each of the second to Nth signal processing circuits 3, the first signal processing circuit 3 becomes the first. It is possible to configure a posture calculation device that generates the physical quantity signal of the above and acquires the second to Nth physical quantity signals from the second to Nth signal processing circuits 3 to execute the posture calculation. Since such an attitude calculation device can be realized by using N signal processing circuits 3 having the same configuration, the development cost can be reduced.

Further, according to the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, the drive signal DRV for driving the physical quantity detection element 2 has a frequency deviation larger than that of the clock signals ADCCLK and DSPCLK generated by the clock generation circuit 50. Is small, so that the accuracy of the attitude calculation can be improved by using the clock signal CKF based on the drive signal DRV. That is, according to the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, the frequency deviation is relatively large in the attitude calculation using the physical quantity signal sampled based on the clock signal ADCCLK having a relatively large frequency deviation. The accuracy of the posture calculation can be improved by correcting the sampling period (period of time integration) Δt by using the clock signal CKF based on the drive signal DRV having a small value.

According to the present embodiment, by changing the setting information stored in the storage unit 60 (for example, the address 0x04 of the non-volatile memory 62 in FIGS. 14 and 15), the first to Nth physical quantity signals and the first physical quantity signal are changed. Since the correspondence with the first to Nth detection axes can be changed, a highly versatile physical quantity detection device 1 (signal processing circuit 3) can be realized.

1-2. Modification example In the above physical quantity detection device 1 (signal processing circuit 3), the attitude calculation unit 40 performs a posture calculation using a quaternion based on the first to Nth physical quantity signals, or as a posture calculation, the first Each of the first to Nth physical quantity signals is integrated to calculate the first to Nth angles, and the attitude calculation unit 40 uses a rotation matrix based on the first to Nth physical quantity signals as the posture calculation. A posture calculation may be performed. In the physical quantity detection device 1 (signal processing circuit 3) of this modification, for example, the attitude calculation unit 40 acquires the three-axis angular velocity data (angular velocity ω ₁ , ω ₂ , ω ₃ ) every time the storage unit 60 ( Based on the setting information of the correspondence between the first to third physical quantity signals and the x-axis, y-axis, and z-axis stored in the non-volatile memory 62), the angular velocities ω ₁ , ω ₂ , Converting ω ₃ into an angular velocity ω _x around the x-axis, an angular velocity ω _y around the y-axis, and an angular velocity ω _z around the z-axis, the rotation matrix represented by the equation (4) is calculated, and the rotation matrix and the current rotation matrix are calculated. The attitude vector is updated by calculating the product with the attitude vector.

Further, in the physical quantity detection device 1 (signal processing circuit 3), the posture calculation by the posture calculation unit 40 may be corrected. FIG. 16 is a functional block diagram of the physical quantity detection device 1 of this modified example. In FIG. 16, the same components as those of the physical quantity detection device 1 (FIG. 1) of the present embodiment are designated by the same reference numerals, and the description thereof will be omitted. The physical quantity detection device 1 of the modified example shown in FIG. 16 has a configuration in which a correction processing unit 90 is added to the physical quantity detection device 1 (FIG. 1) of the present embodiment.

The correction processing unit 90 corrects the posture calculation by the posture calculation unit 40 based on the output signals of at least one of the acceleration detection element and the geomagnetic detection element. For example, the acceleration detection element is electrically connected to a terminal (not shown) of the signal processing circuit 3, and the correction processing unit 90 receives an output signal of the acceleration detection element via the terminal (not shown) and receives the acceleration detection element. The posture calculation by the posture calculation unit 40 may be corrected based on the output signal of. Further, for example, the correction processing unit 90 receives the output signal of the acceleration detection element from the external device via the first interface circuit 70 or the second interface circuit 80, and the attitude calculation unit 40 is based on the output signal of the acceleration detection element. You may correct the attitude calculation by. Similarly, for example, the geomagnetic detection element is electrically connected to a terminal (not shown) of the signal processing circuit 3, and the correction processing unit 90 receives the output signal of the geomagnetic detection element via the terminal (not shown), and the signal processing unit 90 receives the output signal of the geomagnetic detection element. The attitude calculation by the attitude calculation unit 40 may be corrected based on the output signal of the geomagnetic detection element. Further, for example, the correction processing unit 90 receives the output signal of the geomagnetic detection element from the external device via the first interface circuit 70 or the second interface circuit 80, and the attitude calculation unit 40 is based on the output signal of the geomagnetic detection element. You may correct the attitude calculation by.

For example, the correction processing unit 90 estimates the gravitational acceleration vector from the result of the attitude calculation by the attitude calculation unit 40, calculates the gravitational acceleration vector from the output signal of the acceleration detection element, and uses the extended Kalman filter to estimate the gravitational acceleration. The error (bias) of the first to Nth physical quantity signals may be estimated based on the difference between the vector and the calculated gravitational acceleration vector. Further, for example, the correction processing unit 90 estimates the geomagnetic vector from the result of the attitude calculation by the attitude calculation unit 40, calculates the geomagnetic vector from the output signal of the geomagnetic detection element, and uses the extended Kalman filter to estimate the geomagnetic vector. The error (bias) of the first to Nth physical quantity signals may be estimated based on the difference from the calculated geomagnetic vector. Then, the posture calculation unit 40 corrects the integration error and performs the posture calculation based on the first to Nth physical quantity signals to which the error (bias) estimated by the correction processing unit 90 is subtracted. The accuracy of is improved.

2. 2. Posture calculation device FIG. 17 is a diagram showing a configuration example of the posture calculation device of the present embodiment. As shown in FIG. 17, the posture calculation device 4 of the present embodiment includes N physical quantity detection devices 1-1 to 1-N. The physical quantity detecting devices 1-1 to 1-N are all the physical quantity detecting devices 1 of the present embodiment or the modification described above, and each physical quantity detecting device 1-k (k = 1 to N) is a physical quantity detecting element 2. -K and signal processing circuit 3-k are provided.

The MSCK terminal of the signal processing circuit 3-1 provided in the physical quantity detection device 1-1 (an example of the "first physical quantity detection device") and the physical quantity detection device 1-2-1-N ("the second to Nth" The SCLK terminals of the signal processing circuits 3-2-3N provided in each of the "physical quantity detection devices") are electrically connected. Further, the signal processing provided by each of the MSDA terminal (an example of the "second terminal") of the signal processing circuit 3-1 provided in the physical quantity detection device 1-1 and the physical quantity detection device 1-2 to 1-N. The MOSI terminal (an example of the "first terminal") of the circuit 3-2-3-N is electrically connected. Then, the physical quantity detection device 1-1 (posture calculation unit 40 (see FIG. 1) of the signal processing circuit 3-1) performs the posture calculation.

The physical quantity detection device 1-1 (signal processing circuit 3-1) communicates with the control device 5 which is a host via the first interface circuit 70 (see FIG. 1). The first interface circuit 70 of the signal processing circuit 3-1 functions as an SPI interface circuit, and the master control device 5 is, for example, a slave physical quantity detection device 1 according to the communication formats shown in FIGS. 7 to 9. Data is written or read out to -1 (signal processing circuit 3-1), or a command is transmitted.

The physical quantity detecting device 1-1 (signal processing circuit 3-1) via a second interface circuit 80 (see FIG. 1) is ^{I 2} C interface circuit, and a physical quantity detecting device 1-2 to 1-N Communicate with each other. Each of the physical quantity detecting devices 1-2 to 1-N communicates with the physical quantity detecting device 1-1 via the first interface circuit 70 (see FIG. 1). In each of the signal processing circuit 3-2 to 3-N, XCS terminal is pulled up to the power supply, the first interface circuit 70 functions as an ^{I 2} C interface circuit. The master physical quantity detection device 1-1 (signal processing circuit 3-1) is, for example, a slave physical quantity detection device 1-2-1 to N (signal processing circuit) according to the communication formats shown in FIGS. 10 and 11. Data is written and data is read for 3-2-3-N).

When viewed from the physical quantity detection device 1-1, the control device 5 corresponds to the above-mentioned "first external device", and the physical quantity detection device 1-2-1-N corresponds to the above-mentioned "second external device". Corresponds to "device" to "Nth external device".

The control device 5 can acquire the values of the first to Nth physical quantity signals (angular velocity ω _{1 to} ω _N ) and the attitude information (quaternion, the first to Nth angles, etc.) from the attitude calculation device 4. it can.

For example, in the case of N = 3, the storage unit 60 (register 61 and non-volatile memory 62) of the signal processing circuit 3-1 of the physical quantity detection device 1-1 is configured as shown in the address maps shown in FIGS. 12 to 15. If this is the case, the procedure for the control device 5 to acquire the values (angular velocities ω ₁ , ω ₂ , ω ₃ ) of the first to third physical quantity signals from the attitude calculation device 4 in a predetermined period Δt is as follows. become.

First, the control device 5 sets 1 for both bit 2 (MCTL [2]) and bit 1 (MCTL [1]) at address 0x11 of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. Write and set the manual operation of the second interface circuit 80 to "read" and "permit".

Further, the control device 5 writes 0x0A to bits 7 to 0 (register MI2CRAD [7: 0]) at the address 0x16 of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. 7, and the signal processing circuit The register address (register address MI2CRAD [7: 0] in FIGS. 10 and 11) used in the communication by the manual operation of the second interface circuit 80 of 3-1 is set to 0x0A.

Next, the control device 5 reads the first physical quantity signal (angular velocity ω ₁ ) from the address 0x0A (register RDGR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. 8 in the period Δt. To get.

Further, the control device 5 has a period Δt, and according to the communication format shown in FIG. 7, the physical quantity detection device is set to bits 6 to 0 (register MI2CSAS [6: 0]) at the address 0x15 of the register 61 of the signal processing circuit 3-1. After writing the slave address of 1-2, the address 0x14 (register MI2CST) of the register 61 is specified according to the communication format shown in FIG. 9, and the manual operation of the second interface circuit 80 of the signal processing circuit 3-1 is performed. Send a command to start. As a result, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt, and according to the communication format shown in FIG. 11, the register 61 of the physical quantity detection device 1-2 (signal processing circuit 3-2) The second physical quantity signal (angle velocity ω ₂ ) is read from the address 0x0A and stored in the address 0x18 (register MI2CRD) of its own register 61.

Then, the control device 5 reads the second physical quantity signal (angular velocity ω ₂ ) from the address 0x18 (register RDGR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. 8 in the period Δt. get.

Further, the control device 5 has a period Δt, and according to the communication format shown in FIG. 7, the physical quantity detection device is set to bits 6 to 0 (register MI2CSAS [6: 0]) at the address 0x15 of the register 61 of the signal processing circuit 3-1. After writing the slave addresses of 1-3, the address 0x14 (register MI2CST) of the register 61 is specified according to the communication format shown in FIG. 9, and the manual operation of the second interface circuit 80 of the signal processing circuit 3-1 is performed. Send a command to start. As a result, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt, and the register 61 of the physical quantity detection device 1-3 (signal processing circuit 3-3) follows the communication format shown in FIG. The third physical quantity signal (angle velocity ω ₃ ) is read from the address 0x0A and stored in the address 0x18 (register MI2CRD) of its own register 61.

Then, the control device 5 reads the third physical quantity signal (angular velocity ω ₃ ) from the address 0x18 (register RDGR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. 8 in the period Δt. get.

Further, for example, in the case of N = 3, the storage unit 60 (register 61 and non-volatile memory 62) of the signal processing circuit 3-1 of the physical quantity detection device 1-1 is like the address map shown in FIGS. 12 to 15. In the case of the above configuration, the procedure for the control device 5 to acquire the posture information from the posture calculation device 4 at a predetermined period Δt is as follows.

First, the control device 5 writes 1 to bit 0 (MCTL [0]) of the address 0x11 of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. 7, and the attitude calculation unit 40 performs the attitude calculation. To give permission.

As a result, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt, and according to the communication format shown in FIG. 11, the register 61 of the physical quantity detection device 1-2 (signal processing circuit 3-2) The second physical quantity signal (angular velocity ω ₂ ) is read from the address 0x0A and stored in its own storage unit 60 (register 61). In the non-volatile memory 62 of the signal processing circuit 3-1 in advance, the slave address of the physical quantity detection device 1-2 is stored in the address 0x00 (memory MI2CSA1), and 0x0A is stored in the address 0x02 (memory MI2CRA1). The signal processing circuit 3-1 uses this information to read out the second physical quantity signal (angle velocity ω ₂ ).

Further, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt and according to the communication format shown in FIG. 11, the address of the register 61 of the physical quantity detection device 1-3 (signal processing circuit 3-3). A third physical quantity signal (angular velocity ω ₃ ) is read from 0x0A and stored in its own storage unit 60 (register 61). In the non-volatile memory 62 of the signal processing circuit 3-1 in advance, the slave address of the physical quantity detection device 1-3 is stored in the address 0x01 (memory MI2CSA2), and 0x0A is stored in the address 0x03 (memory MI2CRA2). The signal processing circuit 3-1 uses this information to read out a _third physical quantity signal (angular velocity ω ₃ ).

Then, the attitude calculation unit 40 of the signal processing circuit 3-1 acquires the first physical quantity signal (angular velocity ω ₁ ) from the detection circuit 30 in the period Δt, and the storage unit 60 (register 61) in the period Δt, respectively. ), The second physical quantity signal (angular velocity ω ₂ ) and the third physical quantity signal (angular velocity ω ₃ ) are acquired, the posture calculation is performed, and the information of the result of the posture calculation is sent to the address 0x12 (register 61) of the register 61.
Store in register RDAR). The attitude calculation unit 40 of the signal processing circuit 3-1 has a first to third physical quantity signal (angular velocity ω) according to bits 1 to 0 (AXISCTL [1: 0]) of the address 0x04 of the non-volatile memory 62. ₁ , ω ₂ , ω ₃ ) is converted into triaxial angular velocities ω _x , ω _y , ω _z , and the angle is used as a posture calculation according to the setting of bit 2 (AXISCTL [2]) at address 0x04 of the non-volatile memory 62. Performs arithmetic or quaternion arithmetic.

Next, the control device 5 reads and acquires the result of the attitude calculation from the address 0x12 (register RDAR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. 8 in the period Δt.

FIG. 18 shows an example of a time chart of attitude calculation in the physical quantity detection device 1-1 (signal processing circuit 3-1). As shown in FIG. 18, in the physical quantity detection device 1-1 (signal processing circuit 3-1), the attitude calculation unit 40 acquires the first physical quantity signal (angular velocity ω ₁ ) from the detection circuit 30, so that it is second. It is not necessary to acquire the _first physical quantity signal (angular velocity ω ₁ ) via the interface circuit 80. Therefore, in the attitude calculation device 4 of the present embodiment, the physical quantity detection device 1-1 (signal processing circuit 3-1) sets the physical quantity detection device 1-2 via the second interface circuit 80 in the posture calculation cycle Δt. The second physical quantity signal (angular velocity ω ₂ ) and the third physical quantity signal (angular velocity ω ₃ ) are acquired from (signal processing circuit 3-2) and physical quantity detection device 1-3 (signal processing circuit 3-3), respectively. It depends on the communication time required for. On the other hand, in the conventional posture calculation system, the control device 5 which is the host receives the first to third physical quantity signals (angular velocity ω ₁ , ω ₂ , ω ₃₎ from the physical quantity detection devices 1-1 to 1-3, respectively. ) Is acquired and the posture calculation is performed. Therefore, the control device 5 sets the physical quantity detection device 1-1 to 1-3 (signal processing circuit 3-2) and the physical quantity detection device 1-3 (signal) in the posture calculation cycle Δt. It cannot be shorter than the communication time required to acquire the _first to third physical quantity signals (angular velocities ω ₁ , ω ₂ , ω ₃ ) from the processing circuit 3-3). That is, the posture calculation device 4 of the present embodiment can perform posture calculation with a shorter cycle (higher rate) than the conventional posture calculation system.

As described above, according to the present embodiment, the signal processing circuit 3-1 included in the physical quantity detection device 1-1 generates the first physical quantity signal, and the physical quantity detection device 1 is transmitted via the MSDA terminal. A posture calculation device 4 is configured to acquire the second to second physical quantity signals output from the MOSI terminals of the signal processing circuits 3-1 to 3-N included in each of −2 to 1-N and execute the posture calculation. can do.

In the attitude calculation device 4 of the present embodiment, the signal processing circuit 3-1 included in the physical quantity detection device 1-1 does not need to communicate with the external device to acquire the first physical quantity signal, and the physical quantity detection The detection circuit 30 generates the first physical quantity signal in parallel with acquiring the second and second physical quantity signals from the signal processing circuits 3-2-3 N provided by the devices 1-2 to 1-N, respectively. Therefore, the time for acquiring the first to Nth physical quantity signals can be shortened. As a result, according to the posture calculation device 4 of the present embodiment, the posture calculation cycle Δt is shorter than in the conventional case, and the accuracy of the posture calculation can be improved.

Further, since the posture calculation device 4 of the present embodiment can be realized by using N physical quantity detection devices having the same configuration, the development cost can be reduced.

3. 3. Electronic device FIG. 19 is a functional block diagram showing an example of the configuration of the electronic device of the present embodiment. As shown in FIG. 19, the electronic device 300 of the present embodiment includes an attitude calculation device 310, a control device (MCU) 320, an operation unit 330, a ROM (Read Only Memory) 340, a RAM (Random Access Memory) 350, and a communication unit. It is configured to include 360 and a display unit 370. The electronic device of the present embodiment may have a configuration in which some of the constituent elements (each part) of FIG. 19 are omitted or changed, or other constituent elements are added.

The posture calculation device 310 performs a posture calculation based on the first to Nth physical quantity signals, and outputs the result of the posture calculation to the control device (MCU) 320. As the posture calculation device 310, for example, the posture calculation device 4 of the present embodiment described above can be applied.

The control device (MCU) 320 transmits a communication signal to the attitude calculation device 310 according to a program stored in the ROM 340 or the like, and performs various calculation processes and control processes using the output signal of the attitude calculation device 310. In addition, the control device (MCU) 320 performs various processes according to the operation signal from the operation unit 330, processes for controlling the communication unit 360 for data communication with the external device, and displays various information on the display unit 370. Performs processing such as transmitting a display signal for making the display signal.

The operation unit 330 is an input device composed of operation keys, button switches, and the like, and outputs an operation signal corresponding to the operation by the user to the control device (MCU) 320.

The ROM 340 stores programs, data, and the like for the control device (MCU) 320 to perform various calculation processes and control processes.

The RAM 350 is used as a work area of the control device (MCU) 320, and includes programs and data read from the ROM 340, data input from the operation unit 330, calculation results executed by the control device (MCU) 320 according to various programs, and the like. Is temporarily memorized.

The communication unit 360 performs various controls for establishing data communication between the control device (MCU) 320 and the external device.

The display unit 370 is a display device composed of an LCD (Liquid Crystal Display) or the like, and displays various information based on a display signal input from the CPU 320. The display unit 370 may be provided with a touch panel that functions as an operation unit 330.

By applying, for example, the posture calculation device 4 of the present embodiment described above as the posture calculation device 310, the accuracy of the posture calculation can be improved, so that a highly reliable electronic device can be realized.

Various electronic devices can be considered as such an electronic device 300, for example, a personal computer (for example, a mobile personal computer, a laptop personal computer, a tablet personal computer), a mobile terminal such as a smartphone or a mobile phone, and the like. Digital cameras, inkjet ejection devices (for example, inkjet printers), storage area network devices such as routers and switches, local area network devices, mobile terminal base station devices, televisions, video cameras, video recorders, car navigation devices, real-time Clock devices, pagers, electronic notebooks (including those with communication functions), electronic dictionaries, calculators, electronic game devices, game controllers, word processors, workstations, videophones, security TV monitors, electronic binoculars, POS terminals, medical devices ( For example, electronic thermometer, blood pressure monitor, blood glucose meter, electrocardiogram measuring device, ultrasonic diagnostic device, electronic endoscope), fish finder, various measuring devices, instruments (for example, instruments for vehicles, aircraft, ships), flight simulator. , Head mount display, motion trace, motion tracking, motion controller, PDR (pedestrian position and orientation measurement) and the like.

FIG. 20 is a perspective view schematically showing a digital camera 1300 which is an example of the electronic device 300 of the present embodiment. Note that FIG. 20 also briefly shows the connection with an external device. Here, while a normal camera sensitizes a silver halide photographic film by the light image of the subject, the digital camera 1300 performs photoelectric conversion of the light image of the subject by an image sensor such as a CCD (Charge Coupled Device) and captures the image. Generate a signal (image signal).

A display unit 1310 is provided on the back surface of the case (body) 1302 of the digital camera 1300, and is configured to display based on an image pickup signal by a CCD. The display unit 1310 is a finder that displays a subject as an electronic image. Functions as. Further, on the front side (back side in the drawing) of the case 1302, a light receiving unit 1304 including an optical lens (imaging optical system), a CCD, and the like is provided. When the photographer confirms the subject image displayed on the display unit 1310 and presses the shutter button 1306, the image pickup signal of the CCD at that time is transferred and stored in the memory 1308. Further, in the digital camera 1300, a video signal output terminal 1312 and an input / output terminal 1314 for data communication are provided on the side surface of the case 1302. A television monitor 1430 is connected to the video signal output terminal 1312, and a personal computer 1440 is connected to the data communication input / output terminal 1314, respectively, as needed. Further, the imaging signal stored in the memory 1308 is output to the television monitor 1430 or the personal computer 1440 by a predetermined operation. The digital camera 1300 has a posture calculation device 310, and uses the output signal of the posture calculation device 310 to perform processing such as camera shake correction.

4. The moving body FIG. 21 is a view (top view) showing an example of the moving body of the present embodiment. The mobile body 400 shown in FIG. 21 includes a posture calculation device 410, controllers 440, 450, 460, a battery 470, and a navigation device 480. The moving body of the present embodiment may be configured by omitting a part of the constituent elements (each part) of FIG. 21 or adding other constituent elements.

The attitude arithmetic unit 410, the controllers 440, 450, 460, and the navigation device 480 operate on the power supply voltage supplied from the battery 470.

The posture calculation device 410 performs the posture calculation based on the first to Nth physical quantity signals, and outputs the result of the posture calculation to the controllers 440, 450, 460.

The controllers 440, 450, and 460 are control devices that perform various controls such as a posture control system, a rollover prevention system, and a brake system, respectively, using the output signals of the posture calculation device 410.

The navigation device 480 displays various information such as the position and time of the mobile body 400 on the display based on the output information of the built-in GPS receiver (not shown). Further, the navigation device 480 identifies the position and orientation of the moving body 400 based on the output signal of the posture calculation device 410 even when the GPS radio wave does not reach, and continues to display necessary information.

For example, by applying the posture calculation device 4 of each of the above-described embodiments as the posture calculation device 410, the accuracy of the posture calculation can be improved, so that a highly reliable moving body can be realized.

Various moving bodies can be considered as such moving bodies 400, and examples thereof include automobiles (including electric vehicles), aircraft such as jet aircraft and helicopters, ships, rockets, and artificial satellites.

The present invention is not limited to the present embodiment, and various modifications can be made within the scope of the gist of the present invention.

For example, in the above-described embodiment, a physical quantity detection device (angular velocity detection device) including a physical quantity detection element for detecting an angular velocity, an attitude calculation device provided with the physical quantity detection device (angular velocity detection device), an electronic device, and a moving body are taken as examples. As described above, the present invention can also be applied to a physical quantity detecting device including a physical quantity detecting element for detecting various physical quantities, an attitude calculation device provided with the physical quantity detecting device, an electronic device, and a moving body. The physical quantity detected by the physical quantity detecting element is not limited to the angular velocity, and may be angular acceleration, acceleration, geomagnetism, inclination, or the like. Further, the vibrating piece of the physical quantity detecting element does not have to be a double T type, for example, a tuning fork type or a comb tooth type, or a sound piece type having a shape such as a triangular prism, a square prism, or a columnar prism. May be good. As a material for the vibrating piece of the physical quantity detecting element, instead of crystal (SiO ₂ ), for example, a piezoelectric single crystal such as lithium tantalate (LiTaO ₃ ) or lithium niobate (LiNbO ₃ ) or lead zirconate titanate is used. Piezoelectric materials such as piezoelectric ceramics such as (PZT) may be used, or silicon semiconductors may be used. Further, for example, the structure may be such that a piezoelectric thin film such as zinc oxide (ZnO) or aluminum nitride (AlN) sandwiched between driving electrodes is arranged on a part of the surface of the silicon semiconductor. Further, the physical quantity detecting element is not limited to the piezoelectric type element, and may be a vibration type element such as an electrokinetic type, a capacitance type, an eddy current type, an optical type, or a strain gauge type. Alternatively, the method of the physical quantity detecting element is not limited to the vibration type, and may be, for example, an optical type, a rotary type, or a fluid type.

The above-described embodiments and modifications are merely examples, and the present invention is not limited thereto. For example, it is also possible to appropriately combine each embodiment and each modification.

The present invention includes a configuration substantially the same as the configuration described in the embodiment (for example, a configuration having the same function, method and result, or a configuration having the same purpose and effect). The present invention also includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. The present invention also includes a configuration that exhibits the same effects as the configuration described in the embodiment or a configuration that can achieve the same object. The present invention also includes a configuration in which a known technique is added to the configuration described in the embodiment.

1 ... Physical quantity detection device, 2 ... Physical quantity detection element, 3 ... Signal processing circuit, 4 ... Attitude calculation device, 5 ... Control device, 10 ... Reference voltage circuit, 20 ... Drive circuit, 21 ... I / V conversion circuit, 22 ... Low-pass filter, 23 ... high-pass filter, 24 ... comparator, 25 ... full-wave rectifier circuit, 26 ... integrator, 27 ... comparator, 28 ... comparator, 30 ... detection circuit, 31 ... QV amplifier, 32 ... variable gain amplifier , 33 ... Synchronous detection circuit, 34 ... A / D conversion circuit, 35 ... DSP, 40 ... Attitude calculation unit, 41A, 41B, 41C ... D flip flop, 42 ... NOT circuit, 43 ... NOR circuit, 44 ... Counter, 45A , 45B ... Multiplier, 46 ... Conversion unit, 47 ... Matrix calculation unit, 48 ... Adder, 49 ... Normalization unit, 50 ... Clock generation circuit, 60 ... Storage unit, 61 ... Register, 62 ... Non-volatile memory, 70 ... 1st interface circuit, 80 ... 2nd interface circuit, 90 ... Correction processing unit, 101a, 101b ... Drive vibration arm, 102 ... Detection vibration arm, 103 ... Weight part, 104a, 104b ... Drive base, 105a, 105b ... Connecting arm, 106 ... Weight, 107 ... Detection base, 112, 113 ... Drive electrode, 114, 115 ... Detection electrode, 116 ... Common electrode, 300 ... Electronic device, 310 ... Attitude calculation device, 312 ... Drive circuit, 320 ... Control device (MCU), 330 ... Operation unit, 340 ... ROM, 350 ... RAM, 360 ... Communication unit, 370 ... Display unit, 400 ... Moving object, 410 ... Attitude calculation device, 440, 450, 460 ... Controller, 470 ... Battery, 480 ... Navigation device, 1300 ... Digital camera, 1302 ... Case, 1304 ... Light receiving unit, 1306 ... Shutter button, 1308 ... Memory, 1310 ... Display unit, 1312 ... Video signal output terminal, 1314 ... Input / output terminal, 1430 ... TV monitor, 1440 ... Personal computer

Claims (11)

A detection circuit that generates a first physical quantity signal based on the output signal of the physical quantity detection element,
A drive circuit that generates a drive signal for driving the physical quantity detection element, and
The first terminal capable of outputting the first physical quantity signal and
A second terminal capable of inputting a second N (N ≧ 2) physical quantity signal, and
See containing and a posture computing unit capable of executing the posture calculated based on the physical quantity signal of the first to N,
The detection circuit uses the first clock signal to generate the first physical quantity signal.
The posture computing unit, based on the drive signal, the frequency deviation than the first clock signal with a smaller second clock signal performs the posture computing, signal processing circuit. In claim 1,
The posture computing unit, line cormorants signal processing circuit the position calculation using the quaternion. In claim 1,
The posture computing unit, said as posture calculation, the first to N physical quantity signal signal processing circuit each you calculate the angle of the first to N by integrating the. In claim 1,
The posture computing unit, line cormorants signal processing circuit the position calculation using the rotation matrix. In any one of claims 1 to 4,
A storage unit that stores setting information of the correspondence between the first to Nth physical quantity signals and the first to Nth detection axes is included.
The posture computing unit, line cormorants signal processing circuit the position calculation using the setting information. In any one of claims 1 to 5,
The first to each of the physical quantity signal of the N angular velocity signal der Ru signal processing circuit. In claim 5 or 6,
Based on at least one of the output signal of the acceleration detection element and the geomagnetism detection element, the correction processing unit including signal processing circuitry for correcting the orientation calculation by the position calculation unit. A signal processing circuit according to any one of claims 1 to 7, wherein the physical quantity detecting device and, physical quantity detecting device have that ones provided with. The physical quantity detecting device according to claim 8 is provided with N pieces.
The second terminal of the signal processing circuit provided by the first physical quantity detecting device, and the first terminal of the signal processing circuit provided by each of the second to Nth physical quantity detecting devices. Is electrically connected,
The posture computing unit of the signal processing circuit, wherein the first of said physical quantity detecting device comprises performs the posture calculation, attitude computing device. An electronic device including the posture calculation device according to claim 9 . A mobile body including the posture calculation device according to claim 9 .

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