JP2017227591A - Signal processing circuit, physical quantity detection device, attitude arithmetic unit, electronic apparatus, and movable body - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a signal processing circuit that can improve the accuracy in attitude arithmetic compared with a prior art.SOLUTION: A signal processing circuit comprises: a detection circuit that creates a first physical quantity signal on the basis of an output signal from a physical quantity detection element; a first terminal that can output the first physical quantity signal; a second terminal that can receive inputs of second to N-th (N≥2) physical quantity signals; and an attitude arithmetic part that can execute attitude arithmetic on the basis of the first to N-th physical quantity signals.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a signal processing circuit, a physical quantity detection device, an attitude calculation device, an electronic device, and a moving object.

  In a system that performs various controls according to the posture of a moving body such as a robot or a vehicle, a posture calculating device that calculates the posture of the moving body using data detected by various sensors such as an angular velocity sensor attached to the moving body Is used. For example, Patent Document 1 discloses an angular velocity sensor, an acceleration sensor, and a magnetic sensor that measure angular velocity, acceleration, and geomagnetism on three axes, respectively, and an arithmetic processing unit that calculates an estimated value of quaternions based on measurement values of these sensors. There is disclosed a small posture sensor comprising:

JP 2013-2000162 A

  However, in a conventional posture calculation device, a processing unit (CPU (Central Processing Unit) or the like) that performs posture calculation communicates with various sensors attached to the moving body, acquires data for three axes, and acquires the data Since posture calculation is performed using data for three axes, the rate of posture calculation cannot be made higher than the reception rate of data for three axes. That is, the conventional posture calculation device has a problem that the posture calculation cycle becomes long depending on the communication rate between the processing unit and the sensor, and it is difficult to improve the accuracy of the posture calculation.

  The present invention has been made in view of the above-described problems, and according to some aspects of the present invention, a signal processing circuit and a physical quantity detection capable of improving the accuracy of posture calculation as compared with the prior art. An apparatus and an attitude calculation device can be provided. In addition, according to some aspects of the present invention, it is possible to provide an electronic apparatus and a moving body using the posture calculation device.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following aspects or application examples.

[Application Example 1]
A signal processing circuit according to this application example includes a detection circuit that generates a first physical quantity signal based on an output signal of a physical quantity detection element, a first terminal that can output the first physical quantity signal, A second terminal capable of inputting an Nth (N ≧ 2) physical quantity signal; and an attitude calculation unit capable of executing an attitude calculation based on the first to Nth physical quantity signals.

Whereas the conventional posture calculation device communicates with an external device to acquire the first to Nth physical quantity signals and executes the posture calculation, the signal processing circuit according to this application example includes the first signal generated by the detection circuit. The posture calculation is executed based on the first physical quantity signal and the second to Nth physical quantity signals acquired from the outside via the second terminal. That is, the signal processing circuit according to this application example does not need to communicate with the external device to acquire the first physical quantity signal, and in parallel with the acquisition of the second to Nth physical quantity signals from the outside. Since the detection circuit can generate the first physical quantity signal, the time for acquiring the first to Nth physical quantity signals can be shortened. As a result, according to the signal processing circuit according to this application example, the period of posture calculation is shorter than the conventional one, and the accuracy of posture calculation can be improved.

  The signal processing circuit according to this application example can output the first physical quantity signal from the first terminal and can input the second to Nth physical quantity signals from the second terminal. It can function as a circuit (master) that executes posture calculation using a physical quantity signal input from the terminal 2 or can function as a circuit (slave) that outputs a physical quantity signal used in posture calculation. Therefore, for example, by electrically connecting the second terminal of the first signal processing circuit and the first terminals of the second to Nth signal processing circuits, the first signal processing circuit is It is possible to configure an attitude calculation device that generates one physical quantity signal and acquires the second to Nth physical quantity signals from the second to Nth signal processing circuits to execute the attitude calculation. Since such an attitude calculation device can be realized using N signal processing circuits having the same configuration, the development cost can be reduced.

[Application Example 2]
In the signal processing circuit according to the application example described above, the posture calculation unit may perform the posture calculation using a quaternion.

[Application Example 3]
In the signal processing circuit according to the application example, the attitude calculation unit may calculate the first to Nth angles by integrating each of the first to Nth physical quantity signals as the attitude calculation.

[Application Example 4]
In the signal processing circuit according to the application example described above, the posture calculation unit may perform the posture calculation using a rotation matrix.

[Application Example 5]
The signal processing circuit according to the application example includes a drive circuit that generates a drive signal for driving the physical quantity detection element, and the posture calculation unit performs the posture calculation using a clock signal based on the drive signal. May be.

  According to the signal processing circuit according to this application example, the drive signal for driving the physical quantity detection element has a smaller frequency deviation than the clock signal generated using a CR oscillation circuit, a ring oscillator, or the like. The accuracy of the posture calculation can be improved by using the clock signal based thereon. For example, in an attitude calculation using a physical quantity signal sampled based on a clock signal having a relatively large frequency deviation, a sampling period (time integration period) using a clock signal based on a drive signal having a relatively small frequency deviation By correcting this, the accuracy of posture calculation can be improved.

[Application Example 6]
The signal processing circuit according to the application example includes a storage unit that stores setting information of a correspondence relationship between the first to Nth physical quantity signals and the first to Nth detection axes, and the posture calculation unit includes the The posture calculation may be performed using setting information.

  According to the signal processing circuit according to this application example, the correspondence between the first to Nth physical quantity signals and the first to Nth detection axes can be changed by changing the setting information. A highly reliable signal processing circuit can be realized.

[Application Example 7]
In the signal processing circuit according to the application example described above, each of the first to Nth physical quantity signals may be an angular velocity signal.

[Application Example 8]
The signal processing circuit according to the application example may include a correction processing unit that corrects the posture calculation performed by the posture calculation unit based on an output signal of at least one of the acceleration detection element and the geomagnetic detection element.

  According to the signal processing circuit according to this application example, the posture calculation error (for example, the integration error) can be corrected using the output signal of at least one of the acceleration detection element and the geomagnetic detection element. Can be improved.

[Application Example 9]
A physical quantity detection device according to this application example includes any of the signal processing circuits described above and a physical quantity detection element.

  Whereas the conventional posture calculation device communicates with an external device to acquire the first to Nth physical quantity signals and executes the posture calculation, in the physical quantity detection device according to this application example, the signal processing circuit detects Attitude calculation is executed based on the first physical quantity signal generated by the circuit and the second to Nth physical quantity signals acquired from the outside via the second terminal. That is, the physical quantity detection device according to this application example does not need to communicate with an external device to acquire the first physical quantity signal, and in parallel with acquiring the second to Nth physical quantity signals from the outside. Since the detection circuit can generate the first physical quantity signal, the time for acquiring the first to Nth physical quantity signals can be shortened. As a result, according to the physical quantity detection device according to this application example, the cycle of posture calculation is shorter than the conventional one, and the accuracy of posture calculation can be improved.

[Application Example 10]
The posture calculation device according to this application example includes N physical quantity detection devices described above, the second terminal of the signal processing circuit provided in the first physical quantity detection device, and the second to Nth Each of the physical quantity detection devices is electrically connected to the first terminal of the signal processing circuit, and the posture calculation unit of the signal processing circuit of the first physical quantity detection device includes the attitude calculation unit. Perform posture calculation.

  According to this application example, the first signal processing circuit included in the first physical quantity detection device generates the first physical quantity signal, and the second to Nth physical quantity detection devices via the second terminal. Can acquire the second to Nth physical quantity signals output from the first terminals of the second to Nth signal processing circuits, respectively, to constitute an attitude calculation device that executes the attitude calculation.

  In the posture calculation device according to this application example, the signal processing circuit included in the first physical quantity detection device does not need to communicate with the external device to acquire the first physical quantity signal, and the second to Nth. Since the detection circuit can generate the first physical quantity signal in parallel with acquiring the second to Nth physical quantity signals from the physical quantity detection device, the time for acquiring the first to Nth physical quantity signals Can be shortened. As a result, according to the posture calculation device according to this application example, the cycle of posture calculation is shorter than in the past, and the accuracy of posture calculation can be improved.

  In addition, since the posture calculation device according to this application example can be realized using N physical quantity detection devices having the same configuration, the development cost can be reduced.

[Application Example 11]
An electronic apparatus according to this application example includes the posture calculation device.

[Application Example 12]
The moving body according to this application example includes the posture calculation device.

  According to these application examples, since the posture calculation device capable of improving the accuracy of the posture calculation as compared with the related art is provided, for example, it is possible to realize a highly reliable electronic device and moving body. .

The functional block diagram of the physical quantity detection apparatus of this embodiment. The top view of the vibration piece of a physical quantity detection element. The figure for demonstrating operation | movement of a physical quantity detection element. The figure for demonstrating operation | movement of a physical quantity detection element. The figure which shows the structural example of a drive circuit. The figure which shows the structural example of an attitude | position calculating part. The figure which shows an example of the communication format via a 1st interface circuit. The figure which shows an example of the communication format via a 1st interface circuit. The figure which shows an example of the communication format via a 1st interface circuit. The figure which shows an example of the communication format via a 2nd interface circuit. The figure which shows an example of the communication format via a 2nd interface circuit. The figure which shows an example of the address map of a register. The figure which shows the data structure of each writable address shown in FIG. The figure which shows an example of the address map of a non-volatile memory. The figure which shows the data structure of each address shown in FIG. The functional block diagram of the physical quantity detection apparatus of a modification. The figure which shows the structural example of the attitude | position calculating apparatus of this embodiment. The figure which shows an example of the time chart of attitude | position calculation. FIG. 3 is a functional block diagram illustrating an example of a configuration of an electronic apparatus according to the embodiment. The perspective view which shows typically the digital camera which is an example of an electronic device. The figure which shows an example of the mobile body of this embodiment.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

  Hereinafter, a physical quantity detection device (angular velocity detection device) that detects an angular velocity as a physical quantity will be described as an example.

1. Physical quantity detection device 1-1. First Embodiment FIG. 1 is a functional block diagram of a physical quantity detection device of the present embodiment. The physical quantity detection device 1 according to the present embodiment includes a physical quantity detection element (sensor element) 2 that outputs an analog signal related to a physical quantity and a signal processing circuit 3.

  The physical quantity detection element 2 has a resonator element in which a drive electrode and a detection electrode are arranged. Generally, in order to reduce the impedance of the resonator element as much as possible and increase the oscillation efficiency, the resonator element is ensured to be airtight. Sealed in a package. In the present embodiment, the physical quantity detection element 2 includes a so-called double T-type vibrating piece having two T-type driving vibration arms.

FIG. 2 is a plan view of the resonator element of the physical quantity detection element 2 of the present embodiment. The physical quantity detection element 2 includes, for example, a double T-type vibrating piece formed of a Z-cut quartz substrate. The resonator element made of quartz is advantageous in that the detection accuracy of the angular velocity can be increased because the variation of the resonance frequency with respect to the temperature change is extremely small. Note that the X, Y, and Z axes in FIG. 2 indicate crystal axes.

  As shown in FIG. 2, in the vibration piece of the physical quantity detection element 2, the drive vibrating arms 101a and 101b extend in the + Y axis direction and the −Y axis direction from the two drive bases 104a and 104b, respectively. Drive electrodes 112 and 113 are formed on the side surface and the upper surface of the drive vibration arm 101a, respectively, and drive electrodes 113 and 112 are formed on the side surface and the upper surface of the drive vibration arm 101b, respectively. The drive electrodes 112 and 113 are connected to the drive circuit 20 via the DS terminal and the DG terminal of the signal processing circuit 3 shown in FIG.

  The drive bases 104a and 104b are connected to a rectangular detection base 107 via connecting arms 105a and 105b extending in the −X axis direction and the + X axis direction, respectively.

  The detection vibrating arm 102 extends from the detection base 107 in the + Y axis direction and the −Y axis direction. Detection electrodes 114 and 115 are formed on the upper surface of the detection vibrating arm 102, and a common electrode 116 is formed on the side surface of the detection vibrating arm 102. The detection electrodes 114 and 115 are connected to the detection circuit 30 via the S1 terminal and the S2 terminal of the signal processing circuit 3 shown in FIG. The common electrode 116 is grounded.

  When an AC voltage is applied as a drive signal between the drive electrode 112 and the drive electrode 113 of the drive vibration arms 101a and 101b, the drive vibration arms 101a and 101b are as shown by an arrow B due to the inverse piezoelectric effect as shown in FIG. In addition, bending vibration (excitation vibration) in which the tips of the two drive vibration arms 101a and 101b repeat approach and separation from each other is performed.

  In this state, when an angular velocity with the Z axis as the rotation axis is applied to the vibration piece of the physical quantity detection element 2, the drive vibrating arms 101 a and 101 b have Coriolis in a direction perpendicular to both the direction of the bending vibration indicated by the arrow B and the Z axis. Get the power of. As a result, the connecting arms 105a and 105b vibrate as indicated by an arrow C as shown in FIG. The detection vibrating arm 102 bends and vibrates as indicated by an arrow D in conjunction with the vibrations of the connecting arms 105a and 105b (arrow C). The phase of the bending vibration of the detection vibrating arm 102 and the bending vibration (excitation vibration) of the driving vibrating arms 101a and 101b due to the Coriolis force is shifted by 90 °.

  By the way, if the magnitude of the vibration energy or the magnitude of the vibration when the driving vibration arms 101a and 101b perform bending vibration (excitation vibration) is the same between the two driving vibration arms 101a and 101b, the driving vibration arms 101a and 101b, When the vibration energy of 101b is balanced and no angular velocity is applied to the physical quantity detection element 2, the detection vibrating arm 102 does not flex and vibrate. However, if the balance of the vibration energy of the two drive vibration arms 101a and 101b is lost, bending vibration is generated in the detection vibration arm 102 even when the physical quantity detection element 2 is not subjected to angular velocity. This bending vibration is called leakage vibration, and is bending vibration indicated by an arrow D like the vibration based on the Coriolis force, but is in phase with the drive signal.

  Then, AC charges based on these bending vibrations are generated in the detection electrodes 114 and 115 of the detection vibration arm 102 by the piezoelectric effect. Here, the AC charge generated based on the Coriolis force changes according to the magnitude of the Coriolis force (in other words, the magnitude of the angular velocity applied to the physical quantity detection element 2). On the other hand, the AC charge generated based on the leakage vibration is constant regardless of the magnitude of the angular velocity applied to the physical quantity detection element 2.

A rectangular weight portion 103 having a width wider than that of the drive vibrating arms 101a and 101b is formed at the ends of the drive vibrating arms 101a and 101b. By forming the weight portion 103 at the tips of the drive vibrating arms 101a and 101b, the Coriolis force can be increased and a desired resonance frequency can be obtained with a relatively short vibrating arm. Similarly, a weight portion 106 wider than the detection vibrating arm 102 is formed at the tip of the detection vibrating arm 102. By forming the weight portion 106 at the tip of the detection vibrating arm 102, the AC charge generated in the detection electrodes 114 and 115 can be increased.

  As described above, the physical quantity detection element 2 detects the AC charge (angular velocity component) based on the Coriolis force with the Z axis as the detection axis, and the AC charge (vibration leakage component) based on the leakage vibration of the excitation vibration. 115 via the output. The physical quantity detection element 2 functions as an angular velocity sensor that detects angular velocity.

  Returning to FIG. 1, the signal processing circuit 3 of the present embodiment includes a reference voltage circuit 10, a drive circuit 20, a detection circuit 30, an attitude calculation unit 40, a clock generation circuit 50, a storage unit 60, a first interface circuit 70, and a second interface circuit 70. The interface circuit 80 is included, and for example, it may be a one-chip integrated circuit (IC). Note that the signal processing circuit 3 of the present embodiment may have a configuration in which some of these elements are omitted or changed, or other elements are added.

  The reference voltage circuit 10 generates constant voltages and constant currents such as reference voltages VR <b> 1 and VR <b> 2 from the power supply voltage supplied from the VDD terminal of the signal processing circuit 3, and supplies them to the drive circuit 20 and the detection circuit 30.

  The drive circuit 20 generates a drive signal DRV for driving (exciting vibration) the physical quantity detection element 2 and supplies it to the drive electrode 112 of the physical quantity detection element 2 via the DS terminal. Further, the drive circuit 20 receives the oscillation current generated in the drive electrode 113 by the excitation vibration of the physical quantity detection element 2 through the DG terminal, and the amplitude of the drive signal DRV so that the amplitude of the oscillation current is held constant. Feedback control of the level. In addition, the drive circuit 20 generates a detection signal SDET having the same phase as the drive signal DRV and outputs the detection signal SDET to the detection circuit 30.

  FIG. 5 is a diagram illustrating a configuration example of the drive circuit 20. As shown in FIG. 5, the drive circuit 20 includes an I / V conversion circuit 21, a low-pass filter 22, a high-pass filter 23, a comparator 24, a full-wave rectifier circuit 25, an integrator 26, a comparator 27, and a comparator 28. It consists of Note that the drive circuit 20 of the present embodiment may have a configuration in which some of these elements are omitted or changed, or other elements are added.

  The I / V conversion circuit 21, the low-pass filter 22, the high-pass filter 23, the comparator 24, the full-wave rectifier circuit 25, the comparator 27 and the comparator 28 operate based on the reference voltage VR 1 supplied from the reference voltage circuit 10. . The reference voltage VR1 is an analog ground voltage, for example, a voltage that is ½ of the power supply voltage supplied from the VDD terminal. The integrator 26 operates based on the reference voltage VR2 supplied from the reference voltage circuit 10.

  The I / V conversion circuit 21 converts the oscillation current generated by the excitation vibration of the physical quantity detection element 2 and input via the DG terminal into an AC voltage signal.

  The low-pass filter 22 removes a high-frequency component of the output signal of the I / V conversion circuit 21, and the high-pass filter 23 removes a low-frequency component (such as an offset) of the output signal of the low-pass filter 22. The low-pass filter 22 and the high-pass filter 23 constitute a band-pass filter that allows a signal generated by the excitation vibration of the physical quantity detection element 2 to pass therethrough.

  The comparator 24 compares the voltage of the output signal of the high pass filter 23 with the reference voltage VR1, and generates a binarized signal. In this binarized signal, the high level voltage is the output voltage of the integrator 26 and the low level voltage is the ground voltage (0 V). The output signal of the comparator 24 is supplied to the physical quantity detection element 2 through the DS terminal as the drive signal DRV. By matching the frequency (drive frequency) of the drive signal DRV with the resonance frequency of the physical quantity detection element 2, the physical quantity detection element 2 can be stably oscillated.

  The full-wave rectification circuit 25 rectifies (full-wave rectification) the output signal of the I / V conversion circuit 21 and outputs a DC signal.

  The integrator 26 integrates and outputs the output voltage of the full-wave rectifier circuit 25 with reference to the reference voltage VR2. The output voltage of the integrator 26 becomes lower as the output voltage of the full-wave rectifier circuit 25 is higher (as the amplitude of the output signal of the I / V conversion circuit 21 is larger). Therefore, the higher the oscillation amplitude, the lower the high level voltage of the output signal (drive signal DRV) of the comparator 24, and the lower the oscillation amplitude, the higher level voltage of the output signal (drive signal DRV) of the comparator 24. Therefore, automatic gain control (AGC) is applied so that the oscillation amplitude is kept constant.

  The comparator 27 amplifies the voltage of the output signal of the high pass filter 23 to generate a binarized signal (square wave voltage signal) and outputs it as a detection signal SDET. In the detection signal SDET, a high level voltage is a power supply voltage, and a low level voltage is a ground voltage (0 V).

  The comparator 28 amplifies the voltage of the output signal of the high pass filter 23 to generate a binarized signal (square wave voltage signal) and outputs it as the clock signal CKF. In the clock signal CKF, a high level voltage is a power supply voltage, and a low level voltage is a ground voltage (0 V).

  Returning to FIG. 1, the detection circuit 30 includes a QV amplifier 31, a variable gain amplifier (PGA) 32, a synchronous detection circuit 33, an A / D (Analog to Digital) conversion circuit 34, and a DSP (Digital Signal Processor) 35. It is comprised including. Note that the detection circuit 30 of the present embodiment may have a configuration in which some of these elements are omitted or changed, or other elements are added.

  The QV amplifier 31 receives an AC charge (detection current) including an angular velocity component and a vibration leakage component from the detection electrode 114 of the physical quantity detection element 2 via the S1 terminal, and generates a voltage signal corresponding to the AC charge. Let The QV amplifier 31 receives AC charge (detection current) including an angular velocity component and a vibration leakage component from the detection electrode 115 of the physical quantity detection element 2 via the S2 terminal, and a voltage signal corresponding to the AC charge. Is generated. The AC charge input from the detection electrode 114 to the QV amplifier 31 and the AC charge input from the detection electrode 114 to the QV amplifier 31 are in opposite phases (phase difference is 180 °). The signals are also in antiphase with each other.

  The variable gain amplifier 32 amplifies or attenuates the two signals output from the QV amplifier 31 and outputs two signals having desired voltage levels. The two signals output from the variable gain amplifier 32 have opposite phases.

The synchronous detection circuit 33 uses the detection signal SDET output from the drive circuit 20 to synchronously detect angular velocity components included in each of the two signals (detected signals) output from the variable gain amplifier 32. For example, the synchronous detection circuit 33 outputs two signals output from the variable gain amplifier 32 as they are when the detection signal SDET is at a high level, and is output from the variable gain amplifier 32 when the detection signal SDET is at a low level. It can be configured as a circuit that outputs two signals obtained by inverting two signals with respect to the reference voltage VR1.

  The A / D conversion circuit 34 operates in synchronization with the clock signal ADCCLK generated by the clock generation circuit 50, and converts the voltage value of the difference signal between the two signals output by the synchronous detection circuit 33 into digital data (angular velocity data). And output. The digital data output from the A / D conversion circuit 34 is sequentially updated at a predetermined rate (for example, 1.5 kHz). The A / D conversion circuit 34 may be, for example, a delta sigma type or a successive approximation type A / D conversion circuit.

The DSP 35 operates in synchronization with the clock signal DSPCLK generated by the clock generation circuit 50, and performs processing such as filtering digital data (angular velocity data) output from the A / D conversion circuit 34. In order to realize high-speed digital filtering processing or the like by the DSP 35, the frequency of the clock signal DSPCLK is sufficiently higher than the output rate (for example, 1.5 kHz) of the A / D conversion circuit 34, for example, about 400 kHz. The value of the digital data output from the DSP 35 represents the angular velocity ω ₁ detected by the physical quantity detection element 2 and is sequentially updated at a predetermined rate (for example, 1.5 kHz). Further, the DSP 35 outputs a flag signal DRDY indicating that the value ω _{1 of the} digital data has been updated.

  The digital data output from the DSP 35 becomes output data of the detection circuit 30. In this manner, the detection circuit 30 is a circuit that generates and outputs digital data (angular velocity data) as the first physical quantity signal based on the output signal of the physical quantity detection element 2.

The posture calculation unit 40 can perform posture calculation based on the first to Nth (N ≧ 2) physical quantity signals. In the present embodiment, the first to Nth physical quantity signals are angular velocity signals, and the attitude calculation unit 40 acquires digital data (angular velocity ω ₁ ) as the first physical quantity signal from the detection circuit 30 (DSP 35), N−1 pieces of digital data (angular velocities ω _{2 to} ω _N ) as _{second to} Nth physical quantity signals are acquired from the storage unit 60 (register 61). And the attitude | position calculating part 40 uses the setting information of the corresponding relationship between the 1st-Nth physical quantity signal and the 1st-Nth detection axis memorize | stored in the memory | storage part 60 (nonvolatile memory 62). Then, the detection axes of the acquired first to Nth physical quantity signals (angular velocities ω _{2 to} ω _N ) are recognized, and posture calculation is performed.

  In the present embodiment, the posture calculation unit 40 performs posture calculation using a quaternion. Alternatively, the posture calculation unit 40 calculates the first to Nth angles by integrating each of the first to Nth physical quantity signals as posture calculation. Whether the posture calculation unit 40 performs posture calculation using quaternions or calculates the first to Nth angles as posture calculation is determined by setting information stored in the storage unit 60 (nonvolatile memory 62). Is done. In the present embodiment, it is possible to set the posture calculation by the posture calculation unit 40 to be permitted or prohibited, and the posture calculation unit 40 generates a clock signal generated by the clock generation circuit 50 when the posture calculation is set to be permitted. Attitude calculation is performed in synchronization with MCLK, and when it is set to prohibit, no attitude calculation is performed.

For example, if the posture calculation unit 40 performs a three-dimensional posture calculation based on the first to third (N = 3 case) physical quantity signals, the angular velocity ω is output from the detection circuit 30 as the first physical quantity signal. Digital data (angular velocity data) representing ₁ is sequentially acquired at a predetermined period Δt (for example, 1 / 1.5 kHz≈0.67 ms). Further, the posture calculation unit 40 sequentially acquires digital data (angular velocity data) representing the angular velocity ω ₂ as the second physical quantity signal from the storage unit 60 at a predetermined period Δt (for example, 0.67 ms). Further, the posture calculation unit 40 sequentially acquires digital data (angular velocity data) representing the angular velocity ω ₃ as the third physical quantity signal from the storage unit 60 with a period Δt (for example, 0.67 ms). In addition, the posture calculation unit 40 includes the first to third physical quantity signals stored in the storage unit 60 (nonvolatile memory 62) and the x-axis and y-axis that are orthogonal to each other as the first to third detection axes. For example, digital data (angular velocity ω ₁ ) as the first physical quantity signal is recognized as angular velocity data (angular velocity ω _x ) around the x axis using the setting information of the correspondence relationship with the z axis, and the second physical quantity The digital data (angular velocity ω ₂ ) as a signal is recognized as angular velocity data (angular velocity ω _y ) around the y axis, and the digital data (angular velocity ω ₃ ) as a third physical quantity signal is converted into angular velocity data (angular velocity ω around the z axis). _z ). Then, the attitude calculation unit 40 is based on the angular velocity ω _x (= ω ₁ ) around the x axis, the angular velocity ω _y (= ω ₂ ) around the y axis, and the angular velocity ω _z (= ω ₃ ) around the z axis. The posture calculation can be performed using. For example, each time the attitude calculation unit 40 acquires angular velocities ω _x , ω _y , and ω _z for three axes, it updates the quaternion q according to the equation (1), and normalizes the updated quaternion q according to the equation (2). By doing so, posture calculation is performed.

Alternatively, the posture calculation unit 40 calculates the angle of the x axis by integrating the angular velocity ω _x (= ω ₁ ) around the x axis as the posture calculation, and integrates the angular velocity ω _y (= ω ₂ ) around the y axis. Then, the angle of the y axis can be calculated, and the angle of the z axis can be calculated by integrating the angular velocity ω _z (= ω ₃ ) around the z axis.

  By the way, in the present embodiment, the clock signal ADCCLK, the clock signal DSPCLK, and the clock signal MCLK are generated in the clock generation circuit 50 based on an output signal of an oscillation circuit (not shown) such as a CR oscillator or a ring oscillator. Due to process fluctuations and environmental fluctuations, the physical quantity detection device 1 has a frequency deviation of about ± 1%, for example, in the operation guaranteed temperature range (eg, −40 ° C. to + 85 ° C.). Therefore, since the update period of the digital data output from the detection circuit 30 operating in synchronization with the clock signal ADCCLK and the clock signal DSPCLK, that is, Δt in the equation (1) has an error of about ± 1%, The result also has an error of about ± 1%. On the other hand, since the physical quantity detection element 2 is made of quartz or the like having a good frequency temperature characteristic as a material, the deviation of the frequency of excitation vibration, that is, the frequency of the drive signal DRV is extremely small, for example, about ± 0.01%. It is. Therefore, in the present embodiment, the posture calculation unit 40 performs posture calculation using the clock signal CKF based on the drive signal DRV.

FIG. 6 is a diagram illustrating a configuration example of the posture calculation unit 40 that performs posture calculation using a quaternion. As shown in FIG. 6, the attitude calculation unit 40 includes D flip-flops 41A and 41B, a NOT circuit 42, a NOR circuit 43, a counter 44, multipliers 45A and 45B, a conversion unit 46, a matrix calculation unit 47, an adder 48, and A normalization unit 49 is included. In FIG. 6, the configuration for controlling permission / prohibition of posture calculation is omitted.

  In the D flip-flop 41A, the clock signal CKF is input to the input terminal (D), and the clock signal MCLK is input to the clock terminal. In the D flip-flop 41B, the signal output from the output terminal (Q) of the D flip-flop 41A is input to the input terminal (D), and the clock signal MCLK is input to the clock terminal. Since the clock signal CKF is asynchronous with the clock signal MCLK, it is synchronized with the clock signal MCLK by the D flip-flops 41A and 41B. In the D flip-flop 41C, a signal (clock signal CKF synchronized with the clock signal MCLK) output from the output terminal (Q) of the D flip-flop 41B is input to the input terminal (D), and the clock signal MCLK is input to the clock terminal. Is entered. A signal obtained by delaying the output signal of the flip-flop 41B by one cycle of the clock signal MCLK is output from the output terminal (Q) of the D flip-flop 41C.

  The NOT circuit 42 outputs a signal obtained by logically inverting the voltage level (low level / high level) of the output signal of the D flip-flop 41B. The NOR circuit 43 is low when one or both of the output signal of the D flip-flop 41C and the output signal of the NOT circuit 42 is high, and both the output signal of the D flip-flop 41C and the output signal of the NOT circuit 42 are low. Outputs a high level signal at the level. That is, the output signal of the NOR circuit 43 includes a plurality of pulses that become high level for one cycle of the clock signal MCLK every time the clock signal CKF changes (rises) from low level to high level.

  The counter 44 counts the number of pulses of the output signal of the NOR circuit 43 and outputs a count value when the flag signal DRDY is at a low level, and resets the count value to 0 when the flag signal DRDY becomes a high level. This count value represents the frequency ratio between the clock signal CKF and the flag signal DRDY.

  The multiplier 45A calculates and outputs the product of the count value output from the counter 44 and the coefficient value COEF. The coefficient value COEF is stored in the storage unit 60 (nonvolatile memory 62), and is a constant value calculated by Expression (3).

  In Expression (3), GS is the detection sensitivity (unit: ° / s / LSB) of the detection circuit 30 (GS is the physical quantity detection element 2). FREQ is the frequency (unit: Hz) of the clock signal CKF.

Based on the setting information of the correspondence relationship between the first to third physical quantity signals and the x-axis, y-axis, and z-axis stored in the storage unit 60 (non-volatile memory 62), the conversion unit 46 has three axes. the angular velocity data (angular velocity _{ω 1, ω 2, ω 3} ) of the x-axis angular velocity about omega _x, and outputs the converted to y-axis angular velocity omega _y and z axis of the angular velocity omega _z.

The matrix calculation unit 47 synchronizes with the clock signal MCLK, the angular velocity ω _x around the x axis, the angular velocity around the y axis, and the angular velocity ω _z around the z axis (all units are LSB) and the latest quaternion q (each element q _w , q _x , q _y , and q _z are expressed in radians), and calculates and outputs the matrix product part in the first term on the right side of Equation (1).

  The multiplier 45B calculates and outputs the product of the output value of the matrix operation unit 47 and the output value of the multiplier 45A. The output value of the multiplier 45B corresponds to the calculated value of the first term on the right side of Equation (1).

  The adder 48 calculates and outputs the sum of the output value of the multiplier 45B and the latest quaternion q. The output value of the adder 48 corresponds to the calculated value of Expression (1).

  The normalizing unit 49 normalizes the output value of the adder 48 so that the magnitude thereof becomes 1 and outputs it in synchronization with the clock signal MCLK. The output value of the normalizing unit 49 corresponds to the calculated value of Expression (2), and is the latest quaternion q.

  The posture calculation unit 40 configured in this manner obtains a frequency ratio between the clock signal CKF (for example, frequency deviation is ± 0.01%) and the flag signal DRDY (for example, frequency deviation is ± 1%), and the frequency Since Δt is corrected using the ratio and the quaternion q is calculated according to the equations (1) and (2), the accuracy of the posture calculation is improved.

  Returning to FIG. 1, the storage unit 60 includes a register 61 and a nonvolatile memory 62. The register 61 is set with address and data information used in communication with an external device (first external device) via the first interface circuit 70 and the second interface circuit 80. The register 61 stores data (for example, second to Nth physical quantities) acquired through communication with an external device (second to Nth external devices) via the first interface circuit 70 and the second interface circuit 80. Digital data as a signal), a result of posture calculation by the posture calculation unit 40 (for example, quaternion q), and the like are stored.

  In the nonvolatile memory 62, various trimming data (adjustment data and correction data) for the drive circuit 20 and the detection circuit 30, and communication with the outside via the first interface circuit 70 and the second interface circuit 80 are established. Various types of information are stored. The nonvolatile memory 62 can be configured as, for example, a MONOS (Metal Oxide Nitride Oxide Silicon) type memory or an EEPROM (Electrically Erasable Programmable Read-Only Memory).

  When the signal processing circuit 3 is turned on (when the voltage at the VDD terminal rises from 0 V to a desired voltage), various trimming data stored in the nonvolatile memory 62 is transferred to the register 61 and held. Various trimming data held in the register 61 are supplied to the drive circuit 20 and the detection circuit 30.

  In addition, as described above, in the present embodiment, the storage unit 60 (nonvolatile memory 62) stores setting information on the correspondence relationship between the first to Nth physical quantity signals and the first to Nth detection axes. The posture calculation unit 40 performs posture calculation using the setting information.

  The first interface circuit 70 is electrically connected to the XCS terminal, the SCLK terminal, the MOSI terminal, and the MISO terminal, and is a circuit for communicating with the first external device via these terminals. In communication via the first interface circuit 70, the first external device functions as a master, and the physical quantity detection device 1 (signal processing circuit 3) functions as a slave. Then, the first external device writes data to a predetermined address of the register 61, reads data from the predetermined address of the register 61, and transmits various commands via the first interface circuit 70. Thus, the operation of the signal processing circuit 3 can be controlled.

In the present embodiment, the first interface circuit 70 functions as one of an SPI (Serial Peripheral Interface) interface circuit and an I ² C (Inter-Integrated Circuit) interface circuit. For example, the first interface circuit 70 functions as an SPI interface circuit when the XCS terminal is at a low level, a clock signal is input through the SCLK terminal, a data signal is input through the MOSI terminal, and the MISO terminal is connected. The data signal is output via The first interface circuit 70 functions as an I ² C interface circuit when the XCS terminal is at a high level, and a clock signal is input through the SCLK terminal and a data signal is input / output through the MOSI terminal. . 7 to 9 show examples of communication formats (signal waveforms of the XCS terminal, the SCLK terminal, the MOSI terminal, and the MISO terminal) via the first interface circuit 70 when the first interface circuit 70 functions as an SPI interface circuit. Indicates. FIG. 7 shows a communication format when the first external device writes data to a predetermined address of the register 61. FIG. 8 shows a communication format when the first external device reads data from a predetermined address of the register 61. FIG. 9 shows a communication format when the first external device transmits a predetermined command. 7 to 9, R is a read bit, W is a write bit, A6 to A0 are 7-bit addresses, and D7 to D0 are 8-bit data.

  The second interface circuit 80 is electrically connected to the MSCK terminal and the MSDA terminal, and is a circuit for communicating with the second to Nth external devices via these terminals. In communication via the second interface circuit 80, the physical quantity detection device 1 (signal processing circuit 3) functions as a master, and the second to Nth external devices function as slaves. The physical quantity detection device 1 (signal processing circuit 3) writes data to a predetermined address of a storage unit (register) included in the second to Nth external devices via the second interface circuit 80, Data can be read from a predetermined address of a storage unit (register) included in the 2nd to Nth external devices.

In the present embodiment, the second interface circuit 80 functions as an I ² C interface circuit, and a clock signal is output via the MSCK terminal and a data signal is input / output via the MSDA terminal. 10 and 11 show an example of a communication format (signal waveforms at the MSCK terminal and the MSDA terminal) via the second interface circuit 80. FIG. FIG. 10 shows signal waveforms when the physical quantity detection device 1 (signal processing circuit 3) writes data to a predetermined address of a storage unit (register) included in the second to Nth external devices. FIG. 11 shows signal waveforms when the physical quantity detection device 1 (signal processing circuit 3) reads data from a predetermined address of a storage unit (register) included in the second to Nth external devices. 10 and 11, Start is a start condition, Stop is a stop condition, Restart is a restart condition, ACK is an acknowledge bit, NACK is a non-acknowledge bit, R is a read bit, W is a write bit, and A7 to A0 are 8 bits. Register address (MI2CRAD [7: 0]), A6 to A0 are 7-bit slave addresses (MI2CAD [6: 0]), and D7 to D0 are 7-bit write data or read data.

  Communication with the first external device via the first interface circuit 70 is performed based on various types of information stored in the register 61. Communication between the second to Nth external devices via the second interface circuit 80 is performed based on various information stored in the register 61 and the nonvolatile memory 62.

  FIG. 12 is a diagram showing an example of an address map of the register 61. As shown in FIG. In FIG. 12, only a part of the address map is shown. In the column “R / W”, “R” can be read only, “R / W” can be read and written, “W (C)” represents a command. FIG. 13 is a diagram showing a data configuration of each writable address shown in FIG.

The first external device, for example, in accordance with the communication format shown in FIG. 8, digital data (angular velocity data) as the first physical quantity signal from the address 0x0A (register RDGR) of the register 61 via the first interface circuit 70. Can be read out. As described above, the physical quantity detection device 1 (signal processing circuit 3) receives the digital signal from the MISO terminal (an example of “first terminal”) as the first physical quantity signal in response to a read request from the first external device. Data (angular velocity data) can be output. In the case where the first interface circuit 70 functions as an I ² C interface circuit, the first interface circuit 70 receives the first request from the MOSI terminal (another example of the “first terminal”) in response to a read request from the first external device. Digital data (angular velocity data) as a physical quantity signal is output.

  Also, the first external device, for example, in accordance with the communication format shown in FIG. 7, the attitude calculation unit 40 and the second interface circuit 80 at the address 0x11 (register MCTL) of the register 61 via the first interface circuit 70. Setting information can be written. As shown in FIG. 13, at address 0x11 (register MCTL), bit 2 is a bit for setting the manual operation of the second interface circuit 80 to write or read, and bit 1 is the bit of the second interface circuit 80. Bit 0 is used to set permission / prohibition of manual operation, and bit 0 is a bit used to set permission / prohibition of posture calculation by the posture calculation unit 40. Furthermore, the first external device can read the setting information from the address 0x11 (register MCTL) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

  Also, the first external device, for example, according to the communication format shown in FIG. 8, calculates the calculation result information (three axes) from the address 0x12 (register RDAG) of the register 61 via the first interface circuit 70. Angle data or attitude data (eg, quaternion q) can be read.

  Further, the first external device, for example, specifies the address 0x13 (register AGRS) of the register 61 to the first interface circuit 70 in accordance with the communication format shown in FIG. A command for resetting (three-axis angle data or posture data) can be transmitted. When receiving the command, the first interface circuit 70 initializes the calculation result information of the posture calculation unit 40 and the operation of the posture calculation unit 40.

  Also, the first external device designates the address 0x14 (register MI2CST) of the register 61 to the first interface circuit 70 in accordance with the communication format shown in FIG. 9, for example, and performs the manual operation of the second interface circuit 80. A command can be sent to start.

  Further, the first external device communicates by manual operation of the second interface circuit 80 to the address 0x15 (register MI2CSAD) of the register 61 via the first interface circuit 70, for example, in accordance with the communication format shown in FIG. Can be written (slave address MI2CSAD [6: 0] in FIGS. 10 and 11). As shown in FIG. 13, in address 0x15 (register MI2CSAD), bits 6 to 0 are bits for setting a 7-bit slave address. Furthermore, the first external device can also read the slave address from the address 0x15 (register MI2CSAD) of the register 61 via the first interface circuit 70, for example, in accordance with the communication format shown in FIG.

  Also, the first external device communicates by manual operation of the second interface circuit 80 to the address 0x16 (register MI2CRAD) of the register 61 via the first interface circuit 70, for example, in accordance with the communication format shown in FIG. Can be written (register address MI2CRAD [7: 0] in FIGS. 10 and 11). As shown in FIG. 13, in address 0x16 (register MI2CRAD), bits 7 to 0 are bits for setting an 8-bit register address. Further, the first external device can read the register address from the address 0x16 (register MI2CRAD) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

  Further, the first external device performs communication by manual operation of the second interface circuit 80 to the address 0x17 (register MI2CDAD) of the register 61 via the first interface circuit 70 in accordance with the communication format shown in FIG. The write data (write data MI2CDAD [7: 0] in FIG. 10) used in the above can be written. As shown in FIG. 13, in address 0x17 (register MI2CDAD), bits 7-0 are bits for setting 8-bit write data. Further, the first external device can read the write data from the address 0x17 (register MI2CDAD) of the register 61 via the first interface circuit 70, for example, according to the communication format shown in FIG.

  Further, the first external device performs communication by manual operation of the second interface circuit 80 from the address 0x18 (register MI2CRD) of the register 61 via the first interface circuit 70 in accordance with the communication format shown in FIG. Thus, read data acquired from the second to Nth external devices can be read.

  FIG. 14 is a diagram illustrating an example of an address map of the nonvolatile memory 62. In FIG. 14, only a part of the address map is shown. FIG. 15 is a diagram showing a data configuration of each address shown in FIG. 14 and 15 are examples of cases where the signal processing circuit 3 communicates with the second external device and the third external device via the second interface circuit 80 (N = 3 case). .

As shown in FIGS. 14 and 15, in the nonvolatile memory 62, the slave address of the second external device is stored in bits 6 to 0 of the address 0x01 (memory MI2CSA1), and the bit of the address 0x02 (memory MI2CSA2) 6 to 0 store the slave address of the third external device. Also, in the nonvolatile memory 62, the bits 7 to 0 of the address 0x03 (memory MI2CRA1) are registers in which digital data (angular velocity ω ₂ ) as the second physical quantity signal is stored in the register of the second external device. An address is stored, and bits 7 to 0 of address 0x04 (memory MI2CRA2) store a register address in which digital data (angular velocity ω ₃ ) as a third physical quantity signal is stored in the register of the third external device Has been.

The physical quantity detection device 1 (signal processing circuit 3) is shown in FIG. 11 when the bit 0 (MCTL [0]) of the address 0x11 of the register 61 is set to 1 (permission of posture calculation by the posture calculation unit 40). By using the slave address stored in the address 0x01 as the slave address MI2CSAD [6: 0] and the register address stored in the address 0x03 as the register address MI2CRAD [7: 0] The digital data (angular velocity ω ₂ ) as the second physical quantity signal is read out as read data MI2CRD [6: 0] from the second external device via the 2-interface circuit 80. Further, the physical quantity detection device 1 (signal processing circuit 3) uses the slave address stored in the address 0x02 as the slave address MI2CSAD [6: 0] according to the communication format shown in FIG. 11, and uses the register address MI2CRAD [7: 0] is used as a third physical quantity signal as read data MI2CRD [6: 0] from the third external device via the second interface circuit 80 by using the register address stored at address 0x04. Read data (angular velocity ω ₃ ). As described above, the physical quantity detection device 1 (signal processing circuit 3) is configured from the MSDA terminal (an example of “second terminal”) to digital data (angular velocity data) as the second to Nth physical quantity signals. .

  In the nonvolatile memory 62, bit 2 at address 0x04 (memory AXISCTL) is a bit for setting one of angle calculation and quaternion calculation as attitude calculation by the attitude calculation unit 40. The posture calculation unit 40 performs angle calculation if bit 2 of address 0x04 is 0, and performs quaternion calculation if bit 2 of address 0x04 is 1.

In the nonvolatile memory 62, bits 1 to 0 of the address 0x04 (memory AXISCTL) set a detection axis (detection axis of the physical quantity detection element 2) of digital data (angular velocity ω ₁ ) as a first physical quantity signal. Is a bit for. If the bits 1 to 0 of the address 0x04 are 0, the posture calculation unit 40 recognizes the digital data (angular velocity ω ₁ ) as the first physical quantity signal as angular velocity data (angular velocity ω _x ) around the x axis. In this case, the posture calculation unit 40 recognizes the digital data (angular velocity ω ₂ ) as the second physical quantity signal as angular velocity data (angular velocity ω _y ) around the y axis, and the digital data (angular velocity) as the third physical quantity signal. ω ₃ ) is recognized as angular velocity data around the z axis (angular velocity ω _z ). If the bits 1 to 0 of the address 0x04 are 1, the posture calculation unit 40 recognizes the digital data (angular velocity ω ₁ ) as the first physical quantity signal as angular velocity data (angular velocity ω _y ) around the y axis. . In this case, the posture calculation unit 40 recognizes the digital data (angular velocity ω ₂ ) as the second physical quantity signal as angular velocity data (angular velocity ω _x ) around the x axis, and the digital data (angular velocity) as the third physical quantity signal. ω ₃ ) is recognized as angular velocity data around the z axis (angular velocity ω _z ). If the bits 1 to 0 of the address 0x04 are 2, the posture calculation unit 40 recognizes the digital data (angular velocity ω ₁ ) as the first physical quantity signal as angular velocity data (angular velocity ω _z ) around the z axis. . In this case, the posture calculation unit 40 recognizes the digital data (angular velocity ω ₂ ) as the second physical quantity signal as angular velocity data (angular velocity ω _x ) around the x axis, and the digital data (angular velocity) as the third physical quantity signal. ω ₃ ) is recognized as angular velocity data around the y axis (angular velocity ω _y ). As described above, in the nonvolatile memory 62, the bits 1 to 0 of the address 0x04 are setting information of the correspondence relationship between the first to third physical quantity signals and the x axis, the y axis, and the z axis.

  As described above, the conventional posture calculation device communicates with an external device to acquire the first to Nth physical quantity signals and executes the posture calculation, whereas the physical quantity detection device 1 ( The signal processing circuit 3) performs posture calculation based on the first physical quantity signal output from the detection circuit 30 and the second to Nth physical quantity signals acquired from the external device via the MSDA terminal. That is, in the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, the detection circuit 30 outputs the first physical quantity signal, so there is no need to communicate with an external device to acquire the first physical quantity signal. Moreover, since the detection circuit 30 can generate the first physical quantity signal in parallel with obtaining the second to Nth physical quantity signals from the external device, the first to Nth physical quantity signals are obtained. Time can be shortened. As a result, according to the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, the cycle of posture calculation is shorter than in the past, and the accuracy of posture calculation can be improved.

In the physical quantity detection device 1 of the present embodiment, the signal processing circuit 3 can output the first physical quantity signal from the MISO terminal or the MOSI terminal, and can input the second to Nth physical quantity signals from the MSDA terminal. Therefore, it can function as a circuit (master) that executes posture calculation using a physical quantity signal input from the MSDA terminal, or can function as a circuit (slave) that outputs a physical quantity signal used in posture calculation. . Therefore, for example, by electrically connecting the MSDA terminal of the first signal processing circuit 3 and the respective MOSI terminals of the second to Nth signal processing circuits 3, the first signal processing circuit 3 becomes the first signal processing circuit 3. It is possible to construct a posture calculation device that generates a physical quantity signal and obtains the second to Nth physical quantity signals from the second to N-th signal processing circuits 3 and executes posture calculation. Since such an attitude calculation device can be realized using N signal processing circuits 3 having the same configuration, the development cost can be reduced.

  Further, according to the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, the drive signal DRV for driving the physical quantity detection element 2 has a frequency deviation from the clock signals ADCCLK and DSPCLK generated by the clock generation circuit 50. Therefore, by using the clock signal CKF based on the drive signal DRV, the accuracy of the posture calculation can be improved. That is, according to the physical quantity detection device 1 (signal processing circuit 3) of the present embodiment, in the posture calculation using the physical quantity signal sampled based on the clock signal ADCCLK having a relatively large frequency deviation, the frequency deviation is relatively high. By correcting the sampling period (time integration period) Δt using the clock signal CKF based on the drive signal DRV having a small value, the accuracy of the posture calculation can be improved.

  According to this embodiment, by changing the setting information stored in the storage unit 60 (for example, the address 0x04 of the nonvolatile memory 62 in FIGS. 14 and 15), the first to Nth physical quantity signals and the Since the correspondence relationship with the 1st to Nth detection axes can be changed, the highly versatile physical quantity detection device 1 (signal processing circuit 3) can be realized.

1-2. In the above-described physical quantity detection device 1 (signal processing circuit 3), the attitude calculation unit 40 performs attitude calculation using quaternions based on the first to Nth physical quantity signals, or as attitude calculation, the first The first to Nth angles are calculated by integrating each of the Nth physical quantity signal, and the posture calculation unit 40 uses a rotation matrix based on the first to Nth physical quantity signals as posture calculation. Attitude calculation may be performed. In this variation of a physical quantity detecting device 1 (the signal processing circuit 3), for example, the posture computing unit 40, the angular velocity data of three axes (the angular velocity omega _1, omega _2, omega ₃₎ each time to obtain the storage unit 60 ( Based on the setting information of the correspondence relationship between the first to third physical quantity signals and the x-axis, y-axis, and z-axis stored in the non-volatile memory 62), the angular velocities ω ₁ , ω ₂ , ω ₃ is converted into an angular velocity ω _x around the x-axis, an angular velocity ω _y around the y-axis, and an angular velocity ω _z around the z-axis to calculate the rotation matrix represented by Equation (4), and the rotation matrix and the current The posture vector is updated by calculating the product with the posture vector.

  Further, in the physical quantity detection device 1 (signal processing circuit 3) described above, the posture calculation by the posture calculation unit 40 may be corrected. FIG. 16 is a functional block diagram of the physical quantity detection device 1 of this modification. In FIG. 16, the same components as those in the physical quantity detection device 1 (FIG. 1) of the present embodiment are denoted by the same reference numerals, and description thereof is omitted. The physical quantity detection device 1 of the modification shown in FIG. 16 has a configuration in which a correction processing unit 90 is added to the physical quantity detection device 1 (FIG. 1) of the present embodiment.

  The correction processing unit 90 corrects the posture calculation by the posture calculation unit 40 based on the output signal of at least one of the acceleration detection element and the geomagnetism detection element. For example, the acceleration detection element is electrically connected to a terminal (not shown) of the signal processing circuit 3, and the correction processing unit 90 receives an output signal of the acceleration detection element via the terminal (not shown), and the acceleration detection element The posture calculation by the posture calculation unit 40 may be corrected based on the output signal. Further, for example, the correction processing unit 90 receives an output signal of the acceleration detection element from the external device via the first interface circuit 70 or the second interface circuit 80, and the attitude calculation unit 40 based on the output signal of the acceleration detection element. You may correct | amend the attitude | position calculation by. Similarly, for example, the geomagnetism detection element is electrically connected to a terminal (not shown) of the signal processing circuit 3, and the correction processing unit 90 receives the output signal of the geomagnetism detection element via the terminal (not shown). You may correct | amend the attitude | position calculation by the attitude | position calculating part 40 based on the output signal of a geomagnetism detection element. In addition, for example, the correction processing unit 90 receives an output signal of the geomagnetism detection element from an external device via the first interface circuit 70 or the second interface circuit 80, and the attitude calculation unit 40 based on the output signal of the geomagnetism detection element. You may correct | amend the attitude | position calculation by.

  For example, the correction processing unit 90 estimates the gravitational acceleration vector from the result of the posture calculation by the posture calculation unit 40, calculates the gravitational acceleration vector from the output signal of the acceleration detection element, and uses the extended Kalman filter to estimate the estimated gravitational acceleration. Based on the difference between the vector and the calculated gravity acceleration vector, the error (bias) of the first to Nth physical quantity signals may be estimated. Further, for example, the correction processing unit 90 estimates the geomagnetic vector from the result of the posture calculation by the posture calculation unit 40, calculates the geomagnetic vector from the output signal of the geomagnetism detection element, and uses the extended Kalman filter to estimate the geomagnetic vector The error (bias) of the first to Nth physical quantity signals may be estimated based on the difference between the calculated geomagnetic vector and the first to Nth physical quantity signals. Then, the posture calculation unit 40 performs posture calculation based on the first to Nth physical quantity signals from which the error (bias) estimated by the correction processing unit 90 has been subtracted, whereby the integral error is corrected and the posture calculation is performed. Improves accuracy.

2. Posture Calculation Device FIG. 17 is a diagram illustrating a configuration example of the posture calculation device according to the present embodiment. As illustrated in FIG. 17, the posture calculation device 4 of the present embodiment includes N physical quantity detection devices 1-1 to 1-N. The physical quantity detection devices 1-1 to 1-N are all the physical quantity detection devices 1 of the present embodiment or the modification described above, and each physical quantity detection device 1-k (k = 1 to N) is a physical quantity detection element 2. -K and a signal processing circuit 3-k.

  The MSCK terminal of the signal processing circuit 3-1 included in the physical quantity detection device 1-1 (an example of “first physical quantity detection device”) and the physical quantity detection devices 1-2 to 1-N (“second to Nth The SCLK terminals of the signal processing circuits 3-2 to 3 -N included in each example of the “physical quantity detection device” are electrically connected. Further, the signal processing included in each of the MSDA terminal (an example of “second terminal”) of the signal processing circuit 3-1 included in the physical quantity detection device 1-1 and the physical quantity detection devices 1-2 to 1-N. The MOSI terminals (an example of “first terminal”) of the circuits 3-2 to 3 -N are electrically connected. Then, the physical quantity detection device 1-1 (the posture calculation unit 40 (see FIG. 1) of the signal processing circuit 3-1) performs the posture calculation.

  The physical quantity detection device 1-1 (signal processing circuit 3-1) communicates with the control device 5 as a host via the first interface circuit 70 (see FIG. 1). The first interface circuit 70 of the signal processing circuit 3-1 functions as an SPI interface circuit, and the control device 5 that is a master follows the communication format shown in FIGS. 7 to 9, for example, the physical quantity detection device 1 that is a slave. -1 (signal processing circuit 3-1), data is written, data is read, or a command is transmitted.

Further, the physical quantity detection device 1-1 (signal processing circuit 3-1) is connected to the physical quantity detection devices 1-2 to 1-N via the second interface circuit 80 (see FIG. 1) which is an I ² C interface circuit. Communicate with each other. Each of the physical quantity detection devices 1-2 to 1-N communicates with the physical quantity detection device 1-1 via the first interface circuit 70 (see FIG. 1). In each of the signal processing circuits 3-2 to 3 -N, the XCS terminal is pulled up to the power source, and the first interface circuit 70 functions as an I ² C interface circuit. For example, the physical quantity detection device 1-1 (signal processing circuit 3-1) serving as the master follows the communication format illustrated in FIGS. 10 and 11, and the physical quantity detection devices 1-2 to 1-N serving as slaves (signal processing circuit). For 3-2 to 3-N), data writing and data reading are performed.

  When viewed from the physical quantity detection device 1-1, the control device 5 corresponds to the “first external device” described above, and the physical quantity detection devices 1-2 to 1-N include the “second external device” described above. It corresponds to “apparatus” to “Nth external apparatus”.

The control device 5 can acquire the values of the first to Nth physical quantity signals (angular velocities ω _{1 to} ω _N ) and posture information (a quaternion or the first to Nth angles) from the posture calculation device 4. it can.

For example, in the case of N = 3, the storage unit 60 (the register 61 and the nonvolatile memory 62) of the signal processing circuit 3-1 of the physical quantity detection device 1-1 is configured as the address maps shown in FIGS. In this case, the procedure for the control device 5 to acquire the first to third physical quantity signal values (angular velocities ω ₁ , ω ₂ , ω ₃ ) from the attitude calculation device 4 at a predetermined period Δt is as follows. become.

  First, in accordance with the communication format shown in FIG. 7, the control device 5 sets 1 to both bit 2 (MCTL [2]) and bit 1 (MCTL [1]) of the address 0x11 of the register 61 of the signal processing circuit 3-1. Write and manual operation of the second interface circuit 80 are set to “read” and “permitted”.

  Further, the control device 5 writes 0x0A to bits 7 to 0 (register MI2CRAD [7: 0]) of the address 0x16 of the register 61 of the signal processing circuit 3-1, in accordance with the communication format shown in FIG. A register address (register address MI2CRAD [7: 0] in FIGS. 10 and 11) used in communication by manual operation of the second interface circuit 80 in 3-1 is set to 0x0A.

Next, the control device 5 reads out the first physical quantity signal (angular velocity ω ₁ ) from the address 0x0A (register RDGR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. Get.

Further, the control device 5 detects the physical quantity detection device in bits 6 to 0 (register MI2CSAD [6: 0]) of the address 0x15 of the register 61 of the signal processing circuit 3-1, according to the communication format shown in FIG. After writing the slave address of 1-2, according to the communication format shown in FIG. 9, the address 0x14 (register MI2CST) of the register 61 is designated and the second interface circuit 80 of the signal processing circuit 3-1 is manually operated. Send a command to start. As a result, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt and follows the communication format shown in FIG. 11 in the register 61 of the physical quantity detection device 1-2 (signal processing circuit 3-2). The second physical quantity signal (angular velocity ω ₂ ) is read from address 0x0A and stored in address 0x18 (register MI2CRD) of its own register 61.

Then, the control device 5 reads the second physical quantity signal (angular velocity ω ₂ ) from the address 0x18 (register RDGR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. get.

Further, the control device 5 detects the physical quantity detection device in bits 6 to 0 (register MI2CSAD [6: 0]) of the address 0x15 of the register 61 of the signal processing circuit 3-1, according to the communication format shown in FIG. After writing the slave address of 1-3, according to the communication format shown in FIG. 9, the address 0x14 (register MI2CST) of the register 61 is designated and the manual operation of the second interface circuit 80 of the signal processing circuit 3-1 Send a command to start. As a result, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt and follows the communication format shown in FIG. 11 in the register 61 of the physical quantity detection device 1-3 (signal processing circuit 3-3). The third physical quantity signal (angular velocity ω ₃ ) is read from address 0x0A and stored in address 0x18 (register MI2CRD) of its own register 61.

Then, the control device 5 reads out the third physical quantity signal (angular velocity ω ₃ ) from the address 0x18 (register RDGR) of the register 61 of the signal processing circuit 3-1 according to the communication format shown in FIG. get.

  Further, for example, in the case of N = 3, the storage unit 60 (the register 61 and the non-volatile memory 62) of the signal processing circuit 3-1 of the physical quantity detection device 1-1 is like the address maps shown in FIGS. When the control device 5 is configured as described above, the procedure for the control device 5 to acquire posture information from the posture calculation device 4 at a predetermined period Δt is as follows.

  First, in accordance with the communication format shown in FIG. 7, the control device 5 writes 1 to bit 0 (MCTL [0]) of the address 0x11 of the register 61 of the signal processing circuit 3-1 and performs the posture calculation by the posture calculation unit 40. To give permission.

As a result, the physical quantity detection device 1-1 (signal processing circuit 3-1) has a period Δt and follows the communication format shown in FIG. 11 in the register 61 of the physical quantity detection device 1-2 (signal processing circuit 3-2). The second physical quantity signal (angular velocity ω ₂ ) is read from address 0x0A and stored in its own storage unit 60 (register 61). In advance, in the nonvolatile memory 62 of the signal processing circuit 3-1, the slave address of the physical quantity detection device 1-2 is stored in the address 0x00 (memory MI2CSA1), and 0x0A is stored in the address 0x02 (memory MI2CRA1). The signal processing circuit 3-1 reads out the second physical quantity signal (angular velocity ω ₂ ) using these pieces of information.

In addition, the physical quantity detection device 1-1 (signal processing circuit 3-1) has the cycle Δt, and the address of the register 61 of the physical quantity detection device 1-3 (signal processing circuit 3-3) according to the communication format shown in FIG. The third physical quantity signal (angular velocity ω ₃ ) is read from 0x0A and stored in its own storage unit 60 (register 61). In advance, in the nonvolatile memory 62 of the signal processing circuit 3-1, the slave address of the physical quantity detection device 1-3 is stored in the address 0x01 (memory MI2CSA2), and 0x0A is stored in the address 0x03 (memory MI2CRA2). The signal processing circuit 3-1 reads out the third physical quantity signal (angular velocity ω ₃ ) using these pieces of information.

Then, the attitude calculation unit 40 of the signal processing circuit 3-1 acquires the first physical quantity signal (angular velocity ω ₁ ) from the detection circuit 30 with a period Δt, and also stores the storage unit 60 (register 61 with each period Δt). ) To obtain the second physical quantity signal (angular velocity ω ₂ ) and the third physical quantity signal (angular velocity ω ₃ ), perform posture calculation, and store the result of the posture calculation as an address 0x12 (
Register RDAR). Note that the attitude calculation unit 40 of the signal processing circuit 3-1 performs the first to third physical quantity signals (angular velocity ω) according to bits 1 to 0 (AXISCTL [1: 0]) of the address 0x04 of the nonvolatile memory 62. ₁ , ω ₂ , ω ₃ ) are converted into triaxial angular velocities ω _x , ω _y , ω _z , and the angle is calculated as posture calculation according to the setting of bit 2 (AXISCTL [2]) of address 0x04 in the nonvolatile memory 62. Performs computation or quaternion computation.

  Next, the control device 5 reads out and obtains the result of the attitude calculation from the address 0x12 (register RDAR) of the register 61 of the signal processing circuit 3-1, in accordance with the communication format shown in FIG.

FIG. 18 shows an example of a time chart of posture calculation in the physical quantity detection device 1-1 (signal processing circuit 3-1). As shown in FIG. 18, in the physical quantity detection device 1-1 (signal processing circuit 3-1), the posture calculation unit 40 acquires the first physical quantity signal (angular velocity ω ₁ ) from the detection circuit 30. There is no need to acquire the _first physical quantity signal (angular velocity ω ₁ ) via the interface circuit 80. Therefore, in the posture calculation device 4 of this embodiment, the posture calculation period Δt is determined by the physical quantity detection device 1-2 (signal processing circuit 3-1) via the second interface circuit 80. The second physical quantity signal (angular velocity ω ₂ ) and the third physical quantity signal (angular velocity ω ₃ ) are acquired from the (signal processing circuit 3-2) and the physical quantity detection device 1-3 (signal processing circuit 3-3), respectively. It depends on the communication time required. On the other hand, in the conventional attitude calculation system, the control device 5 as a host receives first to third physical quantity signals (angular velocities ω ₁ , ω ₂ , ω ₃₎ from the physical quantity detection devices 1-1 to 1-3, respectively. ) To perform attitude calculation, the attitude calculation period Δt is determined by the control device 5 using the physical quantity detection devices 1-1 to 1-3 (signal processing circuit 3-2) and the physical quantity detection device 1-3 (signals). The communication time required to acquire the _first to third physical quantity signals (angular velocities ω ₁ , ω ₂ , ω ₃ ) from the processing circuit 3-3) cannot be shortened. In other words, the posture calculation device 4 of the present embodiment can perform posture calculation with a shorter cycle (higher rate) than the conventional posture calculation system.

  As described above, according to this embodiment, the signal processing circuit 3-1 included in the physical quantity detection device 1-1 generates the first physical quantity signal, and the physical quantity detection device 1 via the MSDA terminal. The posture calculation device 4 that obtains the second to Nth physical quantity signals output from the MOSI terminals of the signal processing circuits 3-1 to 3 -N included in each of the −2 to 1-N and executes the posture calculation is configured. can do.

  In the posture calculation device 4 of the present embodiment, the signal processing circuit 3-1 included in the physical quantity detection device 1-1 does not need to communicate with an external device to acquire the first physical quantity signal, and the physical quantity detection In parallel with the acquisition of the second to Nth physical quantity signals from the signal processing circuits 3-2 to 3 -N included in the devices 1-2 to 1 -N, the detection circuit 30 generates the first physical quantity signal. Therefore, the time for acquiring the first to Nth physical quantity signals can be shortened. As a result, according to the posture calculation device 4 of the present embodiment, the posture calculation period Δt becomes shorter than the conventional one, and the accuracy of the posture calculation can be improved.

  Moreover, since the attitude | position calculating apparatus 4 of this embodiment is realizable using N physical quantity detection apparatuses of the same structure, it can reduce development cost.

3. Electronic Device FIG. 19 is a functional block diagram showing an example of the configuration of the electronic device of the present embodiment. As illustrated in FIG. 19, the electronic apparatus 300 according to the present embodiment includes an attitude calculation device 310, a control device (MCU) 320, an operation unit 330, a ROM (Read Only Memory) 340, a RAM (Random Access Memory) 350, and a communication unit. 360 and the display part 370 are comprised. Note that the electronic device of the present embodiment may have a configuration in which some of the components (each unit) in FIG. 19 are omitted or changed, or other components are added.

  The posture calculation device 310 performs posture calculation based on the first to Nth physical quantity signals and outputs the result of the posture calculation to the control device (MCU) 320. As the posture calculation device 310, for example, the posture calculation device 4 of the present embodiment described above can be applied.

  The control unit (MCU) 320 transmits a communication signal to the posture calculation device 310 according to a program stored in the ROM 340 or the like, and performs various calculation processes and control processes using the output signal of the posture calculation device 310. In addition, the control unit (MCU) 320 displays various types of information on the display unit 370, various types of processing corresponding to operation signals from the operation unit 330, processing for controlling the communication unit 360 to perform data communication with an external device, and so on. For example, a process of transmitting a display signal for causing the display to be performed is performed.

  The operation unit 330 is an input device configured with operation keys, button switches, and the like, and outputs an operation signal corresponding to an operation by a user to the control unit (MCU) 320.

  The ROM 340 stores programs, data, and the like for the control unit (MCU) 320 to perform various calculation processes and control processes.

  The RAM 350 is used as a work area of the control unit (MCU) 320. Programs and data read from the ROM 340, data input from the operation unit 330, calculation results executed by the control unit (MCU) 320 according to various programs, and the like. Is temporarily stored.

  The communication unit 360 performs various controls for establishing data communication between the control unit (MCU) 320 and an external device.

  The display unit 370 is a display device configured by an LCD (Liquid Crystal Display) or the like, and displays various types of information based on a display signal input from the CPU 320. The display unit 370 may be provided with a touch panel that functions as the operation unit 330.

  For example, by applying the posture calculation device 4 of the present embodiment described above as the posture calculation device 310, the accuracy of posture calculation can be improved, so that a highly reliable electronic device can be realized.

  Various electronic devices can be considered as such an electronic device 300, for example, a personal computer (for example, a mobile personal computer, a laptop personal computer, a tablet personal computer), a mobile terminal such as a smartphone or a mobile phone, Digital cameras, inkjet discharge devices (for example, inkjet printers), storage area network devices such as routers and switches, local area network devices, mobile terminal base station devices, televisions, video cameras, video recorders, car navigation devices, real time Clock devices, pagers, electronic notebooks (including those with communication functions), electronic dictionaries, calculators, electronic game machines, game controllers, word processors, work Station, video phone, crime prevention TV monitor, electronic binoculars, POS terminal, medical equipment (eg, electronic thermometer, blood pressure monitor, blood glucose meter, electrocardiogram measuring device, ultrasonic diagnostic device, electronic endoscope), fish detector, various measurements Examples of such devices include instruments, instruments (for example, vehicles, aircraft, and ship instruments), flight simulators, head mounted displays, motion traces, motion tracking, motion controllers, and PDR (pedestrian orientation measurement).

FIG. 20 is a perspective view schematically showing a digital camera 1300 that is an example of the electronic apparatus 300 of the present embodiment. In addition, in FIG. 20, the connection with an external apparatus is also shown simply. Here, a normal camera sensitizes a silver halide photographic film with a light image of a subject, whereas a digital camera 1300 captures a light image of a subject by photoelectrically converting it with an image sensor such as a CCD (Charge Coupled Device). A signal (image signal) is generated.

  A display unit 1310 is provided on the back of a case (body) 1302 in the digital camera 1300, and is configured to display based on an imaging signal from the CCD. The display unit 1310 displays a subject as an electronic image. Function as. A light receiving unit 1304 including an optical lens (imaging optical system), a CCD, and the like is provided on the front side (the back side in the drawing) of the case 1302. When the photographer confirms the subject image displayed on the display unit 1310 and presses the shutter button 1306, the CCD image pickup signal at that time is transferred and stored in the memory 1308. In the digital camera 1300, a video signal output terminal 1312 and an input / output terminal 1314 for data communication are provided on the side surface of the case 1302. A television monitor 1430 is connected to the video signal output terminal 1312 and a personal computer 1440 is connected to the input / output terminal 1314 for data communication, if necessary. Further, the imaging signal stored in the memory 1308 is output to the television monitor 1430 or the personal computer 1440 by a predetermined operation. The digital camera 1300 includes a posture calculation device 310, and performs processing such as camera shake correction using an output signal of the posture calculation device 310, for example.

4). FIG. 21 is a diagram (top view) illustrating an example of the moving object according to the present embodiment. A moving body 400 shown in FIG. 21 includes an attitude calculation device 410, controllers 440, 450, and 460, a battery 470, and a navigation device 480. Note that the mobile body of the present embodiment may have a configuration in which some of the components (each unit) in FIG. 21 are omitted or other components are added.

  Attitude calculation device 410, controllers 440, 450, 460, and navigation device 480 operate with a power supply voltage supplied from battery 470.

  The posture calculation device 410 performs posture calculation based on the first to Nth physical quantity signals, and outputs the result of the posture calculation to the controllers 440, 450, and 460.

  The controllers 440, 450, and 460 are control devices that perform various controls such as a posture control system, a rollover prevention system, and a brake system, respectively, using the output signal of the posture calculation device 410.

  The navigation device 480 displays the position, time, and other various information of the mobile body 400 on the display based on output information from a built-in GPS receiver (not shown). In addition, the navigation device 480 specifies the position and orientation of the moving body 400 based on the output signal of the attitude calculation device 410 even when GPS radio waves do not reach, and continues displaying necessary information.

  For example, by applying the posture calculation device 4 of each of the above-described embodiments as the posture calculation device 410, the accuracy of posture calculation can be improved, so that a highly reliable moving body can be realized.

  As such a moving body 400, various moving bodies can be considered, and examples thereof include automobiles (including electric automobiles), aircraft such as jets and helicopters, ships, rockets, and artificial satellites.

The present invention is not limited to the present embodiment, and various modifications can be made within the scope of the gist of the present invention.

For example, in the above-described embodiments, a physical quantity detection device (angular velocity detection device) including a physical quantity detection element that detects an angular velocity, and an attitude calculation device, an electronic apparatus, and a moving body including the physical quantity detection device (angular velocity detection device) are taken as examples. As described above, the present invention can also be applied to a physical quantity detection device including a physical quantity detection element that detects various physical quantities, an attitude calculation device including the physical quantity detection device, an electronic apparatus, and a moving body. The physical quantity detected by the physical quantity detection element is not limited to angular velocity, but may be angular acceleration, acceleration, geomagnetism, inclination, or the like. Further, the vibration piece of the physical quantity detection element may not be a double T type, for example, a tuning fork type or a comb-teeth type, or a sound piece type having a triangular prism shape, a quadrangular prism shape, a cylindrical shape, or the like. Also good. Moreover, as a material of the resonator element of the physical quantity detection element, for example, a piezoelectric single crystal such as lithium tantalate (LiTaO ₃ ) or lithium niobate (LiNbO ₃ ) or lead zirconate titanate instead of quartz (SiO ₂ ). A piezoelectric material such as a piezoelectric ceramic such as (PZT) may be used, or a silicon semiconductor may be used. Further, for example, a structure in which a piezoelectric thin film such as zinc oxide (ZnO) or aluminum nitride (AlN) sandwiched between drive electrodes is arranged on a part of the surface of a silicon semiconductor may be used. The physical quantity detection element is not limited to a piezoelectric element, and may be a vibration element such as an electrodynamic type, a capacitance type, an eddy current type, an optical type, and a strain gauge type. Alternatively, the method of the physical quantity detection element is not limited to the vibration type, and may be, for example, an optical type, a rotary type, or a fluid type.

  The above-described embodiments and modifications are merely examples, and the present invention is not limited to these. For example, it is possible to appropriately combine each embodiment and each modification.

  The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same objects and effects). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that exhibits the same operational effects as the configuration described in the embodiment or a configuration that can achieve the same object. Further, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

DESCRIPTION OF SYMBOLS 1 ... Physical quantity detection apparatus, 2 ... Physical quantity detection element, 3 ... Signal processing circuit, 4 ... Attitude calculation apparatus, 5 ... Control apparatus, 10 ... Reference voltage circuit, 20 ... Drive circuit, 21 ... I / V conversion circuit, 22 ... Low pass filter, 23 ... High pass filter, 24 ... Comparator, 25 ... Full wave rectifier circuit, 26 ... Integrator, 27 ... Comparator, 28 ... Comparator, 30 ... Detector circuit, 31 ... QV amplifier, 32 ... Variable gain amplifier 33 ... Synchronous detection circuit, 34 ... A / D conversion circuit, 35 ... DSP, 40 ... Attitude calculation unit, 41A, 41B, 41C ... D flip-flop, 42 ... NOT circuit, 43 ... NOR circuit, 44 ... Counter, 45A , 45B ... multiplier, 46 ... conversion unit, 47 ... matrix operation unit, 48 ... adder, 49 ... normalization unit, 50 ... clock generation circuit, 60 ... storage unit, 61 ... regis 62, nonvolatile memory, 70, first interface circuit, 80, second interface circuit, 90, correction processing unit, 101a, 101b, drive vibration arm, 102, detection vibration arm, 103, weight unit, 104a, 104b ... driving base, 105a, 105b ... connecting arm, 106 ... weight, 107 ... detection base, 112, 113 ... driving electrode, 114, 115 ... detection electrode, 116 ... common electrode, 300 ... electronic device, 310 ... posture Arithmetic unit, 312 ... Drive circuit, 320 ... Control unit (MCU), 330 ... Operation unit, 340 ... ROM, 350 ... RAM, 360 ... Communication unit, 370 ... Display unit, 400 ... Moving body, 410 ... Attitude calculation unit, 440, 450, 460 ... controller, 470 ... battery, 480 ... navigation device, 1300 ... digital camera, 130 ... case, 1304 ... the light-receiving unit, 1306 ... shutter button, 1308 ... memory, 1310 ... the display unit, 1312 ... the video signal output terminal, 1314 ... input and output terminals, 1430 ... TV monitors, 1440 ... personal computer

Claims (12)

A detection circuit that generates a first physical quantity signal based on an output signal of the physical quantity detection element;
A first terminal capable of outputting the first physical quantity signal;
A second terminal capable of inputting second to Nth (N ≧ 2) physical quantity signals;
A posture calculation unit capable of performing posture calculation based on the first to Nth physical quantity signals.   The signal processing circuit according to claim 1, wherein the posture calculation unit performs the posture calculation using a quaternion.   The signal processing circuit according to claim 1, wherein the posture calculation unit calculates the first to Nth angles by integrating each of the first to Nth physical quantity signals as the posture calculation.   The signal processing circuit according to claim 1, wherein the posture calculation unit performs the posture calculation using a rotation matrix. A drive circuit for generating a drive signal for driving the physical quantity detection element;
The signal processing circuit according to claim 1, wherein the attitude calculation unit performs the attitude calculation using a clock signal based on the drive signal. A storage unit that stores setting information of correspondence between the first to Nth physical quantity signals and the first to Nth detection axes;
The signal processing circuit according to claim 1, wherein the posture calculation unit performs the posture calculation using the setting information.   The signal processing circuit according to claim 1, wherein each of the first to Nth physical quantity signals is an angular velocity signal.   8. The signal processing circuit according to claim 6, further comprising a correction processing unit that corrects the posture calculation by the posture calculation unit based on an output signal of at least one of an acceleration detection element and a geomagnetic detection element.   A physical quantity detection device comprising: the signal processing circuit according to claim 1; and the physical quantity detection element. N physical quantity detection devices according to claim 9 are provided,
The second terminal of the signal processing circuit provided in the first physical quantity detection device, and the first terminal of the signal processing circuit provided in each of the second to Nth physical quantity detection devices Are electrically connected,
An attitude calculation device in which the attitude calculation unit of the signal processing circuit included in the first physical quantity detection device performs the attitude calculation.   An electronic apparatus comprising the posture calculation device according to claim 10.   A moving body comprising the posture calculation device according to claim 10.

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