JP6807874B2 - クロック管理を介した電力低減 - Google Patents
クロック管理を介した電力低減 Download PDFInfo
- Publication number
- JP6807874B2 JP6807874B2 JP2017562279A JP2017562279A JP6807874B2 JP 6807874 B2 JP6807874 B2 JP 6807874B2 JP 2017562279 A JP2017562279 A JP 2017562279A JP 2017562279 A JP2017562279 A JP 2017562279A JP 6807874 B2 JP6807874 B2 JP 6807874B2
- Authority
- JP
- Japan
- Prior art keywords
- register
- frequency
- clock
- passive
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3253—Power saving in bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
- G06F3/165—Management of the audio stream, e.g. setting of volume, audio stream path
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
- G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
- G11B27/28—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
- G11B27/30—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
- G11B27/3027—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
- G11B27/3036—Time code signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R3/00—Circuits for transducers, loudspeakers or microphones
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R2460/00—Details of hearing devices, i.e. of ear- or headphones covered by H04R1/10 or H04R5/033 but not provided for in any of their subgroups, or of hearing aids covered by H04R25/00 but not provided for in any of its subgroups
- H04R2460/03—Aspects of the reduction of energy consumption in hearing devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Signal Processing (AREA)
- Health & Medical Sciences (AREA)
- Multimedia (AREA)
- Audiology, Speech & Language Pathology (AREA)
- General Health & Medical Sciences (AREA)
- Human Computer Interaction (AREA)
- Telephone Function (AREA)
- Bus Control (AREA)
- Information Transfer Systems (AREA)
- Small-Scale Networks (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/731,499 | 2015-06-05 | ||
| US14/731,499 US9841940B2 (en) | 2015-06-05 | 2015-06-05 | Power reduction through clock management |
| PCT/US2016/031411 WO2016195920A1 (en) | 2015-06-05 | 2016-05-09 | Power reduction through clock management |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018518763A JP2018518763A (ja) | 2018-07-12 |
| JP2018518763A5 JP2018518763A5 (enExample) | 2019-05-30 |
| JP6807874B2 true JP6807874B2 (ja) | 2021-01-06 |
Family
ID=56069257
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017562279A Expired - Fee Related JP6807874B2 (ja) | 2015-06-05 | 2016-05-09 | クロック管理を介した電力低減 |
Country Status (9)
| Country | Link |
|---|---|
| US (2) | US9841940B2 (enExample) |
| EP (1) | EP3304242B1 (enExample) |
| JP (1) | JP6807874B2 (enExample) |
| KR (1) | KR20180015638A (enExample) |
| CN (1) | CN107683441A (enExample) |
| AU (1) | AU2016270383A1 (enExample) |
| BR (1) | BR112017025925A2 (enExample) |
| TW (1) | TW201710824A (enExample) |
| WO (1) | WO2016195920A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9841940B2 (en) | 2015-06-05 | 2017-12-12 | Qualcomm Incorporated | Power reduction through clock management |
| TWI720153B (zh) * | 2016-03-29 | 2021-03-01 | 日商新力股份有限公司 | 送訊裝置、送訊方法、收訊裝置、收訊方法及收送訊系統 |
| US10248613B2 (en) * | 2017-01-10 | 2019-04-02 | Qualcomm Incorporated | Data bus activation in an electronic device |
| KR102317505B1 (ko) | 2017-06-09 | 2021-10-26 | 삼성에스디아이 주식회사 | 배터리 팩 및 배터리 팩의 제어 방법 |
| US10219073B1 (en) * | 2017-11-20 | 2019-02-26 | Ford Global Technologies, Llc | Vehicle audio system |
| US10560780B2 (en) | 2018-03-13 | 2020-02-11 | Qualcomm Incorporated | Phase alignment in an audio bus |
| KR20230005589A (ko) | 2021-07-01 | 2023-01-10 | 삼성전자주식회사 | 블루투스 통신을 사용하는 전자 장치와 이의 동작 방법 |
| CN115633394B (zh) * | 2022-02-23 | 2023-09-05 | 荣耀终端有限公司 | 一种功率控制方法及相关设备 |
| TWI833207B (zh) * | 2022-04-26 | 2024-02-21 | 新唐科技股份有限公司 | 用於匯流排系統的主裝置中的時脈頻率選擇裝置與方法 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7224756B2 (en) | 2001-08-01 | 2007-05-29 | Cirrus Logic, Inc. | Method and system for providing a codec clock signal at a desired operational rate |
| US20040037311A1 (en) * | 2002-08-07 | 2004-02-26 | Phonex Broadband Corporation | Digital narrow band power line communication system |
| US7372875B2 (en) * | 2002-09-30 | 2008-05-13 | Lucent Technologies Inc. | Systems and methods for synchronization in asynchronous transport networks |
| US7400359B1 (en) | 2004-01-07 | 2008-07-15 | Anchor Bay Technologies, Inc. | Video stream routing and format conversion unit with audio delay |
| US20090024234A1 (en) | 2007-07-19 | 2009-01-22 | Archibald Fitzgerald J | Apparatus and method for coupling two independent audio streams |
| US8775839B2 (en) * | 2008-02-08 | 2014-07-08 | Texas Instruments Incorporated | Global hardware supervised power transition management circuits, processes and systems |
| JP5609326B2 (ja) * | 2010-07-01 | 2014-10-22 | 富士通セミコンダクター株式会社 | クロック分周回路 |
| US8619821B2 (en) * | 2011-03-25 | 2013-12-31 | Invensense, Inc. | System, apparatus, and method for time-division multiplexed communication |
| US9281827B2 (en) | 2011-11-21 | 2016-03-08 | Cirrus Logic International Semiconductor Ltd. | Clock generator |
| US9929972B2 (en) | 2011-12-16 | 2018-03-27 | Qualcomm Incorporated | System and method of sending data via a plurality of data lines on a bus |
| CA2874899C (en) * | 2012-06-01 | 2017-07-11 | Blackberry Limited | Universal synchronization engine based on probabilistic methods for guarantee of lock in multiformat audio systems |
| US9436633B2 (en) * | 2013-02-22 | 2016-09-06 | Marvell World Trade Ltd. | Multi-slot multi-point audio interface |
| US9825755B2 (en) * | 2013-08-30 | 2017-11-21 | Qualcomm Incorporated | Configurable clock tree |
| US9830080B2 (en) * | 2015-01-21 | 2017-11-28 | Knowles Electronics, Llc | Low power voice trigger for acoustic apparatus and method |
| US9841940B2 (en) | 2015-06-05 | 2017-12-12 | Qualcomm Incorporated | Power reduction through clock management |
-
2015
- 2015-06-05 US US14/731,499 patent/US9841940B2/en active Active
-
2016
- 2016-05-09 EP EP16724558.8A patent/EP3304242B1/en active Active
- 2016-05-09 TW TW105114327A patent/TW201710824A/zh unknown
- 2016-05-09 JP JP2017562279A patent/JP6807874B2/ja not_active Expired - Fee Related
- 2016-05-09 WO PCT/US2016/031411 patent/WO2016195920A1/en not_active Ceased
- 2016-05-09 BR BR112017025925A patent/BR112017025925A2/pt not_active Application Discontinuation
- 2016-05-09 KR KR1020177034597A patent/KR20180015638A/ko not_active Withdrawn
- 2016-05-09 AU AU2016270383A patent/AU2016270383A1/en not_active Abandoned
- 2016-05-09 CN CN201680031751.7A patent/CN107683441A/zh active Pending
-
2017
- 2017-10-05 US US15/725,813 patent/US10416955B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US9841940B2 (en) | 2017-12-12 |
| US10416955B2 (en) | 2019-09-17 |
| US20180032307A1 (en) | 2018-02-01 |
| BR112017025925A2 (pt) | 2018-08-14 |
| CN107683441A (zh) | 2018-02-09 |
| JP2018518763A (ja) | 2018-07-12 |
| TW201710824A (zh) | 2017-03-16 |
| KR20180015638A (ko) | 2018-02-13 |
| EP3304242A1 (en) | 2018-04-11 |
| AU2016270383A1 (en) | 2017-11-09 |
| US20160357504A1 (en) | 2016-12-08 |
| WO2016195920A1 (en) | 2016-12-08 |
| EP3304242B1 (en) | 2019-07-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6807874B2 (ja) | クロック管理を介した電力低減 | |
| EP2668579B1 (en) | Bus clock frequency scaling for a bus interconnect and related devices, systems, and methods | |
| JP6239130B2 (ja) | 作業負荷に従ってメモリバス帯域幅を低減するためのシステムおよび方法 | |
| US10560780B2 (en) | Phase alignment in an audio bus | |
| EP2909730B1 (en) | Processor-based hybrid ring bus interconnect | |
| US9929972B2 (en) | System and method of sending data via a plurality of data lines on a bus | |
| JP6151465B1 (ja) | プロセッサコアの電力モードを制御するためのレイテンシベースの電力モードユニット、ならびに関連する方法およびシステム | |
| AU2015312023A1 (en) | Multi-channel audio communication in a serial low-power inter-chip media bus (slimbus) system | |
| US9721625B2 (en) | Time-constrained data copying between storage media | |
| US20200356505A1 (en) | Multiple masters connecting to a single slave in an audio system | |
| US20150378418A1 (en) | Systems and methods for conserving power in a universal serial bus (usb) | |
| US20200019523A1 (en) | Delayed bank switch commands in an audio system | |
| US9934178B2 (en) | Full bandwidth communication buses |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171206 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190419 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20190419 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20200219 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200309 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200601 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20201109 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20201208 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6807874 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| LAPS | Cancellation because of no payment of annual fees |