JP6758029B2 - Semiconductor device - Google Patents

Description

The present invention relates to an output circuit.

The open collector format is often used for the output of semiconductor devices. An open collector type output circuit includes a bipolar transistor in which the collector is connected to the output terminal of the output circuit. When the bipolar transistor is off, the output terminal has high impedance, and when the bipolar transistor is on, the voltage of the output terminal is pulled down.

FIG. 1 is a circuit diagram of an output circuit 130r examined by the present inventor. The output circuit 130r is provided in the output stage of a certain semiconductor integrated circuit 100r. The output circuit 130r includes an output transistor Q31 and a resistor R31. The emitter of the output transistor Q31 is grounded and the collector is connected to the output (OUT) terminal. A load (not shown) is connected to the OUT terminal. The resistor R31 is provided between the base and emitter of the output transistor Q31.

The transistor Q32 and the current source CS31 are amplification stages 120. The emitter of the transistor Q32 is grounded, and the current source CS31 and the base of the output transistor Q31 are connected to the collector. The current source CS ₃₁ produces a constant current I ₃₁ . The control signal S1 is input to the base of the transistor Q32. The control signal S1 can be, for example, the current signal _IB32 . Collector current _{I C31} of the output transistor Q31 changes according to the control signal S1, as a result, the electrical state _{S OUT} of the OUT terminal changes. Electrical state _{S OUT,} the collector current _{I C31,} the output impedance of the output circuit 130r or be grasped as the voltage of the OUT terminal.

Jikkenhei H4-19287

Figure 2 is a diagram showing the temperature dependence of the collector current _{I C31} of the output transistor Q31. When the bias current _{I 31} of the current source CS31 is generated is constant, the collector current _{I C31} is determined in accordance with the current amplification factor of the output transistor Q31 _{(h FE).} Flows collector current _{I C31} in the output transistor Q31, whereby the temperature of the output transistor Q31 itself is increased. Then, the current amplification factor h _FE increases, and the collector current _{IC 31} is further increased.

Positive feedback is applied to the collector current _{I C31} by the temperature dependence of the output circuit 130r in the current amplification factor _{h FE} of FIG. At this time, if the load impedance connected to the OUT terminal is low and the collector current IC ₃₁ is not limited, the output transistor Q31 may be overheated and its reliability may be lowered.

In order to solve this problem, the input current I _IN to the output circuit 130 may be reduced as the temperature rises. For example, an approach of reducing the bias current I ₃₁ generated by the current source CS ₃₁ as the temperature rises. Can be considered. However, if the bias current I ₃₁ has an intentional temperature gradient, the temperature characteristics of the semiconductor integrated circuit 100r itself may be deteriorated, and this approach may not be adopted depending on the application.

In addition, in the second embodiment of Patent Document 1, a technique of forming a resistor corresponding to the resistor R31 with a thermistor is disclosed. Thus by releasing the part of the base current _{I B31} of the output transistor Q31 in a different path (thermistor) in the high temperature state, inhibits the increase in the collector current _{I C31.}

In the third embodiment of Patent Document 1, in addition to the second embodiment, a transistor is further added between the base and emitter of the output transistor Q31, and the added transistor amplifies the current flowing through the thermistor. Thus by releasing the part of the base current I _B31 of the output transistor Q31 in a high temperature state to another path (the added transistors), it suppresses the increase in the collector current I _C31.

In the technique of Patent Document 1, a thermistor for temperature detection is essentially required, but in general, the thermistor is expensive, so that the circuit cost is high, and the thermistor is provided as a chip component, so that the semiconductor chip It becomes difficult to integrate into.

A certain aspect of the present invention has been made in view of such a problem, and one of its exemplary purposes is to provide an output circuit that suppresses an increase in collector current at high temperatures.

One aspect of the present invention relates to an open collector type output circuit. The output circuit consists of an output terminal, a first transistor which is an NPN type bipolar transistor whose emitter is grounded and a collector is connected to the output terminal, and an NPN type bipolar transistor whose collector and base are connected to the base of the first transistor. It includes a second transistor and a first resistor provided between the emitter and ground of the second transistor.

The second transistor is arranged so as to draw a part of the base current of the first transistor to another path by its collector current, and the collector current of the second transistor increases as the temperature rises due to its own temperature characteristics. Is biased. Therefore, in a high temperature state, an increase in the collector current of the first transistor can be suppressed by letting a part of the base current of the first transistor escape to another path.

The second transistor and the first resistor may be arranged in a region adjacent to the first transistor on the same semiconductor substrate as the first transistor.
As a result, the sensitivity of the first transistor to changes in temperature can be increased.

The output circuit of some embodiment may further include a second resistor provided between the base of the first transistor and ground.

Yet another aspect of the present invention relates to an open collector type output circuit. In this output circuit, the output terminal, the third transistor which is an NPN type bipolar transistor in which the emitter is connected to the ground and the collector is connected to the output terminal, and the fourth transistor in which the collector is connected to the base of the third transistor and the emitter is grounded. The transistor, the fifth transistor whose emitter is grounded and the collector is connected to the base of the fourth transistor, and the third resistor whose one end is connected to the collector of the fifth transistor and the other end is connected to the base of the fifth transistor. And a current source connected to the other end of the third resistor.

The fourth transistor is arranged so as to draw a part of the base current of the third transistor to another path by its collector current. Then, a current obtained by subtracting the sum of the collector current and the base current of the fifth transistor from the current generated by the current source flows through the base of the fourth transistor. Due to the temperature characteristics of the fifth transistor, its base current and collector current decrease and the base current of the fourth transistor increases in a high temperature state. That is, since the collector current of the fourth transistor increases, the base current of the third transistor decreases. Thus, an increase in the collector current of the third transistor can be suppressed.

The fourth transistor, the fifth transistor, and the third resistor may be arranged in a region adjacent to the third transistor on the same semiconductor substrate as the third transistor.
As a result, the sensitivity of the third transistor to changes in temperature can be increased.

The output circuit of some embodiments may further include a fourth resistor provided between the base of the third transistor and ground.

In some embodiments, the output circuit may be integrated on a single semiconductor substrate.
"Integrated integration" includes cases where all the components of a circuit are formed on a semiconductor substrate or cases where the main components of a circuit are integrated integrally, and some of them are used for adjusting circuit constants. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate. By integrating the circuit on one chip, the circuit area can be reduced and the characteristics of the circuit element can be kept uniform.

Another aspect of the present invention is a semiconductor device. This device is a semiconductor device, and changes the electrical state of the output terminal, the differential input stage, the amplification stage that amplifies the output signal of the differential input stage, and the output terminal according to the output signal of the amplification stage. It is equipped with an open collector type output stage. The output stage includes any of the output circuits described above.

In some embodiments, the semiconductor device may be integrated on a single semiconductor substrate.

It should be noted that any combination of the above components or the components and expressions of the present invention that are mutually replaced between methods, devices, systems, and the like are also effective as aspects of the present invention.

According to an aspect of the present invention, in an open collector type output circuit, an increase in collector current at a high temperature can be suppressed.

It is a circuit diagram of the output circuit examined by this inventor. It is a figure which shows the temperature dependence of the collector current of an output transistor. It is a circuit diagram of the semiconductor device which concerns on 1st Embodiment. 4 (a) to 4 (c) are diagrams showing simulation results of the output circuit of FIG. It is a circuit diagram of the semiconductor device which concerns on 2nd Embodiment. It is a circuit diagram of a semiconductor device. It is a layout diagram of the semiconductor device of FIG.

Hereinafter, the present invention will be described with reference to the drawings based on preferred embodiments. The same or equivalent components, members, and processes shown in the drawings shall be designated by the same reference numerals, and redundant description will be omitted as appropriate. Further, the embodiment is not limited to the invention but is an example, and all the features and combinations thereof described in the embodiment are not necessarily essential to the invention.

In the present specification, "a state in which the member A is connected to the member B" means that the member A and the member B are physically directly connected, or the member A and the member B are electrically connected. It also includes the case of being indirectly connected via other members that do not affect the state.
Similarly, "a state in which the member C is provided between the member A and the member B" means that the member A and the member C, or the member B and the member C are directly connected, and also electrically. It also includes the case of being indirectly connected via another member that does not affect the connection state.

(First Embodiment)
FIG. 3 is a circuit diagram of the semiconductor device 200A according to the first embodiment. The semiconductor device 200A includes an output circuit 130A at its output stage. The output circuit 130A includes an OUT terminal, a first transistor Q1, a temperature compensation circuit 132A, and a second resistor R2, and is integrated on one semiconductor substrate.

The first transistor Q1 is an NPN type bipolar transistor in which the emitter is grounded and the collector is connected to the OUT terminal. Temperature compensation circuit 132A is connected to the base of the first transistor Q1, for sinking large compensation current I _T higher temperatures. The temperature compensation circuit 132A includes a second transistor Q2 and a first resistor R1.

The second transistor Q2 is an NPN type bipolar transistor whose collector and base are connected to the base of the first transistor Q1. The first resistor R1 is provided between the emitter of the second transistor Q2 and the ground. The second resistor R2 is provided between the base of the first transistor Q1 and the ground.

It is desirable that the second transistor Q2 and the first resistor R1 are arranged in a region adjacent to the first transistor Q1 on the same semiconductor substrate as the first transistor Q1.

The above is the configuration of the semiconductor device 200A. Next, the operation will be described. 4 (a) to 4 (c) are diagrams showing the simulation results of the output circuit 130A of FIG. FIGS. 4 (a) to the input current _{I IN,} the compensation current _{I T} is the input current _{I IN} in FIG. 4 (b), the base current _{I B1} of the first transistor Q1 is, in FIG. 4 (c), ( i) the collector currents _{I C1} and (ii) the collector current _{I C31} of the transistor Q31 in FIG. 1 of the first transistor Q1 in FIG. 3 is shown.

The input current I _IN is designed so that the temperature fluctuation becomes small near room temperature (30 ° C.). Base-emitter voltage V _BE of the second transistor Q2 has a negative temperature characteristic. The voltage V _R1 of the first resistor R1 is represented by the equation (1) using the base voltage V _B1 of the first transistor Q1, and the current _IR1 flowing through the first resistor R1 is represented by the equation (2). ..
_VR1 = V _B1- V _BE ... (1)
I _R1 = V _R1 / R1 = (V _B1- V _BE ) / R1 ... (2)

Assuming that V _B1 is constant here, the current _IR1 has a positive temperature characteristic. Current _{I R1} is the sum of the collector current _{I C2,} and the base current _{I B2} of the second transistor Q2, which corresponds to the compensation current _{I T.} That is, the second transistor Q2 passes a number of compensation current _{I T} than higher the temperature in the ground, to reduce the base current _I B1 of the first transistor _{Q1 (= I IN -I T)} . As a result, an increase in the collector current _IC1 can be suppressed and reliability can be improved.

Further, according to the output circuit 130A, since the thermistor is unnecessary, the cost and the circuit area can be reduced.

In addition, according to the output circuit 130A of FIG. 3, the following effects can be obtained. Even in non-heat generating state, the base-emitter voltage _{V BE} of the first transistor Q1 increases, the base-emitter voltage _{V BE} of the second transistor Q2 is also increased, the collector current _{I C2} of the second transistor Q2 is increased, This acts to reduce the base current I _B1 of the first transistor Q1. Thus even in a non-heat generating state, it is possible to suppress the increase of the collector current I _C1.

(Second Embodiment)
FIG. 5 is a circuit diagram of the semiconductor device 200B according to the second embodiment. The semiconductor device 200B includes an output circuit 130B at its output stage. The output circuit 130B includes an OUT terminal, a third transistor Q3, a temperature compensation circuit 132B, and a fourth resistor R4, and is integrated on one semiconductor substrate.

The third transistor Q3 is an NPN type bipolar transistor in which the emitter is grounded and the collector is connected to the OUT terminal. Temperature compensation circuit 132B is connected to the base of the third transistors Q3, sinking large compensation current I _T higher temperatures. The temperature compensation circuit 132B includes a fourth transistor Q4, a fifth transistor Q5, a third resistor R3, and a current source CS.

In the fourth transistor Q4, the collector is connected to the base of the third transistor Q3, and the emitter is grounded. The emitter of the fifth transistor Q5 is grounded, and the collector is connected to the base of the fourth transistor Q4. One end of the third resistor R3 is connected to the collector of the fifth transistor Q5, and the other end is connected to the base of the fifth transistor Q5. The current source CS is connected to the other end of the third resistor R3 and supplies a constant current I ₁ . Preferably, the fourth transistor Q4, the fifth transistor Q5, and the third resistor R3 are arranged in a region adjacent to the third transistor Q3 on the same semiconductor substrate as the third transistor Q3. The fourth resistor R4 is provided between the base of the third transistor Q3 and the ground. The collector current _{I C4} of the fourth transistor Q4 corresponds to the compensation current _{I T.}

The above is the configuration of the semiconductor device 200B. Next, the operation will be described.

The fourth transistor Q4 is arranged to pull in another path a part of base current _{I B3} of the third transistor Q3 by the collector current _{I C4.} Then, the base of the fourth transistors Q4, the current _{I 1} current source CS1 is generated, a current obtained by subtracting the sum of the collector current _{I C5} and a base current _{I B5} of the fifth transistor Q5 flows.

The temperature characteristics of the fifth transistors Q5, in a high temperature state, the base current _{I B5} and the collector current _{I B6} decreases, the base current _{I B4} of the fourth transistor Q4 increases. That since the collector current _{I C4} of the fourth transistor Q4 increases, the base current _{I B3} of the third transistor Q3 decreases. Thus possible to suppress the increase of the collector current I _C3 of the third transistor Q3 at a high temperature.

Further, according to the output circuit 130B, since the thermistor is unnecessary, the cost and the circuit area can be reduced.

(Use)
Subsequently, the use of the semiconductor device (collectively referred to as 200) according to the first or second embodiment will be described. FIG. 6 is a circuit diagram of the semiconductor device 200. The semiconductor device 200 is a general-purpose comparator circuit. The semiconductor device 200 includes a differential input stage 110, an amplification stage 120, and an output circuit 130, and is integrated on one semiconductor substrate.

The differential input terminals INP / INN, the input signal _V P / _{V N} from the outside is inputted. To the power supply terminal VCC supply voltage _{V CC} is, the ground terminal GND is supplied with the ground voltage _{V SS.} The differential input stage 110 receives an INP / INN input signal. The amplification stage 120 amplifies the output signal of the differential input stage 110. An output circuit 130A or 130B (hereinafter collectively referred to as 130) is provided in the output stage of the semiconductor device 200. The output circuit 130 changes the electrical state of the OUT terminal according to the output signal I _IN of the amplification stage 120. The configuration of the differential input stage 110 and the amplification stage 120 is not particularly limited, and various known circuits can be adopted.

When V _{P <V N,} the output current _{I A} of the differential input stage 110 is substantially zero, the input current _{I IN} is also zero to the output circuit 130. Therefore, the first transistor Q1 is turned off, and the OUT terminal is in a high impedance state.

When _V P> _{V N} Conversely, increasing the output current _{I A} of the differential input stage 110, the input current _{I IN} flows to the output circuit 130. Therefore, the first transistor Q1 (Q3) is turned on, and the OUT terminal has a low level voltage. At this time, the base current _I B1 of the first transistor Q1 _{(Q3) (I B3)} is compensated by the temperature compensation circuit 132A (132B) so as to reduce at high temperatures.

FIG. 7 is a layout diagram of the semiconductor device 200 of FIG. The semiconductor device 200 of FIG. 7 incorporates two-channel voltage comparators CH1 and CH2. The configuration of the voltage comparator CH is as shown in FIG. In each channel, the first transistor Q1 of the output circuit 130 is arranged near the OUT terminal. Further, the temperature compensation circuit 132 is arranged in a region adjacent to the first transistor Q1.

The present invention has been described above based on the embodiments. It is understood by those skilled in the art that this embodiment is an example, and that various modifications are possible for each of these components and combinations of each processing process, and that such modifications are also within the scope of the present invention. is there. Hereinafter, such a modification will be described.

The application of the output circuit 130 is not limited to the voltage comparator, and can be applied to various circuits of the open collector type.

Although the present invention has been described using specific terms and phrases based on the embodiments, the embodiments merely indicate the principles and applications of the present invention, and the embodiments are defined in the claims. Many modifications and arrangement changes are permitted without departing from the ideas of the present invention.

200 ... semiconductor device, 110 ... differential input stage, 120 ... amplification stage, 130 ... output circuit, 132 ... temperature compensation circuit, Q1 ... first transistor, Q2 ... second transistor, Q3 ... third transistor, Q4 ... fourth Transistor, Q5 ... 5th transistor, R1 ... 1st resistor, R2 ... 2nd resistor, R3 ... 3rd resistor, R4 ... 4th resistor.

Claims (4)

A semiconductor device having a voltage comparator
The voltage comparator
The first differential input terminal that receives the first input signal and
The second differential input terminal that receives the second input signal and
Output terminal and
With a differential input stage
An amplification stage that amplifies the output signal of the differential input stage,
An open collector type output stage that changes the electrical state of the output terminal according to the output signal of the amplification stage,
(I) When the first input signal is smaller than the second input signal, the input current from the amplification stage to the output stage becomes zero, the output terminal becomes high impedance, and (ii) the first. When the input signal is larger than the second input signal, it is configured to generate a low level voltage at the output terminal by synchronizing the output current from the output terminal.
The output stage is
A third transistor, which is an NPN type bipolar transistor in which the emitter is grounded, the collector is connected to the output terminal, and the base receives an input current independent of its own collector current.
The temperature compensation circuit connected to the base of the third transistor and
With
The temperature compensation circuit
A fourth transistor in which the collector is connected to the base of the third transistor and the emitter is grounded.
The fifth transistor, whose emitter is grounded and the collector is connected to the base of the fourth transistor,
A third resistor, one end of which is connected to the collector of the fifth transistor and the other end of which is connected to the base of the fifth transistor.
A current source connected to the other end of the third resistor and generating a constant current independent of the input current and the collector current of the third transistor.
Including
The temperature compensation circuit is a semiconductor device characterized in that the collector current of the fourth transistor is increased as the temperature rises, and a larger compensation current is synced from the base of the third transistor as the temperature rises. The fourth transistor, the fifth transistor and the third resistor, in the third transistor and the same semiconductor substrate, according to claim 1, characterized in that disposed adjacent to the third transistor region Semiconductor device. The third further example Bei a fourth resistor provided between the base and the ground of the transistor, wherein the fourth resistor, no current flows when the first input signal is less than the second input signal, said first The semiconductor device according to claim 1 or 2 , wherein a current flows when one input signal is larger than the second input signal . The semiconductor device according to any one of claims 1 to 3 , wherein the semiconductor device is integrated on one semiconductor substrate.

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