JP6737378B2 - SiC composite substrate - Google Patents

Description

The present invention relates to a semiconductor device such as a Schottky barrier diode, a pn diode, a pin diode, a field effect transistor or an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) used for power control at high temperature, high frequency and large power. A SiC composite substrate having a single crystal SiC layer on a polycrystalline SiC substrate, which is used for production and growth of gallium nitride, diamond, and nanocarbon thin films, and in particular, a single crystal with a low defect density without a shape change caused by stress. The present invention relates to a large-diameter size composite substrate having a SiC surface.

Conventionally, a single crystal silicon substrate has been widely used as a semiconductor substrate. However, due to their physical limitations, it is becoming difficult to meet the requirements for higher operating temperature, higher breakdown voltage, and higher frequency, and expensive new material substrates such as single crystal SiC substrate and single crystal GaN substrate are used. Have begun. For example, silicon is used by configuring a power conversion device such as an inverter or an AC/DC converter using a semiconductor element using silicon carbide (SiC), which is a semiconductor material having a wider band gap than silicon (Si). The reduction of the power loss which cannot be achieved by the conventional semiconductor element is realized. By using the semiconductor element made of SiC, the loss accompanying the power conversion is reduced as compared with the conventional one, and the weight reduction, downsizing and high reliability of the device are promoted.

In the production of such a single crystal SiC substrate, a method (improved Rayleigh method) in which a high-purity SiC powder is sublimated at a high temperature of 2000° C. or higher and is regrown on a seed crystal placed separately is often used. It is normal. However, since the manufacturing process is complicated under extremely severe conditions, the quality and yield of the substrate are inevitably low, and the substrate becomes a very high cost, which hinders its practical use and widespread use.

By the way, on these substrates, the thickness of the layer (active layer) that actually expresses the device function is 0.5 to 100 μm in any of the above applications, and the remaining thickness portion is mainly used for handling machines. It is a handle member (substrate) that does not have any limitation on the defect density, that is, a portion that only plays the role of a general holding function.

Therefore, in recent years, a relatively thin single crystal SiC layer having a minimum thickness that can be handled is formed on a polycrystalline SiC substrate on a ceramic such as SiO ₂ , Al ₂ O ₃ , Zr ₂ O ₃ , Si ₃ N ₄ , AlN or Si. Substrates bonded through metals such as Ti, Ni, Cu, Au, Ag, Co, Zr, Mo and W have been studied. However, in the case of the former (ceramics), which is interposed for joining the single crystal SiC layer and the polycrystalline SiC substrate, since it is an insulator, conduction on the back surface at the time of device fabrication cannot be taken, and of the latter (metal). In this case, it is not practical because metal impurities are mixed into the device to cause deterioration of the device characteristics and reliability.

Therefore, various proposals have been made so far in order to improve these drawbacks. For example, in Japanese Patent No. 5051962 (Patent Document 1), ion implantation of hydrogen or the like is performed on a single crystal SiC substrate having a silicon oxide thin film. The applied source substrate and polycrystalline aluminum nitride (intermediate support) having silicon oxide laminated on the surface are bonded together on the silicon oxide surface, and the single crystal SiC thin film is transferred to the polycrystalline aluminum nitride (intermediate support), and then the polycrystalline A method of depositing SiC and then putting it in an HF bath to melt and separate the silicon oxide surface is disclosed. However, when a large-diameter SiC composite substrate is manufactured using the present invention, a large warpage occurs due to a difference in thermal expansion coefficient between the polycrystalline SiC deposited layer and aluminum nitride (intermediate support), which is a problem. In addition to this, there may be a problem that a structural defect occurs due to the high interfacial energy at the interface between different materials, the structural defect propagates into the single crystal SiC layer, and the defect density increases.

Further, in JP-A-2015-15401 (Patent Document 2), the surface of a supporting substrate of polycrystalline SiC is modified to an amorphous state by a high-speed atomic beam without forming an oxide film, and the surface of the single crystal SiC is also amorphous. After the modification, the two are brought into contact with each other to perform thermal bonding, thereby laminating the single crystal SiC layer on the polycrystalline SiC supporting substrate whose surface is difficult to flatten without forming an oxide film at the bonding interface. A method is disclosed. However, in this method, not only the delamination interface of single-crystal SiC but also the inside of the crystal is altered by the high-speed atomic beam, so it is difficult to recover the single-crystal SiC of a good quality even after the subsequent heat treatment. When it is used as a substrate or a template, it has a drawback that it is difficult to obtain a device with high characteristics and a high-quality SiC epitaxial film.

In addition to these drawbacks, in the above technique, in order to bond the single crystal SiC and the polycrystalline SiC of the supporting substrate, the bonding interface has a surface roughness (arithmetic mean surface roughness Ra (JIS B0601-2013)) of 1 nm or less. However, even if the surface of single-crystal SiC is modified to be amorphous, the subsequent grinding, polishing or chemical mechanical polishing (CMP) is essential. It takes an extremely long time to perform the smoothing process, and the cost increase is inevitable, which is a major obstacle to practical use.

Furthermore, when the crystallinity of the single crystal SiC layer is recovered, a volume change occurs, which leads to expansion of internal stress and defects (dislocations) generated from the polycrystal/single crystal interface, and further, the warp amount increases as the substrate size increases. Causes problems such as increase in Further, when the altered layer of the single crystal SiC layer is an amorphous layer, twinning is unavoidable because recrystallization of the layer involves uniform nucleation. In addition to this, since the process from ion irradiation to bonding is a continuous process in a vacuum, the cost of the device becomes large, and ion implantation at a deep range (high energy) depends on the roughness of the substrate. There is a problem that it becomes necessary and increases the apparatus cost.

Further, in JP-A-2014-216555 (Patent Document 3), a first layer of single crystal SiC including point defects is attached onto a supporting substrate and heated together with the supporting substrate to rearrange the atomic arrangement. The invention discloses that the surface defects and line defects are eliminated and the influence of the crystal plane of the supporting substrate on the upper layer is blocked. However, there is a problem that the point defects in the first layer are converted into complex defects during heat treatment, which causes twinning and stacking faults, and the point defects are distributed in the single crystal SiC layer (first layer). However, there is a problem that the substrate manufacturing process is complicated because multi-stage ion implantation is required, and further, dislocations are generated due to the high energy at the interface between the supporting substrate and the bonding layer.

Further, in JP-A-2014-22711 (Patent Document 4), a SiC layer having a low impurity density and a low density defect is bonded onto a supporting substrate having a high impurity density and a high density defect, and a semiconductor element is required as an upper layer thereover. There is disclosed a method of obtaining a low defect density layer equivalent to the low concentration layer by epitaxially growing a layer having the following impurity concentration. However, there remains a problem that metal contamination occurs at the bonding interface and dislocation propagates from the high-density substrate to the surface side because the crystal lattice is continuous from the substrate to the surface.

Further, in JP-A-2014-11301 (Patent Document 5), a SiC supporting substrate is heated to convert the surface thereof into a layer containing carbon as a main component, and a single crystal semiconductor layer is bonded to the surface. Later, a method of cleaving the whole surface or a part thereof is disclosed. However, since the layer containing SiC and carbon is bonded by a weak bond, the bonding interface is mechanically weak, and the carbon layer is damaged even in an oxidizing atmosphere. It cannot happen.

Further, in Japanese Patent Laid-Open No. 10-335617 (Patent Document 6), a hydrogen storage layer and an amorphous layer are provided in a single crystal semiconductor substrate without using ion implantation, and the amorphous layer is bonded to a supporting substrate to be solidified. A method for obtaining a semiconductor thin film on an insulating film by peeling a single crystal semiconductor substrate after phase regrowth is disclosed. However, in addition to the possibility of twinning during the solid phase growth of the amorphous layer, there is the problem that a substrate for a discrete device that allows a current to flow in the vertical direction cannot be manufactured because it has an insulating film. is there.

Other prior art documents related to the present invention include the following.
-"Reduction of Bowing in GaN-on-Sapphire and GaN-on-Silicon Substrates by Implanted by Internally Focused Lapse Journey in Japan". 51 (2012) 016504 (Non-Patent Document 1)

Japanese Patent No. 5051962 JP, 2005-15401, A JP, 2014-216555, A JP, 2014-22711, A JP, 2014-11301, A JP, 10-335617, A

"Reduction of Bowing in GaN-on-Sapphire and GaN-on-Silicon Substrates by Implanting by Internally Focused Lapse Processed Japan. 51 (2012) 0165504

The present invention has been made in view of the above circumstances, and does not involve an intervening layer between the polycrystalline SiC substrate and the single-crystal SiC layer, and the single-crystal SiC layer is free from defects such as a crystal structure. It is an object of the present invention to provide a SiC composite substrate having improved adhesion between the substrate and the single crystal SiC layer.

In order to achieve the above object, the present invention provides the following SiC composite substrate.
[1] In a SiC composite substrate having a single crystal SiC layer with a thickness of 100 nm or more and 1 μm or less on a polycrystalline SiC substrate with a thickness of 100 μm or more and 650 μm or less, an interface of contact between the polycrystalline SiC substrate and the single crystal SiC layer The whole or a part is an unmatched interface which is not lattice-matched, and the single crystal SiC layer has a smooth surface and also has a surface more uneven than the surface on the interface side with the polycrystalline SiC substrate. The uneven surface is such that the inclined surface forming the unevenness is oriented in a random direction with the normal direction of the surface of the single crystal SiC layer as a reference, and the densest surface of the polycrystalline SiC crystal in the polycrystalline SiC substrate. Are deposited so as to be parallel to the inclined planes that form the irregularities of the irregular surface of the single-crystal SiC layer, whereby the close-packed plane of the crystals of the polycrystalline SiC layer is the normal direction of the surface of the single-crystal SiC layer. A SiC composite substrate characterized by being randomly oriented with respect to.
[2] The SiC composite substrate according to [1], wherein the polycrystalline SiC substrate is a chemical vapor deposition film.
[3] The SiC composite substrate according to [1] or [2], wherein the polycrystalline SiC of the polycrystalline SiC substrate is a cubic crystal, and the closest packed surface is the {111} plane.
[4] In the rocking curve of the (111) plane of the SiC crystal that constitutes the polycrystalline SiC substrate with the normal axis of the surface of the single crystal SiC layer obtained by the X-ray rocking curve method as the reference (ω=0 degrees), ω≦ The SiC composite substrate according to [3], wherein the proportion of crystal grains satisfying −2 degrees or 2 degrees≦ω is 65% or more of all crystal grains constituting the polycrystalline SiC substrate.
[5] The SiC composite according to any one of [1] to [4], wherein the close-packed surface of the crystal lattice of the single crystal SiC layer has a deflection angle of more than 0 degree and within 10 degrees at the interface with the polycrystalline SiC substrate. substrate.
[6] The SiC composite substrate according to any one of [1] to [5], wherein a grain size of crystals constituting the polycrystalline SiC substrate is 0.1 μm or more and 30 μm or less.

According to the SiC composite substrate of the present invention, since the interface where the single crystal SiC layer and the polycrystalline SiC substrate are in contact is an unmatched interface in which the crystal lattices are not matched, microscopically stress is applied in a specific direction. Where there is a tendency that the two adhere to each other due to the action, the densest surface of the polycrystalline SiC crystal in the polycrystalline SiC substrate is randomly oriented with reference to the normal direction of the surface of the single-crystal SiC layer. Therefore, the tensile stress and the compressive stress are evenly generated in all directions at the interface between the single-crystal SiC layer and the polycrystalline SiC substrate to cancel each other, and the internal stress can be reduced in the entire interface. It is possible to improve the adhesive force of. Further, since the interface between the single crystal SiC layer and the polycrystalline SiC substrate is a mismatched interface, even if dislocations occur in the polycrystalline SiC substrate, the propagation into the single crystal SiC layer is blocked, and the polycrystalline SiC substrate is further prevented. Since the close-packed surface of the polycrystalline SiC crystal on the substrate is randomly oriented with reference to the normal direction of the surface of the single-crystal SiC layer, localized stress causes dislocation in the single-crystal SiC layer near the interface. Even if occurs, since they propagate isotropically, the propagating dislocations and stacking faults terminate each other, and it becomes possible to obtain a single crystal SiC surface having a low defect density.
Further, according to the method for manufacturing an SiC composite substrate of the present invention, there is unevenness than the surface on the holding substrate side due to roughening by mechanical processing, and the inclined surface forming the unevenness is a normal line of the surface on the holding substrate side. A single-crystal SiC layer having an uneven surface oriented in random directions with respect to the direction is formed, and polycrystalline SiC is deposited on the uneven surface by the chemical vapor deposition method so that the close-packed surface of the crystal of the polycrystalline SiC is Since the polycrystalline SiC substrate randomly oriented with reference to the normal direction of the surface of the single crystal SiC layer on the side of the holding substrate is formed, the SiC composite substrate of the present invention can be easily manufactured.

It is sectional drawing which shows the whole structure of the SiC composite substrate which concerns on this invention. It is a conceptual diagram which shows the microscopic structure in the interface of the single crystal SiC layer of a SiC composite substrate and a polycrystalline SiC substrate which concern on this invention. It is a conceptual diagram which shows the microscopic structure in the interface of the single crystal SiC layer of a conventional SiC composite substrate, and a polycrystal SiC substrate. It is a figure which shows the manufacturing process in Embodiment 1 of the manufacturing method of the SiC composite substrate which concerns on this invention. It is a figure which shows the manufacturing process in Embodiment 2 of the manufacturing method of the SiC composite substrate which concerns on this invention. It is a figure which shows the manufacturing process in Embodiment 3 of the manufacturing method of the SiC composite substrate which concerns on this invention. It is a figure which shows the manufacturing process in Embodiment 4 of the manufacturing method of the SiC composite substrate which concerns on this invention. 3 is a stereoscopic microscope image of the surface of the polycrystalline SiC substrate of Example 1. FIG. 5 is a diagram showing a measurement result of a polycrystalline SiC substrate in the SiC composite substrate of Example 1 by an X-ray diffraction method (θ-2θ method). 5 is a diagram showing an X-ray rocking curve (ω scan) of a polycrystalline SiC substrate in the SiC composite substrate of Example 1. FIG. It is the schematic which shows the measuring method of the bow amount of a SiC composite substrate.

[SiC composite substrate]
The SiC composite substrate according to the present invention will be described below.
The SiC composite substrate according to the present invention is a SiC composite substrate having a single crystal SiC layer on a polycrystalline SiC substrate, and the whole or part of the interface where the polycrystalline SiC substrate and the single crystal SiC layer contact each other is lattice-matched. The single-crystal SiC layer has a smooth surface and has a surface that is more uneven than the surface on the interface side with the polycrystalline SiC substrate. It is characterized in that the close-packed planes of the crystals of crystalline SiC are randomly oriented with reference to the normal direction of the surface of the single-crystal SiC layer.

1 and 2 show the structure of the SiC composite substrate according to the present invention. FIG. 1 is a cross-sectional view showing the overall configuration (macroscopic structure) of the SiC composite substrate, and FIG. 2 is a conceptual diagram showing the microscopic structure at the interface between the single crystal SiC layer and the polycrystalline SiC substrate.
As shown in FIG. 1, a SiC composite substrate 10 according to the present invention includes a polycrystalline SiC substrate 11 and a single crystal SiC layer 12 provided on the polycrystalline SiC substrate 11.

Here, the close-packed surface of the polycrystalline SiC crystal in the polycrystalline SiC substrate 11 is randomly oriented with the normal direction of the surface of the single-crystal SiC layer 12 as a reference.

It should be noted that “randomly oriented” means that the close-packed surface of the polycrystalline SiC crystal has a specific orientation when the polycrystalline SiC substrate 11 as a whole is viewed with the normal direction of the surface of the single crystal SiC layer 12 as a reference. It does not mean that it is biased, but that it is evenly oriented in all directions.

The thickness of the polycrystalline SiC substrate 11 is preferably 100 to 650 μm in consideration of the strength as a handle substrate, and more preferably 200 to 350 μm in consideration of series resistance when used as a vertical device. When the thickness is 100 μm or more, it is easy to ensure the function as the handle substrate, and when it is 650 μm or less, the cost and the electric resistance can be suppressed.

The polycrystalline SiC substrate 11 is preferably a film in which polycrystalline SiC is deposited by a chemical vapor deposition method (Chemical Vapor Deposition, CVD method), that is, a chemical vapor deposition film. That is, the polycrystalline SiC substrate 11 should be deposited in parallel with the undulating slopes of the surface of the single crystal SiC layer 12 so that the closest packed planes of the respective crystal grains are oriented in random directions (details will be described later). Yes) is preferred.

Further, the grain size of the crystals forming the polycrystalline SiC substrate 11 is preferably 0.1 μm or more and 30 μm or less, and more preferably 0.5 μm or more and 10 μm or less. By setting the crystal grain size to 30 μm or less, the area of the interface between the specific SiC crystal grain and the single crystal SiC layer 12 is suppressed, the localization of the stress at the interface is suppressed, and eventually the plastic deformation of the crystal lattice is suppressed. Since it becomes easy to suppress or suppress the movement of dislocations, it becomes easy to keep the quality of the single crystal SiC layer 12 high. Further, by setting the crystal grain size to 0.1 μm or more, it is possible to increase the mechanical strength of the polycrystalline SiC substrate 11 as a handle substrate and reduce the resistivity to function as a semiconductor substrate. It is easy to

Further, the polycrystalline SiC of the polycrystalline SiC substrate 11 is preferably a cubic crystal, and it is more preferable that its close-packed plane is a {111} plane. Since cubic SiC is an isotropic crystal and has four equivalent close-packed planes, it is possible to prevent the specific close-packed planes from being oriented in a specific direction, and thus the polycrystalline SiC substrate 11 The effect of reducing the stress at the interface between and the single crystal SiC layer 12 and the effect of reducing the warp of the SiC composite substrate 10 become more reliable. Further, since cubic SiC is the lowest temperature phase in polycrystalline SiC and can be formed even at a melting point of Si or lower, there is an advantage that the degree of freedom in selecting the material of the holding substrate described later is increased.
Note that the resistivity may be adjusted by introducing impurities into the polycrystalline SiC substrate 11. As a result, it can be suitably used as a substrate of a vertical power semiconductor device.

Further, the polycrystalline SiC substrate 11 is made of the same SiC as the upper single-crystal SiC layer 12, and since the single crystal SiC layer 12 and the polycrystalline SiC substrate 11 have the same thermal expansion coefficient, the SiC composite substrate 10 does not have any temperature. Warpage is reduced.

The single crystal SiC layer 12 may have any one of 4H-SiC, 6H-SiC, and 3C-SiC as long as it is made of single crystal SiC.

Further, the single crystal SiC layer 12 is peeled off in a thin film or layer form from a bulk single crystal SiC, for example, a single crystal SiC substrate having a crystal structure of 4H-SiC, 6H-SiC, 3C-SiC, as described later. It is preferably formed. Alternatively, the single crystal SiC layer 12 may be a film that is heteroepitaxially grown by a vapor phase growth method, as described later.

The single crystal SiC layer 12 is a thin film made of single crystal SiC having a thickness of 1 μm or less, preferably 100 nm or more and 1 μm or less, more preferably 200 nm or more and 800 nm or less, and further preferably 300 nm or more and 500 nm or less.

When the single crystal SiC layer 12 is formed by the ion implantation delamination method, the film thickness thereof is determined by the range of ion implantation (ion implantation depth), and the upper limit is about 1 μm. When the single crystal SiC layer 12 is used as an active layer of a power device, a thickness of 10 μm or more may be required. In this case, the SiC epitaxial layer 12 ′ is homogenized on the single crystal SiC layer 12. Epitaxial growth may be performed to form a single crystal SiC layer having a desired thickness.

Further, in the uneven surface of the single crystal SiC layer 12 on the interface side with the polycrystalline SiC substrate 11, the inclined surface forming the unevenness is oriented in a random direction with reference to the normal direction of the surface of the single crystal SiC layer 12. It is preferable that the The state of the surface irregularities will be described later in the embodiment of the method for manufacturing the SiC composite substrate.

FIG. 2 is a conceptual diagram showing a microscopic structure at the interface between the single crystal SiC layer 12 and the polycrystalline SiC substrate 11 of the SiC composite substrate 10 according to the present invention, and 11p is a crystal that constitutes the polycrystalline SiC substrate 11. , 11b is a crystal grain boundary thereof, and 12p is a single crystal lattice plane forming the single crystal SiC layer 12. The SiC composite substrate 10 has a structure in which a single crystal SiC layer 12 is in contact with a polycrystalline SiC substrate 11, and the whole or part of the interface between the polycrystalline SiC substrate 11 and the single crystal SiC layer 12 has a crystal lattice. Is a non-matching interface I _12/11 .

In FIG. 2, the crystals forming the polycrystalline SiC substrate 11 are formed for each inclined surface forming the unevenness of the surface of the single crystal SiC layer 12 on the interface side with the polycrystalline SiC substrate 11 (that is, the mismatch interface I _12/11 ). It has a structure in which the closest surface (lattice surface 11p) is deposited so as to be parallel to the inclined surface.

At the mismatched interface of the structure in which the single crystal SiC layer is in contact with the conventional polycrystalline SiC substrate, the discontinuity of the crystal lattice occurs due to the difference in the lattice spacing and the orientation of the lattice planes (FIG. 3). Since a dangling bond is generated in the atom (Si or C) located at this discontinuity (mismatched interface), the electrically neutral condition is locally disturbed and repulsive force or attractive force is exerted, and these are parallel to the interface. A different stress (arrow in the figure) is generated.

The orientation in which the stress acts is determined by the orientation orientation of each crystal plane. For this reason, stress acts on a specific orientation at a mismatched interface inclined to a specific orientation, and thus internal stress remains and the adhesive force decreases.

In the present invention, in order to prevent this internal stress from remaining or reduce it, the directions in which the stress acts on the mismatched interface I _12/11 are dispersed so that opposing stresses are generated and offset. That is, in the present invention, the close-packed surface (lattice surface 11p) of each crystal lattice of the crystal grains of the polycrystalline SiC substrate 11 is randomly determined with reference to the normal direction of the surface of the single crystal SiC layer 12 (the upper surface in FIG. 2). Oriented (dispersively oriented with the orientation direction of the close-packed surface of the single crystal SiC layer 12 as the central axis), tensile stress and compressive stress are uniformly generated and cancel out in all directions, and the single crystal SiC layer 12 and the polycrystalline SiC layer The interface (mismatched interface I _12/11 ) of the substrate 11 as a whole realizes no stress or a low stress (internal stress of 0.1 GPa or less).

At this time, when it is assumed that the close-packed planes of the respective crystal lattices of the crystal grains of the polycrystalline SiC substrate 11 are inclined at a deflection angle θ with reference to the surface (reference plane) of the single crystal SiC layer 12 (see FIG. 2), the ratio of the crystal grains satisfying θ≦−2 degrees or 2 degrees≦θ is preferably 32% or more, and more preferably 50% or more of all the crystal grains constituting the polycrystalline SiC substrate 11. .. When this ratio is less than 32%, the ratio of crystal grains satisfying −2 degrees<θ<2 degrees is 68% or more, and the ratio of matching interfaces to the interface area increases (that is, the close-packed surface has a specific orientation (for example, Since the proportion of the SiC crystals oriented on the surface of the single crystal SiC layer 12 (the normal direction to the upper surface in FIG. 2) increases, the stress canceling effect is impaired, and the single crystal SiC layer 12 and the polycrystalline SiC substrate 11 are The internal stress in the vicinity of the interface becomes high, and peeling or deformation may occur. It should be noted that θ=0 degree is the average (center) of the orientation distribution (that is, in the case of orientation with respect to the normal direction of the surface (reference plane) of the single crystal SiC layer 12 (the closest surface to the reference plane is If parallel))).

In order to enhance the adhesive force with the polycrystalline SiC substrate 11, it is preferable that the close-packed surface of the crystal of the single-crystal SiC layer 12 is parallel to the interface with the polycrystalline SiC substrate 11, but the single-crystal SiC layer In order to develop step flow epitaxial growth on the 12th surface, the crystal plane needs to be slightly inclined. Considering this, it is desirable that the close-packed surface of the crystal lattice of the single crystal SiC layer 12 has a deflection angle of more than 0 degrees and within 10 degrees at the interface with the polycrystalline SiC substrate 11. If the deflection angle of the close-packed surface of the crystal lattice of the single crystal SiC layer 12 exceeds 10 degrees, the energy of the mismatch interface becomes high, and the adhesive force between the single crystal SiC layer 12 and the polycrystalline SiC substrate 11 is increased. May be impaired, the frequency of dislocation generation at the interface may be increased, and the dislocation generated at the interface may propagate into the single crystal SiC layer 12.

Since the interface between the single-crystal SiC layer 12 and the polycrystalline SiC substrate 11 is the mismatched interface I _12/11 , even if dislocations occur in the polycrystalline SiC substrate 11, the interface does not match at the mismatched interface I _12/11 . Propagation into the single crystal SiC layer 12 is blocked. Further, even if dislocations are generated in the single crystal SiC layer 12 near the interface due to localized stress, they propagate isotropically, so the propagating dislocations and stacking faults terminate each other, resulting in low defect density. The surface of the single crystal SiC layer 12 can be obtained.

As described above, according to the SiC composite substrate 10 of the present invention, (1) there is no difference in thermal expansion between the single-crystal SiC layer 12 and the polycrystalline SiC substrate 11, and therefore warpage due to the difference in thermal expansion from the handle substrate occurs. It is solved, and (2) the damage, the compound defect, the twin crystal, and the stacking fault are not introduced into the single crystal SiC layer 12, and (3) the mechanical strength of the single crystal SiC layer 12/polycrystalline SiC substrate 11 interface is impaired. The single crystal SiC layer 12 and the polycrystalline SiC substrate 11 are strongly adhered (bonded) to each other, and (4) there is no metal intervening layer between the polycrystalline SiC substrate 11 and the single crystal SiC layer 12. Therefore, there is no metal contamination, and (5) since the insulating layer is not included between the polycrystalline SiC substrate 11 and the single crystal SiC layer 12, the substrate material and the electrical resistivity of the discrete element for passing a current in the vertical direction are variable. It can also be preferably used as a substrate material for various power semiconductors.

[Method of manufacturing SiC composite substrate]
In manufacturing the above-described SiC composite substrate 10 according to the present invention, it is impossible to epitaxially grow single-crystal SiC on a polycrystalline substrate, and therefore, it is disclosed in Patent Document 1 (Japanese Patent No. 5051962). As described above, it is preferable to adopt a method of depositing polycrystalline SiC as a handle substrate on the single crystal SiC layer. However, polycrystalline SiC is deposited on the surface of the single-crystal SiC layer that is the interface with the polycrystalline SiC substrate, and the orientation of the lattice plane is opposite to the surface on which the polycrystalline SiC of the single-crystal SiC layer is deposited. In order to make it random with respect to the normal direction of the front surface (that is, to evenly disperse in the orientation with the normal axis of the interface as the center of rotation), on the surface of the single-crystal SiC layer on the polycrystalline SiC deposition side. It is necessary to bring about the formation of nuclei oriented in random directions, which limits the conditions for forming the polycrystalline SiC substrate. In fact, we searched for crystal growth conditions where the polycrystalline SiC was not oriented in a specific orientation on the surface of the single-crystal SiC layer where the polycrystalline SiC was deposited, and attempted to optimize that condition (dispersion and homogenization of orientation orientation), Since it is necessary to search for a metastable amorphization condition, it is not easy to realize the structure of the SiC composite substrate 10 of the present invention. This is because the surface with the lowest energy is preferentially exposed to the surface during crystal growth, and the specific plane orientation tends to be oriented in the normal axis direction of the surface (preferred orientation). Is.

The inventors of the present invention intentionally impair the surface smoothness (roughening) of the surface of the single crystal SiC layer, which serves as the interface with the polycrystalline SiC substrate that serves as the handle substrate, to prevent the deposition of polycrystalline SiC crystals. Based on the idea that the orientation of the closest packed surface (lattice surface) can be randomized as described above, the present invention has been achieved through intensive studies.

That is, the method for manufacturing the SiC composite substrate according to the present invention is a method for manufacturing the SiC composite substrate 10 of the present invention having the single crystal SiC layer 12 on the polycrystalline SiC substrate 11 described above, and the method for manufacturing the main surface of the holding substrate. After the single crystal SiC thin film is provided, the surface of the single crystal SiC thin film is roughened by mechanical processing, and defects caused by this mechanical processing are further removed, so that this surface is more than the surface on the holding substrate side. A single-crystal SiC layer having unevenness, and the inclined surface forming the unevenness is an uneven surface which is oriented in a random direction with reference to the normal direction of the surface of the holding substrate, and then the unevenness of the single-crystal SiC layer Polycrystalline SiC is deposited on the surface by chemical vapor deposition, and the close-packed surface of the crystal of the polycrystalline SiC is randomly oriented with reference to the normal direction of the surface of the single crystal SiC layer on the side of the holding substrate. The present invention is characterized in that a SiC substrate is formed and then the holding substrate is physically and/or chemically removed.

Here, as the surface roughening treatment by the predetermined mechanical processing on the surface (polycrystalline SiC deposition side surface) of the single crystal SiC layer 12 which is the interface with the polycrystalline SiC substrate 11, the inclined surface forming the unevenness is used. Is not particularly limited as long as it is a mechanical processing that forms an uneven surface that is oriented in a random direction with reference to the normal direction of the surface of the holding substrate, but, for example, the single crystal SiC thin film surface is randomly formed by using diamond abrasive grains. It is preferable that the surface of the single crystal SiC thin film is roughened by polishing in the direction. At this time, the degree of roughening (the degree of unevenness and the randomness of the direction in which the inclined surface faces) is adjusted by the grain size of the diamond abrasive grains, the pressure applied to the roughened surface, the processing time, etc. be able to.

Here, the state of the surface irregularities of the single crystal SiC layer 12 can be specified by the surface roughness and the orientation state of the inclined surface forming the surface irregularities. The surface roughness referred to herein is, for example, arithmetic average roughness Ra, maximum height roughness Rz, root mean square roughness Rq (surface roughness RMS (Root-mean-quare)) (JIS B0501-2013) and the like.

The unevenness formed on the surface of the single-crystal SiC layer 12 on the polycrystalline SiC deposition side has an arithmetic average roughness Ra of 1 nm or more and 100 nm or less, and the maximum inclination of the inclined surface constituting the unevenness is uniform in any direction. It is preferably 2 degrees or more and 10 degrees or less with reference to the surface of the crystalline SiC layer 12 on the side of the holding substrate. The inclined surface forming the unevenness is a basal surface on which polycrystalline SiC is deposited, and the densest surface of polycrystalline SiC is parallel to the basal surface. The reason is that the surface energy of the close-packed surface is minimal and tends to predominantly cover the crystal surface. Therefore, if the irregularities on the surface of the single-crystal SiC are random, the direction in which the crystal of the polycrystalline SiC substrate 11 grows on the single-crystal SiC layer 12 can be intentionally changed randomly. That is, according to this structure, even if the crystal grains of the polycrystalline SiC substrate are preferentially oriented with respect to the surface of the single-crystal SiC layer 12, as shown in FIG. The orientation of the lattice planes 11p is dispersed and oriented according to the orientation of each inclined surface that constitutes the interface-side surface irregularities of the single crystal SiC layer 12 (with reference to the normal direction of the surface of the single crystal SiC layer 12 on the holding substrate side). Randomly oriented). At this time, when the maximum inclination of the inclined surface forming the surface irregularities on the polycrystalline SiC deposition side of single-crystal SiC layer 12 is 2 degrees or more and 10 degrees or less in any direction, the polycrystalline SiC substrate 11 to be deposited is The orientation of the lattice plane 11p of the crystal of the crystalline SiC is 2° or more and 10° or less so that the orientation is dispersed.

In particular, in FIG. 2, the orientation direction of the inclined surface of the deflection angle θ constituting the uneven surface in contact with the polycrystalline SiC substrate 11 in the single crystal SiC layer 12 indicates the interface between the polycrystalline SiC substrate 11 and the single crystal SiC layer 12. (Or the surface of the single crystal SiC layer 12 on the side of the holding substrate) is uniformly distributed in the rotationally symmetric directions around the normal axis, the microstructure of the mismatched interface is random in any direction. Therefore, the effect of offsetting the stress is sufficiently exhibited. When the orientation azimuth of the inclined surface of the deflection angle θ forming the uneven surface of the single-crystal SiC layer 12 that is in contact with the polycrystalline SiC substrate 11 is deviated to the specific orientation, the stress is concentrated on the specific orientation. , SiC composite substrate is warped, which is not preferable.

Further, when the arithmetic average roughness Ra of the surface of the single crystal SiC layer 12 on the polycrystalline SiC deposition side is less than 1 nm, it becomes impossible to secure a sufficient area for each inclined surface forming the surface irregularities, and the inclined surface is Since the crystal grain size of the deposited polycrystalline SiC becomes small, the polycrystalline SiC substrate 11 may not be able to secure the mechanical strength as the handle substrate and the low resistivity as the semiconductor substrate. Further, when the arithmetic average roughness Ra exceeds 100 nm, the thickness of the single crystal SiC layer for exhibiting the stress canceling effect also needs to be 100 nm or more, and the cost reduction effect of the composite substrate may not be expected. Furthermore, since undulations (irregularities) having a height of more than 100 nm have to be formed on the single crystal SiC layer, the damage introduced into the single crystal SiC layer becomes great, and the crystal quality as the substrate of the power semiconductor device is high. It will not be kept. Considering the feasibility of undulation processing on the surface of the single crystal SiC layer, the arithmetic average roughness Ra of the surface of the polycrystalline SiC deposition side is more preferably 1 nm or more and 10 nm or less, further preferably 1 nm or more and 5 nm or less.

In the method of manufacturing the SiC composite substrate of the present invention, it is preferable that the single crystal SiC thin film separated from the single crystal SiC substrate by the ion implantation separation method is transferred and provided on the holding substrate. Alternatively, SiC may be heteroepitaxially grown on the holding substrate to provide the single crystal SiC thin film. As a result, the single crystal SiC layer 12 having the necessary minimum film thickness and affecting the characteristics of the SiC composite substrate can be obtained by one-time ion implantation delamination treatment or heteroepitaxial growth. The substrate can be manufactured.

Further, it is preferable to use a thermal CVD method as the chemical vapor deposition method for forming the polycrystalline SiC substrate 11. Since polycrystalline SiC is deposited and formed on the single crystal SiC layer 12, it is possible to eliminate the step of high flattening due to grinding, polishing, CMP, etc. of SiC of a difficult-to-grind material as in the prior art.

Further, the holding substrate is easily processed by the ion implantation delamination method, is easily physically and/or chemically removed (that is, is ground or etched), and has a large difference in coefficient of thermal expansion from SiC. It is preferably made of a material that does not contain silicon, and particularly preferably made of polycrystalline or single crystal silicon. When a single crystal Si wafer is used as the holding substrate, a high-quality large-diameter substrate is available at a low price, so that the manufacturing cost of the SiC composite substrate can be reduced. In addition, it is possible to heteroepitaxially grow single-crystal cubic SiC on a single-crystal Si wafer, and since a single-crystal SiC substrate bonding or peeling process is not required, it has a larger diameter than a commercially available bulk SiC wafer. The SiC composite substrate can be manufactured at low cost.

By the way, since bulk single crystal SiC is expensive, it is economically unfavorable to use the single crystal SiC substrate as it is or manufacture the SiC composite substrate mainly using the single crystal SiC substrate. Therefore, in the present invention, as in Patent Document 1 (Japanese Patent No. 5051962), a single crystal SiC thin film is peeled from a single crystal SiC wafer, and the thin film is transferred to a holding substrate to secure apparent mechanical strength. After that, a predetermined surface unevenness (isotropic sloped portion (undulation)) is provided on the surface of the single-crystal SiC thin film, and then polycrystalline SiC is deposited to form a polycrystalline SiC substrate to obtain a SiC composite substrate. To do.

At this time, when the holding substrate has a coefficient of thermal expansion greatly different from that of the single crystal SiC layer or the polycrystalline SiC substrate, the laminate including the holding substrate is warped due to the temperature change during the production of the composite substrate. When such warpage occurs in the manufacturing process, the shape of the SiC composite substrate is warped even though the interface between the single-crystal SiC layer and the polycrystalline SiC substrate is reduced in stress or stress-free. Therefore, a flat substrate may not be obtained. If the SiC composite substrate lacks flatness, it becomes difficult to apply a photolithography process such as a device manufacturing process, and practical application of the SiC composite substrate is hindered.

Therefore, even if there is a difference in the coefficient of thermal expansion between the holding substrate and the single crystal SiC layer 12 or the polycrystalline SiC substrate 12, the laminated body including the holding substrate is prevented from warping so that the laminated body does not warp. It is preferable to deposit a polycrystalline SiC substrate to serve as a handle substrate on both sides of the holding substrate. In this case, even if the stress caused by the difference in thermal expansion coefficient occurs between the holding substrate and the polycrystalline SiC substrate, the stress acting on the front and back surfaces of the holding substrate are in opposite directions, and the magnitudes thereof are different from each other. Therefore, it is possible to prevent the laminate from warping at any processing temperature, and as a result, it is possible to obtain a SiC composite substrate having no warp. In addition to this, the apparent rigidity of the holding substrate is increased, the movement of dislocations in the polycrystalline SiC substrate is promoted, and the residual stress is eliminated, so that the SiC composite substrate is thermally and mechanically stable. Can be manufactured.

For example, a single crystal SiC layer carrier having the single crystal SiC layer provided only on the front surface of the holding substrate is produced, and the polycrystal is formed on each of the uneven surface of the single crystal SiC layer and the back surface of the holding substrate. A SiC substrate may be formed and then the holding substrate may be physically and/or chemically removed.

Alternatively, a single crystal SiC layer carrier having the single crystal SiC layers provided on both surfaces of the holding substrate is produced, and then the polycrystalline SiC substrate is formed on the uneven surface of each single crystal SiC layer, and then the holding is performed. It is preferred to physically and/or chemically remove the substrate. Thereby, two SiC composite substrates can be formed by one-time processing for forming a polycrystalline SiC substrate, and thus the effect of reducing the manufacturing cost is increased.

Alternatively, when it is difficult to provide the single crystal SiC layers on both sides of the holding substrate, two single crystal SiC layer carriers each having the single crystal SiC layer provided on only the front surface of the holding substrate are prepared. After joining or adhering the back surfaces of the holding substrates of these single crystal SiC layer carriers, the polycrystalline SiC substrate is formed on each of the uneven surfaces of the single crystal SiC layers on the front and back surfaces of the joined or adhered substrates. Then, the holding substrates may be separated from each other at the joining or bonding portion between the back surfaces thereof, and then each holding substrate may be physically and/or chemically removed. According to this, since one set of holding substrates having the single crystal SiC layers formed on both sides can be formed substantially, two SiC composite substrates can be formed by one forming process of the polycrystalline SiC substrate. It becomes possible to realize cost reduction, flattening, and stabilization.

Hereinafter, Embodiments 1 to 4 of the method for manufacturing the SiC composite substrate according to the present invention will be described.

(Embodiment 1)
The first embodiment of the present invention will be described with reference to FIG.
(Step 1-1)
First, a single crystal SiC substrate 12s to be bonded to the holding substrate 21 is prepared. Here, the single crystal SiC substrate 12s is preferably selected from those having a crystal structure of 4H-SiC, 6H-SiC, 3C-SiC. The sizes of the single crystal SiC substrate 12s and the holding substrate 21 described later are set based on the size and cost required for manufacturing a semiconductor element and growing a gallium nitride, diamond, or nanocarbon film. Further, the thickness of the single crystal SiC substrate 12s is preferably in the vicinity of the SEMI standard or JEIDA standard substrate thickness from the viewpoint of handling. As the single crystal SiC substrate 12s, a commercially available one, for example, a single crystal SiC wafer commercially available for power devices may be used, and the surface thereof is finish-polished by CMP (Chemical Mechanical Polishing (or Planarization)) processing. It is preferable to use a flat and smooth surface. Here, as the single crystal SiC substrate 12s, for example, a single crystal SiC wafer that is deflected twice in the [11-20] direction on the 4H-SiC(000-1)C plane is used.

Further, it is preferable to form a predetermined thin film 22a on at least the surface of the single crystal SiC substrate 12s to be bonded to the holding substrate 21 (FIG. 4A). Here, the thin film 22a is preferably a dielectric film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film having a thickness of about 50 nm to 600 nm. This not only facilitates bonding with the holding substrate 21, but also has an effect of suppressing channeling of implanted ions in the ion implantation process performed thereafter.

The thin film 22a may be formed by any method as long as it can be formed on the single crystal SiC substrate 12s with good adhesion. For example, a silicon oxide film is formed by PECVD or thermal oxidation, and a silicon nitride film, The silicon oxynitride film is preferably formed by a sputtering method.

(Step 1-2)
Next, the holding substrate 21 is prepared. The holding substrate 21 used in the present invention is preferably made of a heat resistant material having a heat resistant temperature of 1100° C. or higher (excluding single crystal SiC), and more preferably a substrate made of polycrystalline or single crystal silicon. Here, as the holding substrate 21, for example, a single crystal Si substrate having a plane orientation (111) plane is used.

Further, it is preferable to form the thin film 22a similar to that in the above step 1-1 on the surface of the holding substrate 21 to be bonded to at least the single crystal SiC substrate 12s (FIG. 4B).

(Process 1-3)
Next, hydrogen ions or the like are implanted into the surface of the single crystal SiC substrate 12s on which the thin film 22a is formed to form the ion implantation region 12i (FIG. 4C).

Here, at the time of ion implantation into the single crystal SiC substrate 12s, the implantation energy is such that the ion implantation region 12i can be formed from the surface to a desired depth, and a predetermined dose of at least hydrogen ions (H ⁺ ) or hydrogen molecules. Ions (H ₂ ⁺ ) are implanted. As a condition at this time, the ion implantation energy may be set so as to obtain a desired thin film thickness. He ions, B ions, or the like may be implanted at the same time, or any ion may be adopted as long as the same effect can be obtained. However, from the viewpoint of reducing the damage to the single crystal SiC crystal lattice, it is desirable that the ions are as light as possible.

The dose amount of hydrogen ions (H ⁺ ) implanted into the single crystal SiC substrate 12s is preferably 1.0×10 ¹⁶ atom/cm ^{2 to} 9.0×10 ¹⁷ atom/cm ² . If it is less than 1.0×10 ¹⁶ atom/cm ² , embrittlement of the interface may not occur, and if it exceeds 9.0×10 ¹⁷ atom/cm ² , bubbles are formed during heat treatment after bonding and transfer. It may be defective.

When hydrogen molecule ions (H ₂ ⁺ ) are used as implanted ions, the dose is preferably 5.0×10 ¹⁵ atoms/cm ^{2 to} 4.5×10 ¹⁷ atoms/cm ² . If it is less than 5.0×10 ¹⁵ atoms/cm ² , embrittlement of the interface may not occur, and if it exceeds 4.5×10 ¹⁷ atoms/cm ² , transfer becomes bubbles during heat treatment after bonding. It may be defective.

The depth from the ion-implanted substrate surface to the ion-implanted region 12i (that is, the ion implantation depth) corresponds to the desired thickness of the single crystal SiC thin film provided on the holding substrate 21, and is usually 100 to The thickness is 2,000 nm, preferably 300 to 500 nm, more preferably about 400 nm. The thickness of the ion implantation region 12i (that is, the ion distribution thickness) is preferably such that it can be easily peeled off by mechanical impact or the like, preferably 200 to 400 nm, more preferably about 300 nm.

(Process 1-4)
Subsequently, the surface of the single crystal SiC substrate 12s on which the thin film 22a is formed and the surface of the holding substrate 21 on which the thin film 22a is formed are subjected to a surface activation treatment and bonded. As the surface activation treatment, plasma activation treatment, vacuum ion beam treatment, or immersion treatment in ozone water may be performed.

Of these, when performing the plasma activation process, the single crystal SiC substrate 12s and/or the holding substrate 21 on which the processes up to the above steps 1-3 are completed are placed in the vacuum chamber, and the plasma gas is introduced under reduced pressure. After that, the surface is exposed to a high-frequency plasma of about 100 W for about 5 to 10 seconds to plasma-activate the surface. As the plasma gas, oxygen gas, hydrogen gas, nitrogen gas, argon gas, a mixed gas thereof, or a mixed gas of hydrogen gas and helium gas can be used.

In the vacuum ion beam processing, the single crystal SiC substrate 12s and/or the holding substrate 21 is placed in a high vacuum chamber, and an ion beam of Ar or the like is applied to the surfaces to be bonded to perform activation processing.

In the immersion treatment in ozone water, the single crystal SiC substrate 12s and/or the holding substrate 21 is immersed in ozone water in which ozone gas is dissolved, and the surface thereof is activated.

The above-described surface activation treatment may be performed only on the single crystal SiC substrate 12s or the holding substrate 21, but it is more preferable to perform it on both the single crystal SiC substrate 12s and the holding substrate 21.

Further, the surface activation treatment may be any one of the above methods, or a combination of treatments may be performed. Further, it is preferable that the surface of the single crystal SiC substrate 12s and the holding substrate 21 on which the surface activation treatment is performed is a surface on which bonding is performed, that is, the surface of the thin film 22a.

Next, the surfaces of the single crystal SiC substrate 12s and the holding substrate 21 which have been subjected to the surface activation treatment (the surfaces of the thin films 22a and 22a) are bonded as a bonding surface.

Next, after bonding the single crystal SiC substrate 12s and the holding substrate 21, heat treatment is preferably performed at 150 to 350° C., more preferably 150 to 250° C. to improve the bonding strength of the bonding surfaces of the thin films 22a and 22a. .. At this time, the substrate warps due to the difference in the coefficient of thermal expansion between the single crystal SiC substrate 12s and the holding substrate 21, but it is preferable to adopt a temperature suitable for each material to suppress the warpage. The heat treatment time depends on the temperature to some extent, but is preferably 2 hours to 24 hours.

As a result, the thin films 22a and 22a are adhered to form one layer, the intervening layer 22, and the single crystal SiC substrate 12s and the holding substrate 21 are firmly adhered to each other via the intervening layer 22 to form the bonded substrate 13 ( FIG. 4(d)).

(Step 1-5)
Thermal energy or mechanical energy is applied to the ion-implanted portion of the bonded substrate 13, the single-crystal SiC substrate 12s is separated in the ion-implanted region 12i, and the single-crystal SiC thin film 12a is transferred onto the holding substrate 21. Thus, the single crystal SiC thin film carrier 14 is obtained (FIG. 4(e)).

As the peeling method, for example, the bonded substrate 13 is heated to a high temperature, and the heat is used to generate minute bubble bodies of the ion-implanted components in the ion-implanted region 12i to cause the peeling, thereby removing the single crystal SiC substrate 12s. A thermal peeling method of separating can be applied. Alternatively, a low temperature heat treatment (for example, 500 to 900° C., preferably 500 to 700° C.) that does not cause thermal delamination is performed, and a physical impact is applied to one end of the ion implantation region 12i to mechanically delaminate. Then, a mechanical peeling method for separating the single crystal SiC substrate 12s can be applied. The mechanical peeling method is more preferable because the roughness of the transfer surface after transferring the single crystal SiC thin film is relatively smaller than that of the heat peeling method.

After the peeling treatment, the single crystal SiC thin film carrier 14 is heated under the conditions of a heating temperature of 700 to 1,000° C., which is higher than that during the peeling treatment, and a heating time of 1 to 24 hours. You may perform the heat processing which improves the adhesiveness of 12a and the holding substrate 21.

At this time, the thin films 22a and 22a firmly adhere to each other, and further, the thin films 22a and 22a firmly adhere to the single crystal SiC substrate 12s and the holding substrate 21, respectively. No peeling occurs.

The single crystal SiC substrate 12s after peeling can be reused as a substrate for bonding again in the method of manufacturing the single crystal SiC thin film carrier 14 by polishing or cleaning the surface again. Become.

(Step 1-6)
Next, the surface of the single crystal SiC thin film 12a of the single crystal SiC thin film carrier 14 is roughened by mechanical processing, and defects caused by this mechanical processing are removed to form the single crystal SiC layer 12 (Fig. 4(f)).

Here, as the surface roughening treatment by mechanical processing, it is preferable to roughen the surface of the single crystal SiC thin film 12a by polishing the surface of the single crystal SiC thin film 12a with diamond abrasive grains in a random direction. Specifically, the surface of the single crystal SiC thin film 12a of the single crystal SiC thin film carrier 14 is pressed against a rotating polishing cloth impregnated with diamond slurry so that the polishing direction becomes random so that the polishing direction becomes random. Buffing may be performed while changing the direction of 14. The surface of the single crystal SiC substrate 12s is originally smooth, and the surface of the single crystal SiC thin film 12a on the side of the holding substrate 21 reflects the smooth surface of the single crystal SiC substrate 12s. The buffed surface is roughened and has finer surface irregularities than the smooth surface on the holding substrate 21 side. Further, the surface of the single crystal SiC thin film 12a is an ion-implanted separation surface. However, according to the buffing process in which the polishing direction is randomized as described above, the damaged layer due to ion implantation is removed and the inclined surface forming the unevenness is formed. It is possible to form a surface condition in which fine irregularities are randomly oriented in the direction normal to the surface of the holding substrate 21 side.

Note that the degree of roughening of the single crystal SiC layer 12 (the size of the unevenness and the randomness of the direction in which the inclined surface faces) is determined by the grain size of the diamond abrasive grains, the pressure with which the single crystal SiC thin film carrier 14 is pressed, and It can be adjusted by the polishing time.

Next, since the surface of the single crystal SiC thin film 12a has a defect caused by mechanical processing (buffing processing), the defect is removed. Specifically, a thermal oxidation process is performed to form a thin thermal oxide film on the processed single crystal SiC thin film 12a. As a result, the defective region introduced by mechanical processing on the surface of the single crystal SiC thin film 12a becomes a thermal oxide film. At this time, a region damaged by the ion implantation is also included in the thermal oxide film. Then, the surface of the single crystal SiC thin film 12a is immersed in a hydrofluoric acid (hydrofluoric acid) bath to remove the thermal oxide film and expose a clean single crystal SiC surface (sacrificial oxidation method). By subjecting the single crystal SiC thin film 12a of the single crystal SiC thin film carrier 14 to the above treatment, the treated surface is more uneven than the surface on the holding substrate 21 side, and the inclined surface forming the unevenness is the holding substrate 21. The single crystal SiC layer 12 can be an uneven surface that is oriented in a random direction with respect to the normal direction of the side surface.

Here, the state of the surface irregularities of the single crystal SiC layer 12 is a surface irregularity having an arithmetic average roughness Ra of 1 nm or more and 100 nm or less, and the maximum inclination of the inclined surface forming the irregularities is 2 degrees or more in any orientation. It is preferably 10 degrees or less. That is, as the surface roughness of the surface of the single crystal SiC layer 12, for example, the surface roughness in a certain direction (X direction) on the surface of the single crystal SiC layer 12 and the surface roughness in a direction (Y direction) orthogonal to the direction. Both have an arithmetic average roughness Ra of preferably 1 to 100 nm, more preferably 5 to 30 nm.

In addition, the fact that the inclined surface forming the surface irregularities of the single crystal SiC layer 12 is oriented in a random direction with respect to the normal direction of the surface of the holding substrate 21 side is, for example, a direction (X direction) on the surface of the single crystal SiC layer 12. It means that the surface roughness of () and the surface roughness in the direction (Y direction) orthogonal to the direction are substantially the same. The surface roughness of both is substantially the same, for example, the difference between the arithmetic average roughness Ra of both is preferably 10% or less of the maximum Ra, and more preferably 5% or less of the maximum Ra. Alternatively, it means that the surface roughness profile in the X direction and the surface roughness profile in the Y direction on the surface of the single crystal SiC layer 12 show substantially the same pattern. The fact that the surface roughness profiles of both are substantially the same means that the orientation directions of the slopes of the surface are isotropic and the height difference is the same.

By this step, the single crystal SiC layer carrier 15 carrying the single crystal SiC layer 12 having the above-mentioned surface irregularities can be produced on the holding substrate 21 through the intervening layer 22 (FIG. 4(f)).

(Step 1-7)
Next, using the obtained single crystal SiC layer carrier 15, polycrystalline SiC is deposited on the single crystal SiC layer 12 by the chemical vapor deposition method to form the polycrystalline SiC substrate 11 (FIG. )).
At this time, the close-packed surface of the polycrystalline SiC crystal is randomly oriented with reference to the normal direction of the surface of the single crystal SiC layer on the side of the holding substrate 21.

Here, it is preferable to use a thermal CVD method as the chemical vapor deposition method. The thermal CVD conditions may be general conditions for depositing polycrystalline SiC to form a film.

At this time, the polycrystalline SiC is deposited on the surface of the single-crystal SiC layer 12, but since the surface of the single-crystal SiC layer 12 has the surface irregularities as described above, the polycrystalline SiC is formed on each inclined surface forming the surface irregularities. The crystals are grown so as to be oriented so that the closest packed surface (lattice surface) of the crystal is parallel to the inclined surface, and the growing orientation is different for each crystal grain of the polycrystalline SiC substrate 11 on the single crystal SiC layer 12. It will change randomly. As a result, as shown in FIG. 2, the orientation of the lattice plane 11p of the polycrystalline SiC crystal of the polycrystalline SiC substrate 11 corresponds to the orientation of each inclined plane that constitutes the interface-side surface irregularities of the single-crystal SiC layer 12. Disperse orientation (random orientation based on the normal direction of the surface of the single crystal SiC layer 12 on the holding substrate 21 side).

In the single crystal SiC layer carrier 15, the polycrystalline SiC substrate 11 is not formed only on the surface (front surface) of the holding substrate 21 on which the single crystal SiC layer 12 is provided as described above. It is preferable to form the polycrystalline SiC substrate 11′ also on the surface (back surface) (FIG. 4(g)). As a result, even if the stress caused by the difference in thermal expansion coefficient occurs between the holding substrate 21 and the polycrystalline SiC substrates 11 and 11′, the polycrystalline SiC substrates 11 and 11′ may cause the stress on the front and back surfaces of the holding substrate 21. Since the directions of the stresses acting are opposite to each other and the magnitudes thereof are equal to each other, it is possible to prevent the laminated body from warping, and as a result, it is possible to obtain a SiC composite substrate without warping. it can.

(Step 1-8)
Next, the holding substrate 21 in the laminated body obtained in step 1-7 is physically and/or chemically removed to obtain the SiC composite substrate 10 (FIG. 4(h)). At this time, when the holding substrate 21 is made of silicon, it can be easily and selectively removed by etching using, for example, a hydrofluoric/nitric acid solution.

(Step 1-9)
If necessary, the SiC epitaxial layer 12′ may be formed on the single crystal SiC layer 12 of the SiC composite substrate 10 (FIG. 4(i)). As a result, the thickness of the single crystal SiC layer 12 is as thin as 0.1 μm, which is too thin to be used as an active layer of a power semiconductor device, and SiH ₂ Cl ₂ (flow rate 200 sccm) and C ₂ H ₂ (flow rate 50 sccm) are used. It is possible to obtain a SiC composite substrate suitable for manufacturing a power semiconductor by forming a SiC epitaxial layer 12′ having a thickness of 8 μm by vapor phase growth (homoepitaxial growth) at 1550° C. for 1 hour as a raw material.

(Embodiment 2)
The second embodiment of the present invention will be described with reference to FIG.
(Step 2-1)
First, steps 1 to 6 are performed in the same manner as in Embodiment 1 to prepare two sets of single crystal SiC layer carriers 15 (FIG. 5A).

(Step 2-2)
Next, the holding substrates 21 of the two sets of single-crystal SiC layer carriers 15 are bonded (bonded) to each other via the adhesive layer 23 to obtain an adhesive bonded body 16 (FIG. 5B). The adhesive bonded body 16 becomes a double-sided substrate in which the single crystal SiC layer 12 is exposed on the front and back surfaces thereof. At this time, it is preferable to use an adhesive having heat resistance against chemical vapor deposition performed thereafter.

(Step 2-3)
Next, polycrystalline SiC is deposited on each of the concavo-convex surfaces of the single crystal SiC layer 12 on the front and back surfaces of the bonded bonded body 16 by the same chemical vapor deposition method as in Embodiment 1 to form the polycrystalline SiC substrate 11 ( FIG. 5(c)). Here, even if the stress due to the difference in the thermal expansion coefficient occurs between the holding substrate 21 and the polycrystalline SiC substrate 11, the direction of the stress acting on the front and back surfaces of the two holding substrates 21 bonded together Are opposite to each other and have the same size, so that the laminate can be prevented from warping, and as a result, two sets of SiC composite substrates having no warp can be obtained.

(Step 2-4)
Next, the laminated body obtained in step 2-3 is separated at the joint portion (adhesive layer 23) between the back surfaces of the holding substrates 21, and at the same time (or after), the respective holding substrates 21 are physically and/or It is chemically removed to obtain two sets of SiC composite substrates 10 (FIG. 5D). At this time, when the holding substrate 21 is made of silicon, the adhesive layer 23 and the holding substrate 21 can be easily selectively removed by etching with, for example, a hydrofluoric nitric acid solution.

(Step 2-5)
Thereafter, if necessary, similarly to the first embodiment, the SiC epitaxial layer 12′ may be formed on the single crystal SiC layer 12 of the SiC composite substrate 10 (FIG. 5(e)).

(Embodiment 3)
A third embodiment of the present invention will be described with reference to FIG.
(Step 3-1)
First, SiC is heteroepitaxially grown on the holding substrate 21 to provide the single crystal SiC thin film 12e to prepare two single crystal SiC thin film carriers 14' (FIG. 6A). For example, a single crystal Si wafer having two (001) surfaces may be used as the holding substrate 21, and a 3C-SiC layer having a (001) plane as a principal plane orientation may be heteroepitaxially grown on the holding substrate 21. More specifically, prior to this heteroepitaxial growth, the holding substrate (single crystal Si wafer) 21 is exposed to a C ₂ H ₂ atmosphere of 20 Pa and the temperature is raised from 500° C. to 1,340° C. After growing the SiC film to a thickness of 15 nm, while maintaining the substrate temperature, SiH ₂ Cl ₂ with a flow rate of 200 sccm and C ₂ H ₂ with a flow rate of 50 sccm were introduced, and the pressure was set to 15 Pa. ) It is advisable to epitaxially grow the single crystal 3C-SiC layer 12 having the plane as the principal plane orientation.

(Step 3-2)
Next, the surface of the single crystal SiC thin film 12e of the single crystal SiC thin film carrier 14' is roughened by mechanical processing in the same manner as in step 1-6 of the first embodiment, and this mechanical processing results. The defects are removed to form the single crystal SiC layer 12 (FIG. 6B).

Here, the mechanical processing conditions and the conditions for removing the defects may be the same as those in step 1-6 of the first embodiment. As a result, the surface irregularities of the single crystal SiC layer 12 are the same as in the first embodiment.

By this step, a single crystal SiC layer carrier 15' carrying the single crystal SiC layer 12 having the above-mentioned surface irregularities on the holding substrate 21 can be manufactured (FIG. 6B).

(Step 3-3)
Next, the holding substrates 21 of the two single crystal SiC layer carriers 15 ′ are bonded (bonded) to each other via the adhesive layer 23 to obtain a set of bonded bonded bodies 16 ′ (FIG. 6( c )). The adhesive bonded body 16 ′ becomes a double-sided substrate in which the single crystal SiC layer 12 is exposed on the front and back surfaces. At this time, it is preferable to use an adhesive having heat resistance against chemical vapor deposition performed thereafter.

(Step 3-4)
Next, polycrystalline SiC is deposited on each of the concave and convex surfaces of the single crystal SiC layer 12 on the front and back surfaces of the bonded bonded body 16 ′ by the same chemical vapor deposition method as in Embodiment 1 to form the polycrystalline SiC substrate 11. (FIG.6(d)). Here, even if the stress due to the difference in the thermal expansion coefficient occurs between the holding substrate 21 and the polycrystalline SiC substrate 11, the direction of the stress acting on the front and back surfaces of the two holding substrates 21 bonded together Are opposite to each other and have the same size, so that the laminate can be prevented from warping, and as a result, two SiC composite substrates without warping can be obtained.

(Step 3-5)
Next, the laminated body obtained in step 3-4 is separated at the joint portion (adhesive layer 23) between the back surfaces of the holding substrates 21, and at the same time (or after), the respective holding substrates 21 are physically and/or It is chemically removed to obtain two sets of SiC composite substrates 10 (FIG. 6(e)). At this time, when the holding substrate 21 is made of silicon, the adhesive layer 23 and the holding substrate 21 can be easily selectively removed by etching with, for example, a hydrofluoric nitric acid solution.

(Embodiment 4)
A fourth embodiment of the present invention will be described with reference to FIG.
(Step 4-1)
First, SiC is heteroepitaxially grown on both surfaces of the holding substrate 21 to provide the single crystal SiC thin film 12e to prepare the single crystal SiC thin film carrier 14'' (FIG. 7A). For example, a single crystal Si wafer having (111) surfaces whose both surfaces are mirror-polished may be used as the holding substrate 21, and 3C—SiC layers may be heteroepitaxially grown on both surfaces thereof. More specifically, prior to this heteroepitaxial growth, the holding substrate (single crystal Si wafer) 21 is exposed to a C ₂ H ₂ atmosphere of 20 Pa and the temperature is raised from 500° C. to 1,340° C. -After growing the SiC film to a thickness of 15 nm, SiH ₂ Cl ₂ with a flow rate of 200 sccm and C ₂ H ₂ with a flow rate of 50 sccm were introduced while maintaining the substrate temperature, and the pressure was set to 3.2 Pa to thereby form the (111) plane. It is advisable to epitaxially grow the single crystal 3C-SiC layer 12 having the principal plane orientation of.

At this time, unlike the third embodiment, it is preferable to avoid thick 3C-SiC epitaxial growth. This is because the stress relaxation effect at the interface with the single crystal Si wafer having the Si(111) surface does not appear in the 3C-SiC layer plane having the (111) plane as the principal plane orientation even if a stacking fault occurs. If the 3C-SiC layer is made thicker, internal stress may be accumulated, resulting in peeling of the interface of the 3C-SiC layer/holding substrate (single crystal Si wafer) and crack generation in the 3C-SiC epitaxial growth layer. Therefore, it is advisable to adjust the epitaxial growth time so that the 3C-SiC epitaxial growth with the film thickness of 2 μm as the upper limit is limited. Tensile stress exceeding 10 GPa is generated in the surface of the 3C-SiC layer, but since it is formed on the front and back surfaces of the single crystal Si wafer that is the holding substrate 21, the internal stress is balanced and the holding substrate 21 is flat without deformation. It is possible to maintain sex.

(Step 4-2)
Next, the surface of the single crystal SiC thin film 12e of the single crystal SiC thin film carrier 14″ is roughened by mechanical processing in the same manner as in step 1-6 of the first embodiment. The defects are removed to form the single crystal SiC layer 12 (FIG. 7B).

Here, the mechanical processing conditions and the conditions for removing the defects may be the same as those in step 1-6 of the first embodiment. As a result, the surface irregularities of the single crystal SiC layer 12 are the same as in the first embodiment.

By this step, the single crystal SiC layer carrier 15″ carrying the single crystal SiC layer 12 having the above-mentioned surface irregularities on the holding substrate 21 can be manufactured (FIG. 7B).

(Step 4-3)
Next, polycrystalline SiC is deposited on each of the uneven surfaces of the single crystal SiC layer 12 on the front and back surfaces of the single crystal SiC layer carrier 15 ″ by the chemical vapor deposition method similar to that of the first embodiment to deposit the polycrystalline SiC substrate 11 Are formed (FIG. 7C). Here, even if the stress caused by the difference in the thermal expansion coefficient occurs between the holding substrate 21 and the polycrystalline SiC substrate 11, the directions of the stress acting on the front and back surfaces of the holding substrate 21 are opposite to each other. Since the sizes are the same, it is possible to prevent the laminate from warping, and as a result, it is possible to obtain two sets of SiC composite substrates having no warpage.

(Step 4-4)
Next, the holding substrate 21 is physically and/or chemically removed from the laminated body obtained in step 4-3 to obtain two sets of SiC composite substrates 10 (FIG. 7D). At this time, when the holding substrate 21 is made of silicon, it is possible to easily selectively remove the holding substrate 21 by etching with a hydrofluoric nitric acid solution, for example.

As described above, in Embodiments 1 to 4 of the present invention, an example in which vapor phase growth using a mixed gas of SiH ₂ Cl ₂ and C ₂ H ₂ is used for epitaxial growth of single crystal SiC has been described. The method is not limited to this, and the same effect can be obtained by any pressure reduction or atmospheric pressure vapor phase growth, molecular beam epitaxy, or liquid phase growth using any combination of silane, chlorosilane, and hydrocarbon.

Further, it is not always necessary to use mechanical processing with diamond slurry to form the surface irregularities of the single crystal SiC layer 12, and the inclined surface forming the irregularities is random with reference to the normal direction of the surface of the single crystal SiC layer. If it can be oriented in the direction, it is also possible to use means such as photolithography and nanoimprint.

Further, although an example in which a silicon substrate is used as the holding substrate 21 has been shown, if there is no need for heteroepitaxial growth of SiC as in Embodiments 3 and 4, it is not necessary to use a single crystal Si substrate, and an inexpensive polycrystalline Si substrate. May be used.

In Embodiments 2 and 3, the processing for roughening the single-crystal SiC thin film 12a by mechanical processing and removing defects caused by the mechanical processing are not necessarily limited to those performed before the bonding of the holding substrates 21. Alternatively, the holding substrates 21 may be bonded to each other to form a bonded body before the formation (deposition) of the polycrystalline SiC substrate 11.

In addition, in Embodiments 2 and 3, the holding substrates 21 are bonded to each other via the adhesive layer 23, but if sufficient adhesive strength can be realized, they may be directly bonded without the adhesive layer 23. ..

Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited to the examples.

[Example 1]
Based on the first embodiment of the method for producing a SiC composite substrate of the present invention, the SiC composite substrate 10 of the present invention was produced by the following procedure.

(Process 1)
First, as the single crystal SiC substrate 12s, a single crystal 4H-SiC wafer in which the (000-1)C plane was tilted in the [11-20] direction by 2 degrees was prepared, and this was placed in an atmosphere of dry oxygen at 90°C. A thermal oxidation film having a thickness of 0.2 μm was formed as a thin film 22a on the surface by performing a thermal oxidation treatment at 1,100° C. for one minute (FIG. 4A).
(Process 2)
Next, a single crystal Si wafer having a (001) surface is prepared as the holding substrate 21, and this is subjected to a thermal oxidation treatment at 1,100° C. for 90 minutes in a dry oxygen atmosphere at atmospheric pressure to form a thin film 22a on the surface. As a result, a thermal oxide film having a thickness of 0.6 μm was formed (FIG. 4B).
(Process 3)
Next, the surface of the single crystal 4H—SiC wafer in step 1 on which the thermal oxide film was formed was irradiated with hydrogen ions at an energy of 150 keV at 1×10 ¹⁷ atoms/cm ² to form an ion implantation region 12i (FIG. )).
(Process 4)
Subsequently, the thin film 22a forming surface of the single crystal 4H-SiC wafer and the thin film 22a forming surface of the single crystal Si wafer were subjected to plasma activation treatment and bonded to obtain a bonded substrate 13 (FIG. 4(d)). ..
(Process 5)
Next, with respect to the bonded substrate 13, mechanical energy is applied to the ion-implanted portion to separate the single crystal 4H-SiC substrate wafer in the ion implantation region 12i, and a thickness of 0.2 μm is formed on the single crystal Si wafer. The single crystal SiC thin film 12a was transferred to obtain a single crystal SiC thin film carrier 14 having a 4H-SiC(0001)Si surface exposed on the surface (FIG. 4(e)).

(Process 6)
Next, the 4H—SiC(0001)Si surface exposed on the surface of the single crystal SiC thin film carrier 14 is pressed against a polishing cloth coated with a diamond slurry having a particle size of 10 μm at a pressure of 100 g/cm ² , and repeated in random directions. I exercised. After repeating this for 10 minutes, the diamond slurry on the surface of the single crystal SiC thin film 12a was washed away with pure water and washed with a mixed solution of hydrogen peroxide solution and sulfuric acid. Next, a thermal oxidation film of 0.1 μm thickness is formed on the polished surface of the single crystal SiC thin film 12a by performing a thermal oxidation treatment at 1,100° C. for 60 minutes in a dry oxygen atmosphere at atmospheric pressure. By this thermal oxidation treatment, the surface of the single crystal SiC thin film 12a in which defects are introduced by polishing with diamond slurry is converted into a silicon oxide film. Then, the surface was immersed in a 5 vol% HF solution for 5 minutes to expose a clean single crystal 4H-SiC surface to form a single crystal SiC layer 12 (FIG. 4(f)). The arithmetic mean roughness Ra of the surface irregularities of the single crystal SiC layer 12 after this treatment is 3 nm, the maximum inclination of the inclined planes forming the surface irregularities is 3 degrees, and the inclined plane is a single crystal Si wafer ( The surface became uneven with the normal direction of the surface of the holding substrate 21) as a reference.

(Process 7)
Next, polycrystalline 3C-SiC was formed on the concavo-convex surface of the single-crystal SiC layer 12 using SiCl ₄ (flow rate 200 sccm) and C ₃ H ₈ (flow rate 50 sccm) as raw materials at a heating temperature of 1,320° C. Deposited. The pressure at this time was set to 15 Pa, and a polycrystal SiC substrate having a thickness of 840 μm was formed on the front and back surfaces of the single crystal SiC wafer (holding substrate 21), that is, the front surface of the single crystal SiC layer 12 and the back surface of the single crystal Si wafer, respectively, by a deposition process for 8 hours. 11 and 11' were formed (FIG. 4(g)).

(Process 8)
Next, when the laminated body obtained in step 7 was immersed in a mixed solution of HF and HNO ₃ for 120 hours, the single crystal Si wafer as the holding substrate 21 was selectively removed by etching, and at the same time, the multi-layer on the back surface side was removed. The SiC composite substrate 10 of the present invention having a laminated structure of the single crystal SiC layer 12 (4H-SiC(0001)Si surface)/polycrystalline SiC substrate 11 (cubic SiC (840 μm thick)) is separated from the crystalline SiC substrate 11′. Was obtained (FIG. 4(h)).

When the surface of the obtained polycrystalline SiC substrate 11 of the SiC composite substrate 10, that is, the surface of the deposited polycrystalline film (polycrystalline SiC substrate) is observed with a stereoscopic microscope, it becomes granular as shown in FIG. It was formed of a combination of irregularly shaped crystal grains of 1 μm to 1 μm.

Further, the crystallinity of the polycrystalline SiC substrate 11 was investigated by an X-ray diffraction method (θ-2θ scan) using an X-ray diffractometer (manufactured by Rigaku Corporation, SuperLab, Cu tube), and is shown in FIG. As described above, it was found that the (111) plane of 3C-SiC is the dominant lattice spacing of the crystals forming the film.

Further, by the X-ray rocking curve method (ω scan) using the above X-ray diffractometer, (111) of 3C-SiC crystal constituting the polycrystalline SiC substrate 11 with the normal axis of the surface of the single crystal SiC layer as a reference. The rocking curve of the plane is shown in FIG. In FIG. 10, when the normal axis of the surface of the single crystal SiC layer 12 is used as a reference (ω=0 degree), the proportion of crystal grains satisfying ω≦−2 degrees or 2 degrees≦ω constitutes the polycrystalline SiC substrate 11. It was 65% or more of the total crystal grains. That is, it can be said that the (111) planes of the 3C-SiC crystal that constitutes the polycrystalline SiC substrate 11 are randomly oriented with reference to the normal axis of the surface of the single crystal SiC layer 12.

As described above, the orientations of the crystal grains of the polycrystalline SiC substrate 11 are randomly dispersed with respect to the normal axis of the surface of the single-crystal SiC layer 12, so that the polycrystalline SiC substrate 11 and the single-crystal SiC layer 12 are not aligned with each other. At the matching interface, the concentration of stress in a specific orientation was blocked, and the in-plane stress became 0.1 GPa or less, and the polycrystalline SiC substrate 11 and the single crystal SiC layer 12 were firmly attached. The stress in the 4H—SiC(0001) plane of this single crystal SiC layer 12 can be estimated by the peak shift of the Raman scattering spectrum.

Furthermore, when the Bow amount (warpage) of the obtained SiC composite substrate 10 was measured, it was 20 μm or less. It is presumed that the internal stress was reduced at the mismatched interface between the crystalline SiC substrate 11 and the single crystal SiC layer 12 as described above.

In addition, the bow amount of the SiC composite substrate 10 was measured by a vertical incidence type Fizeau interferometer (FlatMaster, manufactured by Corning Tropel). Here, as shown in FIG. 11, for the SiC composite substrate 10, the Bow amounts b1 and b2 are measured as the height difference between the central portion and the end portion of the SiC composite substrate 10, and the central portion of the substrate is shown in FIG. As shown in the figure, the case of downward convex is a negative value, and the case of upward convex as shown in FIG. 11B is a positive value. In addition, the single crystal SiC layer 12 of the SiC composite substrate 10 was arranged in the upper side (front side), and the warpage was measured. In the SiC composite substrate 10, the central portion of the substrate was convex upward.

Although the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments shown in the drawings, and other embodiments, additions, changes, deletions, etc. The present invention can be modified within the scope that can be conceived of, and is included in the scope of the present invention as long as the effects of the present invention are exhibited in any of the modes.

10 SiC composite substrate 11, 11' Polycrystalline SiC substrate 11b Crystal grain boundaries 11p, 12p Lattice plane 12 Single crystal SiC layer 12a Single crystal SiC thin film 12e Single crystal SiC thin film (heteroepitaxial growth film)
12i Ion implantation region 12s Single crystal SiC substrate 12' SiC epitaxial layer 13 Bonded substrate 14, 14', 14'' Single crystal SiC thin film carrier 15, 15', 15'' Single crystal SiC layer carrier 16, 16' Adhesive bonded body 21 Holding substrate 22 Intervening layer 22a Thin film 23 Adhesive layer I _12/11 Mismatched interface

Claims (6)

In a SiC composite substrate having a single crystal SiC layer having a thickness of 100 nm or more and 1 μm or less on a polycrystalline SiC substrate having a thickness of 100 μm or more and 650 μm or less, the whole or one of the interfaces where the polycrystalline SiC substrate and the single crystal SiC layer are in contact with each other The portion is an unmatched interface that is not lattice-matched, and the single crystal SiC layer has a smooth surface and a surface having an unevenness on the interface side with the polycrystalline SiC substrate, and the uneven surface is are those inclined surfaces constituting the irregularities are oriented in random directions relative to the direction normal to the surface of the single crystal SiC layer, the close-packed plane of the crystal of the polycrystalline SiC in the polycrystalline SiC substrate the single The crystalline SiC layer is deposited so as to be parallel to the inclined surface that constitutes the unevenness of the uneven surface, so that the close-packed surface of the crystal of the polycrystalline SiC is based on the normal direction of the surface of the single crystal SiC layer. A SiC composite substrate characterized by being randomly oriented. The SiC composite substrate according to claim 1, wherein the polycrystalline SiC substrate is a chemical vapor deposition film. 3. The SiC composite substrate according to claim 1 or 2, wherein the polycrystalline SiC of the polycrystalline SiC substrate is a cubic crystal and the closest packed surface is the {111} plane. In the rocking curve of the (111) plane of the SiC crystal that constitutes the polycrystalline SiC substrate with the normal axis of the surface of the single crystal SiC layer obtained by the X-ray rocking curve method as the reference (ω=0 degree), ω≦−2 degrees 4. The SiC composite substrate according to claim 3, wherein the ratio of crystal grains satisfying 2 degrees≦ω is 65% or more of all the crystal grains constituting the polycrystalline SiC substrate. The SiC composite substrate according to any one of claims 1 to 4, wherein the close-packed surface of the crystal lattice of the single crystal SiC layer has a deflection angle of more than 0° and within 10° at an interface with the polycrystalline SiC substrate. The SiC composite substrate according to any one of claims 1 to 5, wherein a grain size of crystals constituting the polycrystalline SiC substrate is 0.1 µm or more and 30 µm or less.