JP6700850B2 - Image sensor drive control circuit - Google Patents

Description

  The present invention relates to an image pickup device, and more particularly to an image pickup device capable of picking up an image with high resolution and a high frame rate, and a drive control circuit thereof.

In a camera for video production and a camera for consumer use, a single-plate color system in which a color filter pattern is formed on pixels of an image sensor and a color image is captured by one image sensor is often used. In this method, light is dispersed by a prism, and compared with a three-plate color method that uses one image sensor for each of the three colors of red (R), green (G), and blue (B) obtained, The optical system can be simplified. In the color filter pattern, it is common to arrange many greens, which have a high contribution to the luminance signal, among the three colors. A Bayer array in which two pixels (indicated by G ₁ and G _{2 in the} present specification) and red (R) and blue (B) are arranged in the remaining two pixels is often used.

  In video production, shooting at a higher frame frequency than during playback (hereinafter also referred to as “high frame rate shooting”) is commonly used as a special effect, especially in shooting movies and dramas, and natural science. It is often used in content photography and sports photography. In recent image pickup devices, an AD conversion circuit that converts a video signal into a digital signal is provided in the image pickup device, and a higher-speed AD conversion circuit has been developed for the purpose of high frame rate shooting.

  On the other hand, there is also a technique of high frame rate photography by devising pixel driving. As a conventional pixel driving method for high frame rate imaging, for example, there are a method of intermittently reading pixel signals and a method of adding signals of a plurality of pixels and reading them simultaneously. As a result, it is possible to shorten the scan time for one frame and enable high frame rate shooting. In particular, the method of adding and reading out signals of a plurality of pixels can realize a high-speed operation and improve sensitivity, and thus has been often used in an image sensor for high frame rate imaging. In the specification of the application, driving of the image sensor by normal shooting is referred to as “normal driving”, and driving of the image sensor by high frame rate shooting is referred to as “high frame rate driving”.

  Here, there is known an image sensor having a structure that enables high frame rate driving by efficiently using a method of adding and reading out signals of a plurality of pixels having the same spectral sensitivity in a Bayer array (for example, Patent Document 1). 1). The image sensor in Patent Document 1 converts a charge generated by photoelectric conversion in the photoelectric conversion unit into a voltage between two diagonally adjacent photoelectric conversion units arranged in a two-dimensional array. One voltage conversion unit is disposed, and the one voltage conversion unit is configured to share the two photoelectric conversion units.

  By the way, generally, in an image sensor, in order to suppress reset noise that is randomly generated at the time of resetting a pixel portion, by detecting a difference between signals before and after charge transfer from a photodiode, a reset common to both is performed. A correlated double sampling circuit (CDS circuit) that removes noise is used, and this CDS circuit is provided between the signal line and the AD conversion circuit. However, the reset noise generated by the correlated double sampling circuit itself and the noise caused by the variation in the signal processing circuit are still included in the signal input to the AD conversion circuit. As a technique for removing this noise, the output of the CDS circuit immediately after reset and the output of the CDS circuit after charge transfer are AD-converted and subtracted, respectively, to realize digital correlated double sampling that further reduces noise. It is possible.

JP, 2006-54276, A

  As described in Patent Document 1 described above, between the two photoelectric conversion units that are diagonally adjacent to each other among the photoelectric conversion units arranged in a two-dimensional array, the charge generated by the photoelectric conversion in the photoelectric conversion unit is generated. There is known an image pickup device in which one voltage conversion unit that converts a voltage is arranged and the one voltage conversion unit shares the two photoelectric conversion units.

However, in the image sensor based on the technique of Patent Document 1, the G color pixel pair (G ₁ , G ₂ color pixel) shared by one voltage conversion unit is always in the same direction. For this reason, using the image sensor based on the technique of Patent Document 1, normal drive that does not increase the frame rate and high frame rate drive that reads the signals of the G color pixel pair (G ₁ , G ₂ color pixels) together If both are configured to be compatible with each other, a difference in scanning speed between columns caused by a difference in reading speed between the G ₁ and G ₂ color pixels and the R and B color pixels during high frame rate driving is higher than that during normal driving. Occurs. Therefore, in the image pickup device based on the technique of Patent Document 1, the drive speed in the AD conversion circuit and the drive control circuit for controlling the drive of the image pickup device is higher than that in the normal drive unless the consideration is taken into consideration. At times, it becomes necessary to increase the speed, and the configuration of the image pickup apparatus when enabling the switching operation during each of these driving operations becomes complicated.

Further, in the image sensor based on the technique of Patent Document 1, the G color pixel pair (G ₁ , G ₂ color pixel) shared by one voltage conversion unit is always in the same direction, which results in a high frame rate. During driving, the resolution in the column direction of the G color pixel pair (G ₁ , G ₂ color pixel) deteriorates.

Therefore, as the configuration of the drive control circuit for controlling the drive of the image pickup device, it is possible to easily achieve compatibility between the normal drive and the high frame rate drive without changing the drive speed of the sampling rate in the AD conversion circuit, and the high frame rate. A technique for improving the resolution in the column direction of the G color pixel pair (G ₁ , G ₂ color pixel) at the time of rate driving is desired.

  In addition, more preferably, as a configuration of a drive control circuit for driving and controlling the image pickup device even during low noise driving for realizing digital correlated double sampling, AD is used during normal driving and low noise driving. A technique is desired that facilitates compatibility of the sampling rate in the conversion circuit without changing the driving speed.

  In view of the above-mentioned problems, an object of the present invention is to provide an image pickup device capable of picking up an image having a high resolution and a high frame rate, and a drive control circuit thereof.

The drive control circuit of the present invention is arranged such that, between two photoelectric conversion units that are diagonally adjacent to each other among the photoelectric conversion units arranged in a two-dimensional array of rows and columns, charges generated by photoelectric conversion in the photoelectric conversion units are charged. Is arranged, and the one voltage conversion unit shares the two photoelectric conversion units, and the diagonal direction of sharing the pixel pair connected to the same signal read line is A photoelectric conversion unit arranged in a two-dimensional array is arranged so as to form a pixel array by arranging a Bayer array color filter, An image sensor in which a read signal line is arranged so that the pixel signals of the green pixel pair of the pixel pair can be added and simultaneously read out at the time of driving at a predetermined high frame rate with a frame frequency higher than that at the time of normal driving. Drive control circuit for controlling the drive with a common analog-to-digital conversion cycle during the normal drive and the predetermined high frame rate drive , the R-color pixel, the G-color pixel, and the B-color pixel in the Bayer array. In three analog-digital conversion cycles for reading color pixels, one of adjacent read rows reads pixel addition of a pair of G color pixels, B color pixels, and R color pixels in this order, and the other reads B colors. Pixels, R color pixels, and G color pixels are read in this order, or one of adjacent read rows is read in the order of pixel addition of a pair of G color pixels, R color pixels, and B color pixels, and the other is R It is characterized in that a timing signal for reading is generated in the order of addition of color pixels, B color pixels, and G color pixels .

Further, the drive control circuit of the present invention is generated by photoelectric conversion in the photoelectric conversion unit between two diagonally adjacent photoelectric conversion units among the photoelectric conversion units arranged in a two-dimensional array of rows and columns. One voltage conversion unit for converting the generated charge into a voltage is arranged, the one voltage conversion unit shares the two photoelectric conversion units, and the pixel pair connected to the same signal readout line is diagonally shared. The photoelectric conversion units arranged in a two-dimensional array have a structure in which the pixel pairs in adjacent rows are staggered from each other, and are arranged to form a pixel array by arranging color filters in a Bayer array. The read signal line is arranged so that the pixel signals of the green pixel pair of the pixel pair can be added and read simultaneously during a predetermined low noise driving that has a noise level lower than that during normal driving, and A read signal line is a drive control circuit for an image pickup device configured to read out a signal of a reset level in the one voltage conversion unit so as to be able to use digital correlated double sampling , the normal drive time and the predetermined low noise. Driving is controlled with a common analog/digital conversion cycle during driving, and when reading the R color pixel, G color pixel, and B color pixel of the Bayer array, only the G color pixel is pixel-added with the G color pixel pair. It is characterized in that a timing signal that enables digital correlated double sampling is generated only in the G color pixel that is read out and added and read out by adding the pixel .
Further, in the drive control circuit of the present invention, the image pickup device has three drive signal lines for selecting a pixel in units of the set of four pixels for the pixel array having a repeating period of one set of four pixels. It is characterized in that they are arranged in pairs.

  According to the present invention, an image with high resolution and high frame rate can be captured. More preferably, low noise driving that realizes digital correlated double sampling can be easily applied, and a low noise image can be captured.

FIG. 1 is a block diagram showing a schematic configuration of an image pickup apparatus of one embodiment including an image pickup element and a drive control circuit of each example according to the present invention. It is a figure which shows schematic structure of the image pick-up element of Example 1 by this invention. (A), (b) is a timing chart of an image sensor drive signal at the time of normal drive and high frame rate drive to the image sensor of Example 1 by this invention, respectively. (A), (b) is a timing chart of an image sensor drive signal at the time of normal drive and low noise drive of the image sensor of Example 1 by this invention, respectively. (A) is a diagram showing a sensitivity distribution (resolution) in the column direction in a G color pixel pair (G ₁ , G ₂ color pixel) of an image sensor based on a conventional technique, and (b) is a diagram of Example 1 according to the present invention. it is a diagram showing a sensitivity distribution in the column direction (the resolution) in the G color pixel pair of the image sensor (G _1, G _2-color pixels). It is a figure which shows schematic structure of the image pick-up element of Example 2 by this invention. (A), (b) is a timing chart of an image sensor drive signal at the time of normal drive and high frame rate drive of the image sensor of Example 2 by this invention, respectively. It is a figure which shows schematic structure of the image pick-up element of Example 3 by this invention. (A), (b) is a timing chart of an image sensor drive signal at the time of normal drive and low noise drive of an image sensor of Example 3 by the present invention, respectively.

  First, with reference to FIG. 1, an image pickup apparatus 10 according to an embodiment of the present invention will be described. The image pickup apparatus 10 is configured to be usable as a camera for video production or a camera for consumer use, and includes the image pickup device 1 of each embodiment according to the present invention and a drive control circuit 32 for controlling driving of the image pickup device 1. Is configured to provide. FIG. 1 is a block diagram showing a schematic configuration of an image pickup apparatus 10 of an embodiment including an image pickup element 1 and a drive control circuit 32 of each example according to the present invention.

[Imaging device]
An example of the image sensor 1 will be described later in detail. However, the photoelectric conversion unit is provided between two photoelectric conversion units that are diagonally adjacent to each other among the photoelectric conversion units that are arranged in a two-dimensional array of rows and columns. Pixel connected to the same signal read line while arranging one voltage conversion unit for converting the electric charge generated by the photoelectric conversion into a voltage, and the one voltage conversion unit sharing the two photoelectric conversion units. It has a structure in which the diagonal directions of sharing of the pairs are alternated between the pixel pairs in the adjacent row direction. Such an image pickup device 1 is realized as a CMOS image sensor. Here, the voltage conversion unit is generally composed of a floating diffusion amplifier (FDA), and the charges from the photodiodes forming the pixels are transferred to the FDA via the transfer gate TG.

  The image pickup lens 2 forms an image of a subject on the image pickup element 1, and the image pickup element 1 outputs a digital amount pixel signal to the digital signal processing circuit 31 in the digital signal processing control unit 3.

  The digital signal processing circuit 31 stores the pixel signals of the image pickup pixels of RGB colors obtained from the image pickup device 1 in the memory 4, further reads the pixel signals from the memory 4, performs a predetermined image processing, and outputs the display output pixel signal ( For example, it is a functional unit that composes a signal of a display output pixel according to the video format of the television camera and outputs the signal to the output unit 5.

  The output unit 5 outputs the display output pixel signal to a subsequent processing unit (not shown) for displaying or recording as a video.

  A drive control circuit 32 for controlling the drive of the image sensor 1 is provided in the digital signal processing control unit 3, and the drive control circuit 32 controls the image sensor drive signal (for controlling the image capturing operation of the image sensor 1 ( This is a functional unit that supplies a signal for controlling a transfer gate drive signal line, a read signal line, a reset signal line, a CDS circuit, an AD conversion circuit, etc., which will be described later) to the image sensor 1. The timing chart for the image sensor 1 according to the drive control circuit 32 will be described later for each of the image sensors 1 of the respective embodiments.

  Next, a timing chart of the image pickup device 1 of each embodiment according to the present invention and the drive control circuit 32 that drives the image pickup device 1 will be described in order of each embodiment.

[Structure of the image sensor of the first embodiment]
FIG. 2 is a diagram showing a schematic configuration of the image sensor 1 according to the first embodiment of the present invention. The image pickup device 1 of this embodiment includes a pixel array 11 and a CDS circuit 12 arranged in the column direction (particularly 12a and 12b for the CDS circuits arranged for the read signal lines La and Lb for each column, respectively). And an AD conversion circuit 13 that performs analog-to-digital conversion processing on the output of the CDS circuit 12 (in particular, 13a and 13b for the AD conversion circuits respectively provided for the CDS circuits 12a and 12b). And The AD conversion circuit 13 may have a column parallel structure in which read signal lines and AD conversion circuits are arranged in one column for each column as shown in the figure, or may be a column parallel structure in which the read signal lines and the AD conversion circuits are physically arranged alternately vertically.

In FIG. 2, the structure of the pixel array 11 according to the present invention is shown in a simplified manner for the purpose of explanation. The pixel array structure of the pixel array 11 is a photoelectric conversion unit arranged in a two-dimensional array of rows and columns (a pixel structure in which color filters R, G ₁ , G ₂ and B of Bayer array are arranged in a two-dimensional array). Of two photodiodes that are diagonally adjacent to each other, a voltage conversion unit (in this example, FDA) that converts electric charge generated by photoelectric conversion in the photoelectric conversion unit into a voltage is used. ) Are arranged, the one FDA shares the two photoelectric conversion units, and the pixel pair connected to the same signal read line (for example, La or Lb) has diagonal sharing directions of upper and lower pixels. The structure is such that the pairs (pixel pairs in the adjacent row direction) are staggered.

That is, the pixel array structure of the pixel array 11 has a two-pixel sharing structure in an oblique direction with respect to the output of the pixel signal, and two photodiodes obliquely arranged on the pixel array are connected via the transfer gate TG. , Floating Diffusion Amplifier (FDA) is shared (see the broken line frame in the figure). More specifically, in the pixel array 11, the color filters R, G ₁ , G ₂ , and B have a repeating period of the illustrated broken line frame and are connected to the same signal read line (for example, La or Lb). Pixel pairs are arranged in a two-dimensional array by having a repeating cycle of pixel structures in which the diagonal directions of sharing of the pixel pairs are alternated between upper and lower pixel pairs (between adjacent pixel pairs in the row direction).

  The signal reading operation of the image sensor 1 is as follows. First, the FDA is reset to a constant voltage by the reset signal. However, in FIG. 2, a reset signal line for performing reset driving is omitted for simplification. After that, the transfer gate TG is turned on by the drive signal (row selection signal) of the transfer gate drive signal line, so that the light-induced charge is transferred to the FDA from the photodiode connected to the transfer gate TG. To be done. The potential of FDA changes according to the amount of transferred charges. The change in the potential is read by the read signal line, AD converted by the AD conversion circuit 13 via the CDS circuit 12 connected to the read signal line, and digital data is output. The CDS circuit 12 can be configured to have a fixed or variable analog gain function.

The array of the Bayer array shown in FIG. 2 is described as pixels in which the color filters R, G ₁ , G ₂ , and B respectively transmit red, green, and blue light and can form a pixel signal. Since two G color pixels are present in a repeating unit of 2×2 pixels (see the inside of a broken line frame shown in the drawing), they are distinguished from G ₁ and G ₂ . Each of the transfer gate drive signal lines is connected to a transfer gate that transfers charges from pixels of the same name. In addition, in the notation of the transfer gate drive signal line, the numbers preceding G, B, and R indicate the reading order in the row direction (vertical direction arranged in a two-dimensional array of rows and columns). For example, the R color pixel in the N-th (N is an integer equal to or greater than 1) row-direction readout column is represented by NR. The signal from the FDA is read by the read signal line and transmitted to the AD conversion circuit 13 via the CDS circuit 12. The FDAs arranged in the vertical direction in the figure share the read signal line, but only one FDA is connected to the read signal lines that can be simultaneously read by the row selection signal.

[High Frame Rate Drive in Image Sensor of Embodiment 1]
FIGS. 3A and 3B are timing charts of the image pickup element drive signals during normal driving and high frame rate driving of the image pickup element 1 of the first embodiment, respectively. In particular, in FIG. 3, regarding the signal of the transfer gate drive line input to the image sensor 1 of the first embodiment illustrated in FIG. 2 and the pixel signal output from the read signal line, the normal drive and the high frame rate drive are performed. For each of the two types, the horizontal axis is shown as the time direction. For each signal line, the signal takes a binary value of high and low, but it is assumed that the charges are transferred from the photodiode to the FDA when the signal is in a high state (that is, an on state). Further, as shown in FIG. 3, the AD conversion cycle is set by the AD conversion circuit 13 so as to have the same timing during normal driving and during high frame rate driving.

(Normal drive)
With reference to FIG. 3A, a timing chart at the time of normal driving of the image sensor 1 of the first embodiment shown in FIG. 2 will be described. The output of the FDA connected to the read signal line La is 1G ₁ , 1G ₂ , 2B, 2R, 3G ₁ , 3G ₂ ,... In this order, and the output of the FDA connected to the read signal line Lb is 1B, 1R. , 2G ₁ , 2G ₂ , 3B, 3R,... In this order, the charges accumulated in the photoelectric conversion unit are transferred to the FDA by the drive signal of the transfer gate drive signal line and read. The time required to read the cycle of the pixel structure having four pixels in the row direction is four times the AD conversion cycle in each of the read signal lines La and Lb.

(High frame rate drive)
Next, with reference to FIG. 3B, a timing chart at the time of high frame rate driving of the image sensor 1 of the first embodiment shown in FIG. 2 will be described. When driving at a high frame rate, among the pixels connected to each FDA, G ₁ and G ₂ acquire the same color information, so that they can be read simultaneously. By simultaneously reading G ₁ and G ₂ connected to the same FDA, the output of the FDA connected to the read signal line La is 1G ₁ and 1G ₂ addition, 2B, 2R, 3G ₁ and 3G ₂ addition, In the order of..., The output of the FDA connected to the read signal line Lb is the addition of 1B, 1R, 2G ₁ and 2G ₂ , the order of 3B, 3R,. It is transferred to the FDA and read out by the drive signal of the transfer gate drive signal line. The time required to read the periodic structure having four pixels in the row direction is equal to three times the AD conversion cycle for both the read signal lines La and Lb, so the image sensor 1 scans all columns simultaneously. I can finish. In addition, since the time required to read the one-cycle structure is three-fourths that of normal driving, it is possible to read signals at a frame frequency of 4/3 times that of normal driving during high frame rate driving. Become.

  Therefore, the image pickup device 1 and the drive control circuit 32 thereof are configured to perform drive control with a common AD conversion cycle during normal drive and high frame rate drive, and thus during normal drive and high frame rate drive. Thus, it becomes easy to make the sampling rate in the AD conversion circuit compatible without changing the driving speed.

[Low Noise Driving in Image Sensor of Embodiment 1]
FIGS. 4A and 4B are timing charts of the image sensor drive signals during normal drive and low noise drive of the image sensor 1 of the first embodiment, respectively. In particular, in FIG. 4, regarding the signal of the transfer gate drive line input to the image pickup device 1 of the first embodiment illustrated in FIG. 2 and the pixel signal output from the read signal line, there are two cases of normal drive and low noise drive. For each type, the horizontal axis is shown as the time direction. For each signal line, the signal takes a binary value of high and low, but it is assumed that the charges are transferred from the photodiode to the FDA when the signal is in a high state (that is, an on state). As shown in FIG. 4, the AD conversion cycle is set by the AD conversion circuit 13 so as to have the same timing during normal driving and during high frame rate driving.

(Normal drive)
The timing chart at the time of normal driving shown in FIG. 4A is the same as that in FIG. That is, the output of the FDA connected to the read signal line La is 1G ₁ , 1G ₂ , 2B, 2R, 3G ₁ , 3G ₂ ,... In this order, the output of the FDA connected to the read signal line Lb is 1B. , 1R, 2G ₁ , 2G ₂ , 3B, 3R,... In this order, the charges accumulated in the photoelectric conversion unit are transferred to the FDA by the drive signal of the transfer gate drive signal line and read. The time required to read the cycle of the pixel structure having four pixels in the row direction is four times the AD conversion cycle in each of the read signal lines La and Lb.

(Low noise drive)
Next, with reference to FIG. 4B, a timing chart at the time of low noise driving of the image sensor 1 of the first embodiment shown in FIG. 2 will be described. At the time of low noise, among the pixels connected to each FDA, G ₁ and G ₂ acquire the same color information, so that they can be read simultaneously. In order to perform digital correlated double sampling, it is necessary to perform AD conversion on the signal immediately after reset and the signal after charge transfer from the photodiode, so that a time twice as long as the AD conversion cycle is required for one reading. Is. Therefore, in the present low noise driving, the electric charges of the G ₁ color pixel and the G ₂ color pixel are controlled to be simultaneously transferred to the FDA and read out. Then, the signal immediately after the reset, which is performed before the reading of the G ₁ color pixel and the G ₂ color pixel, is read as a reset level, and AD conversion is performed by the AD conversion circuit 13 via the CDS circuit 12.

That is, the output of the FDA connected to the read signal line La is read signal line Lb in the order of reset level, addition of 1G ₁ and 1G ₂ , 2B, 2R, reset level, 3G ₁ and 3G ₂ ,. The output of the FDA connected to is the charge of the transfer gate drive signal line for the charge accumulated in the photoelectric conversion unit in the order of 1B, 1R, reset, addition of 2G ₁ and 2G ₂ , 3B, 3R,. The signal is transferred to the FDA and read out, and AD conversion is performed by the AD conversion circuit 13 via the CDS circuit 12. Since the time required to read the periodic structure having four pixels in the row direction is equal to four times the AD conversion cycle in both the read signal lines La and Lb (the same as in normal driving), the image sensor 1 The scanning can be finished in all rows at the same time. Further, the G color signal occupies a large proportion of the luminance signal, and its noise reduction contributes significantly to the visual noise reduction. In this way, it is possible to obtain a low-noise signal while keeping the frame frequency the same as in normal driving. In this example, the effect of digital correlated double sampling can be obtained without providing the CDS circuit 12, which contributes to the reduction of noise.

  Therefore, the image sensor 1 and the drive control circuit 32 perform drive control with a common AD conversion cycle during normal drive and during low noise drive, even during low noise drive that implements digital correlated double sampling. Since it is configured, it is easy to make the sampling rate in the AD conversion circuit 13 compatible between the normal driving and the low noise driving without changing the driving speed.

Further, FIG. 5A shows a sensitivity distribution (resolution) in the column direction in the G color pixel pair (G ₁ , G ₂ color pixel) of the image sensor based on the conventional technique such as Patent Document 1, and FIG. (B) shows the sensitivity distribution (resolution) in the column direction in the G color pixel pair (G ₁ , G ₂ color pixel) of the image sensor 1 of the first embodiment according to the present invention.

As shown in FIG. 5A, in the image sensor based on the conventional technique such as Patent Document 1, since the directions of the G color pixel pairs sharing FDA are always in the same grid-like arrangement, the G color pixel pairs are As the sensitivity distribution (resolution) in the column direction in (G ₁ and G ₂ color pixels), the resolution is deteriorated.

On the other hand, as shown in FIG. 5B, in the image sensor 1 of the first embodiment according to the present invention, the directions of the G color pixel pairs sharing the FDA are staggered between adjacent G color pixels. As a sensitivity distribution (resolution) in the column direction (horizontal direction arranged in a two-dimensional array of rows and columns) in the pair (G ₁ , G ₂ color pixels), the resolution can be improved as compared with the conventional technique.

Therefore, according to the image pickup device 1 and the drive control circuit 32, it becomes easy to achieve both the normal driving and the high frame rate driving without changing the driving speed of the sampling rate in the AD conversion circuit, and the high driving of the high frame rate. , G color pixel pairs (G ₁ , G ₂ color pixels) can improve the resolution in the column direction.

[Structure of Image Sensor of Second Embodiment]
FIG. 6 is a diagram showing a schematic configuration of the image sensor 1 according to the second embodiment of the present invention. In the image sensor 1 of the second embodiment shown in FIG. 6, the same components as those of the image sensor 1 of the first embodiment shown in FIG. 2 are designated by the same reference numerals.

  Compared with the image sensor 1 of the first embodiment, the image sensor 1 of the second embodiment has a single transfer gate read signal line regarding a combination that is always turned on at the same time in both normal driving and high frame rate driving. They are different in that they are collectively configured, and other components are similar. That is, in the image sensor 1 of the second embodiment, the driving signal lines for selecting pixels are arranged in groups of 3 for each group of 4 pixels with respect to the pixel array 11 having a repeating period of 4 groups of 4 pixels. It is set up. More specifically, the image pickup device 1 of the second embodiment is configured such that one transfer gate drive line is a combination in which the image pickup device 1 is always turned on at the same time in both the normal drive and the high frame rate drive in FIG. 3 described above. To be done. Therefore, the image sensor 1 of the second embodiment does not support low noise driving as shown in FIG.

  In the image pickup device 1 of the second embodiment, by reducing the total number of transfer gate read signal lines as compared with the image pickup device 1 of the first embodiment, the individual wirings can be thickened, and the waveform rounding of the drive signal is caused. The restriction on the operation speed of the image sensor 1 can be reduced. Alternatively, in the front-illuminated image pickup device 1 having a wiring on the image pickup surface side, it is possible to suppress light from being shaded by the wiring and improve the sensitivity.

[High Frame Rate Drive in Image Sensor of Second Embodiment]
FIGS. 7A and 7B are timing charts of the image sensor drive signals during normal drive and high frame rate drive for the image sensor 1 of the second embodiment, respectively. In particular, in FIG. 7, regarding the signal of the transfer gate drive line input to the image sensor 1 of the second embodiment shown in FIG. 6 and the pixel signal output from the read signal line, the normal drive and the high frame rate drive are performed. For each of the two types, the horizontal axis is shown as the time direction. For each signal line, the signal takes a binary value of high and low, but it is assumed that the charges are transferred from the photodiode to the FDA when the signal is in a high state (that is, an on state). Further, as shown in FIG. 7, the AD conversion cycle is set by the AD conversion circuit 13 so as to have the same timing during normal driving and during high frame rate driving.

(Normal drive)
Referring to FIG. 7A, combinations of 1G ₁ and 1B, 2G ₂ and 2R, 3G ₁ and 3B,... In the image sensor 1 of the second embodiment shown in FIG. 6 are respectively formed by one drive signal line. Although it is driven (the transfer gate drive signal lines of “1G _{1 —} 1B”, “2G _{2 —} 2R”, and “3G _{1 —} 3B” shown in FIG. 7A), respectively, in this case as well, FIG. The output is the same as the output of the read signal lines La and Lb in the image sensor 1 of the first embodiment shown in FIG. Therefore, the time required to read the cycle of the pixel structure having four pixels in the row direction is four times the AD conversion cycle for both the read signal lines La and Lb.

(High frame rate drive)
Referring to FIG. 7B, combinations of 1G ₁ and 1B, 2G ₂ and 2R, 3G ₁ and 3B,... In the image sensor 1 of the second embodiment shown in FIG. 6 are respectively formed by one drive signal line. Although it is driven, even in this case, the output of the read signal lines La and Lb in the image sensor 1 of the first embodiment shown in FIG. Therefore, the time required to read the one-period structure is three-fourths that of normal driving, so that it is possible to read signals at a frame frequency of 4/3 times that of normal driving during high frame rate driving. Becomes

  Therefore, according to the image sensor 1 and the drive control circuit 32, it is easy to achieve both the normal driving and the high frame rate driving without changing the driving speed of the sampling rate in the AD conversion circuit.

  Further, the image pickup device 1 of the second embodiment is not compatible with the low noise driving as shown in FIG. 4, but the action and effect shown in FIG. 5 can be similarly produced.

Therefore, also in the second embodiment, the image sensor 1 and the drive control circuit 32 can improve the resolution in the column direction of the G color pixel pair (G ₁ and G ₂ color pixels) during high frame rate driving.

[Structure of Image Sensor of Third Embodiment]
FIG. 8 is a diagram showing a schematic configuration of the image sensor 1 according to the third embodiment of the present invention. In the image sensor 1 of the third embodiment shown in FIG. 8, the same components as those of the image sensor 1 of the first embodiment shown in FIG.

  Compared with the image sensor 1 of the first embodiment, the image sensor 1 of the third embodiment has a single transfer gate read signal line related to a combination that is always turned on at the same time in both normal driving and low noise driving. The configuration is different, and other components are the same. That is, in the image sensor 1 of the third embodiment, the driving signal lines for selecting pixels are arranged in groups of 3 for each group of 4 pixels with respect to the pixel array 11 having a repeating period of 4 groups of 4 pixels. It is set up. More specifically, the image pickup device 1 of the third embodiment is configured as a single transfer gate drive line by a combination that is always turned on at the same time in both the normal drive and the low noise drive shown in FIG. It Therefore, the image sensor 1 of the third embodiment does not support high frame rate driving as shown in FIG.

  In the image pickup device 1 of the third embodiment, by reducing the total number of transfer gate read signal lines as compared with the image pickup device 1 of the first embodiment, the individual wirings can be thickened, and the waveform rounding of the drive signal is caused. The restriction on the operation speed of the image sensor 1 can be reduced. Alternatively, in the front-illuminated image pickup device 1 having a wiring on the image pickup surface side, it is possible to suppress light from being shaded by the wiring and improve the sensitivity.

[Low Noise Driving in Image Sensor of Example 3]
FIGS. 9A and 9B are timing charts of the image pickup element drive signal during normal driving and low noise driving of the image pickup element 1 of the third embodiment, respectively. In particular, in FIG. 9, regarding the signal of the transfer gate drive line input to the image pickup device 1 of the third embodiment illustrated in FIG. 8 and the pixel signal output from the read signal line, the normal drive and the low noise drive are performed. For the two types, the horizontal axis is shown as the time direction. For each signal line, the signal takes a binary value of high and low, but it is assumed that the charges are transferred from the photodiode to the FDA when the signal is in a high state (that is, an on state). As shown in FIG. 9, the AD conversion cycle is set by the AD conversion circuit 13 so as to have the same timing during normal driving and during low noise driving.

(Normal drive)
Referring to FIG. 9A, combinations of 1G ₂ and 1R, 2G ₂ and 2R, 3G ₂ and 3R,... In the image pickup device 1 of the embodiment 3 shown in FIG. 8 are respectively formed by one drive signal line. Although it is driven (the transfer gate drive signal lines of “1G _{1 —} 1R”, “2G _{2 —} 2R”, and “3G _{2 —} 3R” shown in FIG. 9A), respectively, in this case as well, FIG. The output is the same as the output of the read signal lines La and Lb in the image sensor 1 of the first embodiment shown in FIG. Therefore, the time required to read the cycle of the pixel structure having four pixels in the row direction is four times the AD conversion cycle for both the read signal lines La and Lb.

(Low noise drive)
Referring to FIG. 9B, combinations of 1G ₂ and 1R, 2G ₂ and 2R, 3G ₂ and 3R,... In the image pickup device 1 of the embodiment 3 shown in FIG. 8 are respectively formed by one drive signal line. Although it is driven, even in this case, the output is the same as that of the read signal lines La and Lb in the image sensor 1 of the first embodiment shown in FIG. 4B. Therefore, it is possible to obtain a low-noise signal while keeping the frame frequency the same as in normal driving.

  Therefore, according to the image sensor 1 and the drive control circuit 32, it is easy to achieve both the normal driving and the low noise driving without changing the driving speed of the sampling rate in the AD conversion circuit.

The following is a summary of the image pickup devices 1 of Examples 1 to 3 according to the present invention.
(1) A pixel structure in which two diagonal pixels share an FDA (voltage conversion unit).
(2) A pixel array having an array (especially Bayer array) having a pair of colors as a repetition cycle of the color filter is used.
(3) The diagonal FDAs (voltage conversion units) sharing the pixels are staggered so that the diagonal directions alternate between the upper and lower pixel pairs of the pixel array 11 (between adjacent pixel pairs in the row direction). ..

  However, the AD conversion circuit 13 may be provided outside the image pickup device 1 instead of being provided integrally with the image pickup device 1. Further, the CDS circuit 12 may or may not be installed in front of the AD conversion circuit 13. A signal amplification circuit (not shown) with variable magnification may be installed in front of the AD conversion circuit 13.

  According to the image pickup device 1 and the drive control circuit 32 of the present invention, in a single-plate color image pickup device having a Bayer array color filter, the AD conversion process is performed at a higher speed than the normal drive. It is possible to drive at a high frame rate for performing high frame rate shooting at a frame frequency. Further, it is possible to adopt a configuration capable of low-noise driving in which a signal with less noise is realized by the digital CDS processing without lowering the frame frequency for the green pixel that makes a large contribution to the luminance signal. In particular, some recent image pickup devices have a pixel count exceeding the output pixel count, such as generating an RGB signal using four pixels that are a repeating unit of the Bayer array for one output pixel. In such an image sensor, by applying the pixel array structure according to the present invention, the above-mentioned actions and effects can be obtained without impairing the resolution.

  Although the present invention has been described above with reference to the specific embodiments, the present invention is not limited to the above-described embodiments and can be variously modified without departing from the technical idea thereof. For example, the AD conversion circuit 13 may be provided outside the image sensor 1 as a separate component. The color filter array is not necessarily limited to the Bayer array, but it is particularly effective in a proven Bayer array in that the frame frequency can be improved and noise can be reduced during moving image shooting.

  According to the present invention, a high-resolution and high-frame-rate image can be captured, and more preferably, a low-noise drive that realizes digital correlated double sampling can be easily applied to obtain a low-noise image. Since it becomes possible to take an image, it is useful for applications that require frame frequency improvement and noise reduction when shooting a moving image.

1 Imaging Element 2 Imaging Lens 3 Digital Signal Processing Control Section 4 Memory 5 Output Section 10 Imaging Device 11 Pixel Array 12, 12a, 12b Correlated Double Sampling (CDS) Circuit 13, 13a, 13b Analog-to-Digital (AD) Conversion Circuit 31 Digital signal processing circuit 32 Drive control circuit R Photo diode (R color pixel) via red color filter
Photodiode (G color pixel) through G ₁ , G ₂ green color filter
B Photo diode (B color pixel) via blue color filter
TG Transfer gate FDA Floating diffusion amplifier (voltage converter)
La, Lb read signal line

Claims (3)

One voltage that converts charges generated by photoelectric conversion in the photoelectric conversion unit into a voltage between two diagonally adjacent photoelectric conversion units arranged in a two-dimensional array of rows and columns. A conversion unit is arranged so that the one voltage conversion unit shares the two photoelectric conversion units, and the shared diagonal direction of the pixel pairs connected to the same signal readout line is the pixel pair in the adjacent row direction. The photoelectric conversion units arranged in a two-dimensional array, having a structure that alternates between each other, are configured to form a pixel array by arranging color filters in a Bayer array, and have a higher frame frequency than in normal driving. A drive control circuit for an image sensor in which a read signal line is arranged so that pixel signals of a green pixel pair of the pixel pair can be added and read at the same time when driving at a predetermined high frame rate.
Three times for reading and controlling the R color pixel, the G color pixel, and the B color pixel of the Bayer array by performing drive control with a common analog-digital conversion cycle during the normal drive and the predetermined high frame rate drive. In the analog-to-digital conversion cycle of, one of adjacent read rows is read in the order of pixel addition of a pair of G color pixels, B color pixels, and R color pixels, and the other is read in B color pixels, R color pixels, and G color pixels. Reading is performed in the order of color pixel addition, or one of adjacent read rows is read in the order of pixel addition of a pair of G color pixels, R color pixel, and B color pixel, and the other is read in the order of R color pixel, B color pixel, and A drive control circuit for an image sensor, which generates a timing signal for reading in the order of G color pixel addition . One voltage that converts charges generated by photoelectric conversion in the photoelectric conversion unit into a voltage between two diagonally adjacent photoelectric conversion units arranged in a two-dimensional array of rows and columns. A conversion unit is arranged so that the one voltage conversion unit shares the two photoelectric conversion units, and the shared diagonal direction of the pixel pairs connected to the same signal readout line is the pixel pair in the adjacent row direction. The photoelectric conversion units arranged in a two-dimensional array are arranged to form a pixel array by arranging color filters in a Bayer array, and have a noise level lower than that during normal driving. When a predetermined low noise driving is performed, the read signal line is arranged so that the pixel signals of the green pixel pair of the pixel pair can be added and read simultaneously, and the read signal line is the one voltage conversion unit. A drive control circuit for an image sensor , which is configured to read a reset level signal in
When the normal driving and the predetermined low noise driving are performed with the same analog/digital conversion cycle, the driving control is performed, and when the R color pixel, the G color pixel, and the B color pixel of the Bayer array are read out, the G color is read. Driving control of an image pickup device characterized by generating a timing signal that enables digital correlated double sampling only for the G color pixel to be read out by pixel addition of the G color pixel pair only for the pixel circuit. In the image pickup device, drive signal lines for selecting pixels are arranged in groups of three for each group of four pixels with respect to the pixel array having a repetition period of one group of four pixels. The drive control circuit for the image sensor according to claim 1 or 2 .