JP6678029B2 - Support substrate with circuit formation layer, support substrate with double-sided circuit formation layer, multilayer laminate, method for manufacturing multilayer printed wiring board, and multilayer printed wiring board - Google Patents

Description

  The present invention relates to a support substrate with a circuit formation layer, a support substrate with a double-sided circuit formation layer, a method for manufacturing a multilayer printed wiring board, and a multilayer printed wiring board. In particular, it does not leave a core substrate serving as a support when forming a build-up layer, a support substrate with a circuit formation layer that can be preferably used when manufacturing a build-up multilayer printed wiring board, a support substrate with a double-sided circuit formation layer, The present invention also relates to a method for manufacturing a multilayer printed wiring board using such a support substrate with a circuit forming layer, and a multilayer printed wiring board.

  2. Description of the Related Art Conventionally, due to a demand for thinning of a build-up multilayer printed wiring board, a method of manufacturing a coreless build-up multilayer printed wiring board that does not leave a core substrate serving as a support when forming a so-called build-up layer (coreless build-up method). Is being adopted.

  In recent years, when manufacturing multilayer printed wiring boards using this coreless build-up method, it is possible to manufacture multilayer copper-clad laminates for manufacturing multilayer printed wiring boards with stable quality wiring layers without increasing raw material costs In addition, it is required to prevent waste of resources by reducing the amount of generated waste.

  For example, Patent Literature 1 describes a method of manufacturing a multilayer printed wiring board by a coreless build-up method using a metal foil with a carrier that can be separated at an interface between an adhesive and a metal foil. Specifically, “using a synthetic resin plate-shaped carrier and a metal foil with a carrier made of a metal foil that is mechanically peelably adhered to at least one surface of the carrier” A method in which a build-up layer is laminated on both sides of a metal foil with a carrier to which a copper foil is adhered, and then the metal foils on both sides are separated from the metal foil with a carrier. "

  Here, Patent Literature 1 discloses that a resin or prepreg is used as the synthetic resin plate-like carrier and has a thickness of 50 to 900 μm so that a position of a circuit caused by a difference in thermal expansion between a metal foil and a synthetic resin is obtained. It is disclosed that the displacement is prevented and the deflection is reduced.

JP 2013-140856 A

  However, when a multilayer printed wiring board is manufactured by a coreless build-up method using the plate carrier as a support substrate, poor adhesion and poor circuit smoothness may be caused when the build-up layers are laminated.

  Therefore, the present inventors have intensively studied and, as a result, have conceived of a method of manufacturing a multilayer printed wiring board by a coreless build-up method using a support substrate with a circuit formation layer described below.

1. The support substrate with a circuit forming layer according to the present application has a layer structure of a copper foil layer / a release layer / a carrier layer / a resin layer, and has a maximum unevenness of the surface of the carrier layer on the resin layer side. The copper foil layer having a height difference (PV) of 3 μm to 12 μm and a thickness of the resin layer of 1.5 μm to 15 μm is used as a circuit formation layer. is there.

2. Manufacturing method of multilayer printed wiring board 2-1. Basic Manufacturing Method A method for manufacturing a multilayer printed wiring board according to the present application is a method for manufacturing a multilayer printed wiring board by a coreless build-up method using the support substrate with a circuit forming layer, and includes the following steps. It is characterized by.

Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of the copper foil layer of the substrate with a circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: The support substrate with build-up wiring layer is separated by the release layer of the supporting substrate with circuit forming layer, and a multilayer in which a build-up layer is formed on the copper foil layer Obtain a laminate.
Multilayer Printed Wiring Board Forming Step: The multilayer laminate is subjected to necessary processing to obtain a multilayer printed wiring board.

  In the method for manufacturing a multilayer printed wiring board according to the present application, by applying the above-described basic manufacturing method, a multilayer printed wiring board is formed by the following “first manufacturing method”, “second manufacturing method”, and “third manufacturing method”. It is also preferred to produce

2-2. First Manufacturing Method This first manufacturing method includes the following steps. Each step will be described in detail in the following description of embodiments of the invention.

Manufacturing process of support substrate with double-sided circuit formation layer: Using two copper foils with a carrier having a layer structure of resin layer / carrier layer / peeling layer / copper foil layer, these resin layers are directly bonded to each other, or a core material is used. By bonding to both surfaces of the substrate to form a central resin layer, a support substrate with a double-sided circuit forming layer having a layer structure of copper foil layer / peeling layer / carrier layer / central resin layer / carrier layer / peeling layer / copper foil layer is obtained. .
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of each copper foil layer of the substrate with a double-sided circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: Separation is performed at a release layer of the supporting substrate with a double-sided circuit forming layer to obtain a multilayer laminate in which a build-up layer is formed on a copper foil layer.

2-3. Second manufacturing method This second manufacturing method includes the following steps.

Manufacturing process of a support substrate with a double-sided circuit formation layer: a first copper foil with a carrier having a layer configuration of a carrier layer / release layer / copper foil layer, and a layer configuration of a resin layer / carrier layer / release layer / copper foil layer By using the copper foil with the second carrier and directly bonding the carrier of the copper foil with the first carrier and the resin layer of the copper foil with the second carrier, or laminating both sides of the core material, the copper foil layer is formed. A support substrate with a double-sided circuit formation layer having a layer configuration of / release layer / carrier layer / central resin layer / carrier layer / release layer / copper foil layer is obtained.
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of each copper foil layer of the support substrate with a double-sided circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: Separation is performed at a release layer of the supporting substrate with a double-sided circuit forming layer to obtain a multilayer laminate in which a build-up layer is formed on a copper foil layer.

2-4. Third Manufacturing Method The third manufacturing method includes the following steps.

Manufacturing process of a support substrate with a double-sided circuit formation layer: Using two copper foils with a carrier having a layer structure of a carrier layer / a peeling layer / a copper foil layer, the carrier layer of each copper foil with a carrier is made of a resin core material. Then, a support substrate with a double-sided circuit forming layer having a layer structure of copper foil layer / release layer / carrier layer / central resin layer / carrier layer / release layer / copper foil layer is obtained.
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of each copper foil layer of the support substrate with a double-sided circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: Separation is performed at a release layer of the supporting substrate with a double-sided circuit forming layer to obtain a multilayer laminate in which a build-up layer is formed on a copper foil layer.

  The support substrate with a circuit formation layer according to the present invention can be used when a multilayer printed wiring board is manufactured by a coreless build-up method, and has a basic structure of a copper foil layer / peeling layer / carrier layer / resin layer. Prepare. This support substrate with a circuit forming layer can have excellent adhesion between the resin layer and the carrier, and can have excellent smoothness of a circuit formed on the copper foil layer.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view for explaining a layer configuration of a support substrate with a circuit formation layer according to the present application. BRIEF DESCRIPTION OF THE DRAWINGS It is a cross-sectional schematic diagram for demonstrating the copper foil with a carrier used for manufacture of the support substrate with a circuit formation layer which concerns on this application, and the copper foil with a carrier provided with a resin layer. FIG. 2 is a schematic cross-sectional view for explaining a method of manufacturing a support substrate with a circuit formation layer used in a first manufacturing method according to the present application. FIG. 2 is a schematic cross-sectional view for explaining an image of a build-up laminate when build-up layers are formed on both sides of a support substrate with a circuit formation layer according to the present application. FIG. 2 is a schematic cross-sectional view for explaining an image when a build-up layer is formed on both surfaces of a support substrate with a circuit formation layer according to the present application, and the build-up laminate and the support substrate are separated. It is a cross section for explaining the manufacturing method of the support substrate with a circuit formation layer used by the 3rd manufacturing method concerning the present application. It is a cross section for explaining the manufacturing method of the support substrate with a circuit formation layer used by the 2nd manufacturing method concerning the present application.

1. 1. Form of Support Substrate with Circuit Formation Layer The support substrate with a circuit formation layer according to the present application is a support substrate that can be used when manufacturing a multilayer printed wiring board by a coreless build-up method, and includes a copper foil layer / a release layer. This is a support substrate having a circuit forming layer, which has a layer structure of / carrier layer / resin layer, and has a basic structure in which a copper foil layer is used as a circuit forming layer. Further, by applying the basic configuration, for example, as shown in FIG. 1, on both sides of the resin layer (central resin layer 8), the carrier layer 2 / release layer 3 / copper foil layer 4 As a double-sided circuit forming layer-supporting substrate 1 having a layer structure, a build-up layer is laminated on a copper foil layer, and then the carrier layer / resin layer side is separated in a peeling layer of the supporting substrate, so that coreless build-up is performed. It is also preferable to obtain a multilayer printed wiring board. Hereinafter, each layer constituting the support substrate with a circuit forming layer will be described in order.

Resin layer: The resin layer of the support substrate with a circuit forming layer according to the present application preferably has a thickness of 1.5 μm to 15 μm. In the manufacturing process of the support substrate 1 with a double-sided circuit formation layer, which will be described later, the thickness of the resin layer is set so that the support substrate with the circuit formation layer is formed, and the build-up layer is formed. Is preferably 1.5 μm or more. In addition, the thickness of the resin layer is preferably 15 μm or less from the viewpoint that surface smoothness when forming a circuit on the copper foil layer can be ensured. In order to further obtain the effect, the thickness of the resin layer is more preferably 2 μm to 10 μm, and still more preferably 2 μm to 8 μm. In the support substrate with a double-sided circuit layer, for the same reason as described above, the thickness of the central resin layer of the support substrate with a double-sided circuit layer is preferably 3 μm to 30 μm, and the thickness of the central resin layer is 4 μm to It is more preferably 20 μm, further preferably 4 μm to 16 μm.

  The resin constituting the resin layer (including the central resin layer) is not particularly limited, but is a resin generally used for manufacturing printed wiring boards, such as an epoxy resin, a polyimide resin, a polyamide resin, a polyamideimide resin, and a phenol resin. Is preferred. It is also preferable that the resin layer is formed of a prepreg or the like in which these resins are impregnated in a skeleton material such as a glass cloth or a glass nonwoven fabric.

Carrier layer: Here, the reason for being referred to as a carrier layer (carrier) will be described. The support substrate with a circuit-forming layer according to the present application is provided with the above-described basic configuration (copper foil layer 4 / peeling layer 3 / carrier layer 2 / resin layer). As long as the copper foil layer 4 / release layer 3 / carrier layer 2 / center resin layer 8 / carrier layer 2 / release layer 3 / copper foil layer 4 are provided, there is no particular limitation on the manufacturing method. However, for example, as shown in FIG. 2A, it is preferable to manufacture using a copper foil with a carrier 10 having a layer structure of a copper foil layer 4 / a release layer 3 / a carrier layer 2. As shown in FIG. 2 (A), the copper foil with carrier 10 may include a roughening layer 5 and a roughening layer 6 on the outer layers of the copper foil layer 4 and the carrier layer 2, respectively. It is not limited.

The carrier layer constituting the support substrate with a circuit forming layer is generally a resin film having a thickness of 12 μm to 70 μm, or an electrolytic copper foil or a rolled copper foil, but from the viewpoint of reducing waste and handling. In view of this, those having a size of 12 μm to 35 μm are preferable. In addition, from the viewpoint of maintaining rigidity against a high-temperature heat load when the build-up layer is formed on the support substrate with a circuit formation layer, the carrier layer is subjected to a heat treatment at 250 ° C. × 60 minutes, and then subjected to 40 kgf / More preferably, it is composed of a copper foil having a tensile strength of at least ² mm.

  The bonding surface of the carrier layer with the resin layer is preferably a rough surface capable of appropriately maintaining the adhesive strength with the resin layer. In order to define this rough surface, the "maximum height difference (PV) of unevenness," which is the sum of the maximum peak height and the maximum valley depth of the sample surface directly measured using a three-dimensional surface structure analysis microscope, is used as an index. Used. The value of the “maximum height difference (PV)” of the surface of the carrier layer is such that the adhesion between the carrier layer and the resin layer can be ensured, and the smoothness of the circuit formed on the copper foil layer is maintained. From the viewpoint of the point (in other words, the point of reducing the promotion of unevenness of the copper foil layer surface after pressing based on the uneven shape of the carrier layer), the thickness is preferably 3 μm to 12 μm, more preferably 4 μm to 10 μm.

  The measurement of the “maximum height difference (PV) of unevenness” is performed by using a Zygo New View 5032 (manufactured by Zygo) as a measuring device, “Metro Pro Ver. 8.0.2” as analysis software, and a low-frequency filter of 11 μm. Was set and measured. In addition, it measured specifically by the procedure of the following a) -c).

a) The surface of the copper foil with carrier that comes into contact with the resin layer of the sample piece is fixed as a measurement surface by closely adhering to the sample table.
b) Within a 1 cm square area of the sample piece, six visual fields of 108 μm × 144 μm are selected and measured.
c) The average value of the maximum height difference (PV) values obtained from the six measurement points was adopted as the “maximum height difference (PV) of unevenness”.

Release Layer: When the release layer is an organic release layer, the release layer preferably contains at least one compound selected from the group consisting of a nitrogen-containing compound, a sulfur-containing compound, and a carboxylic acid. The nitrogen-containing organic compound referred to here includes a nitrogen-containing organic compound having a substituent. Specifically, examples of the nitrogen-containing organic compound include 1,2,3-benzotriazole, carboxybenzotriazole, N ′, N′-bis (benzotriazolylmethyl) urea, and 1H, which are triazole compounds having a substituent. It is preferable to use -1,2,4-triazole, 3-amino-1H-1,2,4-triazole and the like. And as a sulfur-containing organic compound, it is preferable to use mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazole thiol, and the like. Further, as the carboxylic acid, it is particularly preferable to use a monocarboxylic acid, and it is particularly preferable to use oleic acid, linoleic acid, linolenic acid, and the like. This is because these organic components have excellent high-temperature heat resistance and can easily form a bonding interface layer having a thickness of 5 nm to 60 nm on the surface of the carrier.

  When the release layer is an inorganic release layer, the release layer is selected from the group consisting of Ni, Mo, Co, Cr, Fe, Ti, W, P, carbon, and alloys or compounds containing these as main components. It is preferable to use at least one of the above. In the case of these inorganic bonding interface layers, it is possible to form them using a known method such as an electrodeposition method, an electroless method, or a physical vapor deposition method.

Copper foil layer: The copper foil layer is formed by a physical vapor deposition method such as sputtering, a chemical vapor reaction method, an electroless plating method, an electrolytic plating method, or a composite plating method using a combination of electroless plating and electrolytic plating. It can be formed, and there is no particular limitation on the forming method. However, in consideration of the manufacturing cost and the uniformity of the thickness of the copper foil layer, it is preferable from the economical viewpoint to form the copper foil layer by the electrolytic method. There is no particular limitation on the thickness of the copper foil layer. The thickness of the copper foil is preferably 1 μm to 10 μm from the viewpoint of preventing occurrence of pinhole defects and securing an etching factor when forming a fine circuit.

  In the present application, the fact that the copper foil layer is also used as a circuit forming layer of a multilayer printed wiring board means that, when a multilayer printed wiring board is manufactured, specifically, an embedded circuit forming layer or an outer circuit forming layer. It means that it is used as. The timing at which a circuit is formed on the copper foil layer is not particularly limited. Before the build-up layer is laminated on the copper foil layer, a circuit may be formed using the copper foil layer as an embedded circuit formation layer. Further, a build-up layer is laminated on the copper foil layer, and after a multilayer laminate is obtained in a support substrate separation step with a build-up wiring layer described later, circuit formation is performed using the copper foil layer as an outer circuit formation layer. May be.

  When a circuit is formed on the copper foil layer, a conventionally known circuit forming method can be appropriately employed. For example, an MSAP (Modified Semi-Additive Process) method in which a pattern is formed by photoresist and electroplating using the copper foil layer as a seed layer, and a subtractive method in which an unnecessary portion is removed from the copper foil layer to form a pattern It is preferable to employ the following.

2. Manufacturing Method of Multilayer Printed Wiring Board A multilayer printed wiring board can be manufactured by the following coreless build-up method using the support substrate with a circuit forming layer according to the present application described above. The method for manufacturing a multilayer printed wiring board according to the present application can be applied to the following three manufacturing methods based on the following basic manufacturing method. Hereinafter, the basic manufacturing method, the first manufacturing method, the second manufacturing method, and the third manufacturing method will be described separately. Note that the build-up wiring layer forming step, the support substrate separation step with a build-up wiring layer, and the multilayer printed wiring board forming step referred to in the basic manufacturing method are common to all manufacturing methods. Hereinafter, each manufacturing method will be described.

2-1. Basic Manufacturing Method The basic manufacturing method is a method of manufacturing a multilayer printed wiring board by a coreless build-up method using the support substrate with a circuit formation layer having the above-described basic configuration, and includes the following steps.

Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of the copper foil layer of the substrate with a circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: The support substrate with build-up wiring layer is separated by the release layer of the supporting substrate with circuit forming layer, and a multilayer in which a build-up layer is formed on the copper foil layer Obtain a laminate.
Multilayer Printed Wiring Board Forming Step: The multilayer laminate is subjected to necessary processing to obtain a multilayer printed wiring board.

2-2. First Manufacturing Method This first manufacturing method is characterized by comprising the following steps. Hereinafter, each step will be described.

Manufacturing Process of Support Substrate with Circuit Forming Layer: This will be described with reference to FIG. In this step, as shown in FIG. 3 (C-1), the copper foil with carrier 20 provided with the resin layer 7 having the layer structure of the resin layer 7 / the carrier layer 2 / the release layer 3 / the copper foil layer 4 is removed. The resin layers 7 are directly adhered to each other using a single sheet. At this time, it is preferable to apply hot press molding or the like at a temperature of 150 ° C. or more. As a result, as shown in FIG. 3 (D), “copper foil layer 4 / release layer 3 / carrier layer 2 / central resin layer 8 / carrier layer 2 / release The support substrate 1 with a double-sided circuit formation layer having the layer configuration of “layer 3 / copper foil layer 4” can be obtained. In the drawings, the copper foil layer of the copper foil with carrier 20 and the copper foil layer as the circuit formation layer (outer circuit formation layer) of the support substrate 1 with double-sided circuit formation layer mean the same part. , The same reference numeral 4.

Build-up wiring layer forming step: In this step, a build-up wiring layer Bu is formed on the surfaces of the copper foil layers 4 on both surfaces of the support substrate 1 with a double-sided circuit forming layer. The support substrate with a double-sided circuit formation layer 1 on which the build-up wiring layer Bu is formed is referred to as a support substrate with a build-up wiring layer 40 as described above. In this step, a specific method of forming the build-up wiring layer Bu is not particularly limited. The desired multilayering and formation of the inner layer circuit may be performed by any method as long as it is included in a method called a so-called build-up method. As an example, in FIG. 4 (E) of the present application, the build-up wiring layer Bu includes a “first build-up wiring layer 30 including a via hole 28 and a first circuit layer 31 including a first circuit 23 including a plating layer 24”. ", A second build-up wiring layer 32 including a second circuit layer 33 including a second circuit 25 including a via hole 28 and a plating layer 24," a wiring layer 34 made of copper foil or the like and an interlayer insulating resin layer 35 ". And the like.

Step of separating support substrate with build-up wiring layer: In this step, as shown in FIG. 5F, the support substrate with build-up wiring layer 40 is separated by the release layer 3 of the support substrate with circuit formation layer 1. Thus, two multilayer laminates 50 having the build-up layer Bu formed on the copper foil layer 4 are obtained. At this time, by separating the support substrate 40 with the build-up wiring layer at the release layer 3 of the support substrate 1 with the double-sided circuit formation layer at the same time, two multi-layer laminates 50 can be obtained at the same time.

Multilayer Printed Wiring Board Forming Step: In this step, the multilayer laminated board 50 is subjected to necessary processing to obtain a multilayer printed wiring board. This step is not shown because there is no particular limitation. The necessary steps at this time include formation of via holes and the like, interlayer conduction processing such as plating, formation of an outer layer circuit by etching of the copper foil layer 4 and / or wiring layer 34, and formation of an outer layer circuit as necessary. It is enough to adopt the method.

  In the manufacturing process of the support substrate with a double-sided circuit formation layer, the resin layers 7 are bonded to each other, but a core material may be interposed between the resin layers 7. For example, a resin core material can be used, and a resin film in a semi-cured state (B stage) or a resin film having a resin layer in a semi-cured state is preferably used as the core material. By interposing the core material, the rigidity of the supporting substrate can be ensured even when the thickness of the resin layer of the copper foil with carrier 20 is small. However, even when a core material is interposed, the thickness of the central resin layer 8 is preferably within the above range. When the resin film is bonded to the resin layer 7, hot press molding or the like can be performed similarly to the case where the resin layers 7 are bonded to each other.

2-3. Second manufacturing method This second manufacturing method includes the following steps. The difference from the first manufacturing method is only the manufacturing process of the support substrate with a circuit forming layer. Therefore, in the following description of the embodiments of the present invention, in order to omit redundant description with the first manufacturing method, a double-sided circuit forming layer is provided. Only the manufacturing process of the supporting substrate will be described in detail.

Manufacturing process of support substrate with double-sided circuit formation layer: The manufacture of the support substrate with double-sided circuit formation layer in the second manufacturing method will be described with reference to FIG. In this step, as shown in FIG. 7 (C-2), a copper foil 10 with a carrier having a layer structure of carrier layer 2 / release layer 3 / copper foil layer 4, resin layer 7 / carrier layer 2 / release layer 3 / Using the electrolytic copper foil 20 with a carrier provided with a resin layer having the layer configuration of the copper foil layer 4, the carrier surface of the copper foil 10 with the first carrier and the resin layer 7 of the copper foil 20 with the second carrier are used. As shown in FIG. 7 (D), by bonding the copper foil layer 4 on both sides, the copper foil layer 4 / release layer 3 / carrier layer 2 / central resin layer 8 / carrier layer 2 / release layer The support substrate 1 with a circuit formation layer having the layer configuration of “layer 3 / copper foil layer 4” is obtained.

  At this time, FIG. 7D and FIG. 3D of the first manufacturing method have the same form. Therefore, the following steps of the second manufacturing method, ie, the “build-up wiring layer forming step”, the “support substrate separating step with build-up wiring layer”, and the “multi-layer printed wiring board forming step” are the same as in the first manufacturing method. is there. Therefore, the duplicate description here is omitted.

  In the manufacturing process of the support substrate with a double-sided circuit formation layer, the carrier foil surface of the first carrier-attached copper foil 10 and the resin layer 7 surface of the second carrier-attached copper foil 20 are directly bonded to each other. A core material may be interposed between the carrier surface and the resin layer 7. As the core material, the same material as described in the first manufacturing method can be used, and the same method as described above can be employed for the bonding method and the like.

2-4. Third manufacturing method

  This third manufacturing method includes the following steps. The difference from the first manufacturing method is only the manufacturing process of the support substrate with a double-sided circuit formation layer. Therefore, in the following description of the embodiments of the invention, the duplicated description of the first manufacturing method will be omitted. Only the manufacturing process of the attached support substrate will be described.

Manufacturing process of support substrate with double-sided circuit formation layer: The manufacturing process of the support substrate with double-sided circuit formation layer in the third manufacturing method will be described with reference to FIG. In this step, as shown in FIG. 7 (C-3), two electrolytic copper foils with a carrier 10 having a layer structure of carrier layer 2 / release layer 3 / copper foil layer 4 are used, and the electrolytic copper foil with a carrier is used. The carriers of the foil 10 are opposed to each other, the film-shaped resin F is sandwiched between the carrier layers 2 and the carrier layers are bonded to the film-shaped resin F, as shown in FIG. As described above, copper foil layer 4 containing both sides of copper foil layer 4 as a copper foil layer for forming a double-sided circuit / peeling layer 3 / carrier layer 2 / central resin layer 8 / carrier layer 2 / peeling layer 3 / copper foil layer 4 The support substrate 1 with a double-sided circuit formation layer having the layer configuration described above is obtained.

  At this time, FIG. 7D and FIG. 3D of the first manufacturing method have the same form. Accordingly, the following steps of the third manufacturing method, ie, the “build-up wiring layer forming step”, the “support substrate separating step with build-up wiring layer”, and the “multi-layer printed wiring board forming step” are the same as the first manufacturing step. is there. Therefore, the duplicate description here is omitted.

  The film-shaped resin F corresponds to the core material described in the first manufacturing method or the second manufacturing method.

  Note that the timing for forming a circuit on the copper foil layer and the method for forming the circuit are as described above, and a description thereof will be omitted.

  Next, the present invention will be specifically described with reference to Examples and Comparative Examples. However, the present invention is not limited to the following embodiments.

1. Example 1
In Example 1, a multilayer printed wiring board was manufactured by the above-described first manufacturing method. Specifically, a multilayer printed wiring board was manufactured by the following steps.

  Resin layer (carrier thickness: 2.5 μm) as a copper foil with a carrier, resin layer / carrier layer / peeling with 3.8 μm maximum height difference (PV) of unevenness on the resin layer side of carrier layer (18 μm) Using two copper foils with a carrier having a layer structure of copper layer / copper foil layer, a resin substrate is directly adhered to each other, and a support substrate with a double-sided circuit formation layer (hereinafter referred to as a support) having a central resin layer having a thickness of 5.0 μm. (Referred to as substrate A) (see FIGS. 2 and 3).

  Here, the resin layer component was formed as follows, and a varnish adjusted so that the total solid content was 20% by weight was applied to the carrier layer using an applicator.

〔Epoxy resin〕
Epicron 850S manufactured by DIC Corporation: 43 parts by weight YD-907 manufactured by Nippon Steel & Sumikin Chemical Co., Ltd .: 25 parts by weight [curing agent]
D25F manufactured by Nippon Carbide Industrial Co., Ltd .: 5 parts by weight as solid content [mixed resin]
Polyvinyl acetal resin (KS-5 manufactured by Sekisui Chemical Co., Ltd.): 25 parts by weight Isocyanate resin (Coronate AP Stable manufactured by Tosoh Corporation): 2 parts by weight [imidazole-based curing catalyst]
2MZ-H manufactured by Shikoku Chemical Industry Co., Ltd .: 0.1 parts by weight [mixed solvent]
Methyl ethyl ketone: propylene glycol monomethyl ether = 4: 1 mixture

  Thereafter, a support substrate with a build-up wiring layer as shown in FIG.

  Next, in a support substrate separating step with a build-up wiring layer, as shown in FIG. 5F, the support substrate with a build-up wiring layer is separated at each release layer of the support substrate with a double-sided circuit formation layer. Then, two multilayer laminates having a build-up layer formed on a copper foil layer (hereinafter, referred to as laminate A) were obtained.

2. Example 2 to Example 4
Examples 2 to 4 were performed in the same manner as in Example 1 except that the maximum height difference (PV) of the unevenness of the surface of the carrier layer on the resin layer side and the resin layer thickness were as shown in Table 1, respectively. A supporting substrate A and a laminate A were manufactured.

Comparative example

  Also in Comparative Examples 1 to 5, the same method as in Example 1 except that the maximum height difference (PV) of the unevenness on the surface of the carrier layer on the resin layer side and the resin layer thickness were as shown in Table 1, respectively. To produce a supporting substrate and a laminate.

<Evaluation>
In the above Examples and Comparative Examples, when manufacturing a multilayer printed wiring board, the adhesion between the central resin layer and the carrier layer constituting the support substrate and the circuit formability (substrate smoothness) when forming the build-up layer are formed. ) Was evaluated.

1. Evaluation method 1-1. Adhesion between center resin layer and carrier layer The adhesion between the center resin layer and the carrier layer was evaluated as follows. After the above-mentioned support substrate was cut into a width of 1 cm, of the carrier layers arranged on both sides of the resin layer, the carrier layer on one side was pulled up at an angle of 90 ° and a speed of 50 mm / min, and the peel strength was measured. At that time, a pass / fail decision was made based on the following criteria.

：: Carrier breaks and strength cannot be measured (assuming peel strength of 2.5 kgf / cm or more)
×: Strength measurement possible (peel strength less than 2.5 kgf / cm)

1-2. Circuit formability (substrate smoothness)
The substrate smoothness was evaluated by the following method for Examples 1 to 3 in which the evaluation result was “O” in the above-mentioned adhesion evaluation and Comparative Example 2. First, the 10-point average roughness Rz (hereinafter, referred to as “Rz ₀ ”) of the surface of the copper foil layer on the release layer side in the initial state of the copper foil with a carrier was measured using a sample for Rz ₀ measurement. The sample for Rz ₀ measurement is obtained by laminating a copper foil with a carrier having a layer structure of resin layer / carrier layer / peeling layer / copper foil layer on a smooth glass plate, and then peeling off the carrier to expose the surface of the copper foil layer. And Then, a 10-point average roughness Rz (hereinafter, “Rz ₁ ”) determined on the surface of the copper foil layer of the above-mentioned laminated board A using a contact surface roughness meter in accordance with JIS B 0601 (2001). ) Was measured. The circuit smoothness was evaluated based on the resulting change in the 10-point average roughness Rz of the copper foil layer surface (hereinafter referred to as “ΔRz”, where ΔRz = Rz ₁ −Rz ₀ ). At that time, a pass / fail judgment was made based on the following judgment criteria.

：: ΔRz ≦ 0.3 μm
×: ΔRz> 0.3 μm

1-3. Comprehensive evaluation Based on the evaluation results of the above-mentioned adhesion and circuit formation, the following comprehensive judgment was performed based on the following judgment criteria.

：: Adhesion evaluation was ○ and circuit formability was ○
×: × evaluation of adhesion, or × circuit formation

2. Evaluation result 2-1. Adhesion between Central Resin Layer and Carrier Layer Table 1 shows the evaluation results regarding the adhesion between the central resin layer and the carrier layer in Examples and Comparative Examples. As shown in Table 1, it was confirmed that the adhesion between the central resin layer and the carrier layer was good in any of the support substrates with double-sided circuit formation layers manufactured in Examples 1 to 4. Regarding the examples, it was confirmed that regardless of the thickness of the central resin layer, a lower value of the maximum height difference (PV) of the unevenness of the surface of the carrier layer on the resin layer side could obtain better adhesion. .

  On the other hand, as for the comparative example, the thickness of the resin layer is 20 μm (the thickness of the central resin layer is 40 μm), and the maximum height difference (PV) of the unevenness of the surface of the carrier layer on the resin layer side is within the scope of the present invention. In Comparative Example 2, the adhesion between the center resin layer and the carrier layer was good, but in the other Comparative Examples, the adhesion between the center resin layer and the carrier layer was not good, and the build-up layer was formed. In the process, the substrate was peeled off from the edge of the substrate, and the substrate smoothness of the laminate A could not be evaluated. Regarding each comparative example, when the maximum height difference (PV) of the unevenness of the surface of the carrier layer on the resin layer side is out of the range of the present invention, even if the value of PV is low or high, the central resin layer and the carrier layer are not affected. It was confirmed that the adhesiveness with the adhesive decreased. Further, for example, when the thickness of the central resin layer is thin as in Comparative Example 1, even when the PV value is within the range of the present invention, good adhesion between the central resin layer and the carrier layer cannot be obtained. It was confirmed that.

2-2. Circuit formability (substrate smoothness)
Table 1 shows the results of evaluating the circuit formability in Examples and Comparative Examples. As shown in Table 1, it was confirmed that all of the support substrates with double-sided circuit formation layers manufactured in Examples 1 to 4 had good circuit formability. In particular, it was confirmed that when the thickness of the resin layer was within the above-described preferred range (1.5 μm to 15 μm), more favorable circuit formability was exhibited.

  On the other hand, for Comparative Examples 1 to 5 in which at least one of the PV value and the resin layer thickness is out of the range of the present invention, the adhesion of the carrier is poor, and as a result, the carrier is peeled off at the build-up layer formation stage. , The circuit formability could not be evaluated.

  When manufacturing multilayer copper-clad laminates by the coreless build-up method, by providing a support substrate etc. with excellent adhesion and circuit smoothness, multilayer prints with excellent circuit formation stability in the build-up layer forming process A wiring board can be obtained.

1 support substrate with circuit formation layer 2 carrier layer (carrier)
3 Release Layer 4 Copper Foil Layer 7 Resin Layer 8 Central Resin Layer 10 Copper Foil with Carrier 20 Electrolytic Copper Foil with Carrier with Resin Layer 23 First Circuit 25 Second Circuit 24 Plating Layer 28 Via Hole 30 First Build-up Wiring Layer 30
31 First circuit layer 32 Second build-up wiring layer 33 Second circuit layer 34 Wiring layer 35 Interlayer insulating resin layer 36 Third build-up layer 40 Support substrate with build-up wiring layer 50 Multilayer laminate Bu Build-up wiring layer F film Resin

Claims (14)

It has a layer structure of copper foil layer / release layer / carrier layer / resin layer,
A maximum height difference (PV) of irregularities on the surface of the carrier layer on the resin layer side is 3 μm to 12 μm;
The thickness of the resin layer is 1.5 μm to 15 μm,
A support substrate with a circuit formation layer, characterized in that:   The support substrate with a circuit formation layer according to claim 1, wherein the release layer is an organic release layer containing at least one compound selected from the group consisting of a nitrogen-containing compound, a sulfur-containing compound, and a carboxylic acid.   The support substrate with a circuit formation layer according to claim 1, wherein the release layer is an inorganic release layer formed using an inorganic component. On both sides of the resin layer, a carrier layer / release layer / copper foil layer is provided in order from the resin layer side,
A maximum height difference (PV) of irregularities on the surface of the carrier layer on the resin layer side is 3 μm to 12 μm;
The resin layer has a thickness of 1.5 μm to 30 μm,
A support substrate with a double-sided circuit formation layer, characterized in that: A multilayer laminate manufactured using the support substrate with a circuit formation layer according to any one of claims 1 to 3,
On the copper foil layer, after a build-up layer including at least one insulating layer and a wiring layer is laminated, separated in the release layer, a laminate in which the build-up layer is laminated on the copper foil layer A multilayer laminate characterized by the following.   The multilayer laminate according to claim 5, wherein a circuit is formed on the copper foil layer before the build-up layer is laminated on the copper foil layer.   The multilayer laminate according to claim 5, wherein a circuit is formed on the copper foil layer after being separated at the release layer. A method for producing a multilayer printed wiring board by a build-up method using the support substrate with a circuit layer according to any one of claims 1 to 3, comprising the following steps: A method for manufacturing a multilayer printed wiring board.
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of the copper foil layer of the substrate with a circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: The support substrate with build-up wiring layer is separated by the release layer of the supporting substrate with circuit forming layer, and a multilayer in which a build-up layer is formed on the copper foil layer Obtain a laminate. A method for manufacturing a multilayer printed wiring board by a build-up method using the support substrate with a double-sided circuit formation layer according to claim 4, comprising the following steps: .
Manufacturing process of support substrate with double-sided circuit formation layer: Using two copper foils with a carrier having a layer structure of resin layer / carrier layer / peeling layer / copper foil layer, these resin layers are directly bonded to each other, or a core material is used. By bonding to both surfaces of the substrate to form a central resin layer, a support substrate with a double-sided circuit forming layer having a layer structure of copper foil layer / peeling layer / carrier layer / central resin layer / carrier layer / peeling layer / copper foil layer is obtained. .
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of each copper foil layer of the substrate with a double-sided circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: Separation is performed at a release layer of the supporting substrate with a double-sided circuit forming layer to obtain a multilayer laminate in which a build-up layer is formed on a copper foil layer. A method for manufacturing a multilayer printed wiring board by a build-up method using the support substrate with a double-sided circuit formation layer according to claim 4, comprising the following steps: Method.
Manufacturing process of a support substrate with a double-sided circuit formation layer: a first copper foil with a carrier having a layer configuration of a carrier layer / release layer / copper foil layer, and a layer configuration of a resin layer / carrier layer / release layer / copper foil layer Using the copper foil with the second carrier, the carrier of the copper foil with the first carrier and the resin layer of the copper foil with the second carrier are directly bonded to each other, or are bonded to both surfaces of the core material. The support substrate with a double-sided circuit formation layer having the layer configuration of release layer / carrier layer / central resin layer / carrier layer / release layer / copper foil layer is obtained.
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of each copper foil layer of the support substrate with a double-sided circuit formation layer to obtain a support substrate with a build-up wiring layer.
Supporting substrate separating step with build-up wiring layer: Separation is performed at a release layer of the supporting substrate with a double-sided circuit forming layer to obtain a multilayer laminate in which a build-up layer is formed on a copper foil layer. A method for manufacturing a multilayer printed wiring board by a build-up method using the support substrate with a double-sided circuit formation layer according to claim 4, comprising the following steps: .
Manufacturing process of a support substrate with a double-sided circuit forming layer: Using two copper foils with a carrier having a layer structure of a carrier layer / a release layer / a copper foil layer, the carrier layers of the copper foils with a carrier are bonded to both surfaces of the core material. Thereby, the support substrate with a double-sided circuit formation layer having a layer structure of copper foil layer / peeling layer / carrier layer / central resin layer / carrier layer / peeling layer / copper foil layer is obtained.
Build-up wiring layer forming step: A build-up wiring layer is formed on the surface of each copper foil layer of the support substrate with a double-sided circuit formation layer to obtain a support substrate with a build-up wiring layer.
Separation step of support substrate with build-up wiring layer: Separated at the release layer of the support substrate with a double-sided circuit formation layer to obtain a multilayer laminate having a build-up layer formed on a copper foil layer.   The method for manufacturing a multilayer printed wiring board according to any one of claims 9 to 11, wherein the core material is a resin film in a semi-cured state or a film having a resin layer in a semi-cured state.   The circuit formation is performed on the copper foil layer in the build-up wiring layer forming step before the build-up layer is formed on the surface of the copper foil layer. 3. The method for producing a multilayer printed wiring board according to item 1.   The multilayer print according to any one of claims 8 to 12, wherein in the support substrate separating step with a build-up wiring layer, a circuit is formed on the copper foil layer after obtaining the multilayer laminate. Manufacturing method of wiring board.

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