JP6670808B2 - High photoelectric conversion efficiency solar cell, method for manufacturing the same, solar cell module and solar power generation system - Google Patents

Description

  The present invention relates to a back electrode type high photoelectric conversion efficiency solar cell, a method for manufacturing the same, a solar cell module, and a solar power generation system.

  Generally, a solar battery cell is made of a plate-like polycrystalline silicon or single-crystal silicon having a size of 100 to 150 mm square and a thickness of 0.1 to 0.3 mm, and is doped with a p-type impurity such as boron. As a main material. In this solar cell, an n-type diffusion layer (emitter layer) and an antireflection film are formed on a light receiving surface for receiving sunlight, and electrodes are formed through the antireflection film so as to be in contact with the emitter layer. .

  In a solar cell, an electrode is indispensable for taking out a current obtained by photoelectric conversion. However, sunlight is not incident on a portion of the light receiving surface where the electrode is formed because sunlight is not incident on the portion where the electrode is formed. Is larger, the conversion efficiency decreases and the current decreases. Such a current loss due to an electrode provided on the light receiving surface is called shadow loss.

  On the other hand, the back electrode type solar cell has no electrode on the light receiving surface, so there is no shadow loss, and almost 100% of the incoming sunlight is taken in, except for a small amount of reflected light that could not be suppressed by the antireflection film. Can be. Therefore, in principle, high conversion efficiency can be expected.

  Generally, the back electrode type solar cell 100 has a cross-sectional structure as shown in FIG. The back electrode type solar cell 100 includes a semiconductor substrate 101, an emitter layer 104, a BSF (Back Surface Field) layer 106, antireflection / passivation films 107 and 108, and electrodes 109 and 110.

  The semiconductor substrate 101 is a main material of the back electrode type solar cell 100 and is made of single crystal silicon, polycrystalline silicon, or the like. Although it may be either p-type or n-type, an n-type silicon substrate doped with an n-type impurity such as phosphorus is often used. Hereinafter, a case where an n-type silicon substrate is used will be described as an example. The semiconductor substrate 101 is preferably a plate having a size of 100 to 150 mm square and a thickness of 0.1 to 0.3 mm, and one main surface is a light receiving surface and the other main surface is a non-light receiving surface ( Back).

  An uneven structure for confining light is formed on the light receiving surface. The uneven structure can be obtained by immersing the semiconductor substrate 101 in an acidic or alkaline solution for a certain time. Generally, this uneven structure is called a texture.

  On the back surface, an emitter layer 104 that is a p-type diffusion layer doped with a p-type impurity such as boron and a BSF layer 106 that is an n-type diffusion layer doped with an n-type impurity such as phosphorus are formed.

  On the light-receiving surface on which the texture is formed and on the back surface on which the emitter layer 104 and the BSF layer 106 are formed, antireflection films and passivation films 107 and 108 made of SiN (silicon nitride) are formed, respectively.

  Then, an electrode 109 is formed so as to be connected to the emitter layer 104, and an electrode 110 is formed so as to be connected to the BSF layer 106. These electrodes may have contacts opened with an etching paste or the like and may be formed by sputtering or the like, or may be formed by a screen printing method. In the case of using the screen printing method, a conductive silver paste containing a glass frit or the like is printed and dried at two places of the antireflection film and the passivation film 108 so as to be connected to the emitter layer 104 and the BSF layer 106 after baking. . By baking these conductive silver pastes, an electrode 109 connected to the emitter layer 104 and an electrode 110 connected to the BSF layer 106 are formed through the antireflection film / passivation film 107 and 108, respectively. Is done. The electrodes 109 and 110 are composed of a bus bar electrode for extracting a photo-generated current generated in the back electrode type solar cell 100 to the outside, and a current collecting finger electrode connected to the bus bar electrode (illustrated in the drawing). Omitted).

  In the back electrode type solar cell having the structure shown in FIG. 1, if the adjacent length of the emitter layer, which is the p-type diffusion layer, and the BSF layer, which is the n-type diffusion layer, is long in the entire back surface, the operating state, that is, When a voltage is applied in the direction, a leak current easily flows due to a tunnel effect or via an impurity level, and it is difficult to increase conversion efficiency.

  Further, when the emitter layer and the BSF layer are adjacent to each other, when an electrode is formed on one layer, the formation position is shifted and the electrode is connected to the other layer, so that the parallel resistance may be reduced. The occurrence of this problem is particularly remarkable when an electrode is formed on a BSF layer generally formed with a smaller width than the emitter layer.

  These problems can be avoided by forming the emitter layer and the BSF layer at regular intervals over the back surface. At this time, it is desirable that the distance between the emitter layer and the BSF layer is appropriately small. However, if the interval is controlled in the order of several μm to several tens of μm, the manufacturing cost is high and the productivity is low, so that it is not realistic. On the other hand, if the interval is increased to the order of several hundreds of μm, the area of the emitter layer must be relatively reduced, thereby decreasing the minority carrier collection efficiency and decreasing the current. That is, the conversion efficiency deteriorates.

  Therefore, a method has been proposed in which a trench is dug between the emitter layer and the BSF layer by a laser or the like to spatially separate the two layers (see Patent Document 1 and Non-Patent Document 1). However, such processing involves the risk of damaging the semiconductor substrate body and lowering the conversion efficiency, and also increases the manufacturing cost due to the additional processing steps. In addition, if a part where the separation of both layers is incomplete and the part is not separated remains, when a voltage in the opposite direction is applied to the solar battery cell, the leak current concentrates on the part where the separation is not performed. For example, when a solar cell is modularized and a part of the module is shadowed, a voltage in the opposite direction is applied to the solar cell located at the shadow, and leakage current is concentrated. In such a place where the leak current is concentrated, there is a danger of ignition due to a local high temperature.

  To eliminate such dangers, manufacturers of solar cells and modules incorporate a bypass diode inside the module and measure the cell leakage current when a reverse voltage is applied. We are taking measures to not ship it as a product. However, in the back electrode type solar cell, the boundary between the emitter layer, which is a p-type diffusion layer, and the BSF layer, which is an n-type diffusion layer, is much longer than that of a general solar cell. Difficult to clear. For this reason, there is a problem in that if the standard value is strictly applied with emphasis on performance and safety, the yield will deteriorate, and if the yield is emphasized, the performance and safety will decrease.

JP-T-2013-521645 Gazette

Ngwe Zin et al., “LASER-ASSISTED SHUNT REMOVAL ON HIGH-EFFICIENCY SILICON SOLAR CELLS,” 27th European Photovoltaic Solar Energy Conference and Exhibition

  The present invention has been made in order to solve the above-described problems, and is a back electrode type high photoelectric conversion efficiency solar cell which can be easily, inexpensively, and manufactured with a high yield, a method for manufacturing the same, a solar cell module, and a solar power generation. The purpose is to provide a system.

  (1) A high photoelectric conversion efficiency solar cell according to the present invention includes a first conductive type diffusion layer in which a first conductive type impurity is diffused, The semiconductor device includes a second conductivity type diffusion layer in which a conductivity type impurity is diffused, and a high resistance layer or an intrinsic semiconductor layer formed between the first conductivity type diffusion layer and the second conductivity type diffusion layer. (2) At this time, one of the first electrode connected to the first conductivity type diffusion layer and the second electrode connected to the second conductivity type diffusion layer is also connected to the high resistance layer or the intrinsic semiconductor layer. May be.

  As described above, since the first conductive type diffusion layer and the second conductive type diffusion layer corresponding to the BSF layer and the emitter layer have a simple structure separated only by the high-resistance layer or the intrinsic semiconductor layer, they can be easily manufactured at low cost. And can be manufactured with good yield. In addition, when the emitter layer and the BSF layer are separated by a high-resistance layer or an intrinsic semiconductor layer, the leakage current is cut off and the parallel resistance does not decrease in the operating state, that is, when a voltage is applied in the forward direction. An efficient back electrode type solar cell can be obtained. In addition, when a voltage is applied in the opposite direction, the current leaks uniformly in the plane of the cell, so that the cell does not become locally hot and no fatal damage such as ignition occurs, thereby reducing reliability. Increase. Further, when an electrode is formed on the emitter layer or the BSF layer, even if the formation position is shifted, the electrode is only connected to the high resistance layer or the intrinsic semiconductor layer, so that a decrease in parallel resistance can be prevented.

  (3) A step is formed on the back surface of the semiconductor substrate, and when the back surface is viewed from above, one of the first conductivity type diffusion layer and the second conductivity type diffusion layer is formed on the upper stage, and the other is formed on the lower stage, thereby providing high resistance. A layer or an intrinsic semiconductor layer may be formed in an upper stage. This makes it difficult to connect to the upper stage when forming the electrode, particularly when forming the electrode by fire-through in one of the lower conductive type diffusion layers, so that a high resistance layer or an intrinsic semiconductor layer is formed near the upper end of the upper stage. This makes it more difficult to connect to the other conductivity type diffusion layer.

  (4) When the back surface is viewed from above, the high-resistance layer or the intrinsic semiconductor layer may be formed, for example, with a width separating the first conductivity type diffusion layer and the second conductivity type diffusion layer at an interval of 1 μm or more and 100 μm or less. . Thereby, the effect of improving the conversion efficiency by blocking the leakage current can be obtained more reliably.

  (5) The high resistance layer can be easily formed by, for example, diffusing both the first conductivity type impurity and the second conductivity type impurity.

  (6) The method for manufacturing a solar cell with high photoelectric conversion efficiency according to the present invention is characterized in that the first conductivity type semiconductor substrate including the first to third regions has a second conductivity type in a first region on a back surface which is a non-light receiving surface of the semiconductor substrate. Forming a second conductivity type diffusion layer in which impurities of the first conductivity type are diffused, forming a first conductivity type diffusion layer in which the first conductivity type impurities are diffused in the second region, and forming a first conductivity type diffusion layer between the first region and the second region. Forming a high-resistance layer in which an impurity of the first conductivity type and an impurity of the second conductivity type are diffused in the third region, wherein the solar cell has a high photoelectric conversion efficiency. A second impurity diffusion step of diffusing an impurity of the second conductivity type to form a second conductivity type diffusion layer, a protection film forming step of forming a protection film in the second conductivity type diffusion layer, and a third region of the protection film From the boundary with the portion covering the first region to the boundary with the portion covering the second region. A first protective film removing step of continuously reducing the thickness of the formed protective film to substantially zero and removing a portion covering the second region of the protective film; and a second conductive type exposed by removing the protective film. A second conductivity type diffusion layer removing step of exposing the second region by removing the diffusion layer; and a first conductivity type diffusion layer is provided between the second region and the third region through a portion where the protective film is continuously thinned. By diffusing the impurities, a first impurity diffusion step of forming a first conductivity type diffusion layer and a high resistance layer, respectively, and a second protective film removing step of removing the remaining protective film are performed.

  (7) Another method for manufacturing a solar cell with high photoelectric conversion efficiency according to the present invention is directed to a method of manufacturing a solar cell including a first region from a third region to a third region. Forming a second conductivity type diffusion layer in which a conductivity type impurity is diffused, forming a first conductivity type diffusion layer in which a first conductivity type impurity is diffused in a second region, and forming a first region and a second region; Forming a high-resistance layer in which impurities of the first conductivity type and impurities of the second conductivity type are diffused in a third region between the first region and the second region. A first impurity diffusion step of forming a first conductivity type diffusion layer by diffusing a first conductivity type impurity over the entire surface; a protection film formation step of forming a protection film on the first conductivity type diffusion layer; The thickness of the portion covering the three regions is changed from the boundary with the portion covering the first region to the boundary with the portion covering the second region. A first protective film removing step of continuously reducing the thickness of the protective film so as to become substantially zero and removing a portion covering the second region of the protective film; A first conductivity type diffusion layer removing step of removing the conductivity type diffusion layer to expose the second region; and a second conductivity type removal layer including a second region and a third region through a portion where the protective film is continuously thinned. A second impurity diffusion step of forming a second conductivity type diffusion layer and a high resistance layer, respectively, and a second protection film removing step of removing the remaining protection film are performed by diffusing the impurity of the mold type.

  The solar cell manufactured by these manufacturing methods has a high-resistance layer or an intrinsic layer that can be easily formed with high yield between the second conductivity type diffusion layer as the emitter layer and the first conductivity type diffusion layer as the BSF layer. By separating the semiconductor layers, in the operating state, that is, when a voltage is applied in the forward direction, the leakage current is cut off and the parallel resistance does not decrease, so that a solar cell with high conversion efficiency can be obtained. In addition, when a voltage is applied in the opposite direction, the current leaks uniformly in the plane of the cell, so that the cell does not become locally hot and no fatal damage such as ignition occurs, thereby reducing reliability. Increase. Further, when an electrode is formed on the emitter layer or the BSF layer, even if the formation position is shifted, the electrode is only connected to the high resistance layer or the intrinsic semiconductor layer, so that a decrease in parallel resistance can be prevented.

  (8) The removal and thinning of the protective film in the first protective film removing step can be performed, for example, by applying an etching paste to a portion covering the second region of the protective film or irradiating a laser. By applying the etching paste or irradiating the laser to the portion covering the second region, the energy of the etchant or laser flowing out of the etching paste propagates to the portion covering the third region adjacent to the second region. The energy that reaches from the farthest propagation position to the boundary between the third region and the second region continuously increases. Therefore, not only can the protective film in the second region be removed, but also the protective film in the third region can be partially removed so as to be continuously thinned from the film thickness to almost zero.

  (9) The protective film may be a silicon oxide film, a silicon nitride film, an impurity-containing glass layer, or a laminate of two or more of these. Therefore, for example, by leaving the glass layer formed at the time of impurity diffusion as it is and using it as a protective film, the step of removing the glass layer can be omitted, and the manufacturing can be performed more easily and economically.

  (10) A solar cell module may be configured by connecting a plurality of high photoelectric conversion efficiency solar cells of the present invention.

  (11) A solar power generation system may be configured using a solar cell module configured by connecting a plurality of solar cells of the present invention.

It is a figure showing an example of the composition of the conventional back electrode type solar cell. It is a figure showing composition of a back electrode type solar cell of the present invention. It is a flow figure showing the manufacturing method of the back electrode type solar cell of the present invention. It is another figure which shows the structure of the back electrode type solar cell of this invention. It is another flowchart which shows the manufacturing method of the back electrode type solar cell of this invention. It is a schematic diagram showing the example of composition of the solar cell module constituted using the back electrode type solar cell of the present invention. FIG. 7 is a schematic diagram illustrating a configuration example of a back surface of the solar cell module illustrated in FIG. 6. FIG. 7 is a schematic diagram illustrating a configuration example of a cross section of the solar cell module illustrated in FIG. 6. It is the schematic which shows the example of a structure of the solar power generation system comprised using the solar cell module shown in FIG.

  Hereinafter, embodiments of the present invention will be described. The same reference numerals are given to the common components in each drawing including the drawings used for explaining the background art.

[First Embodiment]
FIG. 2A shows the configuration of the back electrode type solar cell 200 according to the present invention. The back electrode type solar cell 200 includes a semiconductor substrate 101, an emitter layer 104, a BSF layer 106, antireflection / passivation films 107 and 108, electrodes 109 and 110, and a high resistance layer 202. The back electrode type solar cell 200 is obtained by forming the high resistance layer 202 between the emitter layer 104 and the BSF layer 106 of the conventional back electrode type solar cell 100 shown in FIG. Hereinafter, the manufacturing process of the back electrode type solar cell 200 will be described with reference to FIG.

  The semiconductor substrate 101 is a main material of the back electrode type solar cell 200 and is made of single crystal silicon, polycrystalline silicon, or the like. Either the p-type or the n-type may be used, but here, an n-type silicon substrate containing an impurity such as phosphorus and having a specific resistance of 0.1 to 4.0 Ω · cm will be described as an example. The semiconductor substrate 101 is preferably a plate having a size of 100 to 150 mm square and a thickness of 0.05 to 0.30 mm. One main surface is a light receiving surface, and the other main surface is a non-light receiving surface ( Back).

  Prior to manufacturing the back electrode type solar cell 200, the semiconductor substrate 101 is immersed in an acidic solution or the like to perform a damage etch, and the surface damage due to slicing or the like is removed, followed by washing and drying.

The emitter layer 104 is formed on the back surface of the semiconductor substrate 101 after the damage etching (S1). First, a protective film 102 such as a silicon oxide film is formed on the entire surface of the semiconductor substrate 101 (S1-1). Specifically, for example, a silicon oxide film having a thickness of about 30 to 300 nm is formed by a thermal oxidation method in which the semiconductor substrate 101 is placed at a high temperature of 800 to 1100 ° C. in an oxygen atmosphere. Subsequently, a resist paste is applied by screen printing to a portion of the protective film 102 covering a region other than the region where the emitter layer 104 is to be formed on the back surface of the semiconductor substrate 101 and cured (S1-2). Subsequently, the protective film 102 covering the region for forming the emitter layer 104 is removed by immersion in a hydrofluoric acid aqueous solution (S1-3), and the resist paste 103 is further removed by immersion in acetone or the like (S1-4). Subsequently, in the region where the protective film 102 has been removed, a p-type impurity element is diffused by, for example, a thermal diffusion method to form an emitter layer 104 and a glass layer 105 which are p-type diffusion layers (S1-5). Specifically, for example, by setting the semiconductor substrate 101 in a high-temperature gas of 800 to 1100 ° C. including BBr ₃ , boron is diffused in a portion where the protective film 102 is not formed, and the sheet resistance is 20 to 300 Ω. An emitter layer 104 and a glass layer 105 of about / □ are formed. Subsequently, the remaining protective film 102 and glass layer 105 are removed by dipping in a chemical such as a diluted hydrofluoric acid solution, and washed with pure water (S1-6). Thus, an emitter layer 104 in which a p-type impurity is diffused is formed at a desired position on the back surface of the semiconductor substrate 101.

  Next, the BSF layer 106 and the high-resistance layer 202 are formed on the back surface of the semiconductor substrate 101 as follows (S2).

  A protective film 102 such as a silicon oxide film is formed on the entire surface of the semiconductor substrate 101 on which the emitter layer 104 is formed (S2-1). Specifically, for example, a silicon oxide film having a thickness of about 30 to 300 nm is formed by a thermal oxidation method in which the semiconductor substrate 101 is placed at a high temperature of 800 to 1100 ° C. in an oxygen atmosphere.

  Subsequently, an etching paste 201 for etching the protective film 102 is applied by screen printing to a portion of the protective film 102 for protecting a region where the emitter layer 104 is not formed on the back surface of the semiconductor substrate 101, and is heated and dried (S2). -2).

  At this time, the etchant oozes from the printed portion immediately after printing and during heating. Therefore, when the etching paste 201 is removed by immersing the semiconductor substrate 101 on which the etching paste 201 is coated in an aqueous potassium hydroxide solution or the like, the thickness of the protective film 102 where the etching paste 201 is printed becomes almost zero. In addition, the thickness of the protective film 102 on the emitter layer 104 adjacent to the location where the etching paste 201 is printed is continuously reduced from the film thickness (S2-3). That is, the amount of the etchant gradually increases from the farthest position on the emitter layer 104 where the etchant oozing out from the printed portion reaches to the position where the etching paste 201 is applied. It is possible to form a portion that becomes continuously thinner until the thickness of the film 102 becomes substantially zero from the film thickness.

Subsequently, the n-type impurity element is diffused, for example, by a thermal diffusion method in a portion where the thickness of the protective film 102 becomes substantially zero and a portion where the thickness of the protective film 102 becomes thin continuously by removing the etching paste 201. Specifically, for example, the semiconductor substrate 101 is placed in a high-temperature gas at 850 to 1100 ° C. containing POCl ₃ or the like. As a result, the BSF layer 106 and the glass layer 105, which are n-type diffusion layers having a sheet resistance of about 30 to 300 Ω / □, are formed at locations where the thickness of the protective film 102 is substantially zero. At the same time, where the thickness of the protective film 106 is continuously reduced, boron diffused in advance for forming the emitter layer 104 and phosphorus diffused through the thinned protective film 102 are used. A mixed high resistance layer 202 is formed (S2-4). It is difficult to measure the sheet resistance of the high resistance layer 202 formed in this manner accurately, and depending on the degree of mixing of impurities, the sheet resistance is several hundred to several thousand Ω / □ or more. It is estimated to be.

  The width of the high resistance layer 202 formed between the emitter layer 104 and the BSF layer 106 can be controlled by changing the viscosity of the etching paste 201 and adjusting the amount of bleeding. The width of the high resistance layer 202 is at least 1 μm from the viewpoint of preventing a leak current from flowing between the emitter layer 104 and the BSF layer 106 and absorbing the displacement of the electrode formation position, From the viewpoint of securing the minimum necessary area required for the emitter layer 104, the thickness is preferably 100 μm or less.

  Subsequently, the remaining protective film 102 and glass layer 105 are removed by immersion in a chemical such as a diluted hydrofluoric acid solution, and washed with pure water (S2-5). Thus, a BSF layer 106 in which an n-type impurity is diffused is formed in a region of the back surface of the semiconductor substrate 101 where the emitter layer 104 is not formed, and an n-type impurity is formed between the emitter layer 104 and the BSF layer 106. A high resistance layer 202 in which both impurities and p-type impurities are diffused is formed.

  Subsequently, an uneven structure called texture is formed on the light receiving surface of the semiconductor substrate 101 (S3). The texture can be formed by immersing the semiconductor substrate 101 in an acidic or alkaline solution for a certain time. For example, it is formed by applying and curing a resist paste on the entire back surface of the semiconductor substrate 101 by screen printing, then chemically etching with a potassium hydroxide aqueous solution or the like, and washing and drying. By forming the texture, light incident from the light receiving surface is confined by multiple reflection in the semiconductor substrate 101, so that the reflectance can be effectively reduced and the conversion efficiency can be improved. After that, the resist paste applied to the entire back surface of the semiconductor substrate 101 is removed by dipping in acetone or the like. The texture may be applied before forming the emitter layer 104 and the BSF layer 106. Also, a texture may be formed on the back surface of the semiconductor substrate 101. In addition, a front surface field (FSF) layer may be further formed on the light receiving surface of the semiconductor substrate 101.

  Subsequently, antireflection films and passivation films 107 and 108 made of SiN (silicon nitride) or the like are formed on both surfaces of the semiconductor substrate 101 (S4). In the case of a silicon nitride film, the film is formed by, for example, a plasma CVD method in which a mixed gas of SiH4 and NH3 is diluted with N2, turned into plasma by glow discharge decomposition, and deposited. At the time of formation, it is formed so that the refractive index is about 1.8 to 2.3 and the thickness is about 50 to 100 nm in consideration of the refractive index difference from the semiconductor substrate 101 and the like. This film has a function of preventing light from being reflected on the surface of the semiconductor substrate 101 and effectively taking light into the semiconductor substrate 101, and also functions as a passivation film having a passivation effect on the n-type diffusion layer. In addition, the effect of improving the electrical characteristics of the solar cell is obtained. Note that the antireflection film / passivation film 107, 108 may be a single-layer film of silicon oxide, silicon carbide, amorphous silicon, aluminum oxide, titanium oxide, or the like, or a stacked film combining these. Further, different films may be used for the light receiving surface and the back surface of the semiconductor substrate 101.

  Subsequently, electrodes 109 and 110 are formed (S5). The electrodes may be formed by providing an opening in the anti-reflection film / passivation film 108 with an etching paste or the like, for example, by sputtering, or by a screen printing method. In the case of the screen printing method, first, for example, silver is added to each of a portion of the anti-reflection film / passivation film 108 where the electrode 109 connected to the emitter layer 104 and a portion where the electrode 110 connected to the BSF layer 106 are formed. A conductive paste including powder, glass frit and varnish is screen-printed and dried. Then, the printed conductive paste is baked at a temperature of about 500 ° C. to 950 ° C. for about 1 to 60 seconds to penetrate the anti-reflection film / passivation film 108 (fire through). As a result, the sintered silver powder conducts with the emitter layer 104 or the BSF layer 106, and electrodes 109 and 110 are formed. Note that firing at the time of forming the electrode may be performed at once or may be performed a plurality of times. Further, the conductive paste applied on the emitter layer 104 and the conductive paste applied on the BSF layer 106 may be different.

  Each electrode is composed of a bus bar electrode for taking out a photo-generated current generated in the solar cell to the outside, and a current collecting finger electrode connected to these bus bar electrodes.

  As can be understood from the above description, the high-resistance layer 202 can be formed easily, inexpensively, and with good yield. By separating the emitter layer 104 and the BSF layer 106, the leakage current is cut off and the parallel resistance does not decrease in the operating state, that is, when a voltage is applied in the forward direction. High solar cells can be obtained. In addition, when a voltage is applied in the opposite direction, the current leaks uniformly in the plane of the cell, so that the cell does not become locally hot and no fatal damage such as ignition occurs, thereby reducing reliability. Increase.

  Further, due to the presence of the high-resistance layer 202, when the electrodes 109 and 110 are formed for either one of the emitter layer 104 and the BSF layer 106, even if the formation positions are shifted, as shown in FIG. Since the connection is only made to the resistance layer 202, a decrease in the parallel resistance caused by the connection of the electrodes 109 and 110 to the other layer can be prevented.

  As described above, according to the structure and the manufacturing method of the back electrode type solar cell of the present invention, the manufacturing method of the back electrode type solar cell having the conventional structure can be easily performed at a lower number of steps than the manufacturing method of the back electrode type solar cell, inexpensively, and with good yield, A back electrode type solar cell excellent in conversion efficiency can be provided.

  The portion where the thickness of the protective film is continuously reduced can also be formed by a method of irradiating a laser instead of a method of applying an etching paste. That is, in the above embodiment, by irradiating the laser to the portion of the protective film 102 covering the region where the BSF layer 106 of the semiconductor substrate 101 is formed, energy is injected into the protective film 102 in that portion, and the energy is reduced. The light also propagates to the portion of the protective film 102 that covers the emitter layer 104 adjacent to the laser irradiation location. Since the energy propagation intensity continuously increases from the farthest arrival position of the irradiated energy to the irradiated position, a portion where the thickness of the protective film 102 is continuously reduced is formed. be able to. Note that a strong fluence laser is applied to the portion of the protective film 102 covering the region where the BSF layer 106 is formed, and a relatively weak fluence laser is applied to the portion of the protective film 102 covering the region where the high-resistance layer 202 is formed. By irradiation, the thickness of the film can be controlled more precisely.

  By employing a method of removing the protective film by laser irradiation, complicated, expensive printing, heating, and drying steps of the etching paste can be omitted. That is, in the manufacturing process of FIG. 3, the two steps of S2-2 and S2-3 can be performed in one step of irradiating a laser. Therefore, the manufacturing cost can be further reduced.

[Second embodiment]
In the manufacturing method of the first embodiment, the emitter layer is formed on a part of the back surface of the semiconductor substrate, and then the BSF layer is formed on a region of the back surface where the emitter layer is not formed. After forming the BSF layer on the entire back surface, the emitter layer at the location where the BSF layer is to be formed may be removed by alkali etching or the like, and the BSF layer may be formed at the removed location. FIG. 4A shows the configuration of the back electrode type solar cell 200 manufactured by the manufacturing method of the second embodiment, and FIG. 5 shows the manufacturing process.

  The semiconductor substrate 101 may be either n-type or p-type as in the first embodiment. Here, the case of an n-type silicon substrate will be described as an example. First, the emitter layer 104 is formed on the entire back surface as follows (S6). The protective film 102 is formed on the entire surface of the semiconductor substrate 101 after the damage etching (S6-1), and the protective film on the entire back surface is removed (S6-2). Subsequently, the emitter layer 104 and the glass layer 105 which are p-type diffusion layers are formed by diffusing a p-type impurity over the entire back surface (S6-3), and the protective film 102 and the glass layer 105 are removed (S6-4). ). Thus, the emitter layer 104 can be formed on the entire back surface of the semiconductor substrate 101.

  Next, the BSF layer 106 and the high-resistance layer 202 are formed on the back surface of the semiconductor substrate 101 as follows (S7). First, the protective films 102 are formed on both surfaces of the semiconductor substrate 101 on which the emitter layer 104 is formed on the entire back surface (S7-1).

  Subsequently, the etching paste 201 is applied to the portion of the protective film 102 covering the region where the BSF layer 106 is to be formed by screen printing, heated and dried (S7-2). At this time, the etchant oozes from the printed portion immediately after printing and during heating.

  Therefore, when the etching paste 201 is removed by immersing the semiconductor substrate 101 on which the etching paste 201 is coated in an aqueous potassium hydroxide solution or the like, the thickness of the protective film 102 where the etching paste 201 is printed becomes almost zero. In addition, the thickness of the protective film 102 on the emitter layer 104 adjacent to the location where the etching paste 201 is printed is also continuously reduced from the film thickness (S7-3). That is, the amount of the etchant gradually increases from the farthest position on the emitter layer 104 where the etchant oozing out from the printed portion reaches to the position where the etching paste 201 is applied. It is possible to form a portion that becomes continuously thinner until the thickness of the film 102 becomes substantially zero from the film thickness.

  Subsequently, the emitter layer 104 formed in the region of the semiconductor substrate 101 where the BSF layer 106 is to be formed is removed by alkali etching or the like (S7-4). Subsequently, an n-type impurity is diffused in a region of the semiconductor substrate 101 where the emitter layer 104 has been removed and a portion where the protective film 102 is continuously thinned, for example, by a thermal diffusion method. As a result, the BSF layer 106 and the glass layer 105, which are n-type diffusion layers, are formed in the region where the emitter layer 104 has been removed. At the same time, in a portion where the protective film 106 is continuously thinned, boron diffused in advance for forming the emitter layer 104 and phosphorus diffused through the thinned protective film 102 are mixed. The high resistance layer 202 is formed (S7-5). Subsequently, the remaining protective film 102 and glass layer 105 are removed (S7-6). Thus, a BSF layer 106 in which an n-type impurity is diffused is formed in a region of the back surface of the semiconductor substrate 101 where the emitter layer 104 is not formed, and an n-type impurity is formed between the emitter layer 104 and the BSF layer 106. A high resistance layer 202 in which both impurities and p-type impurities are diffused is formed.

  According to the method of the second embodiment, since a step of patterning a resist for partially forming an emitter layer is not required, the number of steps can be reduced as compared with the method of the first embodiment, and the manufacturing cost is further reduced. be able to.

  Further, in this method, after the emitter layer is once formed on the entire surface of the semiconductor substrate and the emitter layer in the portion where the BSF layer is to be formed is removed, as shown in FIG. A step is generated between a region where the BSF layer is formed and a region where the BSF layer is not removed (that is, a region where the emitter layer and the high resistance layer are formed). Specifically, when the back surface is viewed from above, an emitter layer and a high resistance layer are formed in an upper stage, and a BSF layer is formed in a lower stage adjacent to the high resistance layer. Since the step is formed in this way, it is difficult to connect to the upper stage when forming the electrode, particularly when forming the electrode by fire-through in the lower BSF layer. Combined with the formation of the high resistance layer, it becomes more difficult to connect to the emitter layer (see FIG. 4B).

Here, the method of forming the emitter layer once on the entire back surface of the semiconductor substrate, removing the emitter layer where the BSF layer is to be formed, and forming the BSF layer on the removed portion has been exemplified. After once forming the entire back surface of the semiconductor substrate, the BSF layer where the emitter layer is to be formed may be removed, and the emitter layer may be formed in the removed place. In this case, when the back surface is viewed from above, the BSF layer and the high resistance layer are formed in the upper stage, and the emitter layer is formed in the lower stage adjacent to the high resistance layer.
(Modification)

  In each of the above embodiments, the semiconductor substrate is an n-type silicon substrate. However, when the semiconductor substrate is a p-type silicon substrate, it is preferable that the emitter layer is an n-type diffusion layer and the BSF layer is a p-type diffusion layer.

  In each of the above embodiments, the case where the high-resistance layer is formed between the emitter layer and the BSF layer has been exemplified. However, an intrinsic semiconductor layer may be provided instead of the high-resistance layer. Since the intrinsic semiconductor has a very low carrier density, leakage current can be prevented from flowing between the emitter layer and the BSF layer, as in the case where the high resistance layer is provided. In addition, due to the presence of the intrinsic semiconductor layer, when an electrode for one of the emitter layer and the BSF layer is formed, the electrode is connected to the intrinsic semiconductor layer even if the formation position is shifted. , It is possible to prevent a decrease in the parallel resistance caused by the connection.

  In each of the above embodiments, the case where the protective film is a silicon oxide film is exemplified. However, the protective film is not necessarily a silicon oxide film. For example, a silicon nitride film or a glass containing impurities formed during preliminary diffusion may be used. It may be a layer or a laminate thereof. When the protective film is a silicon nitride film, for example, if it is formed by a plasma CVD method, it is not necessary to apply a high temperature. Therefore, it is possible to prevent a lifetime killer contamination caused by applying a high temperature. Further, if the glass layer formed at the time of impurity diffusion is used as it is as a protective film, the step of forming the protective film can be omitted, so that the manufacturing cost can be further reduced.

  The back electrode type solar cell manufactured according to each of the above embodiments can be used for a solar cell module. FIG. 6 is a schematic diagram illustrating a configuration example of the solar cell module 300. The solar cell module 300 has a structure in which a plurality of back electrode type solar cells 200 are tiled. A plurality of back-to-back electrode type solar cells 200 are electrically connected in series to several to several tens of cells adjacent to each other to form a series circuit called a string. An overview of the string is shown in FIG. FIG. 7 corresponds to a schematic diagram of the inner back surface side of the solar cell module 300 that is not normally visible. In FIG. 7, illustration of fingers and bus bars is omitted for clarity of description. In order to form a series circuit, the P bus bar and the N bus bar of the back electrode type solar cell 200 adjacent to each other are connected by a lead wire 320. FIG. 8 shows a schematic cross-sectional view of the solar cell module 300. As described above, the string is configured by connecting the plurality of back electrode type solar cells 200 to the bus bar 310 and the lead wire 320. The string is usually sealed with a translucent filler 330 such as EVA (ethylene vinyl acetate), the non-light-receiving surface (back surface) side is a weather-resistant resin film 340 such as PET (polyethylene terephthalate), and the light-receiving surface is soda. It is covered with a light-receiving surface protection material 350 such as lime glass which is transparent and has high mechanical strength. As the filler 330, besides EVA, polyolefin, silicone, or the like can be used.

  Furthermore, a solar power generation system can be configured by connecting a plurality of solar cell modules. FIG. 9 is a schematic diagram illustrating a configuration example of a photovoltaic power generation system 400 in which a plurality of solar cell modules 300 configured by a plurality of back electrode type solar cells 200 of the present invention are connected. In the photovoltaic power generation system 400, a plurality of solar cell modules 300 are connected in series by a wiring 410, and supply generated power to an external load circuit 430 via an inverter 420. Although not shown in FIG. 9, the solar power generation system may further include a secondary battery that stores the generated power.

  In addition, the present invention is not limited to the above-described embodiments and modified examples. The embodiments are exemplifications, and have substantially the same configuration as the technical idea described in the claims of the present invention, and those having the same function and effect are those with any modifications. Are also included in the technical scope of the present invention.

  The effects of the present invention were evaluated using products manufactured by the methods shown in the following Comparative Examples and Examples.

  An n-type silicon substrate made of n-type single crystal silicon doped with phosphorus and sliced to a thickness of 0.2 mm and having a specific resistance of about 1 Ω · cm is prepared. Square plate shape. Then, the substrate was immersed in a hydrofluoric / nitric acid solution for 15 seconds to perform damage etching, and then washed with pure water and dried.

<Comparative Example 1>
In Comparative Example 1, a back contact solar cell was manufactured by a conventional method. Specifically, after performing the following steps, first and second common steps described later were performed.

The n-type silicon substrate after the damage etching was thermally oxidized in an oxygen atmosphere at a temperature of 1000 ° C. for 120 minutes to form a silicon oxide film with a thickness of 70 nm on both surfaces of the substrate. Then, a resist paste was screen-printed on a portion of the silicon oxide film formed on the back surface of the substrate where the BSF layer was to be formed, and heated at a temperature of 100 ° C. to be dried. Here, a screen printing plate was formed in such a pattern that the emitter layer was 800 μm in width and the BSF layer was 200 μm in width, and the emitter layer and the BSF layer were alternately formed so as to have a structure of an Interdigitated Back Contact cell. As the resist paste, 185 paste manufactured by LEKTRACHEM was used. The substrate is immersed in a 2% hydrofluoric acid aqueous solution to partially remove the silicon oxide film except for the portion where the BSF layer is to be formed, and then immersed in acetone to remove the resist paste. It was washed with pure water and dried. Next, the back surface of the substrate is subjected to a thermal diffusion process in a BBr ₃ gas atmosphere at a temperature of 900 ° C. for 20 minutes, so that a p-type diffusion layer serving as an emitter layer and a glass layer are formed on the back surface of the substrate. Was formed. The sheet resistance of the formed p-type diffusion layer was about 70 Ω / □, and the diffusion depth was 0.5 μm. Thereafter, the substrate was immersed in a 25% hydrofluoric acid aqueous solution, washed with pure water and dried to remove the silicon oxide film and the glass layer.

  The substrate on which the emitter layer was formed as described above was thermally oxidized in an oxygen atmosphere at a temperature of 1000 ° C. for 120 minutes to form a silicon oxide film with a thickness of 70 nm on both surfaces of the substrate. Then, a resist paste was screen-printed on a portion of the silicon oxide film formed on the back surface of the substrate where the emitter layer was formed, and heated and dried at a temperature of 100 ° C. Here, 185 paste manufactured by LEKTRACHEM was used as the resist paste. The substrate was immersed in a 2% hydrofluoric acid aqueous solution to partially remove the silicon oxide film except on the portion where the emitter layer was formed, and then immersed in acetone to remove the resist paste.

<Example 1>
In Example 1, a back electrode type solar cell was manufactured by the method of the first embodiment. Specifically, after performing the following steps, first and second common steps described later were performed.

  The substrate on which the emitter layer was formed as in Comparative Example 1 was thermally oxidized in an oxygen atmosphere at a temperature of 1000 ° C. for 120 minutes to form a silicon oxide film with a thickness of 70 nm on both surfaces of the substrate. . Then, an etching paste was screen-printed on a portion of the silicon oxide film formed on the back surface of the substrate where a BSF layer was to be formed where the emitter layer was not formed, and heated at a temperature of 300 ° C. to be dried. Here, SolarEtch (registered trademark) BES Type10 paste manufactured by Merck was used as the etching paste. Then, the substrate was immersed in a solution containing 1% potassium hydroxide to remove the etching paste. By this method, the silicon oxide film was removed immediately below the printing of the etching paste, that is, the portion where the BSF layer where the emitter layer was not formed was to be formed, and the film thickness became almost 0 nm. Further, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm from the printed portion to 30 μm at both ends by the etchant oozing from the printed etching paste.

<Example 2>
In Example 2, a back electrode type solar cell was manufactured by the method of the second embodiment. Specifically, after performing the following steps, first and second common steps described later were performed.
The entire back surface of the n-type silicon substrate after the damage etching is subjected to a thermal diffusion treatment in a BBr ₃ gas atmosphere at a temperature of 900 ° C. for 20 minutes to thereby remove the p-type diffusion layer and the glass layer as the emitter layers. Formed. The sheet resistance of the formed p-type diffusion layer was about 70 Ω / □, and the diffusion depth was 0.5 μm. The substrate was immersed in a 25% hydrofluoric acid aqueous solution, washed with pure water, and dried to remove the glass layer. The substrate from which the glass layer had been removed was thermally oxidized in an oxygen atmosphere at a temperature of 1000 ° C. for 120 minutes to form a silicon oxide film with a thickness of 70 nm on both surfaces of the substrate. Then, an etching paste was screen-printed on a portion of the silicon oxide film formed on the back surface of the substrate where the BSF layer was to be formed, and heated and dried at a temperature of 300 ° C. Here, SolarEtch (registered trademark) BES Type10 paste manufactured by Merck was used as the etching paste. Then, the substrate was immersed in a solution containing 1% potassium hydroxide to remove the etching paste. The substrate is immersed in a 70 ° C. solution containing 25% potassium hydroxide at 70 ° C. for 5 minutes to remove the p-type diffusion layer remaining at the portion where the BSF layer is to be formed by chemical etching, and then washed with pure water. Let dry. By this method, the thickness of the silicon oxide film was 0 nm immediately below the etching paste printed, that is, the portion where the BSF layer was formed, and was lower than the portion where the emitter layer was formed, and a step was formed. Further, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm over the both ends 30 μm from the printed portion of the etching paste due to the etchant oozing out of the etching paste after printing.

<Example 3>
In Example 3, in the step of removing the protective film of the second embodiment, a method of irradiating a laser instead of applying an etching paste was used to manufacture a back electrode type solar cell. Specifically, after performing the following steps, first and second common steps described later were performed.

The entire back surface of the n-type silicon substrate after the damage etching is subjected to a thermal diffusion treatment at a temperature of 900 ° C. for 20 minutes in a BBr ₃ gas atmosphere, so that the p-type diffusion layer and the glass layer as the emitter layers are removed. Formed. The sheet resistance of the formed p-type diffusion layer was about 70 Ω / □, and the diffusion depth was 0.5 μm. The substrate was immersed in a 25% hydrofluoric acid aqueous solution, washed with pure water, and dried to remove the glass layer. The substrate from which the glass layer was removed was thermally oxidized in an oxygen atmosphere at a temperature of 1000 ° C. for 120 minutes to form a silicon oxide film with a thickness of 70 nm on both surfaces of the substrate. Then, a laser was irradiated at a fluence of ² J / cm ² to a portion of the silicon oxide film formed on the back surface of the substrate where the BSF layer was to be formed. Here, Powerline E25 / SHG manufactured by Rofin was used as the laser irradiation equipment. The substrate after laser irradiation is immersed in a 70 ° C. solution containing 25% potassium hydroxide for 5 minutes to remove the p-type diffusion layer remaining at the position where the BSF layer is to be formed by chemical etching, and then using pure water. Washed and dried. By this method, the portion immediately below the laser irradiation, that is, the portion where the BSF layer is to be formed, has a silicon oxide film thickness of 0 nm, is lower than the portion where the emitter layer is formed, and a step is formed. In addition, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm over the both ends 30 μm from the laser irradiation part due to the energy transmitted from immediately below the laser irradiation part.

<Comparative Example 2>
Comparative Example 2 is the same as Example 3 except that the laser was irradiated at a fluence of 0.6 J / cm ² . As a result of the laser irradiation, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm over both ends 0.5 μm from the laser irradiated portion due to energy propagated from immediately below the laser irradiated portion.

<Example 4>
Example 4 is the same as Example 3 except that the laser was irradiated at a fluence of 0.9 J / cm ² . As a result of the laser irradiation, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm over the both ends 1 μm from the laser irradiated portion due to energy propagated from immediately below the laser irradiated portion.

<Example 5>
Example 5 is the same as Example 3 except that the laser was irradiated at a fluence of 4 J / cm ² . As a result of the laser irradiation, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm over 100 μm at both ends from the laser irradiated portion due to the energy transmitted from immediately below the laser irradiated portion.

<Comparative Example 3>
Comparative Example 3 is the same as Example 3 except that the laser was irradiated at a fluence of 5.5 J / cm ² . As a result of the laser irradiation, the thickness of the silicon oxide film on the emitter layer was continuously reduced from 70 nm to 0 nm over 150 μm at both ends from the laser irradiated portion due to the energy transmitted from immediately below the laser irradiated portion.

<Example 6>
Example 6 is the same as Example 2 except that a silicon oxide film was formed without removing the glass layer after forming the emitter layer. Specifically, after performing the following steps, first and second common steps described later were performed.

The entire back surface of the n-type silicon substrate after the damage etching is subjected to a thermal diffusion process in a BBr ₃ gas atmosphere at a temperature of 900 ° C. for 20 minutes, so that a p-type diffusion layer serving as an emitter layer is formed on the back surface of the substrate. And a glass layer was formed. After that, the silicon oxide film is further formed on the glass layer by continuously oxidizing at a temperature of 1000 ° C. for 120 minutes without replacing the gas from the heating furnace and replacing the gas with an oxygen atmosphere. did. The formed p-type diffusion layer had a sheet resistance of about 80 Ω / □ and a diffusion depth of 1.0 μm, and was formed as a laminate of a glass layer and a silicon oxide film serving as a protective film with a total thickness of 100 nm. Then, an etching paste was screen-printed on a portion of the laminate of the glass layer and the silicon oxide film formed on the back surface of the substrate where the BSF layer was to be formed, and dried by heating at a temperature of 300 ° C. Here, SolarEtch (registered trademark) BES Type10 paste manufactured by Merck was used as the etching paste. Then, the substrate was immersed in a solution containing 1% potassium hydroxide to remove the etching paste. This substrate is immersed in a 70 ° C. solution containing 25% potassium hydroxide for 5 minutes to remove the p-type diffusion layer remaining at the position where the BSF layer is to be formed by chemical etching, followed by washing with pure water, Let dry. According to this method, the thickness of the laminated body of the glass layer and the silicon oxide film was 0 nm immediately below the portion where the etching paste was printed, that is, the portion where the BSF layer was formed was further lower than the portion where the emitter layer was formed, and a step was formed. . Further, the thickness of the laminated body of the glass layer and the silicon oxide film on the emitter layer is continuously changed from 100 nm to 0 nm over the both ends 30 μm from the printed portion of the etching paste by the etchant oozing from the etching paste after printing. It has become thin.

<First common process>
By subjecting the back surface of each substrate obtained through the steps shown in the above Comparative Examples 1 to 3 and Examples 1 to 6 to a thermal diffusion treatment in a POCl ₃ gas atmosphere at a temperature of 930 ° C. for 20 minutes. Then, phosphorus was diffused into the portion where the silicon oxide film was removed to form an n-type diffusion layer as a BSF layer and a glass layer. The sheet resistance of the formed n-type diffusion layer was about 30 Ω / □, and the diffusion depth was 0.5 μm. In each of the first to sixth embodiments, phosphorus is continuously diffused from the portion where the thickness of the silicon oxide film is reduced to the emitter layer, thereby forming a high-resistance layer in which boron and phosphorus are mixed. It is formed. Although the sheet resistance of this high resistance layer could not be measured accurately, it was 1000 Ω / □ or more. After that, these substrates were immersed in a 25% hydrofluoric acid aqueous solution, washed with pure water, and dried to remove the silicon oxide film and the glass layer.

<Example 7>
Example 7 was manufactured in the same procedure as in Example 3, except that Example 3 formed the BSF layer and the high-resistance layer after forming the emitter layer, whereas Example 7 formed the BSF layer after forming the BSF layer. The difference is that an emitter layer and a high resistance layer are formed. Specifically, after performing the following steps, a second common step described below was performed.

The entire back surface of the n-type silicon substrate after the damage etching is subjected to a thermal diffusion treatment in a POCl ₃ gas atmosphere at a temperature of 930 ° C. for 20 minutes, thereby forming an n-type diffusion layer as a BSF layer and a glass layer. Formed. The sheet resistance of the formed n-type diffusion layer was about 30 Ω / □, and the diffusion depth was 0.5 μm. Thereafter, the substrate was immersed in a 25% hydrofluoric acid aqueous solution, washed with pure water, and dried to remove the silicon oxide film and the glass layer. The substrate from which the glass layer was removed was thermally oxidized in an oxygen atmosphere at a temperature of 1000 ° C. for 120 minutes to form a silicon oxide film with a thickness of 70 nm on both surfaces of the substrate. A portion of the silicon oxide film formed on the back surface of the substrate where the emitter layer was to be formed was irradiated with a laser at a fluence of ² J / cm ² . Here, Powerline E25 / SHG manufactured by Rofin was used as the laser irradiation equipment. The substrate after the laser irradiation is immersed in a 70 ° C. solution containing 25% potassium hydroxide for 5 minutes to remove the n-type diffusion layer remaining at the position where the emitter layer is to be formed by chemical etching, and then using pure water. Washed and dried. By this method, the silicon oxide film had a thickness of 0 nm immediately below the laser irradiation, that is, the portion where the emitter layer was to be formed, and was lower than the BSF layer formation portion, so that a step was formed. In addition, the thickness of the silicon oxide film on the BSF layer was continuously reduced from 70 nm to 0 nm over both ends 30 μm from the laser irradiated portion due to the energy transmitted from directly below the laser irradiated portion. Subsequently, by performing a thermal diffusion process on the back surface of the substrate at a temperature of 930 ° C. for 20 minutes in a BBr ₃ gas atmosphere, boron is diffused into the portion where the silicon oxide film has been removed, thereby forming an emitter layer p. A mold diffusion layer and a glass layer were formed. The sheet resistance of the formed p-type diffusion layer was about 80Ω / □, and the diffusion depth was 1.0 μm. Also, boron is continuously diffused from the portion where the thickness of the silicon oxide film is reduced to the BSF layer, thereby forming a high resistance layer in which boron and phosphorus are mixed. Thereafter, the substrate was immersed in a 25% hydrofluoric acid aqueous solution, washed with pure water, and dried to remove the silicon oxide film and the glass layer.

<Second common process>
A resist paste was screen-printed on the entire back surface of each of the substrates on which the emitter layer, the BSF layer, and the high-resistance layer were formed by the steps shown in Comparative Examples 1 to 3 and Examples 1 to 7, and at a temperature of 100 ° C. Heat and dry. Here, 185 paste manufactured by LEKTRACHEM was used as the resist paste. The substrate was chemically etched with a 70 ° C. solution containing 2% potassium hydroxide and 2% IPA for 5 minutes, washed with pure water, and dried to form a texture structure on the light receiving surface of the substrate. Thereafter, the substrate was immersed in acetone to remove the resist paste.

Next, a silicon nitride film serving as an antireflection film and a passivation film having a thickness of 100 nm was formed on the light receiving surface and the back surface of the substrate by a plasma CVD method using SiH ₄ , NH ₃ , and N ₂ .

  A conductive silver paste was printed by a screen printing method on the emitter layer of the substrate subjected to the processing up to this point, and dried at 150 ° C. Then, a conductive silver paste was printed on the BSF layer of the substrate by using a screen printing method, and dried at 150 ° C. In this case, in Comparative Examples 1 and 2, a portion where the electrode was shifted from the BSF layer to the emitter layer and protruded was confirmed. On the other hand, in Examples 1 to 7, it was confirmed that the electrode was shifted and protruded on the high resistance layer between the BSF layer and the emitter layer. Here, SOL9383M manufactured by Heraeus was used as the conductive silver paste. The printed conductive paste was baked at a maximum temperature of 800 ° C. for 5 seconds to produce back electrode type solar cells according to Comparative Examples and Examples.

<Results>
The average conversion efficiency, the average short-circuit current density, the average open-circuit voltage, and the average fill factor of the back electrode type solar battery cells manufactured by the method of Comparative Examples 1 to 3 and the methods of Examples 1 to 7 are shown in Table. It is shown in FIG.

  As shown in Table 1, in the other examples having the structure of the present invention, higher values were obtained for all the characteristic values than in Comparative Example 1 having the conventional structure. However, comparing the respective characteristic values of Examples 3 to 5 and Comparative Examples 2 and 3 in which the width of the high-resistance layer is different, when the width of the high-resistance layer is smaller than 1 μm as in Comparative Example 2, the parallel resistance decreases. The fill factor cannot be completely suppressed and the fill factor decreases. Conversely, if the fill factor is larger than 100 μm as in Comparative Example 3, the short circuit current decreases due to the decrease in the area of the emitter layer, and the conversion efficiency deteriorates. Therefore, in order to obtain excellent conversion efficiency expected from the back electrode type solar cell of the present invention, it is preferable to design the high resistance layer so that the width thereof is 1 μm or more and 100 μm or less.

Reference Signs List 101 semiconductor substrate 102 protective film 103 resist paste 104 emitter layer 105 glass layer 106 BSF layer 107, 108 antireflection film / passivation film 109, 110 electrode 201 etching paste 202 high resistance layer

Claims (4)

A back surface which is a non-light receiving surface of a semiconductor substrate of the first conductivity type which is made of single crystal silicon or polycrystal silicon
A first conductivity type diffusion layer in which a first conductivity type impurity is diffused in the semiconductor substrate ;
A second conductivity type diffusion layer in which a second conductivity type impurity is diffused in the semiconductor substrate ;
A high resistance layer formed between the first conductivity type diffusion layer and the second conductivity type diffusion layer, wherein both the first conductivity type impurity and the second conductivity type impurity are diffused;
With
The high-resistance layer is characterized in that the concentration of the impurity of one conductivity type decreases from the one conductivity type diffusion layer side to the other conductivity type diffusion layer side. battery. A first electrode connected to the first conductivity type diffusion layer, and a second electrode connected to the second conductivity type diffusion layer;
2. The high photoelectric conversion efficiency solar cell according to claim 1, wherein one of the first electrode and the second electrode is also connected to the high resistance layer. 3. Having a step on the back surface,
When the back surface is viewed from above, one of the first conductivity type diffusion layer and the second conductivity type diffusion layer is provided in an upper part, and the other is provided in a lower part,
3. The high photoelectric conversion efficiency solar cell according to claim 1, wherein the high resistance layer is provided in the upper stage.   When the back surface is viewed from above, the high-resistance layer is formed with a width that separates the first conductivity type diffusion layer and the second conductivity type diffusion layer at an interval of 1 μm or more and 100 μm or less. The high photoelectric conversion efficiency solar cell according to any one of claims 1 to 3.

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