JP6666027B2 - Semiconductor device and imaging device - Google Patents

Description

  The present invention relates to a semiconductor device and an imaging device. In particular, the present invention relates to a semiconductor device having a solid-state imaging device used for a digital camera, a digital video camera, and the like, and an imaging device having the semiconductor device.

  An imaging device such as a digital camera or a digital video camera has a solid-state imaging device. As a configuration for reducing the size of an imaging device, a semiconductor device in which a solid-state imaging device and a peripheral processing circuit are formed on the same silicon substrate is used. In order to further reduce the size of the imaging device, a solid-state image sensor and a peripheral processing circuit are formed on separate silicon substrates, and a stacked image sensor, which is a semiconductor device in which each silicon substrate is stacked and mounted, has been developed. I have. As such a configuration, Patent Literature 1 discloses a configuration in which a solid-state imaging device and a peripheral processing circuit are provided by being stacked on and under a multilayer substrate.

Japanese Patent No. 3417225

  However, in a configuration in which the solid-state imaging device and the peripheral processing circuit are stacked and mounted, heat generated in the peripheral processing circuit is transmitted to the solid-state imaging device, and the generated heat may increase the generation of dark current in the solid-state imaging device. Then, noise is generated in the image captured by the solid-state imaging device, and the image quality may be degraded.

  In view of the above circumstances, an object to be solved by the present invention is to achieve both a reduction in the size of an imaging device and an improvement in the quality of a captured image.

To solve the above problems, the present invention includes a solid-state imaging device, wherein the solid-state imaging device signal processing chips stacked on, is arranged between the solid-state imaging device and the signal processing chip, a stacked together anda high second layer thermal conductivity than the first layer and the first layer, the first layer is disposed closer to the solid-Rutotomoni the second layer A portion disposed closer to the signal processing chip, the solid-state imaging device and the signal processing chip perform signal transmission by wireless communication, and the second layer has a portion where radio wave transmittance is higher than other portions. Is provided .

  According to the present invention, it is possible to reduce the size of a semiconductor device while suppressing or preventing generation of noise in an image sensor chip. For this reason, it is possible to achieve both a reduction in the size of an imaging device to which the semiconductor device is applied and an improvement in the image quality of a captured image.

FIG. 2 is a block diagram illustrating a configuration example of an imaging device. FIG. 2 is a diagram illustrating a configuration example of a semiconductor device according to the first embodiment. FIG. 6 is a diagram illustrating a configuration example of a semiconductor device according to a second embodiment;

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Configuration example of imaging device)
First, a configuration example of an imaging device 1 according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram illustrating a configuration example of an imaging device 1 according to an embodiment of the present invention. As shown in FIG. 1, the imaging apparatus 1 includes an image sensor chip 101, which is an example of a solid-state imaging device, an operation unit 208, a control unit 207, an A / D conversion unit 203, a signal processing unit 204, A system control unit 205 and an image sensor control unit 206 are provided. Note that the image sensor chip 101 and the signal processing chip 103 are included in semiconductor devices 100a and 100b described later. Then, the signal processing chip 103 functions as a control unit 207, an A / D conversion unit 203, a signal processing unit 204, an optical system control unit 205, and an image sensor control unit 206.

  The optical system 201 includes a lens group including a focus lens, an aperture, and a drive system that drives each of the lens group and the aperture. The drive system drives the lens group and the aperture according to the control of the optical system control unit 205. As a result, the amount of light and the focus of the light transmitted through the optical system 201 are adjusted, and the light is focused on the image sensor chip 101 as an optical image of the subject.

  The image sensor chip 101 converts an optical image of a subject formed by the optical system 201 into an image signal that is an analog electric signal by photoelectric conversion and outputs the image signal. For example, a CMOS solid-state imaging device is applied to the image sensor chip 101. In the image sensor chip 101, a plurality of pixels are arranged in a two-dimensional matrix. Each pixel has a photodiode, a transfer switch, a floating diffusion (FD), an amplification MOS amplifier, a selection switch, and a reset switch. Further, the image sensor chip 101 has a vertical output line (column signal line), a column amplifier, a constant current source serving as a load of the amplification MOS amplifier, a communication line, and an output amplifier. In this case, the photodiode, the amplification MOS amplifier, and the constant current source constitute a floating diffusion amplifier. Then, the electric charge of each pixel is read from the floating diffusion amplifier via a vertical output line (column signal line), amplified by the column amplifier, and sequentially output from the output terminal through the horizontal signal line and the output amplifier. Note that the configuration of the image sensor chip 101 is not limited to the above configuration. A known CMOS solid-state imaging device is applied to the image sensor chip 101.

  The A / D converter 203 converts an image signal output from the image sensor chip 101 from an analog electric signal to a digital electric signal. The signal processing unit 204 performs various types of image processing on the image signal converted into a digital electric signal. For example, the signal processing unit 204 performs various corrections such as sensor flaw correction and lens aberration correction, image processing such as luminance and color difference generation processing, and resolution conversion processing on the image signal.

  The operation unit 208 is a part used by a user to operate the imaging device 1. The operation unit 208 includes various operation members for operating the imaging apparatus 1, such as a power button, a shutter button, and an operation dial. Note that the configuration of the operation unit 208, for example, the type and number of operation members included in the operation unit 208 are not particularly limited, and are appropriately set according to the configuration of the imaging apparatus 1. The control unit 207 controls each unit of the imaging device 1 according to an operation on the operation unit 208 by a user. The optical system control unit 205 controls a drive system that drives each of the lens group and the aperture of the optical system 201 according to the control of the control unit 207. The image sensor control unit 206 controls the image sensor chip 101 according to the control of the control unit 207.

  As described above, the signal processing chips 103 of the semiconductor devices 100a and 100b serve as the control unit 207, the A / D conversion unit 203, the signal processing unit 204, the optical system control unit 205, and the image sensor control unit 206. Function. For example, as the signal processing chip 103, a one-chip microcomputer in which a CPU, a ROM, and a RAM are provided on one IC chip is applied. In this case, a computer program and various settings for controlling the imaging device 1 are stored in the ROM of the signal processing chip 103 in advance. Then, the CPU reads the computer program from the ROM and executes the computer program using the RAM as a work area. At this time, the CPU appropriately refers to various settings stored in the ROM. Accordingly, the signal processing chip 103 functions as the control unit 207, the A / D conversion unit 203, the signal processing unit 204, the optical system control unit 205, and the imaging device control unit 206, and controls the imaging device 1. Realize.

(Semiconductor device (first embodiment))
Next, a configuration example of the semiconductor device 100a according to the first embodiment will be described with reference to FIG. FIG. 2 is a schematic diagram illustrating a configuration example of the semiconductor device 100a according to the first embodiment. 2 (a) is a front view, FIG. 2 (b) is a cross-sectional view, and FIG. 2 (c) is a rear view. As shown in FIG. 2, the semiconductor device 100a includes an image sensor chip 101 as an example of a solid-state imaging device, a signal processing chip 103, a package 102 as an example of a support member, a low heat conductive layer 104, and a high heat conductive layer. 105 and a wire group 106. The configurations of the image sensor chip 101 and the signal processing chip 103 are as described above.

  An image sensor chip 101 and a signal processing chip 103 are mounted on a package 102 which is an example of a support member. As the package 102, for example, a multilayer wiring ceramic package is applied. In the present embodiment, as shown in FIG. 2, the image sensor chip 101 is mounted on one surface of the plate-shaped package 102 (the surface on the side on which light passing through the optical system 201 is incident), and the surface on the opposite side. Is mounted with the signal processing chip 103. Then, in a plan view (in a stacking direction of the image sensor chip 101 and the signal processing chip 103), the image sensor chip 101 and the signal processing chip 103 are overlapped or have a portion to be overlapped. As described above, the image sensor chip 101 and the signal processing chip 103 are stacked with the package 102 interposed therebetween.

  Between the image sensor chip 101 and the signal processing chip 103, a low thermal conductive layer 104 as an example of a first layer and a high thermal conductive layer 105 as an example of a second layer are provided.

  The low thermal conductive layer 104 has a lower thermal conductivity than any of the package 102, the image sensor chip 101, the signal processing chip 103, and a high thermal conductive layer 105 described later. For example, a layer made of a gas such as air can be applied to the low heat conductive layer 104.

  As shown in FIG. 2, the low heat conductive layer 104 is provided on one surface of the package 102, here, on the surface on which the image sensor chip 101 is mounted. For example, a concave portion is provided on one surface of the package 102, and the image sensor chip 101 is mounted so as to cover the concave portion. Then, in plan view, the low thermal conductive layer 104 and the image sensor chip 101 overlap (or have an overlapping portion). With such a configuration, the air (gas) present inside the concave portion forms the low thermal conductive layer 104. Note that a configuration may be employed in which a concave portion provided in the package 102 is filled with a material other than gas having a lower thermal conductivity than any of the package 102, the image sensor chip 101, the signal processing chip 103, and the high thermal conductive layer 105. . For example, a configuration in which a heat insulating material or the like is filled may be used. In this case, a material (such as a heat insulating material) filled in the concave portion on the one surface of the package 102 forms the low thermal conductive layer 104.

  The high thermal conductive layer 105 has a higher thermal conductivity than any of the package 102, the image sensor chip 101, the signal processing chip 103, and the low thermal conductive layer 104. As the high thermal conductive layer 105, for example, a layer made of a metal material such as copper or aluminum is applied. For example, a plate-shaped member made of a metal material is disposed on the surface of the package 102 opposite to the side on which the image sensor chip 101 is mounted, and the signal processing chip 103 is stacked on the plate-shaped member made of the metal material. To be mounted on the package 102. In this case, a plate-like member made of a metal material constitutes the high thermal conductive layer 105.

  As described above, the image sensor chip 101 is mounted on one surface of the package 102, and the signal processing chip 103 is mounted on the surface of the package 102 opposite to the one surface. Therefore, the image sensor chip 101 and the signal processing chip 103 are stacked via the package 102. The low thermal conductive layer 104 and the high thermal conductive layer 105 are stacked on each other, and between the image sensor chip 101 and the signal processing chip 103, are stacked on the image sensor chip 101 and the signal processing chip 103. In particular, the low thermal conductive layer 104 is disposed on the surface of the package 102 near the image sensor chip 101, and the high thermal conductive layer 105 is disposed on the surface of the package 102 near the signal processing chip 103. That is, the high heat conductive layer 105, the low heat conductive layer 104, and the image sensor chip 101 are stacked in this order from the signal processing chip 103 side.

  The package 102 is not limited to a multilayer wiring ceramic package. For example, the package 102 may have a configuration to which a silicon interposer is applied. In short, the package 102, which is an example of the support member, may have any configuration as long as the image sensor chip 101 can be mounted on one surface and the signal processing chip 103 can be mounted on the opposite surface.

  The package 102 is provided with an unillustrated wiring pattern. The terminals of the image sensor chip 101 mounted on the package 102 are electrically connected to a wiring pattern provided on the package 102. The terminals of the signal processing chip 103 mounted on the package 102 are electrically connected to a wiring pattern provided on the package 102 by, for example, a wire group 106. Then, the image sensor chip 101 and the signal processing chip 103 are electrically connected (to transmit and receive electric signals) via a wiring pattern provided on the package 102 and a wire group 106.

  The wire group 106 is, for example, a wiring made of a metal material such as gold. Note that here, the configuration in which the signal processing chip 103 and the wiring provided in the package 102 are electrically connected by the wire group 106 is described; however, the present invention is not limited to such a configuration. For example, a configuration in which the tapes are electrically connected by a tape made of an electrical conductor may be used.

  Next, the operation of such a configuration will be described. The signal processing chip 103 generates heat when performing various processes, and may be higher in temperature than the image sensor chip 101. In this case, when the heat of the signal processing chip 103 is transmitted to the image sensor chip 101 and the temperature of the image sensor chip 101 becomes high, a dark current may be generated in the image sensor chip 101. Since the dark current causes noise, when the dark current is generated, the image signal generated by the image sensor chip 101 includes noise and the image quality is reduced.

  Therefore, in the present embodiment, the low thermal conductive layer 104 and the high thermal conductive layer 105 are laminated between the image sensor chip 101 and the signal processing chip 103, and are laminated on the image sensor chip 101 and the signal processing chip 103. To place. That is, in the embodiment of the present invention, a plurality of layers having different thermal conductivities are interposed between the image sensor chip 101 and the signal processing chip 103. In particular, the low thermal conductive layer 104 is disposed on the side of the package 102 close to the image sensor chip 101, and the high thermal conductive layer 105 is disposed on the side of the package 102 close to the signal processing chip 103.

  With such a configuration, the heat generated by the signal processing chip 103 is dissipated by the high thermal conductive layer 105, and transmission to the image sensor chip 101 is prevented or suppressed by the low thermal conductive layer 104. For this reason, the temperature rise of the image sensor chip 101 is prevented or suppressed, and the generation of dark current is prevented or suppressed, and the generation of noise due to the dark current can be prevented or suppressed. Therefore, the image quality of the image signal generated by the image sensor chip 101 can be improved. Further, according to such a configuration, even when the image sensor chip 101 and the signal processing chip 103 are brought close to each other in the stacking direction, generation of dark current can be prevented or suppressed. In other words, the image sensor chip 101 and the signal processing chip 103 can be brought close to each other while suppressing or preventing an increase in the generation of dark current in the image sensor chip 101. Therefore, the size of the semiconductor device 100a can be reduced, and the size of the imaging device 1 can be reduced accordingly. Therefore, both the size reduction of the imaging device 1 and the improvement of image quality can be achieved.

(Semiconductor device (second embodiment))
Next, a configuration example of a semiconductor device 100b according to a second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a schematic diagram illustrating a configuration example of a semiconductor device 100b according to the second embodiment. 3A is a front view, FIG. 3B is a cross-sectional view, and FIG. 3C is a rear view. As shown in FIG. 3, a semiconductor device 100b according to the second embodiment includes an image sensor chip 101, a package 102, a signal processing chip 103, a low heat conductive layer 104, a high heat conductive layer 105, and a wire group 106. have. In the second embodiment, signal transmission between the image sensor chip 101 and the signal processing chip 103 is performed not by wire communication but by wireless communication using dielectric coupling or the like. The description of the configuration common to the first embodiment will be omitted.

  In the present embodiment, since the image sensor chip 101 and the signal processing chip 103 are configured to perform signal transmission by wireless communication, the image sensor chip 101 and the signal processing chip 103 each include an antenna module unit for wireless communication. 111. The configuration of the antenna module unit 111 is not particularly limited, and various known configurations according to the wireless communication system can be applied. Except for the configuration having the antenna module unit 111, the configuration common to the first embodiment can be applied.

  A low thermal conductive layer 104 and a high thermal conductive layer 105 are arranged between the image sensor chip 101 and the signal processing chip 103. For this reason, in a configuration in which signal transmission between the image sensor chip 101 and the signal processing chip 103 is performed by wireless communication, depending on the materials of the low thermal conductive layer 104 and the high thermal conductive layer 105, it is necessary to prevent wireless communication from being hindered. . Therefore, in the present embodiment, the wireless communication area 107 is provided in the low thermal conductive layer 104 and the high thermal conductive layer 105 so as not to hinder signal transmission by wireless communication. The wireless communication area 107 is an area in which the transmittance of radio waves used in wireless communication is higher than the other parts of the low thermal conductive layer 104 and the high thermal conductive layer 105. As such a wireless communication region 107, for example, a through hole (opening) penetrating in the thickness direction (stacking direction) of each of the low heat conductive layer 104 and the high heat conductive layer 105 can be applied.

  Note that the image sensor chip 101 and the signal processing chip 103 are arranged such that the antenna module portions 111 overlap each other in a plan view (in the stacking direction of the image sensor chip 101 and the signal processing chip 103). The wireless communication area 107 is provided between the image sensor chip 101 and the antenna module 111 of the signal processing chip 103 among the low thermal conductive layer 104 and the high thermal conductive layer 105. That is, the wireless communication area 107 is provided at a position overlapping the image sensor chip 101 and the antenna module unit 111 of the signal processing chip 103 in a plan view.

  The thermal conductivity of the wireless communication region 107 may be different from the other portions of the low thermal conductive layer 104 and the high thermal conductive layer 105. In other words, the wireless communication area 107 provided in the low heat conduction layer 104 may have a lower heat insulating effect than other parts. Similarly, the wireless communication region 107 provided in the high thermal conductive layer 105 may have a lower heat radiation effect than other portions. FIG. 3 shows a configuration in which the wireless communication area 107 is rectangular in plan view, but the shape of the wireless communication area 107 is not particularly limited. The shape of the wireless communication area 107 may be a shape that does not hinder signal transmission by wireless communication, and may be a shape such as a non-rectangular shape or a circular shape. The wireless communication area 107 may have an optimal shape and dimensions according to the shape and dimensions of the antenna module unit 111. Note that the signal processing chip 103 and other components (not shown) are connected via the wire group 106 and the package 102, and signals are transmitted by wired communication.

  Further, as described above, if the low thermal conductive layer 104 is a layer made of a gas, the low thermal conductive layer 104 becomes an opening, so that the wireless communication region 107 is not provided (in other words, the entire low thermal conductive layer 104 is formed). The wireless communication area 107). However, when the low thermal conductive layer 104 is made of a material other than a gas, the wireless communication region 107 is provided in the material forming the low thermal conductive layer 104. In this case, as the wireless communication area 107 provided in the low thermal conductive layer 104, a through hole (opening) penetrating the low thermal conductive layer 104 in the thickness direction (the lamination direction of the image sensor chip 101 and the signal processing chip 103) is applied. You.

  According to the configuration using wireless communication for signal transmission between the image sensor chip 101 and the signal processing chip 103, the number of wires 106 connecting the signal processing chip 103 and the package 102 can be reduced. Therefore, the size of the high thermal conductive layer 105 (the surface area can be increased) without physically interfering with the wire group 106. Therefore, it is possible to enhance the heat radiation effect (capability) of the high thermal conductive layer 105.

  Although FIG. 3 shows a configuration in which the wire group 106 is provided on one side of the signal processing chip 103, a configuration in which the wire group 106 is provided on two or three sides may be employed. Alternatively, wireless communication may be applied to signal transmission between the signal processing chip 103 and other components (not shown), and the configuration may be such that the wire group 106 is not used. In this case, the surface area of the high thermal conductive layer 105 can be further increased, and the heat radiation effect of the signal processing chip 103 can be further enhanced.

  In the present embodiment, the temperature rise of the image sensor chip 101 due to the temperature rise of the signal processing chip 103 can be further suppressed. Therefore, it is possible to reduce the generation of dark current in the image sensor chip 101, and achieve both miniaturization of the imaging device 1 and improvement of image quality.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the embodiments are merely specific examples for implementing the present invention. The technical scope of the present invention is not limited to the embodiments described above. The present invention can be variously modified without departing from the spirit thereof, and these are also included in the technical scope of the present invention.

  For example, in the above-described embodiment, air is described as an example of the gas constituting the low thermal conductive layer, but a gas such as nitrogen or argon other than air may be used. Alternatively, the low heat conductive layer may be a region in a vacuum state. Further, the low heat conductive layer is not limited to a layer made of gas, and a liquid or a solid having low heat conductivity may be applied. Further, solid materials such as various heat insulating materials may be applied. The high thermal conductive layer is not limited to a layer made of a metal material. For the high thermal conductive layer, a solid other than a metal material may be applied, or a liquid or gas having high thermal conductivity may be applied.

Claims (4)

A solid-state imaging device;
A signal processing chip stacked on the solid-state imaging device;
Disposed between the solid-state imaging device and the signal processing chip ,
A first layer and a second layer having a higher thermal conductivity than the first layer stacked on each other;
Has ,
The first layer is the disposed side close to the solid-state imaging device Rutotomoni the second layer is disposed closer to the signal processing chip,
The solid-state imaging device and the signal processing chip perform signal transmission by wireless communication, and the second layer is provided with a portion having higher radio wave transmittance than other portions. apparatus. Further comprising a support member on which the solid-state imaging device and the signal processing chip are mounted,
The solid-state imaging device is mounted on one surface of the support member,
The signal processing chip is mounted on a surface of the support member opposite to the one surface,
The first layer is provided on the one surface side of the support member,
2. The semiconductor device according to claim 1, wherein the second layer is provided on the opposite surface of the support member. 3. High transmittance portion of the radio wave, the semiconductor device according to claim 1 or 2, characterized in that a through-hole. And the solid-state image sensor, and the solid-signal processing chip laminated on, is arranged between the solid-state imaging device and the signal processing chip, than the first layer and the first layer are laminated to each other A semiconductor device having a second layer having a high thermal conductivity ;
An optical system that forms an optical image of a subject on the solid-state imaging device,
Has ,
The first layer is the disposed side close to the solid-state imaging device Rutotomoni the second layer is disposed closer to the signal processing chip,
The solid-state imaging device and the signal processing chip transmit signals by wireless communication, and the second layer is provided with a portion having a higher radio wave transmittance than other portions. apparatus.

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