JP2023120293A - Imaging element and imaging device - Google Patents

Abstract

To provide an imaging element and an imaging device.SOLUTION: An imaging element 101 which photoelectrically converts incident light advancing in a Z-axis positive direction is formed by laminating a first semiconductor substrate 70 and a second semiconductor substrate 80. The first semiconductor substrate includes at least a PD layer 71 and a wiring layer 72. The PD layer is arranged on a Z-axis negative side of the wiring layer. The PD layer includes a plurality of photodiodes PD arranged in a two-dimensional manner. The wiring layer includes signal lines, or the like, formed of cables 61 to 64. Each of the cables is formed in different layers in the wiring layer. Vias are formed between the cables in the wiring layer for connection. The second semiconductor substrate include various kinds of circuits, such as an output unit. On a Z-axis negative side in the PD layer, a plurality of color filters 73 corresponding to the photodiodes, respectively, and a plurality of microlenses 74 corresponding to the color filters, respectively, are arranged. There are multiple kinds of color filters for transmitting light of wavelength regions corresponding to red, green, and blue.SELECTED DRAWING: Figure 3

Description

The present invention relates to an imaging device and an imaging device.

2. Description of the Related Art There is known an imaging device in which a plurality of pixels are grouped into blocks and signals are read out in parallel for each block (see Patent Document 1). With such an image pickup device, it is difficult to perform binning processing between signals of the same color.

According to the first aspect of the invention, the imaging element photoelectrically converts light transmitted through a first transmission portion that transmits light in a first wavelength band to generate electric charges, and charges are generated in the first region in the first direction and in the second direction. A plurality of first photoelectric conversion units arranged in a direction and a second transmission unit that transmits light in a second wavelength band photoelectrically convert light transmitted through the second transmission unit to generate electric charges, and generate charges in the second region in the first direction and the second transmission unit. A signal based on charges generated by the plurality of second photoelectric conversion units arranged in the second direction and the plurality of first photoelectric conversion units arranged in the first region is output, A first wiring layer provided with a first signal line wired in the second direction and a signal based on charges generated by the plurality of second photoelectric conversion units arranged in the second region are output, a second wiring layer provided with second signal lines wired in the first direction and the second direction.
According to a second aspect of the invention, an imaging device includes the imaging device described above, and a generator that generates image data based on a signal output from the imaging device.

It is a figure which shows the structural example of a digital camera. It is a figure explaining the outline|summary of an image pick-up element. It is a figure explaining the cross section of an image pick-up element. It is a figure which illustrates a Bayer array. FIG. 2 is a circuit diagram for explaining the configuration of blocks of an imaging device; It is a schematic diagram explaining a block. 7A is a diagram explaining the wiring of the R pixel, FIG. 7B is a diagram explaining the wiring of the B pixel, FIG. 7C is a diagram explaining the wiring of the G pixel, FIG. (d) is a diagram for explaining wiring of a G pixel. FIGS. 8(a) and 8(b) are diagrams for explaining the wiring according to Modification 1. FIG. FIG. 11 is a diagram illustrating wiring according to Modification 2; FIG. 10 is a diagram illustrating wiring according to Modification 3;

The imaging device according to the present embodiment is configured such that a plurality of pixels are grouped into blocks, and signals generated by the pixels can be read out in parallel in units of blocks. A detailed description will be given below with reference to the drawings.
FIG. 1 is a diagram schematically showing a configuration example of a digital camera provided with an image sensor 101 according to one embodiment. A digital camera is composed of an interchangeable lens 110 and a camera body 100 , and the interchangeable lens 110 is attached to the camera body 100 via a lens attachment portion 105 .
Note that the digital camera may be configured as a lens-integrated camera instead of a lens-interchangeable camera.

In FIG. 1, xyz-axes forming a mutually orthogonal coordinate system are defined. It is assumed that the light from the subject is incident in the plus direction of the z-axis in FIG. Also, as shown in the coordinate axes, the frontward direction perpendicular to the z-axis is the positive x-axis direction, and the upward direction perpendicular to the z-axis and the x-axis is the positive y-axis direction. In the following several figures, the coordinate axes are displayed with reference to the coordinate axes of FIG. 1 so that the direction of each figure can be understood.

The interchangeable lens 110 includes, for example, a lens control section 111, a zoom lens 112, a focus lens 113, an anti-vibration lens 114, an aperture 115, a lens operation section 116, and the like. The lens control unit 111 includes a CPU and peripheral components such as memory. The lens control unit 111 performs driving control of the focus lens 113 and the diaphragm 115, position detection of the zoom lens 112 and the focus lens 113, transmission of lens information to the camera body 100, reception of camera information from the camera body 100, and the like.

The camera body 100 includes, for example, an imaging device 101, a body control section 102, a body operation section 103, a display section 104, and the like. The imaging device 101 is arranged on a planned imaging plane (planned focal plane) of the interchangeable lens 110 and photoelectrically converts a subject image formed by the interchangeable lens 110 . A body operation unit 103 includes a shutter button, operation members for various settings, and the like. The display unit 104 is configured by, for example, a liquid crystal monitor (also called a rear monitor) mounted on the rear surface of the camera body 100 .

Body control unit 102 includes a CPU and peripheral components such as memory. The body control unit 102 controls the operation of the digital camera, such as drive control of the image sensor 101, readout of image signals from the image sensor 101, focus detection calculation, focus adjustment of the interchangeable lens 110, image signal processing and recording. In addition, the body control unit 102 communicates with the lens control unit 111 via an electrical contact 106 provided on the lens attachment unit 105, and receives lens information and transmits camera information (defocus amount, aperture value, etc.). conduct.

A subject image is formed on the light-receiving surface of the image sensor 101 by the luminous flux that has passed through the interchangeable lens 110 . This subject image is photoelectrically converted by the imaging device 101 , and a signal after the photoelectric conversion is sent to the body control unit 102 .

The body control unit 102 detects the focus adjustment state (defocus amount) of the interchangeable lens 110 by performing known focus detection calculations based on the signal from the image sensor 101 . The defocus amount detected by body control section 102 is sent to lens control section 111 . The lens control unit 111 calculates the drive amount of the focus lens 113 based on the received defocus amount. Then, the focus lens 113 is moved to the in-focus position by driving a motor or the like (not shown) based on the calculated drive amount.

Also, the body control unit 102 processes a signal from the imaging element 101 to generate image data, and stores the image data in a memory card (not shown). The body control unit 102 further causes the display unit 104 to display a monitor image (also referred to as a through image) based on the signal from the imaging device 101 .

<Structure of image sensor>
FIG. 2 is a schematic diagram for explaining the outline of the imaging device 101. As shown in FIG. The imaging device 101 is configured by a CMOS image sensor. The imaging device 101 has a pixel area 201 , a vertical control section 202 , a horizontal control section 203 , an output section 204 and a control section 205 . Note that a power supply unit and detailed circuits are omitted in FIG.

The pixel area 201 has a plurality of pixels arranged two-dimensionally, for example, in the horizontal direction (row direction) parallel to the x-axis and in the vertical direction (column direction) parallel to the y-axis. Each pixel has a photodiode (photoelectric conversion unit) that generates an electric charge according to the amount of incident light. Each of the plurality of pixels is driven by the vertical control section 202 and the horizontal control section 203, and a signal based on charges generated in the photodiode of each pixel is read out via the signal line 210. FIG.

The output unit 204 performs correlated double sampling (CDS) on the signal read from each pixel, and applies gain as necessary. The signal processed by the output unit 204 is output to a subsequent signal processing unit (not shown).

In the above description, an example in which the output unit 204 outputs an analog signal to the subsequent signal processing unit has been described. may be configured.

In the present embodiment, as described above, a block is formed by combining a plurality of pixels, and signals generated by pixels in the block are read out through the same signal line 210 . Therefore, the number of signal lines 210 is equal to the number of blocks. With this configuration, the output unit 204 receives signals from a plurality of blocks in parallel, processes the input signals from the plurality of blocks in parallel, and processes the signals from a signal processing unit (not shown) in the subsequent stage. can be output in parallel to

A control unit 205 controls each unit of the image sensor 101 described above. That is, the operation of the imaging device 101 described below is performed based on the control of the control unit 205 that receives the command from the body control unit 102 .
In this embodiment, the term “pixel” includes a photodiode and a reading unit that reads out a signal based on the charge generated by the photodiode. An example in which the readout section includes each transfer transistor, a floating diffusion (FD) region, an amplification transistor, and a selection transistor, which will be described later, will be described, but the range of the readout section does not necessarily have to be as in this example.

FIG. 3 is a diagram illustrating a cross section of the image sensor 101. As shown in FIG. Note that FIG. 3 shows only a partial cross section of the entire imaging device 101 . The imaging device 101 is a so-called back-illuminated imaging device. The imaging element 101 photoelectrically converts incident light traveling in the positive z-axis direction. The imaging element 101 is configured by laminating a first semiconductor substrate 70 and a second semiconductor substrate 80, for example.

The first semiconductor substrate 70 includes at least a PD layer 71 and a wiring layer 72 . The PD layer 71 is arranged on the back surface side (z-axis minus side) of the wiring layer 72 . A plurality of photodiodes PD are two-dimensionally arranged in the PD layer 71 . Signal lines 210 and the like are formed in the wiring layer 72 by wirings 61 , 62 , 63 , and 64 . The wirings 61 to 64 are formed in different layers of the wiring layer 72, respectively. Although four layers of wiring are illustrated in FIG. 3, the number of layers may be changed as appropriate. The layers of the wiring layers 72 can be connected by vias (not shown), for example. Various circuits such as the output section 204 are arranged on the second semiconductor substrate 80, for example. The second semiconductor substrate 80 may also be configured in multiple layers.

A plurality of color filters 73 corresponding to each of the plurality of photodiodes PD are provided on the incident light incident side (z-axis minus side) of the PD layer 71 . There are a plurality of types of color filters 73 that transmit light in wavelength regions corresponding to, for example, red (R), green (G), and blue (B). The color filters 73 are arranged in the Bayer array illustrated in FIG. 4, for example, three types corresponding to red (R), green (G), and blue (B).
In this embodiment, the Bayer arrangement will be described as an example, but the color filters 73 may be arranged in an arrangement other than the Bayer arrangement. In the Bayer arrangement, the photodiodes PD provided with color filters 73 that transmit light in different wavelength regions are adjacent to each other, whereas in arrangements other than the Bayer arrangement, the color filters transmit light in the same wavelength region. Photodiodes PD provided with 73 may be adjacent.

A plurality of microlenses 74 corresponding to each of the plurality of color filters 73 are provided on the incident light incident side (z-axis minus side) of the color filter 73 . The microlenses 74 condense incident light toward the corresponding photodiodes PD. The incident light that has passed through the microlens 74 is transmitted by the color filter 73 only in a partial wavelength region, and enters the photodiode PD. The photodiode PD photoelectrically converts incident light to generate charges.

A plurality of bonding pads 75 are arranged on the surface (z-axis positive side) of the wiring layer 72 . A plurality of bonding pads 76 facing the plurality of bonding pads 75 are arranged on the surface of the second semiconductor substrate 80 facing the wiring layer 72 (z-axis minus side). The plurality of bonding pads 75 and the plurality of bonding pads 76 are bonded together. The first semiconductor substrate 70 and the second semiconductor substrate 80 are electrically connected via the plurality of bonding pads 75 and the plurality of bonding pads 76 .
The number of bond pads 75 and plurality of bond pads 76 may each be equal to the number of blocks described above. That is, a set of bonding pads 75 and bonding pads 76 are provided corresponding to one block. With the configuration as described above, the length of the signal line can be substantially equal for each block, so that there is an advantage of suppressing variations in wiring impedance between blocks.

In the present embodiment, one pixel section 30 of the image sensor 101 is configured by a first pixel section 30x provided on the first semiconductor substrate 70 and a second pixel section 30y provided on the second semiconductor substrate 80. be done. The first pixel section 30x includes, in addition to the microlens 74, the color filter 73, and the photodiode PD, transistors to be described in detail later, wirings 61 to 64 connecting the pixel sections 30, and the like. The second pixel section 30y includes circuits such as the output section 204 described above.

<Description of blocks>
FIG. 5 is a circuit diagram for explaining the block configuration of the image sensor 101. As shown in FIG. One block includes a plurality (for example, N) of first pixel portions 30x-1 to 30x-N. One first pixel section 30x has a photodiode PD, four transistors (a transfer transistor Tx, a reset transistor RST, an amplification transistor SF, and a selection transistor SEL), and an FD region. Each part of the first pixel section 30x is connected as shown in FIG. Symbol VDD in FIG. 5 indicates a power supply voltage.

The transfer transistor Tx transfers charges generated by the photodiode PD to the FD region. The transfer transistor Tx is turned on to transfer charges when the control signal φTx becomes High level, and turned off when the control signal φTx becomes Low level.

The FD region converts the transferred charge into voltage. The amplification transistor SF forms a source follower circuit and amplifies a signal corresponding to the potential of the FD region. The reset transistor RST resets charges in the FD region and the photodiode PD. The reset transistor RST turns on when the control signal φRST becomes High level, and turns off when the control signal φRST becomes Low level.

The selection transistor SEL outputs the signal amplified by the amplification transistor SF to the block signal line 60 . A block signal line 60 interconnects the first pixel sections 30x-1 to 30x-N in the block. The block signal line 60 is connected to the signal line 210 corresponding to that block. The selection transistor SEL turns on to output a signal when the control signal φSEL becomes High level, and turns off when the control signal φSEL becomes Low level.

Independent control signals φSEL-1 to φSEL-N are supplied to the select transistors SEL of the first pixel portions 30x-1 to 30x-N in the block, respectively. Therefore, for example, when the high-level control signals φSEL-1 to φSEL-N are sequentially supplied by the control unit 205, the selection transistors SEL-1 to SEL-N are sequentially turned on to turn on the block signal line. 60 to signal line 210 .

When the control unit 205 supplies High level control signals φSEL-1 to φSEL-N all at once, the selection transistors SEL-1 to SEL-N are turned on all at once to turn on the block signal line 60. and outputs a signal to the signal line 210 . When the selection transistors SEL-1 to SEL-N output signals all at once, the signals output from the first pixel units 30x-1 to 30x-N on the signal line 210 are added, so that the first pixel in the block Binning by units 30x-1 through 30x-N can be performed.
A signal may be output to the signal line 210 through the block signal line 60 by any combination of the selection transistors SEL-1 to SEL-N. In this case, since signals output from some of the first pixel units 30x-1 to 30x-N on the signal line 210 are added, the signals of the first pixel units 30x-1 to 30x-N in the block Any combination of binning can be performed.

With the above configuration, signals are individually read out from any of the first pixel units 30x-1 to 30x-N in the block, and binning is performed between at least two of the first pixel units 30x-1 to 30x-N. You can do

In this embodiment, one block is composed of a plurality of pixels of the same color. That is, one block is formed by combining the pixel units 30 having the same wavelength range of light transmitted through the color filter 73 described above. FIG. 6 is a schematic diagram illustrating blocks. In a range surrounded by a solid line centering on a pixel unit 30 (referred to as an R pixel) having a color filter 73 that transmits light in a wavelength region corresponding to red (R), the R pixel and eight R pixels surrounding the R pixel An R color block 301 is composed of nine R pixels. In addition, in a range surrounded by a broken line centering on a pixel unit 30 (referred to as a B pixel) having a color filter 73 that transmits light in a wavelength region corresponding to blue (B), the B pixel and eight pixels surrounding the B pixel A B-color block 302 is composed of nine B-pixels made up of B-pixels.

Further, in a range surrounded by a dashed line centering on the pixel unit 30 (referred to as G pixel) having a color filter 73 located on the GR column and transmitting light in a wavelength region corresponding to green (G), the G pixel and 8 G pixels surrounding the G pixel constitute a first G color block 303 . Furthermore, in a range surrounded by a two-dot chain line centering on a pixel unit 30 (referred to as a G pixel) having a color filter 73 located on the GB column and transmitting light in a wavelength region corresponding to green (G), A second G color block 304 is composed of a G pixel and eight G pixels surrounding the G pixel at the center.

According to FIG. 6, the R color block 301 and the first G color block 303 overlap each other in the upper and lower portions of the blocks. Further, the left and right portions of the B-color block 302 and the first G-color block 303 overlap each other.

Furthermore, the B-color block 302 and the second G-color block 304 overlap each other in the upper and lower portions of the blocks. Furthermore, the R-color block 301 and the second G-color block 304 overlap each other in the left and right portions of the blocks.

On the other hand, referring to the circuit diagram of FIG. 5, the N pixel units 30 in the block of the same color are each connected to the block signal line 60 corresponding to that block in the wiring layer 72 (FIG. 3). . Therefore, the output terminals of the selection transistors SEL of the N pixel units 30 in the block of the same color are connected to each other. Naturally, it is not connected to block signal lines 60 of blocks of other colors. As described above, the wiring connected to the block signal line 60 in the same color block is formed by the wiring 61 to the wiring 64 in the wiring layer 72 .
In this embodiment, wiring is performed in different layers of the wiring layer 72 depending on the color of the block so that the wiring in the block does not come into contact with the blocks of other colors that spatially overlap in the pixel area 201 (FIG. 2). .
For convenience, the first G color block 303 and the second G color block 304 are treated as different colors. Moreover, "spatially overlapping" refers to a relationship in which the upper and lower portions or the left and right portions overlap with blocks of different colors in FIG.

FIGS. 7(a) to 7(d) are schematic diagrams for explaining wiring of each color. FIG. 7A is a diagram exemplifying the wiring 61 of the block signal line 60 that connects the outputs of the selection transistors SEL of the R pixels of the R color block 301 . The wiring 61 is indicated by hatching. FIG. 7B is a diagram illustrating the wiring 62 of the block signal line 60 that connects the outputs of the selection transistors SEL of the B pixels of the B color block 302 . Wiring 62 is indicated by vertical stripes.

FIG. 7C is a diagram illustrating the wiring 63 of the block signal line 60 that connects the outputs of the selection transistors SEL of the G pixels of the first G color block 303 . The wiring 63 is indicated by dots. FIG. 7D is a diagram illustrating the wiring 64 of the block signal line 60 that connects the outputs of the selection transistors SEL of the G pixels of the second G color block 304 . Wiring 64 is indicated by horizontal stripes.

The wirings 61 to 64 are formed in different layers in the wiring layer 72 . In this manner, different wirings 61 to 64 are formed in the wiring layer 72 for each color, and the wirings 61 to 64 are used to wire-connect the pixel portions 30 in the blocks of each color. When spatially overlapping, in each block, only the pixel units 30 within the block of the same color can be appropriately connected. It should be noted that the wiring in FIG. 7 is in the shape of a Japanese character.
As shown in FIGS. 7A to 7D, the wirings 61 to 64 are point-symmetrical with respect to the pixel portion 30 positioned at the center of the blocks 301 to 304 of each color. The wirings 61 to 64 are symmetrical with respect to a straight line in the horizontal direction (row direction) or vertical direction (column direction) passing through the pixel portion 30 positioned at the center of each color block 301 to 304 .

In the blocks 301 to 304 described above, the center of gravity of the N pixel units 30 in each color block 301 to 304 is called the color center of gravity. In the present embodiment, the position of the pixel portion 30 located at the center of the nine pixel portions 30 forming the blocks 301 to 304 of each color is the color centroid of the blocks 301 to 304 . In FIGS. 6 and 7, the pixel portion 30 corresponding to the color center of gravity of this example is displayed in different modes. That is, the color centroid of the R color block 301 is indicated by hatching, the color centroid of the B color block 302 is indicated by vertical stripes, the color centroid of the first G color block 303 is indicated by dots, and the color centroid of the second G color block 304 is indicated by dots. Color centroids are indicated by horizontal stripes. Looking at the color centroids of the blocks 301 to 304 in FIG. 6, it can be seen that they are in a Bayer arrangement. This means that when binning is performed by the first pixel units 30x-1 to 30x-N in the blocks 301 to 304 of each color, the signals after binning maintain the Bayer arrangement. According to this embodiment, the color centroids of the blocks 301 to 304 of each color are arranged at regular intervals, and the color centroids are not biased.

The positions where the bonding pads 75 are provided in the blocks 301 to 304 of each color are preferably provided in the vicinity of the N pixel units 30, but do not necessarily have to be provided at the positions of the color centroids.

According to the embodiment described above, the following effects are obtained.
(1) The image sensor 101 has a pixel area 201 in which a plurality of pixels 30 that photoelectrically convert light are arranged in the row direction (x-axis direction) and the column direction (y-axis direction), and the pixel area 201 has a common wavelength range. A plurality of blocks 301 to 304 subdivided into a plurality of pixels 30 that photoelectrically convert light, a plurality of signal lines 210 provided in the plurality of blocks 301 to 304, and the plurality of blocks 301 to 304 provided in each, and a block signal line 60 that interconnects a plurality of pixels 30 for each block 301-304.
Since each block 301 to 304 is composed of a plurality of pixels 30 that photoelectrically convert light in a common wavelength range, binning of signals of the same color can be easily performed simply by adding the signals in each block 301 to 304. . For example, the binning process for signals of the same color becomes overwhelmingly simple compared to the conventional technology in which pixels that photoelectrically convert light of different wavelength ranges coexist within a block.
In addition, since the signal line 210 is provided for each of the blocks 301 to 304, signals for each color can be output in parallel. For example, when pixels that photoelectrically convert light of different wavelength ranges coexist in a block, signals for each color can be output in a short time compared to the case of outputting signals for each color in a time division manner.

(2) In the image sensor 101, the block signal line 60 is connected to the signal line 210 corresponding to the blocks 301 to 304, and each of the plurality of pixels 30 in the blocks 301 to 304 is the output terminal of the amplification transistor SF of the pixel 30. and the block signal line 60 are connected or disconnected. With this configuration, signals of all the pixels 30 in the blocks 301 to 304 can be output to the signal line 210, or only signals of arbitrary pixels 30 can be output to the signal line 210 in each block.

(3) In the image pickup device 101, the pixel area 201 has a plurality of pixels 30 that photoelectrically convert light of different wavelength bands repeatedly arranged in the row direction and the column direction. In the pixel area 201, blocks 301 to 304 are arranged within a range of 2 pixels (5 pixels ×5 pixels), and the pixel 30 photoelectrically converts light in the same wavelength range as that of the pixel of interest. With this configuration, for example, around the pixel unit 30 (target pixel) that photoelectrically converts light in the wavelength region corresponding to red (R) in FIG. An R color block 301 can be configured using the located R pixels. The same applies to the B color block 302, the first G color block 303 and the second G color block 304. FIG.

(4) In the image pickup device 101, blocks 301 to 304 are arranged in the pixel area 201, for example, around the pixel unit 30 (target pixel) that photoelectrically converts light in the wavelength region corresponding to red (R) in FIG. , and 8 R pixels surrounding the R pixel constitute an R color block 301 . The same applies to the B color block 302, the first G color block 303 and the second G color block 304. FIG.
With this configuration, if the R, G, and B pixels are arranged in Bayer array, the color centroids of blocks 301 to 304 also maintain the Bayer array. The premised image processing engine can be used as it is.

(5) In the image sensor 101, the plurality of blocks 301 to 304 are spatially overlapped in the pixel area 201. FIG. The density of the centers of gravity of the blocks can be higher than when the blocks do not spatially overlap.

(6) The imaging device 101 includes wiring layers 72 that connect the block signal lines 60 . Among the plurality of blocks 301 to 304, for example, the block signal line 60 of the R color block 301 having a plurality of pixels 30 that photoelectrically convert light in the red (R) wavelength band is the first layer of the wiring layer 72. The block signal line 60 of the B-color block 302 having a plurality of pixels 30 for photoelectrically converting light in the blue (B) wavelength band is connected by a wiring 61 ( FIG. 7A ) of the wiring layer 72 . layer 62 (FIG. 7B). Also, the block signal line 60 of the first G color block 303 having a plurality of pixels 30 for photoelectrically converting light in the green (G) wavelength band is connected to the wiring 63 of the third layer of the wiring layer 72 (FIG. 7 ( The block signal line 60 of the second G color block 304 connected by c)) and having a plurality of pixels 30 photoelectrically converting light in the green (G) wavelength band is the wiring of the fourth layer of the wiring layer 72. 64 (FIG. 7(d)).
With this configuration, the block signal lines 60 in each of the blocks 301 to 304 can be appropriately connected so as not to come in contact with the block signal lines 60 of the blocks of other colors that spatially overlap with each other.

The following modifications are also within the scope of the present invention, and it is also possible to combine one or more of the modifications with the above-described embodiments.
(Modification 1)
In Modified Example 1, the wiring is divided so that the wiring in the block does not come into contact with the wiring in the spatially overlapping block of another color in the pixel area 201, and wiring for two colors is performed in one wiring layer. As in the above embodiment, the G-color first block and the G-color second block are treated as different colors for the sake of convenience.

FIGS. 8(a) and 8(b) are schematic diagrams for explaining the wiring of each color according to Modification 1. FIG. In Modification 1, for example, as shown in FIG. 8A, a wiring 61-1 connecting R pixels in an R color block and a wiring 61-2 connecting B pixels in a B color block are arranged in the same layer. Form. The wiring 61-1 is indicated by hatching. The wiring 61-2 is indicated by vertical stripes.
Further, as illustrated in FIG. 8B, the wiring 62-1 connecting the G pixels of the first block of G color and the wiring 62-2 connecting the G pixels of the second block of G color are the same. Form in layers. The wiring 62-1 is indicated by dots. The wiring 62-2 is indicated by horizontal stripes.
The wirings 61 - 1 and 61 - 2 and the wirings 62 - 1 and 62 - 2 are formed in different layers in the wiring layer 72 .

By wiring in this manner, the number of layers formed in the wiring layer 72 for wiring connection of the pixel section 30 in the block can be reduced from 4 to 2, compared with the wiring of the above-described embodiment (FIG. 7). can be suppressed.
In addition, even if the number of layers formed in the wiring layer 72 is reduced in this way, only the pixel portions 30 in the block of the same color are appropriately selected in each block when blocks spatially overlap blocks of other colors in the pixel area 201 . can be connected to
As shown in FIGS. 8(a) and 8(b), the wirings 61-1, 2 to 62-1, 2 are point-symmetrical with respect to the pixel portion 30 located at the center of each color block 301 to 304. is. Further, the wirings 61-1, 2 to 62-1, 2 are connected to straight lines in the horizontal direction (row direction) or vertical direction (column direction) passing through the pixel portion 30 located at the center of each color block 301 to 304. It is line symmetrical.

According to Modification 1 described above, the following effects are obtained. That is, the imaging device 101 includes wiring layers 72 that connect the block signal lines 60 . Among the plurality of blocks 301 to 304, for example, a block signal line 60 for an R color block 301 having a plurality of pixels 30 for photoelectrically converting light in the red (R) wavelength region, and a block signal line 60 for the blue (B) wavelength region. The block signal lines 60 of the B-color block 302 having a plurality of pixels 30 for photoelectrically converting light are connected to each other by wirings 61-1 and 61-2 in the same layer of the wiring layer 72 (FIG. 8A). ). By wiring in this manner, compared to the case where two wiring layers 72 are used for wiring connection of the block signal lines 60 in the blocks 301 and 302, the number of layers used is reduced from 2 to 1, and the cost is suppressed. be able to.

In addition, a block signal line 60 of a first G color block 303 having a plurality of pixels 30 for photoelectrically converting light in the green (G) wavelength range, and a plurality of pixel lines 60 for photoelectrically converting light in the green (G) wavelength range. The block signal lines 60 of the second G-color block 304 having the pixels 30 are connected by wirings 62-1 and 62-2 in the same layer of the wiring layer 72, respectively (FIG. 8B). By wiring in this way, compared to the case where two wiring layers 72 are used for wiring connection of the block signal lines 60 in the blocks 303 and 304, the number of used layers is reduced from two to one, and the cost is suppressed. be able to.

Furthermore, reducing the number of layers using the wiring layer 72 leads to a reduction in the number of vias for connecting between layers, so that it is possible to obtain the advantage of suppressing variations in wiring impedance. It should be noted that the wiring in FIG. 8 is in the shape of a "king".

(Modification 2)
In Modified Example 2, the wiring in the pixel area 201 is divided so that the wiring in the block does not come into contact with the wiring between the spatially overlapping blocks of other colors, and the wiring for four colors is formed in one wiring layer. As in the above-described embodiment and modification 1, the G-color first block and the G-color second block are treated as different colors for the sake of convenience.

FIG. 9 is a schematic diagram illustrating wiring of each color according to Modification 2. As shown in FIG. In Modified Example 2, the pixel portions 30 are wired in a spiral manner starting from the pixel portion 30 located in the center of the block. For example, from the R pixel located in the center of the R color block 301, the wiring 61-1 is connected to the R pixel two pixel pitches away from the R pixel in the upward direction, and the wiring 61-1 is further connected to the R pixel two pixel pitches away in the right direction. . Subsequently, the R pixel positioned at the center of the R color block 301 is connected by a wiring 61-1 to the R pixel separated by two pixel pitches to the right, and further to the R pixel separated by two pixel pitches downward by a wiring 61-1. Connect with 1.

Similarly, the R pixel located in the center of the R color block 301 is connected by a wiring 61-1 to the R pixel which is two pixel pitches away from the lower direction by a wiring 61-1, and further to the R pixel which is two pixel pitches to the left. Connect with 1. Further, a wire 61-1 connects the R pixel located in the center of the R color block 301 to the R pixel two pixel pitches away from the left direction with a wire 61-1, and further up to the R pixel two pixel pitches away from the wire 61-1. Connect with -1. The wiring 61-1 in the R color block is shaded.

Similarly, for the first G-color block 303, the second G-color block 304, and the B-color block 302, starting from the pixel portion 30 located in the center of each block, the pixel portions 30 of the same color are connected. wiring. In FIG. 9, the wiring 61-2 in the B color block is indicated by vertical stripes. Also, the wiring 61-3 in the first G color block is indicated by dots. Further, the wiring 61-4 in the second G color block is indicated by horizontal stripes. The wirings 61 - 1 to 61 - 4 for each color are formed in the same layer of the wiring layer 72 . As shown in FIG. 9, the wirings 61-1 to 61-4 are point-symmetrical with respect to the pixel portion 30 positioned at the center of each color block.

By wiring in this manner, the number of layers formed in the wiring layer 72 for wiring connection of the pixel section 30 in the block can be reduced from 2 to 1, and the cost can be suppressed as compared with the first modification.
In addition, even if the number of layers formed in the wiring layer 72 is reduced in this way, only the pixel portions 30 in the block of the same color are appropriately selected in each block when blocks spatially overlap blocks of other colors in the pixel area 201 . can be connected to

According to Modification 2 described above, the following effects are obtained. That is, in the pixel area 201, the block signal line 60 of the image pickup element 101 is connected to the pixel of interest (for example, the R pixel) of the R color block 301 by the wiring 61-1 in the first pixel area separated from the pixel of interest in the row direction by two pixel pitches. A pixel (R pixel) and a second pixel (R pixel) separated from the first pixel (R pixel) by two pixel pitches in the column direction are connected to each other, and a pixel of interest (R pixel) and a pixel of interest (R pixel) are connected to each other. A third pixel (R pixel) that is two pixel pitches away from the third pixel (R pixel) in the column direction and a fourth pixel (R pixel) that is two pixel pitches away from the third pixel (R pixel) in the row direction are connected to each other. Through such connection, the pixel of interest and the R pixels surrounding the pixel of interest in the R color block 301 are connected to each other.

The B color block 302, the first G color block 303, and the second G color block 304 are similarly connected. That is, the B color block 302 is connected by the wiring 61-2, the first G color block 303 is connected by the wiring 61-3, and the second G color block 304 is connected by the wiring 61-4. With this configuration, only one wiring layer 72 needs to be used for wiring connection of the block signal line 60, and the cost can be further reduced as compared with the first modification.
In addition, since it leads to a reduction in the number of vias for connecting layers, it is also possible to obtain the merit of suppressing variations in wiring impedance.

(Modification 3)
In Modifications 1 and 2, the blocks 301 to 304 are within a range of 2 pixels from the pixel of interest in the pixel area 201 (the size of the block is 5 pixels in the row direction×5 pixels in the column direction) and have the same wavelength range as the pixel of interest. , the block size may be further increased.

10A and 10B are schematic diagrams for explaining the wiring of each color according to Modification 3. FIG. In FIG. 10, for example, a pixel unit 30 (target pixel) that photoelectrically converts light in a wavelength region corresponding to red (R) is centered, and consists of an R pixel and 24 R pixels surrounding the R pixel. An R color block 301 is composed of 25 R pixels. That is, in the pixel area 201, within a range of 4 pixels from the pixel of interest (the block size is 9 pixels in the row direction×9 pixels in the column direction), the pixels 30 photoelectrically convert light in the same wavelength range as the pixel of interest. In this way, even when the block size is increased, the wiring can be spirally connected between the pixel portions 30 starting from the pixel portion 30 located in the center of the block. As shown in FIG. 10, the wirings 61-1 to 61-4 are point-symmetrical with respect to the pixel portion 30 positioned at the center of each color block.

(Modification 4)
When the size of the block is further increased, it becomes difficult to connect the pixel portions 30 within the block to each other by using only one layer of the wiring layer 72 . In such a case, two wiring layers 72 may be used. For example, a large block is formed by combining 3 small blocks in the row direction and 3 in the column direction of small blocks of 9 pixels in the row direction and 9 pixels in the column direction as illustrated in FIG. In this case, one wiring layer 72 is used for wiring (referred to as local wiring) for connecting the pixel portions 30 in each small block. Another layer of the wiring layer 72 is used for wiring (referred to as global wiring) for connecting the nine pixel portions 30 positioned at the center of the nine small blocks. Similar to the local wiring, the global wiring connects the pixel sections 30 positioned at the center of the small block in a spiral manner starting from the pixel section 30 positioned at the center of the large block.

According to Modification 4, even if the wiring layout of the block signal lines 60 becomes complicated as the block size increases, different layers of the wiring layer 72 can be used for the local wiring and the global wiring. Therefore, it is possible to appropriately connect the pixel portions 30 in the block while suppressing the number of layers used in the wiring layer 72 .

In the above description, an example in which the image sensor 101 is mounted in a digital camera has been described, but the image sensor 101 may be mounted in electronic devices other than digital cameras, such as smartphones, tablet terminals, and wearable terminals.

Although various embodiments and modifications have been described above, the present invention is not limited to these contents. Other aspects conceivable within the scope of the technical idea of the present invention are also included in the scope of the present invention.
For example, as examples of the shape of the wiring point-symmetrical with respect to the pixel portion 30 located at the center of each color block, the above-mentioned "Sun"-shaped, "King"-shaped, and spiral-shaped wirings are exemplified. The wiring may be in the shape of the letter "Z" or the letter "H". In addition, as examples of the shape of the wiring line symmetrical with respect to the pixel portion 30 located at the center of each color block, the above-mentioned "Sun"-shaped wiring and "King"-shaped wiring are exemplified. You may

The disclosures of the following priority applications are hereby incorporated by reference:
Japanese Patent Application No. 2017 No. 192212 (filed on September 29, 2017)

30... Pixel part 30x-1 to 30x-N... First pixel part 60... Block signal lines 61 to 64... Wiring 71... PD layer 72... Wiring layer 73... Color filter 100... Camera body 101... Imaging element 102... Body control Unit 201 Pixel area 204 Output unit 205 Control unit 210 Signal lines 301 to 304 Block PD Photodiode SEL Selection transistor SF Amplification transistor Tx Transfer transistor

Claims (15)

a plurality of first photoelectric conversion units that photoelectrically convert light transmitted through a first transmission unit that transmits light in a first wavelength band to generate electric charges, and that are arranged in a first direction and a second direction in a first region; ,
A plurality of second photoelectric converters arranged in the first direction and the second direction in the second region by photoelectrically converting the light transmitted through the second transmitting portion that transmits the light in the second wavelength band to generate electric charges. Department and
A first photoelectric converter provided with a first signal line that outputs a signal based on charges generated by the plurality of first photoelectric conversion units arranged in the first region and is wired in the first direction and the second direction a wiring layer;
Signals based on charges generated by the plurality of second photoelectric conversion units arranged in the second region are output, and second signal lines are provided that are wired in the first direction and the second direction. a wiring layer;
An image sensor. In the imaging device according to claim 1,
The first signal line is an imaging device capable of outputting a signal based on charges generated by the first photoelectric conversion units arranged between the two second photoelectric conversion units in the first direction. In the imaging device according to claim 2,
The first signal line includes a signal based on charges generated by the first photoelectric conversion units arranged between the two second photoelectric conversion units in the first direction, and two signal lines in the second direction. An imaging device capable of outputting at least one of a signal based on the charge generated by the first photoelectric conversion unit arranged between the second photoelectric conversion units. In the imaging device according to any one of claims 1 to 3,
The imaging device, wherein the first signal line is point-symmetric or line-symmetric wiring. In the imaging device according to any one of claims 1 to 4,
The second signal line is an imaging device capable of outputting a signal based on charges generated by the second photoelectric conversion units arranged between the two first photoelectric conversion units in the first direction. In the imaging device according to claim 5,
The second signal line includes a signal based on charges generated by the second photoelectric conversion units arranged between the two first photoelectric conversion units in the first direction, and two signal lines in the second direction. An imaging device capable of outputting at least one of a signal based on the charge generated by the second photoelectric conversion unit arranged between the first photoelectric conversion units. In the imaging device according to any one of claims 1 to 6,
The imaging device, wherein the second signal line is point-symmetric or line-symmetric wiring. In the imaging device according to any one of claims 1 to 7,
the first signal line outputs a signal obtained by adding signals based on charges generated by the plurality of first photoelectric conversion units;
The second signal line is an imaging element that outputs a signal obtained by adding signals based on charges generated by the plurality of second photoelectric conversion units. In the imaging device according to any one of claims 1 to 8,
A first semiconductor substrate provided with a plurality of the first photoelectric conversion units and a plurality of the second photoelectric conversion units,
The first wiring layer and the second wiring layer are laminated on the first semiconductor substrate,
the first signal line is wired under the first region in the stacking direction,
The imaging device, wherein the second signal line is wired under the second region in the stacking direction. In the imaging device according to claim 9,
A first processing unit for processing the signal output from the first signal line and a second processing unit for processing the signal output from the second signal line are provided and laminated on the first semiconductor substrate. An imaging device comprising a second semiconductor substrate. In the imaging device according to claim 10,
a first connection line that includes the first signal line and connects the first photoelectric conversion unit and the first processing unit;
a second connection line that includes the second signal line and connects the second photoelectric conversion unit and the second processing unit;
The imaging device, wherein the length of the first connection line and the length of the second connection line are the same. In the imaging device according to any one of claims 1 to 11,
a plurality of third photoelectric converters arranged in the first direction and the second direction in the third region by photoelectrically converting the light transmitted through the third transmitting portion that transmits the light in the third wavelength band to generate electric charges; Department and
a third signal line that outputs a signal based on charges generated by the plurality of third photoelectric conversion units arranged in the third region and is wired in the first wiring layer or the second wiring layer;
An image sensor. In the imaging device according to claim 12,
The imaging device, wherein the third signal line has point-symmetric or line-symmetric wiring. In the imaging device according to claim 12 or 13,
The first photoelectric conversion unit, the second photoelectric conversion unit, and the third photoelectric conversion unit are arranged in a Bayer array. An imaging device according to any one of claims 1 to 14;
a generation unit that generates image data based on a signal output from the imaging device;
An imaging device comprising:

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