JP6661269B2 - Structure having coating film and method of manufacturing the same - Google Patents

Description

  The present invention relates to a structure having a coating film and a method for manufacturing the same. More specifically, the present invention relates to a structure having a coating film formed by an aerosol deposition method, and a method of manufacturing a structure using an aerosol deposition method.

  2. Description of the Related Art In recent years, communication devices such as mobile phones, tablet terminals, and wearable terminals have been rapidly increasing in the number of mounted components due to the need for miniaturization and high functionality. Therefore, in addition to miniaturization, electronic chip components to be mounted are also required to have performance, high durability, and high reliability equal to or higher than those of conventional products.

  In addition, a method for manufacturing an electronic chip component that satisfies these requirements is also required to be low-cost and a method suitable for mass production. As a conventional method of manufacturing electronic chip components, for example, in the case of a chip inductor or MLCC (multilayer ceramic capacitor), the following method is employed. That is, a green sheet on which an internal electrode pattern is printed is laminated so as to have a required thickness, and the internal electrode pattern is cut while leaving a margin for ensuring electrical insulation. Thereafter, it is manufactured by firing the cut pieces. However, in the case of ultra-small size chips such as 0402 type and 0201 type, which are required in recent years, in the conventional manufacturing method, the inductance value is reduced due to securing a margin, and in addition, the electrical insulation property with respect to the internal electrode pattern is reduced. Is becoming more difficult. Therefore, it is becoming technically difficult to realize low cost and characteristics equal to or higher than those of a conventional product in an extremely small size chip using a conventional manufacturing method.

  Therefore, instead of the above-mentioned conventional technique of cutting leaving a margin, a method of cutting without leaving a margin and securing electrical insulation by covering it with a thin coating film in a post-process has been proposed. (Side-Gap coating method). Along with this, there is a strong demand for a thin film coating technique suitable for mass production realizing high electrical insulation.

  Conventionally known thin film coating techniques include a wet coating method and a dry coating method. For example, dip coating, which is a type of wet coating, is a method of forming a coating film by dissolving or dispersing a coating material in a solvent and immersing a base material. It is difficult to produce a thin film thickness of 5 μm or less.

  On the other hand, as typical examples of the dry coating method, a physical vapor deposition method (PVD method), a chemical vapor deposition method (CVD method), a thermal spray method, a cold spray method, and the like are known. Among these methods, for example, in the case of forming a coating film by the PVD method, formation of a dense and uniform thin film can be expected. However, there are disadvantages that a high vacuum environment is required and the film forming speed is extremely low. In addition, although the CVD method slightly improves the film forming rate as compared with the PVD method, it uses a toxic silane-based flammable gas such as tetraethylorthosilicate, which is not preferable in terms of environmental compatibility and handleability. . Further, the thermal spraying method or the cold spraying method has a large thermal shock or mechanical shock, and is not suitable for producing a coating film for a hard and brittle ceramic material used for an electronic component.

  In recent years, a dry coating technique called an aerosol deposition method (hereinafter, also referred to as an AD method) has attracted attention for these techniques. The AD method is a technique in which a raw material powder aerosolized with an argon gas, a helium gas, or the like is sprayed on a substrate, and a dense coating film is formed by using a room temperature impact solidification phenomenon (Non-Patent Document 1 below). Unlike other coating methods, it can be carried out in a low vacuum, there is no thermal shock applied to the substrate, so there is little deterioration of the coating film, and there are advantages such as relatively high deposition rate compared to other methods. . As a method of forming ultrafine particles using such an AD method, a method of irradiating ultrafine particles or a substrate with a high-energy beam is known (Patent Document 1 below).

JP 2000-21766 A

S. K. Ahuja, Powder Thechnol. , 16, 17 (1977)

  As described above, in response to recent demands for miniaturization of electronic components, there is a situation in which electronic components with sufficient performance have not been provided by conventional technologies. In addition, in order to mount electronic components on an electronic substrate by soldering, sufficient solder heat resistance is also required. Therefore, an object of the present invention is to provide a structure having a high insulating property and soldering heat resistance, which has a thin coating film and can be used for microelectronic components such as chip inductors and MLCCs by using the AD method. I do. Still another object of the present invention is to provide a method of manufacturing a structure including a coating film related to the present technology.

  The inventor of the present invention has conducted intensive studies to solve the above problems, and as a result, has found that the above-mentioned problems can be solved by the following structure and manufacturing method.

That is, one embodiment of the present invention includes a ceramic substrate,
A ceramic coating film having a thickness of 1 to 10 μm, which is directly formed on at least a part of the ceramic substrate by an aerosol deposition method,
With
The coating film has a volume electric resistivity of 1.5 × 10 ⁷ Ω · m or more and a solder heat resistance measured in a solder bath at 270 ° C. of 10 seconds or more.

Further, another embodiment of the present invention provides a preparation step of preparing a material powder having a volume-based median diameter D ₅₀ of 0.50 μm <D ₅₀ <1.0 μm,
By spraying an aerosol gas containing the material powder from a nozzle, by aerosol deposition method of depositing the material powder, a film forming step of forming a ceramic coating film on a ceramic substrate,
This is a method for producing a structure having:

  ADVANTAGE OF THE INVENTION According to this invention, the structure which has a high insulation property and solder heat resistance which can be used for an electronic component of a very small size by providing the coating film of the thin film by AD method is provided. Further, according to the manufacturing method of the present invention, a low-cost, high-insulation and solder heat-resistant structure having a thin coating film is manufactured by an AD method using a powder material having a specific particle size distribution. I can do it. Further, by providing the structure of the present invention, an electronic component having a higher performance and a smaller size than those manufactured by the conventional method can be obtained.

(A) is a schematic perspective view which shows an example of the chip inductor provided with the structure of this invention, (b) is sectional drawing of (a). (A) is a schematic perspective view showing an example of a conventional chip inductor, and (b) is a sectional view of (a). (A) is a figure for demonstrating the manufacturing method of an example of an electronic component provided with the structure of this invention, (b) is a figure for demonstrating the manufacturing method of an example of an electronic component by a prior art. It is a schematic diagram which shows an example of the film-forming apparatus by AD method. It is a schematic diagram which shows an aerosol generator. 4 is an SEM surface observation image of the chip manufactured in Example 1. 4 is an SEM cross-sectional observation image of the chip manufactured in Example 1. 4 is a cross-sectional observation image by SEM of a chip manufactured in Example 1 after a thermal cycle test. 4 is an SEM cross-sectional observation image of a chip manufactured in Example 1 after a solder heat resistance test. 4 is a surface observation image of the chip manufactured in Example 1 after the scratch test using an optical microscope. It is a surface observation image of an example showing a brittle fracture behavior in a scratch test. 6 is an SEM surface observation image of a chip manufactured in Example 2. 9 is an SEM cross-sectional observation image of a chip manufactured in Example 2. 9 is a cross-sectional observation image by SEM of a chip manufactured in Example 2 after a thermal cycle test. 6 is an SEM cross-sectional observation image of a chip manufactured in Example 2 after a solder heat resistance test. 9 is a surface observation image of the chip manufactured in Example 2 using an optical microscope after a scratch test. 9 is an SEM surface observation image of a chip manufactured in Example 3. 13 is an SEM cross-sectional observation image of the chip manufactured in Example 3. 13 is a cross-sectional observation image by SEM of a chip manufactured in Example 3 after a thermal cycle test. 10 is an SEM cross-sectional observation image of a chip manufactured in Example 3 after a solder heat resistance test. 13 is a surface observation image of the chip manufactured in Example 3 after the scratch test using an optical microscope.

  Hereinafter, the present invention will be described in detail with respect to a structure and a method of manufacturing the same.

[Structure]
The structure of the present invention comprises a ceramic substrate (hereinafter simply referred to as a substrate) and a ceramic coating film (hereinafter simply referred to as a coating) having a thickness of 1 to 10 μm directly formed on the ceramic substrate by an aerosol deposition method. (Also referred to as a film). The coating film has a volume electrical resistivity of 1.5 × 10 ⁷ Ω · m or more, and a solder heat resistance measured in a solder bath at 270 ° C. of 10 seconds or more. The structure of the present invention may have a ceramic coating film that directly contacts at least a part of the ceramic substrate and the ceramic substrate, and the ceramic substrate may include another member such as an internal electrode, A portion where the ceramic substrate and the coating film are not in contact may be included.

  For comparison with the present invention, FIG. 2A is a schematic perspective view of a conventional chip inductor. In the chip inductor 20, external electrodes 23 are arranged on both end surfaces of a ceramic base 21, and the internal electrodes 22 are included in the ceramic base 21. FIG. 2B is a cross-sectional view in the 2B-2B direction of FIG. 2A. In the cross section of FIG. 2B, the laminated internal electrodes 22, 22 'have a plurality of flat semi-elliptical shapes. There is a distance of an extra width 24 between the outer ends of the internal electrodes 22, 22 'and the ends of the ceramic base 21, and the internal electrodes 22, 22' are completely contained in the ceramic base. . The extra width 24 is necessary for maintaining high insulation of the chip inductor. In the related art, the size of the chip inductor 20 has been reduced, and it has been technically difficult to cut the green sheet serving as the ceramic substrate 21 with the extra width 24 provided.

  On the other hand, FIG. 1A is a schematic perspective view showing a chip inductor as an example of an electronic component having the structure of the present invention. In the chip inductor 10, external electrodes 13 are arranged on both end surfaces of a ceramic base 11, and an internal electrode 12 is provided inside the ceramic base 11. Further, in FIG. 2A, the side surfaces of the ceramic base 11 and the external electrodes 13 are covered with a ceramic coating film 14.

  FIG. 1B is a cross-sectional view in the 1B-1B direction of FIG. 1A. Although the internal electrodes 12 and 12 'are present inside the ceramic substrate 11, in the cross section of FIG. 1B, the laminated internal electrodes 12 and 12' have a plurality of flat semi-elliptical shapes. The outer ends of the plurality of internal electrodes 12 and 12 ′ are exposed from the ceramic substrate 11 and are in contact with the coating film 14. Even if the internal electrodes 12 and 12 ′ are exposed from the ceramic substrate 11, the entire chip can maintain high insulation properties by being covered with the coating film 14. In addition, there is no need for a difficult step of cutting the green sheet with the extra width 24 as in the related art. Further, since the inner electrodes 12, 12 'can be arranged at positions where the outer ends are exposed from the ceramic base material 11, the distance between the inner electrodes 12 and the inner electrodes 12' is larger than that of the conventional chip inductor. Can be taken widely. As a result, the inductance value of the chip inductor 10 can be increased. For example, in the case of the same size, lamination condition, and internal electrode printing condition, in a specific frequency band, the inductance value is 2.2 times or more that obtained by the conventional technology. In addition, according to the AD method, since the adhesion between the substrate and the coating film is improved, the solder heat resistance is improved, and the volume resistivity is also improved.

  The ceramic coating film of the structure of the present invention has a thickness of 1 to 10 μm. If the film thickness is less than 1 μm, it may be difficult to maintain a sufficiently high insulating property when the structure is used for an electronic component depending on the material of the coating film. On the other hand, if it exceeds 10 μm, the size of the electronic component itself becomes large, and it is not possible to sufficiently meet the demand for miniaturization. The thickness of the coating film is more preferably 3 to 8 μm. The film thickness can be measured by cross-sectional observation using a scanning electron microscope (SEM).

The coating film of the structure of the present invention has a volume electrical resistivity of 1.5 × 10 ⁷ Ω · m or more. The volume resistivity is more preferably 2.7 × 10 ⁷ Ω · m or more, and still more preferably 3.6 × 10 ⁷ Ω · m or more. The upper limit is not particularly limited because the higher the better, the more the upper limit is 1.0 × 10 ¹⁴ Ω · m. When used for extremely small electronic components, the volume resistivity of ferrite coating is 1.5 × 10 ⁷ Ω · m or more, and that of Al ₂ O ₃ and BaTiO ₃ coating is 1.0 × 10 ¹⁰ Ω · m or more. It is more preferable that the insulation can be maintained because high insulation properties can be easily maintained. The volume electric resistivity is a value obtained by a method described in Examples described later.

  The coating film of the structure of the present invention has a solder heat resistance of at least 10 seconds measured in a solder bath at 270 ° C. In order to mount electronic components with solder, heat resistance of 270 ° C. or higher is required, but the structure of the present invention has sufficient solder heat resistance. Solder heat resistance was tested by a solder heat resistance test (thermal shock test) based on JIS C 60068-2-58: 2006 described in Examples described later, and those that passed were measured in a solder bath at 270 ° C. Solder heat resistance is 10 seconds or more. "

  The ceramic coating film of the present invention is formed by the AD method. According to the AD method, a ceramic thin film of 10 μm or less can be formed at room temperature (25 ° C.) without a sintering step. Further, as described later, by using the AD method and selecting the materials of the ceramic base material and the ceramic coating film, a coating film having the above-described volume electric resistivity and solder heat resistance can be obtained.

  The structure of the present invention preferably has an in-film breaking strength (critical breaking strength) of the coating film with respect to the substrate of 7 N or more, and a complete peel strength of 40 N or more. When the in-film breaking strength is 7 N or more and the complete peel strength is 40 N or more, the coating film has a more sufficient film strength as a coating of an electronic component. More preferably, the in-film breaking strength is 8N or more and the complete peel strength is 45N or more. The upper limit is not particularly limited because the higher the better, but the in-film breaking strength is 60 N or less and the complete peel strength is 200 N or less. The in-film breaking strength and the complete peel strength are values determined by a scratch test method described in Examples described later.

  In the structure of the present invention, the relative density of the coating film is preferably 80% or more. When the relative density is 80% or more, a dense film more suitable for the film of the electronic component is obtained. The relative density is more preferably at least 82%. The upper limit of the relative density is 100%. The relative density is a value obtained by a method described in Examples described later.

  When the coating film is a soft magnetic material, it is preferable that the magnetic permeability at 10 kHz is 200 to 1200, the saturation susceptibility at 2.4 kA / m is 300 to 500 mT, and the coercive force is 10 to 100 A / m. Having such magnetic properties is suitable for electronic components such as chip inductors.

(Ceramic substrate)
There is no particular limitation on the ceramic substrate that can be used for the structure of the present invention, and any material may be used. Preferably, a sintered body obtained by sintering a green sheet or a laminate thereof used in the production of electronic components can be used as a ceramic substrate.

For example, the ceramic substrate includes metal oxides, transition metal oxides, metal nitrides, metal carbides, boride-based ceramics, and silicon. The metal oxide or transition metal oxide may include a composite oxide. More specifically, metal oxides such as aluminum oxide, zinc oxide, silicon oxide, magnesium oxide, and calcium oxide; diamond, sapphire, cordierite, β sponge men, forsterite, cermet, steatite, aluminum titanate, Complex oxides such as barium titanate, calcium titanate, strontium titanate, zinc titanate, mullite, spinel, calcium zirconate, strontium zirconate, barium zirconate titanate, bismuth titanate, strontium bismuth titanate; silicon carbide Metal nitrides such as silicon nitride, aluminum nitride, boron nitride, and titanium nitride; zirconium oxide, yttrium oxide, nickel oxide, iron oxide, titanium oxide, tantalum oxide, tin oxide, and barium oxide Transition metal oxides such as indium, cerium oxide, and chromium oxide; Mg-Zn ferrite, Mn-Zn ferrite, Mn-Mg ferrite, Cu-Zn ferrite, Mg-Mn-Sr ferrite, Ni-Zn ferrite, Ni-Cu- Soft magnetic materials such as ferrites such as Zn ferrite, Ni-Cu-Zn-Mg ferrite, and Ba ferrite; silicon; and boride-based ceramics. Such materials may be used alone or in combination of two or more. More preferably, aluminum oxide (Al ₂ O ₃ ), ferrite, barium titanate (BaTiO ₃ ), silicon (Si), silicon oxide (SiO ₂ ), silicon carbide (SiC), silicon nitride (SiN), titanium oxide ( TiO ₂ ), titanium nitride (TiN), zirconium oxide (ZrO ₂ ), magnesium oxide (MgO), calcium oxide (CaO), and boron nitride (BN).

Among these, the base material preferably contains at least one selected from Al ₂ O ₃ , ferrite, and BaTiO ₃ because it is more suitable for electronic component applications. As the ferrite, Ni-Cu-Zn ferrite is more preferable. The Ni-Cu-Zn _{ferrite, Fe 2 O 3 - (9.8~14.2} ) mol% NiO- (25.3~29.1) mol% ZnO- (8.9~11.5) mol % CuO is more preferred.

(Ceramic coating film)
The ceramic coating film of the present invention is a thin-film ceramic having a volume electric resistivity of 1 to 10 μm. Such a coating film can be used without any particular limitation as long as it is formed by the AD method. The coating film obtained by the AD method can be confirmed by observing the cross section of the structure by SEM observation or transmission electron microscope (TEM). Since the ceramic coating film of the present invention is formed by the AD method, the particles of the material powder are observed in a flat crushed state, and are deposited in parallel along the direction of the interface between the base material and the coating film. Is observed. Also, the particle size distribution and shape of the material powder of the coating film can be confirmed by SEM observation, TEM observation, or particle size distribution mapping by EBSD.

  Examples of the formed coating film include the same ceramic materials as the base material, such as metal oxides, transition metal oxides, metal nitrides, metal carbides, and boride-based ceramics. The metal oxide or transition metal oxide may include a composite oxide.

More specifically, metal oxides such as aluminum oxide, zinc oxide, silicon oxide, magnesium oxide, calcium oxide; cordierite, β sponge men, forsterite, cermet, steatite, aluminum titanate, barium titanate, Complex oxides such as calcium titanate, strontium titanate, zinc titanate, mullite, spinel, calcium zirconate, strontium zirconate, barium zirconate titanate, bismuth titanate, strontium bismuth titanate; metal carbides such as silicon carbide Metal nitrides such as silicon nitride, aluminum nitride, boron nitride, and titanium nitride; zirconium oxide, yttrium oxide, nickel oxide, iron oxide, titanium oxide, tantalum oxide, tin oxide, vanadium oxide, cerium oxide, and acids Transition metal oxides such as chromium; Mg-Zn ferrite, Mn-Zn ferrite, Mn-Mg ferrite, Cu-Zn ferrite, Mg-Mn-Sr ferrite, Ni-Zn ferrite, Ni-Cu-Zn ferrite, Ni-Cu -Soft magnetic materials such as ferrites such as Zn-Mg ferrite and Ba ferrite; silicon; boride-based ceramics. Such materials may be used alone or in combination of two or more. More preferably, aluminum oxide (Al ₂ O ₃ ), ferrite, barium titanate (BaTiO ₃ ), silicon oxide (SiO ₂ ), silicon carbide (SiC), silicon nitride (SiN), titanium oxide (TiO ₂ ), nitrided Examples include at least one of titanium (TiN), yttrium oxide (Y ₂ O ₃ ), zirconium oxide (ZrO ₂ ), magnesium oxide (MgO), calcium oxide (CaO), and boron nitride (BN). These may be used alone or in combination of two or more.

Among these, it is preferable that the coating film contains at least one selected from Al ₂ O ₃ , ferrite, and BaTiO ₃ , because the coating film is more excellent in adhesion to the substrate and heat resistance. As the ferrite, Ni-Cu-Zn ferrite is more preferable. The Ni-Cu-Zn _{ferrite, Fe 2 O 3 - (9.8~14.2} ) mol% NiO- (25.3~29.1) mol% ZnO- (8.9~11.5) mol % CuO is more preferred.

The combination of the ceramic base material and the ceramic coating film is not particularly limited, and may be a desired combination of structures. Preferably, from the viewpoints of adhesion to each other, improvement in volume electric resistivity and improvement in heat resistance, the base material contains ferrite, and the coating film contains at least one of ferrite and Al ₂ O ₃ , or the base material is The coating film contains Al ₂ O ₃ and the coating film contains Al ₂ O ₃ , or the substrate contains BaTiO ₃ and the coating film contains Al ₂ O ₃ .

[Production method]
The method for manufacturing a structure according to the present invention includes a preparing step of preparing a material powder having a volume-based median diameter D ₅₀ of 0.50 μm <D ₅₀ <1.0 μm, and injecting an aerosol gas containing the material powder from a nozzle. And forming a ceramic coating film on the ceramic substrate by an aerosol deposition method of depositing the material powder.

  First, in order to explain the manufacturing method of the present invention, a method of manufacturing an electronic component called a side gap method (hereinafter also referred to as an SG method) will be briefly described.

  FIG. 3B is a schematic view showing a part of a method for manufacturing a chip inductor according to the related art for comparison. A cross section of the green chip 40 is shown on the left side of FIG. The green chip 40 is manufactured as follows. The internal electrode conductive paste is screen-printed in a predetermined shape on the green sheet 41 to form the internal electrode conductive paste film. Next, a plurality of green sheets 41 on which the conductive paste films for internal electrodes 42 are formed are laminated, and green sheets 41 on which the conductive paste films 42 are not formed are laminated so as to sandwich the green sheets 41. And crimp. Thereafter, the stacked green sheets 41 are aligned and cut so as to have a necessary width for the inductor obtained after sintering. Thus, a green chip 40 is obtained. Thereafter, the green chip 40 is sintered to obtain the chip inductor 20 whose cross section is shown on the right side of FIG. In the inductor 20, the ceramic substrate 21 includes the internal electrode 22, and a margin 24 is provided between the outer end of the internal electrode 22 and the side surface of the ceramic substrate. As the chip inductor 20 becomes smaller, it is technically difficult to align the green sheet and secure the necessary margin 24 to cut it.

  On the other hand, FIG. 3A shows an example of a method for manufacturing a chip inductor of the present invention using the SG method. A cross section of the green chip 50 is shown on the left side of FIG. In the SG method, the green chip 50 is manufactured as follows. A conductive paste film 52 for an internal electrode is formed on a green sheet 51, and a plurality of green sheets 41 on which a conductive paste film 42 for an internal electrode are formed are stacked in the same manner as in the above-described conventional technique. The green sheets 41 on which the conductive paste film 42 is not formed are stacked and pressed together so as to sandwich them. Next, in the SG method, the green sheet 41 is cut so that the conductive paste film 52 is slightly exposed from the end of the green sheet 51, thereby obtaining a green chip 50. Thereafter, the green chip 50 is sintered to obtain the bare chip 30 whose cross section is shown in the center of FIG. In the bare chip 30, the ceramic substrate 11 does not completely include the internal electrode 12, and the internal electrode 12 is exposed from the side surface of the bare chip 30. Finally, the side surface of the bare chip 30 where the internal electrodes 12 are exposed is covered with the coating film 14 to obtain the chip inductor 10. According to the SG method, when the green chip 50 is manufactured, it is not necessary to cut the green chip 50 while leaving a strict alignment and an extra width, so that the chip inductor 10 can be manufactured more easily technically. The manufacturing method of the present invention particularly relates to a technique for forming a coating film 14 in the SG method.

<Preparation process>
The preparation step, the median diameter _{D 50} on a volume basis is prepared material powder is 0.50 .mu.m _<D 50 <1.5 [mu] m. The material powder is in the range median diameter D ₅₀ of the above, as long as the above-mentioned ceramic coating layer can be formed by the AD method is not particularly limited. When the median diameter D ₅₀ is in such a range, volume resistivity required for the electronic component and the solder heat resistance of the ceramic coating film.

In order to obtain a powder having a median diameter D ₅₀ of 0.50 μm <D ₅₀ <1.5 μm, a commercially available product may be used, or the powder may be prepared by itself. For example, a powder having a finer particle size may be prepared by crushing a lump of a material described later, or a powder having a larger particle size may be obtained by heat-treating a powder having a finer particle size. Median diameter D ₅₀ based on volume is determined by the method of measurement in Examples described later.

Further, it is preferable that the material powder has a flat shape with an aspect ratio of 100> D ₅₀ /t>1.3 when the thickness of the powder particles is t. Such a flat shape is preferable because it can be easily deposited on a substrate by the AD method and the film formation speed is high. The method of measuring the aspect ratio is based on the method described in Examples described later.

(Material powder)
The material powder that can be used in the present invention is preferably at least one kind of powder selected from a highly insulating oxide material, a soft magnetic material, and a ferroelectric oxide material because it is suitable for use in electronic components. The high-insulating oxide material refers to a material having a volume electric resistivity in a range of 1.0 × 10 ^{8 to} 1.0 × 10 ¹⁷ Ω · m at room temperature. The soft magnetic material refers to a material having a saturation magnetization Ms of 300 to 500 mT (2.4 kA / m) and a coercive force of 0.1 to 100 A / m. The ferroelectric oxide material refers to a material having a relative dielectric constant of 1,000 to 20,000 at a measurement frequency of 1 MHz.

  More specifically, as the material powder, a metal oxide, a transition metal oxide, a metal nitride, a metal carbide, a high insulating oxide material such as a boride-based ceramic, a soft magnetic material such as ferrite, and a simple perovskite are used. Examples include ferroelectric oxide materials such as Ba, Pb, and Bi-based ferroelectric compounds contained in the basic structure. More specifically, examples of the highly insulating oxide material, soft magnetic material and ferroelectric oxide material include metal oxides such as aluminum oxide, zinc oxide, silicon oxide, magnesium oxide and calcium oxide; cordierite, β Sponge men, forsterite, cermet, steatite, aluminum titanate, barium titanate, calcium titanate, strontium titanate, zinc titanate, mullite, spinel, calcium zirconate, strontium zirconate, barium zirconate titanate, Complex oxides such as bismuth titanate and strontium bismuth titanate; metal carbides such as silicon carbide; metal nitrides such as silicon nitride, aluminum nitride, boron nitride, and titanium nitride; zirconium oxide, yttrium oxide, nickel oxide, iron oxide; Oxidation Transition metal oxides such as tantalum, tantalum oxide, tin oxide, vanadium oxide, cerium oxide, and chromium oxide; Mg-Zn ferrite, Mn-Zn ferrite, Mn-Mg ferrite, Cu-Zn ferrite, Mg-Mn-Sr ferrite, Soft magnetic materials such as ferrites such as Ni-Zn ferrite, Ni-Cu-Zn ferrite, Ni-Cu-Zn-Mg ferrite, and Ba ferrite; silicon; and boride-based ceramics. These may be used alone or in combination of two or more.

Among these, because of being suitable for electronic component applications, the highly insulating oxide material is selected from Al ₂ O ₃ , SiO ₂ , MgO, CaO, transition metal oxides, metal nitrides, metal carbides, and boride-based ceramics. It is preferable that at least one soft magnetic material is ferrite and the ferroelectric oxide material is at least one of Ba, Pb, and a Bi-based ferroelectric compound containing simple perovskite in a basic structure. BaTiO ₃ is more preferable as the ferroelectric oxide material. Further, it is preferable to include at least one selected from Al ₂ O ₃ , ferrite, and BaTiO _3, since a coating film having more excellent adhesion to a substrate and heat resistance can be obtained. That is, it is preferable that the high insulating oxide material is Al ₂ O ₃ , the soft magnetic material is ferrite, and the ferroelectric oxide material is BaTiO ₃ . As the ferrite, a transition metal ferrite is preferable, and a Ni-Cu-Zn ferrite is more preferable. The Ni-Cu-Zn _{ferrite, Fe 2 O 3 - (9.8~14.2} ) mol% NiO- (25.3~29.1) mol% ZnO- (8.9~11.5) mol % CuO is more preferred.

The combination of the ceramic substrate and the material powder is not particularly limited, and may be a desired combination. Preferably, the base material contains ferrite, and the material powder contains ferrite, or the base material is Al ₂ O, from the viewpoint of improving the adhesion when forming the coating film, improving the volume electrical resistivity and improving the heat resistance. ₃ and the material powder contains ferrite, or the substrate contains Al ₂ O ₃ and the material powder contains Al ₂ O ₃ .

<Deposition process>
In the film forming step, a ceramic coating film is formed on the ceramic substrate by an aerosol deposition method in which an aerosol gas containing a material powder is ejected from a nozzle to deposit the material powder.

  FIG. 4 is a schematic diagram illustrating an example of a film forming apparatus using the AD method. The film forming apparatus 60 includes a vacuum chamber 61, an exhaust pump 62 for exhausting the vacuum chamber 61, and an aerosol generator 63 arranged outside the vacuum chamber 61. In the vacuum chamber 61, a horizontally movable stage 64 for mounting the ceramic substrate 11 is provided, and a nozzle 66 for injecting aerosol gas is arranged. The aerosol gas from the aerosol generator 63 is transported to the nozzle 66 by the transport pipe 67. Into the aerosol generator 63, a carrier gas is introduced from a carrier gas cylinder 70 through a transfer pipe 69 and a transfer gas through a transfer pipe 68. The powder material 71 is contained in the aerosol generator 63, and the aerosol gas generated by winding the powder material 71 by the hoisting gas is guided to the transport pipe 67 by the transport gas. The aerosol gas ejected from the nozzle 66 deposits a powder on the ceramic base material 11 installed facing the nozzle 66 via the mask 65. At this time, the material powder 71 in the aerosol gas forms a dense ceramic coating film on the ceramic substrate 11 by a room temperature impact solidification phenomenon.

  FIG. 5 is a schematic diagram of the aerosol generator 63. The transport pipe 69 is inserted into the powder material 71 deposited below the aerosol generator, and a hoisting gas diffusion member 72 is attached to the tip of the transport pipe 69. The powder material 71 is wound by the hoisting gas introduced into the transport pipe 69, and an aerosol gas is generated in the aerosol generator 63. The aerosol gas is led out of the transport pipe 67 connected above the aerosol generator 63 by the transport gas from the transport pipe 68 connected to the upper surface of the aerosol generator 63. The flow rate of the aerosol gas is controlled by two systems, a hoisting gas flow rate and a carrier gas flow rate. It is preferable that the transport pipes 67, 68, and 69 are respectively arranged in the aerosol generator 63 in a positional relationship that does not hinder the flow rate of the generated aerosol gas as much as possible. That is, it is preferable that the carrier pipe 68 for the carrier gas and the carrier pipe 69 for the hoisting gas be separated from the carrier pipe 67 to the nozzle 66 so as not to hinder the flow rate of the generated aerosol gas.

  In the present invention, as described above, in the film forming step, the aerosol gas is generated by introducing the hoisting gas and the carrier gas into the aerosol generator 63 containing the powder, and is also conveyed to the nozzle 66. Preferably, the flow rate of the carrier gas is 0 to 30 SLM, and the flow rate of the hoisting gas is 20 to 120 SLM. When the flow rate of the carrier gas and the flow rate of the hoisting gas are within the above ranges, it is suitable for forming a ceramic coating film having desired volume electric resistivity and solder heat resistance. The carrier gas flow rate is more preferably 20 to 30 SLM, and the hoisting gas flow rate is more preferably 40 to 60 SLM.

  Further, it is preferable that the ratio of the flow rate of the carrier gas to the flow rate of the hoisting gas is from 1: 1.5 to 1: 7. Within such a range, it is more preferable to form a ceramic coating film having desired volume electric resistivity and solder heat resistance. The ratio between the flow rate of the carrier gas and the flow rate of the hoisting gas is more preferably 1: 1.5 to 1: 5.5.

  Further, it is preferable that the scanning speed of the nozzle 66 is 200 to 400 mm / min. When the scanning speed is in such a range, it is more preferable to form a ceramic coating film having desired volume electric resistivity and solder heat resistance. To scan the nozzle 66, the stage 66 may be moved with the nozzle 66 fixed as described above, or the nozzle 66 may be moved with the stage 64 fixed. The scanning speed of the nozzle 66 is more preferably 250 to 350 mm / min. The diameter of the nozzle 66 is preferably from 1.0 to 200 mm in width and from 0.1 to 2.0 mm in height, more preferably from 50 to 100 mm in width and from 0.1 to 0.5 mm in height.

  In the manufacturing method of the present invention, a preferable pressure of the vacuum chamber is 10 to 100 kPa. This range is preferable because it is suitable for the AD method.

[Electronic components]
The present invention further provides an electronic component including the above structure or the structure manufactured by the above manufacturing method. The electronic component is not particularly limited, and examples thereof include a chip inductor, a multilayer ceramic capacitor, and a chip resistor. Since these electronic components are provided with the structure of the present invention, they have high insulation properties and high heat resistance even in a very small size. In addition, since there is no need for a step of cutting the green sheet while leaving a conventional margin, the electronic component can be manufactured more easily and at a low cost. In particular, when the electronic component is a chip inductor, the internal electrode can be arranged at a position exposed from the side surface of the chip, so that the inductance value can be increased and a high capacitance can be realized.

  Hereinafter, the present invention will be described through examples, but the present invention is not limited to the examples.

<Example 1>
In Example 1, a ferrite powder (aspect ratio D ₅₀ /t=0.56 μm / 0.068 μm) was used as a material powder, and a base material shown in Table 1 below was used. According to the following procedure, coating was performed by the AD method using the film forming apparatus shown in FIG. 4, and the produced structure was evaluated.

Ni-Zn-Cu- firstly with a median size ₀ of a volume-based _D 50 = 0.56 .mu.m ferrite powder (SAMSUNG Corporation) was prepared, to remove residual moisture and impurities, facilities to heat treatment 300 ° C. 24 hours did. The composition of Ni-Zn-Cu-ferrite was Ni: 13 mol%, Zn: 29 mol%, Cu: 9 mol%. Thereafter, the powder was charged into the aerosol generator. As the carrier gas, the flow rate of _{N 2} gas: 30 SLM as (Standard Litter per Minutes), winding gas flow rate of _{N 2} gas: 60 slm, the scanning speed of the nozzle: 300 mm / min, the vacuum chamber pressure: 1.0 × ^{10 -2} The coating on the substrate was repeated 30 times under the conditions of Pa, nozzle diameter: 100 mm × 0.3 mm.

<Comparative Examples 1-4>
In Comparative Example 1, a ferrite sintered body (bulk) was prepared for use as a standard for evaluation of density and volume electric resistivity. In Comparative Examples 2 to 4, a structure was produced in the same manner as in Example 1 except that the materials and conditions shown in Table 1 below were used. However, in Comparative Example 2, no ceramic coating film was formed.

<Evaluation method>
The following tests were performed and evaluated for the structures of the examples and the comparative examples. The evaluation results are shown in Tables 1 to 3 below.

(Relative density)
The film density (relative density) of the coating film was calculated based on the amount of powder charged and the change in substrate weight before and after coating. Further, in order to examine the surface state of the produced coating film and the interface state of (ferrite substrate) / (coating film), the appearance was observed by a scanning electron microscope (SEM) and the cross section of the sample was observed.

(Volume electrical resistivity)
Regarding the electrical insulation properties of the coating film, after separately forming a coating film on a Si wafer under the same conditions, an Ag-counter electrode (φ = 2.0 mm) having a thickness of about 200 nm is formed by sputtering. Then, using the circular electrode portion, the volume electric resistivity was measured with a High Resistance Meter (4339B) manufactured by Hewlett Packard, at an applied voltage of 100 mV to 10 V.

(Median diameter _{D 50} and the aspect ratio of the volume)
The particle size distribution (D ₅₀ ) of the used raw material powder was measured by using DT1200 (Dispersion Technology, Inc.). Regarding also the aspect ratio characterizing the flat powder particles, (D value of ₅₀₎ / (the powder particles thickness: t) was calculated by. The thickness t of the powder particles was measured by observing a sample polished after embedding the raw material powder in an acrylic resin with an SEM and analyzing a photographed powder particle cross-sectional image. The aspect ratio is obtained by measuring 30 powder particles randomly selected and calculating the average value.

(Solder heat resistance test)
In order to actually apply it as an electronic chip component, the produced coating film needs to withstand the baking process of the Ni or Ag terminal electrode and the thermal shock at the time of solder bonding. Therefore, a solder heat resistance test was performed according to the procedure shown in JIS C 60068-2-58: 2006. Specifically, a rosin ethanol 25 wt% solution was applied to the sample as a flux, and preheating was performed at 150 ± 10 ° C. (60 to 90 seconds). Then, in a Sn-3.0Ag-0.5Cu composition solder bath adjusted to a temperature of 270 ± 5 ° C., the immersion time: 10 ± 0.5 seconds (static solder) and the immersion pulling speed: 25 mm / s. And a thermal shock was applied. Then, it was left at room temperature for 48 ± 4 hours.

  Regarding the evaluation of the manufactured sample, after the above test, the appearance and cross-section of the sample were observed by SEM, and the presence or absence of peeling and cracking of the coating film was confirmed. As evaluation criteria, those in which peeling and cracking from the substrate were not confirmed were regarded as acceptable. The evaluation was performed on 10 samples randomly selected from the 100 structures produced. In Tables 1 to 3, the evaluation criteria are indicated by ○ when all of 10 samples pass, and by X when there is any defect.

(Heat cycle test)
The electronic chip component to which the present invention is applied must be free from cracks when used for a long period of time because of the danger of short-circuiting due to intrusion of moisture. Therefore, the heat cycle test was performed based on the procedure shown in JIS C60068-2-14: 2011. Specifically, the sample was held in a −55 ° C. bath for 30 minutes, at room temperature (25 ° C.) for up to 5 minutes, in a 125 ° C. bath for 30 minutes, and at room temperature (25 ° C.) for up to 5 minutes. The procedure of applying a load to the body was performed for 100 cycles.

  For the obtained sample, the appearance and cross section of the sample were observed by SEM, and the presence or absence of peeling and cracking of the coating film was confirmed. As evaluation criteria, those in which peeling and cracking from the substrate were not confirmed were regarded as acceptable. In Tables 1 to 3, a sample that passed was indicated by ○, and a sample that failed was indicated by ×. The evaluation criterion was indicated by ○ when all of 10 samples passed, and by X when there was any defect. Since the heat cycle test is based on the premise that the solder heat resistance test has been passed, it was performed only on those that passed the solder heat resistance test.

(Scratch test)
The adhesion between the coating film and the ferrite substrate is evaluated by the scratch test method, and the in-film fracture strength is determined based on the characteristics of applied load, friction coefficient, acoustic emission (AE), and structural change of scratch marks. (Internal Delamination: ID, critical breaking strength) and complete peel strength (Complete Delamination: CD) were determined. The test conditions for the scratch test were as follows. The scratch test was performed only on samples that passed the above-described heat cycle test and solder heat resistance test.

Diamond indenter diameter: 200 μm
Additional load: 0N to 100N (0N to 80N for ferrite substrate)
Scanning speed: 0.17mm / sec
Scanning distance: 10 mm.

<Evaluation of Example 1>
FIG. 6 is an SEM surface observation image of the structure of Example 1 and FIG. 7 is a cross-sectional observation image of the structure of Example 1 by SEM. From FIG. 6, it can be seen that no abnormalities in appearance such as cracks, impurity phases, and peeling of the coating film are observed on the surface of the prepared coating film. In the cross section of the sample shown in FIG. 7, the upper black region is the acrylic resin used to support the sample, the middle band-like region is a ceramic coating film, and the lower region containing a spot-like contrast is a ferrite-based region. Material. As a feature of the sample cross-sectional photograph, although irregularities of about 1 μm are observed at the (acrylic resin) / (coating film) interface, cracks and peeling of the coating film are not observed. The (coating film) / (ferrite substrate) interface does not show a clear boundary indicating the presence of the interface, suggesting that the adhesion between the two regions is high. 8 to 9, 13 to 15, and 18 to 20, the upper region is the acrylic resin used to support the sample, and the middle band-like region is ceramic. The coating film and the lower region are the substrate.

  8 and 9 are SEM observation images of the cross section of the structure after the heat cycle test and the solder heat resistance test of Example 1. In each case, no cracks or peeling of the coating film were observed at the (acrylic resin) / (coating film) and (coating film) / (ferrite base) interfaces, and the state before the test (Fig. 7) and the state It can be seen that there is no change in. Therefore, the structure of the first embodiment is suitable for actual solder mounting of electronic chip components and baking of terminal electrodes.

  FIG. 10 is an optical micrograph of the surface of the structure obtained by performing a scratch test on the surface of the structure of Example 1. In FIG. 10, white linear scratch marks are clearly observed on the ferrite substrate showing a black contrast. It can be seen that there is no noticeable appearance abnormality on the scratch line, and no trace of the complete peeling of the coating film is observed even when the load is applied up to a maximum load value of 80N. Further, as a result of examining whether or not the coating film and the substrate were broken by the AE sensor, a large AE peak was observed when the applied load was 17.8 N. From the characteristics of these scratch marks, it was found that the in-film breaking strength of Example 3 was 17.8 N and the complete peel strength was 80 N or more. When the in-film fracture strength is defined as a critical load value, the in-film fracture strength of this test is a strength of 7.5 N or more of diamond-like carbon (DLC) used for surface coating such as super tool steel. This shows that a sufficient value is secured as the adhesion strength of the coating film at room temperature of the electronic chip component. FIG. 11 shows an example of a scratch mark showing brittle fracture behavior for comparison. In FIG. 10, no shell-like exfoliation outside the scratch line as shown in FIG. 11 is observed, so it can be said that the destruction of the film is not brittle and is close to an ideal destructive behavior.

The results in Table 1, the relationship between the film thickness and deposition rate with respect to a median diameter D ₅₀ of the volume-based, the highest deposition rate of the ferrite powder having a median diameter of D _{50 =} 0.56 .mu.m of Example 1, D It can be seen that the value is about twice as large as that of Comparative Example 3 in which ₅₀ = 2.00 μm. On the other hand, as seen in Comparative Example 2, the median diameter D ₅₀ is more than 3.00, formation of the coating film to the substrate was not confirmed.

Regarding the film density, a dense coating film was obtained in the ferrite powder having a D _{50 of} 0.56 μm in Example 1 reflecting the characteristics of the film forming rate, and the relative density was as high as 94.3%. ing. Regarding the electrical resistivity, the coating film of Example 1 has a value equal to or higher than that of the sintered body of Comparative Example 1, and is applicable to an electronic chip component as a coating film for the purpose of insulation. . Further, comparing Example 1 and Comparative Example 4, Example 1 using a material powder having a median diameter of D ₅₀ = 0.56 μm is more preferable from the viewpoint of the adhesion strength and the volume electric resistivity of the film. It can be seen that excellent results have been obtained. In the case of Comparative Example 3, although the electrical resistivity is as high as that of the bulk, there is a problem in the solder heat resistance, and it can be determined that Example 1 has better results.

<Example 2>
Example 2 using _Al 2 _{O 3} powder of median diameter _{D 50} shown in Table 2 as a material powder of the ceramic coating film was _Al 2 _{O 3} is used substrate as the substrate. As the Al ₂ O ₃ powder, a flat powder whose median diameter D ₅₀ was adjusted by a pulverization method was used (aspect ratio D ₅₀ /t=0.52 μm / 0.079 μm).

In Example 2, a structure was manufactured in the same manner as in Example 1 except that the above Al ₂ O ₃ powder and the substrate were used, and the film forming conditions were as follows. The same evaluation as in Example 1 was performed. The evaluation results are shown in Table 2 below.

N ₂ gas flow rate of carrier gas: 20 SLM
N ₂ gas flow rate of hoisting gas: 40 SLM
Nozzle scanning speed: 300 mm / min
Number of coatings: 50 times.

<Comparative Examples 5 to 6>
In Comparative Example 5, an Al ₂ O ₃ sintered body (bulk) was prepared for use as a reference for evaluation of relative density and volume electric resistivity. In Comparative Example 6, a structure was produced in the same manner as in Example 2, except that the materials and conditions shown in Table 2 below were used. However, in Comparative Example 6, the ceramic coating film was not formed.

<Evaluation of Example 2>
12 and 13 show SEM surface appearance and cross-sectional observation images of a coating film formed on an Al ₂ O ₃ substrate using the flat Al ₂ O ₃ powder manufactured in Example 2. . In the state of the coating film surface shown in FIG. 12, it can be seen that no abnormalities such as foreign matters or cracks on the appearance are observed. Further, in the photograph of the cross section of the structure shown in FIG. 13, no crack or peeling of the coating film was observed at the (acrylic resin) / (coating film) and (coating film) / (Al ₂ O ₃ substrate) interface. .

14 and 15 are SEM observation images of the cross section of the structure after the heat cycle test and the solder heat resistance test of Example 2. FIG. At the (coating film) / (Al ₂ O ₃ substrate) interface, no abnormal appearance such as cracks was observed, indicating that there was no change from the sample before the test (FIG. 13). Therefore, it can be concluded that the structure of Example 2 withstands the actual solder mounting of electronic chip components and the baking process of terminal electrodes.

FIG. 16 is an optical micrograph of the sample surface after performing a scratch test on the surface of the structure of Example 2. In FIG. 16, white linear scratch marks are clearly observed on the Al ₂ O ₃ substrate showing a black contrast. From the scratch-shaped trace and the change in the shape of the AE peak, the in-film breaking strength of Example 2 was 19.4 N, and the complete peel strength was 46 N. Since this value indicates an in-film breaking strength of diamond-like carbon of 7.5 N or more, it can be determined that a sufficient value is secured as the adhesion strength of the coating film of the electronic chip component. Further, since shell-like exfoliation outside the scratch line as shown in FIG. 11 is not observed, the destruction of the film is not brittle but an ideal destructive behavior.

Regarding the shape of the Al ₂ O ₃ powder, in Example 2, which was manufactured using a flat powder having a D _{50 of} 0.52 μm, an Al ₂ O ₃ coating film having a maximum thickness of 8 μm was formed. The speed also obtained a high value of 0.23 μm / min. From this, in the case of Al ₂ O ₃ coating, it can be said that using flat powder is preferable for film formation. As a material of the base material, a dense film tends to be obtained when using Al ₂ O ₃ and BaTiO ₃ substrates. Regarding the relationship between the selected substrate and the adhesion strength of the coating film, there is a tendency that when the Al ₂ O ₃ substrate is selected, the peel strength of the coating film can be ensured. Although the volume resistivity is lower than that of the Al ₂ O ₃ sintered body, it can be seen that it has the same electrical insulation as the ferrite sintered body. Example 2 passed the heat cycle test and the solder heat resistance test, and it can be determined that the produced coating film is applicable to an electronic chip component as a coating film for the purpose of insulation.

<Example 3>
In Example 3, BaTiO ₃ powder having a median diameter D ₅₀ (aspect ratio D ₅₀ /t=0.874 μm / 0.131 μm) shown in Table 3 below was used as the material powder, and the film formation conditions were as follows. A structure was manufactured in the same manner as in Example 1. The obtained structure was evaluated in the same manner as in Example 1. The evaluation results are shown in Table 3 below.

A carrier gas _{N 2} gas flow rate: 20 SLM
Flow rate of N ₂ gas as a hoisting gas: 100 SLM
Nozzle scanning speed: 300 mm / min
Number of coatings: 30 times.

<Comparative Examples 7 to 11>
In Comparative Example 7, a BaTiO ₃ sintered body (bulk) was prepared for use as a reference for evaluation of density and volume electric resistivity. In Comparative Examples 8 to 11, structures were manufactured in the same manner as in Example 3 except that the materials and conditions shown in Table 3 below were used. However, for Comparative Examples 8 to 11, no ceramic coating film was formed.

<Evaluation of Example 3>
17 and 18 are SEM observation images of the surface appearance and cross section of the coating film of the structure manufactured in Example 3. In the state of the coating film surface shown in FIG. 17, it can be seen that no abnormalities such as foreign matters or cracks on the appearance are observed. Further, in the photograph of the cross section of the structure shown in FIG. 18, cracks, peeling of the coating film, and the like were not observed at the (acrylic resin) / (coating film) and (coating film) / (Al ₂ O ₃ substrate) interfaces. .

19 and 20 are SEM observation images of the cross section of the structure after the heat cycle test and the solder heat resistance test of Example 3. At the (coating film) / (Al ₂ O ₃ substrate) interface shown in FIGS. 19 and 20, it can be seen that abnormal appearance such as cracks is not observed.

  FIG. 21 is an optical micrograph after a scratch test was performed on the coating film on the surface of the structure of Example 3. In FIG. 21, white linear scratch marks are clearly observed on the substrate showing the black contrast. From the trace of the scratch line and the shape change of the AE peak, the in-film breaking strength of Example 3 was 34.0 N and the complete peel strength was 52.2 N. Since this value indicates a breakdown strength of 7.5 N or more in the film of diamond-like carbon, it can be determined that a sufficient value is secured as the adhesion strength of the coating film of the electronic chip component. Further, since shell-like exfoliation outside the scratch line as shown in FIG. 11 is not observed, it can be said that the destruction of the film is not brittle but an ideal destructive behavior.

The features of BaTiO ₃ powder of _{D 50} using (volume median _diameter), in Example 3 was prepared using the powder of D 50 = 0.874Myuemu, confirmed the coating film on the substrate. On the other hand, in Comparative Examples 8 to 11 using BaTiO ₃ powder having a D ₅₀ of less than 0.5 μm and a D ₅₀ of more than 1 μm, the substrate itself can be shaved even on the glass substrate on which film formation is easiest, or Only a compact in the form of a green compact was obtained, but the formation of a coating film could not be confirmed. Regarding the density of the obtained coating film, there was a tendency that the densest film was obtained when an Al ₂ O ₃ substrate was used.

Regarding the relationship between the adhesion strength between the substrate and the coating film, when the Al ₂ O ₃ substrate is selected, the peel strength of the coating film tends to be ensured.

The volume electrical resistivity of Example 3 is slightly lower than that of the BaTiO ₃ sintered body, but shows electrical insulation equal to or higher than that of the ferrite sintered body. Therefore, it can be seen that there is no problem in performance as a coating film for the purpose of insulation. Furthermore, since the structure of Example 3 passed the heat cycle test and the solder heat resistance test, it can be determined that the produced coating film is applicable to an electronic chip component as a coating film for the purpose of insulation.

10, 20 chip inductor,
11, 21 base material,
12, 12 ', 22, 22' internal electrodes,
13, 23 external electrode,
14 coating film,
24 extra width,
30 bare chips,
40, 50 green chips,
41, 51 green sheet,
42, 52 conductive paste film,
60 film forming equipment,
61 vacuum chamber,
62 exhaust pump,
63 aerosol generator,
64 stages,
65 masks,
66 nozzles,
67, 68, 69 transfer tube,
70 Carrier gas cylinder,
71 Powder material.

Claims (11)

A ceramic substrate,
A ceramic coating film having a film thickness of 1 to 10 μm formed on at least a part of the ceramic substrate,
With
The ceramic coating film has a volume electric resistivity of 1.5 × 10 ⁷ Ω · m or more, and a solder heat resistance measured in a solder bath at 270 ° C. of 10 seconds or more,
The ceramic substrate contains ferrite, and the ceramic coating film contains at least one of ferrite and Al ₂ O ₃ , or
The ceramic substrate includes Al ₂ O ₃ , and the ceramic coating film includes Al ₂ O ₃ , or
A structure, wherein the ceramic base material includes BaTiO ₃ , and the ceramic coating film includes Al ₂ O ₃ .   2. The structure according to claim 1, wherein an in-film breaking strength of the ceramic coating film with respect to the ceramic base material is 7 N or more, and a complete peel strength is 40 N or more.   The structure according to claim 1, wherein a relative density of the ceramic coating film is 80% or more. A preparation step of preparing a material powder having a volume-based median diameter D ₅₀ of 0.50 μm <D ₅₀ <1.0 μm;
By spraying an aerosol gas containing the material powder from a nozzle, by aerosol deposition method of depositing the material powder, a film forming step of forming a ceramic coating film on a ceramic substrate,
Has,
The ceramic coating film has a volume electric resistivity of 1.5 × 10 ⁷ Ω · m or more, and a solder heat resistance measured in a solder bath at 270 ° C. of 10 seconds or more,
The ceramic substrate contains ferrite, and the ceramic coating film contains at least one of ferrite and Al ₂ O ₃ , or
The ceramic substrate includes Al ₂ O ₃ , and the ceramic coating film includes Al ₂ O ₃ , or
A method for manufacturing a structure, wherein the ceramic base material includes BaTiO ₃ , and the ceramic coating film includes Al ₂ O ₃ .   5. The method of manufacturing a structure according to claim 4, wherein the material powder has a flat shape with an aspect ratio of 100> a / b> 1.3 when abscissa a and ordinate b. In the film forming step, the aerosol gas is generated by introducing a hoisting gas and a carrier gas into an aerosol generator containing the material powder and transported to the nozzle,
The method according to claim 4, wherein the flow rate of the carrier gas is 0 to 30 SLM, and the flow rate of the hoisting gas is 20 to 120 SLM. The method of manufacturing a structure according to claim 6, wherein the ratio of the carrier gas flow rate and the hoisting gas flow rate is 1: 1.5 to 1: 7.   The method for manufacturing a structure according to any one of claims 4 to 7, wherein the operation speed of the nozzle is 200 to 400 mm / min. A body made of a ceramic base material on which a magnetic material layer is laminated,
External electrodes arranged on both end surfaces of the ceramic base material,
An internal electrode inherent in the ceramic substrate,
The ceramic base, and a ceramic coating film that covers the side surface of the external electrode,
The ceramic substrate contains ferrite, and the ceramic coating film contains at least one of ferrite and Al ₂ O ₃ , or
The ceramic substrate includes Al ₂ O ₃ , and the ceramic coating film includes Al ₂ O ₃ , or
A chip inductor, wherein the ceramic base material includes BaTiO ₃ , and the ceramic coating film includes Al ₂ O ₃ .   The chip inductor according to claim 9, wherein an in-film breaking strength of the ceramic coating film with respect to the ceramic base material is 7N or more, and a complete peel strength is 40N or more.   The chip inductor according to claim 9, wherein the relative density of the ceramic coating film is 80% or more.