JP6647421B2 - Power converter - Google Patents

Description

  The present invention relates to a power converter that drives an electric motor including a first three-phase winding part and a second three-phase winding part.

  The power conversion device disclosed in Patent Literature 1 sets the phase difference of the carrier signal to 90 ° or 180 ° in accordance with operating conditions in order to reduce motor iron loss and carrier noise. 90 ° is π / 2 [rad], and 180 ° is π [rad]. Carrier noise is noise generated when an electric motor or an inverter circuit vibrates due to a carrier frequency.

JP 2014-003783 A

  In the power conversion device disclosed in Patent Literature 1, the phase difference of the carrier signal is set to 90 ° or 180 °, but the phase difference of 90 ° or 180 ° is the phase difference that can minimize the motor loss. Not only that, further reduction of motor loss is desired.

  The present invention has been made in view of the above, and an object of the present invention is to provide a power conversion device capable of further reducing motor loss.

  In order to solve the above-described problems and achieve the object, a power converter according to the present invention is a power converter that drives an electric motor including a first three-phase winding unit and a second three-phase winding unit. A first inverter that supplies AC power to the first three-phase winding unit, a second inverter that supplies AC power to the second three-phase winding unit, a first inverter, and a first inverter. A current detection circuit that detects a current flowing between the first inverter and the second inverter, and a current detection circuit that detects a current flowing between the second inverter and the second three-phase winding. A control unit for controlling the inverter. The control unit detects a frequency component having a maximum amplitude, excluding a fundamental wave component, from frequency components included in the current detected by the current detection circuit, and reduces a carrier of the carrier so that a ripple of the current flowing to the motor is reduced. Generate a signal.

  The power converter according to the present invention has an effect that the motor loss can be further reduced.

FIG. 2 is a diagram illustrating a configuration example of a power conversion device according to Embodiment 1 of the present invention. The figure which shows the example of a structure of the control part with which the electric power converter concerning Embodiment 1 of this invention is provided. FIG. 4 is a diagram illustrating first and second carrier signals generated by the power conversion device according to Embodiment 1 of the present invention and a phase difference between the first and second carrier signals. FIG. 4 is a diagram showing a specific example of an output result of the frequency detection unit shown in FIG. FIG. 1 is a first diagram illustrating a phase difference between carrier signals generated by a power conversion device according to Embodiment 1 of the present invention. FIG. 2 is a second diagram illustrating a phase difference between carrier signals generated by the power conversion device according to the first embodiment of the present invention. Flowchart showing an operation example of the power converter according to Embodiment 1 of the present invention Flowchart showing an operation example of the power conversion device according to Embodiment 2 of the present invention. FIG. 2 is a diagram illustrating a hardware configuration example of a control unit illustrated in FIG. 1.

  Hereinafter, a power converter according to an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited by the embodiment.

Embodiment 1 FIG.
FIG. 1 is a diagram showing a configuration example of a power conversion device according to Embodiment 1 of the present invention. FIG. 1 shows a power conversion device 100 according to the first embodiment and a double three-phase motor 200 driven by power conversion device 100.

  The electric motor 200 has a first three-phase winding part 3 and a second three-phase winding part 4. The first three-phase winding unit 3 has a first U-phase winding 3a, a first V-phase winding 3b, and a first W-phase winding 3c. The first U-phase winding 3a is connected to the first U-phase terminal 201 of the motor 200, the first V-phase winding 3b is connected to the first V-phase terminal 202 of the motor 200, and the first W Phase winding 3c is connected to first W-phase terminal 203 of electric motor 200.

  The second three-phase winding unit 4 has a second U-phase winding 4a, a second V-phase winding 4b, and a second W-phase winding 4c. The second U-phase winding 4a is connected to the second U-phase terminal 204 of the electric motor 200, the second V-phase winding 4b is connected to the second V-phase terminal 205 of the electric motor 200, The phase winding 4c is connected to the second W-phase terminal 206 of the electric motor 200.

  The power converter 100 includes a smoothing capacitor 1 for smoothing input DC power, a first inverter 5 connected in parallel to the smoothing capacitor 1 and connected to the first three-phase winding unit 3, A second inverter 6 is connected in parallel to the capacitor 1 and connected to the second three-phase winding unit 4, and a control unit 11 that controls the first inverter 5 and the second inverter 6.

  The power conversion device 100 further includes a first current detection unit 7 for detecting a current Iu1 flowing through the first U-phase winding 3a of the first three-phase winding unit 3, and a first three-phase winding unit 3 The second current detector 8 detects the current Iw1 flowing through the first W-phase winding 3c, and detects the current Iu2 flowing through the second U-phase winding 4a of the second three-phase winding 4. A third current detector 9 and a fourth current detector 10 that detects a current Iw2 flowing through the second W-phase winding 4c of the second three-phase winding unit 4 are provided. Each of the first current detector 7, the second current detector 8, the third current detector 9, and the fourth current detector 10 is a current converter including a resistor. The first current detector 7, the second current detector 8, the third current detector 9, and the fourth current detector 10 constitute a current detection circuit 40.

  The first inverter 5 includes a pair of switching elements 5a and 5b connected in series, a pair of switching elements 5c and 5d connected in series, and a pair of switching elements 5e and 5f connected in series. The switching element pair of the switching elements 5a and 5b, the switching element pair of the switching elements 5c and 5d, and the switching element pair of the switching elements 5e and 5f each constitute an arm. The arm composed of the switching element 5a and the switching element 5b is connected to the first U-phase terminal 201, the arm composed of the switching element 5c and the switching element 5d is connected to the first V-phase terminal 202, The arm including the switching element 5e and the switching element 5f is connected to the first W-phase terminal 203.

  The second inverter 6 includes a pair of switching elements 6a and 6b connected in series, a pair of switching elements 6c and 6d connected in series, and a pair of switching elements 6e and 6f connected in series. The switching element pair of the switching elements 6a and 6b, the switching element pair of the switching elements 6c and 6d, and the switching element pair of the switching elements 6e and 6f each constitute an arm. The arm composed of the switching element 6a and the switching element 6b is connected to the second U-phase terminal 204, the arm composed of the switching element 6c and the switching element 6d is connected to the second V-phase terminal 205, The arm including the switching element 6e and the switching element 6f is connected to the second W-phase terminal 206.

  At least one of the plurality of switching elements constituting the first inverter 5 and the second inverter 6 is formed of a wide band gap semiconductor such as silicon carbide, a gallium nitride-based material, or diamond. Wide bandgap semiconductors have low loss and high voltage resistance, so using a switching element formed of a wide bandgap semiconductor makes it possible to reduce power conversion compared to using a switching element formed of a silicon-based material. Since the efficiency is improved and the allowable current density is increased, the power conversion device 100 can be downsized. Further, since the wide band gap semiconductor has high heat resistance, it is possible to reduce the size of a radiation fin (not shown) provided in the power converter 100.

  Hereinafter, the configuration of the control unit 11 and the operation of the power converter 100 will be described with reference to FIGS. FIG. 2 is a diagram illustrating a configuration example of a control unit included in the power conversion device according to Embodiment 1 of the present invention. The control unit 11 includes a current input unit 20, a frequency detection unit 21, a carrier signal generation unit 22, a first carrier comparison unit 23, a second carrier comparison unit 24, a first voltage command calculation unit 25, and a second voltage A command calculation unit 26 is provided.

  FIG. 3 is a diagram illustrating first and second carrier signals generated by the power conversion device according to Embodiment 1 of the present invention and a phase difference between the first and second carrier signals. FIG. 3 shows a phase difference Δθ between the first carrier signal 22a indicated by a solid line and the second carrier signal 22b indicated by a dotted line.

FIG. 4 is a diagram showing a specific example of an output result of the frequency detection unit shown in FIG. In FIG. 4, the horizontal axis represents the frequency, the vertical axis represents the value of the current, and F _Amax represents the frequency of the frequency component having the maximum amplitude detected by the frequency detector 21. However, the frequency F _Amax is obtained by removing the fundamental wave component from the frequency components.

  FIG. 5 is a first diagram illustrating a phase difference between carrier signals generated by the power conversion device according to Embodiment 1 of the present invention. The first from the top in FIG. 5 shows the waveform of the first carrier signal 22a and the waveform of the second carrier signal 22b, and the phase difference Δθ between the first carrier signal 22a and the second carrier signal 22b is shown. Is shown. The phase difference Δθ is 90 °.

  5 shows a group of current ripples 28 when the phase difference Δθ of the carrier signal is 90 °, and the third from the top in FIG. 5 shows that the phase difference Δθ of the carrier signal is 90 °. The two groups of current ripples 29 at the time of FIG. These are equal to the frequency of the frequency component having the maximum amplitude detected by the frequency detection unit 21. A group of current ripples is output from the first inverter 5 and supplied to the winding group of the first U-phase winding 3a, the first V-phase winding 3b, and the first W-phase winding 3c. 4 shows a current ripple flowing in one phase of the phase AC power. The two groups of current ripples are output from the second inverter 6 and supplied to the winding groups of the second U-phase winding 4a, the second V-phase winding 4b, and the second W-phase winding 4c. 4 shows a current ripple flowing in one phase of three-phase AC power. The two groups of current ripples are currents in phase with the group of current ripples.

  FIG. 6 is a second diagram illustrating a phase difference between carrier signals generated by the power conversion device according to Embodiment 1 of the present invention. The first waveform from the top in FIG. 6 shows the waveform of the first carrier signal 22a and the waveform of the second carrier signal 22b, and the phase difference Δθ between the first carrier signal 22a and the second carrier signal 22b is shown. Is shown. The phase difference Δθ is 180 °.

  6 shows a group of current ripples 30 when the phase difference Δθ of the carrier signal is 180 °. The third group from the top in FIG. 6 shows two groups of current ripples 31 when the phase difference Δθ of the carrier signal is 180 °. These are equal to the frequency of the frequency component having the maximum amplitude detected by the frequency detection unit 21.

  Next, the operation of the power converter 100 will be described. FIG. 7 is a flowchart illustrating an operation example of the power conversion device according to Embodiment 1 of the present invention. The process of the flowchart shown in FIG. 7 is performed at predetermined intervals, and when the process from the start to the end is executed, the process from the start to the end is executed again at the timing of the next interrupt. The process of the flowchart shown in FIG. 7 is executed after the electric motor 200 is driven in a state where the phase difference Δθ of the carrier signal is 0 °. When the phase difference Δθ of the carrier signal is 0 °, a current waveform obtained by halving the current when one motor 200 is operated by one inverter is obtained. Is driven. In the power conversion apparatus 100 according to Embodiment 1, the phase difference Δθ of the carrier signal at the start of driving of the electric motor 200 is limited to 0 °, since the phase difference may be set so as to reduce the maximum frequency component described later. Not something.

  Each of the first current detector 7 and the second current detector 8 measures a resistance value on a current path between the first inverter 5 and the motor 200 at a fixed sampling rate, and measures the measured resistance value. Is converted to a current range that can be input to the current input unit 20, and the converted currents are output to the current input unit 20 as currents Iu1 and Iw1. Similarly, each of the third current detector 9 and the fourth current detector 10 measures and measures the resistance value on the current path between the second inverter 6 and the motor 200 at a fixed sampling rate. The resistance value is converted into a current range that can be input to the current input unit 20, and the converted current is output to the current input unit 20 as currents Iu2 and Iw2.

  The current Iu1 detected by the first current detection unit 7 and the current Iu2 detected by the third current detection unit 9 are input to the frequency detection unit 21 via the current input unit 20 (Step S1). .

The frequency detector 21 calculates a current Iu, which is the sum of the current Iu1 and the current Iu2 (step S2). The frequency detection unit 21 performs a fast Fourier transform operation, which is an example of frequency analysis, on the waveform of the current Iu to obtain the maximum current amount excluding the fundamental wave component among the frequency components included in the current Iu. A frequency component, that is, a maximum frequency component having the largest amplitude is detected (step S3). Specifically, the frequency detection unit 21 detects the frequency F _Amax which is the frequency component having the largest current amount among the frequency components included in the current Iu, from the output result shown in FIG. The frequency detector 21 outputs the detected frequency F _Amax to the carrier signal generator 22.

The carrier signal generation unit 22 determines the phase difference Δθ of the carrier signal based on the frequency F _Amax output from the frequency detection unit 21 and the carrier frequency fc from Expression (1) (step S4), and the phase difference Δθ Are generated and the first carrier signal 22a and the second carrier signal 22b having the same frequency are generated (step S5). Note that a triangular wave is generally used for the first carrier signal 22a and the second carrier signal 22b.

  Each of the group of current ripples 28 and the group of current ripples 29 shown in FIG. 5 simulates the current ripple of the currents Iu1 and Iu2, which are the frequencies of 2fc generated when F = 2fc. From the equation (1), the phase difference of the carrier signal is determined as Δθ = 90 °, and the ripple width of the current waveform is reduced by adding the group of current ripples 28 and the group of current ripples 29. Since the ripple width of the current waveform is reduced, the magnetic flux generated by the current flowing through the first three-phase winding part 3 and the second three-phase winding part 4 is also reduced, so that the magnetic flux path is not sufficient. Iron loss generated in the illustrated iron core can be reduced. Therefore, motor loss can be reduced.

  Each of the group of current ripples 30 and the group of current ripples 31 shown in FIG. 6 simulates current ripples of the currents Iu1 and Iu2, which are the frequencies of fc generated when F = fc. From equation (1), the phase difference of the carrier signal is determined as Δθ = 180 °, and the ripple width of the current waveform is reduced by adding the group of current ripples 30 and the group of current ripples 31 together. Since the ripple width of the current waveform is reduced, the magnetic flux generated by the current flowing through the first three-phase winding part 3 and the second three-phase winding part 4 is also reduced, so that the magnetic flux path is not sufficient. Iron loss generated in the illustrated iron core can be reduced. Therefore, motor loss can be reduced.

  The first carrier comparison unit 23 is configured to control the amplitude of the first voltage command 25a, which is the three-phase voltage command calculated by the first voltage command calculation unit 25, and the first carrier generated by the carrier signal generation unit 22. By comparing the amplitude of the signal 22a, a pulse width modulation signal subjected to pulse width modulation processing is generated, and the pulse width modulation signal is amplified to generate a gate drive signal (step S6). The gate drive signal generated by the first carrier comparison unit 23 is input to a plurality of switching elements 5a, 5b, 5c, 5d, 5e, 5f constituting the first inverter 5, and the plurality of switching elements 5a, 5b, When each of 5c, 5d, 5e, and 5f performs an on / off operation, three-phase AC power is supplied from first inverter 5 to first three-phase winding unit 3.

  The second carrier comparing unit 24 is configured to determine the amplitude of the second voltage command 26 a that is the three-phase voltage command calculated by the second voltage command calculating unit 26 and the second carrier generated by the carrier signal generating unit 22. By comparing the amplitude of the signal 22b with the pulse width modulation signal, a pulse width modulation signal is generated, and the pulse width modulation signal is amplified to generate a gate drive signal (step S6). The gate drive signal generated by the second carrier comparison unit 24 is input to a plurality of switching elements 6a, 6b, 6c, 6d, 6e, 6f constituting the second inverter 6, and the plurality of switching elements 6a, 6b, When each of 6c, 6d, 6e, and 6f performs an on / off operation, three-phase AC power is supplied from the second inverter 6 to the second three-phase winding unit 4.

  The electric motor 200 is driven by the phase difference Δθ between the first carrier signal 22a and the second carrier signal 22b (Step S7).

  The power conversion device 100 according to the first embodiment performs frequency analysis on the time-direction current waveform detected by the current detection circuit 40, thereby converting the frequency of the frequency component having the maximum amplitude excluding the fundamental component. The motor includes a frequency detection unit 21 for detecting the current, and generates a carrier signal for reducing the frequency component such that the ripple of the current flowing through the motor 200 is reduced. The iron loss of the motor 200 and the motor loss can be reduced, and the carrier noise generated when the electric motor 200, the first inverter 5 or the second inverter 6 vibrates due to the carrier frequency can also be reduced. The frequency detection unit 21 calculates the current waveform of the current flowing to the first inverter 5 and the second inverter 6 from the current waveform detected by the current detection circuit 40, and converts the calculated current waveform in the time direction into a frequency. It may be configured to detect the frequency of the frequency component having the maximum amplitude by removing the fundamental wave component by performing the analysis. The same effect as described above can also be obtained in the power conversion device 100 including the frequency detection unit 21 configured as described above.

Embodiment 2 FIG.
The power converter 100 according to the first embodiment detects the maximum frequency component from the current ripple of the waveform of the phase current and reduces the frequency component, so that the power conversion device 100 correlates with the harmonic content of the current. However, in the second embodiment, another operation example will be described. Since the configuration of power conversion device 100 according to Embodiment 2 is the same as that of Embodiment 1, description of Embodiment 2 will be omitted.

  FIG. 8 is a flowchart showing an operation example of the power conversion device according to Embodiment 2 of the present invention. The difference between the flowchart shown in FIG. 7 and the flowchart shown in FIG. 8 is that, in the flowchart shown in FIG. 8, the processing in step S4a is executed instead of the processing in step S4. Since the processing from step S1 to step S3 in the flowchart shown in FIG. 8 is the same as that in the flowchart shown in FIG. 7, the description thereof will be omitted in the second embodiment.

  Since the frequency component near the square of the carrier frequency has the most influence on the harmonic iron loss of the electric motor 200, the carrier signal generator 22 calculates the square of the carrier frequency fc and the carrier frequency fc from the equation (2). , The phase difference Δθ of the carrier signal is determined (step S4a).

  Then, the carrier signal generation section 22 generates two first carrier signals 22a and second carrier signals 22b having the same frequency and a phase difference Δθ (Step S5). Since the processing in steps S6 and S7 in the flowchart shown in FIG. 8 is the same as that in the flowchart shown in FIG. 7, the description thereof will be omitted in the second embodiment. According to power conversion device 100 of the second embodiment, in addition to the effects of the first embodiment, harmonic iron loss of electric motor 200 can be reduced, and motor loss can be further reduced.

  FIG. 9 is a diagram illustrating an example of a hardware configuration of the control unit illustrated in FIG. 1. The control unit 11 can be realized by the control circuit 300 shown in FIG. 9, that is, the processor 301 and the memory 302. The processor 301 is a CPU (Central Processing Unit), a processing device, an arithmetic device, a microprocessor, a microcomputer, or a DSP (Digital Signal Processor). In this case, the function of the control unit 11 is realized by software, realized by firmware, or realized by a combination of software and firmware. Software and firmware are described as programs and stored in the memory 302.

  The processor 301 implements the function of the control unit 11 by reading and executing the program stored in the memory 302. It can be said that these programs cause the computer to execute the procedure executed by the control unit 11.

  The memory 302 implements the function of the storage unit of the control unit 11. The memory 302 includes a random access memory such as a random access memory (RAM); a read only memory (ROM); a flash memory; Discs, flexible discs, optical discs, compact discs, mini discs, and DVDs (Digital Versatile Discs) are applicable.

  The configurations described in the above embodiments are merely examples of the contents of the present invention, and can be combined with another known technology, and can be combined with other known technologies without departing from the gist of the present invention. Parts can be omitted or changed.

  DESCRIPTION OF SYMBOLS 1 Smoothing capacitor, 3 1st three phase winding part, 3a 1st U phase winding, 3b 1st V phase winding, 3c 1st W phase winding, 4 2nd three phase winding part , 4a second U-phase winding, 4b second V-phase winding, 4c second W-phase winding, first inverter, 5a, 5b, 5c, 5d, 5e, 5f, 6a, 6b, 6c, 6d, 6e, 6f switching element, 6 second inverter, 7 first current detector, 8 second current detector, 9 third current detector, 10 fourth current detector, 11 control Unit, 20 current input unit, 21 frequency detection unit, 22 carrier signal generation unit, 22a first carrier signal, 22b second carrier signal, 23 first carrier comparison unit, 24 second carrier comparison unit, 25th 1 voltage command calculation unit, 25a first voltage command, 26 second voltage command operation Part, 26a second voltage command, 28, 29, 30, 31 current ripple, 40 current detection circuit, 100 power converter, 200 motor, 201 first U-phase terminal, 202 first V-phase terminal, 203 1 W-phase terminal, 204 second U-phase terminal, 205 second V-phase terminal, 206 second W-phase terminal, 300 control circuit, 301 processor, 302 memory.

Claims (4)

A power converter for driving an electric motor including a first three-phase winding part and a second three-phase winding part,
A first inverter for supplying AC power to the first three-phase winding unit;
A second inverter that supplies AC power to the second three-phase winding unit;
Current detection for detecting a current flowing between the first inverter and the first three-phase winding part and a current flowing between the second inverter and the second three-phase winding part Circuit and
A control unit that generates a plurality of carrier signals and controls the first inverter and the second inverter;
The phase difference between the plurality of carrier signals is Δθ,
The carrier frequency of the plurality of carrier signals is fc,
When the frequency of the frequency component having the largest amplitude in the time direction current waveform detected by the current detection circuit excluding the fundamental component is FAmax,
The phase difference, Δθ = (fc / FAmax) × 180 and Do that power converter. The control unit includes:
By performing a frequency analysis on the current waveform in the time direction detected by the current detection circuit, a frequency detection unit that detects the frequency of the frequency component having the maximum amplitude excluding the fundamental component,
A carrier signal generation unit that generates a plurality of carrier signals for performing pulse width modulation control on each of the first inverter and the second inverter at an equal frequency;
A voltage command calculator that generates a three-phase voltage command for each of the first inverter and the second inverter;
A carrier comparing unit that generates a pulse width modulation signal by comparing the three-phase voltage command of each of the first inverter and the second inverter with each of the plurality of carrier signals;
The said carrier signal generation part gives the phase difference determined based on the frequency of the frequency component which has the said largest amplitude detected by the said frequency detection part, and a carrier frequency, and produces | generates the said several carrier signal. 3. The power converter according to claim 1. The control unit includes:
By calculating a current waveform of a current flowing to the first inverter and the second inverter from a current waveform detected by the current detection circuit, and performing a frequency analysis on the calculated time-direction current waveform, A frequency detection unit that detects the frequency of the frequency component having the maximum amplitude excluding the fundamental component,
A carrier signal generation unit that generates a plurality of carrier signals for performing pulse width modulation control on each of the first inverter and the second inverter at an equal frequency;
A voltage command calculator that generates a three-phase voltage command for each of the first inverter and the second inverter;
A carrier comparing unit that generates a pulse width modulation signal by comparing the three-phase voltage command of each of the first inverter and the second inverter with each of the plurality of carrier signals;
The said carrier signal generation part gives the phase difference determined based on the frequency of the frequency component which has the said largest amplitude detected by the said frequency detection part, and a carrier frequency, and produces | generates the said several carrier signal. 3. The power converter according to claim 1. Wherein at least one of the first inverter and a plurality of switching elements constituting the second inverter, power conversion according to claims 1, which is formed by a wide band gap semiconductor to any one of claims 3 apparatus.

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