JP6531588B2 - Inverter device - Google Patents

Description

  The present invention relates to an inverter device in which a step-up transformer is constituted by a plurality of individual transformers having the same characteristic.

An inverter device is used to supply a high voltage to various devices such as a discharge tube for a large size plasma display, a plasma generator and the like.
Generally, the one with an output power value of about several watts is often used, but for the plasma generator etc., an inverter unit with an AC output with an output voltage of several kilovolts and a power value of several tens of watts or more is used Ru.

As a power supply device for supplying such a high voltage, there is a high voltage inverter device described in Patent Document 1. In the high voltage inverter device, as shown in FIG. 16, a step-up transformer T is configured by a plurality of transformers T1 and T2 of the same characteristic having separate cores.
Then, the input voltage Vin is switched by the switching element Q which is on / off controlled by the control circuit, and excitation currents are simultaneously supplied to the excitation windings Np1 and Np2 connected in parallel of the respective transformers T1 and T2 for excitation.
The output windings Ns1 and Ns2 of the respective transformers T1 and T2 are connected in series with each other, and an output voltage Vout of an AC high voltage on which the voltage waveform induced in the respective output windings Ns1 and Ns2 is superimposed is output to the load Do. As the load, for example, one having a load capacity Co, such as an electrode of a plasma generator, is connected.

However, in such a conventional inverter device, the output power is maximum at a point advanced by (1/4) π with respect to the output voltage, and its amplitude becomes zero at the point of maximum output voltage. turn into.
A load such as a plasma generator can not generate plasma efficiently unless high voltage and large power are simultaneously applied (supplied). However, as mentioned above, the conventional high voltage inverter device can not achieve it sufficiently.

  The present invention has been made in view of such background, and reduces the difference between the timing when the output voltage and the output power in the inverter device become maximum, and simultaneously applies (supplyes) high voltage and large power to the load. The objective is to increase the period of time that can be done.

In order to achieve the above object, the present invention constitutes a step-up transformer by individual n (n is an integer of 2 or more) transformers having the same characteristics, and inputs each of the excitation windings of the n transformers. A switching element is provided for switching the exciting current applied by applying a voltage, and each output winding of the n transformers is connected between a first output terminal on the frame ground side and a second output terminal on the voltage generation side. An inverter device connected in series or in series and in parallel so as to generate an alternating output voltage between the first and second output terminals,
The switching element is composed of a first switching element and a second switching element which are turned on and off by the same switching signal, and the above-mentioned transformer of the second output terminal side among the n transformers The excitation current of the excitation winding is switched by the first switching element, the excitation windings of the other transformers are connected in parallel, and the excitation current of each excitation winding is set by the second switching element. To switch
The current flowing between the at least one connection point of the n output transformers connected in series with each other and the second output terminal toward the second output terminal. A series circuit of a diode and a capacitor is connected in a direction in which

  In the inverter device according to the present invention, the difference between the timings at which the output voltage and the output power become maximum is reduced, and the period in which the high voltage and the large power can be simultaneously applied (supplied) to the load can be increased.

FIG. 1 is a circuit diagram of a first embodiment of an inverter device according to the present invention. FIG. 7 is a waveform diagram showing an output waveform observation result according to the first embodiment of the same. Similarly, the waveforms of the output voltage and the output power are clarified to be shown together with the waveform of the drain current of the switching element. FIG. 7 is a waveform chart showing changes in drain voltages of the first and second switching elements in the same manner. It is a circuit diagram which shows the comparative example of the inverter apparatus corresponding to FIG. 1 when this invention is not applied. Similarly, it is a waveform diagram showing an output waveform observation result according to the comparative example. It is a circuit diagram of a second embodiment of the inverter device according to the present invention. It is a wave form diagram which shows the output voltage in case the inductance of the output winding of each transformer is not the same, and the voltage waveform observation result of each connection point. It is a circuit diagram of 3rd Embodiment of the inverter apparatus by this invention. Similarly, it is a waveform diagram showing an output waveform observation result in the case where the capacitance of the capacitor of the third embodiment is within a desired range. Similarly, it is a waveform diagram showing an output waveform observation result in the case where the capacitance of the capacitor of the third embodiment is out of a desirable range. It is a circuit diagram of 4th Embodiment of the inverter apparatus by this invention. FIG. 21 is a waveform chart showing an output waveform observation result according to the fourth embodiment of the same. FIG. 14 is a waveform diagram showing an output waveform observation result in the case of adjusting an output voltage by raising an input voltage according to the fourth embodiment of the same. Similarly, it is a waveform diagram showing an output waveform observation result in the case of adjusting the output voltage by further raising the input voltage according to the fourth embodiment. It is a circuit diagram which shows the principal part of an example of the conventional inverter apparatus. It is a wave form diagram which shows the relationship between the output voltage of the inverter apparatus, output current, and output power.

First, the basic concept of the present invention will be described.
The output side of the high voltage inverter device as shown in FIG. 16 has an inductance Ls in which the output windings of the transformers T1 and T2 are connected in series, and a capacitance Cs distributed or parasitic between the output windings. A voltage resonance circuit is configured by the load capacitance Co and the combined capacitance.
The resonance constants of the voltage resonance circuit are Ls, Cs and Co. However, since a strong magnetic field is applied on the electrical path, and the resonance constant changes due to temperature or line length deviation, the output voltage Vout alternating with high voltage does not completely become only the fundamental wave, and distortion is It becomes an output waveform that has entered. Therefore, when the output voltage is subjected to Fourier expansion, it is decomposed into higher order alternating voltages that decay.

Here, the resonance constants Ls and Cs are combined characteristics of a plurality of transformers T1 and T2. When the number of transformers is two, the output inductance of each transformer is approximately Ls / 2, and the electrostatic capacitance Cs (excluding the load capacitance Co) such as parasitic capacitance is approximately 2 · Cs.
The output voltage is an alternating voltage of several kilovolts to several tens of kilovolts, and the average output power is in the range of several watts to several tens of kilowatts.

In an ideal state, the output voltage V (t) of the parallel resonance is expressed by the following equation.
V (t) = Vout sin (.omega.t)... (1)
Here, Vout is the maximum value (V) of the output voltage, and ω is the angular frequency. ω has a relationship of ω = 2πfo with respect to the resonance frequency f0 in the LC resonance state.
Therefore, the resonant angular frequency ωo in the resonant state is ωo = 1 / √LC.

The output current I (t) flowing to the output circuit is expressed by the following equation.
I (t) = Iout cos (ωt) (2)
Therefore, the output current I (t) leads the output voltage V (t) by (1/2) π rad (radian) in phase.
Then, the power P (t) resulting from the product of the output voltage V (t) and the output current I (t) is applied to the load.

From the trigonometric function addition theorem, the output power P (t) is determined by the following equation.
P (t) = Vout sin (ωt) · Iout cos (ωt)
= Vout · Iout {sin (ωt + ωt) + sin (0)} / 2
= Vout · Iout · sin (2ωt) / 2 · · · (3)
Therefore, the maximum value Pmax of output power is
Pmax = Vout · Iout / 2 (4)
And not more than that.

The relationship between the output voltage V (t), the output current I (t) and the output power P (t) is as shown in FIG. 17 as a waveform diagram in which the horizontal axis is a time axis.
As can be seen from FIG. 17, both of the output voltage V (t) and the output current I (t) have a period of 2π (radian), and the output current I (t) is π / 2 more than the output voltage V (t). Only the phase is in progress.
Further, the period of the output power P (t) is π, and the phase is advanced by 1⁄8 period (π / 4) based on the output voltage V (t). And, it becomes maximum when the output voltage V (t) = output current I (t).

Therefore, if the output voltage V (t) and the output current I (t) are phase-shifted to the maximum value of the output power P (t), the maximum value of the output power is increased. The best condition is achieved because the timing at which the output power is maximized will coincide. Therefore,
V (t) = Vout sin {ωt + (1/4) π) (5) and I (t) = Iout cos {ωt− (1/4) π) (6) )
It will be good if

The average power Pm is the difference between the area A of the area of the positive period a and the area B of the area of the negative period b in which the waveform of the output power P (t) in FIG. It becomes.
Pm = A−B (7)
This difference is the power consumption of the load.
In the ideal state of parallel resonance, Pm = 0, but when the load is in a plasma generation state, dielectric loss of the load capacity causes losses such as heat, sound, light (partial plasma), radio waves, vibration, etc. In fact, A> B. Therefore, Pm> 0.

  What is focused on in the present invention is the maximum value of the output power P (t) at (1/4) π of the output voltage. From the output voltage V (t) according to equation (1), since the output power P (t) is a phase advance, equation (5) is obtained when the phase of the output voltage is matched at the maximum of the output power P (t). Expression (5) is advanced from expression (1). Since the output power is thereby increased, the difference in equation (7) will be made larger.

It is preferable that the output current I (t) be able to satisfy the equation (6), but only one of them can be adjusted. That is, if it is going to satisfy Formula (5) and Formula (6) simultaneously, it will remove | deviate from parallel resonance.
However, in practice, it is only necessary to increase A in equation (7). Therefore, in the present invention, the phase of the output voltage is shifted so as not to lose the resonant state of the output and to increase the output power and to reduce the phase difference between the output voltage and the output power.

Hereinafter, a mode for carrying out the present invention will be specifically described based on the drawings.
First Embodiment
FIG. 1 is a circuit diagram of a first embodiment of an inverter device according to the present invention.
In the inverter device shown in FIG. 1, the step-up transformer 3 is configured by five individual transformers T1 to T5 (having different cores) having the same characteristics. Input voltages Vin supplied from the first and second input terminals 1a and 1b are applied to the excitation windings Lp1 to Lp5 of the five transformers T1 to T5, respectively, to cause an excitation current to flow, and the excitation currents thereof Switch at the same time. The switching element for that purpose is comprised by the 1st switching element Q1 and the 2nd switching element Q2.

  The first switching element Q1 and the second switching element Q2 are turned on / off driven by the same switching signal outputted from the control circuit 5 being applied to the gate via the protective resistance R1 or R2, respectively. Type FET. The switching signal is, for example, a rectangular wave pulse signal with a constant period of about 20 kHz, and the duty, which is the ratio of the ON time within one period thereof, can also be varied.

The first switching element Q1 is connected in series with the excitation winding Lp5 of the transformer T5 between the input terminals 1a and 1b to which the input voltage Vin is supplied, and switches only the excitation current of the excitation winding Lp5. .
The excitation windings Lp1 to Lp4 of the transformers T1 to T4 are all connected in parallel, and the parallel circuit is connected in series with the second switching element Q2 between the input terminals 1a and 1b. Therefore, the second switching element Q2 switches the excitation current of the excitation windings Lp1 to Lp4 of the transformers T1 to T4.

On the other hand, the output windings Ls1 to Ls5 of the five transformers T1 to T5 constituting the step-up transformer 3 are between the first output terminal 2a on the frame ground side and the second output terminal 2b on the voltage generation side. They are connected in series. Then, an output voltage V (t) alternating between the first and second output terminals 2a and 2b is generated.
Although not shown in FIG. 1, a load such as a plasma generator having a load capacity Co is connected between the first and second output terminals 2a and 2b, as in the conventional example shown in FIG. .

The capacitance C between the first and second output terminals 2a and 2b is a combination of the capacitance Cs and the load capacitance distributed or parasitic between the output windings Ls1 to Ls5 of the transformers T1 to T5 in that case. It is a capacity.
The first input terminal 1a, the first output terminal 2a, and the source terminals of the first and second switching elements Q1 and Q2 are all connected to the frame ground (earth) GND. The control circuit 5 is supplied with an input voltage Vin from the input terminals 1a and 1b.

  The transformers T1 to T5 store energy during a period in which the excitation current flows in the excitation windings Lp1 to Lp5, respectively, and when the excitation current is turned off, the energy is discharged to the respective output windings Ls1 to Ls5 and the secondary voltage To cause the above-mentioned voltage resonance on the secondary side. Then, since the secondary voltages generated in the series-connected output windings Ls1 to Ls5 are added so as to be stacked, the alternating output voltage V (t) has an output power close to five times that in the case of one transformer. can get. Such an inverter circuit is called "stacked discharge circuit" in this specification.

  Furthermore, the output windings Ls1 to Ls5 of the five transformers T1 to T5 of the first embodiment connected in series are connected to one another at connection points e, f, g, h. A series circuit of a diode and a capacitor is connected between the connection points e, f, g, h and the second output terminal 2b in the direction in which the current flows toward the second output terminal 2b. . Each series circuit has the function of a phase advancing circuit.

That is, a series circuit of a diode D1 and a capacitor C1 is connected between the connection point e and the second output terminal 2b, and a series circuit of a diode D2 and a capacitor C2 is connected between the connection point f and the second output terminal 2b. doing.
Also, a series circuit of a diode D3 and a capacitor C3 is connected between the connection point g and the second output terminal 2b, and a series circuit of a diode D4 and a capacitor C4 is connected between the connection point h and the second output terminal 2b. doing.

FIG. 2 is a waveform diagram showing an output waveform observation result according to the first embodiment, and FIG. 3 is a waveform diagram showing the waveforms of the output voltage and the output power as well as the drain current waveform of the switching element. is there. FIG. 4 is a waveform diagram showing changes in drain voltages of the first and second switching elements Q1 and Q2, respectively.
In addition to the output voltage V (t) and the output power P (t), FIG. 2 also shows voltage waveforms generated at connection points e, f, g, h of the adjacent output windings in FIG. .

Id1 in FIG. 3 corresponds to the drain current of the first switching element Q1, that is, the excitation current of the transformer T5. Id2 corresponds to the sum of the drain current of the second switching element Q2, that is, the excitation current of the transformers T1 to T4. The slope of the current change in the ON period of the drain currents Id1 and Id2 is largely different, and the slope of the drain current Id2 is larger.
As shown in FIG. 4, the waveforms of the drain voltage Vds1 of the first switching element Q1 and the drain current Vds2 of the second switching element Q2 are also largely different.
As can be seen from FIGS. 2 and 3, although the waveform of the output power P (t) is somewhat distorted, its area increases and the positive peak of the waveform and the positive peak of the output voltage V (t) The time difference is closing.

In this embodiment, although the step-up transformer 3 constituting the stacked discharge circuit is constituted by five individual transformers having the same characteristic, it may be constituted by n (n is an integer of 2 or more) transformers. Therefore, this case will be described with reference to FIG.
From the lower side (frame ground side: first output terminal side) to the upper side (voltage generation side: second output terminal side) of FIG. 1, the transformers T1, T2, T3,. Let Tn-1 and Tn. The excitation windings are Lp1, Lp2, Lp3, ..., Lpn-1, Lpn, and the output windings Ls1, Ls2, Ls3, ..., Lsn-1, Lsn.

The excitation current is switched only by the first switching element Q1 of the excitation winding Lpn of the uppermost transformer Tn. The excitation windings Lp1 to Lpn-1 of the lower transformers T1 to Tn-1 are connected in parallel to one another, and the respective excitation currents are simultaneously switched by the second switching element Q2.
The output windings Ls1 to Lsn of the transformers T1 to Tn are connected in series between the first output terminal 2a and the second output terminal 2b.

Each of the output winding Ls1 to Lsn mutual connection points connected in series with each other,
A series circuit of a diode and a capacitor is connected between the second output terminal 2b and the direction in which current flows toward the second output terminal 2b.
Since the output winding Lsn of the transformer Tn on the highest output voltage side is not affected by resonance due to a series circuit of a diode and a capacitor, only the excitation current of the transformer Tn is an independent first switching element. It is made to switch by Q1.

  Now, in the stacked discharge circuit, the sum of the inductances of the output windings Ls1 to Lsn (total inductance ΣLsn) and the static capacitance which is the combined capacitance of the electrostatic capacitance distributed between the output windings or the parasitic capacitance and the load capacitance It becomes resonance due to the capacitance C. The resonant angular frequency ω 0 is on the equation of Equation 1.

図２に示した出力電力Ｐ(t) が正の期間ａは、出力巻線Ｌｓ１〜Ｌｓｎから負荷に電流が流れる期間を示し、出力電力Ｐ(t) が負の期間ｂは、負荷から出力巻線Ｌｓ１〜Ｌｓｎへ電流が戻る期間を示す。

Period a in which the output power P (t) is positive shown in FIG. 2 indicates a period in which current flows from the output winding Ls1 to Lsn to the load, and period b in which the output power P (t) is negative A period in which the current returns to the windings Ls1 to Lsn is shown.

  In the stacked discharge circuit, in the case of n stages of stacking by n transformers, voltages generated in the output windings Ls1 to Lsn of the respective transformers are simultaneously stacked n stages. Therefore, the time until the voltage at the connection point between the output winding Lsn-1 of the n-1st transformer Tn-1 and the output winding Lsn of the nth transformer Tn reaches Vout (peak value: maximum value) Is delayed by the influence of the total inductance LLsn.

In order to improve the time delay, a series circuit of a diode (D1 to Dn-1) and a capacitor (C1 to Cn-1) is connected at each connection point of the output winding of each transformer to the second voltage generating side. Between the output terminal 2b and the output terminal 2b. Because of the high voltage, the inductance of each of the output windings Ls1 to Lsn is on the order of mH and is large, so that the phase lag is remarkable.
During the period a of FIG. 2, the resonance angular frequency ω1 at the time of charging the capacitance C from the connection point e on the lowest voltage side in FIG. Ls1 in Equation 2 means the inductance of the output winding Ls1.

Similarly, the voltage at the resonant angular frequency ω2,..., Ωn-1 charging the combined capacitance C through the capacitors C2,. It is sequentially stacked on C.
The diodes D1 to Dn-1 are provided in series with the capacitors C1 to Cn-1, respectively, so that the capacitors C1 to Cn-1 do not operate only during the period in which the electrostatic capacitance C is charged.

  In the stacked discharge circuit, theoretically, the inductances of the output windings Ls1 to Lsn are the same, and the output winding Lsn-1 of the n-1st transformer Tn-1 and the output winding Lsn of the nth transformer Tn The connection point of is the final. The resonance angular frequency ω n-1 at the time of charging the capacitance C from the connection point (the connection point h in FIG. 1) through the capacitor C n-1 is determined by the equation (3).

This is because the resonance in the circuit via each capacitor is completed from the connection point and the connection point one before, and the equation a in FIG. . Therefore, it is not necessary to consider the circuit in the previous stage, which is the same as resonance with only the inductance Lsn of the n-th output winding.
Therefore, the relationship of the following equation holds among the resonant angular frequencies ω 2,..., Ω n -1 only in the period a at the voltage of each connection point other than the final output voltage.
ω1 = ω2 = ···· = ωn-1 ·················· (8)
Here, the resonance angular frequency is ωc.

Here, in order for the output voltage P (t) to be on the above-mentioned equation (3), the half cycle of the above-mentioned equation (1) of the output voltage V (t) needs to be completed within the period a. It is.
Therefore, the capacitance of the capacitor in each of the series circuits of the diode and the capacitor described above may be set as follows. The resonant angular frequency ωc when charging the capacitance existing between the first output terminal 2a and the second output terminal 2b through the respective capacitors is a series of transformers T1 to T5 constituting the step-up transformer 3. The total inductance of the output windings Ls1 to Ls5 connected thereto and the bandwidth which is 1 to 2 times the resonance angular frequency ωo of the voltage resonance due to the capacitance may be allowed.
Then, the equation of Equation 4 is established from the equation of Equation 3.

  Here, in the stacked discharge circuit, the inductances of the output windings Ls1 to Lsn of the transformers T1 to Tn have the same value. Further, since the capacitance C and the capacitance of the capacitor Cn-1 connected to the (n + 1) th (uppermost) connection point are both positive real numbers, Assuming that the capacity of Cn-1 is given by

同様にして、ωｃ＝ω０のときには、コンデンサＣn-1の容量をＣn-1とすると、それは数６によって求まる。

Similarly, when ωc = ω0, assuming that the capacitance of the capacitor Cn−1 is Cn−1, it can be obtained by Equation 6.

Since the stacked discharge circuit has two or more stages of transformers, n ≠ 1.
When period a is completed, the process returns to period b. Although the relationship at this time is in the equation (7), since the voltage is dispersed in the period a, the peak value (Vout) decreases under the same condition.
From equation 6, n = 5, capacitances of the respective capacitors C1 = C2 = C3 = C4 = 1.25 C (combined capacitance C = 100 pF), input voltage Vin = 60 V (DC), that is, in the embodiment of FIG. The observed waveform of the case is shown in FIG.

Although this is also effective at this time, in the equation (5), the period a is maximized when the capacitance of each capacitor is 1.666 C (167 pF). The waveform shape is omitted since it is the same shape.

In this case, since the period a + b extends, the fixed switching frequency affects the time for performing necessary excitation (the ON period of each of the switching elements Q1 and Q2). When ωc exceeds ω0, the period a + b is broadened, and the output power P (t) according to equation (3) again becomes the + region and the power increases, but the switching elements Q1 and Q2 can not be turned on within that period.

When the switching elements Q1 and Q2 are turned on within this period, the output voltage is shorted and an excessive current flows. Therefore, in practice, it is necessary to reduce the ON time for exciting each transformer.
Therefore, in the embodiment in which a series circuit of a diode and a capacitor is connected between all the connection points and the second output terminal 2b, as described above, ωc is in the range of 1 to 2 times ω0 (ω0 to 2ω0) It is preferable to set each of the capacitors C1 to Cn so that

[Comparison with Comparative Example]
As a comparative example, an example of an inverter device to which the present invention is not applied is shown in FIG. The configuration of the step-up transformer 3 of this inverter device is the same as that of the step-up transformer 3 of the inverter device according to the present invention shown in FIG. However, the respective excitation windings Lp1 to Lp5 of the individual transformers T1 to T5 are all connected in parallel, and the respective excitation currents are switched by the common switching element Q. The output windings Ls1 to Ls5 are connected in series between the first output terminal 2a and the second output terminal 2b, but their mutual connection points e, f, g, h and the second A series circuit of a diode and a capacitor is not connected between the output terminal 2b. Others are the same as the inverter apparatus of FIG.

FIG. 6 is a waveform diagram showing an output waveform observation result according to the comparative example shown in FIG. 5. The time axis is the same as FIG. 2, and each waveform corresponds to each waveform shown in FIG.
Comparing the waveforms of the output power P (t) and the output voltage V (t) in FIGS. 2 and 6, the waveform value of the output voltage V (t) in FIG. 2 which is the waveform of the first embodiment Although Vout) is low, the period a is wide and the power conduction angle is wide. Therefore, it can be seen that the reactive power (resting time) is reduced and the power area is increased. Further, it can be understood that the output voltage V (t) is dispersed to the phase advance side by the equation (5).

At this time, the rise time dv · dt of the output voltage V (t) is steep due to the effect of the capacitor although the width of the output voltage V (t) is broadened because the output inductance is divided. There is.
In addition, in a range where the capacitances of the capacitors C1 to C4 (Cn-1) satisfy the equations (5) and (6), the power is increased in accordance with the 1⁄4π advance phase of the output voltage V (t).
The amount by which the peak value (Vout) of the output voltage V (t) is lowered can be adjusted by, for example, raising the input voltage Vin and extending the ON time of the first and second switching elements Q1 and Q2 is there. The specific example is mentioned later.

Second Embodiment
A second embodiment of the inverter device according to the invention is shown in FIG.
In this inverter device, the diodes D1 to D4 and the capacitors C1 to C4 are respectively connected between the connection points e, f, g, h of the output windings Ls1 to Ls5 of the transformers T1 to T5 and the second output terminal 2b. Each series circuit of C4 is connected. The only difference from the first embodiment shown in FIG. 1 is that inductors L1 to L4 are inserted in the respective series circuits.

In the first embodiment, as shown in FIG. 2, the power waveform has a lot of ringing. Therefore, in the second embodiment shown in FIG. 7, some inductors L1 to L4 are inserted in series with the capacitors C1 to C4, respectively. Thereby, the ringing of the power waveform can be reduced, and the waveform of the output power P (t) becomes a waveform with less ringing as shown in FIG.
In the example shown in FIG. 7, a diode D5 is interposed in a line connecting the lower end of the output winding Ls1 of the lowermost transformer T1 and the first output terminal 2a on the frame ground side. Although this is a surge absorber for eliminating ringing, it may be omitted from the function of the present invention.
Also in this case, the number of transformers constituting the step-up transformer 3 may be two or more.

  FIG. 8 shows the output voltage V (t) and the connection points e to h when the inductances of the output windings Ls1 to Ls5 of the transformers T1 to T5 are not the same (the inductances of the excitation windings Lp1 to Lp5 are the same). It is a wave form diagram which shows the voltage waveform observation result of. When the inductances of the output windings differ as described above, adjustment becomes difficult.

Third Embodiment
Next, a third embodiment of the inverter device according to the present invention will be described with reference to FIGS. FIG. 9 is a circuit diagram similar to FIG. 1 of the inverter device, and FIGS. 10 and 11 are waveform diagrams showing output waveform observation results of the third embodiment.
The inverter device shown in FIG. 9 is a diode only between the connection point g and the second output terminal 2b among the connection points e to h of the output windings Ls1 to Ls5 of the five transformers T1 to T5. A series circuit of D3 and a capacitor C3 is connected. An inductor may be connected in series to this series circuit. The other configuration is the same as that of the first embodiment described with reference to FIG.

Also in this case, the number of transformers constituting the step-up transformer 3 may be two or more, and therefore, the case of n will be generalized and described.
The number of transformers constituting the step-up transformer 3 is n (n is an integer of 2 or more), and a diode is connected only at the connection point between the n-th transformer and the (n-1) -th transformer output winding from the frame ground side And a series circuit of capacitors are connected.

The series circuit of the diode and the capacitor functions as a phase advancing circuit, but as described above, when the series circuit is connected only between the uppermost connection point and the second output terminal 2b on the high voltage output side The effect is on the output winding of the lower transformer. Therefore, depending on the number of transformers, it may not be able to advance the phase and a sufficient effect may not be obtained.
Therefore, it is desirable to connect a series circuit of a diode and a capacitor to a connection point at a position closest to the middle or in the center of the arrangement direction among the connections among the output windings of n transformers.

Therefore, if the total number of connection points between the output windings of n transformers is odd, the arrangement position is at the middle connection point, and if even, the arrangement position is at one of the two connection points closest to the middle, It is desirable to connect a series circuit of a diode and a capacitor.
In the embodiment shown in FIG. 9, since the number of transformers is five and the number of connection points is four (even), the two connection points f closest to the center of the arrangement direction of the connection points e to h are provided. A series circuit of a diode D3 and a capacitor C3 is connected to one of connection points g of G and G.

  In this case, in the same manner as the above calculation, only the value at Ls between the placements changes, so in the case of two jumps, Cn−2 = | n / (n−2) | · C ̃n · C / It becomes a range of 2.

As shown in FIG. 9, the output waveform observation result is shown when n = 5 (five transformers are stacked), the capacitance of the capacitor C3 is 167 pF to 250 pF (C = 100 pF), and the input voltage Vin = 60 V (DC). It is shown in FIG.
As can be seen from this figure, the period a is not wide as compared to the case where a series circuit of diodes and capacitors is connected to all the connection points. However. Since the voltage advance is performed to some extent and the output power P (t) is increased, the operation and effect are sufficient.
If the capacitance of the capacitor C3 is large, there is a risk that the resonance balance of the output voltage may be broken, but the resonance time for securing the excitation time as compared to the case where a series circuit of a diode and a capacitor is connected to all connection points. There is little influence on it.

In FIG. 10, the capacitance of the capacitor C3 in FIG. 9 is within the above-mentioned preferable range of Cn-2 = | n / (n-2) | .C to n.C / 2 (ωc is ω0 to 2ω0) The waveform in one case is shown.
FIG. 11 is a waveform diagram showing an output waveform observation result in the case where the capacitance C3 of the capacitor C3 in FIG. 9 is a value out of the desirable range, for example, 400 pF. In this case, the balance between the period a and the period b is broken, and the period a does not extend sufficiently.

Fourth Embodiment
Next, a fourth embodiment of the inverter device according to the present invention will be described with reference to FIGS. FIG. 12 is a circuit diagram similar to FIG. 1 of the inverter device, and FIG. 13 to FIG. 15 are waveform diagrams showing output waveform observation results in the case where input voltages of the fourth embodiment are different.
The inverter device shown in FIG. 12 has two connection points e and g among the connection points e to h of the output windings Ls1 to Ls5 of the five transformers T1 to T5 and the second output terminal 2b. A series circuit of a diode and a capacitor is connected between them.

  A series circuit of a diode D1 and a capacitor C1 is connected to the connection point e in a direction in which current flows toward the second output terminal 2b. A series circuit of a diode D3 and a capacitor C3 is connected to the connection point g in a direction in which current flows toward the second output terminal 2b. An inductor may be connected in series to these series circuits. The other configuration is the same as that of the first embodiment described with reference to FIG.

Also in this case, the number of transformers constituting the step-up transformer 3 may be two or more, and therefore, the case of n will be generalized and described.
When the number of transformers constituting the step-up transformer 3 is n (n is an integer of 2 or more), the total number of mutual connection points of the output windings Ls1 to Lsn of the respective transformers T1 to Tn is n-1. .
In a direction in which current flows toward the second output terminal 2b between each connection point of 1/2 or more of the total number n-1 of the connection points and the second output terminal 2b on the high voltage output side , Connect a series circuit of a diode and a capacitor (function as a phase advancing circuit). In that case, it is desirable that the connection points connecting the series circuits be disposed at substantially equal intervals between both ends of the mutual connection points of the output windings Ls1 to Lsn.

The inverter device shown in FIG. 12 is the case of the number of transformers n = 5, and the total number of connection points is four. As the two connection points that are 1⁄2, the connection point e at the bottom (frame ground side), the second connection point g from the top (from the high voltage output side), and the second output terminal 2b Between them, series circuits of diodes D1 and D3 and capacitors C1 and C3 are connected, respectively.
FIG. 13 is a waveform diagram showing an output waveform observation result in the case of operating with the input voltage Vin of the inverter device lowered.

FIG. 14 is a waveform chart showing the output waveform observation results in the case where the input voltage is raised to adjust the output voltage, and FIG. 15 is the case where the input voltage is further raised to adjust the output voltage. The voltage scale on the left vertical axis and the power scale on the right vertical axis in each waveform diagram are significantly different.
In any case, the conduction angle corresponding to the period a is broadened to increase the output power P (t), and the phase advance of the output voltage V (t) is also achieved, and a sufficient effect is obtained.
Further, the output voltage and the output power can be arbitrarily adjusted by changing the magnitude of the input voltage Vin.

Summary of Embodiment
The embodiments of the inverter device according to the present invention described above are summarized as follows.
The excitation current of the excitation winding Lpn of the transformer Tn on the second output terminal side (voltage generation side) of the n transformers T1 to Tn constituting the step-up transformer 3 is switched by the first switching element Q1. The excitation windings Lp1 to Lpn-1 of the other transformers T1 to Tn-1 are connected in parallel, and the excitation current of each excitation winding is switched by the second switching element Q2.

Then, at least one connection point and the second output terminal 2b among the connection points e, f, g, etc. of the respective output windings Ls1 to Lsn-1 of the n transformers T1 to Tn connected in series with each other. And a series circuit of a diode (D1, D2, D3, etc.) and a capacitor (C1, C2, C3, etc.) in the direction in which the current flows toward the second output terminal 2b.
The at least one connection point is preferably the middle connection point if the total number of the connection points is odd, and if the even number is one of the two connection points closest to the middle the alignment position. Is desirable.

Among the connection points e, f, g, etc. of the output windings Ls1 to Lsn-1 connected in series with each other of the above n transformers, two connection points having a uniform arrangement position and a second It is further desirable to connect a series circuit of a diode and a capacitor to the output terminal 2b, respectively.
A series circuit of the diode and the capacitor may be connected between the second output terminal 2b and each connection point which is 1/2 or more of the total number of connection points.
It is best if the series circuit of the diode and the capacitor is connected between all of the connection points and the second output terminal 2b.
The ringing of the output power can be reduced by inserting an inductor in series in the series circuit of the diode and the capacitor as shown in the embodiment of FIG.

  The capacitance of each capacitor (C1, C2, C3, etc.) in each series circuit of the diode and the capacitor is the capacitance C existing between the first output terminal 2a and the second output terminal 2b through the respective capacitors. The resonance angular frequency (ωc) at the time of charging is the total inductance of the output windings Ls1 to Lsn connected in series of the transformers T1 to Tn constituting the step-up transformer 3 and the resonance angular frequency of voltage resonance due to the capacitance. It is desirable to have a capacity that results in a bandwidth that is 1 to 2 times (ω o).

The capacitance C between the first and second output terminals 2a and 2b is the combined capacitance of the capacitance Cs and the load capacitance Co distributed or parasitic between the output windings Ls1 to Lsn of the transformers T1 to Tn. It is.
The balance of the output waveform is in the resonant state when the resonant angular frequency ωc at the time of charging the capacitance through the capacitors is in the range of 1 to 2 times the resonant angular frequency ω o of the entire output circuit. The best results are obtained. If out of this range, the rate at which the waveform of the output voltage is distorted becomes large, but the operation and effect of the present invention can be sufficiently obtained.
In each of the above-described embodiments, the output windings of the n transformers constituting the step-up transformer are all in series between the first output terminal on the frame ground side and the second output terminal on the voltage generation side. Connected However, the present invention is not limited to this, and the output windings may be connected so as to mix series and parallel.

In each of the above embodiments of the present invention, the phase of the output voltage of the inverter device is partially advanced, the conduction angle is expanded to increase the power, and the difference between the timings at which the output voltage and the output power peak respectively is reduced. can do. As a result, it is possible to increase the period during which high voltage and high power can be applied (supplied) simultaneously to the load.
If this inverter device is used as a power supply of a plasma generator, plasma can be generated efficiently.

For example, atmospheric pressure plasma is applied to various industrial products such as surface modification and removal of contaminants as one means of surface treatment. When adhesion, printing, coating or the like of a resin or the like is performed, the wettability can be improved by performing pretreatment with atmospheric pressure plasma.
When trying to coat a UV curable varnish on a printed material on which resin toner is printed by an electrophotographic image forming apparatus, the wax component of the resin toner may repel the varnish of the resin toner printed portion .

However, when the surface treatment with atmospheric pressure plasma is performed, the wettability is improved, which enables varnish coating and improves the added value of the printed matter. In addition, the coloration of the ink is improved, and the ink adhesion amount is reduced. That is, it is also an environmental response technology.
A high voltage is required to generate the atmospheric pressure plasma, and a high voltage can be efficiently applied by the inverter device according to the present invention, and a large amount of radical species necessary for surface treatment can be stably supplied.

As mentioned above, although each embodiment of this invention has been described, the concrete composition of each part of the embodiment, the contents of operation, etc. are not restricted to what was indicated there.
Further, it is needless to say that the present invention is not limited to the above-described embodiments, and is not limited at all except having the technical features described in the respective claims of the claims.
Furthermore, the circuit examples, operation examples, modifications and the like of the embodiments described above may be changed or added as appropriate, or some parts may be deleted, and may be arbitrarily combined and implemented as long as no contradiction arises. Of course it is possible.

1a, 1b: input terminal 2a: first output terminal (frame ground side)
2b: second output terminal (voltage generation side) 3: boost transformer 5: control circuit
T1 to T5: Transformers Lp1 to Lp5: Excitation windings Ls1 to Ls5: Output windings (and their inductances)
Q1: first switching element Q2: second switching element
R, R1, R2: Protection resistors D1 to D5: Diodes
C1 to C4: capacitors (and their capacities)
Co: Load capacity C: Capacitance (synthetic capacity) L1 to L4: Inductor
Vin: Input voltage V (t): Output voltage Vout: Peak value P (t): Output power

JP, 2012-186984, A

Claims (7)

A step-up transformer is constituted by individual n (n is an integer of 2 or more) transformers having the same characteristics, and an input voltage is applied to each excitation winding of the n transformers to switch the exciting current flowing. A switching element is provided, and each output winding of the n transformers is mixed in series or in series and in parallel between the first output terminal on the frame ground side and the second output terminal on the voltage generation side. An inverter device connected to generate an output voltage alternating between the first and second output terminals,
The switching element is composed of a first switching element and a second switching element which are on / off driven by the same switching signal,
The excitation current of the excitation winding of the transformer closest to the second output terminal among the n transformers is switched by the first switching element, and the excitation windings of the other transformers are connected in parallel. And the excitation current of each excitation winding is switched by the second switching element,
The current flowing between the at least one connection point of the n output transformers connected to each other in series and the second output terminal toward the second output terminal. An inverter device characterized in that a series circuit of a diode and a capacitor is connected in the flow direction of the.   The at least one connection point is a connection point at the center of the array if the total number of connection points is an odd number, and if the number is even, it is one of two connection points at the array position closest to the center The inverter device according to claim 1, wherein   Among the connection points of the output windings of the n transformers connected in series with each other, the second output terminal may be connected between two connection points having an equal arrangement position and the second output terminal. The inverter device according to claim 1, wherein a series circuit of the diode and the capacitor is connected in a direction in which current flows toward the output terminal of the.   Among the connection points of the output windings of the n transformers connected in series with each other, between each of the connection points of 1/2 or more of the total number of the connection points and the second output terminal, The inverter device according to claim 1, wherein series circuits of the diode and the capacitor are connected in a direction in which current flows toward the second output terminal.   The inverter device according to claim 1, wherein each connection point which is 1/2 or more of the total number of connection points is all the connection points.   The inverter apparatus according to any one of claims 1 to 5, wherein an inductor is inserted in series in the series circuit of the diode and the capacitor. When the capacitance of the capacitor in each of the series circuit of the diode and the capacitor charges the capacitance existing between the first output terminal and the second output terminal through the capacitor, the resonant angular frequency (ωc) is A total inductance of the output winding connected in series of each of the transformers constituting the step-up transformer, and a capacitance having a bandwidth which is 1 to 2 times the resonant angular frequency (ω o) of voltage resonance due to the electrostatic capacitance; The inverter apparatus according to any one of claims 1 to 6, wherein

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