JP2016067198A - Inverter device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inverter device that can increase a period for which a high voltage and large power are simultaneously applied (supplied) to a load.SOLUTION: A step-up transformer 3 is constructed by two or more transformers T1 to T5. Excitation current of an excitation winding Lp5 of the transformer T5 nearest to a second output terminal 2b side (voltage generation side) is switched by a first switching element Q1. The respective excitation windings Lp1 to Lp4 of the other transformers T1 to T4 are connected to one another in parallel, and each excitation current thereof is switched by a second switching element Q2. The first and second switching elements Q1, Q2 are subjected to ON/OFF control at the same time by a control circuit 5. A series circuit of diodes (D1 to D4) and capacitors (C1 to C4) is connected between the second output terminal 2b and each of the connection points e to h of the respective output windings Ls1 to Ls5 of the transformers T1 to T5 which are connected to one another in series in a direction along which current flows to the second output terminal 2b.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an inverter device in which a step-up transformer is constituted by a plurality of individual transformers having the same characteristics.

An inverter device is used to supply a high voltage to various devices such as a discharge tube for a large plasma display and a plasma generator.
In general, an output power value of about several watts is often used, but an inverter device having an AC output with an output voltage of several kV and a power value of several tens of watts or more is used for a plasma generator or the like. The

As a power supply device for supplying such a high voltage, there is a high voltage inverter device described in Patent Document 1. In the high voltage inverter device, as shown in FIG. 16, a step-up transformer T is constituted by a plurality of transformers T1 and T2 having separate cores and having the same characteristics.
Then, the input voltage Vin is switched by the switching element Q which is controlled to be turned on / off by the control circuit, and the exciting windings Np1 and Np2 connected in parallel to the transformers T1 and T2 are simultaneously excited by exciting them.
The output windings Ns1 and Ns2 of the transformers T1 and T2 are connected in series with each other, and an AC high voltage output voltage Vout on which voltage waveforms induced in the output windings Ns1 and Ns2 are superimposed is output to the load. To do. As the load, for example, a load having a load capacity Co such as an electrode of a plasma generator is connected.

However, in such a conventional inverter device, the output power is maximized when the output voltage is advanced by (1/4) π with respect to the output voltage, and the amplitude becomes 0 (zero) when the output voltage is maximum. turn into.
Unless a high voltage and large power are simultaneously applied (supplied) to a load such as a plasma generator, plasma cannot be generated efficiently. However, as described above, the conventional high-voltage inverter device cannot sufficiently achieve it.

  The present invention has been made in view of such a background, reduces the difference in timing at which the output voltage and output power in the inverter device become maximum, and simultaneously applies (supply) high voltage and large power to the load. The purpose is to increase the possible period.

In order to achieve the above object, the present invention forms a step-up transformer by individual n transformers (n is an integer of 2 or more) having the same characteristics, and inputs each of the excitation windings of the n transformers. A switching element is provided for switching an exciting current to be applied by applying a voltage, and each output winding of the n transformers is connected between a first output terminal on the frame ground side and a second output terminal on the voltage generation side. Connected to each other in series or in series and parallel to each other, and generates an output voltage that alternates between the first and second output terminals,
The switching element is composed of a first switching element and a second switching element that are driven on and off by the same switching signal, and among the n transformers, the transformer of the transformer on the second output terminal side most. The exciting current of the exciting winding is switched by the first switching element, the exciting windings of the other transformers are connected in parallel, and the exciting current of each exciting winding is changed by the second switching element. To switch,
Of the n number of transformers connected in series with each other, the current between the at least one of the output windings and the second output terminal is directed toward the second output terminal. It is characterized in that a series circuit of a diode and a capacitor is connected in the direction in which current flows.

  In the inverter device according to the present invention, the difference in timing at which the output voltage and the output power are maximized is reduced, and the period during which high voltage and large power can be simultaneously applied (supplied) to the load can be increased.

1 is a circuit diagram of a first embodiment of an inverter device according to the present invention. FIG. It is a wave form diagram which similarly shows the output waveform observation result by the 1st Embodiment. Similarly, the waveforms of the output voltage and output power are clarified and are shown together with the waveform of the drain current of the switching element. It is a wave form diagram which shows the change of each drain voltage of a 1st, 2nd switching element similarly. It is a circuit diagram which shows the comparative example of the inverter apparatus corresponding to FIG. 1 at the time of not applying this invention. It is a wave form diagram which similarly shows the output waveform observation result by the comparative example. It is a circuit diagram of 2nd Embodiment of the inverter apparatus by this invention. It is a wave form diagram which shows the voltage waveform observation result of an output voltage and each connection point when the inductance of the output winding of each transformer is not the same. It is a circuit diagram of 3rd Embodiment of the inverter apparatus by this invention. Similarly, it is a waveform diagram showing an output waveform observation result when the capacitance of the capacitor of the third embodiment is within a desirable range. FIG. Similarly, it is a waveform diagram showing an output waveform observation result when the capacitance of the capacitor of the third embodiment is outside the desirable range. It is a circuit diagram of 4th Embodiment of the inverter apparatus by this invention. It is a wave form diagram which similarly shows the output waveform observation result by the 4th Embodiment. Similarly, it is a waveform diagram showing an output waveform observation result when the output voltage is adjusted by raising the input voltage according to the fourth embodiment. Similarly, it is a waveform diagram showing an output waveform observation result when the input voltage according to the fourth embodiment is further increased to adjust the output voltage. It is a circuit diagram which shows the principal part of an example of the conventional inverter apparatus. It is a wave form diagram which shows the relationship between the output voltage of the inverter apparatus, output current, and output electric power.

First, the basic concept of the present invention will be described.
The output side of the high voltage inverter device as shown in FIG. 16 includes an inductance Ls in which output windings of the transformers T1 and T2 are connected in series, and a capacitance Cs distributed or parasitic between the output windings. A voltage resonance circuit is formed by a combined capacitance with the load capacitance Co.
The resonance constants of the voltage resonance circuit are Ls, Cs, and Co. However, since a strong magnetic field is applied to the electrical path and its resonance constant changes due to temperature, line length deviation, etc., the output voltage Vout alternating with the high voltage is not limited to the fundamental wave, It becomes the output waveform that entered. Therefore, when the output voltage is Fourier-expanded, it is decomposed into a voltage that alternates in a high order and attenuates.

Here, the resonance constants Ls and Cs are combined characteristics of the plurality of transformers T1 and T2. When the number of transformers is two, the output inductance of each transformer is approximately Ls / 2, and the capacitance Cs (excluding load capacitance Co) such as parasitic capacitance is approximately 2 · Cs.
The output voltage is an alternating voltage of several kV to several tens of kV, and the average output power is in the range of several W to several tens of kW.

In the ideal state, the output voltage V (t) of the parallel resonance is expressed by the following equation.
V (t) = Vout sin (ωt) (1)
Here, Vout is the maximum value (V) of the output voltage, and ω is the angular frequency. ω has a relationship of ω = 2πfo with respect to the resonance frequency f0 in the LC resonance state.
Therefore, the resonance angular frequency ωo in the resonance state is ωo = 1 / √LC.

The output current I (t) flowing through the output circuit is expressed by the following equation.
I (t) = Iout cos (ωt) (2)
Accordingly, the phase of the output current I (t) is advanced by (1/2) π rad (radian) with respect to the output voltage V (t).
The load is applied with power P (t) that is the product of the output voltage V (t) and the output current I (t).

From the trigonometric addition theorem, the output power P (t) is obtained by the following equation.
P (t) = Vout sin (ωt) · Iout cos (ωt)
= Vout · Iout {sin (ωt + ωt) + sin (0)} / 2
= Vout · Iout · sin (2ωt) / 2 (3)
Therefore, the maximum value Pmax of the output power is
Pmax = Vout · Iout / 2 (4)
And no more.

FIG. 17 shows the relationship among the output voltage V (t), the output current I (t), and the output power P (t) as a waveform diagram with the horizontal axis as the time axis.
As can be seen from FIG. 17, both the output voltage V (t) and the output current I (t) have a period of 2π (radian), and the output current I (t) is π / 2 from the output voltage V (t). Only the phase is advanced.
Further, the cycle of the output power P (t) is π, and the phase is advanced by 1/8 cycle (π / 4) when the output voltage V (t) is used as a reference. The maximum value is obtained when the output voltage V (t) = the output current I (t).

Therefore, if the output voltage V (t) and the output current I (t) are matched to the maximum value of the output power P (t) by shifting the phase, the maximum value of the output power increases and the output voltage Since the timing at which the output power becomes maximum coincides, the best state is obtained. Therefore,
V (t) = Vout sin {ωt + (1/4) π) (5) and I (t) = Iout cos {ωt− (1/4) π) (6) )
You can do that.

The average power Pm is a difference between the area A of the positive period a and the area B of the negative period b, in which the waveform of the output power P (t) in FIG. It becomes.
Pm = A−B (7)
This difference becomes the power consumption of the load.
In the ideal state of parallel resonance, Pm = 0, but when the load is in a plasma generation state, loss of heat, sound, light (partly plasma), radio waves, vibration, etc. occurs due to dielectric loss of the load capacitance. Actually, A> B. Therefore, Pm> 0.

  What is noticeable in the present invention is the maximum value of the output power P (t) where the output voltage is advanced by (1/4) π. Since the output power P (t) is in phase advance from the output voltage V (t) according to the equation (1), the equation (5) is obtained by matching the phase of the output voltage when the output power P (t) is maximum. Formula (5) is a phase advance from Formula (1). As a result, the output power increases, so that the difference in equation (7) is further increased.

The output current I (t) only needs to satisfy Expression (6), but only one of them can be adjusted. That is, if it is going to satisfy | fill Formula (5) and Formula (6) simultaneously, it will remove | deviate from parallel resonance.
However, in reality, it is only necessary to increase A in Expression (7). Therefore, in the present invention, the phase of the output voltage is shifted so that the output resonance state is not lost, the output power is increased, and the phase difference between the output voltage and the output power is reduced.

Hereinafter, embodiments for carrying out the present invention will be specifically described with reference to the drawings.
[First Embodiment]
FIG. 1 is a circuit diagram of a first embodiment of an inverter device according to the present invention.
In the inverter device shown in FIG. 1, a step-up transformer 3 is constituted by five individual transformers T1 to T5 (with different cores) having the same characteristics. The excitation currents are caused to flow by applying the input voltage Vin supplied from the first and second input terminals 1a and 1b to the respective excitation windings Lp1 to Lp5 of the five transformers T1 to T5. Are switched simultaneously. The switching element for that purpose is composed of a first switching element Q1 and a second switching element Q2.

  In the first switching element Q1 and the second switching element Q2, the same switching signal output from the control circuit 5 is applied to the gate via the protective resistor R1 or R2, respectively, and is turned on / off. Type FET. The switching signal is, for example, a rectangular wave pulse signal having a constant period of about 20 kHz, and the duty that is the ratio of the ON time within one period can be varied.

The first switching element Q1 is connected in series with the excitation winding Lp5 of the transformer T5 between the input terminals 1a and 1b to which the input voltage Vin is supplied, and switches only the excitation current of the excitation winding Lp5. .
All the excitation windings Lp1 to Lp4 of the transformers T1 to T4 are connected in parallel, and the parallel circuit is connected in series with the second switching element Q2 between the input terminals 1a and 1b. Therefore, the second switching element Q2 switches the excitation current of each excitation winding Lp1 to Lp4 of the transformers T1 to T4.

On the other hand, the output windings Ls1 to Ls5 of the five transformers T1 to T5 constituting the step-up transformer 3 are provided between the first output terminal 2a on the frame ground side and the second output terminal 2b on the voltage generation side. They are connected in series with each other. Then, an output voltage V (t) that alternates between the first and second output terminals 2a and 2b is generated.
Although not shown in FIG. 1, a load such as a plasma generator having a load capacity Co is connected between the first and second output terminals 2a and 2b, as in the conventional example shown in FIG. .

The capacitance C between the first and second output terminals 2a and 2b is a combination of the capacitance Cs distributed and parasitic between the output windings Ls1 to Ls5 of the transformers T1 to T5 and the load capacitance. Capacity.
The first input terminal 1a, the first output terminal 2a, and the source terminals of the first and second switching elements Q1, Q2 are all connected to a frame ground (earth) GND. The control circuit 5 is supplied with the input voltage Vin from the input terminals 1a and 1b.

  The transformers T1 to T5 store energy during the period in which the excitation current flows through the excitation windings Lp1 to Lp5, respectively. When the excitation current is turned off, the transformers T1 to T5 discharge the energy to the output windings Ls1 to Ls5 to generate secondary voltages. And the above-described voltage resonance occurs on the secondary side. Since the secondary voltages generated in the output windings Ls1 to Ls5 connected in series are added so as to accumulate, the alternating output voltage V (t) has an output power close to 5 times that of a single transformer. can get. Such an inverter circuit is referred to as a “stacked discharge circuit” in this specification.

  Further, the output windings Ls1 to Ls5 of the five transformers T1 to T5 of the first embodiment connected in series are connected to each other at connection points e, f, g, and h. A series circuit of a diode and a capacitor is connected between each of the connection points e, f, g, h and the second output terminal 2b in such a direction that current flows toward the second output terminal 2b. . Each series circuit has a function of a phase advance circuit.

That is, a series circuit of the diode D1 and the capacitor C1 is connected between the connection point e and the second output terminal 2b, and a series circuit of the diode D2 and the capacitor C2 is connected between the connection point f and the second output terminal 2b. doing.
A series circuit of a diode D3 and a capacitor C3 is connected between the connection point g and the second output terminal 2b, and a series circuit of the diode D4 and the capacitor C4 is connected between the connection point h and the second output terminal 2b. doing.

FIG. 2 is a waveform diagram showing output waveform observation results according to the first embodiment, and FIG. 3 is a waveform diagram showing the waveforms of the output voltage and output power together with the waveform of the drain current of the switching element. is there. FIG. 4 is a waveform diagram showing changes in drain voltages of the first and second switching elements Q1, Q2 in the same manner.
In addition to the output voltage V (t) and the output power P (t), FIG. 2 also shows voltage waveforms generated at connection points e, f, g, and h of adjacent output windings in FIG. .

In FIG. 3, Id1 corresponds to the drain current of the first switching element Q1, that is, the exciting current of the transformer T5. Id2 corresponds to the drain current of the second switching element Q2, that is, the sum of the respective excitation currents of the transformers T1 to T4. The slopes of the current changes in the ON periods of the drain currents Id1 and Id2 are greatly different, and the slope of the drain current Id2 is larger.
As shown in FIG. 4, the waveforms of the drain voltage Vds1 of the first switching element Q1 and the drain current Vds2 of the second switching element Q2 are also greatly different.
As can be seen from FIGS. 2 and 3, the waveform of the output power P (t) is somewhat disturbed, but its area increases, and the positive peak of the waveform and the positive peak of the output voltage V (t) The time difference is shrinking.

In this embodiment, the step-up transformer 3 constituting the stacked discharge circuit is composed of five individual transformers having the same characteristics, but may be composed of n (n is an integer of 2 or more) transformers. This case will be described with reference to FIG.
1, the transformers T1, T2, T3,... From the lower side (frame ground side: first output terminal side) to the upper side (voltage generation side: second output terminal side) of FIG. Let Tn-1 and Tn. The excitation windings are Lp1, Lp2, Lp3,..., Lpn-1, Lpn, and the output windings are Ls1, Ls2, Ls3, ..., Lsn-1, Lsn.

Only the excitation winding Lpn of the uppermost transformer Tn is switched with the excitation current by the first switching element Q1. The excitation windings Lp1 to Lpn-1 of the lower transformers T1 to Tn-1 are connected in parallel to each other, and the respective excitation currents are simultaneously switched by the second switching element Q2.
The output windings Ls1 to Lsn of the transformers T1 to Tn are connected in series between the first output terminal 2a and the second output terminal 2b.

Each of the output windings Ls1 to Lsn connected to each other in series with each other,
A series circuit of a diode and a capacitor is connected between the second output terminal 2b and the second output terminal 2b in such a direction that current flows toward the second output terminal 2b.
In order to prevent the output winding Lsn of the transformer Tn on the highest output voltage side from being affected by resonance due to a series circuit of a diode and a capacitor, only the exciting current of the transformer Tn is an independent first switching element. Switching is performed at Q1.

  In the stacked discharge circuit, a static capacitance that is a combined capacitance of the sum of the inductances of the output windings Ls1 to Lsn (referred to as total inductance ΣLsn) and the electrostatic capacitance distributed or parasitic between the output windings and the load capacitance. Resonance occurs due to the capacitance C. The resonance angular frequency ω0 is on the equation (1).

図２に示した出力電力Ｐ(t) が正の期間ａは、出力巻線Ｌｓ１〜Ｌｓｎから負荷に電流が流れる期間を示し、出力電力Ｐ(t) が負の期間ｂは、負荷から出力巻線Ｌｓ１〜Ｌｓｎへ電流が戻る期間を示す。

A period a in which the output power P (t) is positive shown in FIG. 2 indicates a period in which current flows from the output windings Ls1 to Lsn to the load, and a period b in which the output power P (t) is negative is output from the load. The period during which the current returns to the windings Ls1 to Lsn is shown.

  In the stacked discharge circuit, when n stages are stacked by n transformers, voltages generated in the output windings Ls1 to Lsn of each transformer are simultaneously stacked in n stages. Therefore, the time until the voltage at the connection point between the output winding Lsn-1 of the (n-1) th transformer Tn-1 and the output winding Lsn of the nth transformer Tn reaches Vout (peak value: maximum value). Is delayed by the influence of the total inductance ΣLsn.

In order to improve the time delay, a series circuit of diodes (D1 to Dn-1) and capacitors (C1 to Cn-1) is connected to the second side on the voltage generation side for each connection point of the output winding of each transformer. The output terminal 2b is connected. Because of the high voltage, the inductance of each of the output windings Ls1 to Lsn is on the order of mH, and since it is large, the lagging phase is significant.
2, the resonance angular frequency ω1 when charging the capacitance C through the capacitor C1 from the connection point e on the lowest voltage side in FIG. Ls1 in Equation 2 means the inductance of the output winding Ls1.

Similarly, the voltages of the resonance angular frequencies ω2,..., Ωn−1 that charge the combined capacitance C through the capacitors C2,. C is sequentially stacked.
Diodes D1 to Dn-1 are provided in series with the capacitors C1 to Cn-1 so that the capacitors C1 to Cn-1 perform the above-described operation only during the period of charging the capacitance C.

  In the stacked discharge circuit, the inductances of the output windings Ls1 to Lsn are theoretically the same, and the output winding Lsn-1 of the n-1th transformer Tn-1 and the output winding Lsn of the nth transformer Tn The connection point is the final. The resonance angular frequency ωn-1 when charging the capacitance C from the connection point (connection point h in FIG. 1) through the capacitor Cn-1 is obtained by the equation (3).

This is because the resonance in the circuit through each capacitor from the connection point before and one point before is completed, and the period a in FIG. . Therefore, it is not necessary to consider the circuit in the previous stage, and this is the same as resonating only with the inductance Lsn of the nth output winding.
Therefore, the relationship of the following equation is established between the resonance angular frequencies ω2,..., Ωn−1 only in the period a at the voltage at each connection point other than the last output voltage.
ω1 = ω2 = ・ ・ ・ ・ ＝ ωn-1 (8)
This resonance angular frequency is ωc here.

Here, in order for the output voltage P (t) to be on the above-described equation (3), the half cycle of the above-described equation (1) of the output voltage V (t) needs to be completed within the period a. It is.
Therefore, the capacitance of the capacitor in each of the above-described series circuit of the diode and the capacitor may be set as follows. The resonance angular frequency ωc when charging the capacitance existing between the first output terminal 2a and the second output terminal 2b through the capacitors is the series of the transformers T1 to T5 constituting the step-up transformer 3. It is preferable that the output windings Ls1 to Ls5 connected to be allowed to have a bandwidth that is 1 to 2 times the resonance angular frequency ωo of the voltage resonance by the capacitance.
Then, Equation 4 is established from Equation 3.

  Here, in the stacked discharge circuit, the inductances of the output windings Ls1 to Lsn of the transformers T1 to Tn have the same value. Further, since the capacitance C and the capacitance of the capacitor Cn-1 connected to the (n + 1) th (topmost) connection point are both positive real numbers, the capacitor Cn-1 is obtained from the equation (4). If the capacity of Cn-1 is assumed, it can be obtained by Equation 5.

同様にして、ωｃ＝ω０のときには、コンデンサＣn-1の容量をＣn-1とすると、それは数６によって求まる。

Similarly, when ωc = ω0, if the capacitance of the capacitor Cn−1 is Cn−1, it can be obtained by Equation 6.

In the stacked discharge circuit, n ≠ 1 since the transformer has two or more stages.
When the period a is completed, the process returns to the period b. Although the relationship at this time is in the equation (7), since the voltage is dispersed in the period a, the peak value (Vout) decreases under the same conditions.
From the equation (6), when n = 5, the capacitance of each capacitor C1 = C2 = C3 = C4 = 1.25C (combined capacitance C = 100 pF), and the input voltage Vin = 60 V (DC), that is, in the embodiment of FIG. The observed waveform in this case is shown in FIG.

Although the effect is also exhibited at this time, in the formula (5), the period a is maximized when the capacitance of each capacitor is 1.666 C (167 pF). Since the waveform shape is the same, it is omitted.

In this case, since the period a + b is widened, at a fixed switching frequency, the necessary excitation time (ON period of each switching element Q1, Q2) is affected. When ωc exceeds ω0, the period a + b widens, and the output power P (t) according to the equation (3) becomes a + region again, and the power increases. However, the switching elements Q1 and Q2 cannot be turned on within that period.

If the switching elements Q1 and Q2 are turned ON within this period, the output voltage is short-circuited and an excessive current flows. Therefore, in practice, it is necessary to reduce the ON time for exciting each transformer.
Therefore, in the embodiment in which the series circuit of the diode and the capacitor is connected between all the connection points and the second output terminal 2b, as described above, ωc ranges from 1 to 2 times (ω0 to 2ω0) of ω0. The capacitors C1 to Cn may be set so that

[Comparison with comparative example]
As a comparative example, an example of an inverter device to which the present invention is not applied is shown in FIG. The configuration of the step-up transformer 3 of this inverter device is the same as the step-up transformer 3 of the inverter device according to the present invention shown in FIG. However, the respective excitation windings Lp1 to Lp5 of the individual transformers T1 to T5 are all connected in parallel, and the respective excitation currents are switched by the common switching element Q. Each of the output windings Ls1 to Ls5 is connected in series between the first output terminal 2a and the second output terminal 2b, and the mutual connection points e, f, g, h and the second are connected. A series circuit of a diode and a capacitor is not connected between the output terminal 2b. Others are the same as the inverter apparatus of FIG.

FIG. 6 is a waveform diagram showing an output waveform observation result according to the comparative example shown in FIG. 5. The time axis is the same as that in FIG. 2, and each waveform corresponds to each waveform shown in FIG.
Comparing the waveforms of the output power P (t) and the output voltage V (t) in FIG. 2 and FIG. 6, the waveform of FIG. 2 which is the waveform of the first embodiment is the peak value of the output voltage V (t) ( Vout) is low, but the period a is wide and the power conduction angle is wide. Therefore, it can be seen that the reactive power (resting time) decreases and the power area increases. Further, it can be seen that the output voltage V (t) is dispersed on the phase advance side according to the equation (5).

At this time, since the rise time dv · dt of the output voltage V (t) divides the output inductance, the output voltage V (t) becomes steep due to the effect of the capacitor even though the width of the output voltage V (t) is widened. Yes.
In addition, in the range where the capacitances of the capacitors C1 to C4 (Cn-1) satisfy the equations (5) and (6), the power increased in accordance with the 1/4 pi phase of the output voltage V (t).
The amount of decrease in the peak value (Vout) of the output voltage V (t) can be adjusted by increasing the input voltage Vin and increasing the ON time of the first and second switching elements Q1 and Q2. is there. Specific examples thereof will be described later.

[Second Embodiment]
FIG. 7 shows a second embodiment of the inverter device according to the present invention.
This inverter device also includes diodes D1 to D4 and capacitors C1 to C1 between the connection points e, f, g, and h of the output windings Ls1 to Ls5 of the transformers T1 to T5 and the second output terminal 2b, respectively. Each series circuit of C4 is connected. The only difference from the first embodiment shown in FIG. 1 is that the inductors L1 to L4 are inserted in the respective series circuits.

In the first embodiment, the power waveform has a lot of ringing as shown in FIG. Therefore, in the second embodiment shown in FIG. 7, some inductors L1 to L4 are inserted in series with the capacitors C1 to C4, respectively. As a result, ringing of the power waveform can be reduced, and the waveform of the output power P (t) becomes a waveform with less ringing as shown in FIG.
In the example shown in FIG. 7, a diode D5 is inserted in a line connecting the lower end of the output winding Ls1 of the lowermost transformer T1 and the first output terminal 2a on the frame ground side. This is a surge absorber for removing ringing, but may be omitted for the function of the present invention.
Also in this case, the number of transformers constituting the step-up transformer 3 may be two or more.

  FIG. 8 shows the output voltage V (t) and the connection points e to h when the inductances of the output windings Ls1 to Ls5 of the transformers T1 to T5 are not the same (the inductances of the excitation windings Lp1 to Lp5 are the same). It is a wave form diagram which shows the voltage waveform observation result. Thus, when the inductance of each output winding is different, adjustment becomes difficult.

[Third Embodiment]
Next, a third embodiment of the inverter device according to the present invention will be described with reference to FIGS. 9 is a circuit diagram similar to FIG. 1 of the inverter device, and FIGS. 10 and 11 are waveform diagrams showing output waveform observation results of the third embodiment.
The inverter device shown in FIG. 9 includes a diode only between the connection point g and the second output terminal 2b among the connection points e to h of the output windings Ls1 to Ls5 of the five transformers T1 to T5. A series circuit of D3 and capacitor C3 is connected. An inductor may be connected in series with this series circuit. Other configurations are the same as those of the first embodiment described with reference to FIG.

Also in this case, since the number of transformers constituting the step-up transformer 3 may be two or more, the case of n is generalized and described.
The number of transformers constituting the step-up transformer 3 is n (n is an integer of 2 or more), and the diode is only at the connection point between the output windings of the nth transformer and the (n-1) th transformer from the frame ground side. And a series circuit of capacitors.

The series circuit of the diode and the capacitor functions as a phase advance circuit, but when the series circuit is connected only between the uppermost connection point and the second output terminal 2b on the high voltage output side as described above. Is affected by the output winding of the lower transformer. Therefore, although it depends on the number of transformers, it may not be possible to advance the phase and a sufficient effect may not be obtained.
Therefore, it is desirable to connect a series circuit of a diode and a capacitor at the connection point that is as close as possible to the center in the arrangement direction or the position closest to the center among the connections between the output windings of the n transformers.

Therefore, when the total number of connection points between the output windings of the n transformers is odd, the array position is at the center connection point, and when it is even, the array position is at one of the two connection points closest to the center. It is desirable to connect a series circuit of a diode and a capacitor.
In the embodiment shown in FIG. 9, the number of transformers is five and the number of connection points is four (even number). Therefore, the two connection points f closest to the center in the arrangement direction of the connection points e to h. A series circuit of a diode D3 and a capacitor C3 is connected to one connection point g of g and g.

  In this case, if the same calculation as above is performed, only the value at Ls between the arrangements changes. Therefore, in the case of two jumps, Cn-2 = | n / (n-2) |. 2 range.

As shown in FIG. 9, the output waveform observation results when n = 5 (5 stages of transformers), the capacity of the capacitor C3 is 167 pF to 250 pF (C = 100 pF), and the input voltage Vin = 60 V (DC) are shown. As shown in FIG.
As can be seen from this figure, the period a is not as wide as when a series circuit of a diode and a capacitor is connected to all connection points. However. Since the voltage phase is advanced to some extent and the output power P (t) is increased, the effect is sufficient.
If the capacitance of the capacitor C3 is large, the resonance balance of the output voltage may be lost. However, the resonance time for securing the excitation time compared to the case where a series circuit of a diode and a capacitor is connected to all connection points. There is little impact on.

FIG. 10 shows that the capacitance of the capacitor C3 in FIG. 9 is in the preferred range of Cn−2 = | n / (n−2) | · C to n · C / 2 (ωc is ω0 to 2ω0). The waveform in some cases is shown.
FIG. 11 is a waveform diagram showing the output waveform observation result when the capacitance C3 of the capacitor C3 in FIG. 9 is a value outside the above desired range, for example, 400 pF. In this case, the balance between the period a and the period b is lost, and the period a is not sufficiently widened.

[Fourth Embodiment]
Next, a fourth embodiment of the inverter device according to the present invention will be described with reference to FIGS. FIG. 12 is a circuit diagram similar to FIG. 1 of the inverter device, and FIGS. 13 to 15 are waveform diagrams showing output waveform observation results when the input voltages of the fourth embodiment are different.
The inverter device shown in FIG. 12 includes two connection points e and g among the connection points e to h of the output windings Ls1 to Ls5 of the five transformers T1 to T5 and the second output terminal 2b. A series circuit of a diode and a capacitor is connected between them.

  A series circuit of a diode D1 and a capacitor C1 is connected to the connection point e in a direction in which current flows toward the second output terminal 2b. A series circuit of a diode D3 and a capacitor C3 is connected to the connection point g in a direction in which a current flows toward the second output terminal 2b. An inductor may be connected in series to these series circuits. Other configurations are the same as those of the first embodiment described with reference to FIG.

Also in this case, since the number of transformers constituting the step-up transformer 3 may be two or more, the case of n is generalized and described.
When the number of transformers constituting the step-up transformer 3 is n (n is an integer of 2 or more), the total number of connection points of the output windings Ls1 to Lsn of the transformers T1 to Tn is n-1. .
The current flows in the direction in which current flows toward the second output terminal 2b between each connection point that is 1/2 or more of the total number n-1 of the connection points and the second output terminal 2b on the high voltage output side. Connect a series circuit of diodes and capacitors (functioning as a phase advance circuit). In that case, it is desirable that the connection points connecting the series circuits are arranged at substantially equal intervals between both ends of the connection points of the output windings Ls1 to Lsn.

The inverter device shown in FIG. 12 is a case where the number of transformers n = 5, and the total number of connection points is four. As the two connection points that are ½, the connection point e at the bottom (frame ground side), the second connection point g from the top (from the high voltage output side), and the second output terminal 2b Between them, series circuits of diodes D1, D3 and capacitors C1, C3 are connected, respectively.
FIG. 13 is a waveform diagram showing an output waveform observation result when the input voltage Vin of this inverter device is operated at a low level.

FIG. 14 is a waveform diagram showing output waveform observation results when the input voltage is raised and the output voltage is adjusted, and FIG. 15 is a waveform diagram showing the output waveform observation results when the input voltage is further raised and the output voltage is adjusted. The voltage scale on the left vertical axis and the power scale on the right vertical axis in each waveform diagram are significantly different.
In any case, the conduction angle corresponding to the period a is widened, the output power P (t) is increased, and the output voltage V (t) is advanced, so that a sufficient effect is obtained.
Further, the output voltage and the output power can be arbitrarily adjusted by changing the magnitude of the input voltage Vin.

[Summary of Embodiment]
The embodiments of the inverter device according to the present invention described above are summarized as follows.
The exciting current of the exciting winding Lpn of the transformer Tn closest to the second output terminal (voltage generating side) among the n transformers T1 to Tn constituting the step-up transformer 3 is switched by the first switching element Q1. The exciting windings Lp1 to Lpn-1 of the other transformers T1 to Tn-1 are connected in parallel, and the exciting current of each exciting winding is switched by the second switching element Q2.

Then, at least one connection point and the second output terminal 2b among the connection points e, f, g and the like of the n output transformers Ls1 to Lsn-1 connected in series to each other of the n transformers T1 to Tn. In between, a series circuit of a diode (D1, D2, D3, etc.) and a capacitor (C1, C2, C3, etc.) is connected in the direction in which the current flows toward the second output terminal 2b.
The at least one connection point is preferably the center connection point when the total number of the connection points is an odd number, and in the case of an even number, it is one of the two connection points closest to the center. Is desirable.

Among the connection points e, f, g, etc. of the output windings Ls1 to Lsn-1 connected to each other in series of the n transformers, the two connection points and the second connection points which are arranged at equal intervals. More preferably, a series circuit of a diode and a capacitor is connected between the output terminal 2b.
A series circuit of the diode and the capacitor may be connected between each connection point that is ½ or more of the total number of connection points and the second output terminal 2b.
It is best to connect a series circuit of the diode and the capacitor between all of the connection points and the second output terminal 2b.
As shown in the embodiment of FIG. 7, ringing of output power can be reduced by interposing inductors in series in the series circuit of the diode and the capacitor, respectively.

  The capacitance of each capacitor (C1, C2, C3, etc.) in each of the series circuit of the diode and the capacitor is the capacitance C existing between the first output terminal 2a and the second output terminal 2b through each capacitor. The resonant angular frequency (ωc) when charging is the resonant angular frequency of voltage resonance due to the total inductance of the output windings Ls1 to Lsn connected in series of the transformers T1 to Tn constituting the step-up transformer 3 and the capacitance. It is desirable that the capacity be a bandwidth that is 1 to 2 times (ωo).

The capacitance C between the first and second output terminals 2a and 2b is a combined capacitance of the capacitance Cs and the load capacitance Co distributed or parasitic between the output windings Ls1 to Lsn of the transformers T1 to Tn. It is.
When the resonance angular frequency ωc when the capacitance is charged at each frequency through the capacitors is in the range of 1 to 2 times the resonance angular frequency ωo of the entire output circuit, the balance of the output waveform is in the resonance state. The best results are obtained. Outside this range, the rate of distortion of the output voltage waveform increases, but the effects of the present invention are sufficiently obtained.
In each of the embodiments described above, the output windings of the n transformers constituting the step-up transformer are all connected in series between the first output terminal on the frame ground side and the second output terminal on the voltage generation side. Connected. However, the present invention is not limited to this, and the output windings may be connected so that both series and parallel are mixed.

In each of the above embodiments of the present invention, the phase of the output voltage of the inverter device is partially advanced, the conduction angle is widened to increase the power, and the difference in timing at which the output voltage and the output power reach a peak is reduced. can do. Thereby, the period during which high voltage and large power can be simultaneously applied (supplied) to the load can be increased.
If this inverter device is used as a power source of a plasma generator, plasma can be generated efficiently.

For example, atmospheric pressure plasma is applied to various industrial products such as surface modification and removal of contaminants as one means of surface treatment. In the case of performing adhesion, printing, coating, or the like of a resin or the like, pretreatment with atmospheric pressure plasma can improve wettability.
When an ultraviolet curable varnish is to be coated on a printed matter on which resin toner is printed by an electrophotographic image forming apparatus, the varnish of the resin toner printing portion may be repelled by the wax component contained in the resin toner. .

However, when surface treatment with atmospheric pressure plasma is performed, wettability is improved, so that varnish coating is possible, and the added value of printed matter is improved. In addition, ink color development is improved, and there is an effect of reducing the ink adhesion amount. In other words, it is also an environmentally friendly technology.
In order to generate the atmospheric pressure plasma, a high voltage is required, and the inverter device according to the present invention can efficiently apply a high voltage and stably supply a large amount of radical species necessary for the surface treatment.

As mentioned above, although each embodiment of this invention has been described, the specific configuration of each part of the embodiment, the content of operation, and the like are not limited to those described therein.
Moreover, this invention is not limited to each embodiment mentioned above, It cannot be overemphasized that it is not limited at all except having the technical feature described in each claim of a claim.
Furthermore, the circuit examples, operation examples, modification examples, and the like of each embodiment described above may be changed or added as appropriate, or a part of them may be deleted, and any combination may be implemented as long as there is no contradiction with each other. Of course, it is possible.

1a, 1b: input terminal 2a: first output terminal (frame ground side)
2b: second output terminal (voltage generation side) 3: step-up transformer 5: control circuit
T1 to T5: Transformers Lp1 to Lp5: Excitation windings Ls1 to Ls5: Output windings (and their inductances)
Q1: First switching element Q2: Second switching element
R, R1, R2: Protection resistance D1-D5: Diode
C1 to C4: Capacitors (and their capacities)
Co: Load capacity C: Capacitance (combined capacity) L1 to L4: Inductor
Vin: Input voltage V (t): Output voltage Vout: Peak value P (t): Output power

JP 2012-186984 A

Claims (7)

A step-up transformer is composed of individual n (n is an integer of 2 or more) transformers having the same characteristics, and an excitation current that flows by applying an input voltage to each excitation winding of the n transformers is switched. A switching element is provided, and the output windings of the n transformers are mixed in series or in series and in parallel between the first output terminal on the frame ground side and the second output terminal on the voltage generation side. And an inverter device for generating an output voltage alternating between the first and second output terminals,
The switching element is composed of a first switching element and a second switching element that are driven on and off by the same switching signal,
The exciting current of the exciting winding of the transformer on the second output terminal side among the n transformers is switched by the first switching element, and the exciting windings of the other transformers are connected in parallel. Then, the excitation current of each excitation winding is switched by the second switching element,
Among the connection points of the output windings connected in series to each other of the n transformers, a current is directed toward the second output terminal between at least one connection point and the second output terminal. An inverter device characterized in that a series circuit of a diode and a capacitor is connected in the direction in which current flows.   When the total number of the connection points is an odd number, the at least one connection point is a central connection point, and in the case of an even number, the arrangement position is one of two connection points closest to the center. The inverter device according to claim 1.   Among the connection points of the output windings connected in series to each other of the n transformers, the second output terminal is connected between the two connection points having an equally spaced arrangement position and the second output terminal. The inverter device according to claim 1, wherein a series circuit of the diode and the capacitor is connected in a direction in which a current flows toward the output terminal.   Among the connection points of the output windings connected in series with each other of the n transformers, between each connection point that is ½ or more of the total number of the connection points and the second output terminal, The inverter device according to claim 1, wherein a series circuit of the diode and the capacitor is connected in a direction in which a current flows toward the second output terminal.   2. The inverter device according to claim 1, wherein each connection point that is ½ or more of the total number of the connection points is all the connection points.   6. The inverter device according to claim 1, wherein an inductor is inserted in series in each of a series circuit of the diode and the capacitor. The capacitance of the capacitor in each of the series circuit of the diode and the capacitor is a resonance angular frequency (ωc) when charging a capacitance existing between the first output terminal and the second output terminal through the capacitor. , A capacitance that has a bandwidth that is one to two times the resonance angular frequency (ωo) of the voltage resonance due to the total inductance of the output windings connected in series of each of the transformers constituting the step-up transformer and the capacitance. The inverter device according to claim 1, wherein the inverter device is provided.

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