JP6508782B2 - Power converter and DC voltage controller - Google Patents

Description

  Embodiments of the present invention relate to a power converter and a DC voltage controller.

  A power converter that inputs an AC voltage and converts it into a DC voltage, or converts a DC voltage into a DC voltage of a different voltage value and outputs it is linked to a power grid, or a power transmission and distribution system, etc. It is used in the system.

  The power converter operates to stabilize the DC voltage with respect to fluctuation factors such as voltage, current, and temperature input to the power converter. If these fluctuation factors are larger than a predetermined value, the power conversion device performs a protection operation such as shutdown of the output to protect the power system and itself.

  On the other hand, in the control circuit of the power conversion device, there is a delay in response due to various reasons. For example, when disturbance occurs on the side of the input AC voltage, the DC voltage may rise significantly. In such a case, the response of the control circuit can not catch up, and the output is shut down as an excessive DC voltage.

JP-A-11-150955

  The embodiment provides a power conversion device and a DC voltage control device that suppress a rise in DC voltage even when external disturbance occurs.

  The power conversion device according to the embodiment is a power conversion device that receives direct current power or alternating current power and outputs a direct current voltage. Proportional-integral operation controller that performs proportional-integral operation by inputting the deviation between the output direct-current voltage value and the direct-current voltage command value that is the target value of the direct-current voltage value, and control output from the proportional-integral operation controller And a first correction circuit that corrects the amount. The first correction circuit is a comparison circuit that compares the DC voltage value with a preset threshold value, and a switch that switches to a preset addition value according to the output of the comparator circuit and outputs a correction value And.

  In this embodiment, a switch is provided to switch to a preset addition value and output according to the output of the comparison circuit that compares the DC voltage value with the threshold value, and the control amount output from the proportional integral operation controller Since the addition value output from the switch is added, a corrected control amount can be generated. Therefore, regardless of the response delay of the proportional-plus-integral operation controller, the rise of the output voltage can be suppressed.

It is a block diagram which illustrates the power converter concerning a embodiment. It is a block diagram which illustrates a control circuit concerning an embodiment. It is an example of the timing chart for demonstrating the operation | movement of the control circuit of embodiment. It is an example of the timing chart for demonstrating the operation | movement of the control circuit of embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of sizes between parts, and the like are not necessarily the same as the actual ones. In addition, even in the case of representing the same portion, the dimensions and ratios may be different from one another depending on the drawings.
In the specification of the present application and the drawings, the same elements as those described above with reference to the drawings are denoted by the same reference numerals, and the detailed description will be appropriately omitted.

FIG. 1 is a block diagram illustrating the power conversion device according to the present embodiment.
FIG. 2 is a block diagram illustrating a control circuit according to the present embodiment.
As shown in FIG. 1, the power conversion device 10 of the present embodiment includes a power conversion unit 20 and a control circuit 30. Power converter 10 includes input terminals 11a-11c and output terminals 11d and 11e. Power converter 10 is connected to AC power supply 1 via input terminals 11a-11c. AC power supply 1 is, for example, a three-phase AC power system. The power conversion device 10 is connected to, for example, a DC load, a DC power supply, an energy storage circuit using a capacitor, and the like (not shown) via the output terminals 11 d and 11 e. The alternating current power supply 1 is not limited to the three-phase alternating current, and may of course be a single phase alternating current.

  The power converter 10 converts the AC voltage supplied from the AC power supply 1 into a predetermined DC voltage and outputs it.

  The power conversion unit 20 converts an AC voltage into a DC voltage. Power converter 20 includes a switching circuit. The switching circuit switches the AC voltage at a frequency sufficiently higher than the frequency of the AC power supply 1, and converts it to a predetermined DC voltage via a high frequency filter or the like.

  The control circuit 30 is connected to the input and the output of the power conversion unit 20. The control circuit 30 inputs an input voltage (AC voltage, full-wave rectified pulsating current voltage, etc.) and an output voltage etc. input to the power conversion unit 20 so as to obtain predetermined input current and output voltage, The gate drive signal is supplied to the power conversion unit 20. Depending on the control target, the control circuit 30 may detect an input current, an output current, or a grid-side current (active current, reactive current) and input the detected current.

  The control circuit 30 may be provided in the same housing as the power conversion unit 20, or may be provided as a control device (DC voltage control device) in a separate housing from the power conversion unit 20.

  The configuration of part of the control circuit 30 is shown in FIG. As shown in FIG. 2, the control circuit 30 includes a PI controller 32, a control output correction circuit 40, and a DC voltage command value correction circuit 50.

These deviations ΔVDC are input to the PI controller 32 from the DC voltage command value VDC ^* and the DC voltage value VDC by the adder / subtractor 31. The PI controller 32 may be provided with an output clamp circuit or clamp function for clamping so that the control output does not become excessive to the extent that the numerical value that the computing unit can handle is exceeded.

  The PI controller 32 has a proportional gain kp and an integral gain ki1. The proportional gain kp and the integral gain ki1 are preset.

  The PI controller 32 PI-controls the deviation ΔVDC of the DC output voltage and outputs a DC voltage control output. PI controller 32 generates a DC voltage control output to reduce deviation ΔVDC.

  The control output correction circuit 40 receives the DC voltage VDC. The output of the control output correction circuit 40 is added to the output of the PI controller 32 by the adder 33. The control output correction circuit 40 includes a determination circuit 41, an on delay circuit 42, an off delay circuit 43, and a switch 44.

  The determination circuit 41 receives a DC voltage VDC. In the determination circuit 41, a detection level Vd is set in advance. Determination circuit 41 outputs a high level signal, for example, when DC voltage VDC is equal to or higher than detection level Vd. When the DC voltage VDC is lower than the detection level Vd, the determination circuit 41 outputs, for example, a low level signal.

  The on delay circuit 42 is connected to the output of the determination circuit 41. The on delay time DLYon is set in the on delay circuit 42. The on delay circuit 42 outputs a high level signal after the input high level signal exceeds the on delay time DLYon. When the inputted high level signal is shorter than the on delay time DLYon, the on delay circuit 42 outputs a low level signal regardless of the input of the high level signal.

  The on delay time DLYon is set to, for example, about several microseconds to about 100 microseconds. Even when the output of the determination circuit 41 is inverted due to a voltage change of a short pulse width such as noise, the on-delay circuit 42 is determined as a malfunction due to the noise or the like and provided not to output the noise or the like. .

  The off delay circuit 43 is connected to the output of the on delay circuit 42. In the off delay circuit 43, the off delay time DLYoff is set. The off delay circuit 43 inverts the output to a low level when the low level period is longer than the off delay time DLYoff when the input high level signal is inverted and becomes a low level. The off delay circuit 43 sets the high level regardless of the low level input when the low level period is shorter than the off delay time DLYoff when the input high level signal is inverted and becomes low level. Maintain the output.

  The off-delay circuit 43 is set, for example, to a time of about a cycle of a pulsating current voltage (a cycle of 1/2 of the AC voltage) obtained by full-wave rectifying the AC voltage of the AC power supply 1. As a result, when the DC voltage VDC on which the pulsating current voltage is superimposed is detected, it is possible to prevent the output of an unintentionally low level signal due to the ripple of the pulsating current voltage. As will be described in detail later, the value of the off delay time DLYoff can be set in accordance with the control output addition value A.

  The control output correction circuit 40 may not output the above-described unintended signal, and instead of the off delay circuit 43, a hysteresis circuit may be used. Also, the off delay circuit 43 and the hysteresis circuit may be used simultaneously.

  The control output addition value A is input to one input of the switch 44. The switch 44 receives a zero (or low level) signal at its other input. The output of the switch 44 is input to the adder 33. The control output output from the PI controller 32 is added to the output of the switch 44 by the adder 33.

  The control terminal of the switch 44 is connected to the output of the off delay circuit 43. When the output of the off delay circuit 43 is at high level, the switch 44 connects the side to which the control output addition value A is input to the output. The switch 44 connects the side of the zero level signal to the output when the output of the off delay circuit 43 is at low level.

  That is, the control output correction circuit 40 outputs the control output addition value A via the switch 44 when the output of the off delay circuit 43 is at the high level. Therefore, since the control output addition value A is added to the output of the PI controller 32, the DC voltage control output outputted from the control circuit 30 is corrected by the control output addition value A. The control output correction circuit 40 does not correct the control output when the output of the off delay circuit 43 is at low level.

The DC voltage command value correction circuit 50 receives the control output addition value A. The DC voltage command value correction circuit 50 receives the output of the off delay circuit 43 of the control output correction circuit 40 via the inverter circuit 36. The output of the DC voltage command value correction circuit 50 corrects the DC voltage command value VDC ^* by the adder 35. The DC voltage command value correction circuit 50 includes an integrator 51 and a first-order delay circuit 52.

  The control output addition value A is input to the integrator 51. The output of the off delay circuit 43 is input to the reset input R of the integrator 51 via the inverter circuit 36. The integrator 51 outputs zero regardless of the level of the input signal when the reset input R is at high level. The integrator 51 outputs an integral value according to the input signal when the reset input R is at low level. When a DC value is input to the integrator 51, the integration operation is started at the timing when the reset input R changes to the low level, and a linearly changing signal is output. The integral gain ki2 of the integrator 51 is preset.

The first-order lag circuit 52 is connected to the output of the integrator 51. The primary delay circuit 52 has a function of clamping the output. One clamp voltage of the first-order delay circuit 52 is set by the voltage output from the integrator 51. The other clamp voltage is set to a preset value together with the integrator 51. The value set in advance is based on the case where the DC voltage command value correction circuit 50 accumulates the integral value over a long period of time due to an exceptional large disturbance, and the output of the DC voltage command value correction circuit 50 becomes excessive. Is set. In this case, the set value of the clamp voltage is set to a value at which the DC voltage command value VDC ^* does not excessively change from the steady value.

  The first-order lag circuit 52 adds a time constant T corresponding to the first-order lag constant to the input signal and outputs it. As will be described in detail later, the primary delay circuit 52 outputs a signal that gradually returns to zero according to the time constant T when the signal from the integrator 51 connected to the input is cut off.

In the power conversion device 10 of the present embodiment, the control output correction circuit 40 performs DC voltage control when the DC voltage VDC of the output rises in a time shorter than the response of the PI controller 32 during disturbance of the input or the like. It works to force down the output. At this time, since the input (DC voltage VDC) to the PI controller 32 is excessively lowered, it is necessary to correct it appropriately. The DC voltage command value correction circuit 50 supplies an appropriate input to the PI controller 32 by correcting the DC voltage command value VDC ^* when the DC voltage VDC is excessively lowered. By this, when the response of the PI controller 32 is started, an appropriate output is generated, so that the DC voltage control output can be prevented from becoming excessively oscillatory.

  In the present specification, disturbance includes sudden changes including increase and decrease of the AC voltage VAC input, sudden changes in the phase of the AC power supply 1, and the like.

  The logic configuration and the like of the control circuit 30 described above are not limited to positive logic as described above, but may be negative logic. Moreover, as long as it has a configuration described above, another logical configuration may be used.

  The DC voltage control output output from control circuit 30 is input by, for example, a DC current control circuit (not shown) and added to the effective value of the AC current which has been orthogonally converted, etc. A signal is generated by vector conversion or the like. The generated signal is supplied to the power conversion unit 20 as a gate drive signal. The power conversion unit 20 drives each switching element in accordance with the generated gate drive signal.

The operation of the power conversion device 10 of the present embodiment will be described.
FIG. 3 is an example of a timing chart for explaining the operation of the control circuit of the present embodiment.
In FIG. 3, the topmost drawing illustrates an example of the time change of the AC voltage VAC which is a voltage of the effective value of the AC power supply.
The second stage diagram shows an example of the time change of the DC voltage VDC of the output of the power conversion device 10.
The third diagram shows an example of the time change of the DC voltage control output outputted from the control circuit 30.
The fourth diagram shows the signal (output signal of the switch 44) output from the control output correction circuit 40.
The fifth diagram shows the output signal B of the integrator 51 of the DC voltage command value correction circuit 50.
The lowermost diagram shows the output signal C of the first-order delay circuit 52 of the DC voltage command value correction circuit 50.

  In this example, it is assumed that the AC voltage VAC is at a prescribed level until time t0, and disturbance occurs at time t0. Although the rise of the AC voltage VAC is mentioned as an example of FIG. 3, the same applies to the case where the DC voltage fluctuates due to a sudden change including increase and fall of the effective value of the AC power supply and a sudden change of the phase of the AC power supply. It is.

  Due to the disturbance of the AC voltage VAC generated at time t0, the DC voltage VDC of the output of the power conversion device 10 starts to rise.

  At time t1, the DC voltage VDC reaches the detection level Vd. The control output correction circuit 40 outputs the control output addition value A after the on-delay time DLYon has elapsed from time t1 (time t2). The control output addition value A has a negative value. This is to set the DC voltage control output to a negative voltage in order to lower the DC voltage VDC while the PI controller 32 responds.

  The off delay circuit 43 outputs a high level signal until the period in which the DC voltage VDC becomes lower than the detection level Vd exceeds the off delay time DLYoff. The switch 44 is supplied with a high level signal from the off delay circuit 43, and outputs the control output addition value A until the off delay time DLYoff elapses.

Here, the on delay time DLYon and the off delay time DLYoff will be described.
FIG. 4 is an example of a timing chart for explaining the operation of the control circuit of the present embodiment.
FIG. 4 shows a timing chart for explaining the on delay time DLYon and the off delay time DLYoff.
The top diagram in FIG. 4 is an example of a voltage waveform of the DC voltage VDC. The ripple is superimposed on the DC voltage VDC, and the portion of the ripple is enlarged. The DC voltage VDC becomes higher than the detection level Vd at time ta and falls below the detection level Vd at time tb. After time tb, VAC falls below detection level Vd.

  The second stage of FIG. 4 shows an example of the output waveform of the determination circuit 41. Since the determination circuit 41 outputs a high level when the DC voltage VDC is equal to or higher than the detection voltage Vd, the output of the high level is shown at time ta to time tb. Since the determination circuit 41 outputs a low level when the DC voltage VDC falls below the detection voltage Vd, the determination circuit 41 outputs a low level before time ta and after the time tb.

  The third stage of FIG. 4 shows an example of the output waveform of the on delay circuit 42. As shown in FIG. The on delay circuit 42 outputs a high level signal when the high level of the output of the determination circuit 41 continues for a time longer than the on delay time DLYon. The on delay circuit 42 inverts to low level after the output of the determination circuit 41 transitions to low level.

  The fourth stage of FIG. 4 shows an example of the output waveform of the off delay circuit 43. As shown in FIG. The off delay circuit 43 outputs a high level signal while the output of the on delay circuit 42 becomes high level. When the low level state of the output of the on delay circuit 42 continues for the off delay time DLYoff or more, the output of the off delay circuit 43 is inverted to the low level.

  As in this example, when the off delay time DLYoff is set to about the ripple cycle, the control output correction circuit 40 can maintain the high level state to about the ripple cycle. The ripple period is 1 / (50 Hz × 2) = 10 ms when the commercial power supply is 50 Hz, and the off delay time DLYoff is set to about 10 ms.

Referring back to FIG.
From time t0 to time t3, since the phenomenon occurs within a time sufficiently shorter than the response speed of the PI controller 32, the output of the PI controller 32 is almost zero. On the other hand, when the control output correction circuit 40 is not provided, the DC voltage VDC further rises as shown by a broken line, and exceeds the threshold value Vov of the overvoltage protection. When the overvoltage protection is activated, the power converter 10 is shut down, so that the direct current voltage VDC drops to zero thereafter.

  Therefore, in the power conversion device 10 of the present embodiment, the control output addition value A is added to the output of the PI controller 32 at time t2. Since the control output addition value A has a negative value as described above, the control circuit 30 outputs a DC voltage control output of a negative value in a period from time t2 to time t3 in which the PI controller 32 does not respond sufficiently. can do.

  From time t2 to time t3, since the DC voltage control output has a negative value, the DC voltage VDC that has been rising drops rapidly.

  The control output addition value A is set in advance using experiments or simulations to a value such that the DC voltage is sufficiently lower than the set value Vd or the threshold value Vov for overvoltage protection during the off delay time DLYoff. Ru.

After time t4, DC voltage VDC converges to the value of DC voltage command value VDC ^* .

The operation of the DC voltage command value correction circuit 50 will be described. In the power conversion device 10 of the present embodiment, the control output correction circuit 40 forcibly applies the control output addition value A to the output of the PI controller 32 with respect to the response delay of the PI controller 32. As a result, the DC voltage VDC is forcibly lowered to prevent the DC voltage VDC from rising to an excessive voltage. On the other hand, since the PI controller 32 operates to integrate the deviation ΔVDC due to the pulled-down DC voltage VDC by forcibly pulling down the DC voltage VDC, the DC voltage control output that the PI controller 32 outputs is , May increase too much. Therefore, in order to correct this, the DC voltage command value correction circuit 50 compensates for the DC voltage command value VDC ^* so as not to increase the output of the PI controller 32 excessively.

First, the operation of the integrator 51 will be described.
An output of the off delay circuit 43 of the control output correction circuit 40 is connected to the reset input of the integrator 51 via the inverter circuit 36. From time t0 to time t2, a high level voltage is input to the reset input of the integrator 51, and the integrator 51 outputs zero (no output) regardless of the input.

  Since a low level voltage is input to the reset input of the integrator 51 from time t2 to time t3, the integrator 51 outputs a signal according to the input. Since the control output addition value A is input to the integrator 51, the integrator 51 outputs a step response at time t2 (operation waveform B in FIG. 3). After time t3, since the reset input of the integrator 51 is inverted to the high level, the output of the integrator 51 also becomes zero.

As will be described later, the integral output B from time t2 to time t3 of the integrator 51 is directly added to the DC voltage command value VDC ^* via the first-order delay circuit 52. Therefore, the DC voltage command value corrected to a value that compensates for the excess is corrected with respect to the excessively lowered DC voltage VDC. The correction level is adjusted by appropriately setting the proportionality constant ki2 of the integrator 51.

  The primary delay circuit 52 is connected to the output of the integrator 51, and the output upper limit voltage of the primary delay circuit 52 is connected so as to be set according to the input. Therefore, from time t2 to time t3, the primary delay circuit 52 outputs the integral output B of the integrator 51 as it is.

  The first-order lag circuit 52 outputs a first-order lag signal with respect to the input when the input becomes zero. At time t3, in the first-order delay circuit 52, the output signal gradually becomes zero according to the time constant T at the time of recovery.

Integration output B for compensating for the surplus integral value from time t2 to time t3 is added by adder 53 to output voltage command value VDC ^* . Since the output of the integrator 51 has a negative value, the corrected output voltage command value becomes a low value according to the integral output B. As a result, the absolute value of the deviation ΔVDC input to the PI controller 32 decreases, and the DC voltage control output becomes an appropriate value.

On the other hand, when the correction value is rapidly cut off as in the output waveform B, the integrator of the PI controller 32 may vibrate the output. In order to suppress this vibration, the correction value for the DC voltage command value VDC ^* is gradually made zero by the first order delay circuit 52. The time constant T at the time of correction recovery is set to, for example, a ripple period or a sufficiently longer period than the ripple period, and for example, the DC voltage control output is stabilized without oscillation by being set to about 5 to 10 times the ripple period. Output to

The operation and effects of the power conversion device 10 of the present embodiment will be described.
In the power conversion device 10 of the present embodiment, the control output correction circuit 40 is provided, so that regardless of the response delay of the PI controller 32, the DC voltage VDC of the output rises excessively due to disturbance of the input voltage or the like. Can be prevented. The control output correction circuit 40 can be configured by adding the determination circuit 41 or the like that detects the detection level Vd, so that it can be easily added to the stabilization mechanism of the DC voltage VDC by the existing PI controller 32. .

Since the power conversion device 10 includes the DC voltage command value correction circuit 50, compensation can be performed on the DC voltage command value VDC ^* , and the control output corrected by the control output correction circuit 40 can be appropriately adjusted. it can. Since the DC voltage command value correction circuit 50 includes the integrator 51 and the primary delay circuit 52, to adjust the control output, set the integration gain ki2 of the integrator 51 and the time constant T of the primary delay circuit 52, respectively. It can easily be done by

  In the power conversion device 10 of the present embodiment, by providing the above-described functions, it is possible to prevent the shutdown of the device due to unintended overvoltage protection, so that the backup system at the time of shutdown becomes unnecessary. It can contribute to cost reduction. In addition, by reducing the frequency of performing the restart operation from the unintended stop of the power conversion device 10, it is possible to improve the operation rate of the system.

  Although the power converter which converts and outputs alternating current voltage into direct current voltage, for example, a rectifier and a power forward converter (power converter) is described above, the rectification smoothing circuit 21 is omitted from the power conversion unit 20 It is good also as a power converter which inputs. Further, the output of the power conversion device is not limited to the stabilized DC voltage, but may be a stabilized DC current, and these may be switched depending on the load condition.

  According to the embodiment described above, it is possible to realize the power conversion device and the direct current voltage control device in which the rise of the output voltage is suppressed even when disturbance occurs in the input or the like.

  While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and the gist of the invention, and are included in the invention described in the claims and the scope of equivalents thereof. In addition, the embodiments described above can be implemented in combination with each other.

  Reference Signs List 1 AC power supply, 10 power converter, 20 power converter, 30 control circuit, 31 adder-subtractor, 32 PI controller, 33, 35 adder, 36 inverter circuit, 40 control output correction circuit, 41 determination circuit, 42 on delay Circuit, 43 off-delay circuit, 44 switches, 50 DC voltage command value correction circuit, 51 integrator, 52 first-order delay circuit

Claims (5)

A power conversion device that receives DC power or AC power and outputs DC voltage,
A proportional-integral operation controller that performs proportional-integral operation by inputting a deviation between a direct-current voltage value to be output and a direct-current voltage command value that is a target value of the direct-current voltage value;
A first correction circuit that corrects the control amount output from the proportional-plus-integral operation controller;
Equipped with
The first correction circuit is
A comparison circuit that compares the DC voltage value with a preset threshold value;
A switch that switches to a preset addition value according to the output of the comparison circuit and outputs a correction value;
Power converter including.   The power conversion device according to claim 1, wherein the first correction circuit further includes a delay circuit that adds a delay time to an output of the comparison circuit to be input and outputs the delay circuit. It further comprises a second correction circuit that corrects the DC voltage command value,
The second correction circuit is
An integrator that integrates and outputs the added value when the added value is output from the switch;
An adder for adding the output of the integrator from the DC voltage command value and outputting a new DC voltage command value;
The power conversion device according to claim 1, further comprising:   The second correction circuit is connected between the integrator and the adder, and includes a first-order delay circuit that attenuates the output with a predetermined time constant when the integrator has no output. Power converter as described. A DC voltage control device for controlling the DC voltage output from a power conversion device which receives DC power or AC power and outputs DC voltage,
A proportional-integral operation controller that performs proportional-integral operation by inputting a deviation between a direct-current voltage value output from the power conversion device and a direct-current voltage command value that is a target value of the direct-current voltage value.
A first correction circuit that corrects the control amount output from the proportional-plus-integral operation controller;
Equipped with
The first correction circuit is
A comparison circuit that compares the DC voltage value with a preset threshold value;
A switch that switches to a preset addition value according to the output of the comparison circuit and outputs a correction value;
DC voltage control device including.

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