JP6495327B2 - メモリコントローラにおける細粒度帯域幅プロビジョニング - Google Patents
メモリコントローラにおける細粒度帯域幅プロビジョニング Download PDFInfo
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- JP6495327B2 JP6495327B2 JP2016560970A JP2016560970A JP6495327B2 JP 6495327 B2 JP6495327 B2 JP 6495327B2 JP 2016560970 A JP2016560970 A JP 2016560970A JP 2016560970 A JP2016560970 A JP 2016560970A JP 6495327 B2 JP6495327 B2 JP 6495327B2
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0613—Improving I/O performance in relation to throughput
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
- G06F13/1626—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0674—Disk device
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Dram (AREA)
- Bus Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/252,673 US9563369B2 (en) | 2014-04-14 | 2014-04-14 | Fine-grained bandwidth provisioning in a memory controller |
| US14/252,673 | 2014-04-14 | ||
| PCT/US2015/024414 WO2015160541A1 (en) | 2014-04-14 | 2015-04-06 | Fine-grained bandwidth provisioning in a memory controller |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017511545A JP2017511545A (ja) | 2017-04-20 |
| JP2017511545A5 JP2017511545A5 (enExample) | 2018-04-26 |
| JP6495327B2 true JP6495327B2 (ja) | 2019-04-03 |
Family
ID=52875816
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016560970A Active JP6495327B2 (ja) | 2014-04-14 | 2015-04-06 | メモリコントローラにおける細粒度帯域幅プロビジョニング |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9563369B2 (enExample) |
| EP (1) | EP3132355B1 (enExample) |
| JP (1) | JP6495327B2 (enExample) |
| KR (1) | KR102380670B1 (enExample) |
| CN (1) | CN106233269B (enExample) |
| WO (1) | WO2015160541A1 (enExample) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101699377B1 (ko) * | 2014-07-02 | 2017-01-26 | 삼성전자주식회사 | 불휘발성 메모리 및 메모리 컨트롤러를 포함하는 스토리지 장치 및 스토리지 장치의 동작 방법 |
| US10691375B2 (en) * | 2015-01-30 | 2020-06-23 | Hewlett Packard Enterprise Development Lp | Memory network to prioritize processing of a memory access request |
| US10158712B2 (en) * | 2015-06-04 | 2018-12-18 | Advanced Micro Devices, Inc. | Source-side resource request network admission control |
| US20210182190A1 (en) * | 2016-07-22 | 2021-06-17 | Pure Storage, Inc. | Intelligent die aware storage device scheduler |
| US10298511B2 (en) | 2016-08-24 | 2019-05-21 | Apple Inc. | Communication queue management system |
| US10613612B2 (en) * | 2017-03-16 | 2020-04-07 | Qualcomm Incorporated | Power reduction via memory efficiency compensation |
| CN109154883A (zh) * | 2017-03-22 | 2019-01-04 | 波利伍德有限责任公司 | 驱动级内部服务质量 |
| US10795836B2 (en) * | 2017-04-17 | 2020-10-06 | Microsoft Technology Licensing, Llc | Data processing performance enhancement for neural networks using a virtualized data iterator |
| US10437482B2 (en) * | 2017-07-25 | 2019-10-08 | Samsung Electronics Co., Ltd. | Coordinated near-far memory controller for process-in-HBM |
| US10481944B2 (en) * | 2017-08-09 | 2019-11-19 | Xilinx, Inc. | Adaptive quality of service control circuit |
| US10360832B2 (en) | 2017-08-14 | 2019-07-23 | Microsoft Technology Licensing, Llc | Post-rendering image transformation using parallel image transformation pipelines |
| US10678690B2 (en) | 2017-08-29 | 2020-06-09 | Qualcomm Incorporated | Providing fine-grained quality of service (QoS) control using interpolation for partitioned resources in processor-based systems |
| US10318301B2 (en) | 2017-08-31 | 2019-06-11 | Micron Technology, Inc. | Managed multiple die memory QoS |
| US10372609B2 (en) * | 2017-09-14 | 2019-08-06 | Intel Corporation | Fast cache warm-up |
| KR102417977B1 (ko) * | 2017-10-19 | 2022-07-07 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 그것의 동작 방법 |
| US10700954B2 (en) * | 2017-12-20 | 2020-06-30 | Advanced Micro Devices, Inc. | Scheduling memory bandwidth based on quality of service floorbackground |
| US10296230B1 (en) * | 2017-12-22 | 2019-05-21 | Advanced Micro Devices, Inc. | Scheduling memory requests with non-uniform latencies |
| US10275352B1 (en) * | 2017-12-28 | 2019-04-30 | Advanced Micro Devices, Inc. | Supporting responses for memory types with non-uniform latencies on same channel |
| US11144457B2 (en) * | 2018-02-22 | 2021-10-12 | Netspeed Systems, Inc. | Enhanced page locality in network-on-chip (NoC) architectures |
| US10705985B1 (en) * | 2018-03-12 | 2020-07-07 | Amazon Technologies, Inc. | Integrated circuit with rate limiting |
| US11099778B2 (en) | 2018-08-08 | 2021-08-24 | Micron Technology, Inc. | Controller command scheduling in a memory system to increase command bus utilization |
| CN109062514B (zh) * | 2018-08-16 | 2021-08-31 | 郑州云海信息技术有限公司 | 一种基于命名空间的带宽控制方法、装置和存储介质 |
| US10838884B1 (en) | 2018-09-12 | 2020-11-17 | Apple Inc. | Memory access quality-of-service reallocation |
| US10635355B1 (en) * | 2018-11-13 | 2020-04-28 | Western Digital Technologies, Inc. | Bandwidth limiting in solid state drives |
| US10860254B2 (en) * | 2019-04-17 | 2020-12-08 | Vmware, Inc. | Throttling resynchronization operations in a data store cluster based on I/O bandwidth limits |
| US20210279192A1 (en) * | 2020-03-06 | 2021-09-09 | Infineon Technologies Ag | Distribution of interconnect bandwidth among master agents |
| US12223174B2 (en) | 2020-10-26 | 2025-02-11 | Google Llc | Modulating credit allocations in memory subsystems |
| US20220357879A1 (en) * | 2021-05-06 | 2022-11-10 | Apple Inc. | Memory Bank Hotspotting |
| EP4281876A1 (en) * | 2021-09-30 | 2023-11-29 | Huawei Technologies Co., Ltd. | Memory controller and data processing system with memory controller |
| WO2023128479A1 (ko) * | 2021-12-30 | 2023-07-06 | 주식회사 엘엑스세미콘 | 메모리 제어 시스템 및 메모리 제어 기능을 갖는 디스플레이 디바이스 |
| US12457160B2 (en) | 2023-10-18 | 2025-10-28 | SanDisk Technologies, Inc. | Bandwidth averaging in a stochastic system |
| US20250265014A1 (en) * | 2024-02-16 | 2025-08-21 | Western Digital Technologies, Inc. | Early Read Start Time For Random Access SSDs |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2778258A1 (fr) | 1998-04-29 | 1999-11-05 | Texas Instruments France | Controleur d'acces de trafic dans une memoire, systeme de calcul comprenant ce controleur d'acces et procede de fonctionnement d'un tel controleur d'acces |
| US6804738B2 (en) * | 2001-10-12 | 2004-10-12 | Sonics, Inc. | Method and apparatus for scheduling a resource to meet quality-of-service restrictions |
| US6961834B2 (en) * | 2001-10-12 | 2005-11-01 | Sonics, Inc. | Method and apparatus for scheduling of requests to dynamic random access memory device |
| US7363427B2 (en) * | 2004-01-12 | 2008-04-22 | Hewlett-Packard Development Company, L.P. | Memory controller connection to RAM using buffer interface |
| US7461214B2 (en) | 2005-11-15 | 2008-12-02 | Agere Systems Inc. | Method and system for accessing a single port memory |
| CN101046784A (zh) * | 2006-07-18 | 2007-10-03 | 威盛电子股份有限公司 | 存储器数据存取系统与方法以及存储器控制器 |
| US7577780B2 (en) | 2007-02-28 | 2009-08-18 | National Chiao Tung University | Fine-grained bandwidth control arbiter and the method thereof |
| US8452920B1 (en) | 2007-12-31 | 2013-05-28 | Synopsys Inc. | System and method for controlling a dynamic random access memory |
| US8180975B2 (en) | 2008-02-26 | 2012-05-15 | Microsoft Corporation | Controlling interference in shared memory systems using parallelism-aware batch scheduling |
| CN101876944B (zh) | 2009-11-26 | 2012-02-15 | 威盛电子股份有限公司 | 动态随机存取存储器控制器和控制方法 |
| US8898674B2 (en) | 2009-12-23 | 2014-11-25 | International Business Machines Corporation | Memory databus utilization management system and computer program product |
| US8314807B2 (en) | 2010-09-16 | 2012-11-20 | Apple Inc. | Memory controller with QoS-aware scheduling |
| MX2013002773A (es) | 2010-09-16 | 2013-04-05 | Apple Inc | Controlador de memoria con multiples puertos con puertos asociados con las clases de trafico. |
| JP2013196321A (ja) | 2012-03-19 | 2013-09-30 | Pfu Ltd | 電子回路及び調停方法 |
-
2014
- 2014-04-14 US US14/252,673 patent/US9563369B2/en active Active
-
2015
- 2015-04-06 KR KR1020167031743A patent/KR102380670B1/ko active Active
- 2015-04-06 CN CN201580019963.9A patent/CN106233269B/zh active Active
- 2015-04-06 EP EP15716960.8A patent/EP3132355B1/en active Active
- 2015-04-06 WO PCT/US2015/024414 patent/WO2015160541A1/en not_active Ceased
- 2015-04-06 JP JP2016560970A patent/JP6495327B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| WO2015160541A1 (en) | 2015-10-22 |
| US20150293709A1 (en) | 2015-10-15 |
| EP3132355B1 (en) | 2019-09-04 |
| KR102380670B1 (ko) | 2022-03-29 |
| CN106233269A (zh) | 2016-12-14 |
| EP3132355A1 (en) | 2017-02-22 |
| US9563369B2 (en) | 2017-02-07 |
| KR20160144482A (ko) | 2016-12-16 |
| JP2017511545A (ja) | 2017-04-20 |
| CN106233269B (zh) | 2019-12-10 |
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