JP6481518B2 - Capacitor structure, capacitor module, and method of manufacturing capacitor structure - Google Patents

Description

  The present invention relates to a capacitor structure having a capacitor (capacitor), a capacitor module using the capacitor structure, and a method of manufacturing the capacitor structure.

  Conventionally, a capacitor structure is known in which a capacitor is formed by interposing a dielectric between a first conductor and a second conductor inside a hole provided in a silicon substrate (see Patent Document 1). ). In the capacitor structure described in Patent Document 1, the opposing area between the first and second conductors sandwiching the dielectric is increased by forming the bottom surface of the hole provided in the silicon substrate as an uneven surface, thereby increasing the capacitance. We try to increase the value.

  However, in the capacitor structure described in Patent Document 1, as the hole provided in the silicon substrate becomes deeper, the resistance components of the first and second conductors arranged inside the hole increase, and loss during capacitor operation Becomes larger. This is particularly noticeable when the first and second conductors are made of a semiconductor.

  Then, the loss in the first and second conductors becomes Joule heat, and the capacitor structure is heated to a high temperature. Depending on the material of the first and second conductors, the resistance value of the first and second conductors may increase with this temperature rise, and the loss during capacitor operation may further increase.

JP 2012-79960 A

  In view of the above problems, an object of the present invention is to provide a capacitor structure, a capacitor module, and a method of manufacturing a capacitor structure that can suppress a temperature rise due to heat generation during capacitor operation and reduce loss during capacitor operation. To do.

  According to one aspect of the present invention, (a) a conductive substrate having a through hole penetrating from the first main surface to the second main surface, (b) a dielectric film provided on a side wall surface of the through hole, c) a columnar conductive region embedded in the through hole through the dielectric film; (d) a first main electrode terminal electrically connected to the columnar conductive region; and (e) a first electrically connected to the conductive substrate. A capacitor structure including two main electrode terminals and a capacitor module using the capacitor structure are provided.

  According to another aspect of the present invention, (a) a step of forming a through hole penetrating from the first main surface of the conductive substrate to the second main surface, and (b) a dielectric film on the side wall surface of the through hole. A step of forming, (c) a step of embedding the columnar conductive region in the through hole through the dielectric film, (d) a step of forming a first main electrode terminal electrically connected to the columnar conductive region, (e And a step of forming a second main electrode terminal electrically connected to the conductive substrate. A method for manufacturing a capacitor structure is provided.

  ADVANTAGE OF THE INVENTION According to this invention, the temperature rise by the heat_generation | fever at the time of a capacitor | condenser operation | movement can be suppressed, and the manufacturing method of a capacitor structure, a capacitor module, and a capacitor | condenser structure which can reduce the loss at the time of a capacitor | condenser operation can be provided.

It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 1st Embodiment of this invention. It is the horizontal sectional view seen from the AA direction of FIG. It is process sectional drawing for demonstrating an example of the manufacturing method of the capacitor | condenser structure which concerns on the 1st Embodiment of this invention. FIG. 4 is a process cross-sectional view subsequent to FIG. 3 for describing an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 5 is a process cross-sectional view subsequent to FIG. 4 for describing an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 6 is a process cross-sectional view subsequent to FIG. 5 for explaining an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 7 is a process cross-sectional view subsequent to FIG. 6 for describing an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 8 is a process cross-sectional view subsequent to FIG. 7 for describing an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 9 is a process cross-sectional view subsequent to FIG. 8 for describing an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 10 is a process cross-sectional view subsequent to FIG. 9 for describing an example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 11 is a process cross-sectional view subsequent to FIG. 10 for illustrating the example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 12 is a process cross-sectional view subsequent to FIG. 11 for illustrating the example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. FIG. 13 is a process cross-sectional view subsequent to FIG. 12 for illustrating the example of the method for manufacturing the capacitor structure according to the first embodiment of the present invention. It is sectional drawing which shows an example of the capacitor | condenser module which concerns on the 1st Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 1st modification of the 1st Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 2nd modification of the 1st Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 2nd Embodiment of this invention. It is process sectional drawing for demonstrating an example of the manufacturing method of the capacitor | condenser structure which concerns on the 2nd Embodiment of this invention. FIG. 19 is a process cross-sectional view subsequent to FIG. 18 for illustrating an example of the method for manufacturing the capacitor structure according to the second embodiment of the present invention. FIG. 20 is a process cross-sectional view subsequent to FIG. 19 for describing an example of the method for manufacturing the capacitor structure according to the second embodiment of the present invention. FIG. 21 is a process cross-sectional view subsequent to FIG. 20 for describing an example of the method for manufacturing the capacitor structure according to the second embodiment of the present invention. FIG. 22 is a process cross-sectional view subsequent to FIG. 21 for describing an example of the method for manufacturing the capacitor structure according to the second embodiment of the present invention. FIG. 23 is a process cross-sectional view subsequent to FIG. 22 for describing an example of the method for manufacturing the capacitor structure according to the second embodiment of the present invention. It is sectional drawing which shows an example of the capacitor | condenser module which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 1st modification of the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 2nd modification of the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser structure which concerns on the 3rd modification of the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser module which concerns on the 4th modification of the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser module which concerns on the 5th modification of the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the capacitor | condenser module which concerns on the 6th modification of the 2nd Embodiment of this invention.

  Next, first and second embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Furthermore, the first and second embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the technical idea of the present invention is the material of the component parts. Further, the shape, structure, arrangement, etc. thereof are not specified as follows. The technical idea of the present invention can be variously modified within the technical scope defined by the claims described in the claims.

  In this specification, the definitions of “upper” and “lower” such as “upper surface” and “lower surface” are merely representational problems on the illustrated sectional view. For example, the orientation of the capacitor structure is changed by 90 °. Observing “up” and “bottom” will be “left” and “right”, and if the observation is changed by 180 °, the relationship of “up” and “bottom” will be reversed. In addition, the “back surface” is a problem of the representation on the cross-sectional view shown in the figure. As in the case of the selection of “upper” and “lower”, if the orientation of the specific capacitor structure is changed, the designation or Of course, the definition can vary.

(First embodiment)
<Configuration of Capacitor Structure of First Embodiment>
As shown in FIG. 1, the capacitor structure according to the first embodiment of the present invention includes a conductive substrate 1 having a through hole penetrating from a first main surface (upper surface) to a second main surface (back surface); Dielectric film 2 provided on the side wall surface of the through hole of conductive substrate 1, columnar conductive regions 4a, 4b, 4c and 4d embedded in the through hole of conductive substrate 1 through dielectric film 2, and columnar conductive The first main electrode terminal 6 electrically connected to the regions 4 a to 4 d and the second main electrode terminal 7 electrically connected to the conductive substrate 1, and the first main electrode terminal 6 and the second main electrode terminal A voltage is applied between

  The conductive substrate 1 is shown as a plurality of regions different from each other on the cross-sectional view of FIG. 1, but is an expression on a specific cross-sectional view, and as shown in FIG. May be an integrated region continuous in the back or near the paper. Similarly, the dielectric film 2 is shown as a plurality of regions different from each other in the cross-sectional view of FIG. 1, but it is an expression on a specific cross-sectional view, and actually in the back or in front of the page. It may be a continuous and integral area.

The conductive substrate 1 is made of, for example, n-type low specific resistance silicon (Si) having an impurity density of about 2 × 10 ¹⁸ to 1 × 10 ¹⁹ cm ⁻³ or more. The thickness of the conductive substrate 1 is about several hundred μm. As can be seen from FIG. 2, the conductive substrate 1 has a plurality of through holes and has a ladder shape. The dielectric film 2 is made of an insulating film such as a silicon oxide film (SiO ₂ film) or a silicon nitride film (Si ₃ N ₄ film). The dielectric film 2 is disposed on each of the side wall surfaces of the plurality of through holes of the conductive substrate 1 and is continuous from the openings of the through holes, ie, all the surfaces of the conductive substrate 1, that is, the upper surface, the back surface, and It is extended to the side.

In FIG. 1, the columnar conductive regions 4 a to 4 d are electrically integrally formed by connecting the upper portions thereof with the conductive film 3 and the lower portions thereof with the lower connection layer 4 v. Take. The columnar conductive regions 4a to 4d, the conductive film 3, and the lower connection layer 4v are made of polycrystalline Si (doped poly Si) in which an n-type impurity is added to a high impurity density of about 1 × 10 ^{18 to} 5 × 10 ¹⁹ cm ⁻³ , for example. Become. As materials for the columnar conductive regions 4a to 4d, the conductive film 3, and the lower connection layer 4v, metals such as aluminum (Al), copper (Cu), gold (Au), and tungsten (W) can also be used. Note that the columnar conductive regions 4a to 4d, the conductive film 3, and the lower connection layer 4v may be integrally formed of the same member or may be formed of individual members. Even when the columnar conductive regions 4a to 4d, the conductive film 3, and the lower connection layer 4v are made of individual members, the same material may be used, or different materials may be used.

  The columnar conductive regions 4 a to 4 d are respectively embedded in a plurality of through holes provided in the conductive substrate 1 through the dielectric film 2. The columnar conductive regions 4a to 4d may be, for example, a columnar shape or a prismatic shape having a vertical side wall, or may be a tapered cone shape or a pyramid shape. The columnar conductive regions 4 a to 4 d are electrically connected to the first main electrode terminal 6 through the conductive film 3. The conductive film 3 is disposed on the upper surface and side surfaces of the conductive substrate 1 via the dielectric film 2 so as to contact the upper ends of the columnar conductive regions 4 a to 4 d and the lower portion of the first main electrode terminal 6. The lower connection layer 4v is disposed on the back surface of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the lower ends of the columnar conductive regions 4a to 4d, and is connected to the conductive film 3. The conductive film 3 is not disposed between the upper ends of the columnar conductive regions 4 a to 4 d and the lower portion of the first main electrode terminal 6, and the upper ends of the columnar conductive regions 4 a to 4 d and the lower portion of the first main electrode terminal 6 are not provided. And may be in direct contact.

An insulating film 5 made of a SiO ₂ film, a Si ₃ N ₄ film, or the like is disposed so as to cover the conductive film 3 and the lower connection layer 4v. On the left side of FIG. 1, an opening (contact hole) is opened in the insulating film 5 on the upper surface side of the conductive film 3. In this contact hole, the lower portion of the T-shaped first main electrode terminal 6 is buried so as to be in contact with the conductive film 3, and the first main electrode terminal 6 and the conductive film 3 have the same potential.

Further, on the right side of FIG. 1, a plurality of openings (contact holes) penetrating the dielectric film 2, the conductive film 3, and the insulating film 5 on the upper surface side of the conductive substrate 1 are opened. In the plurality of contact holes, a plurality of contact plugs 10a and 10b provided on the lower surface of the land portion 7u which is a part of the second main electrode terminal 7 are buried so as to be in contact with the conductive substrate 1, respectively. The electrode terminal 7 and the conductive substrate 1 have the same potential. On the side walls of the contact plugs 10a and 10b, plug side wall insulating films 8a and 8b made of SiO ₂ film, Si ₃ N ₄ film or the like are disposed so as to insulate the contact plugs 10a and 10b from the conductive film 3. .

  As materials for the first main electrode terminal 6, the land portion 7u, and the contact plugs 10a and 10b, for example, metals such as Al, Cu, Au, and W can be used. The first main electrode terminal 6, the land portion 7u, and the contact plugs 10a and 10b may use the same material, or may use different materials. The contact plugs 10a and 10b may be made of refractory metal such as W, molybdenum (Mo), titanium (Ti), and the land portion 7u may be made of Al, Cu, Au, or the like.

  According to the capacitor structure according to the first embodiment, a capacitor is configured by the conductive substrate 1, the dielectric film 2, and the columnar conductive regions 4 a to 4 d on the side wall surface of the through hole of the conductive substrate 1. Further, a capacitor is constituted by the conductive substrate 1, the dielectric film 2 and the conductive film 3 on the upper surface and the side surface side of the conductive substrate 1, and the conductive substrate 1, the dielectric film 2 and the lower portion are formed on the back surface side of the conductive substrate 1. A capacitor is formed by the connection layer 4v.

  FIG. 2 is a horizontal cross-sectional view of the capacitor structure according to the first embodiment viewed from the AA direction shown in FIG. Note that a cross-sectional view in the vertical direction seen from the BB direction shown in FIG. 2 corresponds to FIG. When viewed as a planar layout as shown in FIG. 2, the entire conductive substrate 1 is continuous in a ladder shape and takes the same potential.

  In FIG. 2, the contact plugs 10a, 10b, 10c, and 10d do not exist on the horizontal cross section along the AA direction. However, for convenience of explanation, the positions of the contact plugs 10a, 10b, 10c, and 10d are indicated by two-dot chain lines. This is shown schematically. Similarly to the contact plugs 10a and 10b, the contact plugs 10c and 10d may be made of the same metal as the land portion 7u shown in FIG. 1 or may be made of a different metal.

  As shown in FIG. 2, columnar conductive regions 4e, 4f, 4g, and 4h are arranged in parallel on the upper side of the columnar conductive regions 4a to 4d shown in FIG. The columnar conductive regions 4a to 4h are discontinuous patterns, but are electrically connected to the first main electrode terminal 6 via the conductive film 3 and the lower connection layer 4v shown in FIG. 4a to 4h have the same potential. The number and arrangement positions of the columnar conductive regions 4a to 4h and the contact plugs 10a to 10d are not particularly limited and can be set as appropriate.

  Next, an example of the operation of the capacitor structure according to the first embodiment will be described. When a positive DC voltage is applied to the second main electrode terminal 7 with the first main electrode terminal 6 shown in FIG. 1 as a reference potential, a negative charge flows through the first main electrode terminal 6, and the conductive film 3 and the dielectric It accumulates at the interface with the film 2, the interface between the columnar conductive regions 4a to 4d and the dielectric film 2, and the interface between the lower connection layer 4v and the dielectric film 2, and functions as a capacitor. On the other hand, a positive charge flows in through the second main electrode terminal 7, accumulates at the interface between the conductive substrate 1 and the dielectric film 2, and functions as a capacitor. Thus, between the first main electrode terminal 6 and the second main electrode terminal 7, the capacitor composed of the conductive film 3, the dielectric film 2 and the conductive substrate 1, the columnar conductive regions 4a to 4d, the dielectric A parallel circuit of a capacitor composed of the film 2 and the conductive substrate 1 and a capacitor composed of the lower connection layer 4v, the dielectric film 2 and the conductive substrate 1 functions.

  On the contrary, when a negative DC voltage is applied to the second main electrode terminal 7 with the first main electrode terminal 6 shown in FIG. 1 as a reference potential, a positive charge flows through the first main electrode terminal 6. And accumulated at the interface between the conductive film 3 and the dielectric film 2, the interface between the columnar conductive regions 4a to 4d and the dielectric film 2, and the interface between the lower connection layer 4v and the dielectric film 2, and functions as a capacitor. On the other hand, negative charges flow through the second main electrode terminal 7, accumulate at the interface between the conductive substrate 1 and the dielectric film 2, and function as a capacitor. Thus, between the first main electrode terminal 6 and the second main electrode terminal 7, the capacitor composed of the conductive film 3, the dielectric film 2 and the conductive substrate 1, the columnar conductive regions 4a to 4d, the dielectric A parallel circuit of a capacitor composed of the film 2 and the conductive substrate 1 and a capacitor composed of the lower connection layer 4v, the dielectric film 2 and the conductive substrate 1 functions.

  For example, when an AC signal is applied to the second main electrode terminal 7, the AC signal is transmitted from the second main electrode terminal 7 to the conductive substrate 1, passes through the dielectric film 2, and is connected to the columnar conductive regions 4 a to 4 d and the lower connection. The light is output from the first main electrode terminal 6 via the layer 4v and the conductive film 3. At this time, since the current path length passing through the columnar conductive regions 4a to 4d is determined depending on the thickness of the conductive substrate 1, resistance loss occurs in the portions of the columnar conductive regions 4a to 4d. Heat generated by this resistance loss can be released to the outside through the lower connection layer 4v and the insulating film 5 located on the back surface side of the conductive substrate 1, and further, the conductive film 3 located on the surface side of the conductive substrate 1 and It can be discharged to the outside through the first main electrode terminal 6. Thus, since the heat generation in the columnar conductive regions 4a to 4d can be efficiently cooled, the temperature rise of the capacitor structure can be suppressed. Therefore, an increase in resistance due to a temperature rise, that is, an increase in the equivalent series resistance (ESR) of the capacitor can be suppressed and a loss can be reduced.

<Effects of Capacitor Structure of First Embodiment>
As described above, according to the capacitor structure according to the first embodiment, the conductive structure having the through hole penetrating from the upper surface to the back surface between the first main electrode terminal 6 and the second main electrode terminal 7. A capacitor can be configured by configuring the substrate 1, the dielectric film 2 provided on the side wall surface of the through hole of the conductive substrate 1, and the columnar conductive regions 4 a to 4 d embedded in the through hole via the dielectric film 2. That is, the first main electrode terminal 6 has the same potential as the columnar conductive regions 4a to 4d, and the second main electrode terminal 7 has the same potential as the conductive substrate 1, whereby the first and second main electrode terminals 6, 7 capacitor operation with two electrodes can be realized.

  The conductive substrate 1 and the columnar conductive regions 4a to 4d are made of a low specific resistance conductive material, and the dielectric film 2 is made of a high specific resistance insulating material. In general, the heat conductivity of the conductive material is higher than that of the insulating material, and heat is easily released. Therefore, the side walls of the columnar conductive regions 4a to 4d are in contact with the dielectric film 2, but the upper and lower ends of the columnar conductive regions 4a to 4d are not in contact with the dielectric film 2, so that the columnar conductive regions 4a to 4d during the capacitor operation. Can easily escape through the upper and lower ends of the columnar conductive regions 4a to 4d, and the temperature rise of the capacitor structure can be suppressed. Therefore, it is possible to prevent an increase in the ESR of the capacitor due to the temperature rise and to reduce the loss.

  Moreover, a large capacity is required for the smoothing capacitor of the power conversion device (inverter device), and several 6-inch wafers, for example, are required for one inverter device. As this smoothing capacitor, if it is going to apply the capacitor structure which has an electrode terminal one each on the upper surface side and lower surface side of Si substrate, it will be very difficult to mount and even if it can be mounted, thermal performance will deteriorate. On the other hand, according to the capacitor structure according to the first embodiment, since both the first and second main electrode terminals 6 and 7 are arranged on the upper surface side of the conductive substrate 1, it is very mounted. It becomes easy to do. For example, an upper arm element 51 and a lower arm element 52, which are power semiconductor elements constituting one phase of an inverter, can be arranged close to each other on the first and second main electrode terminals 6 and 7, as shown in FIG. The wiring inductance between elements can be reduced.

  In addition, the dielectric film 2 extends not only from the side wall of the through-hole of the conductive substrate 1 but also from one side surface of the conductive substrate 1 to the other side surface through the front and back surfaces of the conductive substrate 1. It arrange | positions so that all the surfaces of the conductive substrate 1 may be covered. Furthermore, the conductive film 3 is disposed on the upper surface and side surfaces of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the upper ends of the columnar conductive regions 4 a to 4 d and the first main electrode terminal 6. Further, the lower connection layer 4v is disposed on the back surface of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the lower ends of the columnar conductive regions 4a to 4d, and is connected to the conductive film 3. Therefore, a parallel circuit of capacitors can be configured by the conductive film 3, the dielectric film 2, and the conductive substrate 1 on the upper surface and the side surface side of the conductive substrate 1, and the lower connection layer 4v, the dielectric film can be formed on the rear surface side of the conductive substrate 1. 2 and the conductive substrate 1 can constitute a parallel circuit of a capacitor, and the effective electrode area of the capacitor is increased, so that the capacitance value of the entire capacitor structure can be further increased.

  Furthermore, a capacitor constituted by the columnar conductive regions 4a to 4d, the dielectric film 2 and the conductive substrate 1, a capacitor constituted by the lower connection layer 4v, the dielectric film 2 and the conductive substrate 1, a conductive film 3, a dielectric Since the capacitor composed of the film 2 and the conductive substrate 1 can be configured using the same dielectric film 2, manufacturing is facilitated and variation in capacitance can be reduced.

  In addition, the structure without any one or both of the electrically conductive film 3 and the lower connection layer 4v may be sufficient. When the conductive film 3 is not provided, the first main electrode terminal 6 is disposed on the upper surface of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the upper ends of the columnar conductive regions 4a to 4d. A capacitor can be constituted by the first main electrode terminal 6, the dielectric film 2 and the conductive substrate 1 on the upper surface side of the substrate 1. When there is no lower connection layer 4v, for example, the lower ends of the columnar conductive regions 4a to 4d are in contact with the insulating film 5.

Further, in the case where the conductive substrate 1 is made of Si, a semiconductor process (Si process) can be applied, which facilitates manufacturing. Furthermore, a good-quality SiO ₂ film can be formed as the dielectric film 2 by oxidizing the conductive substrate 1 made of Si. Since the SiO ₂ film can be formed on the entire surface of the conductive substrate 1 with high uniformity, the manufacturing becomes easy and the variation in capacitance can be reduced. Moreover, as the conductive substrate 1, a polycrystalline Si (doped poly Si) substrate may be used instead of the single crystal Si substrate. When the conductive substrate 1 is made of polycrystal Si, the capacitor operation and the heat cooling method are the same as in the case of being made of single crystal Si, and can be manufactured at a lower cost than the case of using single crystal Si. Further, when the columnar conductive regions 4a to 4d are made of polycrystalline Si, a semiconductor process (Si process) can be applied, and it is easy to embed even in a deep through-hole, thereby reducing variation in capacitance.

<Method for Manufacturing Capacitor Structure of First Embodiment>
Next, an example of a method for manufacturing the capacitor structure according to the first embodiment will be described with reference to FIGS. Note that the method of manufacturing the capacitor structure described below is an example, and can be realized by various other manufacturing methods including this modification as long as it is within the scope of the claims. Of course.

(A) A conductive substrate 1 made of n-type low specific resistance Si is prepared. As shown in FIG. 3, a plurality of through holes 11a and 11b penetrating from the upper surface to the lower surface of the conductive substrate 1 by a Bosch process or the like. , 11c, 11d. In the Bosch process, an anisotropic etching process such as reactive ion etching (RIE) using sulfur hexafluoride (SF ₆ ) gas, and a protective film using octafluorocyclobutane (C ₄ F ₈ ) gas are used. By alternately repeating the deposition process, the conductive substrate 1 can be deeply dug so as to form a vertical side wall.

(B) Next, as shown in FIG. 4, a SiO ₂ film is formed as a dielectric film 2 on all exposed surfaces of the conductive substrate 1 by a thermal oxidation method or the like. For example, by heating the conductive substrate 1 in an oxygen (O ₂ ) atmosphere at about 1000 ° C., a SiO ₂ film can be formed on all surfaces of the conductive substrate 1 that come into contact with O ₂ . The thickness of the SiO ₂ film can be appropriately set according to the required breakdown voltage. When the SiO ₂ film is used as the dielectric film 2, it can be formed directly on the exposed surface of the conductive substrate 1, so that high uniformity can be realized. When the Si ₃ N ₄ film is used as the dielectric film 2, low pressure chemical vapor deposition (LPCVD) using monosilane (SiH ₄ ) gas, dichlorosilane (SiH ₂ Cl ₂ ) gas, ammonia (NH ₃ ) gas, or the like. A uniform dielectric film 2 can be obtained using this method.

(C) Next, a dielectric film located on all surfaces of the conductive substrate 1 by LPCVD or the like using hydrogen (H ₂ ) as a carrier gas and SiH ₄ gas or SiH ₂ Cl ₂ gas as a source gas. A polycrystalline Si layer is deposited on 2. The thickness of the polycrystalline Si layer is set to be larger than ½ of the width in which the dielectric film 2 in contact with the through holes 11a to 11d of the conductive substrate 1 is opposed to and separated from the through hole 11a of the conductive substrate 1. ˜11d can be filled with polycrystalline Si through the dielectric film 2. When LPCVD is performed, the lower connection layer 4v is not deposited when the lower surface side of the conductive substrate 1 is in contact with the susceptor. Therefore, LPCVD may be performed twice by changing the front and back sides. In the case where the end portion of the conductive substrate 1 is vertically placed between the grooves of the susceptor, it can be deposited on the upper surface and the back surface of the conductive substrate 1 at the same time. Just do it. After that, for example, annealing is performed in phosphoryl chloride (POCl ₃ ) at about 950 ° C., so that the polycrystalline Si layer is doped with n-type impurities by a diffusion treatment such as doping with phosphorus (P), thereby providing conductivity. A doped poly-Si layer can be formed. Alternatively, an n-type doped poly-Si layer can be formed by simultaneously flowing phosphine (PH ₃ ) and arsine (A _s H ₃ ) doping gases during LPCVD. As a result, as shown in FIG. 5, the n-type polycrystalline Si layer 4 can collectively form the conductive film 3, the columnar conductive regions 4a to 4d, and the lower connection layer 4v shown in FIG. As shown in FIG. 1, the columnar conductive regions 4 a to 4 d are embedded in the through holes of the conductive substrate 1 through the dielectric film 2. The conductive film 3 is formed on the upper surface and side surfaces of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the upper ends of the columnar conductive regions 4a to 4d. The lower connection layer 4v is formed on the back surface of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the lower ends of the columnar conductive regions 4a to 4d. If necessary, the upper surface of the conductive film 3 and the lower surface of the lower connection layer 4v may be planarized by chemical mechanical polishing (CMP) or the like.

(D) Next, as shown in FIG. 6, an insulating film 5 made of a SiO ₂ film or a Si ₃ N ₄ film is deposited on the polycrystalline Si layer 4 by LPCVD or the like. The thickness of the insulating film 5 can be set as appropriate according to the required breakdown voltage. In addition, since it may be difficult to deposit when the Si ₃ N ₄ film is thick, it may be a composite film with the SiO ₂ film. As another method for depositing the Si ₃ N ₄ film, a plasma CVD method can be employed. In general, only the surface facing the plasma can be uniformly formed by the plasma CVD method. Therefore, in order to deposit the Si ₃ N ₄ film on all the surfaces of the polycrystalline Si layer 4, different surfaces are divided into several times. A Si ₃ N ₄ film may be deposited so as to face the surface.

(E) Next, as shown in FIG. 7, a photoresist film 12 is applied on the insulating film 5 located on the upper surface side of the conductive substrate 1 using a spinner or the like. The photoresist film 12 is patterned using a photolithography technique. Using the patterned photoresist film 12 as a mask, a part of each of the insulating film 5, the conductive film 3 and the dielectric film 2 located on the conductive substrate 1 is selectively removed sequentially by a dry etching method or the like. . As a result, as shown in FIG. 8, contact holes 10x and 10y exposing the upper surface of the conductive substrate 1 are formed. Thereafter, the remaining photoresist film 12 is removed by O ₂ plasma or the like.

(F) Next, as shown in FIG. 9, the conductive substrate exposed at the ends of the conductive film 3 exposed at the side walls of the contact holes 10x and 10y and the bottom of the contact holes 10x and 10y by thermal oxidation or the like. The SiO ₂ films 8a and 8b are formed on the upper surface of 1. Thereafter, SiO ₂ films 8a and 8b formed on the upper surface of the conductive substrate 1 exposed on the bottom surfaces of the contact holes 10x and 10y without using a mask are selected by a highly directional anisotropic dry etching method or the like. To remove. As a result, as shown in FIG. 10, plug sidewall insulating films 8a and 8b made of SiO ₂ film are formed at the end portions of the conductive film 3 exposed at the sidewall portions of the contact holes 10x and 10y.

(G) Next, as shown in FIG. 11, a photoresist film 12a is applied on the insulating film 5 located on the surface side of the conductive substrate 1 using a spinner or the like. The photoresist film 12a is patterned using a photolithography technique. Using the patterned photoresist film 12a as a mask, a part of the insulating film 5 is selectively removed by a dry etching method or the like. As a result, the contact hole 9x is opened as shown in FIG. Thereafter, the remaining photoresist film 12a is removed by O ₂ plasma or the like.

  (H) Next, a metal film 15 such as Al is deposited on the insulating film 5 located on the upper surface side of the conductive substrate 1 by vapor deposition, sputtering, CVD, or the like, and shown in FIG. Thus, the metal film 15 is planarized. At this time, Al can be deposited in all regions in contact with the reaction gas such as trimethylaluminum (TMA) by using the organic metal (MO) CVD method, so that the first and second main electrode terminals 6 and 7 are formed. The metal film 15 can be simultaneously deposited in the region. Then, a photoresist film is applied on the metal film 15 using a spinner or the like, and the photoresist film is patterned by a photolithography technique. A part of the metal film 15 is selectively removed by dry etching or the like using the patterned photoresist film as a mask. As a result, the first and second main electrode terminals 6 and 7 shown in FIG. 1 are formed, and the capacitor structure according to the first embodiment is completed. The first and second main electrode terminals 6 and 7 are formed of contact plugs 10a and 10b made of a refractory metal such as W, Mo and Ti and Al as shown in FIG. 1, instead of a single layer structure made of Al. , Cu, Au, etc., and a land structure 7u. Further, in the structure shown in FIG. 13, the second main electrode terminal 7 may have a laminated structure of Ti and Al.

  According to the method for manufacturing a capacitor structure according to the first embodiment, it is possible to realize a capacitor structure that can suppress a temperature increase due to heat generation during capacitor operation and can reduce loss during capacitor operation. Further, as shown in FIG. 5, the doped poly-Si layer 4 is formed at the same time simultaneously with the conductive film 3, the columnar conductive regions 4a to 4d and the lower connection layer 4v shown in FIG. A highly reliable conductive film 3, columnar conductive regions 4a to 4d, and a lower connection layer 4v are obtained. Further, by forming the first and second main electrode terminals 6 and 7 from the metal film 15 shown in FIG. 13 at the same time, the first and second main electrode terminals 6 and 6 which are inexpensive, have little film variation, and have high reliability. 7 is obtained.

<Capacitor Module of First Embodiment>
As shown in FIG. 14, the capacitor module according to the first embodiment includes a capacitor structure 100 according to the first embodiment, an upper arm element 51 and a lower arm element 52 arranged on the capacitor structure 100, and And an inverter module that constitutes one phase of the inverter. The capacitor structure 100 functions as a smoothing capacitor. The upper arm element 51 and the lower arm element 52 are power semiconductor elements for one phase of the inverter. If the inverter is a three-phase inverter, other similar inverter modules exist for two phases. As power semiconductor elements constituting the upper arm element 51 and the lower arm element 52, switching elements such as IGBTs and MOSFETs can be employed. Alternatively, a diode element is possible, a switching element having a diode function is possible, and a diode and a switching element arranged in parallel are also possible.

  For example, when the upper arm element 51 and the lower arm element 52 are MOSFET transistors, the upper arm element 51 is disposed on the first main electrode terminal 6 of the capacitor structure 100, and the first arm element 51 has the first arm element 51. An electrode (for example, a drain electrode) is electrically connected to the first main electrode terminal 6. On the other hand, the lower arm element 52 is disposed on the second main electrode terminal 7 of the capacitor structure 100, and the first electrode (for example, the source electrode) of the lower arm element 52 is electrically connected to the second main electrode terminal 7. ing. The second electrode (for example, the source electrode) of the upper arm element 51 and the second electrode (for example, the drain electrode) of the lower arm element 52 are electrically connected to each other via the intermediate electrode 53, and thus, as an inverter module. It becomes possible to operate.

  According to the capacitor module according to the first embodiment, the heat generated in the upper arm element 51 and the lower arm element 52 can be released using the capacitor structure 100 during the capacitor operation. In addition, in the case of a capacitor structure in which one electrode is disposed on each of the upper surface side and the back surface side of the Si substrate, an upper arm element and a lower arm element are disposed on the upper surface side and the back surface side of the Si substrate in order to connect to each electrode. This makes it difficult to connect the upper arm element and the lower arm element to each other. On the other hand, according to the capacitor module according to the first embodiment, both the first and second main electrode terminals 6 and 7 of the capacitor structure 100 are arranged on the upper surface side of the conductive substrate 1. Both the upper arm element 51 and the lower arm element 52 can be arranged close to the upper surface side of the conductive substrate 1, and the upper arm element 51 and the lower arm element 52 can be easily connected to each other. Further, since the first and second main electrode terminals 6 and 7 are directly connected to the source electrode of the upper arm element 51 and the drain electrode of the lower arm element 52, the internal parasitic inductance of the module can be reduced, and the power semiconductor Surge components generated during the switching operation of the element can be reduced, and a low-loss capacitor module can be realized.

  In FIG. 14, the case where the upper arm element 51 is arranged on the first main electrode terminal 6 and the lower arm element 52 is arranged on the second main electrode terminal 7 has been described. The lower arm element 52 may be disposed on the first main electrode terminal 6 and the upper arm element 51 may be disposed on the second main electrode terminal 7.

  As a method of manufacturing a capacitor module according to the first embodiment, the capacitor structure 100 according to the first embodiment is prepared, and the upper arm is connected to the first and second main electrode terminals 6 and 7 of the capacitor structure 100. The drain electrode of the element 51 and the source electrode of the lower arm element 52 are bonded together by soldering, brazing, crimping or the like. Thereafter, the capacitor module according to the first embodiment can be manufactured by connecting the source electrode of the upper arm element 51 and the drain electrode of the lower arm element 52 via the intermediate electrode 53.

(First modification of the first embodiment)
As shown in FIG. 15, the capacitor structure according to the first modification of the first embodiment includes a metal film 13a disposed on the conductive film 3 located on the upper surface side of the conductive substrate 1, and a conductive structure. 1 is different from the structure shown in FIG. 1 in that it further includes a metal film 13b disposed on the lower connection layer 4v located on the back surface side of the substrate 1. The metal film 13a is made of a metal material different from that of the conductive film 3, and the metal film 13b is made of a metal material different from that of the lower connection layer 4v. For example, when the conductive film 3 and the lower connection layer 4v are made of polycrystalline Si, the metal films 13a and 13b may be made of Al or a refractory metal such as W, Mo, or Ti, and the metal films 13a and 13b may be made of WSi. _As a silicide of a refractory metal such as ₂ , MoSi ₂ , or TiSi ₂ , a polycide structure may be formed with the underlying polycrystalline Si.

  According to the capacitor structure according to the first modification of the first embodiment, the metal film 13 a disposed on the conductive film 3 located on the upper surface side of the conductive substrate 1 and the back surface side of the conductive substrate 1. By further including the metal film 13b disposed on the lower connection layer 4v located in the capacitor, the ESR of the capacitor can be reduced, and the heat generation during the capacitor operation can be reduced.

As a manufacturing method of the capacitor structure according to the first modification of the first embodiment, as shown in FIG. 5, the columnar conductive regions 4a to 4d, the conductive film 3, and the lower connection layer 4v of FIG. 15 are realized. After the polycrystalline Si layer 4 is formed, metal films 13a and 13b are deposited on the polycrystalline Si layer 4 to be the conductive film 3 and the lower connection layer 4v by sputtering or MOCVD. Further, after opening the contact holes 10x and 10y as in the step shown in FIG. 8, instead of using the thermal oxidation method, an insulating film made of a SiO ₂ film or a Si ₃ N ₄ film is deposited by the LPCVD method or the like. . Thereafter, the insulating film located on the bottom surfaces of the contact holes 10x and 10y is selectively removed by etching back. As a result, the metal film 13a exposed on the side wall portions of the contact holes 10x and 10y and the insulating film on the end portions of the conductive film 3 remain to form plug side wall insulating films.

(Second modification of the first embodiment)
As shown in FIG. 16, the capacitor structure according to the second modification of the first embodiment includes a cooling mechanism (second main surface cooling) disposed on the back surface (second main surface) side of the conductive substrate 1. (Mechanism) 23 is further different from the configuration of the capacitor structure according to the first embodiment shown in FIG. As the cooling mechanism 23, various cooling mechanisms such as a copper plate, a general personal computer central processing unit (CPU) cooling fin, and a water cooling mechanism for automobiles can be employed, and are not particularly limited.

  In the capacitor structure according to the second modification of the first embodiment, heat generated during capacitor operation, particularly heat generated in the columnar conductive regions 4a to 4d, is generated by the lower connection layer 4v located on the back side of the conductive substrate 1 and Since it can escape to the cooling mechanism 23 through the insulating film 5, it can cool efficiently. Further, since the cooling mechanism 23 is in contact with the insulating film 5, the cooling mechanism 23 can be connected to the lower connection layer 4v, the lower ends of the columnar conductive regions 4a to 4d, etc. without newly interposing an insulating layer or the like on the cooling mechanism 23. Can be insulated.

  In the conventional capacitor structure, when the cooling mechanism is disposed on the back side of the structure in which the capacitor is configured by sandwiching the dielectric with the first and second conductors in the hole provided in the Si substrate, the first and first Heat generated by the second conductor escapes to the cooling mechanism via the dielectric film and the Si substrate. Since the dielectric is basically an insulator and has a very low thermal conductivity, high cooling performance cannot be obtained even if a cooling mechanism is used. On the other hand, according to the capacitor structure according to the second modification of the first embodiment, the cooling mechanism 23 is disposed on the insulating film 5 located on the back surface side of the conductive substrate 1, thereby Since the heat generated in the columnar conductive regions 4a to 4d during operation can be released from the upper and lower ends of the columnar conductive regions 4a to 4d to the cooling mechanism 23 without passing through the dielectric film 2, it can be efficiently cooled. For this reason, the cooling performance of a capacitor | condenser structure can be improved and a temperature rise can be suppressed. Therefore, an increase in ESR due to a temperature rise can be prevented, and a loss can be reduced.

  As a method for manufacturing a capacitor structure according to the second modification of the first embodiment, the capacitor structure according to the first embodiment is prepared, and the insulating film 5 on the back side of the conductive substrate 1 and the cooling mechanism are prepared. 23 may be bonded with an adhesive or the like. For example, after melting the solder on the surface of the cooling mechanism 23 and mounting the capacitor structure according to the first embodiment on the melted solder, the solder may be cooled and cured.

(Second Embodiment)
<Configuration of Capacitor Structure of Second Embodiment>
As shown in FIG. 17, the capacitor structure according to the second embodiment of the present invention includes a conductive substrate 1 having a through hole penetrating from a first main surface (upper surface) to a second main surface (back surface), Dielectric film 2 provided on the side wall surface of the through hole of conductive substrate 1, columnar conductive regions 4a to 4d embedded in the through hole via dielectric film 2, and electrically connected to columnar conductive regions 4a to 4d The first main electrode terminal 6 and the second main electrode terminal 7 electrically connected to the conductive substrate 1 are provided. The capacitor structure according to the second embodiment further includes a first auxiliary electrode terminal 16 disposed on the back side of the conductive substrate 1 so as to be electrically connected to the columnar conductive regions 4 a to 4 d, and the conductive substrate 1. 1 is different from the capacitor structure according to the first embodiment shown in FIG. 1 in that a second auxiliary electrode terminal 17 is provided on the back surface side of the first auxiliary electrode terminal 17 so as to be electrically connected to the conductive substrate 1.

  The first main electrode terminal 6 and the first auxiliary electrode terminal 16 are used at the same potential, and the second main electrode terminal 7 and the second auxiliary electrode terminal 17 are used at the same potential. The names of the first main electrode terminal 6, the first auxiliary electrode terminal 16, the second main electrode terminal 7, and the second auxiliary electrode terminal 17 are merely a matter of selection, and the first main electrode terminal 6 and the first auxiliary electrode The terminal 16 is an equivalent electrode, and the second main electrode terminal 7 and the second auxiliary electrode terminal 17 are equivalent electrodes. Therefore, the first auxiliary electrode terminal 16 is called “first main electrode terminal”, the first main electrode terminal 6 is called “first auxiliary electrode terminal”, the second auxiliary electrode terminal 17 is called “second main electrode terminal”, the second The two main electrode terminals 7 may be referred to as “second auxiliary electrode terminals”. The first and second auxiliary electrode terminals 16 and 17 may use the same metal material such as Al, or may use different materials. The first and second auxiliary electrode terminals 16 and 17 may use the same material as the first and second main electrode terminals 6 and 7 or may use different materials.

  The first auxiliary electrode terminal 16 is disposed at a position facing the first main electrode terminal 6 across the conductive substrate 1. In FIG. 17, the electrode surface of the first auxiliary electrode terminal 16 faces the electrode surface of the first main electrode terminal 6. The upper part of the T-shaped first auxiliary electrode terminal 16 is in contact with the lower connection layer 4v by filling an opening (contact hole) opened in the insulating film 5 located on the back side of the conductive substrate 1, The first auxiliary electrode terminal 16 and the lower connection layer 4v have the same potential.

  The second auxiliary electrode terminal 17 is disposed at a position facing the second main electrode terminal 7 across the conductive substrate 1. In FIG. 17, the electrode surface of the second auxiliary electrode terminal 17 faces the electrode surface of the second main electrode terminal 7. As a part of the second auxiliary electrode terminal 17, contact plugs 20 a and 20 b protruding upward from the second auxiliary electrode terminal 17 include the insulating film 5, the lower connection layer 4 v and the dielectric film located on the back side of the conductive substrate 1. The second auxiliary electrode terminal 17 and the conductive substrate 1 are at the same potential. The second auxiliary electrode terminal 17 and the conductive substrate 1 have the same potential. On the side wall portions of the contact plugs 20a and 20b, plug side wall insulating films 18a and 18b for insulating the contact plugs 20a and 20b and the conductive film 3 are disposed. Since the other structure of the capacitor structure according to the second embodiment is the same as the structure of the capacitor structure according to the first embodiment, a duplicate description is omitted.

  In the operation method of the capacitor structure according to the second embodiment, the first main electrode terminal 6 and the first auxiliary electrode terminal 16 are set to the same potential, and the second main electrode terminal 7 and the second auxiliary electrode terminal 17 are connected to each other. If operated at the same potential, the operation method of the capacitor structure according to the first embodiment is the same as that of the first embodiment. Heat generated during operation of the capacitor structure according to the second embodiment can be released from the back side of the conductive substrate 1 through the first and second auxiliary electrode terminals 16 and 17 having high thermal conductivity. The cooling can be performed more efficiently than the capacitor structure according to the first embodiment.

<Effects of Capacitor Structure of Second Embodiment>
As described above, according to the capacitor structure according to the second embodiment, the conductive structure having the through hole penetrating from the upper surface to the back surface between the first main electrode terminal 6 and the second main electrode terminal 7. The substrate 1, the dielectric film 2 provided on the side wall surface of the through hole of the conductive substrate 1, and the columnar conductive regions 4a to 4d embedded in the through hole of the conductive substrate 1 through the dielectric film 2 are configured. Capacitor can be configured. That is, the first main electrode terminal 6 has the same potential as the columnar conductive regions 4a to 4d, and the second main electrode terminal 7 has the same potential as the conductive substrate 1, whereby the first and second main electrode terminals 6, 7 capacitor operation with two electrodes can be realized.

  The conductive substrate 1 and the columnar conductive regions 4a to 4d are made of a low specific resistance conductive material, and the dielectric film 2 is made of a high specific resistance insulating material. In general, the heat conductivity of the conductive material is higher than that of the insulating material, and heat is easily released. Accordingly, the vertical side walls of the columnar conductive regions 4a to 4d are in contact with the dielectric film 2, but the upper and lower ends of the columnar conductive regions 4a to 4d are not in contact with the dielectric film 2, so that the columnar conductive regions 4a to 4d during capacitor operation are in contact. The heat generated in 4d tends to escape from the upper and lower ends of the columnar conductive regions 4a to 4d to the outside of the columnar conductive regions 4a to 4d. For this reason, the temperature rise of the capacitor structure can be suppressed. Therefore, it is possible to prevent an increase in the ESR of the capacitor due to the temperature rise and to reduce the loss.

  In addition, since both the first and second main electrode terminals 6 and 7 are disposed on the upper surface side of the conductive substrate 1, it is very easy to mount. For example, as shown in FIG. 24, the upper arm element 51 and the lower arm element 52, which are power semiconductor elements for one phase of the inverter, can be arranged close to each other on the first and second main electrode terminals 6 and 7, The wiring inductance between them can be reduced.

  The dielectric film 2 extends not only from the side wall surface of the through hole of the conductive substrate 1 but also from one side surface of the conductive substrate 1 to the other side surface through the front and back surfaces of the conductive substrate 1. The conductive substrate 1 is disposed so as to cover all surfaces. Furthermore, the conductive film 3 is disposed on the upper surface and side surfaces of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the upper ends of the columnar conductive regions 4 a to 4 d and the first main electrode terminal 6. Further, the lower connection layer 4v is disposed on the back surface of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the lower ends of the columnar conductive regions 4a to 4d, and is connected to the conductive film 3. Therefore, a parallel circuit of capacitors can be configured by the conductive film 3, the dielectric film 2, and the conductive substrate 1 on the upper surface and the side surface side of the conductive substrate 1, and the lower connection layer 4v, the dielectric film can be formed on the rear surface side of the conductive substrate 1. 2 and the conductive substrate 1 can constitute a parallel circuit of the capacitor, and the effective capacitor electrode area is increased, so that the capacity can be increased. When the conductive film 3 is not provided, the first main electrode terminal 6 is disposed on the upper surface of the conductive substrate 1 via the dielectric film 2 so as to be in contact with the upper ends of the columnar conductive regions 4a to 4d. A capacitor can be constituted by the first main electrode terminal 6, the dielectric film 2 and the conductive substrate 1 on the upper surface side of the conductive substrate 1.

  Furthermore, a capacitor constituted by the columnar conductive regions 4a to 4d, the dielectric film 2 and the conductive substrate 1, a capacitor constituted by the conductive film 3, the dielectric film 2 and the conductive substrate 1, a lower connection layer 4v, a dielectric Since the capacitor composed of the film 2 and the conductive substrate 1 can be realized by using the same dielectric film 2, it is easy to manufacture and the variation in capacitance can be reduced.

Further, in the case where the conductive substrate 1 is made of Si, a semiconductor process (Si process) can be applied, which facilitates manufacturing. Furthermore, a good-quality SiO ₂ film can be formed as the dielectric film 2 by oxidizing the conductive substrate 1 made of Si. Since the SiO ₂ film can be formed on the entire surface of the conductive substrate 1 with high uniformity, the manufacturing becomes easy and the variation in capacitance can be reduced. Moreover, as the conductive substrate 1, a polycrystalline Si (doped poly Si) substrate may be used instead of the single crystal Si substrate. When the conductive substrate 1 is made of polycrystal Si, the capacitor operation and the heat cooling method are the same as in the case of being made of single crystal Si, and can be manufactured at a lower cost than the case of using single crystal Si. Further, when the columnar conductive regions 4a to 4d are made of polycrystalline Si, a semiconductor process (Si process) can be applied, and it is easy to embed even in a deep through-hole, thereby reducing variation in capacitance.

  Further, by further including the first and second auxiliary electrode terminals 16 and 17 disposed on the back surface side of the conductive substrate 1, the degree of mounting freedom can be improved. For example, when the capacitor structure according to the second embodiment is applied to a smoothing capacitor of an inverter, the first and second main electrode terminals 6 and 7 located on the surface side of the conductive substrate 1 are used as power semiconductor elements. The first and second auxiliary electrode terminals 16 and 17 located on the back side of the conductive substrate 1 can be connected to the positive electrode and the negative electrode of the DC power source.

  In particular, when the first and second auxiliary electrode terminals 16 and 17 are made of a metal material having a high thermal conductivity, heat generated in the columnar conductive regions 4a to 4d during the operation of the capacitor is generated on the surface side of the conductive substrate 1. The first and second main electrode terminals 6, 7 located in the first and second auxiliary electrode terminals 16, 17 located on the back side of the conductive substrate 1 can be escaped, so that the temperature of the capacitor The rise can be suppressed. Therefore, it is possible to prevent an increase in ESR accompanying a temperature rise, and a loss can be reduced.

  Also, at least a part of the electrode surface of the first main electrode terminal 6 located on the upper surface side of the conductive substrate 1 and at least a part of the electrode surface of the first auxiliary electrode terminal 16 located on the back surface side of the conductive substrate 1 Are opposed to each other and at least part of the electrode surface of the second main electrode terminal 7 located on the front surface side of the conductive substrate 1 and at least the electrode surface of the second auxiliary electrode terminal 17 located on the back surface side of the conductive substrate 1. When a plurality of capacitor structures according to the second embodiment are stacked, the first and the second capacitor structures that are adjacent to each other in the stacking direction are disposed on the upper surface side. The second main electrode terminals 6 and 7 can be connected to the first and second auxiliary electrode terminals 16 and 17 disposed on the lower surface side of the upper capacitor structure, respectively. Therefore, a plurality of capacitor structures can be easily connected in parallel, and the capacity can be easily increased. The electrode surface of the first main electrode terminal 6 and the electrode surface of the first auxiliary electrode terminal 16 do not necessarily face each other, and the electrode surface of the second main electrode terminal 7 and the second auxiliary electrode terminal 17 The electrode surfaces do not necessarily face each other.

<Method for Manufacturing Capacitor Structure of Second Embodiment>
Next, an example of a method for manufacturing a capacitor structure according to the second embodiment will be described. Note that the method of manufacturing the capacitor structure described below is an example, and can be realized by various other manufacturing methods including this modification as long as it is within the scope of the claims. Of course.

  (A) Similar to the method of manufacturing the capacitor structure according to the first embodiment, the contact holes 10x and 10y exposing the upper surface of the conductive substrate 1 are opened through the steps shown in FIGS. Then, by repeating the same process as the process of opening the contact holes 10x and 10y, the contact holes 20x and 20y exposing the back surface of the conductive substrate 1 are opened as shown in FIG.

(B) Next, as shown in FIG. 19, by a thermal oxidation method or the like, the contact hole 10x, 10y in the insulating film (SiO ₂ film) 8a, the 8b, contact hole 20x, insulation also 20y film (SiO ₂ film ) 18a and 18b are formed simultaneously. Thereafter, the insulating films 8a and 8b exposed at the bottoms of the contact holes 10x and 10y and the insulating films 18a and 18b exposed at the bottoms of the contact holes 20x and 20y are selectively removed sequentially by dry etching having high directivity. To do. As a result, as shown in FIG. 20, plug sidewall insulating films 8a and 8b are formed at the end portions of the polycrystalline Si layer 4 to be the conductive film 3 shown in FIG. 17 exposed on the sidewall portions of the contact holes 10x and 10y. Then, plug sidewall insulating films 18a and 18b are formed at the ends of the polycrystalline Si layer 4 to be the lower connection layer 4v shown in FIG. 17 exposed on the sidewalls of the contact holes 20x and 20y.

(C) Next, as shown in FIG. 21, a photoresist film 12b is applied on the insulating film 5 located on the upper surface side of the conductive substrate 1 using a spinner or the like, and a photoresist film is applied by photolithography. 12b is patterned. Using the patterned photoresist film 12b as a mask, a part of the insulating film 5 is selectively removed by dry etching or the like, whereby the upper surface of the polycrystalline Si layer 4 to be the conductive film 3 shown in FIG. A contact hole 9x is opened so as to be exposed. Thereafter, the photoresist film 12b is removed by O ₂ plasma or the like.

(D) Next, as shown in FIG. 22, a photoresist film 12c is applied on the insulating film 5 located on the back side of the conductive substrate 1 using a spinner or the like, and a photoresist film is applied by photolithography. 12c is patterned. Using the patterned photoresist film 12c as a mask, a part of the insulating film 5 is selectively removed by dry etching or the like, whereby the back surface of the polycrystalline Si layer 4 to be the lower connection layer 4v shown in FIG. A contact hole 19x is opened so as to be exposed. Thereafter, the photoresist film 12b is removed by O ₂ plasma or the like.

  (E) Thereafter, contact holes 10x, 10y, 20x, and 20y that expose the conductive substrate 1 and contact holes 9x that expose the polycrystalline Si layer 4 are exposed on the upper surface side and the back surface side of the conductive substrate 1 by MOCVD or the like. , 19x, metal films 15a, 15b made of Al or the like are deposited in a lump, and are sequentially planarized by CMP or the like as shown in FIG. After that, as shown in FIG. 17, a metallization process using a photolithography technique, an etching technique, or the like is sequentially repeated on the upper surface side and the rear surface side to selectively remove part of the metal films 15a and 15b. As a result, as shown in FIG. 17, the first and second main electrode terminals 6, 7 are patterned on the upper surface side of the conductive substrate 1, and the first and second auxiliary electrode terminals 16 are formed on the rear surface side of the conductive substrate 1. , 17 are patterned to complete the capacitor structure according to the second embodiment.

  According to the method for manufacturing a capacitor structure according to the second embodiment, it is possible to realize a capacitor structure that can suppress a temperature rise due to heat generation during capacitor operation and can reduce loss during capacitor operation. Furthermore, the conductive film 3, the lower connection layer 4v, and the columnar conductive regions 4a to 4d are manufactured at the same time, so that the conductive film 3, the lower connection layer 4v, and the columnar conductive regions 4a to 4d are inexpensive and have less film variation and high reliability. Is obtained. Furthermore, the first and second main electrode terminals 6 and 7 and the first and second auxiliary electrode terminals 16 and 17 are simultaneously formed from the metal films 15a and 15b shown in FIG. The first and second main electrode terminals 6 and 7 and the first and second auxiliary electrode terminals 16 and 17 with little variation and high reliability are obtained.

<Capacitor Module of Second Embodiment>
As shown in FIG. 24, the capacitor module according to the second embodiment includes a capacitor structure 101 according to the second embodiment, and an upper arm element 51 and a lower arm element 52 arranged on the capacitor structure 101. And an inverter module that constitutes one phase of the inverter. The capacitor structure 101 functions as a smoothing capacitor. The upper arm element 51 and the lower arm element 52 are power semiconductor elements for one phase of the inverter. If the inverter is a three-phase inverter, other similar inverter modules exist for two phases. As power semiconductor elements constituting the upper arm element 51 and the lower arm element 52, switching elements such as IGBTs and MOSFETs can be employed. Alternatively, a diode element is possible, a switching element having a diode function is possible, and a diode and a switching element arranged in parallel are also possible.

  As an example, when the upper arm element 51 and the lower arm element 52 are MOSFET transistors, the upper arm element 51 is disposed on the first main electrode terminal 6 and the drain electrode of the upper arm element 51 is the first main electrode. It is electrically connected to the terminal 6. On the other hand, the lower arm element 52 is disposed on the second main electrode terminal 7, and the source electrode of the lower arm element 52 is electrically connected to the second main electrode terminal 7. The source electrode of the upper arm element 51 and the drain electrode of the lower arm element 52 are electrically connected via the intermediate electrode 53, thereby enabling operation as an inverter module.

  According to the capacitor module according to the second embodiment, similarly to the capacitor module according to the first embodiment, the heat generated in the power semiconductor element can be released using the capacitor structure 101. Further, since the first and second main electrode terminals 6 and 7 of the capacitor structure 101 and the electrodes of the upper arm element 51 and the lower arm element 52 are directly connected, the internal parasitic inductance of the module can be reduced, and the power semiconductor The surge component generated during the switching operation of the element can be reduced, and a low-loss module can be realized.

  Furthermore, since the first and second auxiliary electrode terminals 16 and 17 are arranged on the back side of the conductive substrate 1, it is easier to mount than the capacitor module according to the first embodiment. For example, power semiconductor elements such as the upper arm element 51 and the lower arm element 52 are connected to the first and second main electrode terminals 6 and 7 located on the front surface side of the conductive substrate 1, while the back surface of the conductive substrate 1. A positive electrode and a negative electrode of a DC electrode can be connected to the first and second auxiliary electrode terminals 16 and 17 located on the side.

(First Modification of Second Embodiment)
As shown in FIG. 25, the capacitor structure according to the first modification of the second embodiment includes first and second electrode connection portions 21 and 22 disposed on both side surfaces of the conductive substrate 1, respectively. Further points differ from the second embodiment. As the material of the first and second electrode connecting portions 21 and 22, a metal material such as Al can be used.

  The first electrode connection portion 21 is disposed along the insulating film 5, the upper end of the first electrode connection portion 21 is in contact with the first main electrode terminal 6, and the lower end of the first electrode connection portion 21 is connected to the first auxiliary electrode terminal 16. Touch. The first main electrode terminal 6 and the first auxiliary electrode terminal 16 are electrically connected via the first electrode connection portion 21 and have the same potential.

  The second electrode connection portion 22 is disposed along the insulating film 5, the upper end of the second electrode connection portion 22 is in contact with the second main electrode terminal 7, and the lower end of the second electrode connection portion 22 is connected to the second auxiliary electrode terminal 17. Touch. The second main electrode terminal 7 and the second auxiliary electrode terminal 17 are electrically connected via the second electrode connection portion 22 and have the same potential.

  According to the capacitor structure according to the first modification of the second embodiment, an additional capacitor is configured by the first and second electrode connecting portions 21 and 22, the conductive film 3, and the insulating film 5 on both side surfaces. Therefore, the capacity of the entire capacitor structure can be increased. Further, heat generated during the operation of the capacitor can be released through the first and second electrode connecting portions 21 and 22, and the cooling performance can be improved. Accordingly, the temperature rise of the capacitor can be suppressed, the increase in ESR due to the temperature rise can be prevented, and the loss can be reduced.

  Moreover, as shown in FIG. 17, when there is no 1st electrode connection part 21, the 1st main electrode terminal 6 and the 1st auxiliary electrode terminal 16 are connected via columnar conductive area | region 4a-4d. Therefore, the resistance component between the first main electrode terminal 6 and the first auxiliary electrode terminal 16 becomes the parallel resistance of the columnar conductive regions 4a to 4d, but the columnar conductive regions 4a to 4d are elongated columnar, When the columnar conductive regions 4a to 4d are made of polycrystalline Si, the resistance value is higher than that of the metal, and the ESR is increased. On the other hand, according to the capacitor structure according to the first modification of the second embodiment, the first main electrode terminal 6 and the first auxiliary electrode terminal 16 are arranged between the first main electrode terminal 6 and the first auxiliary electrode terminal 16. Since the first electrode connection portion 21 that electrically connects the first auxiliary electrode terminal 16 is further connected in parallel, ESR can be reduced particularly when the first electrode connection portion 21 is made of metal.

  Further, between the second main electrode terminal 7 and the second auxiliary electrode terminal 17, the conductive substrate 1 and the second electrode connection for electrically connecting the second main electrode terminal 7 and the second auxiliary electrode terminal 17. Since the part 22 is further connected in parallel, parallel resistance can be reduced. Therefore, ESR of the capacitor can be reduced, and loss can be reduced.

  Further, the first main electrode terminal 6 and the first auxiliary electrode terminal 16, the second main electrode terminal 7 and the second auxiliary electrode terminal 17 are arranged to face each other on the front surface side and the back surface side of the conductive substrate 1. By connecting a plurality of capacitor structures, they can be connected in parallel. Therefore, the capacity can be easily increased and mounting becomes easy.

  As a method of manufacturing the capacitor structure according to the first modification of the second embodiment, in the process of forming the first and second main electrode terminals 6, 7 and the first and second auxiliary electrode terminals 16, 17, A metal film can be deposited on the entire surface of the conductive substrate 1 by MOCVD. Thereafter, the first and second main electrode terminals 6 and 7 and the first and second auxiliary electrode terminals 16 and 17 are removed by selectively removing a part of the metal film using a photolithography technique and an etching technique. And a second electrode connection for connecting the first main electrode terminal 6 and the first auxiliary electrode terminal 16 to each other, and for connecting the second main electrode terminal 7 and the second auxiliary electrode terminal 17 to each other. The portion 22 may also be formed in a lump from a common metal film.

(Second modification of the second embodiment)
As shown in FIG. 26, the capacitor structure according to the second modification example of the second embodiment includes a cooling mechanism (second main surface cooling) arranged on the back surface (second main surface) side of the conductive substrate 1. (Mechanism) 23 is further different from the capacitor structure according to the second embodiment shown in FIG. An insulating film 24 is disposed on the upper surface of the cooling mechanism 23, and the cooling mechanism 23 contacts the first and second auxiliary electrode terminals 16 and 17 through the insulating film 24.

  According to the capacitor structure according to the second modification of the second embodiment, by further including the cooling mechanism 23, the cooling mechanism 23 efficiently generates heat in the columnar conductive regions 4a to 4d during the operation of the capacitor. Cooling can be performed, and the cooling performance of the capacitor structure can be improved. Therefore, the temperature rise of the capacitor structure can be suppressed, the increase in ESR accompanying the temperature rise can be prevented, and the loss can be reduced.

  Similarly, the cooling mechanism 23 is arranged on the back surface side of the conductive substrate 1 via the insulating film 5 for the capacitor structure according to the first modification of the second embodiment shown in FIG. May be.

(Third Modification of Second Embodiment)
As shown in FIG. 27, the capacitor structure according to the third modification of the second embodiment further includes cooling mechanisms (side cooling mechanisms) 23a and 23b arranged on both side surfaces of the conductive substrate 1, respectively. The point provided is different from the capacitor structure according to the first modification of the second embodiment shown in FIG. The cooling mechanisms 23a and 23b are disposed in contact with the first and second electrode connection portions 21 and 22, respectively.

  The manufacturing method and operation of the capacitor structure according to the third modification of the second embodiment are the same as those of the second modification of the second embodiment. Heat generated in the columnar conductive regions 4 a to 4 d is transmitted to the first main electrode terminal 6 and the first auxiliary electrode terminal 16 through the conductive film 3. Then, the heat transmitted to the first electrode connection portion 21 in contact with the first main electrode terminal 6 and the first auxiliary electrode terminal 16 and the first main electrode terminal 6 and the first auxiliary electrode terminal 16 are directly cooled by the outside air. The heat that is divided into heat and transmitted to the first electrode connection portion 21 is cooled by the cooling mechanism 23a. Further, the heat generated in the conductive substrate 1 is also cooled by the cooling mechanism 23b in contact with the second electrode connection portion 22 on the same principle.

  According to the capacitor structure according to the third modification of the second embodiment, the cooling mechanisms 23a and 23b are disposed on the side surface of the conductive substrate 1, and therefore disposed on the upper surface or the lower surface side of the conductive substrate 1. The structure is easier to mount than the above, and a plurality of capacitor structures can be stacked and connected in parallel to increase the capacity. Further, when a plurality of capacitor structures are stacked, the heat is less likely to escape in the stacking direction as the capacitor structure is positioned inside the stacked structure, but the cooling mechanisms 23a and 23b are disposed on the side surfaces of the capacitor structure. Therefore, even in the capacitor structure located inside the laminated structure, heat can be efficiently released from the side surface side.

  In the capacitor structure according to the third modification of the second embodiment, the first and second electrode connecting portions 21 and 22 are not provided, and the cooling mechanism 23a is provided with the first main electrode terminal 6 and the first auxiliary electrode terminal. The cooling mechanism 23 b may be in direct contact with the second main electrode terminal 7 and the second auxiliary electrode terminal 17.

(Fourth modification of the second embodiment)
A capacitor module according to a fourth modification of the second embodiment is a module in which a plurality (two) of capacitor structures 101 and 102 are laminated as shown in FIG. In FIG. 28, the laminated structure of the two capacitor structures 101 and 102 will be described. However, the number of capacitor structures to be laminated is not particularly limited, and may be three or more.

  The upper capacitor structure (hereinafter referred to as “upper structure”) 101 uses the capacitor structure according to the second embodiment shown in FIG. A lower capacitor structure (hereinafter referred to as “lower structure”) 102 has a structure substantially similar to that of the upper structure 101, and the first main surface (upper surface) to the second main surface. The conductive substrate 31 having a through-hole penetrating the (lower surface), the dielectric film 32 provided on the side wall surface of the through-hole of the conductive substrate 31, and the through-hole of the conductive substrate 31 buried through the dielectric film 32 Columnar conductive regions 34 a, 34 b, 34 c, 34 d formed on the upper surface side of the conductive substrate 31 and electrically connected to the columnar conductive regions 34 a to 34 d, and the conductive substrate 31. A second main electrode terminal 37 disposed on the upper surface side and electrically connected to the conductive substrate 31 is provided.

  The dielectric film 32 of the lower structure 102 is also disposed on the upper surface, the back surface, and the side surface of the conductive substrate 31. A conductive film 33 is disposed on the upper surface and side surfaces of the conductive substrate 31 with the dielectric film 2 interposed therebetween so as to be in contact with the upper ends of the columnar conductive regions 34 a to 34 d and the first main electrode terminal 36. A lower connection layer 34v is disposed on the back surface of the conductive substrate 31 via the dielectric film 2 so as to be in contact with the lower ends of the columnar conductive regions 34a to 34d and the second main electrode terminal 37. An end portion of the lower connection layer 34v is connected to the conductive film 33. An insulating film 35 is disposed so as to cover the conductive film 33 and the lower connection layer 34v.

  The lower part of the first main electrode terminal 36 is in contact with the conductive film 33 through the opening (contact hole) of the dielectric film 32. A contact plug which is a part of the second main electrode terminal 37 is in contact with the conductive substrate 31 through an opening (contact hole) penetrating the dielectric film 32, the conductive film 33 and the insulating film 35. On the side wall of the contact plug, plug side wall insulating films 38a and 38b for insulating the contact plug and the conductive film 33 are provided.

  The lower structure 102 further includes a first auxiliary electrode terminal 46 disposed on the back surface side of the conductive substrate 31 so as to be electrically connected to the columnar conductive regions 34a to 34d via the lower connection layer 34v, and a conductive layer. A second auxiliary electrode terminal 47 is provided on the back side of the conductive substrate 31 so as to be electrically connected to the conductive substrate 31.

  The first auxiliary electrode terminal 46 is disposed at a position facing the first main electrode terminal 36 with the conductive substrate 31 interposed therebetween. The upper part of the first auxiliary electrode terminal 46 is in contact with the lower connection layer 34v through the opening (contact hole) of the insulating film 35. The second auxiliary electrode terminal 47 is disposed at a position facing the second main electrode terminal 37 across the conductive substrate 31. The contact plug that is a part of the second auxiliary electrode terminal 47 is in contact with the conductive substrate 31 through an opening (contact hole) that penetrates the insulating film 35, the lower connection layer 34 v, and the dielectric film 32. On the side wall of the contact plug, plug side wall insulating films 48a and 48b for insulating the contact plug and the conductive film 33 are provided.

  At the junction between the upper structure 101 and the lower structure 102, the first and second auxiliary electrode terminals 16 and 17 located on the back side of the upper structure 101 and the upper surface side of the lower structure 102 are located. The first and second main electrode terminals 36 and 37 are connected to each other.

  The operation of the capacitor module according to the fourth modification of the second embodiment is the same as that of the second embodiment. During the capacitor operation, the heat generation of the columnar conductive regions 4a to 4d of the upper structure 101 is caused by the first main electrode terminal via the conductive film 3 and the lower connection layer 4v located on the upper surface side and the back surface side of the conductive substrate 1. 6 and the first auxiliary electrode terminal 16. The heat transmitted to the first main electrode terminal 6 is cooled to the outside air. On the other hand, the heat transferred to the first auxiliary electrode terminal 16 is the first auxiliary electrode because the back surface of the first auxiliary electrode terminal 16 is in contact with the first main electrode terminal 36 of the lower structure 102 and is not in contact with the outside air. Escape to the side of the electrode terminal 16. At this time, both the electrodes of the first auxiliary electrode terminal 16 of the upper structure 101 and the first main electrode terminal 6 of the lower structure 102 form a thick path through which heat is released, and can be efficiently cooled. The heat generated in the lower structure 102 during the capacitor operation can be cooled in the same manner as the heat generated in the upper structure 101.

  According to the capacitor module according to the fourth modification of the second embodiment, the first and second structures located on the back surface side of the upper structure 101 are stacked by stacking the upper structure 101 and the lower structure 102. The auxiliary electrode terminals 16 and 17 are connected to the first and second main electrode terminals 36 and 37 located on the upper surface side of the lower structure 102. Therefore, the upper structure 101 and the lower structure 102 are connected in parallel, and the capacity can be easily increased.

  As a method for manufacturing a capacitor module according to the fourth modification of the second embodiment, a plurality of capacitor structures according to the second embodiment are prepared, and the electrodes of adjacent capacitor structures are soldered. What is necessary is just to adhere | attach by pressure bonding etc.

(Fifth Modification of Second Embodiment)
As shown in FIG. 29, the capacitor module according to the fifth modification of the second embodiment includes first and second electrodes arranged on the side surface side of the laminated structure of the upper structure 101 and the lower structure 102. The capacitor module structure according to the fourth modification of the second embodiment shown in FIG. 28 is further provided with connection portions 30a and 30b.

  The first electrode connection portion 30 a is common to the first main electrode terminal 6 and the first auxiliary electrode terminal 16 of the upper structure 101 and the first main electrode terminal 36 and the first auxiliary electrode terminal 46 of the lower structure 102. It is connected to the. The second electrode connection portion 30 b is common to the second main electrode terminal 7 and the second auxiliary electrode terminal 17 of the upper structure 101 and the second main electrode terminal 37 and the second auxiliary electrode terminal 47 of the lower structure 102. It is connected to the.

  According to the capacitor module according to the fifth modification of the second embodiment, the heat generated in the upper structure 101 and the lower structure 102 during the capacitor operation is transferred to the first main electrode terminal 6 of the upper structure 101 and It can escape to the 1st electrode connection part 30a via the 1st auxiliary electrode terminal 16, the 1st main electrode terminal 36 of the lower structure 102, and the 1st auxiliary electrode terminal 46. FIG. Further, the second electrode connection is made via the second main electrode terminal 7 and the second auxiliary electrode terminal 17 of the upper structure 101 and the second main electrode terminal 37 and the second auxiliary electrode terminal 47 of the lower structure 102. It can escape to the part 30b.

  Further, the first main electrode terminal 6 and the first auxiliary electrode terminal 16 of the upper structure body 101 and the first main electrode terminal 36 and the first auxiliary electrode terminal 46 of the lower structure body 102 serve as the first electrode connection portion 30a. The second main electrode terminal 7 and the second auxiliary electrode terminal 17 of the upper structure 101 and the second main electrode terminal 37 and the second auxiliary electrode terminal 47 of the lower structure 102 are connected in parallel, and the second electrode connection portion. Since it is connected in parallel to 30b, the resistance component and the inductance component of each electrode can be reduced, and the ESR and equivalent series inductance (ESL) of the entire capacitor module can be reduced.

  In FIG. 29, the laminated structure of the two capacitor structures 101 and 102 is shown. However, a larger number (three or more) of capacitor structures may be laminated. The second electrode connection parts 21 and 22 may also extend in the stacking direction.

(Sixth Modification of Second Embodiment)
As shown in FIG. 30, the capacitor module according to the sixth modification of the second embodiment includes first and second electrodes arranged on the side surface side of the laminated structure of the upper structure 101 and the lower structure 102. The capacitor module structure according to the fifth modification of the second embodiment shown in FIG. 29 is further provided with cooling mechanisms 23a and 23b arranged further outside the connection portions 30a and 30b.

  According to the capacitor module according to the sixth modification of the second embodiment, the heat generation in the upper structure 101 and the lower structure 102 is caused to cool via the first and second electrode connection portions 30a and 30b. It can escape to 23a, 23b, and can improve a cooling effect.

  In FIG. 30, a laminated structure of two capacitor structures 101 and 102 is shown, but a larger number (three or more) of capacitor structures may be laminated, and the first and second capacitor structures 101 and 102 may be laminated according to the number of laminated layers. The second electrode connection parts 21 and 22 and the cooling mechanisms 23a and 23b may also extend in the stacking direction.

(Other embodiments)
As described above, the present invention has been described according to the first and second embodiments. However, it should not be understood that the descriptions and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  For example, as a first modification of the first embodiment, the capacitor structure further including the metal films 13a and 13b on the conductive film 3 and the lower connection layer 4v as shown in FIG. 15 has been described. Similarly, in the embodiment, a metal film may be provided on the conductive film 3 and the lower connection layer 4v of the capacitor structure shown in FIG.

  As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

DESCRIPTION OF SYMBOLS 1,31 ... Conductive substrate 2, 32 ... Dielectric film 3, 33 ... Conductive film 4 ... Polycrystalline Si (doped poly Si) layer 4a, 4b, 4c, 4d, 4e, 4f, 4g, 4h, 34a, 34b, 34c , 34d ... columnar conductive regions 4v, 34v ... lower connection layers 5, 35 ... insulating films 6, 36 ... first main electrode terminals 7, 37 ... second main electrode terminals 7u ... lands 8a, 8b, 18a, 18b, 38a , 38b, 48a, 48b ... plug sidewall insulating films 10a, 10b, 10c, 10d, 20a, 20b ... contact plugs 11a, 11b, 11c, 11d ... through holes 16, 46 ... first auxiliary electrode terminals 17, 47 ... second Auxiliary electrode terminals 13a, 13b ... metal films 21, 22, 30a, 30b ... electrode connection portions 23, 23a, 23b ... cooling mechanisms 100, 101, 102 ... capacitor structures

Claims (17)

A conductive substrate having a through hole penetrating from the first main surface to the second main surface;
A dielectric film provided on a side wall surface of the through hole;
A columnar conductive region embedded in the through hole via the dielectric film;
A first main electrode terminal disposed on the first main surface side and electrically connected to the columnar conductive region;
A second main electrode terminal disposed on the first main surface side and electrically connected to the conductive substrate;
A first auxiliary electrode terminal disposed on the second main surface side and electrically connected to the columnar conductive region;
A second auxiliary electrode terminal disposed on the second main surface side and electrically connected to the conductive substrate;
A first electrode connecting portion that electrically connects the first main electrode terminal and the first auxiliary electrode terminal;
A capacitor structure comprising: At least part of the electrode surface of the first main electrode terminal and at least part of the electrode surface of the first auxiliary electrode terminal are opposed to each other;
2. The capacitor structure according to claim 1 , wherein at least a part of the electrode surface of the second main electrode terminal and at least a part of the electrode surface of the second auxiliary electrode terminal face each other. Capacitor structure according to claim 1 or 2, further comprising the columnar conductive region and a conductive film in contact with the first main electrode terminal. The dielectric layer is according to any one of claims 1 to 3, characterized in that extending at least to one of the said first and second main surfaces continuous with the opening of the through hole capacitor Structure. The dielectric film extends to at least one of the first and second main surfaces continuous with the opening of the through hole;
The capacitor structure according to claim 3 , wherein the conductive film is disposed on the extended dielectric film. Capacitor structure according to claim 1, characterized in that it comprises further a second electrode connecting portion for connecting the second auxiliary electrode terminal and the second main electrode terminals electrically to each other . Capacitor structure according to any one of claims 1 to 6, characterized in that it comprises further a second main surface cooling mechanism disposed on the second main surface side. Capacitor structure according to any one of claims 1 to 7, further comprising a arranged side cooling mechanism on the side surface side of the conductive substrate. Capacitor structure according to any one of claims 1-8 wherein the conductive substrate is characterized by comprising silicon. Capacitor structure according to any one of claims 1 to 9, wherein the conductive substrate, characterized in that a polycrystalline silicon. The dielectric layer capacitor structure according to any one of claims 1 to 10, characterized in that selected from at least one of the silicon oxide film and a silicon nitride film. Capacitor structure according to any one of claims 1 to 11, wherein the columnar conductive region, characterized in that it consists of polycrystalline silicon. A conductive substrate having a through hole penetrating from the first main surface to the second main surface, a dielectric film provided on a side wall surface of the through hole, and a columnar conductive material embedded in the through hole through the dielectric film A region, a first main electrode terminal disposed on the first main surface side and electrically connected to the columnar conductive region, and disposed on the first main surface side and electrically connected to the conductive substrate. A second main electrode terminal; a first auxiliary electrode terminal disposed on the second main surface side and electrically connected to the columnar conductive region; and disposed on the second main surface side and electrically connected to the conductive substrate. A capacitor in which a plurality of capacitor structures each including a second auxiliary electrode terminal connected in series and a first electrode connection portion for electrically connecting the first main electrode terminal and the first auxiliary electrode terminal to each other are stacked A module,
Each of the adjacent first and second main electrode terminals of the plurality of capacitor structures is electrically connected to the other adjacent first and second auxiliary electrode terminals. Capacitor module characterized by being made. A conductive substrate having a through hole penetrating from the first main surface to the second main surface, a dielectric film provided on a side wall surface of the through hole, and a columnar conductive material embedded in the through hole through the dielectric film A region, a first main electrode terminal disposed on the first main surface side and electrically connected to the columnar conductive region, and disposed on the first main surface side and electrically connected to the conductive substrate. A second main electrode terminal; a first auxiliary electrode terminal disposed on the second main surface side and electrically connected to the columnar conductive region; and disposed on the second main surface side and electrically connected to the conductive substrate. A capacitor structure comprising: a second auxiliary electrode terminal connected electrically; and a first electrode connection part electrically connecting the first main electrode terminal and the first auxiliary electrode terminal ;
A first semiconductor element having a first electrode disposed on the first main surface side and electrically connected to the first main electrode terminal;
A first electrode disposed on the first main surface side and electrically connected to the second main electrode terminal, and a second electrode electrically connected to the second electrode of the first semiconductor element A second semiconductor element having an electrode;
A capacitor module comprising: Forming a through hole penetrating from the first main surface of the conductive substrate to the second main surface;
Forming a dielectric film on the side wall surface of the through hole;
Embedding a columnar conductive region in the through hole through the dielectric film;
Forming a first main electrode terminal electrically connected to the columnar conductive region on the first main surface side ;
Forming a second main electrode terminal electrically connected to the conductive substrate on the first main surface side ;
Forming a first auxiliary electrode terminal electrically connected to the columnar conductive region on the second main surface side;
Forming a second auxiliary electrode terminal electrically connected to the conductive substrate on the second main surface side;
Forming a first electrode connecting portion that electrically connects the first main electrode terminal and the first auxiliary electrode terminal;
A method for manufacturing a capacitor structure, comprising: 16. The method of manufacturing a capacitor structure according to claim 15 , wherein the step of embedding the columnar conductive region includes forming a conductive film so as to be in contact with the columnar conductive region simultaneously with embedding the columnar conductive region. Method. The first and second main electrode terminals are formed simultaneously;
The method for manufacturing a capacitor structure according to claim 15 or 16 , wherein the first and second auxiliary electrode terminals are formed simultaneously.

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