JP6477930B2 - Encoding apparatus and encoding method - Google Patents

Description

  The present disclosure relates to an encoding apparatus and an encoding method, and in particular, an encoding apparatus and an encoding method that can improve encoding efficiency when transform skipping is performed on a block having a size other than 4 × 4 pixels. It relates to the conversion method.

  In recent years, devices based on MPEG (Moving Picture Experts Group phase) such as orthogonal transform such as discrete cosine transform and compression by motion compensation using redundancy unique to image information, information distribution such as broadcasting stations, And the reception of information in general households.

  In particular, the MPEG2 (ISO / IEC 13818-2) system is defined as a general-purpose image encoding system. MPEG2 is a standard that covers both interlaced scanning images and progressive scanning images, as well as standard resolution images and high-definition images. MPEG2 is currently widely used in a wide range of applications for professional and consumer applications. By using the MPEG2 system, for example, a code amount of 4 to 8 Mbps is assigned for a standard resolution interlaced scan image having 720 × 480 pixels, and 18 to 22 MBps is assigned for a high resolution interlaced scan image having 1920 × 1088 pixels. Therefore, it is possible to realize a high compression rate and good image quality.

  MPEG2 was mainly intended for high-quality encoding suitable for broadcasting, but did not support encoding methods with a lower code amount (bit rate) than MPEG1, that is, a higher compression rate. With the widespread use of mobile terminals, the need for such an encoding system is expected to increase in the future, and the MPEG4 encoding system has been standardized accordingly. As for the MPEG4 image coding system, the standard was approved as an international standard in December 1998 as ISO / IEC 14496-2.

  Furthermore, in recent years, for the purpose of image coding for the initial video conference, The standardization of 26L (ITU-T Q6 / 16 VCEG) is in progress. H. 26L is known to realize higher encoding efficiency, although a larger amount of computation is required for encoding and decoding than encoding methods such as MPEG2 and MPEG4.

  In recent years, as part of MPEG4 activities, Based on 26L, H. Standardization to achieve higher encoding efficiency by incorporating functions not supported by 26L was performed as Joint Model of Enhanced-Compression Video Coding. This standardization was implemented in March 2003 by H.C. It was internationally standardized under the name of H.264 and MPEG-4 Part 10 (AVC (Advanced Video Coding)).

  Furthermore, as an extension, RGB, 4: 2: 2 and 4: 4: 4 color difference signal format and other necessary coding tools for business use, 8 × 8DCT (Discrete Cosine Transform) specified by MPEG2, Standardization of FRExt (Fidelity Range Extension) including quantization matrix was completed in February 2005. As a result, the AVC method has become an encoding method capable of well expressing film noise included in movies, and has been used for a wide range of applications such as BD (Blu-ray (registered trademark) Disc).

  However, these days, we want to compress images with a resolution of about 4000 x 2000 pixels, which is four times that of high-definition images, or to deliver high-definition images in environments with limited transmission capacity such as the Internet. Needs are growing. For this reason, in the VCEG (Video Coding Expert Group) under the ITU-T, studies on improving the coding efficiency are continuing.

  In addition, for the purpose of further improving the coding efficiency compared to AVC, HEVC (High Efficiency Video Coding) is being developed by JCTVC (Joint Collaboration Team-Video Coding), a joint standardization organization of ITU-T and ISO / IEC. The standardization of the encoding method called is being advanced. As of October 2013, Non-Patent Document 1 has been issued as Draft.

  By the way, in HEVC, when the size of a TU (transform unit) is 4 × 4 pixels, a function called transform skip that does not perform orthogonal transformation or inverse orthogonal transformation on the TU can be used.

  That is, when the image to be encoded is a non-natural image such as a CG (Computer Graphics) image or a personal computer screen, 4 × 4 pixels are easily selected as the TU size. For non-natural images, encoding efficiency may be higher when orthogonal transform is not performed. Therefore, in HEVC, when the size of the TU is 4 × 4 pixels, the encoding efficiency is improved by making it possible to apply transform skip.

  On the other hand, in Non-Patent Document 2, an encoding method for improving the encoding of an image in a color difference signal format such as 4: 2: 2 or 4: 4: 4 and screen content is studied.

  Non-Patent Document 3 discusses coding efficiency when transform skip is applied to a TU having a size larger than 4 × 4 pixels.

  Furthermore, Non-Patent Document 4 discusses applying transform skip to a TU having a minimum size when the minimum size of the TU is 8 × 8 pixels other than 4 × 4 pixels.

Benjamin Bross, Gary J. Sullivan, Ye-Kui Wang, “Editors’ proposed corrections to HEVC version 1 ”, JCTVC-M0432_v3,2013.4.18-4.26 David Flynn, Joel Sole, Teruhiko Suzuki, “High Efficiency Video Coding (HEVC), Range Extension text specification: Draft 4”, JCTVC-N1005_v1,2013.4.18-4.26 Xiulian Peng, Jizheng Xu, Liwei Guo, Joel Sole, Marta Karczewicz, “Non-RCE2: Transform skip on large TUs”, JCTVC-N0288_r1,2013.7.25-8.2 Kwanghyun Won, Seungha Yang, Byeungwoo Jeon, “Transform skip based on minimum TU size”, JCTVC-N0167, 2013.7.25-8.2

  In HEVC, scaling for a 4 × 4 pixel TU is performed so that a frequency domain scaling list (quantization matrix) other than the flat matrix is not used when quantizing the pixel domain TU for which transform skipping has been performed. The flat matrix is set as the default value for the list. However, a matrix that is not a flat matrix is set as the default value of the scaling list for a TU having a size other than 4 × 4 pixels.

  Therefore, as described in Non-Patent Document 3 and Non-Patent Document 4, when transform skip is applied to a TU having a size other than 4 × 4 pixels, the quantum of the TU for which transform skip was performed. During conversion, a scaling list that is not a flat matrix may be used. As a result, the encoding efficiency decreases.

  The present disclosure has been made in view of such a situation, and is intended to improve encoding efficiency when transform skip is performed on a block having a size other than 4 × 4 pixels. .

  In the encoding device according to the first aspect of the present disclosure, at least one of a case where a predetermined scaling list is not used and a block size of a transform block to which transform skip is applied is larger than a 4 × 4 block size. If established, using a flat scaling list corresponding to the block size of the transform block, a quantization unit that quantizes the transform block to generate a quantized value, and the quantization unit An encoding device includes an encoding unit that encodes a quantized value.

  The encoding method according to the first aspect of the present disclosure corresponds to the encoding device according to the first aspect of the present disclosure.

  In the first aspect of the present disclosure, at least one of a case where a predetermined scaling list is not used and a case where the block size of a transform block to which transform skip is applied is larger than a 4 × 4 block size is satisfied. In addition, using the flat scaling list corresponding to the block size of the transform block, the transform block is quantized to generate a quantized value, and the generated quantized value is encoded.

  The encoding device according to the first aspect can be realized by causing a computer to execute a program.

  In order to realize the encoding device of the first aspect, a program to be executed by a computer can be provided by being transmitted through a transmission medium or by being recorded on a recording medium.

  The encoding device according to the first aspect may be an independent device, or may be an internal block constituting one device.

  According to the first aspect of the present disclosure, encoding can be performed. Also, it is possible to improve the encoding efficiency when transform skipping is performed on blocks having a size other than 4 × 4 pixels.

  Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

It is a block diagram which shows the structural example of one Embodiment of the encoding apparatus to which this indication is applied. It is a figure which shows the example of the syntax of SPS. It is a figure which shows the example of the syntax of SPS. It is a figure which shows the example of the syntax of PPS. It is a figure which shows the example of the syntax of PPS. It is a figure explaining a setting scaling list. It is a block diagram which shows the structural example of the encoding part of FIG. It is a figure explaining CU. It is a block diagram which shows the structural example of the list setting part of FIG. It is a flowchart explaining a stream production | generation process. FIG. 11 is a flowchart describing details of the encoding process of FIG. 10. FIG. FIG. 11 is a flowchart describing details of the encoding process of FIG. 10. FIG. It is a flowchart explaining the detail of the scaling list determination process of FIG. It is a block diagram which shows the structural example of one Embodiment of the decoding apparatus to which this indication is applied. It is a block diagram which shows the structural example of the decoding part of FIG. 15 is a flowchart for explaining image generation processing of the decoding device in FIG. 14. It is a flowchart explaining the detail of the decoding process of FIG. It is a block diagram which shows the structural example of the hardware of a computer. It is a figure which shows the example of a multiview image encoding system. It is a figure which shows the structural example of the multiview image coding apparatus to which this indication is applied. It is a figure which shows the structural example of the multiview image decoding apparatus to which this indication is applied. It is a figure which shows the example of a hierarchy image coding system. It is a figure explaining the example of spatial scalable encoding. It is a figure explaining the example of temporal scalable encoding. It is a figure explaining the example of the scalable encoding of a signal noise ratio. It is a figure which shows the structural example of the hierarchy image coding apparatus to which this indication is applied. It is a figure which shows the structural example of the hierarchy image decoding apparatus to which this indication is applied. It is a figure which shows the example of schematic structure of the television apparatus to which this indication is applied. It is a figure which shows the schematic structural example of the mobile telephone to which this indication is applied. It is a figure which shows the schematic structural example of the recording / reproducing apparatus to which this indication is applied. It is a figure which shows the schematic structural example of the imaging device to which this indication is applied. It is a block diagram which shows an example of scalable encoding utilization. It is a block diagram which shows the other example of scalable encoding utilization. It is a block diagram which shows the further another example of scalable encoding utilization. 2 illustrates an example of a schematic configuration of a video set to which the present disclosure is applied. 2 illustrates an example of a schematic configuration of a video processor to which the present disclosure is applied. The other example of the schematic structure of the video processor to which this indication is applied is shown.

<First embodiment>
(Configuration example of one embodiment of encoding device)
FIG. 1 is a block diagram illustrating a configuration example of an embodiment of an encoding device to which the present disclosure is applied.

  The encoding apparatus 10 in FIG. 1 includes a setting unit 11, an encoding unit 12, and a transmission unit 13, and encodes an image by a method according to the HEVC method.

  Specifically, the setting unit 11 of the encoding device 10 includes minimum TU size information indicating the minimum size of the TU, which is the size of a transform skippable TU (orthogonal transform block), according to a user instruction or the like. Set SPS (Sequence Parameter Set). In addition, the setting unit 11 sets a PPS (Picture Parameter Set) including skip permission information indicating whether or not application of transform skip is permitted for the minimum size TU. Furthermore, the setting unit 11 sets VUI (Video Usability Information), SEI (Supplemental Enhancement Information), and the like. The setting unit 11 supplies the set parameter set such as SPS, PPS, VUI, and SEI to the encoding unit 12.

  An image in units of frames is input to the encoding unit 12. The encoding unit 12 refers to the parameter set supplied from the setting unit 11 and encodes the input image by a method according to the HEVC method. The encoding unit 12 generates an encoded stream from encoded data obtained as a result of encoding and a parameter set, and supplies the encoded stream to the transmission unit 13.

  The transmission unit 13 transmits the encoded stream supplied from the encoding unit 12 to a decoding device described later.

(Example of SPS syntax)
2 and 3 are diagrams illustrating examples of SPS syntax.

  As shown in FIG. 2, the minimum TU size information (long2_min_transform_block_size_minus2) is set in the SPS. For example, the minimum TU size information is 1 when representing 8 × 8 pixels.

  Also, a scaling list use flag (scaling_list_enabled_flag) indicating whether or not to use a scaling list at the time of quantization is set in the SPS. The scaling list use flag is 1 when the scaling list is used during quantization, and is 0 when the scaling list is not used during quantization.

  When the scaling list use flag is 1, an SPS scaling list flag (sps_scaling_list_data_present_flag) indicating whether or not a scaling list is included in this SPS is set in the SPS. The SPS scaling list flag is 1 when the scaling list is included in the SPS, and 0 when the scaling list is not included in the SPS.

  When the SPS scaling list flag is 1, a scaling list (scaling_list_data) is set in the SPS.

(Example of PPS syntax)
4 and 5 are diagrams illustrating examples of PPS syntax.

  As shown in FIG. 4, skip permission information (transform_skip_enabled_flag) is set in the PPS. As a result, it is possible to control application of transform skip to the minimum size of the TU in units of pictures. The skip permission information is 1 when indicating that the application of transform skip is permitted for the minimum size of the TU, and is 0 when indicating not permitting.

  As shown in FIG. 4, a PPS scaling list flag (pps_scaling_list_data_present_flag) indicating whether or not a scaling list is included in the PPS is set in the PPS. The PPS scaling list flag is 1 when the scaling list is included in the PPS, and 0 when the scaling list is not included in the PPS.

  As shown in FIG. 5, when the PPS scaling list flag is 1, a scaling list (scaling_list_data) is set in the PPS. Hereinafter, the scaling list set in the SPS or PPS is referred to as a setting scaling list.

(Explanation of setting scaling list)
FIG. 6 is a diagram illustrating the setting scaling list.

  As shown in FIG. 6, in HEVC, 4 × 4 pixels, 8 × 8 pixels, 16 × 16 pixels, and 32 × 32 pixels can be selected as the TU size. Therefore, a scaling list is prepared for each of these sizes. However, since the amount of data in the scaling list for a large TU such as 16 × 16 pixels or 32 × 32 pixels is large, the transmission of the scaling list reduces the encoding efficiency.

  Therefore, the scaling list for large TUs such as 16 × 16 pixels and 32 × 32 pixels is down-sampled into 8 × 8 matrix as shown in FIG. 6 and set as SPS or PPS as the setting scaling list. Is transmitted. However, the DC component is transmitted separately because it has a great influence on the image quality.

  The decoding device up-samples the set scaling list, which is an 8 × 8 matrix transmitted in this way, with 0th order hold, and scales for large TUs such as 16 × 16 pixels and 32 × 32 pixels. Restore the list.

(Configuration example of encoding unit)
FIG. 7 is a block diagram illustrating a configuration example of the encoding unit 12 of FIG.

  7 includes an A / D conversion unit 31, a screen rearrangement buffer 32, a calculation unit 33, an orthogonal transformation unit 34, a quantization unit 35, a lossless encoding unit 36, an accumulation buffer 37, and an inverse quantization unit. 38, an inverse orthogonal transform unit 39, and an addition unit 40. The encoding unit 12 includes a deblock filter 41, an adaptive offset filter 42, an adaptive loop filter 43, a frame memory 44, a switch 45, an intra prediction unit 46, a motion prediction / compensation unit 47, a predicted image selection unit 48, and a rate. A control unit 49 is included. Furthermore, the encoding unit 12 includes a skip setting unit 50 and a list setting unit 51.

  The A / D conversion unit 31 of the encoding unit 12 performs A / D conversion on an image in frame units input as an encoding target. The A / D conversion unit 31 outputs an image, which is a digital signal after conversion, to the screen rearrangement buffer 32 for storage.

  The screen rearrangement buffer 32 rearranges the stored frame-by-frame images in the order of encoding according to the GOP structure. The screen rearrangement buffer 32 outputs the rearranged image to the calculation unit 33, the intra prediction unit 46, and the motion prediction / compensation unit 47.

  The calculation unit 33 performs encoding by subtracting the prediction image supplied from the prediction image selection unit 48 from the image supplied from the screen rearrangement buffer 32. The calculation unit 33 outputs the image obtained as a result to the orthogonal transform unit 34 as residual information (difference). When the predicted image is not supplied from the predicted image selection unit 48, the calculation unit 33 outputs the image read from the screen rearrangement buffer 32 as it is to the orthogonal transform unit 34 as residual information.

  The orthogonal transform unit 34 performs orthogonal transform on the residual information from the calculation unit 33 in units of TUs. TU sizes include 4 × 4 pixels, 8 × 8 pixels, 16 × 16 pixels, and 32 × 32 pixels. As an orthogonal transform method, for example, there is DCT (Discrete Cosine Transform) (discrete cosine transform).

であり、右半分は、

である。 When TU is 32 × 32 pixels, the left half of the DCT orthogonal transformation matrix is

And the right half is

It is.

  Also, the DCT orthogonal transformation matrix when the TU is 4 × 4 pixels, 8 × 8 pixels, and 16 × 16 pixels, respectively, is the DCT orthogonal transformation matrix when the TU is 32 × 32 pixels. It is obtained by thinning out to 8,1 / 4,1 / 2. Therefore, the orthogonal transform unit 34 may be provided with a common calculation unit for all the TU sizes, and does not need to be provided for each TU size.

  When the optimal prediction mode is the intra prediction mode and the TU is 4 × 4 pixels, DST (Discrete Sine Transform) (discrete sine transform) is used as the orthogonal transform method. The DST orthogonal transformation matrix H is expressed by the following equation (1).

  As described above, when the optimal prediction mode is the intra prediction mode and the TU is 4 × 4 pixels, that is, when the residual information is conspicuously smaller as it is closer to the encoded peripheral image, the orthogonal transform method is used. Since DST is used as the coding efficiency, the coding efficiency is improved.

  Based on the minimum TU size information supplied from the skip setting unit 50, the orthogonal transform unit 34 determines whether transform skip is applicable in units of TUs. When it is determined that the transform skip is applicable, the orthogonal transform unit 34 performs the orthogonal transform with the cost function value when the orthogonal transform is performed based on the orthogonal transform coefficient obtained as a result of the orthogonal transform. The cost function value when there is not is calculated.

  When the cost function value when the orthogonal transformation is performed is smaller than the cost function value when the orthogonal transformation is not performed, the orthogonal transformation unit 34 supplies the orthogonal transformation coefficient to the quantization unit 35. Then, the orthogonal transform unit 34 supplies a transform skip flag indicating the absence of transform skip to the lossless encoding unit 36 and the inverse orthogonal transform unit 39.

  On the other hand, when the cost function value when the orthogonal transformation is not performed is smaller than the cost function value when the orthogonal transformation is performed, the orthogonal transformation unit 34 performs the transform skip and the residual information is quantized. 35. Then, the orthogonal transform unit 34 supplies a transform skip flag indicating the presence of transform skip to the lossless encoding unit 36 and the inverse orthogonal transform unit 39.

  Note that transform skip can be performed on both the luminance signal and the color difference signal. Also, the transform skip can be performed regardless of whether the optimal prediction mode is the intra prediction mode or the inter prediction mode.

  When it is determined that the transform skip is not applicable, or when the minimum TU size information is not supplied, the orthogonal transform unit 34 supplies the orthogonal transform coefficient to the quantization unit 35.

  The quantization unit 35 quantizes the orthogonal transform coefficient or residual information supplied from the orthogonal transform unit 34 using the scaling list supplied from the list setting unit 51. The quantization unit 35 supplies the quantized value obtained as a result of the quantization to the lossless encoding unit 36.

  The lossless encoding unit 36 acquires the transform skip flag supplied from the orthogonal transform unit 34. The lossless encoding unit 36 acquires information indicating the optimal intra prediction mode (hereinafter referred to as intra prediction mode information) from the intra prediction unit 46. Further, the lossless encoding unit 36 acquires information indicating the optimal inter prediction mode (hereinafter referred to as inter prediction mode information), a motion vector, information specifying a reference image, and the like from the motion prediction / compensation unit 47.

  Further, the lossless encoding unit 36 acquires offset filter information regarding the offset filter from the adaptive offset filter 42, and acquires filter coefficients from the adaptive loop filter 43.

  The lossless encoding unit 36 performs variable length encoding (for example, CAVLC (Context-Adaptive Variable Length Coding)) and arithmetic encoding (for example, CABAC (Context) on the quantization value supplied from the quantization unit 35. -Adaptive Binary Arithmetic Coding)).

  The lossless encoding unit 36 also encodes intra prediction mode information, inter prediction mode information, information specifying a motion vector, and a reference image, transform skip flag, offset filter information, and filter coefficients. Lossless encoding as the conversion information. The lossless encoding unit 36 supplies the encoded information and the quantized value, which are losslessly encoded, to the accumulation buffer 37 as encoded data, and accumulates them.

  Note that the losslessly encoded information may be header information (eg, a slice header) of a losslessly encoded quantization value. The transform skip flag (transform_skip_flag) is set to residual_coding, for example.

  The accumulation buffer 37 temporarily stores the encoded data supplied from the lossless encoding unit 36. The accumulation buffer 37 supplies the stored encoded data to the transmission unit 13 as an encoded stream together with the parameter set supplied from the setting unit 11 in FIG.

  The quantized value output from the quantizing unit 35 is also input to the inverse quantizing unit 38. The inverse quantization unit 38 reverses the quantization value supplied from the quantization unit 35 using a scaling list supplied from the list setting unit 51 in a method corresponding to the quantization method in the quantization unit 35. Perform quantization. The inverse quantization unit 38 supplies the orthogonal transform coefficient or residual information obtained as a result of the inverse quantization to the inverse orthogonal transform unit 39.

  The inverse orthogonal transform unit 39 performs inverse orthogonal transform on the orthogonal transform coefficient supplied from the inverse quantization unit 38 in units of TUs based on the transform skip flag supplied from the orthogonal transform unit 34. As a method of inverse orthogonal transform, for example, there are IDCT (Inverse Discrete Cosine Transform) and IDST (Inverse Discrete Sine Transform). The inverse orthogonal transform unit 39 supplies residual information obtained as a result of the inverse orthogonal transform or residual information supplied from the inverse quantization unit 38 to the addition unit 40.

  The adder 40 adds the residual information supplied from the inverse orthogonal transform unit 39 and the prediction image supplied from the prediction image selection unit 48, and performs decoding. The adder 40 supplies the decoded image to the deblock filter 41 and the frame memory 44.

  The deblocking filter 41 performs an adaptive deblocking filter process for removing block distortion on the decoded image supplied from the adding unit 40, and supplies the resulting image to the adaptive offset filter 42.

  The adaptive offset filter 42 performs an adaptive offset filter (SAO (Sample adaptive offset)) process that mainly removes ringing on the image after the adaptive deblocking filter process by the deblocking filter 41.

  Specifically, the adaptive offset filter 42 determines the type of adaptive offset filter processing for each LCU (Largest Coding Unit) which is the maximum coding unit, and obtains an offset used in the adaptive offset filter processing. The adaptive offset filter 42 performs the determined type of adaptive offset filter processing on the image after the adaptive deblocking filter processing, using the obtained offset.

  The adaptive offset filter 42 supplies the image after the adaptive offset filter processing to the adaptive loop filter 43. Further, the adaptive offset filter 42 supplies information indicating the type and offset of the adaptive offset filter processing performed to the lossless encoding unit 36 as offset filter information.

  The adaptive loop filter 43 is configured by, for example, a two-dimensional Wiener filter. The adaptive loop filter 43 performs an adaptive loop filter (ALF (Adaptive Loop Filter)) process on the image after the adaptive offset filter process supplied from the adaptive offset filter 42, for example, for each LCU.

  Specifically, the adaptive loop filter 43 is configured so that the residual of the original image that is the image output from the screen rearrangement buffer 32 and the image after the adaptive loop filter processing is minimized for each LCU. A filter coefficient used in the processing is calculated. Then, the adaptive loop filter 43 performs adaptive loop filter processing for each LCU using the calculated filter coefficient on the image after the adaptive offset filter processing.

  The adaptive loop filter 43 supplies the image after the adaptive loop filter processing to the frame memory 44. The adaptive loop filter 43 supplies the filter coefficient used for the adaptive loop filter process to the lossless encoding unit 36.

  Here, the adaptive loop filter processing is performed for each LCU, but the processing unit of the adaptive loop filter processing is not limited to the LCU. However, the processing can be efficiently performed by combining the processing units of the adaptive offset filter 42 and the adaptive loop filter 43.

  The frame memory 44 stores the image supplied from the adaptive loop filter 43 and the image supplied from the adder 40. An image adjacent to a PU (Prediction Unit) among the images not subjected to the filter processing stored in the frame memory 44 is supplied to the intra prediction unit 46 via the switch 45 as a peripheral image. On the other hand, the filtered image stored in the frame memory 44 is output to the motion prediction / compensation unit 47 via the switch 45 as a reference image.

  The intra prediction unit 46 performs intra prediction processing of all candidate intra prediction modes using the peripheral images read from the frame memory 44 via the switch 45 in units of PUs.

  Further, the intra prediction unit 46 calculates cost function values for all candidate intra prediction modes based on the image read from the screen rearrangement buffer 32 and the predicted image generated as a result of the intra prediction process. (Details will be described later). Then, the intra prediction unit 46 determines the intra prediction mode that minimizes the cost function value as the optimal intra prediction mode.

  The intra prediction unit 46 supplies the predicted image generated in the optimal intra prediction mode and the corresponding cost function value to the predicted image selection unit 48. The intra prediction unit 46 supplies the intra prediction mode information to the lossless encoding unit 36 when the prediction image selection unit 48 is notified of selection of a prediction image generated in the optimal intra prediction mode.

  The cost function value is also referred to as RD (Rate Distortion) cost. It is calculated based on the method of High Complexity mode or Low Complexity mode as defined by JM (Joint Model) which is reference software in the H.264 / AVC format. H. Reference software in the H.264 / AVC format is published at http://iphome.hhi.de/suehring/tml/index.htm.

  Specifically, when the High Complexity mode is adopted as the cost function value calculation method, all the candidate prediction modes are temporarily decoded until the cost function expressed by the following equation (2). A value is calculated for each prediction mode.

  D is a difference (distortion) between the original image and the decoded image, R is a generated code amount including up to the coefficient of orthogonal transformation, and λ is a Lagrange undetermined multiplier given as a function of the quantization parameter QP.

  On the other hand, when the Low Complexity mode is adopted as the cost function value calculation method, prediction image generation and coding information code amount calculation are performed for all candidate prediction modes. A cost function represented by Equation (3) is calculated for each prediction mode.

  D is the difference (distortion) between the original image and the predicted image, Header_Bit is the code amount of the encoding information, and QPtoQuant is a function given as a function of the quantization parameter QP.

  In the Low Complexity mode, it is only necessary to generate a prediction image for all prediction modes, and it is not necessary to generate a decoded image.

  The motion prediction / compensation unit 47 performs motion prediction / compensation processing in all inter prediction modes that are candidates in PU units. Specifically, the motion prediction / compensation unit 47 selects all candidate inter prediction modes based on the image supplied from the screen rearrangement buffer 32 and the reference image read from the frame memory 44 via the switch 45. Are detected in units of PUs. Then, the motion prediction / compensation unit 47 performs compensation processing on the reference image for each PU based on the motion vector, and generates a predicted image.

  At this time, the motion prediction / compensation unit 47 calculates the cost function value for all candidate inter prediction modes based on the image and the predicted image supplied from the screen rearrangement buffer 32, and the cost function value. Is determined to be the optimal inter prediction mode. Then, the motion prediction / compensation unit 47 supplies the cost function value of the optimal inter prediction mode and the corresponding prediction image to the prediction image selection unit 48. The motion prediction / compensation unit 47, when notified of the selection of the predicted image generated in the optimal inter prediction mode from the predicted image selection unit 48, specifies the inter prediction mode information, the corresponding motion vector, and the reference image. Are output to the lossless encoding unit 36.

  Based on the cost function values supplied from the intra prediction unit 46 and the motion prediction / compensation unit 47, the predicted image selection unit 48 has a smaller corresponding cost function value of the optimal intra prediction mode and the optimal inter prediction mode. Are determined as the optimum prediction mode. Then, the predicted image selection unit 48 supplies the predicted image in the optimal prediction mode to the calculation unit 33 and the addition unit 40. Further, the predicted image selection unit 48 notifies the intra prediction unit 46 or the motion prediction / compensation unit 47 of selection of the predicted image in the optimal prediction mode.

  The rate control unit 49 controls the quantization operation rate of the quantization unit 35 based on the encoded data stored in the storage buffer 37 so that overflow or underflow does not occur.

  The skip setting unit 50 sets the minimum TU size information included in the SPS supplied from the setting unit 11 as a list setting with the orthogonal transform unit 34 based on the skip permission information included in the PPS supplied from the setting unit 11 in FIG. Supplied to the unit 51.

  Based on the minimum TU size information supplied from the skip setting unit 50, the list setting unit 51 is a default value of a scaling list of a minimum size represented by the minimum TU size information and a TU of 4 × 4 pixels (hereinafter referred to as a default scaling list). ) To set a flat matrix. Here, the minimum size of the TU is assumed to be other than 4 × 4 pixels. However, when the minimum size of the TU is 4 × 4 pixels, only the default scaling list of the 4 × 4 pixel TU is flat. To be a matrix. Further, the list setting unit 51 sets a matrix other than the flat matrix as a default scaling list of TUs having a size larger than the minimum size represented by the minimum TU size information.

  The list setting unit 51 acquires a set scaling list for each TU size included in the SPS and PPS supplied from the setting unit 11. Based on the SPS, the list setting unit 51 converts a default scaling list for each TU size, a setting scaling list, or a scaling list that is a flat matrix (hereinafter referred to as a flat scaling list) into a quantization unit 35 and an inverse quantization unit. 38.

  As described above, the list setting unit 51 sets a flat matrix as a default scaling list with a minimum size of a TU that is a size of a TU that can be transformed. Thereby, it is possible to suppress the quantization of the residual information of the TU on which the transform skip has been performed using the scaling list other than the flat matrix. That is, it is possible to suppress the use of the frequency domain weighting coefficient when the pixel domain residual information is quantized.

(Description of coding unit)
FIG. 8 is a diagram for explaining Coding UNIT (CU), which is a coding unit in the HEVC scheme.

  Since the HEVC system also targets images with large image frames such as UHD (Ultra High Definition) of 4000 × 2000 pixels, it is not optimal to fix the encoding unit size to 16 × 16 pixels. . Therefore, in the HEVC scheme, CU is defined as a coding unit.

  The CU plays the same role as the macroblock in the AVC method. Specifically, the CU is divided into PUs or TUs.

  However, the size of the CU is a square represented by a power-of-two pixel that is variable for each sequence. Specifically, the CU divides the LCU, which is the CU of the maximum size, into two in the horizontal direction and the vertical direction an arbitrary number of times so as not to be smaller than the SCU (Smallest Coding Unit) which is the CU of the minimum size. Is set by That is, the size of an arbitrary hierarchy when the LCU is hierarchized so that the size of the upper hierarchy becomes 1/4 of the size of the lower hierarchy until the SCU becomes the SCU is the size of the CU.

  For example, in FIG. 8, the LCU size is 128 and the SCU size is 8. Accordingly, the hierarchical depth (Depth) of the LCU is 0 to 4, and the hierarchical depth number is 5. That is, the number of divisions corresponding to the CU is one of 0 to 4.

  Information specifying the size of the LCU and SCU is included in the SPS. Also, the number of divisions corresponding to the CU is specified by split_flag indicating whether or not to further divide each layer. Details of the CU are described in Non-Patent Document 1.

  The size of the TU can be specified using split_transform_flag, similar to the split_flag of the CU. The maximum number of TU divisions at the time of inter prediction and intra prediction is specified by SPS as max_transform_hierarchy_depth_inter and max_transform_hierarchy_depth_intra, respectively.

Further, in this specification, a CTU (Coding Tree Unit) is a unit that includes a CTB (Coding Tree Block) of an LCU and parameters when processing is performed on the LCU base (level).
Further, it is assumed that a CU constituting a CTU is a unit including a CB (Coding Block) and a parameter for processing on the CU base (level).

(Configuration example of list setting unit 51)
FIG. 9 is a block diagram illustrating a configuration example of the list setting unit 51 of FIG.

  As illustrated in FIG. 9, the skip setting unit 50 acquires skip permission information included in the PPS supplied from the setting unit 11 illustrated in FIG. 1 and minimum TU size information included in the SPS. When the skip permission information is 1, the skip setting unit 50 supplies the minimum TU size information to the orthogonal transform unit 34 and the list setting unit 51 in FIG.

  As shown in FIG. 9, the list setting unit 51 includes a default setting unit 71, a flat setting unit 72, and a list acquisition unit 73.

  Based on the minimum TU size information supplied from the skip setting unit 50, the default setting unit 71 sets the minimum size represented by the minimum TU size information and the default scaling list of 4 × 4 pixels in a flat matrix. Further, the default setting unit 71 sets a default scaling list having a size larger than the minimum size represented by the minimum TU size information in a matrix other than the flat matrix.

  The default setting unit 71 generates a default scaling list for each TU size based on the SPS scaling list flag included in the SPS supplied from the setting unit 11 or the PPS scaling list flag included in the PPS. And supplied to the inverse quantization unit 38.

  The flat setting unit 72 holds a flat scaling list for each TU size. The flat setting unit 72 supplies a flat scaling list for each TU size to the quantization unit 35 and the inverse quantization unit 38 based on the scaling list use flag included in the SPS supplied from the setting unit 11.

  The list acquisition unit 73 acquires a setting scaling list for each TU size included in the SPS and PPS supplied from the setting unit 11. The list acquisition unit 73 supplies the set scaling list when the TU size is 4 × 4 pixels or 8 × 8 pixels to the quantization unit 35 and the inverse quantization unit 38 as they are. In addition, the list acquisition unit 73 upsamples the 8 × 8 setting scaling list when the TU size is 16 × 16 pixels or 32 × 32 pixels, and scales the 16 × 16 pixels or 32 × 32 pixels. A list is generated and supplied to the quantization unit 35 and the inverse quantization unit 38.

(Description of processing of encoding device)
FIG. 10 is a flowchart illustrating the stream generation processing of the encoding device 10 of FIG.

  In step S11 of FIG. 10, the setting unit 11 of the encoding device 10 sets a parameter set. The setting unit 11 supplies the set parameter set to the encoding unit 12.

  In step S <b> 12, the encoding unit 12 performs an encoding process of encoding an image in units of frames input from the outside by a method according to the HEVC method. Details of the encoding process will be described with reference to FIGS. 11 and 12 described later.

  In step S <b> 13, the accumulation buffer 37 (FIG. 7) of the encoding unit 12 generates an encoded stream from the parameter set supplied from the setting unit 11 and the stored encoded data, and supplies the encoded stream to the transmission unit 13.

  In step S14, the transmission unit 13 transmits the encoded stream supplied from the setting unit 11 to a decoding device to be described later, and ends the process.

  11 and 12 are flowcharts illustrating details of the encoding process in step S12 of FIG.

  In step S30 of FIG. 11, the encoding unit 12 (FIG. 7) performs a scaling list determination process for determining a scaling list for each TU size. Details of the scaling list determination process will be described with reference to FIG.

  In step S31, the A / D conversion unit 31 performs A / D conversion on the frame-by-frame image input as an encoding target. The A / D conversion unit 31 outputs an image, which is a digital signal after conversion, to the screen rearrangement buffer 32 for storage.

  In step S32, the screen rearrangement buffer 32 rearranges the stored frame images in the display order in the order for encoding according to the GOP structure. The screen rearrangement buffer 32 supplies the rearranged frame-unit images to the calculation unit 33, the intra prediction unit 46, and the motion prediction / compensation unit 47.

  In step S33, the intra prediction unit 46 performs intra prediction processing in all intra prediction modes that are candidates in PU units. Further, the intra prediction unit 46 calculates cost function values for all candidate intra prediction modes based on the image read from the screen rearrangement buffer 32 and the predicted image generated as a result of the intra prediction process. Is calculated. Then, the intra prediction unit 46 determines the intra prediction mode that minimizes the cost function value as the optimal intra prediction mode. The intra prediction unit 46 supplies the predicted image generated in the optimal intra prediction mode and the corresponding cost function value to the predicted image selection unit 48.

  In addition, the motion prediction / compensation unit 47 performs motion prediction / compensation processing in all inter prediction modes that are candidates in PU units. In addition, the motion prediction / compensation unit 47 calculates cost function values for all candidate inter prediction modes based on the images supplied from the screen rearrangement buffer 32 and the predicted images, and the cost function values are calculated. The minimum inter prediction mode is determined as the optimal inter prediction mode. Then, the motion prediction / compensation unit 47 supplies the cost function value of the optimal inter prediction mode and the corresponding prediction image to the prediction image selection unit 48.

  In step S <b> 34, the predicted image selection unit 48 selects one of the optimal intra prediction mode and the optimal inter prediction mode based on the cost function values supplied from the intra prediction unit 46 and the motion prediction / compensation unit 47 by the process of step S <b> 33. The one with the smallest cost function value is determined as the optimum prediction mode. Then, the predicted image selection unit 48 supplies the predicted image in the optimal prediction mode to the calculation unit 33 and the addition unit 40.

  In step S35, the predicted image selection unit 48 determines whether or not the optimal prediction mode is the optimal inter prediction mode. When it is determined in step S35 that the optimal prediction mode is the optimal inter prediction mode, the predicted image selection unit 48 notifies the motion prediction / compensation unit 47 of the selection of the predicted image generated in the optimal inter prediction mode.

  In step S36, the motion prediction / compensation unit 47 supplies the inter prediction mode information, the motion vector, and information specifying the reference image to the lossless encoding unit 36, and the process proceeds to step S38.

  On the other hand, when it is determined in step S35 that the optimal prediction mode is not the optimal inter prediction mode, that is, when the optimal prediction mode is the optimal intra prediction mode, the predicted image selection unit 48 performs the prediction generated in the optimal intra prediction mode. The intra prediction unit 46 is notified of the image selection. In step S37, the intra prediction unit 46 supplies the intra prediction mode information to the lossless encoding unit 36, and the process proceeds to step S38.

  In step S38, the calculation unit 33 performs encoding by subtracting the predicted image supplied from the predicted image selection unit 48 from the image supplied from the screen rearrangement buffer 32. The computing unit 33 outputs the resulting image to the orthogonal transform unit 34 as residual information.

  In step S39, the orthogonal transform unit 34 performs orthogonal transform on the residual information from the calculation unit 33 in units of TUs.

  In step S40, the orthogonal transform unit 34 determines whether the minimum TU size information is supplied from the skip setting unit 50 in the scaling list determination process in step S30.

  If it is determined in step S40 that the minimum TU size information is supplied from the skip setting unit 50, that is, if the skip permission information is 1, the process proceeds to step S41. In step S41, the orthogonal transform unit 34 determines whether transform skip is applicable in units of TUs based on the minimum TU size information.

  Specifically, the orthogonal transform unit 34 determines that transform skip is applicable when the TU size is the minimum size represented by the minimum TU size information in units of TUs. On the other hand, when the TU size is not the minimum size represented by the minimum TU size information, the orthogonal transform unit 34 determines that transform skip is not applicable.

If it is determined in step S41 that transform skip is applicable, the orthogonal transform unit 34 performs cost function values when orthogonal transform is performed based on the orthogonal transform coefficient obtained as a result of the orthogonal transform in units of TUs. And a cost function value when the orthogonal transformation is not performed.
In step S42, the orthogonal transform unit 34 determines whether to perform transform skip in units of TUs.

  Specifically, the orthogonal transform unit 34 determines to perform the transform skip when the cost function value when the orthogonal transform is not performed is smaller than the cost function value when the orthogonal transform is performed. On the other hand, when the cost function value when the orthogonal transformation is performed is smaller than the cost function value when the orthogonal transformation is not performed, the orthogonal transformation unit 34 determines that the transform skip is not performed.

  When it is determined in step S42 that the transform skip is performed, in step S43, the orthogonal transform unit 34 outputs the residual information supplied from the calculation unit 33 to the quantization unit 35 in units of TUs. Further, the orthogonal transform unit 34 supplies a transform skip flag indicating the presence of transform skip to the lossless encoding unit 36 and the inverse orthogonal transform unit 39 in units of TUs. Then, the process proceeds to step S45.

  On the other hand, if it is determined in step S40 that the minimum TU size information is not supplied from the skip setting unit 50, that is, if the skip permission information is 0, the process proceeds to step S44. If it is determined in step S41 that transform skip is not applicable, the process proceeds to step S44. Further, when it is determined in step S42 that the transform skip is not performed, the process proceeds to step S44.

  In step S44, the orthogonal transform unit 34 outputs the orthogonal transform coefficient to the quantization unit 35 in units of TUs. In addition, the orthogonal transform unit 34 supplies a transform skip flag indicating the absence of transform skip to the lossless encoding unit 36 and the inverse orthogonal transform unit 39 in units of TUs. Then, the process proceeds to step S45.

  In step S45, the quantization unit 35 quantizes the orthogonal transform coefficient or residual information supplied from the orthogonal transform unit 34 in units of TUs using a scaling list for each TU size supplied from the list setting unit 51. Turn into. The quantization unit 35 supplies the quantization value obtained as a result of the quantization to the lossless encoding unit 36 and the inverse quantization unit 38.

  In step S46 of FIG. 12, the inverse quantization unit 38 reverses the quantization value supplied from the quantization unit 35 in units of TUs using the scaling list for each TU size supplied from the list setting unit 51. Quantize. The inverse quantization unit 38 supplies the orthogonal transform coefficient or residual information obtained as a result of the inverse quantization to the inverse orthogonal transform unit 39.

  In step S47, the inverse orthogonal transform unit 39 determines whether or not to perform transform skip in units of TUs based on the transform skip flag supplied from the orthogonal transform unit 34.

  If the transform skip flag indicates that there is no transform skip, or if the transform skip flag is not supplied from the orthogonal transform unit 34, it is determined in step S47 that the transform skip is not performed. Then, the process proceeds to step S48.

  In step S48, the inverse orthogonal transform unit 39 performs inverse orthogonal transform on the orthogonal transform coefficient supplied from the inverse quantization unit 38 in units of TUs. The inverse orthogonal transform unit 39 supplies the residual information obtained as a result to the addition unit 40, and the process proceeds to step S49.

  On the other hand, if the transform skip flag indicates that there is a transform skip, it is determined in step S47 that the transform skip is to be performed. Then, the inverse orthogonal transform unit 39 supplies the residual information supplied from the inverse quantization unit 38 to the addition unit 40, and the process proceeds to step S49.

  In step S49, the addition unit 40 adds the residual information supplied from the inverse orthogonal transform unit 39 and the prediction image supplied from the prediction image selection unit 48, and performs decoding. The adder 40 supplies the decoded image to the deblock filter 41 and the frame memory 44.

  In step S <b> 50, the deblocking filter 41 performs a deblocking filter process on the decoded image supplied from the adding unit 40. The deblocking filter 41 supplies the resulting image to the adaptive offset filter 42.

  In step S51, the adaptive offset filter 42 performs an adaptive offset filter process for each LCU on the image supplied from the deblocking filter 41. The adaptive offset filter 42 supplies the resulting image to the adaptive loop filter 43. Further, the adaptive offset filter 42 supplies the offset filter information to the lossless encoding unit 36 for each LCU.

  In step S52, the adaptive loop filter 43 performs an adaptive loop filter process for each LCU on the image supplied from the adaptive offset filter. The adaptive loop filter 43 supplies the resulting image to the frame memory 44. The adaptive loop filter 43 also supplies the filter coefficient used in the adaptive loop filter process to the lossless encoding unit 36.

  In step S53, the frame memory 44 accumulates the image supplied from the adaptive loop filter 43 and the image supplied from the adder 40. An image adjacent to the PU among the images not subjected to the filter processing accumulated in the frame memory 44 is supplied to the intra prediction unit 46 via the switch 45 as a peripheral image. On the other hand, the filtered image stored in the frame memory 44 is output to the motion prediction / compensation unit 47 via the switch 45 as a reference image.

  In step S54, the lossless encoding unit 36 encodes the intra prediction mode information or the inter prediction mode information, the motion vector, the information specifying the reference image, the transform skip flag, the offset filter information, and the filter coefficient. It is losslessly encoded as information.

  In step S55, the lossless encoding unit 36 performs lossless encoding on the quantization value supplied from the quantization unit 35. Then, the lossless encoding unit 36 generates encoded data from the encoded information that has been losslessly encoded in the process of step S54 and the quantized value that has been losslessly encoded, and supplies the encoded data to the accumulation buffer 37.

  In step S56, the accumulation buffer 37 temporarily accumulates the encoded data supplied from the lossless encoding unit 36.

  In step S57, the rate control unit 49 controls the rate of the quantization operation of the quantization unit 35 based on the encoded data stored in the storage buffer 37 so that overflow or underflow does not occur. And a process returns to step S12 of FIG. 10, and progresses to step S13.

  In the encoding process of FIGS. 11 and 12, in order to simplify the description, the intra prediction process and the motion prediction / compensation process are always performed. Sometimes only.

  FIG. 13 is a flowchart for explaining the details of the scaling list determination processing in step S30 of FIG.

  In step S71 in FIG. 13, the skip setting unit 50 (FIG. 9) determines whether or not the skip permission information included in the PPS supplied from the setting unit 11 in FIG. When it is determined in step S71 that the skip permission information is 1, in step S72, the skip setting unit 50 converts the minimum TU size information included in the SPS supplied from the setting unit 11 into the orthogonal transform unit 34 and the list setting unit. 51.

  In step S73, the default setting unit 71 of the list setting unit 51 sets a default scaling list for each TU size based on the minimum TU size information supplied from the skip setting unit 50. Then, the process proceeds to step S75.

  On the other hand, when it is determined in step S71 that the skip permission information is 0, in step S74, the default setting unit 71 sets a default scaling list for each TU size.

  Specifically, the default setting unit 71 sets a flat matrix as a default scaling list of a 4 × 4 pixel TU. Further, the default setting unit 71 sets a matrix other than the flat matrix as a default scaling list of a TU having a size larger than 4 × 4 pixels. Then, the process proceeds to step S75.

  In step S <b> 75, the list acquisition unit 73 determines whether the scaling list use flag included in the SPS supplied from the setting unit 11 is 1. If it is determined in step S75 that the scaling list use flag is 1, the process proceeds to step S76.

  In step S <b> 76, the list acquisition unit 73 determines whether the SPS scaling list flag included in the SPS supplied from the setting unit 11 or the PPS scaling list flag included in the PPS is “1”.

  If it is determined in step S76 that the SPS scaling list flag or the PPS scaling list flag is 1, the process proceeds to step S77. In step S77, the list acquisition unit 73 acquires a set scaling list for each TU size included in the SPS or PPS.

  The list acquisition unit 73 supplies the set scaling list when the TU size is 4 × 4 pixels or 8 × 8 pixels to the quantization unit 35 and the inverse quantization unit 38 as they are. In addition, the list acquisition unit 73 upsamples the 8 × 8 setting scaling list when the TU size is 16 × 16 pixels or 32 × 32 pixels, and scales the 16 × 16 pixels or 32 × 32 pixels. A list is generated and supplied to the quantization unit 35 and the inverse quantization unit 38. And a process returns to step S30 of FIG. 11, and progresses to step S31.

  On the other hand, if it is determined in step S76 that the SPS scaling list flag and the PPS scaling list flag are not 1, the process proceeds to step S78. In step S78, the default setting unit 71 supplies a default scaling list for each TU size to the quantization unit 35 and the inverse quantization unit 38. And a process returns to step S30 of FIG. 11, and progresses to step S31.

  If it is determined in step S75 that the scaling list use flag is not 1, the process proceeds to step S79. In step S <b> 79, the flat setting unit 72 supplies the held flat scaling list for each TU size to the quantization unit 35 and the inverse quantization unit 38. And a process returns to step S30 of FIG. 11, and progresses to step S31.

  As described above, the encoding apparatus 10 sets the flat matrix as the default scaling list for the minimum size of the TU that is a size that can be transformed and skipped other than 4 × 4 pixels. Therefore, even when transform skip is performed for a TU with a size other than 4 × 4 pixels, frequency domain scaling other than the flat matrix is performed when the TU of the pixel domain for which the transform skip has been performed is quantized. The list can be prevented from being used. As a result, encoding efficiency can be improved.

(Configuration example of one embodiment of decoding device)
FIG. 14 is a block diagram illustrating a configuration example of an embodiment of a decoding device to which the present disclosure is applied, which decodes an encoded stream transmitted from the encoding device 10 of FIG.

  14 includes a receiving unit 111, an extracting unit 112, and a decoding unit 113.

  The receiving unit 111 of the decoding device 110 receives the encoded stream transmitted from the encoding device 10 of FIG.

  The extraction unit 112 extracts a parameter set and encoded data from the encoded stream supplied from the receiving unit 111 and supplies the parameter set and encoded data to the decoding unit 113.

  The decoding unit 113 decodes the encoded data supplied from the extraction unit 112 by a method according to the HEVC method. At this time, the decoding unit 113 also refers to the parameter set supplied from the extraction unit 112 as necessary. The decoding unit 113 outputs an image obtained as a result of decoding.

(Configuration example of decoding unit)
FIG. 15 is a block diagram illustrating a configuration example of the decoding unit 113 in FIG.

15 includes an accumulation buffer 131, a lossless decoding unit 132, an inverse quantization unit 133, an inverse orthogonal transform unit 134, an addition unit 135, a deblock filter 136, an adaptive offset filter 137, an adaptive loop filter 138, and a screen. A rearrangement buffer 139 is provided.
The decoding unit 113 includes a D / A conversion unit 140, a frame memory 141, a switch 142, an intra prediction unit 143, a motion compensation unit 144, a switch 145, a skip setting unit 146, and a list setting unit 147.

  The accumulation buffer 131 of the decoding unit 113 receives and accumulates the encoded data from the extraction unit 112 of FIG. The accumulation buffer 131 supplies the accumulated encoded data to the lossless decoding unit 132.

  The lossless decoding unit 132 obtains a quantized value and encoded information by performing lossless decoding such as variable length decoding or arithmetic decoding on the encoded data from the accumulation buffer 131. The lossless decoding unit 132 supplies the quantized value to the inverse quantization unit 133. Further, the lossless decoding unit 132 supplies intra prediction mode information as encoded information to the intra prediction unit 143. The lossless decoding unit 132 supplies a motion vector, inter prediction mode information, information for specifying a reference image, and the like to the motion compensation unit 144.

  Further, the lossless decoding unit 132 supplies intra prediction mode information or inter prediction mode information as encoded information to the switch 145. The lossless decoding unit 132 supplies offset filter information as encoded information to the adaptive offset filter 137. The lossless decoding unit 132 supplies filter coefficients as encoded information to the adaptive loop filter 138.

  Further, the lossless decoding unit 132 supplies a transform skip flag as encoded information to the inverse orthogonal transform unit 134.

  Inverse quantization unit 133, inverse orthogonal transform unit 134, addition unit 135, deblock filter 136, adaptive offset filter 137, adaptive loop filter 138, frame memory 141, switch 142, intra prediction unit 143, motion compensation unit 144, skip setting 7, the list setting unit 147, the inverse quantization unit 38, the inverse orthogonal transform unit 39, the addition unit 40, the deblock filter 41, the adaptive offset filter 42, the adaptive loop filter 43, the frame memory 44, and the switch 45. The intra prediction unit 46, the motion prediction / compensation unit 47, the skip setting unit 50, and the list setting unit 51 perform the same processing, thereby decoding an image.

  Specifically, the inverse quantization unit 133 uses the scaling list supplied from the list setting unit 147 for the quantization value from the lossless decoding unit 132, and the quantization method in the quantization unit 35 in FIG. Inverse quantization is performed by a method corresponding to. The inverse quantization unit 133 supplies the orthogonal transform coefficient or residual information obtained as a result to the inverse orthogonal transform unit 134.

  The inverse orthogonal transform unit 134 performs inverse orthogonal transform on the orthogonal transform coefficient supplied from the inverse quantization unit 133 in units of TUs based on the transform skip flag supplied from the lossless decoding unit 132. The inverse orthogonal transform unit 134 supplies the residual information obtained as a result of the inverse orthogonal transform or the residual information supplied from the inverse quantization unit 133 to the adding unit 135.

  The adding unit 135 performs decoding by adding the residual information supplied from the inverse orthogonal transform unit 134 and the prediction image supplied from the switch 145. The adder 135 supplies the decoded image to the deblock filter 136 and the frame memory 141.

  The deblocking filter 136 performs an adaptive deblocking filter process on the image supplied from the adding unit 135 and supplies an image obtained as a result to the adaptive offset filter 137.

  The adaptive offset filter 137 performs, for each LCU, the type of adaptive offset filter processing represented by the offset filter information on the image after the adaptive deblocking filter processing using the offset represented by the offset filter information from the lossless decoding unit 132. Do. The adaptive offset filter 137 supplies the image after the adaptive offset filter processing to the adaptive loop filter 138.

  The adaptive loop filter 138 performs adaptive loop filter processing for each LCU on the image supplied from the adaptive offset filter 137 using the filter coefficient supplied from the lossless decoding unit 132. The adaptive loop filter 138 supplies the resulting image to the frame memory 141 and the screen rearrangement buffer 139.

  The screen rearrangement buffer 139 stores the image supplied from the adaptive loop filter 138 in units of frames. The screen rearrangement buffer 139 rearranges the stored frame-by-frame images for encoding in the original display order and supplies them to the D / A conversion unit 140.

  The D / A conversion unit 140 D / A converts the frame unit image supplied from the screen rearrangement buffer 139 and outputs the converted image.

  The frame memory 141 stores the image supplied from the adaptive loop filter 138 and the image supplied from the adding unit 135. An image adjacent to the PU among the images not subjected to the filter processing accumulated in the frame memory 141 is supplied to the intra prediction unit 143 through the switch 142 as a peripheral image. On the other hand, the filtered image stored in the frame memory 141 is supplied to the motion compensation unit 144 via the switch 142 as a reference image.

  The intra prediction unit 143 performs intra prediction processing in the optimal intra prediction mode indicated by the intra prediction mode information supplied from the lossless decoding unit 132, using the peripheral image read from the frame memory 141 via the switch 142. The intra prediction unit 143 supplies the prediction image generated as a result to the switch 145.

  The motion compensation unit 144 reads the reference image specified by the information specifying the reference image supplied from the lossless decoding unit 132 from the frame memory 141 via the switch 142. The motion compensation unit 144 performs motion compensation processing in the optimal inter prediction mode indicated by the inter prediction mode information supplied from the lossless decoding unit 132, using the motion vector and the reference image supplied from the lossless decoding unit 132. The motion compensation unit 144 supplies the predicted image generated as a result to the switch 145.

  When the intra prediction mode information is supplied from the lossless decoding unit 132, the switch 145 supplies the prediction image supplied from the intra prediction unit 143 to the addition unit 135. On the other hand, when the inter prediction mode information is supplied from the lossless decoding unit 132, the switch 145 supplies the prediction image supplied from the motion compensation unit 144 to the adding unit 135.

  The skip setting unit 146 supplies the minimum TU size information included in the SPS supplied from the extraction unit 112 to the list setting unit 147 based on the skip permission information included in the PPS supplied from the extraction unit 112 in FIG. .

  The list setting unit 147 is configured similarly to the list setting unit 51 of FIG. Based on the minimum TU size information supplied from the skip setting unit 146, the list setting unit 147 sets a flat matrix as a default scaling list of the minimum size represented by the minimum TU size information and the TU of 4 × 4 pixels. The list setting unit 147 sets a matrix other than the flat matrix as a default scaling list of TUs having a size larger than the minimum size represented by the minimum TU size information.

  The list setting unit 147 acquires a setting scaling list for each TU size included in the SPS and PPS supplied from the extraction unit 112. The list setting unit 147 supplies a default scaling list, a setting scaling list, or a flat scaling list for each TU size to the inverse quantization unit 133 based on the SPS.

(Description of processing of decoding device)
FIG. 16 is a flowchart illustrating the image generation processing of the decoding device 110 in FIG.

  In step S111 in FIG. 16, the reception unit 111 of the decoding device 110 receives the encoded stream transmitted from the encoding device 10 in FIG. 1 and supplies the encoded stream to the extraction unit 112.

  In step S <b> 112, the extraction unit 112 extracts encoded data and a parameter set from the encoded stream supplied from the reception unit 111 and supplies the extracted encoded data and parameter set to the decoding unit 113.

  In step S113, the decoding unit 113 performs a decoding process for decoding the encoded data supplied from the extraction unit 112 using a parameter set supplied from the extraction unit 112 according to a method according to the HEVC method. Details of this decoding process will be described with reference to FIG. Then, the process ends.

  FIG. 17 is a flowchart illustrating details of the decoding process in step S113 of FIG.

  In step S131 of FIG. 17, the decoding unit 113 (FIG. 15) performs the same scaling list determination process as in FIG. However, the scaling list is supplied only to the inverse quantization unit 133.

  In step S132, the accumulation buffer 131 receives and accumulates encoded data in units of frames from the extraction unit 112 in FIG. The accumulation buffer 131 supplies the accumulated encoded data to the lossless decoding unit 132.

  In step S133, the lossless decoding unit 132 losslessly decodes the encoded data from the accumulation buffer 131 to obtain a quantization value and encoded information. The lossless decoding unit 132 supplies the quantized value to the inverse quantization unit 133. The lossless decoding unit 132 supplies a transform skip flag as encoded information to the inverse orthogonal transform unit 134.

  Further, the lossless decoding unit 132 supplies intra prediction mode information as encoded information to the intra prediction unit 143. The lossless decoding unit 132 supplies a motion vector, inter prediction mode information, information for specifying a reference image, and the like to the motion compensation unit 144.

  Further, the lossless decoding unit 132 supplies intra prediction mode information or inter prediction mode information as encoded information to the switch 145. The lossless decoding unit 132 supplies offset filter information as encoded information to the adaptive offset filter 137 and supplies filter coefficients to the adaptive loop filter 138.

  In step S134, the inverse quantization unit 133 dequantizes the quantization value from the lossless decoding unit 132 using the scaling list for each TU size supplied from the list setting unit 147 in units of TUs. The inverse quantization unit 133 supplies the orthogonal transform coefficient or residual information obtained as a result to the inverse orthogonal transform unit 134.

  In step S135, the inverse orthogonal transform unit 134 determines whether or not to perform transform skip in units of TUs based on the transform skip flag supplied from the lossless decoding unit 132.

  When the transform skip flag indicates that there is no transform skip, or when the transform skip flag is not supplied from the lossless decoding unit 132, it is determined in step S135 that the transform skip is not performed. Then, the process proceeds to step S136.

  In step S136, the inverse orthogonal transform unit 134 performs inverse orthogonal transform on the orthogonal transform coefficient supplied from the inverse quantization unit 133 in units of TUs. The inverse orthogonal transform unit 134 supplies the residual information obtained as a result to the addition unit 135 and advances the process to step S137.

  On the other hand, if the transform skip flag indicates that there is a transform skip, it is determined in step S135 that the transform skip is to be performed. Then, the inverse orthogonal transform unit 134 supplies the residual information supplied from the inverse quantization unit 133 to the addition unit 135, and the process proceeds to step S137.

  In step S137, the motion compensation unit 144 determines whether inter prediction mode information is supplied from the lossless decoding unit 132. If it is determined in step S137 that the inter prediction mode information has been supplied, the process proceeds to step S138.

  In step S138, the motion compensation unit 144 reads the reference image based on the reference image specifying information supplied from the lossless decoding unit 132, and uses the motion vector and the reference image to determine the optimum inter prediction mode indicated by the inter prediction mode information. Perform motion compensation processing. The motion compensation unit 144 supplies the predicted image generated as a result to the addition unit 135 via the switch 145, and the process proceeds to step S140.

  On the other hand, when it is determined in step S137 that the inter prediction mode information is not supplied, that is, when the intra prediction mode information is supplied to the intra prediction unit 143, the process proceeds to step S139.

  In step S139, the intra prediction unit 143 performs intra prediction processing in the intra prediction mode indicated by the intra prediction mode information, using the peripheral image read from the frame memory 141 via the switch 142. The intra prediction unit 143 supplies the prediction image generated as a result of the intra prediction process to the adding unit 135 via the switch 145, and the process proceeds to step S140.

  In step S140, the addition unit 135 performs decoding by adding the residual information supplied from the inverse orthogonal transform unit 134 and the prediction image supplied from the switch 145. The adder 135 supplies the decoded image to the deblock filter 136 and the frame memory 141.

  In step S <b> 141, the deblocking filter 136 performs deblocking filtering on the image supplied from the adding unit 135 to remove block distortion. The deblocking filter 136 supplies the resulting image to the adaptive offset filter 137.

  In step S142, the adaptive offset filter 137 performs adaptive offset filter processing for each LCU on the image after the deblocking filter processing by the deblocking filter 136 based on the offset filter information supplied from the lossless decoding unit 132. . The adaptive offset filter 137 supplies the image after the adaptive offset filter processing to the adaptive loop filter 138.

  In step S143, the adaptive loop filter 138 performs adaptive loop filter processing for each LCU on the image supplied from the adaptive offset filter 137 using the filter coefficient supplied from the lossless decoding unit 132. The adaptive loop filter 138 supplies the resulting image to the frame memory 141 and the screen rearrangement buffer 139.

  In step S144, the frame memory 141 accumulates the image supplied from the adder 135 and the image supplied from the adaptive loop filter 138. An image adjacent to the PU among the images not subjected to the filter processing accumulated in the frame memory 141 is supplied to the intra prediction unit 143 through the switch 142 as a peripheral image. On the other hand, the filtered image stored in the frame memory 141 is supplied to the motion compensation unit 144 via the switch 142 as a reference image.

  In step S145, the screen rearrangement buffer 139 stores the image supplied from the adaptive loop filter 138 in units of frames, and rearranges the stored frame-by-frame images for encoding in the original display order. To the D / A converter 140.

  In step S146, the D / A conversion unit 140 performs D / A conversion on the frame-based image supplied from the screen rearrangement buffer 139 and outputs it. Then, the process returns to step S113 in FIG. 16 and ends.

  As described above, the decoding apparatus 110 sets the flat matrix as the default scaling list for the minimum size of the TU that is a size that can be transformed and skipped other than 4 × 4 pixels, as in the encoding apparatus 10. Therefore, it is possible to decode the encoded stream that is encoded so that the encoding efficiency is improved when the encoding apparatus 10 performs transform skip of a TU having a size other than 4 × 4 pixels.

  In the first embodiment, as described in Non-Patent Document 4, it is possible to perform a transform skip for a TU of the minimum size. However, as described in Non-Patent Document 3, Transform skip may be enabled for TUs of all sizes. In this case, the default scaling list of all sizes is made a flat matrix.

  Further, transform skip may be enabled for a TU having a size equal to or smaller than a predetermined size. In this case, the encoding apparatus 10 sets, for example, skip TU information indicating the maximum size of a TU that can be transformed skipped in PPS or the like, and transmits the skip TU information to the decoding apparatus 110. Based on the skip TU information, the encoding device 10 and the decoding device 110 set a flat matrix as a default scaling list having a size equal to or smaller than the size represented by the skip TU information, which allows transform skipping. For example, when the skip TU information represents 16 × 16 pixels, the default scaling list of TUs of 4 × 4 pixels, 8 × 8 pixels, and 16 × 16 pixels is made into a flat matrix.

  Note that the size indicated by the skip TU information must be not less than the minimum size of the TU indicated by the minimum TU size information and not more than the maximum size of the TU. The maximum TU size is obtained from the minimum TU size information and difference information (log2_diff_max_min_transform_blocksize) indicating the difference between the minimum size and the maximum size of the TU.

  The skip TU information may be set separately for the intra-coded TU and the inter-coded TU. The skip TU information may be set separately for the TU of the Y signal, the TU of the Cb signal, and the TU of the Cr signal.

  Further, whether or not the scaling list is used at the time of quantization may be controlled in units of slices. In this case, when the scaling list use flag included in the SPS is 1, a flag (scaling_list_enabled_flag) indicating whether the scaling list is not used when the corresponding slice is quantized is set in the slice header. Thereby, even if it is a case where whether it is suitable for the quantization using a scaling list for every slice differs, optimal quantization can be performed.

  Similarly, whether or not the scaling list is used at the time of quantization may be controlled in CU units or TU units.

<Second Embodiment>
(Description of computer to which the present disclosure is applied)
The series of processes described above can be executed by hardware or can be executed by software. When a series of processing is executed by software, a program constituting the software is installed in the computer. Here, the computer includes, for example, a general-purpose personal computer capable of executing various functions by installing various programs by installing a computer incorporated in dedicated hardware.

  FIG. 18 is a block diagram illustrating an example of a hardware configuration of a computer that executes the above-described series of processes using a program.

  In a computer, a central processing unit (CPU) 201, a read only memory (ROM) 202, and a random access memory (RAM) 203 are connected to each other by a bus 204.

  An input / output interface 205 is further connected to the bus 204. An input unit 206, an output unit 207, a storage unit 208, a communication unit 209, and a drive 210 are connected to the input / output interface 205.

  The input unit 206 includes a keyboard, a mouse, a microphone, and the like. The output unit 207 includes a display, a speaker, and the like. The storage unit 208 includes a hard disk, a nonvolatile memory, and the like. The communication unit 209 includes a network interface and the like. The drive 210 drives a removable medium 211 such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory.

  In the computer configured as described above, the CPU 201 loads, for example, the program stored in the storage unit 208 to the RAM 203 via the input / output interface 205 and the bus 204 and executes the program. Is performed.

  The program executed by the computer (CPU 201) can be provided by being recorded on the removable medium 211 as a package medium or the like, for example. The program can be provided via a wired or wireless transmission medium such as a local area network, the Internet, or digital satellite broadcasting.

  In the computer, the program can be installed in the storage unit 208 via the input / output interface 205 by attaching the removable medium 211 to the drive 210. The program can be received by the communication unit 209 via a wired or wireless transmission medium and installed in the storage unit 208. In addition, the program can be installed in the ROM 202 or the storage unit 208 in advance.

  The program executed by the computer may be a program that is processed in time series in the order described in this specification, or in parallel or at a necessary timing such as when a call is made. It may be a program for processing.

<Third Embodiment>
(Application to multi-view image coding and multi-view image decoding)
The series of processes described above can be applied to multi-view image encoding / multi-view image decoding.
FIG. 19 shows an example of a multi-view image encoding method.

  As shown in FIG. 19, the multi-viewpoint image includes images of a plurality of viewpoints (views). Multiple views of this multi-viewpoint image are encoded using the base view that encodes and decodes using only the image of its own view without using the image of the other view, and the image of the other view. -It consists of a non-base view that performs decoding. For the non-base view, an image of the base view may be used, or an image of another non-base view may be used.

  When encoding / decoding a multi-view image as shown in FIG. 19, the image of each view is encoded / decoded. For the encoding / decoding of each view, the method of the first embodiment described above is used. You may make it apply. By doing so, it is possible to improve the encoding efficiency when transform skipping is performed on blocks having a size other than 4 × 4 pixels.

  Furthermore, in encoding / decoding of each view, flags and parameters used in the method of the first embodiment described above may be shared. More specifically, for example, syntax elements such as SPS, PPS, and residual_coding may be shared in encoding / decoding of each view. Of course, other necessary information may be shared in encoding / decoding of each view.

  By doing in this way, transmission of redundant information can be suppressed and the amount of information to be transmitted (code amount) can be reduced (that is, reduction in encoding efficiency can be suppressed).

(Multi-view image encoding device)
FIG. 20 is a diagram illustrating a multi-view image encoding apparatus that performs the above-described multi-view image encoding. As illustrated in FIG. 20, the multi-view image encoding device 600 includes an encoding unit 601, an encoding unit 602, and a multiplexing unit 603.

  The encoding unit 601 encodes the base view image and generates a base view image encoded stream. The encoding unit 602 encodes the non-base view image and generates a non-base view image encoded stream. The multiplexing unit 603 multiplexes the base view image encoded stream generated by the encoding unit 601 and the non-base view image encoded stream generated by the encoding unit 602 to generate a multi-view image encoded stream. To do.

  The encoding device 10 (FIG. 1) can be applied to the encoding unit 601 and the encoding unit 602 of the multi-view image encoding device 600. That is, in the encoding for each view, it is possible to improve the encoding efficiency when a transform skip is performed on a block having a size other than 4 × 4 pixels. Also, the encoding unit 601 and the encoding unit 602 can perform encoding using the same flags and parameters (for example, syntax elements related to processing between images) (that is, share the flags and parameters). Therefore, it is possible to suppress a reduction in encoding efficiency.

(Multi-viewpoint image decoding device)
FIG. 21 is a diagram illustrating a multi-view image decoding apparatus that performs the above-described multi-view image decoding. As illustrated in FIG. 21, the multi-view image decoding device 610 includes a demultiplexing unit 611, a decoding unit 612, and a decoding unit 613.

  The demultiplexing unit 611 demultiplexes the multi-view image encoded stream in which the base view image encoded stream and the non-base view image encoded stream are multiplexed, and the base view image encoded stream and the non-base view image The encoded stream is extracted. The decoding unit 612 decodes the base view image encoded stream extracted by the demultiplexing unit 611 to obtain a base view image. The decoding unit 613 decodes the non-base view image encoded stream extracted by the demultiplexing unit 611 to obtain a non-base view image.

  The decoding device 110 (FIG. 14) can be applied to the decoding unit 612 and the decoding unit 613 of the multi-view image decoding device 610. That is, in the decoding for each view, it is possible to decode an encoded stream with improved encoding efficiency when a transform skip of a block having a size other than 4 × 4 pixels is performed. In addition, the decoding unit 612 and the decoding unit 613 can perform decoding using the same flags and parameters (for example, syntax elements related to processing between images) (that is, the flags and parameters can be shared). Therefore, it is possible to suppress a reduction in encoding efficiency.

<Fourth embodiment>
(Application to hierarchical image coding / hierarchical image decoding)
The series of processes described above can be applied to hierarchical image encoding / hierarchical image decoding (scalable encoding / scalable decoding). FIG. 22 shows an example of a hierarchical image encoding method.

  Hierarchical image coding (scalable coding) is a method in which image data is divided into a plurality of layers (hierarchized) so as to have a scalable function with respect to a predetermined parameter, and is encoded for each layer. Hierarchical image decoding (scalable decoding) is decoding corresponding to the hierarchical image encoding.

  As shown in FIG. 22, in image hierarchization, one image is divided into a plurality of images (layers) based on a predetermined parameter having a scalable function. That is, the hierarchized image (hierarchical image) includes images of a plurality of hierarchies (layers) having different predetermined parameter values. A plurality of layers of this hierarchical image are encoded / decoded using only the image of the own layer without using the image of the other layer, and encoded / decoded using the image of the other layer. It consists of a non-base layer (also called enhancement layer) that performs decoding. As the non-base layer, an image of the base layer may be used, or an image of another non-base layer may be used.

  In general, the non-base layer is composed of difference image data (difference data) between its own image and an image of another layer so that redundancy is reduced. For example, when one image is divided into two layers of a base layer and a non-base layer (also referred to as an enhancement layer), an image with lower quality than the original image can be obtained using only the base layer data. By synthesizing the base layer data, an original image (that is, a high-quality image) can be obtained.

  By hierarchizing images in this way, it is possible to easily obtain images of various qualities depending on the situation. For example, to a terminal with low processing capability, such as a mobile phone, image compression information of only the base layer is transmitted, and a moving image with low spatiotemporal resolution or poor image quality is reproduced. For terminals with high processing capabilities, such as televisions and personal computers, in addition to the base layer, the image compression information of the enhancement layer is transmitted and the spatial time resolution is high, or Image compression information corresponding to the capabilities of the terminal and the network can be transmitted from the server without performing transcoding processing, such as playing a moving image with high image quality.

  In the case of encoding / decoding a hierarchical image as in the example of FIG. 22, the image of each layer is encoded / decoded. For the encoding / decoding of each layer, the method of the first embodiment described above is used. May be applied. By doing so, it is possible to improve the encoding efficiency when transform skipping is performed on blocks having a size other than 4 × 4 pixels.

  Furthermore, in encoding / decoding of each layer, the flags and parameters used in the method of the first embodiment described above may be shared. More specifically, for example, syntax elements such as SPS, PPS, and residual_coding may be shared in encoding / decoding of each layer. Of course, other necessary information may be shared in encoding / decoding of each layer.

  By doing in this way, transmission of redundant information can be suppressed and the amount of information to be transmitted (code amount) can be reduced (that is, reduction in encoding efficiency can be suppressed).

(Scalable parameters)
In such hierarchical image encoding / hierarchical image decoding (scalable encoding / scalable decoding), parameters having a scalable function are arbitrary. For example, the spatial resolution as shown in FIG. 23 may be used as the parameter (spatial scalability). In the case of this spatial scalability, the resolution of the image is different for each layer. That is, in this case, as shown in FIG. 23, each picture has two layers of a base layer having a spatially lower resolution than the original image and an enhancement layer in which the original spatial resolution can be obtained by combining with the base layer. Is layered. Of course, this number of hierarchies is an example, and the number of hierarchies can be hierarchized.

  In addition, as a parameter for providing such scalability, for example, a temporal resolution as illustrated in FIG. 24 may be applied (temporal scalability). In the case of this temporal scalability, the frame rate is different for each layer. That is, in this case, as shown in FIG. 24, each picture is divided into two layers of a base layer having a lower frame rate than the original moving image and an enhancement layer in which the original frame rate can be obtained by combining with the base layer. Layered. Of course, this number of hierarchies is an example, and the number of hierarchies can be hierarchized.

  Furthermore, for example, a signal-to-noise ratio (SNR) may be applied as a parameter that provides such scalability (SNR scalability). In the case of this SNR scalability (SNR scalability), the SN ratio is different for each layer. That is, in this case, as shown in FIG. 25, each picture is hierarchized into two layers: a base layer having a lower SNR than the original image, and an enhancement layer from which the original SNR is obtained by combining with the base layer. The Of course, this number of hierarchies is an example, and the number of hierarchies can be hierarchized.

Of course, parameters other than the above-described example may be used for providing the scalable property.
For example, bit depth can also be used as a parameter for providing scalability (bit-depth scalability). In the case of this bit depth scalability (bit-depth scalability), the bit depth differs for each layer. In this case, for example, the base layer is composed of an 8-bit image, and an enhancement layer is added to the 8-bit image so that a 10-bit image can be obtained.

  Moreover, a chroma format can also be used as a parameter which gives scalable property (chroma scalability). In the case of this chroma scalability, the chroma format is different for each layer. In this case, for example, the base layer is composed of a component image of 4: 2: 0 format, and an enhancement layer is added thereto to obtain a component image of 4: 2: 2 format. Can be.

(Hierarchical image encoding device)
FIG. 26 is a diagram illustrating a hierarchical image encoding apparatus that performs the above-described hierarchical image encoding. As illustrated in FIG. 26, the hierarchical image encoding device 620 includes an encoding unit 621, an encoding unit 622, and a multiplexing unit 623.

  The encoding unit 621 encodes the base layer image and generates a base layer image encoded stream. The encoding unit 622 encodes the non-base layer image and generates a non-base layer image encoded stream. The multiplexing unit 623 multiplexes the base layer image encoded stream generated by the encoding unit 621 and the non-base layer image encoded stream generated by the encoding unit 622 to generate a hierarchical image encoded stream. .

  The encoding device 10 (FIG. 1) can be applied to the encoding unit 621 and the encoding unit 622 of the hierarchical image encoding device 620. That is, in the encoding for each layer, it is possible to improve the encoding efficiency when a transform skip of a block having a size other than 4 × 4 pixels is performed. Also, the encoding unit 621 and the encoding unit 622 can perform control of intra prediction filter processing using the same flags and parameters (for example, syntax elements related to processing between images) (that is, the intra prediction processing). Therefore, it is possible to share a flag and a parameter), and it is possible to suppress a reduction in encoding efficiency.

(Hierarchical image decoding device)
FIG. 27 is a diagram illustrating a hierarchical image decoding apparatus that performs the hierarchical image decoding described above. As illustrated in FIG. 27, the hierarchical image decoding device 630 includes a demultiplexing unit 631, a decoding unit 632, and a decoding unit 633.

  The demultiplexing unit 631 demultiplexes the hierarchical image encoded stream in which the base layer image encoded stream and the non-base layer image encoded stream are multiplexed, and the base layer image encoded stream and the non-base layer image code Stream. The decoding unit 632 decodes the base layer image encoded stream extracted by the demultiplexing unit 631 to obtain a base layer image. The decoding unit 633 decodes the non-base layer image encoded stream extracted by the demultiplexing unit 631 to obtain a non-base layer image.

  The decoding device 110 (FIG. 14) can be applied to the decoding unit 632 and the decoding unit 633 of the hierarchical image decoding device 630. That is, in the decoding for each layer, it is possible to decode an encoded stream with improved encoding efficiency when a transform skip of a block having a size other than 4 × 4 pixels is performed. In addition, the decoding unit 612 and the decoding unit 613 can perform decoding using the same flags and parameters (for example, syntax elements related to processing between images) (that is, the flags and parameters can be shared). Therefore, it is possible to suppress a reduction in encoding efficiency.

<Fifth embodiment>
(Example configuration of television device)
FIG. 28 illustrates a schematic configuration of a television apparatus to which the present disclosure is applied. The television apparatus 900 includes an antenna 901, a tuner 902, a demultiplexer 903, a decoder 904, a video signal processing unit 905, a display unit 906, an audio signal processing unit 907, a speaker 908, and an external interface unit 909. Furthermore, the television apparatus 900 includes a control unit 910, a user interface unit 911, and the like.

  The tuner 902 selects and demodulates a desired channel from the broadcast wave signal received by the antenna 901, and outputs the obtained encoded bit stream to the demultiplexer 903.

  The demultiplexer 903 extracts video and audio packets of the program to be viewed from the encoded bit stream, and outputs the extracted packet data to the decoder 904. Further, the demultiplexer 903 supplies a packet of data such as EPG (Electronic Program Guide) to the control unit 910. If scrambling is being performed, descrambling is performed by a demultiplexer or the like.

  The decoder 904 performs a packet decoding process, and outputs video data generated by the decoding process to the video signal processing unit 905 and audio data to the audio signal processing unit 907.

  The video signal processing unit 905 performs noise removal, video processing according to user settings, and the like on the video data. The video signal processing unit 905 generates video data of a program to be displayed on the display unit 906, image data by processing based on an application supplied via a network, and the like. The video signal processing unit 905 generates video data for displaying a menu screen for selecting an item and the like, and superimposes the video data on the video data of the program. The video signal processing unit 905 generates a drive signal based on the video data generated in this way, and drives the display unit 906.

  The display unit 906 drives a display device (for example, a liquid crystal display element or the like) based on a drive signal from the video signal processing unit 905 to display a program video or the like.

  The audio signal processing unit 907 performs predetermined processing such as noise removal on the audio data, performs D / A conversion processing and amplification processing on the audio data after processing, and outputs the audio data to the speaker 908.

  The external interface unit 909 is an interface for connecting to an external device or a network, and performs data transmission / reception such as video data and audio data.

  A user interface unit 911 is connected to the control unit 910. The user interface unit 911 includes an operation switch, a remote control signal receiving unit, and the like, and supplies an operation signal corresponding to a user operation to the control unit 910.

  The control unit 910 is configured using a CPU (Central Processing Unit), a memory, and the like. The memory stores a program executed by the CPU, various data necessary for the CPU to perform processing, EPG data, data acquired via a network, and the like. The program stored in the memory is read and executed by the CPU at a predetermined timing such as when the television device 900 is activated. The CPU executes each program to control each unit so that the television device 900 operates in accordance with the user operation.

  Note that the television device 900 is provided with a bus 912 for connecting the tuner 902, the demultiplexer 903, the video signal processing unit 905, the audio signal processing unit 907, the external interface unit 909, and the control unit 910.

  In the television device configured as described above, the decoder 904 is provided with the function of the decoding device (decoding method) of the present application. For this reason, it is possible to decode an encoded stream with improved encoding efficiency when transform skip is performed on a block having a size other than 4 × 4 pixels.

<Sixth embodiment>
(Configuration example of mobile phone)
FIG. 29 illustrates a schematic configuration of a mobile phone to which the present disclosure is applied. The cellular phone 920 includes a communication unit 922, an audio codec 923, a camera unit 926, an image processing unit 927, a demultiplexing unit 928, a recording / reproducing unit 929, a display unit 930, and a control unit 931. These are connected to each other via a bus 933.

  An antenna 921 is connected to the communication unit 922, and a speaker 924 and a microphone 925 are connected to the audio codec 923. Further, an operation unit 932 is connected to the control unit 931.

  The cellular phone 920 performs various operations such as transmission / reception of voice signals, transmission / reception of e-mail and image data, image shooting, and data recording in various modes such as a voice call mode and a data communication mode.

  In the voice call mode, the voice signal generated by the microphone 925 is converted into voice data and compressed by the voice codec 923 and supplied to the communication unit 922. The communication unit 922 performs audio data modulation processing, frequency conversion processing, and the like to generate a transmission signal. The communication unit 922 supplies a transmission signal to the antenna 921 and transmits it to a base station (not shown). In addition, the communication unit 922 performs amplification, frequency conversion processing, demodulation processing, and the like of the reception signal received by the antenna 921, and supplies the obtained audio data to the audio codec 923. The audio codec 923 performs data expansion of the audio data and conversion to an analog audio signal and outputs the result to the speaker 924.

  In addition, when mail transmission is performed in the data communication mode, the control unit 931 accepts character data input by operating the operation unit 932 and displays the input characters on the display unit 930. In addition, the control unit 931 generates mail data based on a user instruction or the like in the operation unit 932 and supplies the mail data to the communication unit 922. The communication unit 922 performs mail data modulation processing, frequency conversion processing, and the like, and transmits the obtained transmission signal from the antenna 921. In addition, the communication unit 922 performs amplification, frequency conversion processing, demodulation processing, and the like of the reception signal received by the antenna 921, and restores mail data. This mail data is supplied to the display unit 930 to display the mail contents.

  Note that the cellular phone 920 can also store the received mail data in a storage medium by the recording / playback unit 929. The storage medium is any rewritable storage medium. For example, the storage medium is a removable memory such as a semiconductor memory such as a RAM or a built-in flash memory, a hard disk, a magnetic disk, a magneto-optical disk, an optical disk, a USB (Universal Serial Bus) memory, or a memory card.

  When transmitting image data in the data communication mode, the image data generated by the camera unit 926 is supplied to the image processing unit 927. The image processing unit 927 performs encoding processing of image data and generates encoded data.

The demultiplexing unit 928 multiplexes the encoded data generated by the image processing unit 927 and the audio data supplied from the audio codec 923 by a predetermined method, and supplies the multiplexed data to the communication unit 922. The communication unit 922 performs modulation processing and frequency conversion processing of multiplexed data, and transmits the obtained transmission signal from the antenna 921. In addition, the communication unit 922 performs amplification, frequency conversion processing, demodulation processing, and the like of the reception signal received by the antenna 921, and restores multiplexed data. This multiplexed data is supplied to the demultiplexing unit 928. The demultiplexing unit 928 performs demultiplexing of the multiplexed data, and supplies the encoded data to the image processing unit 927 and the audio data to the audio codec 923.
The image processing unit 927 performs a decoding process on the encoded data to generate image data. The image data is supplied to the display unit 930 and the received image is displayed. The audio codec 923 converts the audio data into an analog audio signal, supplies the analog audio signal to the speaker 924, and outputs the received audio.

  In the mobile phone device configured as described above, the image processing unit 927 is provided with the functions of the encoding device and the decoding device (encoding method and decoding method) of the present application. For this reason, it is possible to improve the encoding efficiency when transform skipping is performed on blocks having a size other than 4 × 4 pixels. Also, it is possible to decode an encoded stream with improved encoding efficiency when transform skip is performed on a block having a size other than 4 × 4 pixels.

<Seventh embodiment>
(Configuration example of recording / reproducing apparatus)
FIG. 30 illustrates a schematic configuration of a recording / reproducing apparatus to which the present disclosure is applied. The recording / reproducing apparatus 940 records, for example, audio data and video data of a received broadcast program on a recording medium, and provides the recorded data to the user at a timing according to a user instruction. The recording / reproducing device 940 can also acquire audio data and video data from another device, for example, and record them on a recording medium. Further, the recording / reproducing apparatus 940 decodes and outputs the audio data and video data recorded on the recording medium, thereby enabling image display and audio output on the monitor apparatus or the like.

  The recording / reproducing apparatus 940 includes a tuner 941, an external interface unit 942, an encoder 943, an HDD (Hard Disk Drive) unit 944, a disk drive 945, a selector 946, a decoder 947, an OSD (On-Screen Display) unit 948, a control unit 949, A user interface unit 950 is included.

  The tuner 941 selects a desired channel from a broadcast signal received by an antenna (not shown). The tuner 941 outputs an encoded bit stream obtained by demodulating the received signal of a desired channel to the selector 946.

  The external interface unit 942 includes at least one of an IEEE 1394 interface, a network interface unit, a USB interface, a flash memory interface, and the like. The external interface unit 942 is an interface for connecting to an external device, a network, a memory card, and the like, and receives data such as video data and audio data to be recorded.

  The encoder 943 performs encoding by a predetermined method when the video data and audio data supplied from the external interface unit 942 are not encoded, and outputs an encoded bit stream to the selector 946.

  The HDD unit 944 records content data such as video and audio, various programs, and other data on a built-in hard disk, and reads them from the hard disk at the time of reproduction or the like.

  The disk drive 945 records and reproduces signals with respect to the mounted optical disk. An optical disc, for example, a DVD disc (DVD-Video, DVD-RAM, DVD-R, DVD-RW, DVD + R, DVD + RW, etc.), a Blu-ray (registered trademark) disc, or the like.

  The selector 946 selects one of the encoded bit streams from the tuner 941 or the encoder 943 and supplies it to either the HDD unit 944 or the disk drive 945 when recording video or audio. In addition, the selector 946 supplies the encoded bit stream output from the HDD unit 944 or the disk drive 945 to the decoder 947 when playing back video or audio.

  The decoder 947 performs a decoding process on the encoded bitstream. The decoder 947 supplies the video data generated by performing the decoding process to the OSD unit 948. The decoder 947 outputs audio data generated by performing the decoding process.

  The OSD unit 948 generates video data for displaying a menu screen for selecting an item and the like, and superimposes the video data on the video data output from the decoder 947 and outputs the video data.

  A user interface unit 950 is connected to the control unit 949. The user interface unit 950 includes an operation switch, a remote control signal receiving unit, and the like, and supplies an operation signal corresponding to a user operation to the control unit 949.

  The control unit 949 is configured using a CPU, a memory, and the like. The memory stores programs executed by the CPU and various data necessary for the CPU to perform processing. The program stored in the memory is read and executed by the CPU at a predetermined timing such as when the recording / reproducing apparatus 940 is activated. The CPU executes the program to control each unit so that the recording / reproducing device 940 operates according to the user operation.

  In the recording / reproducing apparatus configured as described above, the decoder 947 is provided with the function of the decoding apparatus (decoding method) of the present application. For this reason, it is possible to decode an encoded stream with improved encoding efficiency when transform skip is performed on a block having a size other than 4 × 4 pixels.

<Eighth embodiment>
(Configuration example of imaging device)
FIG. 31 illustrates a schematic configuration of an imaging apparatus to which the present disclosure is applied. The imaging device 960 images a subject, displays an image of the subject on a display unit, and records it on a recording medium as image data.

  The imaging device 960 includes an optical block 961, an imaging unit 962, a camera signal processing unit 963, an image data processing unit 964, a display unit 965, an external interface unit 966, a memory unit 967, a media drive 968, an OSD unit 969, and a control unit 970. Have. In addition, a user interface unit 971 is connected to the control unit 970. Furthermore, the image data processing unit 964, the external interface unit 966, the memory unit 967, the media drive 968, the OSD unit 969, the control unit 970, and the like are connected via a bus 972.

  The optical block 961 is configured using a focus lens, a diaphragm mechanism, and the like. The optical block 961 forms an optical image of the subject on the imaging surface of the imaging unit 962. The imaging unit 962 is configured using a CCD or CMOS image sensor, generates an electrical signal corresponding to the optical image by photoelectric conversion, and supplies the electrical signal to the camera signal processing unit 963.

  The camera signal processing unit 963 performs various camera signal processes such as knee correction, gamma correction, and color correction on the electrical signal supplied from the imaging unit 962. The camera signal processing unit 963 supplies the image data after the camera signal processing to the image data processing unit 964.

  The image data processing unit 964 performs an encoding process on the image data supplied from the camera signal processing unit 963. The image data processing unit 964 supplies the encoded data generated by performing the encoding process to the external interface unit 966 and the media drive 968. Further, the image data processing unit 964 performs a decoding process on the encoded data supplied from the external interface unit 966 and the media drive 968. The image data processing unit 964 supplies the image data generated by performing the decoding process to the display unit 965. Further, the image data processing unit 964 superimposes the processing for supplying the image data supplied from the camera signal processing unit 963 to the display unit 965 and the display data acquired from the OSD unit 969 on the image data. To supply.

  The OSD unit 969 generates display data such as a menu screen or an icon made up of symbols, characters, or graphics and outputs it to the image data processing unit 964.

  The external interface unit 966 includes, for example, a USB input / output terminal, and is connected to a printer when printing an image. In addition, a drive is connected to the external interface unit 966 as necessary, a removable medium such as a magnetic disk or an optical disk is appropriately mounted, and a computer program read from them is installed as necessary. Furthermore, the external interface unit 966 has a network interface connected to a predetermined network such as a LAN or the Internet. For example, the control unit 970 reads encoded data from the media drive 968 in accordance with an instruction from the user interface unit 971, and supplies the encoded data to the other device connected via the network from the external interface unit 966. it can. Also, the control unit 970 may acquire encoded data and image data supplied from another device via the network via the external interface unit 966 and supply the acquired data to the image data processing unit 964. it can.

  As a recording medium driven by the media drive 968, any readable / writable removable medium such as a magnetic disk, a magneto-optical disk, an optical disk, or a semiconductor memory is used. The recording medium may be any type of removable medium, and may be a tape device, a disk, or a memory card. Of course, a non-contact IC (Integrated Circuit) card may be used.

  Further, the media drive 968 and the recording medium may be integrated and configured by a non-portable storage medium such as a built-in hard disk drive or an SSD (Solid State Drive).

  The control unit 970 is configured using a CPU. The memory unit 967 stores a program executed by the control unit 970, various data necessary for the control unit 970 to perform processing, and the like. The program stored in the memory unit 967 is read and executed by the control unit 970 at a predetermined timing such as when the imaging device 960 is activated. The control unit 970 controls each unit so that the imaging device 960 performs an operation according to a user operation by executing a program.

  In the imaging device configured as described above, the image data processing unit 964 is provided with the functions of the encoding device and the decoding device (encoding method and decoding method) of the present application. For this reason, it is possible to improve the encoding efficiency when transform skipping is performed on blocks having a size other than 4 × 4 pixels. Also, it is possible to decode an encoded stream with improved encoding efficiency when transform skip is performed on a block having a size other than 4 × 4 pixels.

<Application example of scalable coding>
(First system)
Next, a specific usage example of scalable encoded data that has been subjected to scalable encoding (hierarchical encoding) will be described. Scalable encoding is used for selection of data to be transmitted, as in the example shown in FIG.

  In the data transmission system 1000 illustrated in FIG. 32, the distribution server 1002 reads the scalable encoded data stored in the scalable encoded data storage unit 1001, and via the network 1003, the personal computer 1004, the AV device 1005, the tablet This is distributed to the terminal device such as the device 1006 and the mobile phone 1007.

  At that time, the distribution server 1002 selects and transmits encoded data of appropriate quality according to the capability of the terminal device, the communication environment, and the like. Even if the distribution server 1002 transmits unnecessarily high-quality data, the terminal device does not always obtain a high-quality image, and may cause a delay or an overflow. Moreover, there is a possibility that the communication band is unnecessarily occupied or the load on the terminal device is unnecessarily increased. On the other hand, even if the distribution server 1002 transmits unnecessarily low quality data, there is a possibility that an image with sufficient image quality cannot be obtained in the terminal device. Therefore, the distribution server 1002 appropriately reads and transmits the scalable encoded data stored in the scalable encoded data storage unit 1001 as encoded data having an appropriate quality with respect to the capability and communication environment of the terminal device. .

  For example, it is assumed that the scalable encoded data storage unit 1001 stores scalable encoded data (BL + EL) 1011 that is encoded in a scalable manner. The scalable encoded data (BL + EL) 1011 is encoded data including both a base layer and an enhancement layer, and is a data that can be decoded to obtain both a base layer image and an enhancement layer image. It is.

  The distribution server 1002 selects an appropriate layer according to the capability of the terminal device that transmits data, the communication environment, and the like, and reads the data of that layer. For example, the distribution server 1002 reads high-quality scalable encoded data (BL + EL) 1011 from the scalable encoded data storage unit 1001 and transmits it to the personal computer 1004 and the tablet device 1006 with high processing capability as they are. . On the other hand, for example, the distribution server 1002 extracts base layer data from the scalable encoded data (BL + EL) 1011 for the AV device 1005 and the cellular phone 1007 having a low processing capability, and performs scalable encoding. Although it is data of the same content as the data (BL + EL) 1011, it is transmitted as scalable encoded data (BL) 1012 having a lower quality than the scalable encoded data (BL + EL) 1011.

  By using scalable encoded data in this way, the amount of data can be easily adjusted, so that the occurrence of delays and overflows can be suppressed, and unnecessary increases in the load on terminal devices and communication media can be suppressed. be able to. In addition, since scalable encoded data (BL + EL) 1011 has reduced redundancy between layers, the amount of data can be reduced as compared with the case where encoded data of each layer is used as individual data. . Therefore, the storage area of the scalable encoded data storage unit 1001 can be used more efficiently.

  Note that since various devices can be applied to the terminal device, such as the personal computer 1004 to the cellular phone 1007, the hardware performance of the terminal device varies depending on the device. Moreover, since the application which a terminal device performs is also various, the capability of the software is also various. Furthermore, the network 1003 serving as a communication medium can be applied to any communication network including wired or wireless, or both, such as the Internet and a LAN (Local Area Network), for example, and has various data transmission capabilities. Furthermore, there is a risk of change due to other communications.

  Therefore, the distribution server 1002 communicates with the terminal device that is the data transmission destination before starting data transmission, and the hardware performance of the terminal device, the performance of the application (software) executed by the terminal device, etc. Information regarding the capability of the terminal device and information regarding the communication environment such as the available bandwidth of the network 1003 may be obtained. The distribution server 1002 may select an appropriate layer based on the information obtained here.

  Note that the layer extraction may be performed by the terminal device. For example, the personal computer 1004 may decode the transmitted scalable encoded data (BL + EL) 1011 and display a base layer image or an enhancement layer image. Further, for example, the personal computer 1004 extracts the base layer scalable encoded data (BL) 1012 from the transmitted scalable encoded data (BL + EL) 1011 and stores it or transfers it to another device. The base layer image may be displayed after decoding.

  Of course, the numbers of the scalable encoded data storage unit 1001, the distribution server 1002, the network 1003, and the terminal devices are arbitrary. In the above, the example in which the distribution server 1002 transmits data to the terminal device has been described, but the usage example is not limited to this. The data transmission system 1000 may be any system as long as it transmits a scalable encoded data to a terminal device by selecting an appropriate layer according to the capability of the terminal device or a communication environment. Can be applied to the system.

(Second system)
Also, scalable coding is used for transmission via a plurality of communication media, for example, as in the example shown in FIG.

  In the data transmission system 1100 shown in FIG. 33, a broadcasting station 1101 transmits base layer scalable encoded data (BL) 1121 by terrestrial broadcasting 1111. Also, the broadcast station 1101 transmits enhancement layer scalable encoded data (EL) 1122 via an arbitrary network 1112 including a wired or wireless communication network or both (for example, packetized transmission).

  The terminal device 1102 has a reception function of the terrestrial broadcast 1111 broadcasted by the broadcast station 1101, and receives base layer scalable encoded data (BL) 1121 transmitted via the terrestrial broadcast 1111. The terminal apparatus 1102 further has a communication function for performing communication via the network 1112, and receives enhancement layer scalable encoded data (EL) 1122 transmitted via the network 1112.

  The terminal device 1102 decodes the base layer scalable encoded data (BL) 1121 acquired via the terrestrial broadcast 1111 according to, for example, a user instruction, and obtains or stores a base layer image. Or transmit to other devices.

  Also, the terminal device 1102, for example, in response to a user instruction, the base layer scalable encoded data (BL) 1121 acquired via the terrestrial broadcast 1111 and the enhancement layer scalable encoded acquired via the network 1112 Data (EL) 1122 is combined to obtain scalable encoded data (BL + EL), or decoded to obtain an enhancement layer image, stored, or transmitted to another device.

  As described above, scalable encoded data can be transmitted via a different communication medium for each layer, for example. Therefore, the load can be distributed, and the occurrence of delay and overflow can be suppressed.

  Moreover, you may enable it to select the communication medium used for transmission for every layer according to a condition. For example, scalable encoded data (BL) 1121 of a base layer having a relatively large amount of data is transmitted via a communication medium having a wide bandwidth, and scalable encoded data (EL) 1122 having a relatively small amount of data is transmitted. You may make it transmit via a communication medium with a narrow bandwidth. Further, for example, the communication medium for transmitting the enhancement layer scalable encoded data (EL) 1122 is switched between the network 1112 and the terrestrial broadcast 1111 according to the available bandwidth of the network 1112. May be. Of course, the same applies to data of an arbitrary layer.

  By controlling in this way, an increase in load in data transmission can be further suppressed.

  Of course, the number of layers is arbitrary, and the number of communication media used for transmission is also arbitrary. In addition, the number of terminal devices 1102 serving as data distribution destinations is also arbitrary. Furthermore, in the above description, broadcasting from the broadcasting station 1101 has been described as an example, but the usage example is not limited to this. The data transmission system 1100 can be applied to any system as long as it is a system that divides scalable encoded data into a plurality of layers and transmits them through a plurality of lines.

(Third system)
Further, scalable encoding is used for storing encoded data as in the example shown in FIG. 34, for example.

  In the imaging system 1200 illustrated in FIG. 34, the imaging device 1201 performs scalable coding on image data obtained by imaging the subject 1211, and obtains scalable coded data (BL + EL) 1221 as a scalable coded data storage device 1202. To supply.

  The scalable encoded data storage device 1202 stores the scalable encoded data (BL + EL) 1221 supplied from the imaging device 1201 with quality according to the situation. For example, in the normal case, the scalable encoded data storage device 1202 extracts base layer data from the scalable encoded data (BL + EL) 1221, and the base layer scalable encoded data ( BL) 1222. On the other hand, for example, in the case of attention, the scalable encoded data storage device 1202 stores scalable encoded data (BL + EL) 1221 with high quality and a large amount of data.

  By doing so, the scalable encoded data storage device 1202 can store an image with high image quality only when necessary, so that an increase in the amount of data can be achieved while suppressing a reduction in the value of the image due to image quality degradation. And the use efficiency of the storage area can be improved.

  For example, it is assumed that the imaging device 1201 is a surveillance camera. When the monitoring target (for example, an intruder) is not shown in the captured image (in the normal case), the content of the captured image is likely to be unimportant, so reduction of the data amount is given priority, and the image data (scalable coding) Data) is stored in low quality. On the other hand, when the monitoring target appears in the captured image as the subject 1211 (at the time of attention), since the content of the captured image is likely to be important, the image quality is given priority and the image data (scalable) (Encoded data) is stored with high quality.

  Note that whether it is normal time or attention time may be determined, for example, by the scalable encoded data storage device 1202 analyzing an image. Alternatively, the imaging apparatus 1201 may make a determination, and the determination result may be transmitted to the scalable encoded data storage device 1202.

  Note that the criterion for determining whether the time is normal or the time of attention is arbitrary, and the content of the image as the criterion is arbitrary. Of course, conditions other than the contents of the image can also be used as the criterion. For example, it may be switched according to the volume or waveform of the recorded sound, may be switched at every predetermined time, or may be switched by an external instruction such as a user instruction.

  In the above, an example of switching between the normal state and the attention state has been described. However, the number of states is arbitrary, for example, normal, slightly attention, attention, very attention, etc. Alternatively, three or more states may be switched. However, the upper limit number of states to be switched depends on the number of layers of scalable encoded data.

  In addition, the imaging apparatus 1201 may determine the number of scalable coding layers according to the state. For example, in a normal case, the imaging apparatus 1201 may generate base layer scalable encoded data (BL) 1222 with low quality and a small amount of data, and supply the scalable encoded data storage apparatus 1202 to the scalable encoded data storage apparatus 1202. For example, when attention is paid, the imaging device 1201 generates scalable encoded data (BL + EL) 1221 having a high quality and a large amount of data, and supplies the scalable encoded data storage device 1202 to the scalable encoded data storage device 1202. May be.

  In the above, the monitoring camera has been described as an example, but the use of the imaging system 1200 is arbitrary and is not limited to the monitoring camera.

<Ninth Embodiment>
(Other examples of implementation)
In the above, examples of apparatuses and systems to which the present disclosure is applied have been described. However, the present disclosure is not limited thereto, and any configuration mounted on such apparatuses or apparatuses constituting the system, for example, system LSI (Large Scale) Integration) etc., a module using a plurality of processors, etc., a unit using a plurality of modules, etc., a set in which other functions are added to the unit, etc. (that is, a partial configuration of the apparatus) .

(Video set configuration example)
An example of implementing the present disclosure as a set will be described with reference to FIG. FIG. 35 illustrates an example of a schematic configuration of a video set to which the present disclosure is applied.

  In recent years, multi-functionalization of electronic devices has progressed, and in the development and manufacture, when implementing a part of the configuration as sales or provision, etc., not only when implementing as a configuration having one function, but also related In many cases, a plurality of configurations having functions are combined and implemented as a set having a plurality of functions.

  The video set 1300 shown in FIG. 35 has such a multi-functional configuration, and a device having a function relating to image encoding and decoding (either or both of them) can be used for the function. It is a combination of devices having other related functions.

  As shown in FIG. 35, the video set 1300 includes a module group such as a video module 1311, an external memory 1312, a power management module 1313, and a front-end module 1314, and an associated module 1321, a camera 1322, a sensor 1323, and the like. And a device having a function.

  A module is a component having a coherent function by combining several component functions related to each other. The specific physical configuration is arbitrary. For example, a plurality of processors each having a function, electronic circuit elements such as resistors and capacitors, and other devices arranged on a wiring board or the like can be considered. . It is also possible to combine the module with another module, a processor, or the like to form a new module.

  In the case of the example in FIG. 35, the video module 1311 is a combination of configurations having functions related to image processing, and includes an application processor, a video processor, a broadband modem 1333, and an RF module 1334.

  The processor is a configuration in which a configuration having a predetermined function is integrated on a semiconductor chip by an SoC (System On a Chip). For example, there is a processor called a system LSI (Large Scale Integration). The configuration having the predetermined function may be a logic circuit (hardware configuration), a CPU, a ROM, a RAM, and the like, and a program (software configuration) executed using them. , Or a combination of both. For example, a processor has a logic circuit and a CPU, ROM, RAM, etc., a part of the function is realized by a logic circuit (hardware configuration), and other functions are executed by the CPU (software configuration) It may be realized by.

  An application processor 1331 in FIG. 35 is a processor that executes an application related to image processing. The application executed in the application processor 1331 not only performs arithmetic processing to realize a predetermined function, but also can control the internal and external configurations of the video module 1311 such as the video processor 1332 as necessary. .

  The video processor 1332 is a processor having a function relating to image encoding / decoding (one or both of them).

  The broadband modem 1333 is a processor (or module) that performs processing related to wired or wireless (or both) broadband communication performed via a broadband line such as the Internet or a public telephone line network. For example, the broadband modem 1333 digitally modulates data to be transmitted (digital signal) to convert it into an analog signal, or demodulates the received analog signal to convert it into data (digital signal). For example, the broadband modem 1333 can digitally modulate and demodulate arbitrary information such as image data processed by the video processor 1332, a stream obtained by encoding the image data, an application program, setting data, and the like.

  The RF module 1334 is a module that performs frequency conversion, modulation / demodulation, amplification, filter processing, and the like on an RF (Radio Frequency) signal transmitted and received via an antenna. For example, the RF module 1334 generates an RF signal by performing frequency conversion or the like on the baseband signal generated by the broadband modem 1333. Further, for example, the RF module 1334 generates a baseband signal by performing frequency conversion or the like on the RF signal received via the front end module 1314.

  Note that, as indicated by a dotted line 1341 in FIG. 35, the application processor 1331 and the video processor 1332 may be integrated into a single processor.

  The external memory 1312 is a module having a storage device that is provided outside the video module 1311 and is used by the video module 1311. The storage device of the external memory 1312 may be realized by any physical configuration, but is generally used for storing a large amount of data such as image data in units of frames. For example, it is desirable to realize it by a relatively inexpensive and large-capacity semiconductor memory such as a DRAM (Dynamic Random Access Memory).

  The power management module 1313 manages and controls power supply to the video module 1311 (each component in the video module 1311).

  The front-end module 1314 is a module that provides the RF module 1334 with a front-end function (a circuit on a transmitting / receiving end on the antenna side). As illustrated in FIG. 35, the front end module 1314 includes, for example, an antenna unit 1351, a filter 1352, and an amplification unit 1353.

  The antenna unit 1351 has an antenna that transmits and receives radio signals and a peripheral configuration thereof. The antenna unit 1351 transmits the signal supplied from the amplification unit 1353 as a radio signal, and supplies the received radio signal to the filter 1352 as an electric signal (RF signal). The filter 1352 performs a filtering process on the RF signal received via the antenna unit 1351 and supplies the processed RF signal to the RF module 1334. The amplifying unit 1353 amplifies the RF signal supplied from the RF module 1334 and supplies the amplified RF signal to the antenna unit 1351.

The connectivity 1321 is a module having a function related to connection with the outside.
The physical configuration of the connectivity 1321 is arbitrary. For example, the connectivity 1321 has a configuration having a communication function other than the communication standard supported by the broadband modem 1333, an external input / output terminal, and the like.

  For example, the connectivity 1321 is compliant with wireless communication standards such as Bluetooth (registered trademark), IEEE 802.11 (for example, Wi-Fi (Wireless Fidelity, registered trademark)), NFC (Near Field Communication), IrDA (InfraRed Data Association), etc. You may make it have a module which has a function, an antenna etc. which transmit / receive the signal based on the standard. Further, for example, the connectivity 1321 has a module having a communication function compliant with a wired communication standard such as USB (Universal Serial Bus), HDMI (registered trademark) (High-Definition Multimedia Interface), and a terminal compliant with the standard. You may do it. Further, for example, the connectivity 1321 may have other data (signal) transmission functions such as analog input / output terminals.

  The connectivity 1321 may include a data (signal) transmission destination device. For example, the drive 1321 reads / writes data to / from a recording medium such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory (not only a removable medium drive, but also a hard disk, SSD (Solid State Drive) And NAS (Network Attached Storage) etc.). In addition, the connectivity 1321 may include an image or audio output device (a monitor, a speaker, or the like).

  The camera 1322 is a module having a function of capturing a subject and obtaining image data of the subject. Image data obtained by imaging by the camera 1322 is supplied to, for example, a video processor 1332 and encoded.

  The sensor 1323 includes, for example, a voice sensor, an ultrasonic sensor, an optical sensor, an illuminance sensor, an infrared sensor, an image sensor, a rotation sensor, an angle sensor, an angular velocity sensor, a velocity sensor, an acceleration sensor, an inclination sensor, a magnetic identification sensor, an impact sensor, It is a module having an arbitrary sensor function such as a temperature sensor. For example, the data detected by the sensor 1323 is supplied to the application processor 1331 and used by an application or the like.

  The configuration described as a module in the above may be realized as a processor, or conversely, the configuration described as a processor may be realized as a module.

  In the video set 1300 having the above configuration, the present disclosure can be applied to the video processor 1332 as described later. Accordingly, the video set 1300 can be implemented as a set to which the present disclosure is applied.

(Video processor configuration example)
FIG. 36 illustrates an example of a schematic configuration of a video processor 1332 (FIG. 35) to which the present disclosure is applied.

  In the case of the example of FIG. 36, the video processor 1332 receives the video signal and the audio signal, encodes them in a predetermined method, decodes the encoded video data and audio data, A function of reproducing and outputting an audio signal.

  As shown in FIG. 36, the video processor 1332 includes a video input processing unit 1401, a first image enlargement / reduction unit 1402, a second image enlargement / reduction unit 1403, a video output processing unit 1404, a frame memory 1405, and a memory control unit 1406. Have The video processor 1332 includes an encoding / decoding engine 1407, video ES (Elementary Stream) buffers 1408A and 1408B, and audio ES buffers 1409A and 1409B. Further, the video processor 1332 includes an audio encoder 1410, an audio decoder 1411, a multiplexing unit (MUX (Multiplexer)) 1412, a demultiplexing unit (DMUX (Demultiplexer)) 1413, and a stream buffer 1414.

  The video input processing unit 1401 acquires a video signal input from, for example, the connectivity 1321 (FIG. 35) and converts it into digital image data. The first image enlargement / reduction unit 1402 performs format conversion, image enlargement / reduction processing, and the like on the image data. The second image enlargement / reduction unit 1403 performs image enlargement / reduction processing on the image data in accordance with the format of the output destination via the video output processing unit 1404, or is the same as the first image enlargement / reduction unit 1402. Format conversion and image enlargement / reduction processing. The video output processing unit 1404 performs format conversion, conversion to an analog signal, and the like on the image data and outputs the reproduced video signal to, for example, the connectivity 1321 (FIG. 35).

  The frame memory 1405 is a memory for image data shared by the video input processing unit 1401, the first image scaling unit 1402, the second image scaling unit 1403, the video output processing unit 1404, and the encoding / decoding engine 1407. . The frame memory 1405 is realized as a semiconductor memory such as a DRAM, for example.

  The memory control unit 1406 receives the synchronization signal from the encoding / decoding engine 1407, and controls the writing / reading access to the frame memory 1405 according to the access schedule to the frame memory 1405 written in the access management table 1406A. The access management table 1406A is updated by the memory control unit 1406 in accordance with processing executed by the encoding / decoding engine 1407, the first image enlargement / reduction unit 1402, the second image enlargement / reduction unit 1403, and the like.

  The encoding / decoding engine 1407 performs encoding processing of image data and decoding processing of a video stream which is data obtained by encoding the image data. For example, the encoding / decoding engine 1407 encodes the image data read from the frame memory 1405 and sequentially writes the data as a video stream in the video ES buffer 1408A. Further, for example, the video stream is sequentially read from the video ES buffer 1408B, decoded, and sequentially written in the frame memory 1405 as image data. The encoding / decoding engine 1407 uses the frame memory 1405 as a work area in the encoding and decoding. Also, the encoding / decoding engine 1407 outputs a synchronization signal to the memory control unit 1406, for example, at a timing at which processing for each macroblock is started.

The video ES buffer 1408A buffers the video stream generated by the encoding / decoding engine 1407 and supplies the buffered video stream to the multiplexing unit (MUX) 1412.
The video ES buffer 1408B buffers the video stream supplied from the demultiplexer (DMUX) 1413 and supplies the buffered video stream to the encoding / decoding engine 1407.

The audio ES buffer 1409A buffers the audio stream generated by the audio encoder 1410 and supplies it to the multiplexing unit (MUX) 1412.
The audio ES buffer 1409B buffers the audio stream supplied from the demultiplexer (DMUX) 1413 and supplies the buffered audio stream to the audio decoder 1411.

  The audio encoder 1410 converts, for example, an audio signal input from the connectivity 1321 (FIG. 35), for example, and encodes the audio signal using a predetermined method such as an MPEG audio method or an AC3 (Audio Code number 3) method. The audio encoder 1410 sequentially writes an audio stream, which is data obtained by encoding an audio signal, in the audio ES buffer 1409A. The audio decoder 1411 decodes the audio stream supplied from the audio ES buffer 1409B, performs conversion to, for example, an analog signal, and supplies the reproduced audio signal to, for example, the connectivity 1321 (FIG. 35).

  The multiplexing unit (MUX) 1412 multiplexes the video stream and the audio stream. The multiplexing method (that is, the format of the bit stream generated by multiplexing) is arbitrary. At the time of this multiplexing, the multiplexing unit (MUX) 1412 can also add predetermined header information or the like to the bit stream. That is, the multiplexing unit (MUX) 1412 can convert the stream format by multiplexing. For example, the multiplexing unit (MUX) 1412 multiplexes the video stream and the audio stream to convert it into a transport stream that is a bit stream in a transfer format. Further, for example, the multiplexing unit (MUX) 1412 multiplexes the video stream and the audio stream, thereby converting the data into file format data (file data) for recording.

  The demultiplexing unit (DMUX) 1413 demultiplexes the bit stream in which the video stream and the audio stream are multiplexed by a method corresponding to the multiplexing by the multiplexing unit (MUX) 1412. That is, the demultiplexer (DMUX) 1413 extracts the video stream and the audio stream from the bit stream read from the stream buffer 1414 (separates the video stream and the audio stream). That is, the demultiplexer (DMUX) 1413 can convert the stream format by demultiplexing (inverse conversion of the conversion by the multiplexer (MUX) 1412). For example, the demultiplexer (DMUX) 1413 obtains the transport stream supplied from, for example, the connectivity 1321 and the broadband modem 1333 (both in FIG. 35) via the stream buffer 1414 and demultiplexes the transport stream. Can be converted into a video stream and an audio stream. Further, for example, the demultiplexing unit (DMUX) 1413 obtains file data read from various recording media by, for example, the connectivity 1321 (FIG. 35) via the stream buffer 1414, and demultiplexes the file data. It can be converted into a video stream and an audio stream.

  The stream buffer 1414 buffers the bit stream. For example, the stream buffer 1414 buffers the transport stream supplied from the multiplexing unit (MUX) 1412 and, for example, at the predetermined timing or based on a request from the outside, for example, the connectivity 1321 or the broadband modem 1333 (whichever Are also supplied to FIG.

  Further, for example, the stream buffer 1414 buffers the file data supplied from the multiplexing unit (MUX) 1412 and, for example, the connectivity 1321 (FIG. 35) or the like at a predetermined timing or based on an external request or the like. To be recorded on various recording media.

  Furthermore, the stream buffer 1414 buffers the transport stream acquired through, for example, the connectivity 1321 and the broadband modem 1333 (both in FIG. 35), and performs reverse processing at a predetermined timing or based on an external request or the like. The data is supplied to a multiplexing unit (DMUX) 1413.

  In addition, the stream buffer 1414 buffers file data read from various recording media in, for example, the connectivity 1321 (FIG. 35), and the demultiplexing unit at a predetermined timing or based on an external request or the like. (DMUX) 1413.

  Next, an example of the operation of the video processor 1332 having such a configuration will be described. For example, a video signal input from the connectivity 1321 (FIG. 35) or the like to the video processor 1332 is converted into digital image data of a predetermined format such as 4: 2: 2Y / Cb / Cr format by the video input processing unit 1401. The data is sequentially written into the frame memory 1405. This digital image data is read by the first image enlargement / reduction unit 1402 or the second image enlargement / reduction unit 1403, and format conversion to a predetermined method such as 4: 2: 0Y / Cb / Cr method and enlargement / reduction processing are performed. Is written again in the frame memory 1405. This image data is encoded by the encoding / decoding engine 1407 and written as a video stream in the video ES buffer 1408A.

  Also, an audio signal input from the connectivity 1321 (FIG. 35) or the like to the video processor 1332 is encoded by the audio encoder 1410 and written as an audio stream in the audio ES buffer 1409A.

  The video stream of the video ES buffer 1408A and the audio stream of the audio ES buffer 1409A are read and multiplexed by the multiplexing unit (MUX) 1412 and converted into a transport stream or file data. The transport stream generated by the multiplexing unit (MUX) 1412 is buffered in the stream buffer 1414 and then output to the external network via, for example, the connectivity 1321 and the broadband modem 1333 (both of which are shown in FIG. 35). Further, the file data generated by the multiplexing unit (MUX) 1412 is buffered in the stream buffer 1414, and then output to, for example, the connectivity 1321 (FIG. 35) and recorded on various recording media.

  For example, a transport stream input from an external network to the video processor 1332 via the connectivity 1321 or the broadband modem 1333 (both in FIG. 35) is buffered in the stream buffer 1414, and then demultiplexed (DMUX) 1413 is demultiplexed. For example, file data read from various recording media in the connectivity 1321 (FIG. 35) and input to the video processor 1332 is buffered in the stream buffer 1414 and then demultiplexed by the demultiplexer (DMUX) 1413. It becomes. That is, the transport stream or file data input to the video processor 1332 is separated into a video stream and an audio stream by the demultiplexer (DMUX) 1413.

  The audio stream is supplied to the audio decoder 1411 via the audio ES buffer 1409B, decoded, and an audio signal is reproduced. The video stream is written to the video ES buffer 1408B, and then sequentially read and decoded by the encoding / decoding engine 1407, and written to the frame memory 1405. The decoded image data is enlarged / reduced by the second image enlargement / reduction unit 1403 and written to the frame memory 1405. The decoded image data is read out to the video output processing unit 1404, format-converted to a predetermined system such as 4: 2: 2Y / Cb / Cr system, and further converted into an analog signal to be converted into a video signal. Is played out.

  When the present disclosure is applied to the video processor 1332 configured as described above, the present disclosure according to each embodiment described above may be applied to the encoding / decoding engine 1407. That is, for example, the encoding / decoding engine 1407 may have the functions of the encoding device and the decoding device according to the first embodiment. In this way, the video processor 1332 can obtain the same effects as those described above with reference to FIGS.

  Note that in the encoding / decoding engine 1407, the present disclosure (that is, the functions of the image encoding device and the image decoding device according to each embodiment described above) may be realized by hardware such as a logic circuit, It may be realized by software such as an embedded program, or may be realized by both of them.

(Another configuration example of the video processor)
FIG. 37 illustrates another example of a schematic configuration of the video processor 1332 (FIG. 35) to which the present disclosure is applied. In the case of the example of FIG. 37, the video processor 1332 has a function of encoding / decoding video data by a predetermined method.

  More specifically, as shown in FIG. 37, the video processor 1332 includes a control unit 1511, a display interface 1512, a display engine 1513, an image processing engine 1514, and an internal memory 1515. The video processor 1332 includes a codec engine 1516, a memory interface 1517, a multiplexing / demultiplexing unit (MUX DMUX) 1518, a network interface 1519, and a video interface 1520.

  The control unit 1511 controls the operation of each processing unit in the video processor 1332 such as the display interface 1512, the display engine 1513, the image processing engine 1514, and the codec engine 1516.

  As illustrated in FIG. 37, the control unit 1511 includes, for example, a main CPU 1531, a sub CPU 1532, and a system controller 1533. The main CPU 1531 executes a program and the like for controlling the operation of each processing unit in the video processor 1332. The main CPU 1531 generates a control signal according to the program and supplies it to each processing unit (that is, controls the operation of each processing unit). The sub CPU 1532 plays an auxiliary role of the main CPU 1531. For example, the sub CPU 1532 executes a child process such as a program executed by the main CPU 1531, a subroutine, or the like. The system controller 1533 controls operations of the main CPU 1531 and the sub CPU 1532 such as designating a program to be executed by the main CPU 1531 and the sub CPU 1532.

  The display interface 1512 outputs the image data to, for example, the connectivity 1321 (FIG. 35) under the control of the control unit 1511. For example, the display interface 1512 converts image data of digital data into an analog signal, and outputs it to a monitor device or the like of the connectivity 1321 (FIG. 35) as a reproduced video signal or as image data of the digital data.

  Under the control of the control unit 1511, the display engine 1513 performs various conversion processes such as format conversion, size conversion, color gamut conversion, and the like so as to match the image data with hardware specifications such as a monitor device that displays the image. I do.

  The image processing engine 1514 performs predetermined image processing such as filter processing for improving image quality on the image data under the control of the control unit 1511.

  The internal memory 1515 is a memory provided in the video processor 1332 that is shared by the display engine 1513, the image processing engine 1514, and the codec engine 1516. The internal memory 1515 is used, for example, for data exchange performed between the display engine 1513, the image processing engine 1514, and the codec engine 1516. For example, the internal memory 1515 stores data supplied from the display engine 1513, the image processing engine 1514, or the codec engine 1516, and stores the data as needed (eg, upon request). This is supplied to the image processing engine 1514 or the codec engine 1516. The internal memory 1515 may be realized by any storage device, but is generally used for storing a small amount of data such as image data or parameters in units of blocks. It is desirable to realize it by a semiconductor memory such as a static random access memory that has a relatively small capacity (eg, compared to the external memory 1312) but a high response speed.

  The codec engine 1516 performs processing related to encoding and decoding of image data. The encoding / decoding scheme supported by the codec engine 1516 is arbitrary, and the number thereof may be one or plural. For example, the codec engine 1516 may be provided with codec functions of a plurality of encoding / decoding schemes, and may be configured to perform encoding of image data or decoding of encoded data using one selected from them.

  In the example shown in FIG. 37, the codec engine 1516 includes, for example, MPEG-2 Video 1541, AVC / H.2641542, HEVC / H.2651543, HEVC / H.265 (Scalable) 1544, as functional blocks for processing related to the codec. HEVC / H.265 (Multi-view) 1545 and MPEG-DASH 1551 are included.

  MPEG-2 Video 1541 is a functional block that encodes and decodes image data in the MPEG-2 format. AVC / H.2641542 is a functional block that encodes and decodes image data using the AVC method. HEVC / H.2651543 is a functional block that encodes and decodes image data using the HEVC method. HEVC / H.265 (Scalable) 1544 is a functional block that performs scalable encoding and scalable decoding of image data using the HEVC method. HEVC / H.265 (Multi-view) 1545 is a functional block that multi-view encodes or multi-view decodes image data using the HEVC method.

  MPEG-DASH 1551 is a functional block that transmits and receives image data by the MPEG-DASH (MPEG-Dynamic Adaptive Streaming over HTTP) method. MPEG-DASH is a technology for streaming video using HTTP (HyperText Transfer Protocol), and selects and transmits appropriate data from multiple encoded data with different resolutions prepared in segments. This is one of the features. MPEG-DASH 1551 generates a stream conforming to the standard, controls transmission of the stream, and the like. For encoding / decoding of image data, MPEG-2 Video 1541 to HEVC / H.265 (Multi-view) 1545 described above are used. Is used.

  The memory interface 1517 is an interface for the external memory 1312. Data supplied from the image processing engine 1514 or the codec engine 1516 is supplied to the external memory 1312 via the memory interface 1517. The data read from the external memory 1312 is supplied to the video processor 1332 (the image processing engine 1514 or the codec engine 1516) via the memory interface 1517.

  A multiplexing / demultiplexing unit (MUX DMUX) 1518 multiplexes and demultiplexes various data related to images such as a bit stream of encoded data, image data, and a video signal. This multiplexing / demultiplexing method is arbitrary. For example, at the time of multiplexing, the multiplexing / demultiplexing unit (MUX DMUX) 1518 can not only combine a plurality of data into one but also add predetermined header information or the like to the data. Further, in the demultiplexing, the multiplexing / demultiplexing unit (MUX DMUX) 1518 not only divides one data into a plurality of data but also adds predetermined header information or the like to each divided data. it can. That is, the multiplexing / demultiplexing unit (MUX DMUX) 1518 can convert the data format by multiplexing / demultiplexing. For example, the multiplexing / demultiplexing unit (MUX DMUX) 1518 multiplexes the bit stream, thereby transporting a transport stream that is a bit stream in a transfer format and data in a file format for recording (file data). Can be converted to Of course, the inverse transformation is also possible by demultiplexing.

  The network interface 1519 is an interface for, for example, a broadband modem 1333, connectivity 1321 (both are FIG. 35), and the like. The video interface 1520 is an interface for, for example, the connectivity 1321 and the camera 1322 (both are FIG. 35).

  Next, an example of the operation of the video processor 1332 will be described. For example, when a transport stream is received from an external network via, for example, the connectivity 1321 or the broadband modem 1333 (both of which are shown in FIG. 35), the transport stream is multiplexed / demultiplexed (MUX) via the network interface 1519. DMUX) 1518 is demultiplexed and decoded by the codec engine 1516. For example, the image data obtained by decoding by the codec engine 1516 is subjected to predetermined image processing by the image processing engine 1514, subjected to predetermined conversion by the display engine 1513, and connected to, for example, the connectivity 1321 (see FIG. 35) etc., and the image is displayed on the monitor. Further, for example, image data obtained by decoding by the codec engine 1516 is re-encoded by the codec engine 1516, multiplexed by a multiplexing / demultiplexing unit (MUX DMUX) 1518, converted into file data, and video data The data is output to, for example, the connectivity 1321 (FIG. 35) through the interface 1520 and recorded on various recording media.

  Further, for example, encoded data file data obtained by encoding image data read from a recording medium (not shown) by the connectivity 1321 (FIG. 35) or the like is multiplexed / demultiplexed via the video interface 1520. Is supplied to a unit (MUX DMUX) 1518, demultiplexed, and decoded by a codec engine 1516. Image data obtained by decoding by the codec engine 1516 is subjected to predetermined image processing by the image processing engine 1514, subjected to predetermined conversion by the display engine 1513, and, for example, connectivity 1321 via the display interface 1512 (FIG. 35). And the image is displayed on the monitor. Further, for example, image data obtained by decoding by the codec engine 1516 is re-encoded by the codec engine 1516, multiplexed by a multiplexing / demultiplexing unit (MUX DMUX) 1518, and converted into a transport stream, For example, the connectivity 1321 and the broadband modem 1333 (both in FIG. 35) are supplied via the network interface 1519 and transmitted to another device (not shown).

  Note that transfer of image data and other data between the processing units in the video processor 1332 is performed using, for example, the internal memory 1515 and the external memory 1312. The power management module 1313 controls power supply to the control unit 1511, for example.

  When the present disclosure is applied to the video processor 1332 configured as described above, the present disclosure according to each embodiment described above may be applied to the codec engine 1516. That is, for example, the codec engine 1516 may have a functional block that realizes the encoding device and the decoding device according to the first embodiment. Further, for example, by the codec engine 1516 doing this, the video processor 1332 can obtain the same effects as those described above with reference to FIGS. 1 to 17.

  Note that in the codec engine 1516, the present disclosure (that is, the functions of the image encoding device and the image decoding device according to each of the embodiments described above) may be realized by hardware such as a logic circuit, or an embedded program. It may be realized by software such as the above, or may be realized by both of them.

  Two examples of the configuration of the video processor 1332 have been described above, but the configuration of the video processor 1332 is arbitrary and may be other than the two examples described above. The video processor 1332 may be configured as one semiconductor chip, but may be configured as a plurality of semiconductor chips. For example, a three-dimensional stacked LSI in which a plurality of semiconductors are stacked may be used. Further, it may be realized by a plurality of LSIs.

  (Application example for equipment)

  Video set 1300 can be incorporated into various devices that process image data. For example, the video set 1300 can be incorporated in the television device 900 (FIG. 28), the mobile phone 920 (FIG. 29), the recording / reproducing device 940 (FIG. 30), the imaging device 960 (FIG. 31), or the like. By incorporating the video set 1300, the apparatus can obtain the same effects as those described above with reference to FIGS.

  Further, the video set 1300 includes, for example, terminal devices such as the personal computer 1004, the AV device 1005, the tablet device 1006, and the mobile phone 1007 in the data transmission system 1000 in FIG. 32, the broadcasting station 1101 in the data transmission system 1100 in FIG. It can also be incorporated into the terminal device 1102, the imaging device 1201 in the imaging system 1200 of FIG. 34, the scalable encoded data storage device 1202, and the like. By incorporating the video set 1300, the apparatus can obtain the same effects as those described above with reference to FIGS.

  Note that even a part of each configuration of the video set 1300 described above can be implemented as a configuration to which the present disclosure is applied as long as it includes the video processor 1332. For example, only the video processor 1332 can be implemented as a video processor to which the present disclosure is applied. For example, as described above, the processor, the video module 1311, and the like indicated by the dotted line 1341 can be implemented as a processor, a module, or the like to which the present disclosure is applied. Furthermore, for example, the video module 1311, the external memory 1312, the power management module 1313, and the front end module 1314 can be combined and implemented as a video unit 1361 to which the present disclosure is applied. In any case, the same effects as those described above with reference to FIGS. 1 to 17 can be obtained.

  That is, any configuration including the video processor 1332 can be incorporated into various devices that process image data, as in the case of the video set 1300. For example, a video processor 1332, a processor indicated by a dotted line 1341, a video module 1311, or a video unit 1361, a television device 900 (FIG. 28), a mobile phone 920 (FIG. 29), a recording / playback device 940 (FIG. 30), Imaging device 960 (FIG. 31), terminal devices such as personal computer 1004, AV device 1005, tablet device 1006, and mobile phone 1007 in data transmission system 1000 in FIG. 32, broadcast station 1101 and terminal in data transmission system 1100 in FIG. It can be incorporated into the apparatus 1102, the imaging apparatus 1201 in the imaging system 1200 of FIG. 34, the scalable encoded data storage apparatus 1202, and the like. Then, by incorporating any configuration to which the present disclosure is applied, the apparatus can obtain the same effects as those described above with reference to FIGS. 1 to 17 as in the case of the video set 1300. .

  In the present specification, an example in which various types of information such as minimum TU size information and skip TU information are multiplexed with encoded data and transmitted from the encoding side to the decoding side has been described. However, the method for transmitting such information is not limited to such an example. For example, these pieces of information may be transmitted or recorded as separate data associated with the encoded data without being multiplexed with the encoded data. Here, the term “associate” means that an image (which may be a part of an image such as a slice or a block) included in the bitstream and information corresponding to the image can be linked at the time of decoding. Means. That is, the information may be transmitted on a transmission path different from the encoded data. The information may be recorded on a recording medium different from the encoded data (or another recording area of the same recording medium). Furthermore, the information and the encoded data may be associated with each other in an arbitrary unit such as a plurality of frames, one frame, or a part of the frame.

  In this specification, the system means a set of a plurality of components (devices, modules (parts), etc.), and it does not matter whether all the components are in the same housing. Accordingly, a plurality of devices housed in separate housings and connected via a network and a single device housing a plurality of modules in one housing are all systems. .

  The effects described in this specification are merely examples and are not limited, and may have other effects.

  Embodiments of the present disclosure are not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present disclosure.

  For example, the present disclosure can also be applied to an encoding device or a decoding device of an encoding method other than the HEVC method that can perform transform skip.

  In addition, the present disclosure also relates to a case where an encoded stream is received via a network medium such as satellite broadcasting, cable TV, the Internet, or a mobile phone, or processed on a storage medium such as an optical, magnetic disk, or flash memory The present invention can be applied to an encoding device and a decoding device used in the above.

  Furthermore, the present disclosure can take a cloud computing configuration in which one function is shared by a plurality of devices via a network and is jointly processed.

  In addition, each step described in the above flowchart can be executed by being shared by a plurality of apparatuses in addition to being executed by one apparatus.

  Further, when a plurality of processes are included in one step, the plurality of processes included in the one step can be executed by being shared by a plurality of apparatuses in addition to being executed by one apparatus.

  In addition, the present disclosure can have the following configurations.

(1)
A setting unit that sets a flat matrix as a default value of a quantization matrix of a block having a size that can be transformed and skipped other than 4 × 4 pixels;
A decoding apparatus comprising: a predicted image of an image and an inverse quantization unit that inversely quantizes a difference quantization value of the image using a default value of the quantization matrix set by the setting unit.
(2)
An inverse orthogonal transform unit that performs inverse orthogonal transform on the orthogonal transform coefficient of the difference in units of orthogonal transform blocks;
The transform skippable size is the minimum size of the orthogonal transform block,
The decoding apparatus according to (1), wherein the inverse quantization unit is configured to inversely quantize a quantization value of the difference orthogonal transform coefficient to generate the difference orthogonal transform coefficient.
(3)
The setting unit is configured to set a flat matrix as a default value of a quantization matrix of a block of the minimum size of the orthogonal transform block based on information representing the minimum size of the orthogonal transform block (2) The decoding device according to 1.
(4)
The decoding apparatus according to (1), wherein the transform skippable size is a size equal to or smaller than a predetermined size.
(5)
The setting unit is configured to set a flat matrix as a default value of a quantization matrix of a block having a size equal to or smaller than the predetermined size based on the information representing the predetermined size. Decoding device.
(6)
The decryption device
A setting step for setting a flat matrix as a default value of a quantization matrix of a block having a size other than 4 × 4 pixels that can be transformed;
A decoding method comprising: using a default value of the quantization matrix set by the processing of the setting step, an inverse quantization step of inversely quantizing a predicted image of the image and a quantization value of the difference of the image.
(7)
A setting unit that sets a flat matrix as a default value of a quantization matrix of a block having a size that can be transformed and skipped other than 4 × 4 pixels;
An encoding apparatus comprising: a predicted image of a picture and a quantizer that quantizes a difference between the pictures using a default value of the quantization matrix set by the setting unit.
(8)
An orthogonal transform unit that performs orthogonal transform on the difference in units of orthogonal transform blocks and generates orthogonal transform coefficients;
The transform skippable size is the minimum size of the orthogonal transform block,
The encoding device according to (7), wherein the quantization unit is configured to quantize the orthogonal transform coefficient generated by the orthogonal transform unit.
(9)
The encoding device according to (8), further including: a transmission unit that transmits information representing a minimum size of the orthogonal transform block.
(10)
The encoding device according to (7), wherein the transform skippable size is a size equal to or smaller than a predetermined size.
(11)
The encoding device according to (10), further including a transmission unit that transmits information representing a predetermined size.
(12)
The encoding device
A setting step for setting a flat matrix as a default value of a quantization matrix of a block having a size other than 4 × 4 pixels that can be transformed;
A quantization step and a coding method for quantizing a difference between a predicted image of the image and the image using a default value of the quantization matrix set by the processing of the setting step.

  DESCRIPTION OF SYMBOLS 10 encoding apparatus, 13 transmission part, 34 orthogonal transformation part, 35 quantization part, 51 list setting part, 110 decoding apparatus, 133 dequantization part, 134 inverse orthogonal transformation part

Claims (9)

When at least one of the case where the predetermined scaling list is not used and when the block size of the transform block to which the transform skip is applied is larger than the 4 × 4 block size is satisfied, the block size of the transform block is set. A quantization unit that quantizes the transform block to generate a quantized value using a corresponding flat scaling list;
An encoding device comprising: an encoding unit that encodes the quantization value generated by the quantization unit. The quantization unit, when the block size of the transform block the transform skip is applied is 8 × 8 block size, using a flat scaling list of 8 × 8, the transform skip is applied the encoding apparatus according to claim 1, the transform block to generate the quantized value by quantizing the. The quantization unit, when the block size of the transform block the transform skip is applied is 16 × 16 block size, using a flat scaling list of 16 × 16, the transform skip is applied the encoding apparatus according to claim 1, the transform block to generate the quantized value by quantizing the. The quantization unit, when the block size of the transform block the transform skip is applied is 32 × 32 block size, using a flat scaling list of 32 × 32, the transform skip is applied the encoding apparatus according to claim 1, the transform block to generate the quantized value by quantizing the. A determination unit that determines a block size of the transform block to be larger than a 4 × 4 block size and determines whether to apply transform skip to the transform block;
When the quantization unit does not use a predetermined scaling list, and the determination unit makes the block size of the transform block larger than the 4 × 4 block size, and performs transform skip on the transform block. The quantized value is generated by quantizing the transform block using a flat scaling list corresponding to the block size of the transform block when at least one of cases where it is determined to be applied is established. The encoding device described in 1. When the transform skip is performed , the quantization unit generates the quantized value by quantizing a residual between an input image and a predicted image of the input image as the transform block , and the transform skip Is not performed, the orthogonal transform coefficient is quantized to generate the quantized value,
The encoding device according to claim 1, wherein the encoding unit encodes the quantized value generated by the quantization unit. The encoding device according to claim 1, wherein the transform block is a block obtained by recursively dividing a coding block into four. A determination unit for determining whether to use the predetermined scaling list based on a flag indicating whether to use the predetermined scaling list;
The quantization unit, when it is determined not using the predetermined scaling list by the determination unit, and the block size of the transform block the transform skip is applied is greater than the 4 × 4 block size If at least one is established when, using said flat scaling list corresponding to the block size of the transform block, the encoding according to the transform block in claim 1 to generate the quantized value by quantizing apparatus. Encoding device,
When at least one of the case where the predetermined scaling list is not used and when the block size of the transform block to which the transform skip is applied is larger than the 4 × 4 block size is satisfied, the block size of the transform block is set. A quantization step of quantizing the transform block to generate a quantized value using a corresponding flat scaling list;
An encoding step that encodes the quantized value generated by the process of the quantization step.

Images