JP6472394B2 - Control device and writing device - Google Patents

Description

  The present invention relates to a control device and a writing device.

  In electronic control units mounted on vehicles, electric actuators such as motors and solenoids are widely used to convert electrical signals into mechanical motion and hydraulic pressure as various control objects are electronically controlled. A semiconductor integrated circuit (IC) is used to drive these electric actuators. A control circuit including a drive circuit, an analog circuit, a digital circuit, and the like is disposed on the same chip of the semiconductor integrated circuit.

  Many analog circuits mounted on semiconductor devices have their characteristics greatly changed due to various factors, and there is a possibility that they are out of the allowable range in the specification. As a countermeasure, there is a technique of trimming temperature-dependent characteristics before mass production.

In order to store the trimming data in the semiconductor device, a nonvolatile memory such as EEPROM or FLASH is generally used. (For example, see Patent Document 1)
In addition, due to the miniaturization of elements due to semiconductor manufacturing technology and the accompanying reduction in power supply voltage, variations in the characteristics of elements (transistors, capacitors, etc.) constituting analog circuits are increasing. For this reason, it is necessary to reduce the element size and suppress the characteristic variation of the element, and because the number of analog circuit blocks mounted on one semiconductor device is increased, trimming bits necessary for one semiconductor device are increased. The number is increasing.

JP 2004-200327 A

  The drive circuit is composed of a power MOS such as LDMOS (Laterally Diffused MOS), the drive voltage is several tens to several hundreds V, the drive current is about several A, and the drive circuit is formed by heat generation due to loss in the drive circuit. The temperature of the entire mounted IC rises.

  Depending on the on-resistance of the power MOS of the driving circuit and the mounting state of the semiconductor device on which the driving circuit is mounted, for example, the on-resistance is 0.1Ω, the thermal resistance is 10 ° C./W, the driving current is 10 A, and the driving circuit is constant In this case, the temperature rises by 100 ° C.

  On the other hand, if data is left in a nonvolatile memory such as EEPROM, FLASH, or OTP (One Time Programmable) memory, 0 data becomes 1 data or 1 data becomes 0 data. There is a retention failure mode. It is known that these data corruption occurs due to extraction of electrons from the floating gate (charge loss), is greatly affected by heat, and the data retention characteristics deteriorate as the temperature increases.

  Therefore, there is a concern that the trimming data stored in the nonvolatile memory may be lost due to heat.

  An object of the present invention is to provide a control device and a writing device that can prevent trimming data stored in a nonvolatile memory from being lost due to heat.

In order to achieve the above object, an example of the present invention is a control device having a first semiconductor device and a second semiconductor device , wherein the first semiconductor device includes a drive circuit for driving a load, a register A first nonvolatile memory that stores ID data indicating information for identifying the first semiconductor device, and the ID data is transmitted to the second semiconductor device, and trimming data corresponding to the ID data is transmitted. A first interface circuit received from the second semiconductor device and stored in the register; and an analog circuit adjusted based on the trimming data stored in the register , the second semiconductor device comprising: Storing the trimming data corresponding to the ID data and disposing the trimming data away from the driving circuit; and the first interface circuit. Corresponding to the ID data received from, and a second interface circuit for transmitting said trimming data stored in the second nonvolatile memory to the first interface circuit.

  According to the present invention, it is possible to prevent the trimming data stored in the nonvolatile memory from being lost due to heat. Problems, configurations, and effects other than those described above will be clarified by the following description of embodiments.

It is a block diagram which shows the structure of the control apparatus which is the 1st Embodiment of this invention. It is an example of the writing flow of the trimming data by the writing apparatus of embodiment shown in FIG. It is an example of the analog circuit of embodiment shown in FIG. It is an example of the trimming circuit of embodiment shown in FIG. It is an example of the block diagram which shows the structure of the load drive by the control apparatus of embodiment shown in FIG. It is a modification of embodiment shown in FIG. It is a block diagram which shows the structure of the semiconductor device which is the 2nd Embodiment of this invention, and a control apparatus using the same. It is an example of the code specification of ID data of embodiment shown in FIG. 1 and FIG. It is a block diagram which shows the structure of the writing apparatus shown in FIG. 1 and FIG.

  Hereinafter, the configuration and operation of the control device (vehicle-mounted electronic control unit) according to the first to second embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same element and the overlapping description is abbreviate | omitted.

(First embodiment)
In the first embodiment of the present invention, it is possible to avoid the use of a non-volatile memory having a data retention failure mode at a high temperature as a trimming data storage destination of a semiconductor device having a drive circuit, and to improve reliability. The configuration and operation of the apparatus and the control apparatus using the apparatus will be described.

  FIG. 1 is a diagram showing an overall configuration of a control device 100 according to an embodiment of the present invention.

  A control device 100 shown in FIG. 1 includes a semiconductor device 1 (first semiconductor device) and a semiconductor device 2 (second semiconductor device). The semiconductor device 1 includes a drive circuit 11 that drives a load, a nonvolatile memory 12, a register 13, an analog circuit 14, and an interface circuit 15, and holds (stores) ID data in the nonvolatile memory 12 of the semiconductor device 1. Here, the ID data is information for identifying the semiconductor device 1 (first semiconductor device).

  The semiconductor device 2 includes a nonvolatile memory 21 and an interface circuit 22. The trimming data of the analog circuit 14 corresponding to the ID data of the semiconductor device 1 is held in the nonvolatile memory 21 of the semiconductor device 2 by the writing device 3 for the nonvolatile memory 21 of the semiconductor device 2. The trimming data of the analog circuit 14 is held in the register 13 of the semiconductor device 1 by the communication means 4 between the interface circuit 15 of the semiconductor device 1 and the interface circuit 22 of the semiconductor device 2. The analog circuit 14 performs trimming using the trimming data held in the register 13.

  In other words, the interface circuit 15 (first interface circuit) transmits ID data stored in the nonvolatile memory 12 (first nonvolatile memory) to the interface circuit 22 (second interface circuit). The interface circuit 22 receives ID data from the interface circuit 15, transmits the received ID data to the writing device 3, receives trimming data corresponding to the ID data from the writing device 3, and stores the received trimming data in a nonvolatile memory 21 (second non-volatile memory). The interface circuit 22 transmits trimming data stored in the nonvolatile memory 21 to the interface circuit 15. The interface circuit 15 receives trimming data corresponding to the ID data from the interface circuit 22 and stores it in the register 13. The analog circuit 14 is adjusted based on trimming data stored in the register 13.

  As an example, the writing device 3 includes a storage device 31 and a communication device 32 as shown in FIG. The storage device 31 stores ID data indicating information for identifying the semiconductor device 1 (first semiconductor device) and trimming data used for the semiconductor device 1 in association with each other. Note that the storage device 31 may store ID data of a semiconductor device different from the semiconductor device 1 and trimming data used for the semiconductor device in association with each other in the table 31a. The communication device 31 receives the ID data from the semiconductor device 2 (second semiconductor device), reads the trimming data corresponding to the ID data from the table 31a, transmits the read trimming data to the semiconductor device 2, and transmits the trimming data to the semiconductor device 2. Is stored in the non-volatile memory 21.

  FIG. 3 is a configuration diagram of a step-down regulator 14a which is an example of the analog circuit 14 shown in FIG. The step-down regulator 14a includes an amplifier 142, a PMOS 141 (P-channel Metal Oxide Semiconductor), a resistor R1, and a resistor R2 between the power supply VB and the internal power supply VDD. The reference voltage VREF generated by the reference voltage generation circuit 14 b that is another analog circuit is input to the inverting input terminal (−) of the amplifier 142. The output voltage VDD of the step-down regulator 14a is as follows.

VDD = (1 + R1 / R2) × VREF (1)
Here, the resistor R1 and the resistor R2 constitute a trimming circuit 143. The decoder circuit 144 inputs the selection signal SEL obtained by decoding the trimming signal TRIM to the trimming circuit 143.

  FIG. 4 shows a circuit example of the trimming circuit 143 shown in FIG. The resistor R1 and the resistor R2 are composed of a plurality of resistors r1 to r (n) connected in series.

  Corresponding to the selection signal SEL, the switches SW (SW0 to SW7) are turned on and the resistance values of the resistors R1 and R2 can be adjusted, and the output voltage VDD is adjusted according to the equation (1) ( Trimming).

  Next, the manufacturing process of the control apparatus 100 shown in FIG. 1 is demonstrated using FIG. FIG. 2 is a diagram illustrating an example of a writing flow of trimming data of the analog circuit 14 by the writing device 3.

  The semiconductor device 1 and the semiconductor device 2 shown in FIG. 1 include an interface circuit for communicating with the outside of the semiconductor device using a protocol such as SPI (Serial Peripheral Interface), CAN (Controller Area Network), or JTAG (Joint Test Action Group). 15 and 22.

  The writing device 3 is connected to the interface circuit 22 of the control device 100 (step S10), and the ID data is read from the nonvolatile memory 12 of the semiconductor device 1 via the communication means 4 between the semiconductor device 1 and the semiconductor device 2. (Step S20). The ID data is used as information for identifying the semiconductor device 1.

  FIG. 8 shows an example of the code specification of ID data. The semiconductor device 1 can be identified by assigning the year, month, day, lot number, and chip number when the trimming data of the analog circuit 14 mounted on the semiconductor device 1 is acquired, and the required number of memory bits. Is 34 bits. Further, for example, in the code specification, the year, month and day information is eliminated, and the semiconductor device 1 is identified only by the lot number and the chip number, so that the necessary number of memory bits can be further reduced.

  From the above, the required number of memory bits is about 40 bits or less, and the required number of memory bits is not large. Therefore, the non-volatile memory 12 of the semiconductor device 1 for storing ID data is not an EEPROM, FLASH, OTP, etc. using a floating gate that may cause a data retention failure at the above-described high temperature, but is inferior in memory integration. However, a fuse type PROM (Programmable ROM) may be used.

  The fuse type PROM has a fuse made of silicon or metal, and individual bits can be changed from 0 to 1 or 1 to 0 by selectively burning the fuse with a dedicated writing device. Once the bit content is changed, it cannot be restored, and data retention failure at high temperatures can be avoided.

  Returning to FIG. 2, the trimming data of the analog circuit 14 obtained by using an IC tester or the like at the time of manufacturing the semiconductor device 1 corresponding to the ID data read by the writing device 3 is written in the nonvolatile memory 21 of the semiconductor device 2 (step S30). ). After the writing is completed, the writing device 3 is disconnected from the control device 100 (step S40).

  The connection destination of the writing device 3 is not limited to the interface circuit 22 of the semiconductor device 2 shown in FIG. 1, but the interface circuit 15 of the semiconductor device 1 or the interface circuit 15 of the semiconductor device 1 and the interface of the semiconductor device 2. In addition to the circuit 22, another interface circuit may be provided in the semiconductor device 1 or the semiconductor device 2 to be connected.

  Next, the operation of the control device 100 shown in FIG. 1 will be described with reference to FIG. FIG. 5 is a diagram illustrating a configuration when the control device 100 drives the load 5. Unlike the above-described manufacturing process of the control device 100, the writing device 3 is not connected to the control device 100.

  An operation when the load 5 such as an electric actuator such as a motor or a solenoid is driven by the drive circuit 11 of the semiconductor device 1 will be described.

  After the semiconductor device 1 is activated, when the semiconductor device 2 has been activated and the communication means 4 can be used, the trimming data of the analog circuit 14 of the semiconductor device 1 already stored in the nonvolatile memory 21 of the semiconductor device 2 is used as an interface circuit. The data is downloaded to the register 13 of the semiconductor device 1 using 22 and 15.

  Thereafter, the trimming data of the analog circuit 14 stored in the register 13 is referred to by the analog circuit 14 via the internal bus in the semiconductor device 1, so that the trimming of the analog circuit 14 is reflected.

  On the other hand, when the load 5 is driven by the drive circuit 11 of the semiconductor device 1, the temperature of the semiconductor device 1 rises during driving due to heat generated by the loss in the drive circuit 11 as described above. The amount of memory mounted on the nonvolatile memory 12 mounted on the semiconductor device 1 is only the ID data of the semiconductor device 1, and the amount of mounted nonvolatile memory can be reduced. As described above, it is also possible to apply a nonvolatile memory such as a fuse-type PROM that can avoid data retention failure at high temperatures.

  As described above, according to this embodiment, since the nonvolatile memory 21 is separated from the drive circuit 11, it is possible to prevent the trimming data stored in the nonvolatile memory 21 from being lost due to heat.

  That is, it is possible to avoid the use of a nonvolatile memory having a data retention failure mode at a high temperature as a trimming data storage destination of a semiconductor device having a drive circuit, and to improve the reliability of the semiconductor device and a control device using the same. Can do.

(Modification)
FIG. 6 is a diagram showing a modification of the embodiment shown in FIG. In this modification, the semiconductor device 1 and the semiconductor device 2 are separate control devices as the control device 100 and the control device 200, respectively.

  At this time, the control device 100 and the control device 200 include the communication unit 4. The semiconductor device 1 includes drive circuits 111 to 11n, and the drive circuits 111 to 11n drive the loads 51 to 5n, respectively. As an example, the semiconductor device 2 includes a CPU 23 (Central Processing Unit).

  In the configuration shown in FIG. 6, similarly to the configuration shown in FIG. 5, it is possible to avoid the use of a nonvolatile memory having a data retention failure mode at a high temperature as a trimming data storage destination of a semiconductor device having a drive circuit. And the reliability of the control apparatus using the same can be improved.

(Second Embodiment)
FIG. 7 is a diagram showing an overall configuration of the control device 100 according to the second embodiment of the present invention. A control device 100 shown in FIG. 7 includes a semiconductor device 1 and a semiconductor device 2. The semiconductor device 1 is arranged at a place where the use temperature is high, and the semiconductor device 2 is arranged at a place where the use temperature is low.

  In other words, the semiconductor device 1 (first semiconductor device) is disposed at a higher temperature than the semiconductor device 2 (second semiconductor device). Note that the semiconductor device 1 of the present embodiment does not include the drive circuit 11 shown in FIG.

  The semiconductor device 1 includes a nonvolatile memory 12, a register 13, an analog circuit 14, and an interface circuit 15, and holds ID data in the nonvolatile memory 12 of the semiconductor device 1.

  The semiconductor device 2 includes a nonvolatile memory 21 and an interface circuit 22. The trimming data of the analog circuit 14 corresponding to the ID data of the semiconductor device 1 is held in the nonvolatile memory 21 of the semiconductor device 2 by the writing device 3 for the nonvolatile memory 21 of the semiconductor device 2. The trimming data of the analog circuit 14 is held in the register 13 of the semiconductor device 1 by the communication means 4 between the interface circuit 15 of the semiconductor device 1 and the interface circuit 15 of the semiconductor device 2. The analog circuit 14 performs trimming using the trimming data held in the register 13.

  As a result, it is possible to avoid the use of a nonvolatile memory having a data retention failure mode at a high temperature as a trimming data storage destination of the semiconductor device 1 arranged at a high usage temperature, and a semiconductor device and a control device using the same Reliability can be improved.

  In addition, this invention is not limited to above-described embodiment, Various modifications are included. For example, the above-described embodiment has been described in detail for easy understanding of the present invention, and is not necessarily limited to the one having all the configurations described. Further, a part of the configuration of an embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of an embodiment. Moreover, it is possible to add / delete / replace other configurations for a part of the configurations of the embodiments.

  In addition, control lines and signal lines are those that are considered necessary for the explanation, and not all control lines and signal lines are necessarily shown in the product.

  Further, each of the above-described configurations, functions, and the like may be realized by hardware by designing a part or all of them with, for example, an integrated circuit. Each of the above-described configurations, functions, and the like may be realized by software by interpreting and executing a program that realizes each function by the processor. Information such as programs, tables, and files for realizing each function can be stored in a recording device such as a memory, a hard disk, or an SSD (Solid State Drive), or a recording medium such as an IC card, an SD card, or a DVD.

  Further, since the drawings are simplified, the technical scope of the present invention should not be interpreted narrowly based on the description of the drawings.

  In addition, the following aspects may be sufficient as embodiment of this invention.

  (1) The semiconductor device includes a first semiconductor device and a second semiconductor device, and the first semiconductor device includes a drive circuit, a first nonvolatile memory, a register, an analog circuit, and a first interface circuit, ID (Identification Data) data is held in the first nonvolatile memory of the first semiconductor device, and the second semiconductor device includes a second nonvolatile memory and a second interface circuit, The trimming data of the analog circuit corresponding to the ID data of the first semiconductor device is transferred to the second nonvolatile memory of the second semiconductor device by the writing device for the second nonvolatile memory of the semiconductor device. Holding and by means of communication between the first interface circuit of the first semiconductor device and the second interface circuit of the second semiconductor device, An analog circuit trimming data is held in the register of the first semiconductor device and used as trimming data for the analog circuit, and a control device using the semiconductor device.

  (2) Consists of a first semiconductor device and a second semiconductor device, wherein the first semiconductor device is disposed at a high use temperature, and the second semiconductor device is disposed at a low use temperature. The first semiconductor device includes a first nonvolatile memory, a register, an analog circuit, and a first interface circuit, and ID data is stored in the first nonvolatile memory of the first semiconductor device. The second semiconductor device includes a second nonvolatile memory and a second interface circuit, and the first semiconductor device writes to the second nonvolatile memory by the first nonvolatile memory. Trimming data of the analog circuit corresponding to ID data of the semiconductor device is held in the second non-volatile property of the second semiconductor device, and the first interface of the first semiconductor device is retained. By means of communication between the face circuit and the second interface circuit of the second semiconductor device, trimming data of the analog circuit is held in the register of the first semiconductor device and used as trimming data of the analog circuit. A semiconductor device and a control device using the same.

  (3) The semiconductor device according to (1) or (2) and a control device using the semiconductor device, wherein the second semiconductor device includes a CPU (Central Processing Unit).

DESCRIPTION OF SYMBOLS 1, 2 ... Semiconductor device 3 ... Writing device 4 ... Communication means 5, 51, 5n ... Load 11, 111, 11n ... Drive circuit 12, 21 ... Nonvolatile memory 13 ... Register 14 ... Analog circuit 14a ... Step-down regulator (analog circuit) )
14b ... Reference voltage generation circuit (analog circuit)
141 ... PMOS
142 ... Amplifier 143 ... Trimming circuit 144 ... Decoder circuit 15, 22 ... Interface circuit 23 ... CPU (Central Processing Unit)
DESCRIPTION OF SYMBOLS 100, 200 ... Control device VB ... Power supply GND ... Ground VDD ... Internal power supply SEL ... Selection signal TRIM ... Trimming signal VREF ... Reference voltage SW0-SW7 ... Switch R1, R2, r1-r (n) ... Resistance

Claims (5)

A control device having a first semiconductor device and a second semiconductor device ,
The first semiconductor device includes:
A drive circuit for driving a load;
Registers,
A first nonvolatile memory for storing ID data indicating information for identifying the first semiconductor device;
A first interface circuit that transmits the ID data to the second semiconductor device, receives trimming data corresponding to the ID data from the second semiconductor device , and stores the trimming data in the register;
An analog circuit adjusted based on the trimming data stored in the register ,
The second semiconductor device is
Storing the trimming data corresponding to the ID data, and a second non-volatile memory disposed away from the drive circuit;
A second interface circuit corresponding to the ID data received from the first interface circuit and transmitting the trimming data stored in the second nonvolatile memory to the first interface circuit. A control device characterized by. The control device according to claim 1,
The control device, wherein the first nonvolatile memory is a fuse type PROM . The control device according to claim 2,
The first interface circuit includes:
Transmitting the ID data stored in the first nonvolatile memory to the second interface circuit;
The second interface circuit includes:
The ID data is received from the first interface circuit, the received ID data is transmitted to a writing device, the trimming data corresponding to the ID data is received from the writing device, and the received trimming data is sent to the writing device. It memorize | stores in a 2nd non-volatile memory. The control apparatus characterized by the above-mentioned. The control device according to claim 1 ,
The first semiconductor device includes:
The control device is arranged at a temperature higher than that of the second semiconductor device. A writing device connected to the control device according to claim 1,
A memory device for storing in association with said trimming data used for the first semiconductor device and the ID data indicating the information identifying the first semiconductor device,
Receiving the ID data, corresponding to said ID data received read the trimming data from said storage device, said sending the trimming data read in the second of the semiconductor device the second semiconductor device first A communication device stored in the nonvolatile memory of 2 ;
A writing device comprising:

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