JP6462535B2 - High frequency semiconductor device - Google Patents

Description

  Embodiments described herein relate generally to a high-frequency semiconductor device.

  When the size of the semiconductor chip mounted on the high-frequency semiconductor device is increased, it is necessary to secure a gap corresponding to the scrub stroke in order to securely bond the chip to the package by scrubbing. For this reason, the distance between the inner end of the package signal terminal and the semiconductor chip is increased. As a result, the bonding wire becomes long.

  A load impedance viewed from a microwave integrated circuit (MMIC) mounted on a semiconductor chip is designed on the assumption of, for example, around 50Ω.

  When the MMIC and the package signal terminal are connected by a bonding wire, the load impedance viewed from the MMIC is shifted from 50Ω. The deviation in impedance from 50Ω increases as the frequency increases.

Patent No. 5439415

  Provided is a high-frequency semiconductor device capable of matching a connection between an MMIC and a package signal terminal in a wide band.

  The high-frequency semiconductor device according to the embodiment includes a semiconductor chip, a package, a relay substrate, a first bonding wire, and a second bonding wire. The semiconductor chip is provided with an MMIC. The package includes a metal plate, an insulator frame portion disposed on the metal plate so as to surround the semiconductor chip, and a package signal terminal provided on the insulator frame portion. When the package signal terminal is connected to a 50Ω system, the load impedance viewed from the inner end of the package signal terminal is capacitive. The relay substrate is disposed on the metal plate between the semiconductor chip and the package signal terminal, and has a transmission line. The first bonding wire connects the first electrode of the MMIC and the first end of the transmission line. The second bonding wire connects the second end of the transmission line opposite to the first end and the internal end of the package signal terminal. The inductance of the second bonding wire is larger than the inductance of the first bonding wire.

1A is a schematic perspective view of the high-frequency semiconductor device according to the first embodiment, FIG. 1B is a schematic plan view, and FIG. 1C is a schematic cross-sectional view taken along the line AA. . 1 is an equivalent circuit diagram of a high-frequency semiconductor device according to a first embodiment. 3A is a Smith diagram showing the load impedance as viewed from the inner end of the package signal terminal in the first embodiment, and FIG. 3B is a view from the connection position between the second bonding wire and the transmission line of the relay substrate. FIG. 3C is a Smith diagram of the load impedance viewed from the connection position between the transmission line of the relay substrate and the first bonding wire, and FIG. 3D is a diagram of the first bonding wire and the semiconductor chip. It is a Smith figure of the load impedance seen from the connection position with the 1st electrode. FIG. 4A is a schematic diagram showing an example of the conductive portion of the package signal terminal, and FIG. 4B is a Smith diagram showing the load impedance. It is a graph showing the reflection loss dependence with respect to the frequency of 1st Embodiment. 6A is a schematic cross-sectional view of the high-frequency semiconductor device according to the first comparative example, FIG. 6B is a Smith diagram showing the load impedance, and FIG. 6C is the load impedance when the bonding wire is lengthened. FIG. FIG. 7A is a Smith diagram showing the load impedance of the high-frequency semiconductor device according to the second comparative example, and FIG. 7B is a graph showing the reflection loss dependency on the frequency. It is a schematic cross section of the high frequency semiconductor device concerning a 2nd embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
1A is a schematic perspective view of the high-frequency semiconductor device according to the first embodiment, FIG. 1B is a schematic plan view, and FIG. 1C is a schematic cross-sectional view taken along the line AA. .
The high-frequency semiconductor device 10 includes a semiconductor chip 20, a package 30, a relay substrate 40, a first bonding wire 60, and a second bonding wire 70.

  The semiconductor chip 20 is provided with an MMIC. The MMIC includes a field effect transistor including a HEMT (High Electron Mobility Transistor) and a matching circuit. The matching circuit can include a transmission line, an inductor, a capacitor, and the like.

  The semiconductor chip 20 includes a substrate and a stacked body provided on the substrate. For example, if the substrate is SiC and the laminate is a gallium nitride material, a microwave to millimeter wave band MMIC amplifier can be configured.

  The package 30 includes a metal plate 32, an insulator frame portion 34 disposed on the metal plate 32 so as to surround the semiconductor chip 20, and a (first) package signal terminal 36 provided on the insulator frame portion 34. And including. The package signal terminal 36 includes a conductive portion 36a and a lead 36b provided on the conductive portion 36a. When the package signal terminal 36 is connected to the signal system at 50Ω, the load impedance viewed from the internal end 36c is capacitive. When the package signal terminal 36 is an input terminal, the load is a high-frequency signal source having an internal impedance of 50Ω and a transmission line having a characteristic impedance of 50Ω.

  The insulator frame 34 can be made of alumina, aluminum nitride, or the like, for example. The metal plate 32 can be CuMo, CuW, or the like. The insulator frame portion 34 and the metal plate 32 are joined using a silver solder or the like.

  The conductive portion 36a and the lead 36b of the package signal terminal 36 are set to have a width of the lead 36b of 0.2 mm and a width of the conductive portion 36a of 0.4 mm or the like so as to be securely bonded using silver solder or the like. The thickness of the insulator frame 34 is 0.4 to 0.6 mm or the like.

  The relay substrate 40 includes a dielectric 42 and a transmission line 44 provided on the dielectric 42. The relay substrate 40 is disposed on the metal plate 32 so as to be between the semiconductor chip 20 and the package signal terminal 36 in the insulator frame portion 34.

  In the case where the semiconductor chip 20 is a HEMT multistage amplifier, the planar size thereof is as large as 3 mm × 3 mm, for example. In the case where the semiconductor chip 20 having a large area is joined to the metal plate 32 using a solder material such as AuSb, it is preferable that the gap between the insulator chip 34 and the insulator frame portion 34 is kept at about 1 mm while being scrubbed to suppress voids.

  Further, when the semiconductor chip 20 includes a SiC substrate and a gallium nitride laminated body thereon, the thickness is as thin as 50 to 100 μm. It is preferable that the thickness of the relay substrate 40 be equal to or greater than the thickness of the semiconductor chip 20 and equal to or less than the thickness of the insulator frame 34 because bonding is easy. In addition, it is more preferable that the thickness of the relay substrate 40 be the same as or slightly larger than the thickness of the semiconductor chip 20 because the first bonding wire 60 can be shortened.

  The relay substrate 40 can be made of an insulating material such as ceramic such as alumina or aluminum nitride, quartz, sapphire, or high resistance semiconductor. When a conductive portion is provided on the back surface of the relay substrate 40, it can be joined to the surface of the metal plate 32 with a solder material such as AuSn. The length of the relay substrate 40 along the signal propagation direction is 1 mm or less, which is a gap. The width of the relay substrate 40 can be set to 0.5 mm to 1 mm, for example. Since the relay substrate 40 does not generate heat, there may be some voids at the joint interface with the metal plate 32.

  The first bonding wire 60 connects the first electrode 20 a of the semiconductor chip 20 and the first end 44 a of the transmission line 44.

  The second bonding wire 70 connects the second end 44 b opposite to the first end 44 a of the transmission line 44 and the inner end 36 c of the package signal terminal 36.

  In the first embodiment, the inductance of the second bonding wire 70 is made larger than the inductance of the first bonding wire 60.

FIG. 2 is an equivalent circuit diagram of the high-frequency semiconductor device according to the first embodiment.
3A is a Smith diagram showing the load impedance viewed from the inner end of the package signal terminal, and FIG. 3B is a Smith diagram of the load impedance viewed from the connection position between the second bonding wire and the transmission line of the relay substrate. FIG. 3C is a Smith diagram of the load impedance viewed from the connection position between the transmission line of the relay substrate and the first bonding wire, and FIG. 3D is the connection position of the first bonding wire and the first electrode of the semiconductor chip. It is a Smith figure of the load impedance seen from.

  FIG. 3A is a Smith diagram showing the load impedance z1 viewed from the inner end 36c (reference plane Q1) of the package signal terminal 36. FIG. A load 90 (a signal source having an impedance of 50Ω) is connected to the package signal terminal 36. The conductive portion 36a of the first embodiment is not a transmission line having a characteristic impedance of 50Ω, and the load impedance z1 viewed from the reference plane Q1 is capacitive.

FIG. 4A is a schematic diagram showing an example of the conductive portion of the package signal terminal, and FIG. 4B is a Smith diagram showing the load impedance.
FIG. 4B is a Smith diagram normalized with the characteristic impedance Z _C = 50Ω. The conductive portion 36a has two transmission lines connected in cascade. The transmission line A1 on the load 90 side has a characteristic impedance smaller than 50Ω, and the electrical length EL1 is about a quarter wavelength (90 °). The transmission line A2 on the semiconductor chip 20 side has a characteristic impedance greater than 50Ω, and the electrical length EL2 is (90 + α) °.

  Since the transmission line A1 functions as a quarter wavelength converter, the real part of the normalized load impedance z11 as seen from the reference plane Q11 is smaller than 1. Further, the phase is rotated by the transmission line A2 whose characteristic impedance is smaller than that of the transmission line A1, and the phase changes by (90 + α) degrees to the vicinity of the position intersecting with the circle of r = 1. When the phase is rotated by 90 ° or more in a transmission line having a characteristic impedance smaller than that of the transmission line A1, the load impedance z12 viewed from the reference plane Q12 can be made capacitive. In addition, the electroconductive part 36a represented to Fig.4 (a) is an example, Comprising: This invention is not limited to this.

  Next, returning to FIG. 3B, the load impedance z <b> 2 viewed from the connection position (reference plane Q <b> 2) between the second bonding wire 70 and the transmission line 44 of the relay substrate 40 will be described. The second bonding wire 70 connects, for example, the upper surface of the insulator frame portion 34 and the upper surface of the relay substrate 40 that is at a lower position. The inductance of the second bonding wire 70 is determined so that the load impedance z2 viewed from the reference plane Q2 is inductive. If the inductance is 0.35 nH, for example, the load impedance z2 at 30 GHz can be made inductive.

  Next, the characteristic impedance and the electrical length of the transmission line 44 are set so that the load impedance z3 viewed from the reference plane Q3 intersects the circle of r = 1 in the band within the capacitive reactance region. For example, as shown in FIG. 3C, the width of the transmission line 44 of the relay board 40 is 0.18 mm and the length is 0.74 mm.

  Next, the inductance by the first bonding wire 60 is added to the load impedance z3 in the vicinity of the circle of r = 1 to match the input impedance of the semiconductor chip 20. If the inductance of the first bonding wire 60 is, for example, 0.22 nH, the load impedance z4 at 30 GHz viewed from the reference plane Q4 can be made close to 50Ω. The difference between the inductance of the second bonding wire 70 and the inductance of the first bonding wire 60 is a complex conjugate with the capacitance of the load impedance z1 (@ Q1) viewed from the end 36c of the signal terminal 36.

FIG. 5 is a graph showing the reflection loss dependency on the frequency calculated for the input impedance of the high-frequency semiconductor device of the first embodiment with respect to 50Ω which is the impedance of the signal system.
Return loss RL (dB) is represented by the formula (1) using the input reflection coefficient _{S 11} of S parameters.

  The band where the center frequency is 30 GHz and the reflection loss RL is 20 dB is as wide as about 4 GHz.

  In the first embodiment, the load impedance z1 (@ Q1) viewed from the end portion 36c of the signal terminal 36 is made capacitive, and the inductance by the second bonding wire 70 is added to induce the load impedance z2 (@ Q2). Make it sex. Furthermore, the load impedance z3 (Q3) is converted into capacitive again by the transmission line 44. Thereafter, by adding the inductance by the first bonding wire 60, matching is achieved over a wide band with respect to the impedance (50Ω) of the semiconductor chip 20. By making the load impedance z1 (@ Q1) viewed from the end portion 36c of the signal terminal 36 capacitive, the inductance of the second bonding wire 70 can be made larger than the inductance of the first bonding wire 60. And the gap and the step between the semiconductor chips are absorbed through the relay substrate close to the thickness of the semiconductor chip. The inductance of the second bonding wire 70 is larger than the inductance of the first bonding wire 60 by the capacity of the load impedance z1 (@ Q1) viewed from the end 36c of the signal terminal 36. Alternatively, a capacitance is given to the load impedance z <b> 1 (@Q <b> 1) viewed from the end 36 c of the signal terminal 36 by the amount that the inductance of the second bonding wire 70 is larger than the inductance of the first bonding wire 60.

6A is a schematic cross-sectional view of the high-frequency semiconductor device according to the first comparative example, FIG. 6B is a Smith diagram showing the load impedance, and FIG. 6C is the load impedance when the bonding wire is lengthened. FIG.
In the first comparative example, no relay board is provided. Further, the inductance of the bonding wire 170 is set to 0.18 nH. As shown in FIG. 6B, the load impedance viewed from the end 136c of the package signal terminal 136 is capacitive. By adding the inductance of the bonding wire 170, the load impedance viewed from the reference plane Q102 can be matched to 50Ω at the center frequency of 30 GHz.

  However, while the thickness of the semiconductor chip 120 is 50 to 100 μm, the thickness of the insulator frame portion 134 is as large as 0.4 to 0.6 mm, for example. In this case, it is not easy to shorten the inductance to 0.18 nH. On the other hand, when the bonding wire 170 is made long (inductance becomes 0.3 nH or the like), as shown in FIG. 6C, the load impedance viewed from the reference plane 102 is shifted from 50Ω at the center frequency of 30 GHz.

FIG. 7A is a Smith diagram showing the load impedance of the high-frequency semiconductor device according to the second comparative example, and FIG. 7B is a graph showing the reflection loss dependency on the frequency.
When the capacitance of the load impedance z101 (@ Q101) viewed from the end 136c of the package signal terminal 136 is increased as shown in FIG. 7A, matching can be achieved at the center frequency even if the bonding wire 170 is lengthened.

  However, the frequency dependence of the load impedance at the end 136c increases. For this reason, at the center frequency of 30 GHz, even if it can be matched to 50Ω, the deviation from 50Ω becomes large at the upper and lower limits of the band. For this reason, as shown in FIG. 7B, the band where the reflection loss RL is 20 dB or more becomes as narrow as about 1.5 dB.

  In contrast, in the first embodiment, the second bonding wire 70 is lengthened so as to connect between the steps of the conductive layer 36a and the transmission line 44. The inductive load impedance z2 is converted to a load impedance z3 having an appropriate capacitance value by the transmission line 44 of the relay board 40. Furthermore, the load impedance z4 (@ Q4) can be made close to 50Ω by adding the inductance by the first bonding wire 60 (because the step is small and can be made smaller than the inductance of the second bonding wire 70). Since the capacitance component of the load impedance z1 viewed from the end portion 36c of the package signal terminal 36 is not increased, the bandwidth can be increased.

  In the first embodiment, the (first) package signal terminal 36 is an input terminal, and the second package signal terminal 56 is an output terminal. The relay substrate 40 is provided only between the package signal terminal 36 and the semiconductor chip 20. A gap between the semiconductor chip 20 and the insulator frame portion 34 is provided to join the semiconductor chip 20 to the metal plate 32 by scrubbing. When one relay substrate 40 is used, the semiconductor chip 20 may be provided on the input terminal side or on the output terminal side.

  Further, insertion loss may occur by inserting the relay board 40. In this case, since a large amount of power propagates on the output terminal side, the magnitude of the loss power can be reduced by providing the relay substrate 40 on the input terminal side where the loss power is small.

FIG. 8 is a schematic cross-sectional view of a semiconductor device according to the second embodiment.
The semiconductor device 10 includes a semiconductor chip 20, a package 30, relay boards 40 and 80, a first bonding wire 60, a second bonding wire 70, a third bonding wire 62, and a fourth bonding wire. 72.

  The package 30 includes a metal plate 32, an insulator frame portion 34 disposed on the metal plate 32 so as to surround the semiconductor chip 10, a first package signal terminal 36 provided on the insulator frame portion 34, A second package signal terminal 56. The second package signal terminal 56 includes a conductive portion 56a provided on the insulator frame portion 34 and leads 56b. When a load is connected to the package signal terminal 56, the load impedance viewed from the inner end 56c of the package signal terminal 56 is defined as capacitive. When the package signal terminal 35 is an output package signal terminal, the load is, for example, a 50Ω load.

  The third bonding wire 62 connects the second electrode 20 b of the semiconductor chip 20 and the first end portion 84 a of the transmission line 84.

  The fourth bonding wire 72 connects the second end portion 84 b opposite to the first end portion 84 a of the transmission line 84 and the inner end 56 c of the package signal terminal 56.

  In the second embodiment, the inductance of the second bonding wire 70 is larger than the inductance of the first bonding wire 60, and the inductance of the fourth bonding wire 72 is larger than the inductance of the third bonding wire 62.

  In the second embodiment, broadband matching is performed between the input electrode 20a of the semiconductor chip 20 and the input package signal terminal 36 of the package, and between the output electrode 20b of the semiconductor chip 20 and the output signal terminal 56 of the package. Is possible.

  According to the first and second embodiments, it is possible to provide a high-frequency semiconductor device in which a semiconductor chip constituting an MMIC and a package signal terminal can be matched over a wide band. This high-frequency semiconductor device can be used for, for example, a 30 GHz band satellite communication ground station.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 1 High frequency semiconductor device, 20 Semiconductor chip, 30 Package, 32 Metal plate, 34 Insulator frame part, 36 Package signal terminal, 36 c (package signal terminal) inner end, 40 Relay board, 42 Dielectric layer, 44 Transmission line, 44a first end, 44b second end, 56 package signal terminal, 60 first bonding wire, 70 second bonding wire, 90, 92 load, z1 load impedance (@ Q1), z2 load impedance ( @ Q2), z3 Load impedance (@ Q3), z4 Load impedance (@ Q4)

Claims (6)

A semiconductor chip provided with an MMIC;
A package comprising: a metal plate; an insulator frame portion disposed on the metal plate so as to surround the semiconductor chip; and a signal terminal provided on the insulator frame portion, wherein the package signal terminal Wherein the load impedance viewed from the inner end of the package signal terminal is capacitive when connected to a 50Ω signal system;
A relay board disposed on the metal plate between the semiconductor chip and the package signal terminal and having a transmission line;
A first bonding wire connecting the first electrode of the semiconductor chip and the first end of the transmission line;
A second bonding wire connecting the second end of the transmission line opposite to the first end and the internal end of the package signal terminal;
With
The high frequency semiconductor device, wherein an inductance of the second bonding wire is larger than an inductance of the first bonding wire.   2. The high-frequency semiconductor device according to claim 1, wherein the load impedance viewed from the inner end of the signal terminal is capacitive by an amount that the inductance of the second bonding wire is larger than the inductance of the first bonding wire. The package signal terminal has an input terminal and an output terminal,
A signal source is connected to the input terminal as the load,
The high-frequency semiconductor device according to claim 1, wherein an output load is connected to the output terminal as the load. The relay board is an input relay board disposed between the input terminal and the semiconductor chip;
The high frequency semiconductor device according to claim 3, further comprising: an output relay substrate disposed between the output terminal and the semiconductor chip.   The high frequency semiconductor device according to claim 1, wherein the MMIC includes a field effect transistor.   The MMIC is the high-frequency semiconductor device according to any one of 1 to 5, including any one of a transmission line, an inductor, a capacitor, and a resistor.

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